Tektronix P6960DBL, P6962DBL User Manual

P6960DBL & P6962DBL High-Density Logic Analyzer Probes

ZZZ

with D-Max™ Probing Technology

Instruction Manual

There are no current European directives that apply to this product. This product provides cable and test lead connections to a test object of electronic measuring and test equipment.

Warning

The servicing instructions are for use by qualiﬁed personnel only. To avoid personal injury, do not perform any servicing unless you are qualiﬁed to do so. Refer to all safety summaries prior to performing service.

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Contacting Tektronix

Tektronix, Inc. 14200 SW Karl Braun Drive P.O . B ox 5 00 Beaverton, OR 97077 USA

For product information, sales, service, and technical support:

In North America, call 1-800-833-9200. World wi de, vis i t www.tektronix.com to ﬁnd contacts in your area.

Warranty

Tektronix warrants that this product will be free from defects in materials and workmanship for a period of one (1) year from the date of shipment. If any such product proves defective during this warranty period, Tektronix, at its option, either will repair the defective product without charge for parts and labor, or will provide a replacement in exchange for the defective product. Parts, modules and replacement products used by Tektronix for warranty work may be n the property of Tektronix.

ew or reconditioned to like new performance. All replaced parts, modules and products become

In order to o the warranty period and make suitable arrangements for the performance of service. Customer shall be responsible for packaging and shipping the defective product to the service center designated by Tektronix, with shipping charges prepaid. Tektronix shall pay for the return of the product to Customer if the shipment is to a location within the country in which the Tektronix service center is located. Customer shall be responsible for paying all shipping charges, duties, taxes, and any other charges for products returned to any other locations.

This warranty shall not apply to any defect, failure or damage caused by improper use or improper or inadequate maintenance and care. Tektronix shall not be obligated to furnish service under this warranty a) to repair damage result b) to repair damage resulting from improper u se or connection to incompatible equipment; c) to repair any damage or malfunction caused by the use of non-Tektronix supplies; or d) to service a product that has been modiﬁed or integrated with other products when the effect of such modiﬁcation or integration increases the time or difﬁculty of servicing the product.

THIS WARRANTY IS GIVEN BY TEKTRONIX WITH RESPECT TO THE PRODUCT IN LIEU OF ANY OTHER WARRANTIES, EXPRESS OR IMPLIED. TEKTRONIX AND ITS VENDORS DISCLAIM ANY IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE.

TRONIX’ RESPONSIBILITY TO REPAIR OR REPLACE DEFECTIVE PRODUCTS IS THE SOLE

TEK AND EXCLUSIVE REMEDY PROVIDED TO THE CUSTOMER FOR BREACH OF THIS WARRANTY. TEKTRONIX AND ITS VENDORS WILL NOT BE LIABLE FOR ANY INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES IRRESPECTIVE OF WHETHER TEKTRONIX OR THE VENDOR HAS ADVANCE NOTICE OF THE POSSIBILITY OF SUCH DAMAGES.

[W2 – 15AUG04]

btain service under this warranty, Customer must notify Tektronix of the defect before the expiration of

ing from attempts by personnel other than Tektronix representatives to install, repair or service the product;

Table of Contents

Preface ............................................................................................................... v

Related Documentation ....................................................................................... v

Commonly Used Terms ...................................................................................... vi

Operating B

Product Description......................................... ................................ ................... 1

Connecting the Probes to the Logic Analyzer.............................................................. 6

Connecting the Probes to the Target System. .................................. ............................. 7

Dressing the Probe Cables ................................................................................... 12

Storing the Probe Heads . ................................ .................................. .................. 13

Referen

Designing an Interface Between the Probes and a Target System..... ................................ .. 15

Board Design.................................................................................................. 18

Probe Footprint Dimensions ................................................................................. 23

Other Design Considerations .......... ................................ ................................ ...... 24

Probe Pinout Deﬁ nition and Channel Assignment . ... ... . ... ... . ... ... . ... ... . ... ... . ... . .. . ... .... ... . .. 25

iﬁcations ............................ ................................ .................................. ........ 31

Spec

Mechanical and Electrical Speciﬁcations ................ ................................ .................. 31

Maintenance........................................................................................................ 33

Probe Calibration ......... ................................ ................................ .................... 33

Functional Check ............................................................................................. 33

Inspection and Cleaning...................... .................................. .............................. 33

Repackaging Instructions .......... ................................ ................................ .......... 35

Replaceable Parts.................................................................................................. 37

Parts Ordering Information .................................................................................. 37

Using the Replaceable Parts List............................................................................ 38

Index

asics.................................................................................................... 1

ce ........................................................................................................... 15

rvice Strategy......................................... ................................ ...................... 34

P6960DBL & P6962DBL High-Density Logic Analyzer Probes Instruction Manual i

Table of Contents

List of Figure

Figure i: Differential input amplitude . . ... .... ... . ... ... . ... ... . ... . .. . ... . ... ... . ... ... . ... ... . ... . .. . ... . ... .. vi

Figure ii: F

Figure iii: Probe example.. ... . ... ... . ... ... . ... ... . ... . .. . ... .... ... . ... ... . ... ... . ... ... . ... ... . ... ... . ... .... . viii

Figure 1: P6960DBL High-Density probe with D-Max probing technology ................................ 2

Figure 2: P6962DBL High-Density probe with D-Max probing technology ................................ 4

Figure 3: Connecting the probes to the logic analyzer ...................... ................................ ... 6

Figure 4: Installing the probe retention a ssembly.. ... . ... ... . ... ... . ... . .. . ... . ... ... . ... ... . ... .... ... . ... ... . 8

Figure 5:

Figure 6: Connecting the probes to the target system ............... .................................. ........ 10

Figure 7: Proper dressing of the probe cables .................... ................................ .............. 12

Figure 8: Protecting the probe heads.......... ................................ .................................. 13

Figure 9: P6960DBL/P6962DBL probe dimensions .......................................................... 18

Figure 10: Retention assembly dimensions..................................................................... 19

Figur

Figure 12: Side-by-side layout................................................................................... 20

Figure 13: End-to-end layout ...... ................................ ................................ .............. 20

Figure 14: Signal routing on the target system................................................................. 21

Figure 15: High-Density probe load model................. ................................ .................... 22

Figure 16: Probe footprint dimensions on the PCB.............. ................................ .............. 23

gure 17: Optional Via-in-Pad placement recommendation ................................. ................ 24

Figure 18: P6960DBL single-ended PCB footprint pinout detail................ ............................ 25

Figure 19: P6962DBL single-ended PCB footprint pinout detail................ ............................ 27

Figure 20: Replacing the cLGA clip ................ .................................. .......................... 34

Figure 21: P6960DBL High-Density probe accessories .................... ................................ .. 39

Figure 22: P6962DBL High-Density probe accessories .................... ................................ .. 40

Figure 23: Optional accessories.................... ................................ .............................. 41

lying Lead Set .... .................................. ................................ ................. vii

Proper handling of the interface clip.................................................................. 9

e 11: Keepout area .......................................................................................... 19

ii P6960DBL & P6962DBL High-Density Logic Analyzer Probes Instruction Manual

List of Tables

Table 1: Logic analyzer clock and qualiﬁer availability . . ... ... . ... . ... ... . ... . ... ... . ... .... ... . ... ... . ... . . 16

Table 2: Cha

probe ........................................................................................................... 25

Table 3: Channel assignment for a P6962DBL single-ended data, differential clock logic analyzer

probe ........................................................................................................... 28

Table 4: Mechanical and electrical speciﬁcations.................. ................................ ............ 31

Table 5: Environmental speciﬁcations .......................... .................................. .............. 32

Table 6: P

Table 7: P6960DBL replaceable parts list ...................................................................... 39

Table 8: P6962DBL replaceable parts list ...................................................................... 40

Table 9: P696xDBLSeries Probes optional accessories....................................................... 41

nnel assignment for a P6960DBL single-ended data, differential clock logic analyzer

arts list column descriptions.......................... ................................ ................ 38

Table of Contents

P6960DBL & P6962DBL High-Density Logic Analyzer Probes Instruction Manual iii

Table of Contents

iv P6960DBL & P6962DBL High-Density Logic Analyzer Probes Instruction Manual

Preface

Related Documentation

Item Purpose Location

vel operational overview

TLA Quick Start User Manuals

Online Help

Installation Quick Reference Cards High-level installation information

Installation Manuals

XYZs of Logic Analyzers

Declassiﬁcation and Securities instructions

High-le

In-depth operation and UI help

Detailed ﬁrst-time installation information

Logic analyzer basics

Data security concerns speciﬁcto sanitizing or removing memory devices from Tektronix products

Application notes

Product Speciﬁcations & Performance Veriﬁcation Procedures

TPI.NET Documentation

Field upgrade kits

Optional Service Manuals Self-service documentation for modules

Collection of logic analyzer application

ciﬁc notes

spe

TLA Product speciﬁcations and performance veriﬁcation procedures

tailed information for controlling the

De logic analyzer using .NET

Upgrade information for your logic analyzer

and mainframes

P6960DBL & P6962DBL High-Density Logic Analyzer Probes Instruction Manual v

Preface

Commonly Used

Compression Footprint

Differential Input

Amplitude Deﬁnition

Terms

cLGA

Refer to the following list of commonly used terms throughout the manual.

An acronym for compression Land Grid Array, a connector that provides an electrical connection between a PCB and the probe input circuitry.

A connectorless, solderless contact between your PCB and the P69XX Series probes. Connection is obtained by applying pressure between your PCB and the probe through a cLGA c-spring.

For differential signals, the magnitude of the difference voltage Vmax-Vmin (and Vmin-Vmax) must be greater than or equal to 150 mV. Refer to the following ﬁgure.

Figure i: Differential input amplitude

ademark name that describes the technology used in the P69xx Series

D-Max probing technology

Flying Lead Set

vi P6960DBL & P6962DBL High-Density Logic Analyzer Probes Instruction Manual

Tr high-density logic analyzer probes.

A lead set designed to attach to a P6960 Probe to provide general-purpose probing capability. Refer to the following ﬁgure.

Figure ii: Flying Lead Set

Preface

Functional Check

Procedure

Keepout

Area

Module

Module End

PCB

Pro

Functional check procedures verify the basic functionality of the probes by conﬁrming that the probes recognize signal activity at the probe tips.

An area on a printed circuit board in which component, trace, and/or via placement may be restricted.

The unit that plugs into a mainframe that provides instrument capabilities such as logic analysis.

The end of the probe that plugs into the module unit.

An acronym for Printed Circuit Board; also known as Etched Circuit Board (ECB).

The device that connects a module with a target system. Refer to the following ﬁgure.

P6960DBL & P6962DBL High-Density Logic Analyzer Probes Instruction Manual vii

Preface

Figure iii: Probe example

Probe Adapter

Probe Head

SMT Kli

pChip

A device that connects the LA module probe to a target system.

The end of the probe that connects to the target system or probe adapter.

An interface device for attaching logic analyzer probes to components with a maximum lead diameter of 2.413 mm (0.095 in) and stackable on lead centers of 1.27 mm (0.050 in).

viii P6960DBL & P6962DBL High-Density Logic Analyzer Probes Instruction Manual

Operating Basics

Product Description

This section provides a brief description of the Tektronix P696xDBL Series High-Density Logic Analyzer Probes, information on attaching color-coded probe labels, and p the target system.

The P696xDBL Series Probes connect TLA7BBx Series Logic Analyzer modules to a target system.

The P6960DBL probe consists of 34 single-ended channels in one probe head, distributed over two 34-channel module end connectors.

The P6962DBL probe consists of 34 single-ended channels in one probe head, distributed over four 17-channel module-end connectors.

robe and adapter connection instructions from the logic analyzer to

Attaching Probe Labels

If you p color-coded labels. You will ﬁnd instructions on how to attach the labels to the probes on a color reference card that is included with the probes:

urchase probes for the logic analyzer module, you will need to apply the

P6960DBL High-Density Single-Ended Logic Analyzer Probe with D-Max Probing Technology Labeling and Installation Instructions

P6962DBL High-Density Single-Ended Logic Analyzer Probe with D-Max Probing Technology Labeling and Installation Instructions

P6960DBL & P6962DBL High-Density Logic Analyzer Probes Instruction Manual 1

Operating Basics

P6960DBL High-Density

Probe

The P6960DBL pr D-Max probing technology. (See Figure 1.) The probe consists of one probe head that has 34 channels (32 data and 2 clock/qual). The P6960DBL probe double-probes the signals from the device under test. The probe uses double back end connectors to the TLA logic analyzer module for double probing the signals with a single probe head.

obe is a 34-channel, high-density connectorless probe with

Figure 1: P6960DBL High-Density probe with D-Max probing technology

2 P6960DBL & P6962DBL High-Density Logic Analyzer Probes Instruction Manual

Operating Basics

The following l

Differential or single-ended clock and qualiﬁcation inputs

Single-ended data inputs

cLGA contact eliminates need for built-in connector

Footprint supports direct signal pass-through

Supports PCB thickness of 1.27 mm to 6.35 mm (0.050 in to 0.250 in)

Consists o clock/quals), and two 34-channel module end connectors

Narrow 34

2X mode, (for example, 1:2 demultiplexing) uses one-half of the probe head. For appl might be a better alternative. With the P6962DBL probe, 2X sampling speed can be achieved without giving up half the channels at the probe tip.

Color-coded keyed attachment

–1.25

–1.0 V to +2.25 V threshold range

ist details the capabilities and qualities of the P6960DBL probe:

f one independent probe head of 34 channels (32 data and 2

-channel probe head makes for easier placement and layout

ications requiring 2X mode for faster sampling, the P6962DBL probe

V to +2.5 V input operating range

200 mV minimum single-ended signal amplitude

100 mV amplitude each side minimum differential signal

Minimal loading of 0.7 pF at 11.7 kΩ to ground

Operation in normal or inverted p olarity is acceptable (clock only)

y common mode voltage is acceptable, as long as the maximum positive

An voltage does not exceed +2.5 V and the maximum negative voltage does not exceed –1.25 V

NOTE. For P6960DBL probe routing and pinout information, refer to the ﬁgure.

(See Figure 14 on page 21.)

P6960DBL & P6962DBL High-Density Logic Analyzer Probes Instruction Manual 3

Operating Basics

P6962DBL High-Density

Probe

The P6962DBL pr D-Max probing technology. (See Figure 2.) The probe consists of one probe head that has 34 channels (32 data and 2 clock/qual), distributed over 4 module-end connectors with 17 channels each.

The P6962DBL probe is optimized for use with the TLA7BB4 logic analyzer module when running in 2X Demux (half channel acquisition) mode. The probe uses double back end connectors to the TLA logic analyzer module for double probing the signals with a single probe head.

obe is a 34-channel, high-density connectorless probe with

re 2: P6962DBL High-Density probe with D-Max probing technology

Figu

4 P6960DBL & P6962DBL High-Density Logic Analyzer Probes Instruction Manual

Operating Basics

The following l

Differential or single-ended clock and qualiﬁcation inputs

Single-ended data inputs

cLGA contact eliminates need for a built-in connector

Footprint supports direct signal pass-through

Supports PCB thickness of 1.27 mm to 6.35 mm (0.050 in to 0.250 in)

Consists o clock/quals), and four 17-channel module end connectors.

Narrow 34

Optimized for 2X mode (1:2 demultiplexing) to minimize board real estate. 2X mode i

Color-coded keyed attachment

–1.25 V to +2.5 V input operating range

–1.0 V to +2.25 V threshold range

200 mV minimum single-ended signal amplitude

ist details the capabilities and qualities of the P6962DBL probe:

f one independent probe head of 34 channels (32 data and 2

-channel probe head makes for easier placement and layout

s also called half-channel mode.

100 mV amplitude each side minimum differential signal

mal loading of 0.7 pF at 11.7 kΩ to ground

Mini

Operation in normal or inverted p olarity is acceptable (clock only)

Any common mode voltage is acceptable as long as the maximum positive voltage does not exceed +2.5 V and the maximum negative voltage does not

ceed –1.25 V.

NOTE. For P6962DBL probe routing and pinout information, refer to the ﬁgure.

(See Figure 19 on page 27.)

P6960DBL & P6962DBL High-Density Logic Analyzer Probes Instruction Manual 5

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Tektronix P6960DBL, P6962DBL User Manual

Specifications and Main Features

Frequently Asked Questions

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