Tektronix P6960,P6962,P6964,P6980,P6982,P6960HCD,P6960HS User Manual

xx
P6900 Series High-Density Logic Analyzer Probes
ZZZ
with D-Max™ Probing Technology
Instruction Manual
Warning
The servicing instructions ar only. To avoid personal injury, do not perform any servicing unless you are qualied to do s prior to performing service.
o. Refer to all safety summaries
www.tektronix.com
P077152806*
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Contacting Tektronix
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For product information, sales, service, and technical support:
n, OR 97077
In North America, call 1-800-833-9200. World wide, v i sit www.tektronix.com to nd contacts in your area.
Warranty
Tektronix warrants that this product will be free from defects in materials and workmanship for a period of one (1) year from the date of shipment. If any such product proves defective during this warranty period, Tektronix, at its option, either will repair the defective product without charge for parts and labor, or will provide a replacement in exchange for the defective product. Parts, modules and replacement products used by Tektronix for warranty work may be n the property of Tektronix.
ew or reconditioned to like new performance. All replaced parts, modules and products become
In order to o the warranty period and make suitable arrangements for the performance of service. Customer shall be responsible for packaging and shipping the defective product to the service center designated by Tektronix, with shipping charges p repaid. Tektronix shall pay for the return of the product to Customer if the shipment is to a location within the country in which the Tektronix service center is located. Customer shall be responsible for paying all shipping charges, duties, taxes, and any other charges for products returned to any other locations.
This warranty shall not apply to any defect, failure or damage caused by improper use or improper or inadequate maintenance and care. Tektronix shall not be obligated to furnish service under this warranty a) to repair damage result b) to repair damage resulting from improper use or connection to incompatible equipment; c) to repair any damage or malfunction caused by the use of non-Tektronix supplies; or d) to service a product that has been modied or integrated with other products when the effect of such modication or integration increases the time or difculty of servicing the product.
THIS WARRANTY IS GIVEN BY TEKTRONIX WITH RESPECT TO THE PRODUCT IN LIEU OF ANY OTHER WARRANTIES, EXPRESS OR IMPLIED. TEKTRONIX AND ITS VENDORS DISCLAIM ANY IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE.
TRONIX' RESPONSIBILITY TO REPAIR OR REPLACE DEFECTIVE PRODUCTS IS THE SOLE
TEK AND EXCLUSIVE REMEDY PROVIDED TO THE CUSTOMER FOR BREACH OF THIS WARRANTY. TEKTRONIX AND ITS VENDORS WILL NOT BE LIABLE FOR ANY INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES IRRESPECTIVE OF WHETHER TEKTRONIX OR THE VENDOR HAS ADVANCE NOTICE O F THE POSSIBILITY OF SUCH DAMAGES.
[W2 – 15AUG04]
btain service under this warranty, Customer must notify Tektronix of the defect before the expiration of
ing from attempts by personnel other than Tektronix representatives to install, repair or service the product;
Table of Contents
Preface ............................................................................................................... v
Related documentation......... ................................ ................................ ............... v
Environmental considerations ............................................................................... vi
Commonly us
Operating basics ................. .................................. ................................ ................. 1
Product description ... .................................. ................................ ....................... 1
Connect the probes to the logic analyzer......................................... .......................... 10
Connect the probes to the target system.................................................................... 11
Dress the probe cables........................................................................................ 19
Store th
Reference ................. ................................ .................................. ........................ 21
Probe and target system interface design information .................................................... 21
Board design .................................................................................................. 27
Probe footprint dimensions ........ .................................. ................................ ........ 35
Other design considerations ................................................................................. 36
epinoutdefinition and channel assignment . ... ... . .. . ... ... . .. . ... ... ... . .. . ... ... ... . .. . ... ... . .. . . 37
Prob
Specications ................ ................................ ................................ ...................... 53
Mechanical and electrical specications ................................................................... 53
Maintenance........................................................................................................ 55
Probe calibration .............................................................................................. 55
Perform the functional check .......................... ................................ ...................... 55
spect and clean the probes................................................................................. 55
In
Service strategy ....... .................................. ................................ ...................... 56
Legacy probe and attachment support ............................ ................................ .......... 56
Repackaging instructions .......................... ................................ .......................... 57
Replaceable parts .................................................................................................. 59
Parts ordering information................................................................................... 59
Replaceable parts list ....................... ................................ .................................. 60
Index
ed terms ......... ................................ ................................ .............. vi
e probe heads................. .................................. ................................ ...... 20
P6900 Series Logic Analyzer Probes Instruction Manual i
Table of Contents
List of Figure
Figure i: Differential input amplitude ... ... . .. . ... ... . .. . ... ... . .. . ... ... . ... ... ... . ... ... . .. . ... ... . .. . ... ... . vii
Figure ii: Flying lead set......................................................................................... vii
Figure iii: Probe example. ... ... . ... ... ... . .. . ... ... . .. . ... ... ... . ... ... ... . .. . ... ... . .. . ... ... . .. . ... ... . .. . ... . viii
Figure 1: P6960 High-Density probe with D-Max probing technology............. ......................... 2
Figure 2: P6960HS High-Density probe with D-Max probing technology .................................. 3
Figure 3: P6962 High-Density probe with D-Max probing technology............. ......................... 4
Figure 4: P6964 High-Density probe with D-Max probing technology............. ......................... 6
Figure 5: P6980 High-Density Differe
Figure 6: P6982 High-Density Differential probe with D-Max probing technology .............. ......... 8
Figure 7: Connecting the probes to the logic analyzer .......... ................................ .............. 10
Figure 8: Replacing the wires on the retention posts ...................... ................................ .... 11
Figure 9: Installing the retention posts in the PCB . . .. . ... ... . .. . ... ... . .. . ... ... . .. . ... ... ... . ... ... ... . .. . .. 12
Figure 10: Soldering the retention posts in the PCB ........ ................................ .................. 13
Figure 11: Installing the alternate retention assembly ... . ... ... ... . ... ... ... . ... ... ... . ... ... ... . .. . ... ... . .. . 14
Figure 12: Proper handling of the interface clip ............................................................... 15
Figure 13: Connecting the probes to the target system............ .................................. .......... 16
Figure 14: Using the ying lead set to connect to the target system................. ........................ 18
Figure 15: Proper dressing of the probe cables ................ ................................ ................ 19
Figure 16: Protecting the probe heads........................................................................... 20
Figure 17: P6960, P6960HS, P6980, and P6982 probe dimensions ......................................... 27
Figure 18: P6962 and P6964 probe dimensions................................................................ 28
Figure 19: Retention post dimensions........................................................................... 29
Figure 20: Keepout area ................ ................................ .................................. ........ 29
Figure 21: Side-by-side layout................................................................................... 30
Figure 22: End-to-end layout ........ .................................. ................................ .......... 30
Figure 23: Alternate retention assembly dimensions ................................ .......................... 30
Figure 24: Keepout
Figure 25: Side-by-side layout................................................................................... 31
Figure 26: End-to-end layout ........ .................................. ................................ .......... 32
Figure 27: Signal routing on the target system................................................................. 32
Figure 28: High-Density probe load model................... .................................. ................ 34
Figure 29: Probe footprint dimensions on the PCB............................................ ................ 35
Figure 30: Optional Via-in-pad placement recommendation ................................................. 36
Figure 31: P6960/P6960HS single-ended PCB footprint pinout detail...................................... 37
Figure 32: P6962 single-ended PCB footprint pinout detail.................................................. 39
Figure 33: P6964 single-ended PCB footprint pinout detail.................................................. 41
Figure 34: P6980 differential PCB footprint pinout detail.......... .................................. ........ 44
Figure 35: P6982 differential PCB footprint pinout detail.......... .................................. ........ 48
s
ntial probe with D-Max probing technology ............ ........... 7
area .................... ................................ .................................. .... 31
ii P6900 Series Logic Analyzer Probes Instruction Manual
Table of Contents
Figure 36: Repl
Figure 37: P6960 High-Density probe accessories ........ .................................. .................. 61
Figure 38: P6960HS High-Density probe accessories ........................................................ 62
Figure 39: P6962 High-Density probe accessories ........ .................................. .................. 63
Figure 40: P6964 High-Density probe accessories ........ .................................. .................. 64
Figure 41: P6980 High-Density Differential probe accessories.......... ................................ .... 65
Figure 42: P
Figure 43: Optional accessories.......................................... ................................ ........ 67
acing the cLGA clip ...................... ................................ ...................... 56
6982 High-Density Differential probe accessories.... ................................ .......... 66
P6900 Series Logic Analyzer Probes Instruction Manual iii
Table of Contents
List of Tables
Table 1: Logic analyzer clock and qualier availability . . .. . ... ... . .. . ... ... . .. . ... ... ... . ... ... ... . .. . ... ... 22
Table 2 : 2X D
Table 3: 4X Demultiplexing source-to-destination channel assignments . ... . .. . ... ... . .. . ... ... . ... ... ... . 25
Table 4: Channel assignment for P6960/P6960HS single-ended data, differential clock logic analyzer
probes ............ .................................. ................................ ............................ 37
Table 5: Channel assignment for a P6962 single-ended data, differential clock logic analyzer probe . .. 40
Table 6: Channel assignment for a P6964 single-ended data, differential clock logic analyzer probe . .. 42
Table 7: C
102-channel logic analyzer module..................... ................................ .................... 44
Table 8: Channel assignment for a P6980 differential clock and data logic analyzer probe to a 68- or
34-channel logic analyzer module .......................................................................... 46
Table 9: Channel assignment for a P6982 differential clock and data logic analyzer probe to a 136- or
102-channel logic analyzer module..................... ................................ .................... 48
10: Channel assignment for a P6982 differential clock and data logic analyzer probe to a 68- or
Table
34-channel logic analyzer module .......................................................................... 50
Table 11: Mechanical and electrical specications .................... .................................. ...... 53
Table 12: Environmental specications......................................................................... 54
Table 13: Parts list column descriptions .......................... .................................. ............ 60
Table 14: P6960 replaceable parts list..................................... ................................ ...... 61
le 15: P6960HS replaceable parts list..... .................................. ................................ 62
Tab
Table 16: P6962 replaceable parts list..................................... ................................ ...... 63
Table 17: P6964 replaceable parts list..................................... ................................ ...... 64
Table 18: P6980 replaceable parts list..................................... ................................ ...... 65
Table 19: P6982 replaceable parts list..................................... ................................ ...... 66
Table 20: P6900 Series Probes optional accessories........................................................... 67
emultiplexing source-to-destination c hannel assignments . ... ... . ... ... ... . ... ... . .. . ... ... . 24
hannel assignment for a P6980 differential clock and data logic analyzer probe to a 136- or
iv P6900 Series Logic Analyzer Probes Instruction Manual
Preface
Related documentation
This document provides information on using and servicing the P6900 Series logic analyzer probes.
The following list and table provide information on the related documentation available
for your Tektronix product. For additional information, refer to the
Tektronix Web site (www.tektronix.com/manuals).
Related documentation
Item Purpose
TLA Quick Start User Manuals
Online Help
Installation Reference Sheets High-level installation information
lation Manuals
Instal
XYZs of Logic Analyzers
Declassication and Securities instructions Data security concerns specic to sanitizing
Application notes
Product Specications & Performance Verication Procedures
TPI.NET Documentation
Field upgrade kits
ptional Service Manuals
O
High-lev
In-dept
Detailed rst-time installation information
Logic a
or removing memory devices from Tektronix prod
Coll specic notes
TLA Product specications and performance verication procedures
Detailed information for controlling the logic an
Up
S mainframes
el operational overview
h operation and UI help
nalyzer basics
ucts
ection of logic analyzer application
alyzer using .NET
grade information for your logic analyzer
elf-service documentation for modules and
P6900 Series Logic Analyzer Probes Instruction Manual v
Preface
Environmental considerations
This section provides information about the environmental impact of the product.
Product end-of-life
handling
Restriction of hazardous
substances
Commonly used terms
Observe the f
Equipment recycling. Production of this equipment required the extraction and use of natural resources. The equipment may contain substances that could be harmful to the environment or human health if improperly handled at the product’s end of life. In order to avoid release of such substances into the environment and to reduce t in an appropriate system that will ensure that most of the materials are reused or recycled appropriately.
This pr accessory, and is not required to comply with the substance restrictions of the recast RoHS Directive 2011/65/EU until July 22, 2017.
ollowing guidelines when recycling an instrument or component:
he use of natural resources, we encourage you to recycle this product
This symbol indicates that this product complies with the applicable European Union re on waste electrical and electronic equipment (WEEE) and batteries. For information about recycling options, check the Support/Service section of the Tekt r on
oduct is classied as an industrial monitoring and control instrument
quirements according to Directives 2002/96/EC and 2006/66/EC
ixWebsite(www.tektronix.com).
cLGA
Compression Footprint
Refer to the following list of commonly used terms throughout the manual.
cronym for compression Land Grid Array, a connector that provides an
An a electrical connection between a PCB and the probe input circuitry.
A connectorless, solderless contact between your PCB and the P6900 Series
obes. Connection is obtained by applying pressure between your PCB and
pr the p robe through a cLGA c-spring.
vi P6900 Series Logic Analyzer Probes Instruction Manual
Preface
Differential Input
Amplitude Denition
For differenti Vmin-Vmax) must be greater than or equal to 150 mV.
Figure i: Differential input amplitude
al signals, the magnitude of the difference voltage Vmax-Vmin (and
D-Max probing technology
Flying Lead Set
Trademark name that describes the technology used in the P6900 Series high-density logic analyzer probes.
A lead set designed to attach to a P6960 Probe to provide general-purpose probing capability. (See Figure ii.)
Figure ii: Flying lead set
P6900 Series Logic Analyzer Probes Instruction Manual vii
Preface
Functional Check
Procedure
Keepout Area
Module
Module End
PCB
Probe
Functional che conrming that the probes recognize signal activity at the probe tips.
An area on a printed circuit board in which component, trace, and/or via placement may be restri
The unit that plugs into a mainframe that provides instrument capabilities such as logic analysis.
The end of the probe that plugs into the module unit.
An acronym for Printed Circuit Board; also known as Etched Circuit Board (ECB).
The device connects a module with a target system. (See Figure iii.)
ck procedures verify the basic functionality of the probes by
cted.
Figure iii: Probe example
obe Adapter
Pr
Probe Head
SMT KlipChip
viii P6900 Series Logic Analyzer Probes Instruction Manual
A device that connects the LA module probe to a target system.
The end of the probe that connects to the target system or probe adapter.
An interface device for attaching logic analyzer probes to components with a maximum lead diameter of 2.413 mm (0.095 in) and stackable on lead centers of 1.27 mm (0.050 in).
Operating basics
Product description
This section provides a brief description of the Tektronix P6900 Series High-Density Logic Analyzer Probes, information on attaching color-coded probe labels, and p the target system.
The P6900 Series Probes connect TLA7ACx Series Logic Analyzer modules to a target system.
The P6960, P6960HS, P6962, and P6964 probes consist of 32 single-ended channels and two (2) differential channels in one probe head.
The P6980 probe consists of 34 channels in two probe heads, with each head containing 17 differential channels.
The P6982 probe consists of 17 differential channels in one probe head.
robe and adapter connection instructions from the logic analyzer to
Probe labels
If you purchase probes for the logic analyzer module, you will need to apply the
-coded labels. You will nd instructions on how to attach the labels to the
color probes on a color reference card that is included with the probes:
0 High Density Logic Analyzer Probe Labeling and Installation
P696 Instructions
62 High Density Logic Analyzer Probe Labeling and Installation
P69 Instructions
964 High Density Logic Analyzer Probe Optimized for 4X Demultiplexing
P6 Labeling and Installation Instructions
980 High Density Differential Logic Analyzer Probe Labeling and
P6 Installation Instructions
6982 High Density Differential Logic Analyzer Optimized for 2X
P Demultiplexing Probe Labeling and Installation Instructions
P6900 Series Logic Analyzer Probes Instruction Manual 1
Operating basics
P6960 High-Density Probe
The P6960 Probe probing technology. (See Figure 2.) The probe consists of one probe head that has 34 channels (32 data and 2 clock/qual).
Figure 1: P6960 High-Density probe with D-Max probing technology
The following list details the capabilities and qualities of the P6960 Probe:
Differential or single-ended clock and qualication inputs
is a 34-channel, high-density connectorless probe with D-Max
ingle-ended data inputs
S
cLGA contact eliminates the need for a built-in connector
Footprint supports direct signal pass-through
Supports PCB thickness of 1.27 mm to 6.35 mm (0.050 in to 0.250 in)
Consists of one independent probe head of 34 channels (32 data and 2 clock/quals)
Narrow 34-channel probe head makes for easier placement and layout
2X mode, (for example, 1:2 demultiplexing) uses one-half of the p robe head
4X mode, (for example, 1:4 demultiplexing) uses one-quarter of the probe head
Color-coded keyed attachment
–2.5 V to +5 V input operating range
–2.0 V to +4.5 V threshold range
300 mV minimum single-ended signal amplitude
150 mV amplitude each side minimum differential signal
Minimal loading of 0.5 pF at 20 kto ground
2 P6900 Series Logic Analyzer Probes Instruction Manual
Operating basics
P6960HS High-Density
Probe
Operationinno
Any common mode voltage is acceptable so long as the maximum positive voltage does n exceed –2.5 V (clock only)
NOTE. Yo u c an nd more information about the P6960 probe routing and pinout
in the Signal Routing section. (See Figure 27 on page 32.)
The P6960HS Probe is a 34-channel, high-sensitive, high-density connectorless probe with D-Max probing technology. It has twice the voltage sensitivity compared with the standard P6960 probe. (SeeFigure2.) Theprobeconsistsofa probe head with 34 channels (32 data and 2 clock/qual).
rmal or inverted polarity is acceptable (clock only)
ot exceed +5 V and the maximum negative voltage does not
Figure 2: P6960HS High-Density probe with D-Max probing technology
The following list details the capabilities and qualities of the P6960HS Probe:
Differential or single-ended clock and qualication inputs
Single-ended data inputs
cLGA contact eliminates the need for a built-in connector
Footprint supports direct signal pass-through
Supports PCB thickness of 1.27 mm to 6.35 mm (0.050 in to 0.250 in)
Consists of one independent probe head of 34 channels (32 data and 2 clock/quals)
Narrow 34-channel probe head makes for ea sier placement and layout
2X mode, (for example, 1 :2 demultiplexing) uses one-half of the probe head
P6900 Series Logic Analyzer Probes Instruction Manual 3
Operating basics
P6962 High-Density Probe
4X mode, (for ex head
Color-coded keyed attachment
–1.25 V to +2.5 V input operating range
–1.0 V to +2.25 V threshold range
100 mV minimum single-ended signal amplitude
50 mV amplitude each side minimum differen
Minimal loading of 0.5 pF at 20 kto ground
Operation in normal or inverted polarity is acceptable (clock only)
Any common mode voltage is acceptable so long as the maximum positive voltage does not exceed +2.5 V and the maximum negative voltage does not exceed –1.25 V (clock only)
NOTE. You c an nd more information about the P6960HS probe routing and
pinout in the Signal Routing section. (See Figure 27 on page 32.)
The P6962 Probe is a 34-channel, high-density connectorless probe with D-Max probing technology. (See Figure 3.) The probe consists of one probe head that has 34 channels (32 data and 2 clock/qual), distributed over 2 module-end connectors.
ample, 1:4 demultiplexing) uses one-quarter of the probe
tial signal
Figure 3: P6962 High-Density probe with D-Max probing technology
The following list details the capabilities and qualities of the P6962 Probe:
Differential or single-ended clock and qualication inputs
Single-ended data inputs
cLGA contact eliminates the need for a built-in connector
4 P6900 Series Logic Analyzer Probes Instruction Manual
Operating basics
Footprint supp
Supports PCB thickness of 1.27 mm to 6.35 mm (0.050 in to 0.250 in)
Consists of one independent probe head of 34 channels (32 data and 2 clock/quals)
Narrow 34-channel probe head makes for ea sier placement and layout
Optimized for 4X mode (1:4 demultiplexing) to minimize board real estate
Color-coded keyed attachment
–2.5 V to +5 V input operating range
–2.0 V to +
300 mV minimum single-ended signal amplitude
150 mV amplitude each side minimum differential signal
Minimal loading of 0.5 pF at 20 kto ground
Operation in normal or inverted polarity is acceptable (clock only)
Any common mode voltage is acceptable so long as the maximum positive voltage does not exceed +5 V and the maximum negative voltage does not exceed –2.5 V (clock only)
orts direct signal pass-through
4.5 V threshold range
NOTE. Yo u c an nd more information about the P6962 probe routing and pinout
in the P6962 Single-ended Probe with D-Max probing technology section. (See
ure 32 on page 39.)
Fig
P6900 Series Logic Analyzer Probes Instruction Manual 5
Operating basics
P6964 High-Density Probe
The P6964 Probe probing technology. (See Figure 4.) The probe consists of one probe head that has 34 channels (32 data and 2 clock/qual), distributed over 4 module-end connectors.
is a 34-channel, high-density connectorless probe with D-Max
Figure 4: P6964 High-Density probe with D-Max probing technology
The following list details the capabilities and qualities of the P6964 Probe:
Differential or single-ended clock and qualication inputs
Single-ended data inputs
cLGA contact eliminates the need for a built-in connector
Footprint supports direct signal pass-through
Supports PCB thickness of 1.27 mm to 6.35 mm (0.050 in to 0.250 in)
Consists of one independent probe head of 34 channels (32 data and 2 clock/quals)
Narrow 34-channel probe head makes for easier placement and layout
Optimized for 4X mode (1:4 demultiplexing) to minimize board real estate
Color-coded keyed attachment
–2.5 V to +5 V input operating range
–2.0 V to +4.5 V threshold range
300 mV minimum single-ended signal amplitude
150 mV amplitude each side minimum differential signal
6 P6900 Series Logic Analyzer Probes Instruction Manual
Operating basics
P6980 High-Density
Differential Probe
Minimal loadin
Operation in normal or inverted polarity is acceptable (clock only)
Any common mode voltage is acceptable so long as the maximum positive voltage does not exceed +5 V and the maximum negative voltage does not exceed –2.5
NOTE. Yo u c an nd more information about the P6964 probe routing and pinout
in the Signal Routing section. (See Figure 27 on page 32.)
The P6980 Probe is a 34-channel, high-density connectorless differential probe with D-Max probing technology. (See Figure 5.) The probe consists of two independent probe heads of 17 channels each (16 data and 1 clock/qual).
gof0.5pFat20kΩ to ground
V (clock only)
Figure 5: P6980 High-Density Differential probe with D-Max probing technology
The following list details the capabilities and qualities of the P6980 Probe:
Differential data, clock and qualication inputs (single-ended signals may be probed if negative input is grounded)
cLGA contact eliminates the need for a built-in connector
Footprint supports direct signal pass-through
Supports PCB thickness of 1.27 mm to 6.35 mm (0.050 in to 0.250 in)
Consists of two probe heads supporting 17 channels each, for a total of 34 channels
2X mode (1:2 demultiplexing) and 4X mode (1:4 demultiplexing), use one probe head to minimize required board real estate
P6900 Series Logic Analyzer Probes Instruction Manual 7
Operating basics
P6982 High-Density
Differential Probe
Color-coded ke
–2.5 V to +5 V input operating range
–2.0 V to +4.5 V threshold range
300 mV minimum single-ended signal amplitude (5 V maximum)
150 mV each side minimum differential signal amplitude (2.5 V maximum)
Minimal loading of 0.5 pF at 20 kto ground
Operation in normal or inverted polarity is acceptable
Any common mode voltage is acceptable so long as the maximum positive voltage does not exceed +5 V and the maximum negative voltage does not exceed –2.5 V
NOTE. You ca n nd more information about the P6980 probe routing and pinout
in the Signal Routing section. (See Figure 27 on page 32.)
The P6982 Probe is a 17-channel, high-density connectorless differential probe with D-Max probing technology. (See Figure 6.) The probe consists of one probe head of 17 differential channels (16 data and 1 clock/qual).
yed attachment
Figure 6: P6982 High-Density D ifferential probe with D-Max probing technology
The following list details the capabilities and qualities of the P6982 Probe:
Differential data, clock and qualication inputs (single-ended signals may be probed if negative input is grounded)
cLGA contact eliminates the need for a built-in connector
Footprint supports direct signal pass-through
Supports PCB thickness of 1.27 mm to 6.35 mm (0.050 in to 0.250 in)
8 P6900 Series Logic Analyzer Probes Instruction Manual
Operating basics
Consists of one
Optimized for 2X mode (1:2 demultiplexing) to minimize required board real estate
Color-coded keyed attachment
–2.5 V to +5 V input operating range
–2.0 V to +4.5 V threshold range
300 mV minimum single-ended signal amplitude (5 V maximum)
150 mV each side minimum differential signal amplitude (2.5 V maximum)
Minimal l
Operation in normal or inverted polarity is acceptable
Any common mode voltage is acceptable so long as the maximum positive voltage does not exceed +5 V and the maximum negative voltage does not exceed
NOTE. Yo u c an nd more information about the P6982 probe routing and pinout
in the Signal Routing section. (See Figure 27 on page 32.)
–2.5 V
probe head supporting 17 channels
oading of 0.5 pF at 20 kto ground
P6900 Series Logic Analyzer Probes Instruction Manual 9
Operating basics
Connect the pr
obes to the logic analyzer
Connect the probes to the logic analyzer according to the following steps. (See Figure 7.)
1. Identify the beveled edges of the connector inside the m odule end of the probe.
2. Align the beveled edges of the connector to its mating connector on the logic
analyzer module and press into place.
3. Use care to evenly tighten both screws on the module end of the probe until they are snug. First slightly tighten both screws, then snug each screw to 4 in-lbs (max).
NOTE. All
analyzer when it is powered on. In addition, all P6900 series Logic Analyzer probes connect to the logic analyzer in exactly the same manner.
P6900 series Logic Analyzer probes can be connected to the logic
Figure 7: Connecting the probes to the logic analyzer
10 P6900 Series Logic Analyzer Probes Instruction M anual
Operating basics
Connect the pr
obes to the tar get system
Retention posts
Use the correct retention
post wire
You can connect the P6900 Series Probes to the target system without turning off the power to the target system. The target system must have either the probe retent procedures for both methods are described here.
The retention posts are mounted on a plastic carrier for easy installation to your circuit bo thicker PCBs.
If the PCB is .120 in thick, use the wire that comes preattached to the posts. If the PCB i
s
The longer wires are embedded in the protective foam of the retention post kit. Make su > .120 in thick. Install the longer wires on the retention posts according to the following steps. (See Figure 8.)
1. Remove the old wire by pulling the side of the wire over the retaining tab and lifting the wire away from the post.
2. Place the new wire in the slot side without the tab, and then wrap the wire over the tab side until it engages in the slot (you will feel or hear a slight click).
ion posts or the alternate retention assembly installed. Installation
ard. Two lengths of wires are shipped with the posts to allow use with
s > .120 in thick, use the longer wire that is included with the posts.
re that you use the longer wires included in the kit when the PCB is
Figure 8: Replacing the wires on the retention posts
P6900 Series Logic Analyzer Probes Instruction Manual 11
Operating basics
Install the retention posts
To install the r
1. On the retention post/carrier assembly, locate the black retention post (the post with the k (See Figure 9.)
2. Press the re
NOTE. The following two steps – bending and soldering the wires to the circuit
board – are the two most important steps in assuring that the probe retaining posts are correctly mounted. Bending the wires before soldering them helps prevent long-term cold solder ow.
3. Press down on the carrie r and bend the post wires out to anchor the posts to the PCB. Ensure the assembly is perpendicular to the PCB when bending and soldering the post w ires.
The bend point in the retaining wire should be as close to the circuit board surface as possible. Grip the wire with a pair of needle-nose pliers about 1/8-in (not the pliers) act as the fulcrum point for bending the wire. This method pulls the probe mounting posts tightly against the circuit board surface.
etention posts on the PCB, do the following:
eying pin) and align it to the keying pin hole on the PCB.
tention posts into the holes on the footprint on the PCB.
ch above the circuit board surface and let the side of the through-hole
Figure 9: Installing the retention posts in the PCB
12 P6900 Series Logic Analyzer Probes Instruction M anual
Operating basics
4. Solder the post soldered from the top or bottom of the circuit board, but it is best to solder the bottom to avoid the heat-sinking effects of the posts on top.
Figure 1
5. Pull off
NOTE. The posts may have a small amount of movement after you solder them to
the circuit board. This is normal and accounted for in the post design.
0: Soldering the retention posts in the PCB
s to the PCB. (See Figure 10 on page 13.) The posts can be
the carrier from the posts.
Clean the compression
footprints
The probe should mate rmly to the board when the two screws are tightened to the mounting posts. The screws have a mechanical stop on them to prevent over­tightening the probe to the board.
After a probe has been installed and removed, there may be slightly more play in the posts. This is also normal and accounted for in the probe design.
CAUTION. To avoid electrical damage, always power off your target system before
cleaning the compression footprint.
Before you connect the probe to the target system, clean the compression footprints on the board, according to the following steps:
1. Use a lint-free, clean-room cloth lightly moistened with electronic/reagent grade isopropyl alcohol, and gently wipe the footprint surface.
2. Remove any remaining lint using a nitrogen air gun or clean, oil-free dry air.
P6900 Series Logic Analyzer Probes Instruction Manual 13
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