There are no current European directives that apply to this product. This product provides cable
and test lead connections to a test object of electronic measuring and test equipment.
Warning
The servicing instructions are for use by qualified
personnel only. To avoid personal injury, do not
perform any servicing unless you are qualified to
do so. Refer to all safety summaries prior to
performing service.
Tektronix products are covered by U.S. and foreign patents, issued and pending. Information in this publication supercedes
that in all previously published material . Specifica tions and price change privileges reserved.
Tektronix, Inc., P.O. Box 500, Beaverton, OR 97077
TEKTRONIX and TEK are registered trademarks of Tektronix, Inc.
MagniVu, iView, PatGenVu, PowerFlex, QuickStart, and TLAVu are unregistered trademarks of Tektronix, Inc.
WARRANTY
Tektronix warrants that the products that it manufactures and sells will be free from defects in materials and
workmanship for a period of one (1) year from the dat e of shipment. If a product proves defective during this
warranty period, Tektronix, at its option, either will repair the defective product without charge for parts and labor,
or will provide a replacement in exchange for the defective product.
In order to obtain service under this warranty, Customer must notify Tektronix of the defect before the expiration
of the warranty period and make suitable arrangements for the performance of service. Customer shall be
responsible for packaging and shipping the defective product to the service center designated by Tektronix, with
shipping charges prepaid. Tektronix shall pay for the return of the product to Customer if the shipment is to a
location within the country in which the Tektronix service ce nter is located. Customer shall be responsible for
paying all shipping charges, duties, taxes, and any other charges for produc ts returned to any other locations.
This warranty shall not apply to any defect, failure or damage caused by improper use or im proper or inadequate
maintenance and care. Tektronix shall not be obligated to furnish service under this warranty a) to repair dama ge
resulting from attempts by personnel other than Tektronix representatives to install, re pair or service the product;
b) to repair damage resulting from improper use or conne ction to incompatible equipment; c) to repair any
damage or malfunction caused by the use of non-Tektronix supplies; or d) to service a product that has been
modified or integrated with other products when the effect of such modification or integration increases the time
or difficulty of servicing the product.
THIS W ARRANTY IS GIVEN BY TEKTRONIX IN LIEU OF ANY OTHER WARRANTIES, EXPRESS
OR IMPLIED. TEKTRONIX AND ITS VENDORS DISCLAIM ANY IMPLIED WARRANTIES OF
MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. TEKTRONIX’
RESPONSIBILITY TO REPAIR OR REPLACE DEFECTIVE PRODUCTS IS THE SOLE AND
EXCLUSIVE REMEDY PROVIDED TO THE CUSTOMER FOR BREACH OF THIS WARRANTY.
TEKTRONIX AND ITS VENDORS WILL NOT BE LIABLE FOR ANY INDIRECT, SPECIAL,
INCIDENTAL, OR CONSEQUENTIAL DAMAGES IRRESPECTIVE OF WHETHER TEKTRONIX OR
THE VENDOR HAS ADVANCE NOTICE OF THE POSSIBILITY OF SUCH DAMAGES.
Table of Contents
Operating Basics
General Safety Summaryvii...................................
T able 3--1: Electrical and mechanical specifications3--1.............
T able 3--2: Environmental specifications3--2......................
P68XX Series Logic Analyzer Probes Instruction Manual
v
Table of Contents
vi
P68XX Series Logic Analyzer Probes Instruction Manual
General Safety Summary
Review the following safety precautions to avoid injury and prevent damage to
this product or any products connected to it. To avoid potential hazards, use this
product only as specified.
Only qualified personnel should perform service procedures.
While using this product, you may need to access other parts of the system. Read
the General Safety Summary in other system manuals for warnings and cautions
related to operating the system.
ToAvoidFireor
Personal Injury
Connect and Disconnect Properly. Connect the probe output to the measurement
instrument before connecting the probe to the circuit under test. Disconnect the
probe input and the probe ground from the circuit under test before disconnecting
the probe from the measurement instrument.
Observe All Terminal Ratings. To avoid fire or shock hazard, observe all ratings
and markings on the product. Consult the product manual for further ratings
information before making connections to the product.
Do not apply a potential to any terminal, including the common terminal, that
exceeds the maximum rating of that terminal.
Avoid Exposed Circuitry. Do not touch exposed connections and components
when power is present.
Do Not Operate With Suspected Failures. If you suspect there is damage to this
product, have it inspected by qualified service personnel.
Do Not Operate in Wet/Damp Conditions.
Do Not Operate in an Explosive Atmosphere.
Keep Product Surfaces Clean and Dry.
Provide Proper Ventilation. Refer to the manual’s instructions for details on
installing the product so it has proper ventilation.
P68XX Series Logic Analyzer Probes Instruction Manual
vii
General Safety Summary
Symbols and Terms
Terms in this Manual. These terms may appear in this manual:
WARNING. Warning statements identify conditions or practices that could result
in injury or loss of life.
CAUTION. Caution statements identify conditions or practices that could result in
damage to this product or other property.
Terms on the Product. These terms may appear on the product:
DANGER indicates an injury hazard immediately accessible as you read the
marking.
WARNING indicates an injury hazard not immediately accessible as you read the
marking.
CAUTION indicates a hazard to property including the product.
Symbols on the Product. The following symbols may appear on the product:
CAUTION
Refer to Manual
viii
P68XX Series Logic Analyzer Probes Instruction Manual
Preface
Related Documentation
This document provides information on using and servicing the P68xx series
logic analyzer probes.
In addition to these probe instructions, the following documentation is available
for your Tektronix 700 Series Logic Analyzers.
HThe Tektronix Logic Analyzer Family User Manual provides overall user
information for the TLA Series Logic Analyzer.
HThe TLA700 Series Logic Analyzer Installation Manual provides installation
information for the TLA700 Series Logic Analyzer.
HThe TLA5000 Series Logic Analyzer Installation Manual provides installa-
tion information for the TLA5000 Series Logic Analyzer.
HThe TLA7Axx Module Service Manual that provides module-level service
information for major components of the TLA Series Logic Analyzer.
HP6810 General Purpose Logic Analyzer Probe Label Instructions
HP6860 High Density Logic Analyzer Probe Label Instructions
HP6864 High Density 4X Logic Analyzer Probe Label Instructions
HP6880 High Density Differential Logic Analyzer Probe Label Instructions
HThe online help provides information about the user interface, the TLA700
Programmatic Interface (TPI), and the TLAScript interface. To view the
online help, select Help Topics from the Help menu. The TLAScript online
help provides links to related topics in TPI.
HThe online release notes provide last-minute product and software informa-
tion not included in this manual. To access the Probe Manual Release Notes,
HThe P6419 Logic Analyzer Probe Instructions provides instructions for using
P6419 Probes.
Refer to the following list of commonly used terms throughout the manual.
Compression Footprint
Differential Input
Amplitude Definition
A connectorless, solderless contact between your PCB and the P6860 and P6880
Probes. Connection is obtained by applying pressure between your PCB and the
probe through a Z-axis elastomer.
For differential signals, the magnitude of the difference voltage V
(and Vmin-V
V
V
Differential equivalent signal input (300 mV swing) as viewed by the logic analyzer and the
analog probe output**.
*
V
TH = OV
* Note: For differential inputs, the module threshold should be set to OV (assuming no
common mode error).
** Note: See online help for further analog output details.
max) must be greater than or equal to 150 mV. Refer to Figure i.
Differential input (150 mV minimum swing each side, --2.5 V maximum)
Vmax
V=V
OV Difference
Vmin
OV Difference
max-Vmin
1.15 V
1V
150 mV
OV
--150 mV
Figure i: Differential input amplitude
Functional Check
Procedure
Keepout Area
Functional check procedures verify the basic functionality of the probes by
confirming that the probes recognize signal activity at the probe tips.
The area of the printed circuit board in which only probe components may be
mounted.
x
P68XX Series Logic Analyzer Probes Instruction Manual
Preface
Module
Module End
PCB
Podlet
Podlet Holder
Probe
The unit that plugs into a mainframe which provides instrument capabilities such
as logic analysis.
The end of the probe which plugs into the module unit.
An acronym for Printed Circuit Board; also known as Etched Circuit Board
(ECB).
A circuit contained in a flex lead and attached to a probe which provides
square-pin connections to the circuit under test for one data acquisition channel
and a reference pin.
A removable clip that groups eight individual podlets into a single 8-wide P6810
Probeassembly.Thisprovideseasewhenconnectingtoarowof2x82.54mm
(0.100 in) square pins.
The device that connects a module with a target system.
Figure ii: Probe example
Probe Adapter
P68XX Series Logic Analyzer Probes Instruction Manual
A device that connects the LA module probe to a target system.
Module end
Way station
Probe head
xi
Preface
Probe Head
SMT KlipChip
Way Station
Z-axis eLastomer
The end of the probe (see Figure ii) that connects to the target system or probe
adapter.
An interface device for attaching logic analyzer probes to components with a
maximum lead diameter of 2.413 mm (0.095 in) and a stackable on lead centers
of 1.27 mm (0.050 in).
An intermediate probe part (see Figure ii) used to connect the heads of the P6810
and P6880 Probes to a single ribbon cable.
Silicone-based material containing vertical wires that conduct only in the z-axis.
xii
P68XX Series Logic Analyzer Probes Instruction Manual
Contacting Tektronix
Preface
Phone1-800-833-9200*
AddressTektronix, Inc.
Department or name (if known)
14200 SW Karl Braun Drive
P.O. Box 500
Beaverton, OR 97077
USA
Web sitewww.tektronix.com
Sales support1-800-833-9200, select option 1*
Service support1-800-833-9200, select option 2*
Technical supportEmail: techsupport@tektronix.com
1-800-833-9200, select option 3*
6:00 a.m. -- 5:00 p.m. Pacific time
*This phone number is toll free in North America. After office hours, please leave a
voice mail message.
Outside North America, contact a Tektronix sales office or distributor; see the
Tektronix web site for a list of offices.
P68XX Series Logic Analyzer Probes Instruction Manual
xiii
Preface
xiv
P68XX Series Logic Analyzer Probes Instruction Manual
Operating Basics
Operating Basics
Product Description
This section provides a brief description of the Tektronix P68xx Logic Analyzer
Probes and adapters, information on attaching color-coded probe labels, and
probe and adapter connection instructions from the logic analyzer to the target
system.
The P68xx Logic Analyzer Probes connect a TLA7Axx Series Logic Analyzer
module to a target system. The P6810, P6860 and P6880 probes consists of
34 channels, while the P6864 probe consists of 17 channels. You can connect the
P6810 probe to the target system through podlet holders or leadsets. In addition,
a variety of leadsets, SMT KlipChips and adapters aid in your connection to the
target system. The P6860 probe can be connected through the use of the
compression land pattern or a Mictor connector using the Mictor-on-PCB to
P6434 to Compression adapter. The P6880 probe is designed for connection to
the compression land pattern only configured for differential signals. The P6880
is not compatible with either the Mictor-on-PCB to P6860 probe adapter or the
Compression-on-PCB to P6434 probe adapter. The P6864 probe can be
connected through the use of the compression land pattern. Note that the P6864
is designed to minimize the needed area on the circuit board for connections
when using the 4X clocking mode in the logic analyzer module.
P68XX Series Logic Analyzer Probes Instruction Manual
1- 1
Operating Basics
P6810 General Purpose
Probe
The P6810 Probe is a 34-channel, general purpose probe (see Figure 1--1).
34 Channel probe to
TLA7Axx module
Ground lead
Way stations
1--Channel podlet
(clock/qual)
8--Channel podlet
group (data)
Figure 1- 1: P6810 General Purpose pr obe
NOTE. Remember to connect the ground lead of the way station to the target
system to improve signal integrity.
The following list details the capabilities and qualities of the P6810 Probe:
H34 individual active channel podlets
HDifferential and single-ended data, clock and qualification inputs
H2 mm (0.079 in) and 2.54 mm (0.1 in) podlet and leadset connection
capability
HMaximum non-destructive input voltage
HLeadset support for both single-ended and differential applications
HPodlet holder for 8-channel applications
HColor-coded signal connectors
H--2.5 V to +5 V input operating range
1- 2
P68XX Series Logic Analyzer Probes Instruction Manual
Operating Basics
H--2.0 V to +4.5 V threshold range
H300 mV minimum single-ended signal amplitude
H150 mV amplitude each side minimum differential signal
HMinimal loading of <1 pFand20kΩ to ground
HOperation in normal or inverted polarity is acceptable
HAny common mode voltage is acceptable so long as the maximum positive
voltage does not exceed +5 V and the maximum negative voltage does not
exceed --2.5 V
NOTE. Single podlet input capacitance is 0.7 pF, but in a group, each podlet will
have 1 pF input capacitance.
P6810 Leadset Adapters
and Accessories
Leadsets enhance flexible access to the target system signals by allowing
single-pin podlet connections of signals and grounds. This allows the separation
of ground and signal connections, providing flexible access to the PCB and
backplane connections where signals are not easily accessible together. The
following leadsets and accessories accompany the P6810 General Purpose Probe.
H1-Channel single-ended and differential leadset. Supports individual
leadset connections to backplanes and other connection points requiring
single-ended 2 mm (0.079 in) and 2.54 mm (0.1 in) connections. Both leads
contain 150 Ω damping resistors in the lead tips.
H8-Channel single-ended leadset. Supports individual leadset connections to
backplanes and other multiple, dense, single-end connections in a 2 mm
(0.079 in) and/or 2.54 mm (0.1 in) pin array. Two common ground connec-
tions for all input signals. The positive leads contain 150 Ω damping
resistors and the leadset housing contains a 150 Ω damping resistor in the
ground path of each channel.
H8-Channel differential leadset. Supports individual leadset connections to
backplanes and other multiple, dense, differential connections in a 2 mm
(0.079 in) and/or 2.54 mm (0.1 in) pin array. Individual + and -- leads for
each differential signal input. All leads contain 150 Ω damping resistors in
the lead tips.
HSMT KlipChip. An interface device for attaching logic analyzer probes to
components with a maximum lead diameter of 2.413 mm (0.095 in) and a
stackable on lead center of 1.27 mm (0.050 in).
P68XX Series Logic Analyzer Probes Instruction Manual
1- 3
Operating Basics
HPodlet holders. Removable clip that groups eight individual podlets into a
single 8-wide probe assembly. This provides ease when connecting to a row
of2x82.54mm(0.1in)squarepins.
1-Channel single-ended and
differential leadset
8-Channel single-ended
leadset
+ Signal
-- Signal
8-Channel differential leadset
SMT KlipChip
Figure 1- 2: P6810 probe leadset adapters and accessories
Podlet holder
1- 4
P68XX Series Logic Analyzer Probes Instruction Manual
Operating Basics
P6860 High-Density Probe
The P6860 Probe is a 34-channel, high-density probe (see Figure 1--3) consisting of two independent probe heads of 17 channel connectors each (16 data and
1 clock/qual).
34 Channel probe to
TLA7Axx module
17--Channel probe head
Elastomer holders (thick
gray or thin black)
Figure 1- 3: P6860 High-Density probe
The following list details the capabilities and qualities of the P6860 Probe:
HDifferential or single-ended clock and qualification inputs
HSingle-ended data inputs
HCompression contact eliminates need for built-in connector
HLand pattern supports direct signal pass-through
HSupports PCB thickness of 1.27 mm to 3.81 mm (0.050 in to 0.150 in)
HConsists of two independent probe heads of 17 channels each (16 data and
1 clock/qual)
HNarrow 17-channel probe head makes for easier placement and layout
H2X mode, (for example, 1:2 demultiplexing) uses single-probe head
H4X mode, (for example, 1:4 demultiplexing) uses one-half of the probe head
HSimilar channel density to current Mictor connectors
HColor-coded keyed signal connectors
P68XX Series Logic Analyzer Probes Instruction Manual
1- 5
Operating Basics
HAdapter supports Mictor-based connections
H--2.5 V to +5 V input operating range
H--2.0 V to +4.5 V threshold range
H300 mV minimum single-ended signal amplitude
H150 mV amplitude each side minimum differential signal
HMinimal loading of 0.7 pF @ 20 kΩ to ground loading
HOperation in normal or inverted polarity is acceptable (clock only)
HAny common mode voltage is acceptable so long as the maximum positive
voltage does not exceed +5 V and the maximum negative voltage does not
exceed --2.5 V (clock only)
P6864 High- Density 4X
Probe
The P6864 Probe is a 17-channel, high-density 4X probe (see Figure 1--4)
consisting of a single independent probe head containing 17 channel connectors
(16 data and 1 clock/qual) and two module connectors.
8 Channel probe to TLA74xx module
(one of the module end connectors
includes a clock channel)
17 Channel
probe head
1- 6
Elastomer holder (thick gray or thin black)
Figure 1- 4: P6864 High-Density 4X probe
P68XX Series Logic Analyzer Probes Instruction Manual
Operating Basics
The following list details the capabilities and qualities of the P6864 probe:
HDifferential or single-ended clock and qualification inputs
HSingle-ended data inputs
HCompression contact eliminates need for built-in connector
HLand pattern supports direct signal pass-through
HSupports PCB thickness of 1.27 mm to 3.81 mm (0.050 in to 0.150 in)
HConsists of one independent probe head containing 17 channels (16 data and
1 clock/qual)
HNarrow 17-channel probe head makes for increased placement and layout
density when using 4X mode, (for example, 1:4 demultiplexing)
HColor-coded keyed signal connectors
H--2.5 V to +5 V input operating range
H--2.0 V to +4.5 V threshold range
H300 mV minimum single-ended signal amplitude
H150 mV minimum each side of a differential signal amplitude
HMinimal loading of 0.7 pF @ 20 kΩ to ground loading
HOperation in normal or inverted polarity is acceptable (clock only)
HAny common mode voltage is acceptable so long as the maximum positive
voltage does not exceed +5 V and the maximum negative voltage does not
exceed --2.5 V (clock only)
P68XX Series Logic Analyzer Probes Instruction Manual
1- 7
Operating Basics
P6880 High-Density
Differential Probe
The P6880 Probe is a 34-channel, high-density differential probe
(see Figure 1--5) consisting of four independent probe heads of 8/9 channels
each.
The following list details the capabilities and qualities of the P6880 Probe:
HHigh-density probe mechanical packaging at half the channel density in the
probe head
HDifferential data, clock and qualification inputs (single-ended signals may be
probed if negative input is grounded)
HSame compression land pattern as High-Density Probe eliminates need for
built-in connector
HLand pattern supports direct signal pass-through
HSupports PCB thickness of 1.27 mm to 3.81 mm (0.050 in to 0.150 in)
HConsists of four probe heads supporting 8/9 channels each (nine with
clock/qual) for a total of 34 channels
H2X mode (1:2 demultiplexing) and 4X mode (1:4 demultiplexing), use two
and one probe head(s) respectively to minimize required board real estate
1- 8
P68XX Series Logic Analyzer Probes Instruction Manual
Operating Basics
HColor-coded keyed signal connectors
H--2.5 V to +5 V input operating range
H--2.0 V to +4.5 V threshold range
H300 mV minimum single-ended signal amplitude (5 V maximum)
H150 mV each side minimum differential signal amplitude (2.5 V maximum)
HMinimal loading of 0.7 pF @ 20 kΩ to ground loading
HOperation in normal or inverted polarity is acceptable
HAny common mode voltage is acceptable so long as the maximum positive
voltage does not exceed +5 V and the maximum negative voltage does not
exceed --2.5 V
NOTE. Refer to Figure 2--6 on page 2-27 for P6880 probe routing and pin out
information.
Mictor-on-PCB to P6860
Compression Adapter
The Mictor-on-PCB to P6860 Compression adapter (see Figure 1--6) allows
existing microprocessor support packages and your hardware designs with
embedded Mictor connectors to be connected to the P6860 High-Density Probe.
The CLK pin on the Mictor is connected to the CLK+ pin of the compression
footprint. The CLK-- pin of the compression footprint is tied to ground. This
allows the differential clock input of the P6860 probe to function as a
single-ended signal.
This adapter supports standard Mictor connector footprints and signal connections on older logic analyzer designs.
Differential qualification and clock signals are not supported through the
Mictor-on-PCB to Compression adapter due to Mictor footprint limitations (only
+ side of clock and qual signals are supported).
The Mictor adapter adds 2.7 pF to the high-density compression probe load of
0.7 pF for a combined adapter and probe capacitance load of 3.4 pF.
P68XX Series Logic Analyzer Probes Instruction Manual
1- 9
Operating Basics
Probe head
label
32.20 mm
(1.268 in)
J2
J1
Compression
adapter
Mictor adapter
Figure 1- 6: Mictor-on-PCB to P6860 Compression adapter
NOTE. The compression adapter is labeled with J1 and J2 signal identifiers to
assist you with correctly locating the probe heads on the compression adapter
(see Figure 1--6). Each probe-head label contains channel information that you
compare with information contained in the Signal-name column of the Table
2--13 on page 2--16 to determine the signal to which you connect the probe head.
See Figure 1--8 on page 1--12 for comparing the clearances between the P6434
and P68xx probes.
58.57 mm
(2.306 in)
20.17 mm
(.794 in)
12.83 mm
(.505 in)
Compression-on-PCB to
P6434 Mictor Adapter
1- 10
The Compression-on-PCB to P6434 Mictor adapter (see Figure 1--7) allows the
TLA5000, TLA6xx, and TLA7Lx/Mx/Nx/Px/Qx logic analyzers using a P6434
Probe to take advantage of the new compression footprint and eliminate the need
for Mictor connectors in your target system.
NOTE. To use the P6434 adapter, do not install press-in nuts. However, if board
thickness is > .093 in, you will need to install press-in nuts before migrating to
P68xx probes.
P68XX Series Logic Analyzer Probes Instruction Manual
Mictor
adapter
Operating Basics
Two different screw lengths are required to accommodate the
1.27 mm to 3.81 mm (0.050 in to 0.150 in) PCB thickness range.
This adapter requires the use of the Compression-on-PCB to P6434 Mictor
adapter land footprint. See Figure 2--8 on page 2--30 for further dimensional
information.
The Compression-on--PCB to Mictor adapter adds 1.5 pF to the P6434 probe
load of 2.0 pF for a combined adapter and probe capacitance load of 3.5 pF.
Elastomer
holder
Circuit board
Adapter
backing plate
32.131 mm
(1.265 in)
15.82 mm
(.623 in)
Figure 1- 7: 34-Channel Compression-on-PCB to P6434 Mictor adapter
To compare the clearance between the P6434 Probe connection and the P6434
Probe connection using the 34-Channel Compression-on-PCB to P6434 Mictor
adapter refer to Figure 1--8. Note that the difference in clearance between the
P6434 Probe connection and the P6434 Probe connection using the C ompression-on-PCB to P6434 Mictor adapter is 3.68 mm (0.145 in).
13.716 mm
(.540 in)
3.81 mm 1.27 mm (.150 in)
(.050 in) PCB Thickness
4.572 mm
(.180 in)
NOTE. In addition to the 34-Channel Compression-on-PCB to P6434 Mictor
adapter, Tektronix also offers a 17-Channel Compression to Mictor adapter. This
17-channel adapter is essentially identical to the 34-channel adapter except that
the posts that go through the circuit board are mounted such that it can connect
to a single 17-channel footprint instead of two 17-channel footprints in a
side-by-side configuration (see Figure 5--5 on page 5--7 in the Replaceable Parts
section of this manual for an illustration of both adapters.
P68XX Series Logic Analyzer Probes Instruction Manual
1- 11
Operating Basics
P6434
Mictor adapter
32.131 mm
(1.265 in)
15.82 mm
(.623 in)
3.68 mm
(.145 in)
13.716 mm
(.540 in)
34.93 mm
(1.375 in)
Figure 1- 8: Clearance for probe connection using Compression-on-PCB to P6434 Mictor adapter
Attaching Probe Labels
1- 12
When you purchase a TLA7Axx logic analyzer module, you receive the probes
with all labels already attached.
However, if you purchase additional probes for the logic analyzer module, you
will need to apply the color-coded labels. You will find a detailed description of
how to attach the labels in the following instructions:
HP6810 General Purpose Logic Analyzer Probe Label Instructions
HP6860 High Density Logic Analyzer Probe Label Instructions
HP6864 High Density 4X Logic Analyzer Probe Label Instructions
HP6880 High Density Differential Logic Analyzer Probe Label Instructions
P68XX Series Logic Analyzer Probes Instruction Manual
Connecting the Probes to the Logic Analyzer
Refer to Figure 1--9 and connect the probes to the logic analyzer according to the
following steps.
1. Identify the beveled edges of the connector inside the module end of the
probe.
2. Align the beveled edges of the connector to its mating connector on the logic
analyzer module and press into place.
3. Use care to evenly tighten both screws on the module end of the probe until
they are snug. First slightly tighten both screws, then snug each screw to
4 in-lbs (max).
NOTE. All P68xx series Logic Analyzer probes can be connected to the logic
analyzer when it is powered up. In addition, all P68xx series Logic Analyzer
probes connect to the logic analyzer in exactly the same manner.
Operating Basics
Probe
Figure 1- 9: Connecting the probes to the logic analyzer
Match
color--coded
labels
P68XX Series Logic Analyzer Probes Instruction Manual
1- 13
Operating Basics
Cleaning the P686x and P6880 Compression Footprints
CAUTION. To avoid electrical damage, always turn off the power of your target
system before cleaning the compression footprint.
Prior to connecting the probe to the target system, the compression footprints on
the your board must be properly cleaned. Clean the compression footprints
according to the following steps:
1. Use a lint-free cloth moistened with isopropyl alcohol and gently wipe the
footprint surface.
2. Remove any remaining lint using a nitrogen air gun.
NOTE. Use alcohol sparingly and be sure that you have removed any remaining
lint or residue with the nitrogen air gun.
Cleaning the P686x and P6880 Probe Heads
Before connecting the P686x and P6880 Probes to the target system, ensure that
the probe heads are free from dust, dirt, and contaminants. If necessary, clean the
probe heads according to the following steps.
CAUTION. Static discharge can damage semiconductor components in the probe
head. Always wear a grounded antistatic wrist strap whenever handling the
probe head. Also verify that anything to which the probe head is connected does
not carry a static charge.
NOTE. Never clean the elastomers. Always replace them instead. Refer to the
Replaceable Parts section of this manual for information on ordering parts.
1. Remove elastomer holder.
2. Moisten a cotton swab with isopropyl alcohol.
1- 14
P68XX Series Logic Analyzer Probes Instruction Manual
Operating Basics
Elastomer holder
Figure 1- 10: Cleaning the probe heads
3. Gently wipe the edge print pads of the hybrid.
4. Remove any remaining lint using a nitrogen air gun.
5. Put the elastomer holder back in place.
CAUTION. Be careful not to touch the elastomers to avoid damaging the probe
contacts. Also, do not reverse the elastomer as this will transfer contaminants.
Print pads
Storing the P686x and P6880 Probe Heads
To protect the elastomer, it is important to properly store the probe heads when
the probes are not in use. See Figure 1--11.
1. Locate the keying pin on the probe end and align it to the keying pin hole on
the nut bar.
2. While holding the probe end at a perpendicular angle to the nut bar, loosely
attach both probe head screws.
P68XX Series Logic Analyzer Probes Instruction Manual
1- 15
Operating Basics
Safely store the
probe head
Nut Bar
Nut Bar
Figure 1- 11: Storing the probe heads
Connecting the Probes to the Target System
Connecting the P6810
General Purpose Probe
Refer to Figure 1--12 and connect the probe to the target system by performing
the steps that follow. You can connect the probe heads to the target system
without turning off the power to the target system.
CAUTION. To avoid damaging the probe and target system, always position the
probe at a perpendicular angle to the mating connector and then connect the
probe. Incorrect handling of the probe while connecting it to the target system
can result in damage to the probe or to the mating connector in the target
system.
1. Connect the probe end to the square pins on the PCB.
2. If using the single-ended leadset, connect the negative input to ground on the
PCB.
or
If using the differential leadset, connect the positive side of the podlet to the
positive side of the signal on the PCB, and the negative side of the podlet to
the negative side of the signal.
1- 16
3. Connect the way station ground to ground on the PCB.
P68XX Series Logic Analyzer Probes Instruction Manual
Operating Basics
1
2
3
3
4
5
1 Connect 8 podlets in the podlet holder
directly to square pins on the PCB with
0.100 in pin spacing.
2 Connect 1 podlet directly to the square
pins on the PCB with 2 mm (0.079 in) or
2.54 mm (0.100 in) pin spacing.
3 Connect 1 podlet with 1 channel leadset to the square pin on the PCB with 2 mm (0.079 in) or 2.54 mm
(0.100 in) pin spacing. The negative lead (half--white/half--black housing that contains a damping resistor)
is connected to ground in a single--ended application lead or the minus in a differential application.
4 Connect 8 podlets in the podlet holder with an 8 channel differential leadset to the square pins on the
PCB with 2 mm (0.079 in) or 2.54 mm (0.100 in) pin spacing. The negative lead (half--white/half--black
housing that contains a damping resistor) is connected to the minus in a differential application.
5 Connect 8 podlets in the podlet holder with an 8 channel single--ended leadset to the square pins on the
PCB with 2 mm (0.079 in) or 2.54 mm (0.100 in) pin spacing. The negative lead (total black housing that
contains no damping resistor; however, the leadset housing contains a damping resistor in ground path
for each channel) is connected to ground in a single--ended application lead.
Figure 1- 12: Connecting the P6810 probe to the target system
P68XX Series Logic Analyzer Probes Instruction Manual
1- 17
Operating Basics
Connecting the P686x
High Density and P6880
Differential Probes
Connect the P686x High-Density and P6880 Differential Probes
(see Figure 1--14) to the target system. You can connect the probes to the target
system without turning off the power to the target system.
Installing the Correct Elastomer Holder. If the PCB is ≤ .093 in, use the thin
elastomer holder with the nut bar. If the PCB is > .093 in, use the thick elastomer
holder with the press-in nuts.
HNut Bar
1. Press the nut bar backing plate into the two holes on the underside of the
compression footprint on the PCB.
2. Locate the keying pin on the probe end and align it to the keying pin hole on
the PCB.
3. While holding the probe end at a perpendicular angle to the PCB, finger-
tighten (typically,1@2in-lbs) both probe head screws until snug, not to
exceed 1 in-lbs. You are encouraged to use a torque wrench to ensure proper
tightness to the probe-head screws.
CAUTION. When attaching the probe head to the target system, you must use care
to evenly tighten probe head screws until they are snug. First tighten both screws
until the nut bar makes contact with the board surface, then snug each screw to
1 in-lbs (max). Under tightening the probe head screws can result in intermittence. Over tightening can result in damage to the elastomer holder and stripped
screws.
1- 18
HPress-in Nuts
1. Install the press-in nuts on the PCB by following the Manufacturer’s
installation procedure. Refer to Figure 1--13 for press-in nut installation
details.
Keying pin hole
Press--in nuts thread
type (2--56 UNC-2B)
Circuit board
Min 2.362 mm
to Max 3.81 mm
(0.093 in to
0.150 in)
Figure 1- 13: Press-in Nuts installation
P68XX Series Logic Analyzer Probes Instruction Manual
Operating Basics
2. Locate the keying pin on the probe end and align it to the keying pin hole on
the PCB.
3. While holding the probe end at a perpendicular angle to the PCB, finger
tighten (typically,
1
@2in-lbs) both probe head screws until snug, not to
exceed 1 in-lbs. You are encouraged to use a torque wrench to ensure proper
tightness to the probe-head screws.
CAUTION. When attaching the probe head to the target system, you must use care
to evenly tighten probe head screws until they are snug. First slightly tighten
both screws, then snug each screw to 1 in-lbs (max). Under tightening the probe
head screws can result in intermittence. Over tightening can result in damage to
the elastomer holder and stripped screws.
P68XX Series Logic Analyzer Probes Instruction Manual
1- 19
Operating Basics
Note that elastomer
holder is keyed
Thin black,
(no rib)
Keying pin
Keying pin hole
Press--in nuts
Thick gray,
(rib)
White thin line
is keying pin
Keying pin
Nut Bar
Probe head
label
Compression
adapter
J2
J1
Mictor--on--PCB
(Not applicable
to P6864 probe)
1- 20
Figure 1- 14: Connecting the P686x and P6880 probes to the target system
NOTE. The compression adapter is labeled with J1 and J2 signal identifiers to
assist you with correctly locating the probe heads on the compression adapter
(see Figure 1--6). Each probe-head label contains channel information that you
compare with information contained in the Signal-name column of the Table
2--13 on page 2--16 to determine the signal to which you connect the probe head.
P68XX Series Logic Analyzer Probes Instruction Manual
Operating Basics
Connecting the
Mictor-on-PCB to P6860
Compression Adapter
(Applies to P6860 Probe
Only)
The Mictor-on-PCB to P6860 Compression adapter (see Figure 1--6 on
page 1--10) allows existing applications of older logic analyzer modules and
probes to connect to the compression footprint. You can connect the adapter to
the target system without turning off the target system. Connect the adapter
according to the following steps.
NOTE. Be sure to use the thin elastomer holder. A thin elastomer is black and
does not have the protruding rib (see Figure 1--14).
1. While holding the first probe end at a perpendicular angle to the adapter,
place the probe end into the adapter and finger-tighten the screws until snug,
not to exceed 1 in.-lbs.
2. Connect the second probe end to the adapter in the same manner.
3. Press the connected probe ends and adapter into the existing Mictor
connector on the PCB.
This adapter supports standard Mictor connector footprints and signal connections on older logic analyzer designs.
The differential qualification and clock signals are not supported through the
Mictor-on-PCB to P6860 Compression adapter due to the Mictor footprint
limitations (only + side of clock and qual signals are supported).
Connecting the
Compression-on-PCB to
P6434 Mictor Adapter
The Mictor adapter adds 2.7 pF to the High-Density Compression probe load of
0.7 pF for a combined adapter and probe capacitance load of 3.4 pF.
The Compression-on-PCB to P6434 Mictor adapter (see Figure 1--7 on
page 1--11) allows you to connect the compression footprint to the Mictor
connector pins used by the P6434 Probe. You can connect the adapter to the
target system without turning off the target system. Connect the adapter
according to the following steps.
NOTE. To use this adapter do not install press-in nuts. However if board
thickness is >.093 in, you will need to install press-in nuts before migrating to
P68xx probes.
P68XX Series Logic Analyzer Probes Instruction Manual
1- 21
Operating Basics
1. Place the adapter at a perpendicular angle on top of the compression
footprint.
2. Place the backing plate on the underside of the PCB.
3. Connect the backing plate by sliding the two screws into the existing screw
1
holes from the underside of the PCB and finger-tighten (typically,
@2in-lbs)
the screws until snug, not to exceed 1 in-lbs. You are encouraged to use a
torque wrench to ensure proper tightness to the probe head screws.
CAUTION. When attaching the probe head to the target system, you must use care
to evenly tighten probe head screws until they are snug. First slightly tighten
both screws, then snug each screw to 1 in-lbs (max). Under tightening the probe
head screws can result in intermittence. Over tightening can result in damage to
the elastomer holder and stripped screws.
4. Plug the P6434 Probe into the adapter.
Screws of two different lengths are provided to attach the adapter to your PCB.
The length of screw you need depends on the thickness of the PCB (0.050 in to
0.150 in).
This adapter requires use of the Compression-on-PCB to P6434 Mictor adapter
land footprint. For further dimensional information refer to the Compression-onPCB to P6434 Mictor adapter land footprint (see Figure 2--8 on page 2--30).
1- 22
P68XX Series Logic Analyzer Probes Instruction Manual
Reference
Reference
This section provides reference information and specifications for the P6810
General Purpose, P6860 High-Density, P 6864 High-Density 4X, and P6880
High-Density Differential Probes. Topics include the following.
HDesigning an interface between the probe and a target system
HSpecifications
Designing an Interface Between the P68xx Probes and a Target System
Once you have determined which probe is required, use the following information to design the appropriate connector into your target system board. The
following topics are in this section:
HSignal fixturing considerations
HSignal connections (signal names and land footprints)
HMechanical considerations
Signal Fixturing
Considerations
HElectrical considerations
This section contains the following information to consider for signal fixturing:
HClocks and qualifiers
HMerged modules and source synchronous clocking
HDemultiplexing multiplexed busses
H2X and 4X high resolution timing modes (Internal 2X and 4X)
HProbing analog signals
HRange recognition
Clocks and Qualifiers. Every logic analyzer has some special purpose input
channels. Inputs designated as clocks can cause the analyzer to store data.
Qualifier channels can be logically AND’ed and OR’ed with clocks to further
define when the analyzer should latch data from the system under test. R outing
the appropriate signals from our design to these inputs ensures that the logic
analyzer can acquire data correctly. Unused clocks can be used as qualifier
signals.
P68XX Series Logic Analyzer Probes Instruction Manual
2- 1
Reference
TLA7Axx
Depending on the channel width, each TLA7Axx Series logic analyzer module
will have different set of clock and qualifier channels. Table 2--1 shows the clock
and qualifier channels available for each module.
Table 2- 1: Logic analyzer clock and qualifier availability
Clock InputsQualifier Inputs
Module
TLA7AA1nn
TLA7AA2nnnn
TLA7AA3nnnnnn
TLA7AA4nnnnnnnn
TLA7AB2nnnn
TLA7AB4nnnnnnnn
CLK:0
CLK:1CLK:2CLK:3QUAL:0QUAL:1QUAL:2QUAL:3
All clock and qualifier channels are stored. The analyzer always stores the logic
state of these channels every time it latches data.
Since clock and qualifier channels are stored in the analyzer memory there is no
need to double probe these signals for timing analysis. When switching from
state to timing analysis modes all of the clock and qualifier signals will be
visible. This also allows you to route regular signals, those not needed for
clocking, to these channels when they are not being used for their special
purpose.
It is a good practice to take advantage of these channels to increase your options
for when you will latch data. Routing several of your design’s clocks and strobes
to the analyzer clock inputs will provide you with a greater flexibility in the
logic analyzer clocking setup menus.
As an example, look at a microprocessor with a master clock, data strobe, and an
address strobe. Routing all three of these signals to analyzer clock inputs will
enable you to latch data on the processor master clock, only when data is
strobed, or only when address is strobed. Some forethought in signal routing can
greatly expand the ways in which you can latch and analyze data.
A microprocessor also provides a good example of signals that can be useful as
qualifiers. There are often signals that indicate data reads versus data writes
(R/W), signals that show when alternate bus masters have control of the
processor busses (DMA), and signals that show when various memory devices
are being used (ChipSel). All of these signals are good candidates for assignment
to qualifier channels.
By logically AND’ing the clock with one of these qualifiers you can program the
analyzer to store only data reads or data writes. Using the DMA signal as a
2- 2
P68XX Series Logic Analyzer Probes Instruction Manual
Reference
qualifier provides a means of filtering out alternate bus master cycles. Chip
selects can limit data latching to specific memory banks, I/O ports, or peripheral
devices.
Merged Module Sets and Source Synchronous Clocking. TLA7Axx analyzer
modules that are 102 channels or 136 channels wide can be merged together to
act as a single logic analyzer with a larger channel count. Up to five modules can
be merged to provide up to a 680 channel analyzer. A unique feature of the
TLA7Axx module is that it supports source synchronous clocking. Combining
these two capabilities provide some additional considerations for signal routing.
Source synchronous clocking is a method which manages the skew between the
system clock and the data bus by requiring the sending device to drive an actual
clock or strobe signal along with the data that is very tightly coupled with it in
terms of skew. The receiving device then uses this strobe to capture the data.
A variant of this scheme is being applied to large microprocessor busses, where
the bus is split into smaller, more easily managed groups that each have their
own dedicated strobe. Although the timing relationship between a particular
clock and its associated data group is very tight, the timing between the different
groups can vary greatly and changes depending on which device has control of
the bus.
Many source synchronous designs use wide busses. It is not uncommon to
require a set of merged logic analyzer modules to provide the channel count
needed in probing larger source synchronous systems. While all of the modules
in a merged set can use their clock inputs independently if needed, it must be
remembered that there are a maximum of four clock inputs on a 136 channel
wide module.
To see the importance of this reminder we will once again use a microprocessor
system as an example. Tektronix logic analyzer processor has a 32 bit address
bus and a 64 bit data bus. The data bus is split into four 16 bit subgroups that
have independent source synchronous clocks. For the logic analyzer to correctly
acquire data from this system it will need five clock inputs, one for the address
bus and one each for the four 16 bit data bus subgroups.
To acquire both busses the analyzer would need at least 96 channels (32 address
and 64 data). However, a single 102 channel card doesn’t have the required five
clock inputs. By merging two 102 channel modules into a set you can obtain the
needed number of clock inputs. Route the address bus to one module in the set
and route the data bus, along with its four source synchronous clocks, to the
second module in the set.
Demultiplexing Multiplexed Busses. TLA7Axx module supports both 2X and 4X
demultiplexing. Each signal on a dual or quad multiplexed bus can be demultiplexed into its own logic analyzer channel. See Tables 2--2 and 2--3 to determine
P68XX Series Logic Analyzer Probes Instruction Manual
2- 3
Reference
which channel groups to connect to feed channels in the target system the test
data.
Destination channels receiving target system test data
TLA7AA4TLA7AA3TLA7AA2TLA7AA1TLA7AB4TLA7AB2
C1:7--0
C0:7--0
D1:7--0
D0:7--0
D3:7--0
D2:7--0
E1:7--0
E0:7--0
QUAL:3
QUAL:2
QUAL:1
QUAL:0
C2:7--0
C1:7--0
C0:7--0
A0:7--0
D1:7--0
D0:7--0
A2:7--0
D3:7--0
D2:7--0
CLK:0
QUAL:1
QUAL:0
A3:7--0
A2:7--0
C2:7--0
A0:7--0
D1:7--0
D0:7--0
A3:7--0
A2:7--0
C2:7--0
C2:7--0
C1:7--0
C0:7--0
A0:7--0
D1:7--0
D0:7--0
A2:7--0
D3:7--0
D2:7--0
E2:7--0
E1:7--0
E0:7--0
CLK:2
QUAL:3
QUAL:2
CLK:0
QUAL:1
QUAL:0
A3:7--0
A2:7--0
C2:7--0
A0:7--0
D1:7--0
D0:7--0
When demultiplexing data there is no need to connect the destination channels to
the multiplexed bus. Data from the source channels are routed to the destination
channels internal to the logic analyzer. Tables 2--2 and 2--3 show the mapping of
source channels to destination channels.
Demultiplexing affects only the main memory for the destination channels. This
means that the MagniVu memory is filled with data from whatever is connected
to the demultiplexing destination channel probe inputs. This provides an
opportunity to acquire high resolution MagniVu data on a few extra channels.
Connecting the demultiplexing destination channels to other signals will allow
viewing of their activity in the MagniVu memory but not the main memory.
2X and 4X High Resolution Timing Modes. 2X high resolution timing mode
provides double the normal 500 MHz sample rate on one half of the channels.
By trading half of the analyzers channels the remaining channels can be sampled
at a 1 GHz rate with double the memory depth. 4X high resolution timing mode
provides quadruple the normal 500 MHz sample rate on one fourth of the
channels. By trading three-fourths of the analyzers channels the remaining
channels can be sampled at a 2 GHz rate with quadruple the memory depth.
P68XX Series Logic Analyzer Probes Instruction Manual
2- 5
Reference
Both of the high resolution timing modes use the same demultiplexing channel
routingasshowninTables2--2and2--3.Bytakingcaretoassigncriticalsignals
to the demultiplexing source channels you can obtain extra timing resolution
where most needed. Since demultiplexing affects only the main memory you will
still have the MagniVu data available for all of the signals that are disconnected
from the main memory when you switch to the high resolution timing modes.
Probing Analog Signals. TLA7Axx module provides visibility of analog signals
with iView. iView routes the actual signal seen by each channel’s probe through
a high bandwidth path to an analog multiplexer inside of the logic analyzer
module. From the logic analyzer interface you can route any input channel to one
of four output connectors on the module. By connecting the analyzer iView
analog probe outputs to your oscilloscope you can see the analog characteristics
of any signal probed by the logic analyzer.
Sometimes there are analog signals that would be convenient to have fixtured for
easier probing. Signals such as A/D Converter inputs, D/A C onverter outputs,
low voltage power supplies, termination voltages, and oscillator outputs are just
a few examples. Routing these signals to unused logic analyzer inputs provides a
quick method of viewing their activity without ever picking up a scope probe.
Signal Names
Care must be taken to ensure that such signals are voltage limited and will not
exceed the maximum nondestructive input voltage for the logic analyzer probes
of ±15 Vpeak.
Range Recognition. When using range recognizers, the probe groups and probe
channels must be in hardware order. Probe groups must be used from the
most-significant probe group to the least-significant probe group based on the
following order:
Probe channels must be from the most-significant channel to the least-significant
channel based on the following order:
76543210
The above examples assumes a 136-channel LA module. The missing channels
in LA modules with fewer than 136 channels are ignored. With merged modules,
range recognition extends across the first three modules: the master module
contains the most-significant channels.
See Tables 2--4 through 2--14 for the P6810, P6860, P6864, and P6880 Probes
and adapters signal connections. Match the alpha character that precedes the
channel identifier (for example, E3:7) to the probe head label. This will simplify
probe connections to the logic analyzer when you use the following tables.
2- 6
P68XX Series Logic Analyzer Probes Instruction Manual
Table 2- 4: P6810 Probe signal connections on 136 and 102 channel modules for probe #4 and probe #3
136 channel module
102 channel module
Land PatternProbe #4Probe #3
Reference
Signal
name
Clk/QualClk/QualQ3--Q2--CK0--Q0--
Clk/Qual+Clk/QualQ3+Q2+CK0+Q0+
Data 7--7E3:7--E2:7--E1:7--E0:7--A3:7--A2:7--D3:7--D2:7--
Data 7+7E3:7+E2:7+E1:7+E0:7+A3:7+A2:7+D3:7+D2:7+
Data 6--6E3:6--E2:6--E1:6--E0:6--A3:6--A2:6--D3:6--D2:6--
Data 6+6E3:6+E2:6+E1:6+E0:6+A3:6+A2:6+D3:6+D2:6+
Data 5--5E3:5--E2:5--E1:5--E0:5--A3:5--A2:5--D3:5--D2:5--
Data 5+5E3:5+E2:5+E1:5+E0:5+A3:5+A2:5+D3:5+D2:5+
Data 4--4E3:4--E2:4--E1:4--E0:4--A3:4--A2:4--D3:4--D2:4--
Data 4+4E3:4+E2:4+E1:4+E0:4+A3:4+A2:4+D3:4+D2:4+
Data 3--3E3:3--E2:3--E1:3--E0:3--A3:3--A2:3--D3:3--D2:3--
Data 3+3E3:3+E2:3+E1:3+E0:3+A3:3+A2:3+D3:3+D2:3+
Data 2--2E3:2--E2:2--E1:2--E0:2--A3:2--A2:2--D3:2--D2:2--
Data 2+2E3:2+E2:2+E1:2+E0:2+A3:2+A2:2+D3:2+D2:2+
Data 1--1E3:1--E2:1--E1:1--E0:1--A3:1--A2:1--D3:1--D2:1--
Data 1+1E3:1+E2:1+E1:1+E0:1+A3:1+A2:1+D3:1+D2:1+
Data 0--0E3:0--E2:0--E1:0--E0:0--A3:0--A2:0--D3:0--D2:0--
Data 0+0E3:0+E2:0+E1:0+E0:0+A3:0+A2:0+D3:0+D2:0+
Refer to Table 2- 2 on page 2- 4 and Table 2- 3 on page 2- 5 for 2X and 4X demultiplexing channel assignments.
PodletWay
Station
Way
Station
Way
Station
Way
Station
Way
Station
Way
Station
Way
Station
Way
Station
Any differential input, either the differential clock/qualifiers on the P686x High-density Probe, or all differential data and
clock/qualifiers on the P6810 General Purpose Differential Probe and P6880 High-density Differential Probe, may have
their negative input pin grounded and be used as a single-ended input.
P68XX Series Logic Analyzer Probes Instruction Manual
2- 7
Reference
Table 2- 5: P6810 Probe signal connections on 102 and 136 channel modules for probe #2 and probe #1
Land PatternProbe #2Probe #1
Signal
name
Clk/Qual--Clk/Qual--CK1--CK2--CK3--Q1--
Clk/Qual+Clk/Qual+CK1+CK2+CK3+Q1+
Data 7--7A1:7--A0:7--D1:7--D0:7--C3:7--C2:7--C1:7--C0:7--
Data 7+7A1:7+A0:7+D1:7+D0:7+C3:7+C2:7+C1:7+C0:7+
Data 6--6A1:6--A0:6--D1:6--D0:6--C3:6--C2:6--C1:6--C0:6--
Data 6+6A1:6+A0:6+D1:6+D0:6+C3:6+C2:6+C1:6+C0:6+
Data 5--5A1:5--A0:5--D1:5--D0:5--C3:5--C2:5--C1:5--C0:5--
Data 5+5A1:5+A0:5+D1:5+D0:5+C3:5+C2:5+C1:5+C0:5+
Data 4--4A1:4--A0:4--D1:4--D0:4--C3:4--C2:4--C1:4--C0:4--
Data 4+4A1:4+A0:4+D1:4+D0:4+C3:4+C2:4+C1:4+C0:4+
Data 2+2A1:2+A0:2+D1:2+D0:2+C3:2+C2:2+C1:2+C0:2+
Data 3--3A1:3--A0:3--D1:3--D0:3--C3:3--C2:3--C1:3--C0:3--
Data 3+3A1:3+A0:3+D1:3+D0:3+C3:3+C2:3+C1:3+C0:3+
Data 2--2A1:2--A0:2--D1:2--D0:2--C3:2--C2:2--C1:2--C0:2--
Data 1--1A1:1--A0:1--D1:1--D0:1--C3:1--C2:1--C1:1--C0:1--
Data 1+1A1:1+A0:1+D1:1+D0:1+C3:1+C2:1+C1:1+C0:1+
Data 0--0A1:0--A0:0--D1:0--D0:0--C3:0--C2:0--C1:0--C0:0--
Data 0+0A1:0+A0:0+D1:0+D0:0+C3:0+C2:0+C1:0+C0:0+
Refer to Table 2- 2 on page 2- 4 and Table 2- 3 on page 2- 5 for 2X and 4X demultiplexing channel assignments.
PodletWay
Station
Way
Station
Way
Station
Way
Station
Way
Station
Way
Station
Way
Station
Way
Station
Any differential input, either the differential clock/qualifiers on the P686x High-density Probe, or all differential data and
clock/qualifiers on the P6810 General Purpose Differential Probe and P6880 High-density Differential Probe, may have
their negative input pin grounded and be used as a single-ended input.
2- 8
P68XX Series Logic Analyzer Probes Instruction Manual
Table 2- 6: P6810 Probe signal connections on 68 and 34 channel modules
68 channel module
34 channel module
Land PatternProbe #2Probe #1
Reference
Signal
name
Clk/QualClk/QualCK1--CK2--CK3--CK0--
Clk/Qual+Clk/QualCK1+CK2+CK3+CK0+
Data 7--7A1:7--A0:7--D1:7--D0:7--C3:7--C2:7--A3:7--A2:7--
Data 7+7A1:7+A0:7+D1:7+D0:7+C3:7+C2:7+A3:7+A2:7+
Data 6--6A1:6--A0:6--D1:6--D0:6--C3:6--C2:6--A3:6--A2:6--
Data 6+6A1:6+A0:6+D1:6+D0:6+C3:6+C2:6+A3:6+A2:6+
Data 5--5A1:5--A0:5--D1:5--D0:5--C3:5--C2:5--A3:5--A2:5--
Data 5+5A1:5+A0:5+D1:5+D0:5+C3:5+C2:5+A3:5+A2:5+
Data 4--4A1:4--A0:4--D1:4--D0:4--C3:4--C2:4--A3:4--A2:4--
Data 4+4A1:4+A0:4+D1:4+D0:4+C3:4+C2:4+A3:4+A2:4+
Data 3--3A1:3--A0:3--D1:3--D0:3--C3:3--C2:3--A3:3--A2:3--
Data 3+3A1:3+A0:3+D1:3+D0:3+C3:3+C2:3+A3:3+A2:3+
Data 2--2A1:2--A0:2--D1:2--D0:2--C3:2--C2:2--A3:2--A2:2--
Data 2+2A1:2+A0:2+D1:2+D0:2+C3:2+C2:2+A3:2+A2:2+
Data 1--1A1:1--A0:1--D1:1--D0:1--C3:1--C2:1--A3:1--A2:1--
Data 1+1A1:1+A0:1+D1:1+D0:1+C3:1+C2:1+A3:1+A2:1+
Data 0--0A1:0--A0:0--D1:0--D0:0--C3:0--C2:0--A3:0--A2:0--
Data 0+0A1:0+A0:0+D1:0+D0:0+C3:0+C2:0+A3:0+A2:0+
Refer to Table 2- 2 on page 2- 4 and Table 2- 3 on page 2- 5 for 2X and 4X demultiplexing channel assignments.
PodletWay
Station
Way
Station
Way
Station
Way
Station
Way
Station
Way
Station
Way
Station
Way
Station
Any differential input, either the differential clock/qualifiers on the P686x High-density Probe, or all differential data and
clock/qualifiers on the P6810 General Purpose Differential Probe and P6880 High-density Differential Probe, may have
their negative input pin grounded and be used as a single-ended input.
P68XX Series Logic Analyzer Probes Instruction Manual
2- 9
Reference
Table 2- 7: P6860 High-Density Probe channel mapping on 136 and 102 channel modules
136 channel module
102 channel module
Land PatternProbe #4Probe #3Probe #2Probe #1
Signal
name
Clk/Qual--A15Q3--Q2--CK0--Q0--CK1--CK2--CK3--Q1--
GNDA14GNDGNDGNDGNDGNDGNDGNDGND
Clk/Qual+A13Q3+Q2+CK0+Q0+CK1+CK2+CK3+Q1+
Data 15B12E3:7E1:7A3:7D3:7A1:7D1:7C3:7C1:7
GNDB11GNDGNDGNDGNDGNDGNDGNDGND
Data 14B10E3:6E1:6A3:6D3:6A1:6D1:6C3:6C1:6
Data 13A12E3:5E1:5A3:5D3:5A1:5D1:5C3:5C1:5
GNDA11GNDGNDGNDGNDGNDGNDGNDGND
Data 12A10E3:4E1:4A3:4D3:4A1:4D1:4C3:4C1:4
Data 11B9E3:3E1:3A3:3D3:3A1:3D1:3C3:3C1:3
GNDB8GNDGNDGNDGNDGNDGNDGNDGND
Data 10B7E3:2E1:2A3:2D3:2A1:2D1:2C3:2C1:2
Data 9A9E3:1E1:1A3:1D3:1A1:1D1:1C3:1C1:1
GNDA8GNDGNDGNDGNDGNDGNDGNDGND
Data 8A7E3:0E1:0A3:0D3:0A1:0D1:0C3:0C1:0
Data 7B6E2:7E0:7A2:7D2:7A0:7D0:7C2:7C0:7
GNDB5GNDGNDGNDGNDGNDGNDGNDGND
Data 6B4E2:6E0:6A2:6D2:6A0:6D0:6C2:6C0:6
Data 5A6E2:5E0:5A2:5D2:5A0:5D0:5C2:5C0:5
GNDA5GNDGNDGNDGNDGNDGNDGNDGND
Data 4A4E2:4E0:4A2:4D2:4A0:4D0:4C2:4C0:4
Data 3B3E2:3E0:3A2:3D2:3A0:3D0:3C2:3C0:3
GNDB2GNDGNDGNDGNDGNDGNDGNDGND
Data 2B1E2:2E0:2A2:2D2:2A0:2D0:2C2:2C0:2
Data 1A3E2:1E0:1A2:1D2:1A0:1D0:1C2:1C0:1
GNDA2GNDGNDGNDGNDGNDGNDGNDGND
Data 0A1E2:0E0:0A2:0D2:0A0:0D0:0C2:0C0:0
Refer to Table 2- 2 on page 2- 4 and Table 2- 3 on page 2- 5 for 2X and 4X demultiplexing channel assignments.
Pad
name
Probe
head
Probe
head
Probe
head
Probe
head
Probe
head
Probe
head
Probe
head
Probe
head
Any differential input, either the differential clock/qualifiers on the P686x High-density Probe, or all differential data and
clock/qualifiers on the P6810 General Purpose Differential Probe and P6880 High-density Differential Probe, may have
their negative input pin grounded and be used as a single-ended input.
2- 10
P68XX Series Logic Analyzer Probes Instruction Manual
Table 2- 8: P6860 High-Density Probe channel mapping on 68 and 34 channel modules
68 channel module
34 channel module
Land PatternProbe #2Probe #1
Signal namePad nameProbe headProbe headProbe headProbe head
Clk/Qual--A15CK1--CK2--CK3--CK0--
GNDA14GNDGNDGNDGND
Clk/Qual+A13CK1CK2CK3CK0
Data 15B12A1:7D1:7C3:7A3:7
GNDB11GNDGNDGNDGND
Data 14B10A1:6D1:6C3:6A3:6
Data 13A12A1:5D1:5C3:5A3:5
GNDA11GNDGNDGNDGND
Data 12A10A1:4D1:4C3:4A3:4
Data 11B9A1:3D1:3C3:3A3:3
GNDB8GNDGNDGNDGND
Data 10B7A1:2D1:2C3:2A3:2
Data 9A9A1: 1D1:1C3:1A3:1
GNDA8GNDGNDGNDGND
Data 8A7A1: 0D1:0C3:0A3:0
Data 7B6A0: 7D0:7C2:7A2:7
GNDB5GNDGNDGNDGND
Data 6B4A0: 6D0:6C2:6A2:6
Data 5A6A0: 5D0:5C2:5A2:5
GNDA5GNDGNDGNDGND
Data 4A4A0: 4D0:4C2:4A2:4
Data 3B3A0: 3D0:3C2:3A2:3
GNDB2GNDGNDGNDGND
Data 2B1A0: 2D0:2C2:2A2:2
Data 1A3A0: 1D0:1C2:1A2:1
GNDA2GNDGNDGNDGND
Data 0A1A0: 0D0:0C2:0A2:0
Refer to Table 2- 2 on page 2- 4 and Table 2- 3 on page 2- 5 for 2X and 4X demultiplexing channel assignments.
Reference
Any differential input, either the differential clock/qualifiers on the P686x High-density Probe, or all differential data and
clock/qualifiers on the P6810 General Purpose Differential Probe and P6880 High-density Differential Probe, may have
their negative input pin grounded and be used as a single-ended input.
P68XX Series Logic Analyzer Probes Instruction Manual
2- 11
Reference
Table 2- 9: P6864 High-Density 4X Probe channel mapping on 34, 68, 102 and 136 channel modules
Land Pattern34 and 68 channel
module probe labeling
Signal namePad nameProbeProbe 1Probe 2
Clk/Qual --A15CK3--CK3--CK1--
GndA14GNDGNDGND
Clk/Qual +A13CK3+CK3+CK1+
D15B12A1--0*E3--0**A3--0
GndB11GNDGNDGND
D14B10A1--1*E3--1**A3--1
D13A12C3--7C3--7A1--7
GndA11GNDGNDGND
D12A10C3--6C3--6A1--6
D11B9A1--2*E3--2**A3--2
GndB8GNDGNDGND
D10B7A1--3*E3--3**A3--3
D9A9C3--5C3--5A1--5
GndA8GNDGNDGND
D8A7C3--4C3--4A1--4
D7B6A1--4*E3--4**A3--4
GndB5GNDGNDGND
D6B4A1--5*E3--5**A3--5
D5A6C3--3C3--3A1--3
GndA5GNDGNDGND
D4A4C3--2C3--2A1--2
D3B3A1--6*E3--6**A3--6
GndB2GNDGNDGND
D2B1A1--7*E3--7**A3--7
D1A3C3--1C3--1A1--1
GndA2GNDGNDGND
D0A1C3--0C3--0A1--0
102 and 136 channel module probe labeling
*Unavailable with a 34 channel module
**
Unavailable with a 102 channel module
The P6864 probe is usable in 4X demultiplex mode only
2- 12
P68XX Series Logic Analyzer Probes Instruction Manual
Reference
Table 2- 10: P6880 High-Density Differential Probe channel mapping on 136 and 102 channel modules for probe #4
and probe #3
136 channel module
102 channel module
Land PatternProbe #4Probe #3
Signal
name
Clk/Qual-A15Q3-Q2-CK0-Q0-
GNDA14GNDGNDGNDGNDGNDGNDGNDGND
Clk/Qual+A13Q3+Q2+CK0+Q0+
Data 7+B12E3:7+E2:7+E1:7+E0:7+A3:7+A2:7+D3:7+D2:7+
GNDB11GNDGNDGNDGNDGNDGNDGNDGND
Data 7--B10E3:7--E2:7--E1:7--E0:7--A3:7--A2:7--D3:7--D2:7--
Data 6--A12E3:6--E2:6--E1:6--E0:6--A3:6--A2:6--D3:6--D2:6--
GNDA11GNDGNDGNDGNDGNDGNDGNDGND
Data 6+A10E3:6+E2:6+E1:6+E0:6+A3:6+A2:6+D3:6+D2:6+
Data 5+B9E3:5+E2:5+E1:5+E0:5+A3:5+A2:5+D3:5+D2:5+
GNDB8GNDGNDGNDGNDGNDGNDGNDGND
Data 5--B7E3:5--E2:5--E1:5--E0:5--A3:5--A2:5--D3:5--D2:5--
Data 4--A9E3:4--E2:4--E1:4--E0:4--A3:4--A2:4--D3:4--D2:4--
GNDA8GNDGNDGNDGNDGNDGNDGNDGND
Data 4+A7E3:4+E2:4+E1:4+E0:4+A3:4+A2:4+D3:4+D2:4+
Data 3+B6E3:3+E2:3+E1:3+E0:3+A3:3+A2:3+D3:3+D2:3+
GNDB5GNDGNDGNDGNDGNDGNDGNDGND
Data 3--B4E3:3--E2:3--E1:3--E0:3--A3:3--A2:3--D3:3--D2:3--
Data 2--A6E3:2--E2:2--E1:2--E0:2--A3:2--A2:2--D3:2--D2:2--
GNDA5GNDGNDGNDGNDGNDGNDGNDGND
Data 2+A4E3:2+E2:2+E1:2+E0:2+A3:2+A2:2+D3:2+D2:2+
Data 1+B3E3:1+E2:1+E1:1+E0:1+A3:1+A2:1+D3:1+D2:1+
GNDB2GNDGNDGNDGNDGNDGNDGNDGND
Data 1--B1E3:1--E2:1--E1:1--E0:1--A3:1--A2:1--D3:1--D2:1--
Data 0--A3E3:0--E2:0--E1:0--E0:0--A3:0--A2:0--D3:0--D2:0--
GNDA2GNDGNDGNDGNDGNDGNDGNDGND
Data 0+A1E3:0+E2:0+E1:0+E0:0+A3:0+A2:0+D3:0+D2:0+
Refer to Table 2- 2 on page 2- 4 and Table 2- 3 on page 2- 5 for 2X and 4X demultiplexing channel assignments.
Pad
name
Probe
head
Probe
head
Probe
head
Probe
head
Probe
head
Probe
head
Probe
head
Probe
head
Any differential input, either the differential clock/qualifiers on the P686x High-density Probe, or all differential data and
clock/qualifiers on the P6810 General Purpose Differential Probe and P6880 High-density Differential Probe, may have
their negative input pin grounded and be used as a single-ended input.
P68XX Series Logic Analyzer Probes Instruction Manual
2- 13
Reference
Table 2- 11: P6880 High-Density Differential Probe channel mapping on 136 and 102 channel modules for probe #2
and probe #1
Land PatternProbe #2Probe #1
Signal
name
Clk/Qual--A15CK1--CK2--CK3--Q1 --
GNDA14GNDGNDGNDGNDGNDGNDGNDGND
Clk/Qual+A13CK1+CK2+CK3+Q1+
Data 7+B12A1:7+A0:7+D1:7+D0:7+C3:7+C2:7+C1:7+C0:7+
GNDB11GNDGNDGNDGNDGNDGNDGNDGND
Data 7--B10A1:7--A0:7--D1:7--D0:7--C3:7--C2:7--C1:7--C0:7--
Data 6--A12A1:6--A0:6--D1:6--D0:6--C3:6--C2:6--C1:6--C0:6--
GNDA11GNDGNDGNDGNDGNDGNDGNDGND
Data 6+A10A1:6+A0:6+D1:6+D0:6+C3:6+C2:6+C1:6+C0:6+
Data 5+B9A1:5+A0:5+D1:5+D0:5+C3:5+C2:5+C1:5+C0:5+
GNDB8GNDGNDGNDGNDGNDGNDGNDGND
Data 5--B7A1:5--A0:5--D1:5--D0:5--C3:5--C2:5--C1:5--C0:5--
Data 4--A9A1:4--A0:4--D1:4--D0:4--C3:4--C2:4--C1:4--C0:4--
GNDA8GNDGNDGNDGNDGNDGNDGNDGND
Data 4+A7A1:4+A0:4+D1:4+D0:4+C3:4+C2:4+C1:4+C0:4+
Data 3+B6A1:3+A0:3+D1:3+D0:3+C3:3+C2:3+C1:3+C0:3+
GNDB5GNDGNDGNDGNDGNDGNDGNDGND
Data 3--B4A1:3--A0:3--D1:3--D0:3--C3:3--C2:3--C1:3--C0:3--
Data 2--A6A1:2--A0:2--D1:2--D0:2--C3:2--C2:2--C1:2--C0:2--
GNDA5GNDGNDGNDGNDGNDGNDGNDGND
Data 2+A4A1:2+A0:2+D1:2+D0:2+C3:2+C2:2+C1:2+C0:2+
Data 1+B3A1:1+A0:1+D1:1+D0:1+C3:1+C2:1+C1:1+C0:1+
GNDB2GNDGNDGNDGNDGNDGNDGNDGND
Data 1--B1A1:1--A0:1--D1:1--D0:1--C3:1--C2:1--C1:1--C0:1--
Data 0--A3A1:0--A0:0--D1:0--D0:0--C3:0--C2:0--C1:0--C0:0--
GNDA2GNDGNDGNDGNDGNDGNDGNDGND
Data 0+A1A1:0+A0:0+D1:0+D0:0+C3:0+C2:0+C1:0+C0:0+
Refer to Table 2- 2 on page 2- 4 and Table 2- 3 on page 2- 5 for 2X and 4X demultiplexing channel assignments.
Pad
name
Probe
head
Probe
head
Probe
head
Probe
head
Probe
head
Probe
head
Probe
head
Probe
head
Any differential input, either the differential clock/qualifiers on the P686x High-density Probe, or all differential data and
clock/qualifiers on the P6810 General Purpose Differential Probe and P6880 High-density Differential Probe, may have
their negative input pin grounded and be used as a single-ended input.
2- 14
P68XX Series Logic Analyzer Probes Instruction Manual
Table 2- 12: P6880 High-Density Differential Probe channel mapping on 68 and 34 channel modules
68 channel module
34 channel module
Land PatternProbe #2Probe #1
Reference
Signal
name
Clk/Qual--A15CK1--CK2--CK3--CK0--
GNDA14GNDGNDGNDGNDGNDGNDGNDGND
Clk/Qual+A13CK1--CK2--CK3+CK0+
Data 7+B12A1:7+A0:7+D1:7+D0:7+C3:7+C2:7+A3:7+A2:7+
GNDB11GNDGNDGNDGNDGNDGNDGNDGND
Data 7--B10A1:7--A0:7--D1:7--D0:7--C3:7--C2:7--A3:7--A2:7--
Data 6--A12A1:6--A0:6--D1:6--D0:6--C3:6--C2:6--A3:6--A2:6--
GNDA11GNDGNDGNDGNDGNDGNDGNDGND
Data 6+A10A1:6+A0:6+D1:6+D0:6+C3:6+C2:6+A3:6+A2:6+
Data 5+B9A1:5+A0:5+D1:5+D0:5+C3:5+C2:5+A3:5+A2:5+
GNDB8GNDGNDGNDGNDGNDGNDGNDGND
Data 5--B7A1:5--A0:5--D1:5--D0:5--C3:5--C2:5--A3:5--A2:5--
Data 4--A9A1:4--A0:4--D1:4--D0:4--C3:4--C2:4--A3:4--A2:4--
GNDA8GNDGNDGNDGNDGNDGNDGNDGND
Data 4+A7A1:4+A0:4+D1:4+D0:4+C3:4+C2:4+A3:4+A2:4+
Data 3+B6A1:3+A0:3+D1:3+D0:3+C3:3+C2:3+A3:3+A2:3+
GNDB5GNDGNDGNDGNDGNDGNDGNDGND
Data 3--B4A1:3--A0:3--D1:3--D0:3--C3:3--C2:3--A3:3--A2:3--
Data 2--A6A1:2--A0:2--D1:2--D0:2--C3:2--C2:2--A3:2--A2:2--
GNDA5GNDGNDGNDGNDGNDGNDGNDGND
Data 2+A4A1:2+A0:2+D1:2+D0:2+C3:2+C2:2+A3:2+A2:2+
Data 1+B3A1:1+A0:1+D1:1+D0:1+C3:1+C2:1+A3:1+A2:1+
GNDB2GNDGNDGNDGNDGNDGNDGNDGND
Data 1--B1A1:1--A0:1--D1:1--D0:1--C3:1--C2:1--A3:1--A2:1--
Data 0--A3A1:0--A0:0--D1:0--D0:0--C3:0--C2:0--A3:0--A2:0--
GNDA2GNDGNDGNDGNDGNDGNDGNDGND
Data 0+A1A1:0+A0:0+D1:0+D0:0+C3:0+C2:0+A3:0+A2:0+
Refer to Table 2- 2 on page 2- 4 and Table 2- 3 on page 2- 5 for 2X and 4X demultiplexing channel assignments.
Pad
name
Probe
head
Probe
head
Probe
head
Probe
head
Probe
head
Probe
head
Probe
head
Probe
head
Any differential input, either the differential clock/qualifiers on the P686x High-density Probe, or all differential data and
clock/qualifiers on the P6810 General Purpose Differential Probe and P6880 High-density Differential Probe, may have
their negative input pin grounded and be used as a single-ended input.
P68XX Series Logic Analyzer Probes Instruction Manual
2- 15
Reference
C
M
ict
Table 2- 13: Recommended Compression-on-PCB to P6434 Mictor adapter and Mictor-on-PCB to Compression
adapter channel mapping for 136 and 102 channel modules
ompression
Land Pattern
Signal name Pad name
J1 Clk/Qual--A15NCNCNCNCNC
GNDA14GNDGNDGNDGNDGND
J1 Clk/Qual+ A135Q3Q0CK0CK3
J1 Data 15B127E3:7D3:7A3:7C3:7
GNDB11GNDGNDGNDGNDGND
J1 Data 14B109E3:6D3:6A3:6C3:6
J1 Data 13A1211E3:5D3:5A3:5C3:5
GNDA11GNDGNDGNDGNDGND
J1 Data 12A1013E3:4D3:4A3:4C3:4
J1 Data 11B915E3:3D3:3A3:3C3:3
GNDB8GNDGNDGNDGNDGND
J1 Data 10B717E3:2D3:2A3:2C3:2
J1 Data 9A919E3:1D3:1A3:1C3:1
GNDA8GNDGNDGNDGNDGND
J1 Data 8A721E3:0D3:0A3:0C3:0
J1 Data 7B623E2:7D2:7A2:7C2:7
GNDB5GNDGNDGNDGNDGND
J1 Data 6B425E2:6D2:6A2:6C2:6
J1 Data 5A627E2:5D2:5A2:5C2:5
GNDA5GNDGNDGNDGNDGND
J1 Data 4A429E2:4D2:4A2:4C2:4
J1 Data 3B331E2:3D2:3A2:3C2:3
GNDB2GNDGNDGNDGNDGND
J1 Data 2B133E2:2D2:2A2:2C2:2
J1 Data 1A335E2:1D2:1A2:1C2:1
GNDA2GNDGNDGNDGNDGND
J1 Data 0A137E2:0D2:0A2:0C2:0
Refer to Table 2- 2 on page 2- 4 and Table 2- 3 on page 2- 5 for 2X and 4X demultiplexing channel assignments.
or
Land Pattern
Mictor pin number
136 channel module
Adapter #4/
probe head #4
102 channel module
Adapter #3/
probe head #3
Adapter #2/
probe head #2
Adapter #1/
probe head #1
Any differential input, either the differential clock/qualifiers on the P686x High-density Probe, or all differential data and
clock/qualifiers on the P6810 General Purpose Differential Probe and P6880 High-density Differential Probe, may have
their negative input pin grounded and be used as a single-ended input.
2- 16
P68XX Series Logic Analyzer Probes Instruction Manual
Reference
Table 2- 13: Recommended Compression-on-PCB to P6434 Mictor adapter and Mictor-on-PCB to Compression
adapter channel mapping for 136 and 102 channel modules (Cont.)
Mictor
Compression
Compression
Land Pattern
Land Pattern
Signal nameAdapter #1/
J2 Clk/Qual--A15NCNCNCNCNC
GNDA14GNDGNDGNDGNDGND
J2 Clk/Qual+ A136Q2CK2CK1Q1
J2 Data 15B128E1:7D1:7A1:7C1:7
GNDB11GNDGNDGNDGNDGND
J2 Data 14B1010E1:6D1:6A1:6C1:6
J2 Data 13A1212E1:5D1:5A1:5C1:5
GNDA11GNDGNDGNDGNDGND
J2 Data 12A1014E1:4D1:4A1:4C1:4
J2 Data 11B916E1:3D1:3A1:3C1:3
GNDB8GNDGNDGNDGNDGND
J2 Data 10B718E1:2D1:2A1:2C1:2
J2 Data 9A920E1:1D1:1A1:1C1:1
GNDA8GNDGNDGNDGNDGND
J2 Data 8A722E1:0D1:0A1:0C1:0
J2 Data 7B624E0:7D0:7A0:7C0:7
GNDB5GNDGNDGNDGNDGND
J2 Data 6B426E0:6D0:6A0:6C0:6
J2 Data 5A628E0:5D0:5A0:5C0:5
GNDA5GNDGNDGNDGNDGND
J2 Data 4A430E0:4D0:4A0:4C0:4
J2 Data 3B332E0:3D0:3A0:3C0:3
GNDB2GNDGNDGNDGNDGND
J2 Data 2B134E0:2D0:2A0:2C0:2
J2 Data 1A336E0:1D0:1A0:1C0:1
GNDA2GNDGNDGNDGNDGND
J2 Data 0A138E0:0D0:0A0:0C0:0
Refer to Table 2- 2 on page 2- 4 and Table 2- 3 on page 2- 5 for 2X and 4X demultiplexing channel assignments.
Pad name
Mictor
Land Pattern
Land Pattern
Mictor pin number
136 channel module
Adapter #4/
probe head #4
102 channel module
Adapter #3/
probe head #3
Adapter #2/
probe head #2
probe head #1
Any differential input, either the differential clock/qualifiers on the P686x High-density Probe, or all differential data and
clock/qualifiers on the P6810 General Purpose Differential Probe and P6880 High-density Differential Probe, may have
their negative input pin grounded and be used as a single-ended input.
P68XX Series Logic Analyzer Probes Instruction Manual
2- 17
Reference
Table 2- 14: Recommended Compression-on-PCB to P6434 Mictor adapter and Mictor-on-PCB to Compression
adapter channel mapping for 68 channel module
Compression Land PatternMictor Land PatternChannel Module
Signal namePad nameMictor pin numberAdapter #1/
probe head #1
J1 Clk/Qual--A15NCNCNC
GNDA14GNDGNDGND
J1 Clk/Qual+A135CK0CK3
J1 Data 15B127A3:7C3: 7
GNDB11GNDGNDGND
J1 Data 14B109A3:6C3: 6
J1 Data 13A1211A3:5C3:5
GNDA11GNDGNDGND
J1 Data 12A1013A3:4C3:4
J1 Data 11B915A3: 3C3:3
GNDB8GNDGNDGND
J1 Data 10B717A3:2C3:2
J1 Data 9A919A3:1C3:1
GNDA8GNDGNDGND
J1 Data 8A721A3:0C3:0
J1 Data 7B623A2:7C2:7
GNDB5GNDGNDGND
J1 Data 6B425A2:6C2:6
J1 Data 5A627A2:5C2:5
GNDA5GNDGNDGND
J1 Data 4A429A2:4C2:4
J1 Data 3B331A2:3C2:3
GNDB2GNDGNDGND
J1 Data 2B133A2:2C2:2
J1 Data 1A335A2:1C2:1
GNDA2GNDGNDGND
J1 Data 0A137A2:0C2:0
Adapter #2/
probe head #1
2- 18
P68XX Series Logic Analyzer Probes Instruction Manual
Reference
Table 2- 14: Recommended Compression-on-PCB to P6434 Mictor adapter and Mictor-on-PCB to Compression
adapter channel mapping for 68 channel module (Cont.)
Compression Land PatternChannel ModuleMictor Land Pattern
Signal nameAdapter #2/
J2 Clk/Qual+A15NCNCNC
GNDA14GNDGNDGND
J2 Clk/Qual+A136CK1CK2
J2 Data 15B128A1:7D1: 7
GNDB11GNDGNDGND
J2 Data 14B1010A1:6D1:6
J2 Data 13A1212A1:5D1:5
GNDA11GNDGNDGND
J2 Data 12A1014A1:4D1:4
J2 Data 11B916A1: 3D1:3
GNDB8GNDGNDGND
J2 Data 10B718A1:2D1:2
J2 Data 9A920A1:1D1:1
GNDA8GNDGNDGND
J2 Data 8A722A1:0D1:0
J2 Data 7B624A0:7D0:7
GNDB5GNDGNDGND
J2 Data 6B426A0:6D0:6
J2 Data 5A628A0:5D0:5
GNDA5GNDGNDGND
J2 Data 4A430A0:4D0:4
J2 Data 3B332A0:3D0:3
GNDB2GNDGNDGND
J2 Data 2B134A0:2D0:2
J2 Data 1A336A0:1D0:1
GNDA2GNDGNDGND
J2 Data 0A138A0:0D0:0
Refer to Table 2- 2 on page 2- 4 and Table 2- 3 on page 2- 5 for 2X and 4X demultiplexing channel assignments.
Mictor pin numberPad name
Adapter #1/
probe head #1
probe head #1
Any differential input, either the differential clock/qualifiers on the P686x High-density Probe, or all differential data and
clock/qualifiers on the P6810 General Purpose Differential Probe and P6880 High-density Differential Probe, may have
their negative input pin grounded and be used as a single-ended input.
P68XX Series Logic Analyzer Probes Instruction Manual
2- 19
Reference
Table 2- 15: Recommended Compression-on-PCB to P6434 Mictor adapter and Mictor-on-PCB to Compression
adapter channel mapping for 34 channel module
Compression Land PatternMictor Land PatternChannel Module
Signal namePad nameMictor pin numberAdapter #1/probe head #1
J1 Clk/Qual--A15NCNC
GNDA14GNDGND
J1 Clk/Qual+A135CK3
J1 Data 15B127C3:7
GNDB11GNDGND
J1 Data 14B109C3:6
J1 Data 13A1211C3:5
GNDA11GNDGND
J1 Data 12A1013C3:4
J1 Data 11B915C3:3
GNDB8GNDGND
J1 Data 10B717C3:2
J1 Data 9A919C3:1
GNDA8GNDGND
J1 Data 8A721C3:0
J1 Data 7B623C2:7
GNDB5GNDGND
J1 Data 6B425C2:6
J1 Data 5A627C2:5
GNDA5GNDGND
J1 Data 4A429C2:4
J1 Data 3B331C2:3
GNDB2GNDGND
J1 Data 2B133C2:2
J1 Data 1A335C2:1
GNDA2GNDGND
J1 Data 0A137C2:0
2- 20
P68XX Series Logic Analyzer Probes Instruction Manual
Reference
Table 2- 15: Recommended Compression-on-PCB to P6434 Mictor adapter and Mictor-on-PCB to Compression
adapter channel mapping for 34 channel module (Cont.)
Compression Land PatternChannel ModuleMictor Land Pattern
Signal nameAdapter #1/probe head #1Mictor pin numberPad name
J2 Clk/Qual+A15NCNC
GNDA14GNDGND
J2 Clk/Qual+A136CK0
J2 Data 15B128A3:7
GNDB11GNDGND
J2 Data 14B1010A3:6
J2 Data 13A1212A3:5
GNDA11GNDGND
J2 Data 12A1014A3:4
J2 Data 11B916A3:3
GNDB8GNDGND
J2 Data 10B718A3:2
J2 Data 9A920A3:1
GNDA8GNDGND
J2 Data 8A722A3:0
J2 Data 7B624A2:7
GNDB5GNDGND
J2 Data 6B426A2:6
J2 Data 5A628A2:5
GNDA5GNDGND
J2 Data 4A430A2:4
J2 Data 3B332A2:3
GNDB2GNDGND
J2 Data 2B134A2:2
J2 Data 1A336A2:1
GNDA2GNDGND
J2 Data 0A138A2:0
Refer to Table 2- 2 on page 2- 4 and Table 2- 3 on page 2- 5 for 2X and 4X demultiplexing channel assignments.
Any differential input, either the differential clock/qualifiers on the P686x High-density Probe, or all differential data and
clock/qualifiers on the P6810 General Purpose Differential Probe and P6880 High-density Differential Probe, may have
their negative input pin grounded and be used as a single-ended input.
P68XX Series Logic Analyzer Probes Instruction Manual
2- 21
Reference
Special Considerations for the Adapters. The following are issues to consider
when you use either the Compression-on-PCB to P6434 Mictor adapter or the
Mictor-on--PCB to P6860 Compression adapters.
HUse of the Compression-on-PCB to P6434 Mictor and Mictor-on-PCB to
P6860 Compression adapters on existing 68 and 34 channel embedded
configurations and supports may require exchanging the P6860 Probe heads
or P6434 module connector ends to accommodate all older Tektronix logic
analyzer signal connection alternatives. For additional information on P6434
and P68xx probe-to-module orientation refer to the following:
HP6810 General Purpose Logic Analyzer Probe Label Instructions
HP6860 High Density Logic Analyzer Probe Label Instructions
HP6880 High Density Differential Logic Analyzer Probe Label Instruc-
tions
HP6864 High Density 4X Logic Analyzer Probe Label Instructions
HP6434 Probe Label Instructions
Land Footprints
HOn the Compression-on-PCB to P6434 Mictor adapter, the negative side of
the differential clock/quals are left floating (N/C) to allow a differential clock
signal to be connected to the compression footprint and still be probed by a
P6434. However, the P6434 will only see the CLK+ side of the differential
line. This also allows the P6860 Probes to be connected in the future and
provide true differential clock/qual support.
HOn the Mictor-on-PCB to P6860 Compression adapter, the negative side of
the differential clock/qual inputs on the compression connection side are
internally grounded to support viewing the single-ended clock/qual inputs
supported by the P6434 Probe and older Tektronix logic analyzers.
The following section shows the land footprints for the P6810, P686x, and
P6880 Probes. These figures contain the signal to land pattern assignments.
P6810 Probe Land Footprint. See Figure 2--1 for the P6810 General Purpose
Probe land footprint. Pin spacing allows for spacing tolerance between 8-channel
podlet holder and clock/qual podlet configurations. Negative inputs of differential signals may be grounded to support single-ended signal inputs.
2- 22
P68XX Series Logic Analyzer Probes Instruction Manual
Reference
9.52 mm Min
(0.380 in )
Orange probe
Brown probe
Gray probe
White probe
Yellow probe
Blue probe
Violet probe
Green probe
6.35 mm Min
(0.250 in)
5.08 mm Min
17.78 mm
(0.700 in)
(0.200 in)
Pin spacing between
8- channel podlet groups
and clock/qual podlets
Section names
A0
A2
C0
C2
D0
D2
E0
E2
07+07+ CLK+
A1
A3
C1
C3
D1
D3
E1
E3
Clock channel
CK1
CK0
Q1
CK3
CK2
Q0
Q2
Q3
2.54 mm
(0.100 in)
17.78 mm
(0.700 in)
2.54 mm
(0.100 in)
2.54 mm
(0.100 in)
2.80 mm Max
(0.110 in)
23.37 mm
Max (0.920 in)
8- Channel probe footprint with
8- channel podlet grouper attached
1.27 mm
(0.050 in)
2.54 mm
(0.100 in)
4.57 mm Max
(0.180 in)
11.68 mm Max
(0.460 in)
4.57 mm Max
(0.180 in)
11.68 mm Max
(0.460 in)
0
7--07--
CLK--
16 Channels plus one
clock - grouping footprint
All dimensions are per standard IPC
tolerance, which is ᐔ0.004 inches
Figure 2- 1: P6810 General-Purpose probe land footprint
2.54 mm Max
(0.100 in)
Single podlet footprint
P68XX Series Logic Analyzer Probes Instruction Manual
2- 23
Reference
P686x Probe Land Footprint. See Figure 2--2 for the land footprint for the P686x
High-Density Probe. See Figure 2--3 for an example of the High-Density Probe
land footprint in a typical pass-through signal path layout configuration. This
type of configuration optimizes minimal probe loading. Figure 2--4 contains
example layouts of the High-Density Compression and Mictor land footprints.
Pad
name
CLK-GND
CLK+
D13
GND
D12
D9
GND
D8
D5
GND
D4
D1
GND
D0
A15
A14
A13
A12
A11
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
B12
B11
B10
B9
B8
B7
B6
B5
B4
B3
B2
B1
Pad
name
D15
GND
D14
D11
GND
D10
D7
GND
D6
D3
GND
D2
Qual -GND
Qual +
D13
GND
D12
D9
GND
D8
D5
GND
D4
D1
GND
D0
A15
A14
A13
A12
A11
A10
Signal
Signal
name
name
Probe head #2
Figure 2- 2: P686x High-Density probe land footprint
A9
A8
A7
A6
A5
A4
A3
A2
A1
Probe head #1
(Not applicable to
P6864 probe)
B12
B11
B10
B9
B8
B7
B6
B5
B4
B3
B2
B1
D15
GND
D14
D11
GND
D10
D7
GND
D6
D3
GND
D2
2- 24
P68XX Series Logic Analyzer Probes Instruction Manual
Reference
Signal NamePad Name
CLK/Qual -A15
CLK/Qual +A13
Data 15B12GNDB11
Data 14B10
Data 13A12GNDA11
Data 12A10
Data 11B9GNDB8
Data 10B7
Data 9A9GNDA8
Data 8A7
Data 7B6GNDB5
Data 6B4
Data 5A6GNDA5
Data 4A4
Data 3B3GNDB2
Data 2B1
Data 1A3GNDA2
Data 0 (LSB)A1
Signal NamePad Name
GNDA14
Figure 2- 3: High-Density probe land footprint in a typical pass-through signal path
layout configuration
Figure 2- 4: Example layouts of the High-Density compression compared to the
mictor land footprints
P68XX Series Logic Analyzer Probes Instruction Manual
2- 25
Reference
P6880 Differential Probe Land Footprint. See Figure 2--5 for the land footprint for
the P6880 High-Density Differential Probe. Figure 2--6 illustrates an example of
the High-Density Differential Probe land footprint in a typical pass-through
signal path layout configuration.
NOTE. Because the land pattern is the same between P6880 and P6860 probes,
you can also use the P6860 probe to look at both sides of the differential signal
using two separate input channels on the P6860 probe.
Pad
name
CLK-GND
CLK+
D6-GND
D6+
D4-GND
D4+
D2-GND
D2+
D0-GND
D0+
A15
A14
A13
A12
A11
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
B12
B11
B10
B9
B8
B7
B6
B5
B4
B3
B2
B1
Pad
name
D7+
GND
D7--
D5+
GND
D5--
D3+
GND
D3--
D1+
GND
D1--
N/A
GND
N/A
D6-GND
D6+
D4-GND
D4+
D2-GND
D2+
D0-GND
D0+
A15
A14
A13
A12
A11
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
Signal
Signal
name
name
Probe head #4Probe head #3Probe head #2Probe head #1
Figure 2- 5: P6880 Differential probe land footprint
B12
B11
B10
B9
B8
B7
B6
B5
B4
B3
B2
B1
D7+
GND
D7--
D5+
GND
D5--
D3+
GND
D3--
D1+
GND
D1--
Qual-GND
Qual+
D6-GND
D6+
D4-GND
D4+
D2-GND
D2+
D0-GND
D0+
A15
A14
A13
A12
A11
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
B12
B11
B10
B9
B8
B7
B6
B5
B4
B3
B2
B1
D7+
GND
D7--
D5+
GND
D5--
D3+
GND
D3--
D1+
GND
D1--
N/A
GND
N/A
D6-GND
D6+
D4-GND
D4+
D2-GND
D2+
D0-GND
D0+
A15
A14
A13
A12
A11
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
B12
B11
B10
B9
B8
B7
B6
B5
B4
B3
B2
B1
D7+
GND
D7--
D5+
GND
D5--
D3+
GND
D3--
D1+
GND
D1--
2- 26
P68XX Series Logic Analyzer Probes Instruction Manual
Reference
Mechanical
Considerations
Signal NamePad Name
CLK/Qual -A15
CLK/Qual +A13
Data 7+B12GNDB11
Data 7-B10
Data 6-A12GNDA11
Data 6+A10
Data 5+B9GNDB8
Data 5-B7
Data 4-A9GNDA8
Data 4+A7
Data 3+B6GNDB5
Data 3-B4
Data 2-A6GNDA5
Data 2+A4
Data 1+B3GNDB2
Data 1-B1
Data 0-A3GNDA2
Data 0+(LSB)A1
Signal NamePad Name
GNDA14
Figure 2- 6: High-Density Differential probe land footprint in a typical pass-through
signal path layout configuration
This section provides information on compression land footprint requirements
and physical attachment requirements.
The PCB holes, in general, do not have an impact upon the integrity of your
signals when the signals routed around the holes have the corresponding return
current plane immediately below the signal trace for the entire signal path from
driver to receiver.
NOTE. For optimum signal integrity, there should be a continuous, uninterrupted
ground return plane along the entire signal path.
Land Footprint Requirements for the P686x and P6880 Probes. See Figure 2--7 for
the compression land footprint requirements for the P686x and P6880 Probes.
P68XX Series Logic Analyzer Probes Instruction Manual
2- 27
Reference
32.13 mm
(1.265 in)
6.35 mm (0.250 in) X 32.13 mm (1.265 in)
Frontside component keepout area.
6.35 mm
(0.250 in)
6.35 mm (.250-in) X 32.13 mm (1.265-in)
Backside component keepout area for Nut Bar
version, press-in nut clearance only required
0.25 mm (0.010 in)
0.25 mm (0.010 in)
4X 1.16 mm (0.046 in)
5X 1.16 mm (0.046 in)
on press--in nut version.
.000
3X 0.41 mm (0.016 in)
3X 0.81 mm (0.032 in)
25.65 mm (1.010 in)
22.81 mm (.898 in)
21.49 mm (.846 in)
6.50 mm (.256 in)
3.68 mm (.145 in)
8.51 mm (.335 in)
12.17 mm (.479 in)
15.82 mm (.623 in)
19.48 mm (.767 in)
2X 3.73 mm (0.147 in) diameter
thick PCB with press in nut.
.000
20.80 mm (.819 in)
17.15 mm (.675 in)
13.49 mm (.531 in)
9.83 mm (.387 in)
6.17 mm (.243 in)
4.17 mm (.164 in)
3.25 mm (.128 in)
* 2 X 5.72 mm (0.225 in)
diameter component and run
keepout backside layers.
* 2 X 4.57 mm (0.180 in)
diameter internal/topside
layers when using press-in nut.
* The need for additional keepout area depends on
the requirements of both your PCB manufacturer and
your outsourced PCB assembly manufacturer.
1.70 mm (0.067 in) diameter
2X 3.50 mm (0.138 in)
diameter thin PCB with nut bar.
3.18 mm (0.125 in)
1.14 mm (0.045 in)
.000
3.18 mm (0.125 in)
0.91 mm (0.036 in)
All dimensions are per standard IPC
tolerance, which is ᐔ0.004 inches
0.91 mm (0.036 in)
Position B12
Position A15
Position B1
Via Keepout
Figure 2- 7: Land footprint requirements for the P686x and P6880 probes (top view)
2- 28
P68XX Series Logic Analyzer Probes Instruction Manual
White silk--screen bar to indicate
directional keying hole (easier
orientation identification).
Probe body keepout
Position A1
Reference
Special Considerations
WARNING. To avoid personal injury due to electric shock, always turn off the
power on your target system before cleaning the compression footprint.
HCleanliness is important for a reliable connection. Refer to Cleaning the
P686x and P6880 Compression Footprints, located on page 1--14.
HLine boxes around the pin groupings are the via keepout areas (not part of
the actual land footprint).
HSolder mask is required between all land pads in the component keepout
area.
HAll signal runs in the keepout areas are required to maintain PCB and solder
mask tolerances to ensure that no exposed runs or metal exist between pads.
This requirement avoids the risk of shorting signal runs.
HSolder mask hardness of at least 8H (pencil hardness) and thickness of at
least 0.0762 mm to 0.1270 mm (0.0003 to 0.0005 in) has been verified for
several hundred cycles without appreciable wear from the compression
contact cycling.
HThe compression land footprint design was verified on the immersion gold
process.
Land Footprint Requirements for the Compression-on-PCB to P6434 Mictor
Adapter. See Figures 2--8 and 2--9 for the land footprint requirements for the
Compression-on-PCB to P6434 Mictor adapter. This compression adapter
converts from the new compression footprint to the existing P6434 Mictor-based
34-channel probe.
Refer to the P6434 Mass Termination Probe Manual for the Mictor land
footprint specification. Refer to Table 2--13 on page 2--16 for the recommended
channel mappings for the Compression-on-PCB to P6434 Mictor adapter and
Mictor-on-PCB to Compression adapter.
P68XX Series Logic Analyzer Probes Instruction Manual
2- 29
Reference
32.13 mm
(1.265 in)
J2
13.72 mm
(0.540 in) Total
Keepout
J1
6.60 mm
(0.260 in)
Figure 2- 8: Land footprint requirements for the 34 channel Compression-on-PCB to
P6434 Mictor adapter
32.13 mm
(1.265 in)
J2
13.72 mm
(0.540 in)
Total Keepout
Figure 2- 9: Land footprint requirements for the 17 channel Compression-on-PCB to
P6434 Mictor adapter
2- 30
Special Considerations
HTwo compression land footprints must be spaced as per the mechanical
dimensions specified to support the compression adapter.
HPlacement of the compression land footprints is only constrained with use of
the compression adapter, not in normal usage of the TLA7Axx logic analyzer
with a High-Density Probe.
HThe P6434 Probe and older logic analyzer modules do not support differen-
tial signals. Therefore, the compression adapter cannot be used to support
differential signals beyond capturing each side of the differential signal
independently in a single-ended manner.
HThe compression adapter will add capacitance to the P6434 Probe input
capacitance. The Mictor adapter adds 2.7 pF to the High-Density Compression probe load of 0.7 pF for a combined adapter capacitance load of 3.4 pF.
HThe TLA7Axx logic analyzer with the P6860 High-Density Probe will
connect directly to the compression land footprint to support high performance data capture and viewing needs.
P68XX Series Logic Analyzer Probes Instruction Manual
Reference
HThe TLA7Axx logic analyzer with the P6880 High-Density Differential
Probe will also connect directly to the compression land footprint to support
high performance differential signal capture and viewing needs.
Physical Attachment Requirements for the P6810 Probe. See Figure 2--10 for the
physical dimensions of the P6810 General Purpose Probe.
30.78 mm
(1.212 in)
11.68 mm
(0.459 in)
35.10 mm
(1.382 in)
2.54 mm
(0.100 in)
36.30 mm
(1.429 in)
23.37 mm
(0.920 in)
Figure 2- 10: Physical attachment requirements for the P6810 probe
Physical Attachment Requirements for the P686x and P6880 Probes.The
connector-less P686x High-Density Probe and P6880 High-Density Differential
Probe interconnects are designed to accommodate PCB thickness ranging from
1.27 mm to 3.81 mm (0.050 in to 0.150 in). To accommodate this range, there
are two versions of the design.
HNut bar
HPress-in nut
If the PCB thickness is 1.27 mm to 2.36 mm (0.050 in to 0.093 in), use the nut
bar with the thin elastomer (see Figure 2--11).
If the PCB thickness is 2.36 mm to 3.81 mm (0.093 in to 0.150 in), use the
press-in nut with the thick elastomer (see Figure 2--12).
P68XX Series Logic Analyzer Probes Instruction Manual
2- 31
Reference
38.40 mm
(1.512 in)
Nut Bar backing
plate
Figure 2- 11: Nut Bar design
2.36 mm (0.093 in)
1.27 mm (0.050 in)
PCB Thickness
4.953 mm
(0.195 in)
Special Considerations for the Nut Bar Design
HThe nut bar backing plate is required to maintain PCB flatness, which
supports the compression connection.
HThe nut bar snaps in and out of the PCB without the use of tools.
HNut bars are reusable and are not required to be a permanent part of the PCB.
HThe elastomer used is independent and replaceable.
HAdditional nut bars and both thick and thin elastomer holders may be
ordered from Tektronix.
2- 32
P68XX Series Logic Analyzer Probes Instruction Manual
1.651 mm
(0.065 in)
Figure 2- 12: Press-in Nut design
Reference
3.81 mm (0.150 in)
2.36 mm (0.093 in)
PCB Thickness
Electrical Considerations
Special Considerations for the Press-in Nut Design
HThe PEM
KF2 2-56 or equivalent press-in nut must be inserted into the
PCB.
HThe elastomer used is independent and replaceable.
Physical Attachment Requirements for the Compression-on-PCB to P6434 Mictor
and Mictor-on-PCB to P6860 Compression Adapters. SeeFigure1--6onpage
1--10 and Figure 1--7 on page 1--11 for the mechanical dimensions of the
adapters.
This section provides information on transmission lines and load models for the
P6810 General Purpose, P686x High-Density, and P6880 High-Density
Differential Probes.
The low frequency model is typically adequate for rise and fall times of 1 ns or
greater in a typical 25 Ω source impedance environment (50 Ω runs with a
pass-through connection). For source impedance outside this range, and/or rise
and fall times less than 1 ns, use the high frequency model to determine if a
significant difference is obtained in the modeling result.
The compression land pattern pad is not part of the load model. Make sure that
you include the compression land pad and in the modeling.
P68XX Series Logic Analyzer Probes Instruction Manual
2- 33
Reference
Transmission Lines. Due to the high performance nature of the interconnect,
ensure that stubs, which are greater than 1/4 length of the signal rise time, be
modeled as transmission lines.
P6810 General Purpose Probe Load Model. The following electrical model (see
Figure 2--13) displays a single podlet load model of the General Purpose Probes.
+Ref
0.1 pF
20K Ω
0.7 pF
20K Ω
0.1 pF
-- R e f
100 Ω
1uH
Figure 2- 13: Single podlet load model
The characteristics listed in Table 2--16 apply to the leadsets shown in
Figures 2--14, 2--15, and 2--16 unless otherwise noted.
Table 2- 16: Characteristics
Recommended
usage
Maximum clock
speed
TTL and CMOS levels only. Ground leads should be connected to
ground of system under test.
Not recommended for signals with edge rates > 1 V/ns.
50 MHz (single-ended leadset), one ground lead connected
90 - 100 MHz (single-ended leadset), two ground leads connected
150 - 200 MHz (differential leadset)
2- 34
AC loading< 5 pF per channel as seen by the device under test (plus podlet)
DC loadingNone
TerminationEach signal lead on the eight-channel leadset contains a 150 Ω
series termination near the end of the barrel connector to minimize
signal reflections.
DimensionsSee Figures 2--14 and 2--16 on page 2--35.
P68XX Series Logic Analyzer Probes Instruction Manual
P68XX Series Logic Analyzer Probes Instruction Manual
2- 35
Reference
P686x High-Density and P6880 High-Density Differential Probes Load Model. The
following electrical model (see Figure 2--17) includes a low-frequency and
high-frequency model of the High-Density and High-Density Differential Probes.
For the Differential Probe, the load model is applied to both the + side and the
-- side of the signal.
Low Frequency probe load
C1
0.7 pF
+R1
20k Ω
T1 td=17 pS
z0=70 Ω
C1
0.06 pF
T2 td=10 pS
z0=66 Ω
0.212 pF
High Frequency
probe load
C2
+R1
20k Ω
Figure 2- 17: High-Density and High-Density Differential probe load model
The differential load for the P686x clock input and the P6880 probe can be
modeled by attaching the single line model to each side (+ and --) of the
differential signal. The + and -- sides of the differential signal are well insolated
in the probe head up to and including the differential input stage.
Mictor-on-PCB to P6860 Compression Adapter Load Model. Refer to Figure 2--18
for an electrical model of the Mictor-on-PCB to P6860 C ompression adapter.
The pad cap is the capacitance of the 0.016 in x 0.032 in pad of the P6860/P6880
compression land footprint. The capacitive load depends upon the distance to the
underlying conductors.
2- 36
P68XX Series Logic Analyzer Probes Instruction Manual
Reference
td=35 pS
z0=90 Ω
.18 pF.06 pF
.005 Ω
.12 pF
td=17 pS
z0=70 Ω
td=92 pS
z0=57 Ω
.005 Ω
td=10 pS
z0=66 Ω
pad_cap
.21 pF
20K Ω
Figure 2- 18: Mictor-on-PCB to Compression adapter load model
Compression-on-PCB to P6434 Mictor Adapter Load Model. Refer to Figure 2--19
for an electrical model of the Compression-on-PCB to P6434 Mictor adapter.
The pad cap is the capacitance of the 0.016 in x 0.032 in pad of the P6860/P6880
compression land footprint. The capacitive load depends upon the distance to the
underlying conductors.
.005 Ω
.7 pF
1.6 nH
.005 Ω
.23 pF
td=7 pS
z0=75 Ω
td=17 pS
z0=70 Ω
1.6 nH
td=35 pS
z0=90 Ω
pad_cap
.18 pF
.12 pF
1.1 pF
20K Ω
Figure 2- 19: Compression-on-PCB to P6434 Mictor adapter load model
75 Ω
P68XX Series Logic Analyzer Probes Instruction Manual
2- 37
Reference
2- 38
P68XX Series Logic Analyzer Probes Instruction Manual
Specifications
Specifications
Mechanical and Electrical Specifications
Table 3--1 lists the mechanical and electrical specifications for the P6810, P686x,
and P6880 Probes. The electrical specifications apply when the probe is
connected between a compatible logic analyzer and a target system.
Refer to the Tektronix Logic Analyzer Family Product Specifications document
(Tektronix part number 071-1344-xx) available on the Tektronix Logic AnalyzerFamily Product Documentation CD or downloadable from the Tektronix web
site for a complete list of specifications, including overall system specifications.
Table 3- 1: Mechanical and electrical specifications
CharacteristicP6810P6860/P6864P6880
Threshold accuracy± (35 mV ± 1% of setting)± (35 mV ± 1% of setting)± (35 mV ± 1% of setting)
Input resistance20 kΩ±1%20 kΩ±1%20 kΩ±1%
Input capacitance<1.0 pF
Minimum digital signal swing300 mV single-ended300 mV single-ended150 mV differential each side
Maximum nondestructive input
signal to probe
Delay from probe tip to module
input connector
Probe length1.8 m (6 ft)1.8 m (6 ft)1.8 m (6 ft)
Operating range+5 V to --2.5 V+5 V to --2.5 V+5 V to --2.5 V
1
P6810 single podlet input capacitance is 0.7 pF, but podlets in a group will have 1 pF input capacitance.
1
± 15 V± 15 V± 15 V
7.70 ns ± 80 ps7.70 ns ± 60 ps7.70 ns ± 80 ps
0.7 pF (typical)0.7 pF (typical)
NOTE. Because the length of all three probes are electrically similar, they can be
interchanged without problems.
P68XX Series Logic Analyzer Probes Instruction Manual
3- 1
Specifications
Table 3--2 shows the environmental specifications for all three probes. The
probes are designed to meet Tektronix standard 062-2847-00 class 5.
Table 3- 2: Environmental specifications
CharacteristicP6810P6860/P6864P6880
Temperature
Operating
-operating
Non
Humidity10 _Cto30_C
Altitude
Operating
Non-operating
Electrostatic immunity6kV6kV6kV
0 _Cto+50_C
-- 5 1 _Cto71_C
95% relative humidity
30 _Cto40_C
75% relative humidity
40 _Cto50_C
45% relative humidity
10,000 ft (3,048 m)
40,000 ft (12,192 m)
0 _Cto+50_C
-- 5 1 _Cto71_C
10 _Cto30_C
95% relative humidity
30 _Cto40_C
75% relative humidity
40 _Cto50_C
45% relative humidity
10,000 ft (3,048 m)
40,000 ft (12,192 m)
0 _Cto+50_C
-- 5 1 _Cto71_C
10 _Cto30_C
95% relative humidity
30 _Cto40_C
75% relative humidity
40 _Cto50_C
45% relative humidity
10,000 ft (3,048 m)
40,000 ft (12,192 m)
3- 2
P68XX Series Logic Analyzer Probes Instruction Manual
Maintenance
Maintenance
Probe Calibration
Service Strategy
The P6810, P686x, and P6880 Probes do not require scheduled or periodic
maintenance. Refer to the Functional Check section (page 4--1) to verify the
basic functionality of the probes.
To confirm that the probes meet or exceed the performance requirements for
published specifications with a compatible logic analyzer module, refer to the
TLA7Axx Logic Analyzer Module Service Manual and follow the procedures
listed under performance verification procedures.
If performing the probe calibration yourself, refer to the TLA7Axx LogicAnalyzer Module Service Manual for the complete calibration procedure.
Otherwise, return the probe to the local Tektronix service center.
Except for the elastomer holders, the P6810, P686x, and P6880 Probes contain
no user-replaceable parts. If probe failure occurs, return the entire probe to your
Tektronix service representative for repair.
Functional Check
NOTE. For the default setup if you connect probes to any channels other than the
A2 and A3 groups, you must define the groups and channels in the Setup window
before acquiring data on other probe channels.
Connect the logic analyzer probes to a signal source, start an acquisition, and
verify that the acquired data is displayed in either the listing or waveform
windows.
If available, use the TLACAL2 fixture to run the performance verification. For
further details, refer to the performance verification procedure in the TLA7Axx
Logic Analyzer Module Service Manual.
P68XX Series Logic Analyzer Probes Instruction Manual
4- 1
Maintenance
Inspection and Cleaning
CAUTION. To prevent damage during the probe connection process, do not touch
the exposed edge of the elastomer.
To maintain a reliable electrical contact, keep the probes free of dirt, dust, and
contaminants. Remove dirt and dust with a soft brush. For more extensive
cleaning, use only a damp cloth. Never use abrasive cleaners or organic solvents.
Repackaging Instructions
Use the original packaging, if possible, to return or store the probes. If the
original packaging is not available, use a corrugated cardboard shipping carton.
Add cushioning material to prevent the probes from moving inside the shipping
container.
Enclose the following information when shipping the probe to a Tektronix
Service Center.
HOwner’s address
HName and phone number of a contact person
HType of probe
HReason for return
HFull description of the service required
4- 2
P68XX Series Logic Analyzer Probes Instruction Manual
Replaceable Parts
Replaceable Parts
This chapter contains a list of the replaceable components for the P6810, P686x
and P6880 Probes. Use this list to identify and order replacement parts.
Parts Ordering Information
Replacement parts are available through your local Tektronix field office or
representative.
Changes to Tektronix products are sometimes made to accommodate improved
components as they become available and to give you the benefit of the latest
improvements. Therefore, when ordering parts, it is important to include the
following information in your order.
HPart number
HInstrument type or model number
HInstrument serial number
HInstrument modification number, if applicable
If you order a part that has been replaced with a different or improved part, your
local Tektronix field office or representative will contact you concerning any
change in part number.
Using the Replaceable Parts List
Replaceable Parts
The P6810 probe contains no user-replaceable parts, while the P686x and P6880
compression probes contain only the elastomer as a replaceable part. If probe
failure occurs, return the entire probe to your Tektronix service representative for
repair.
P68XX Series Logic Analyzer Probes Instruction Manual
5- 1
Replaceable Parts
Refer to the following list for replaceable items:
Parts list column descriptions
ColumnColumn nameDescription
1Figure & index numberItems in this section reference figure and index numbers to t he exploded view illustrations that
follow.
2Tektronix part numberUse this part number when ordering replacement parts from Tektronix.
3 and 4Serial numberColumn three indicates t he serial number at which the part was first effective. Column four
indicates the serial number at which the part was discontinued. No entries indicates the part is
good for all serial numbers.
5QtyThis indicates the quantity of parts used.
6Name & descriptionAn item name is separated from the description by a colon (:). Because of space limitations, an
item name may sometimes appear as incomplete. Use the U.S. Federal Catalog handbook
H6-1 for further item name identification.
7Mfr. codeThis indicates the code of the actual manufacturer of the part.
8Mfr. part numberThis indicates the actual manufacturer’s or vendor’s part number.
Abbreviations
Mfr. Code to Manufacturer
Cross Index
Abbreviations conform to American National Standard ANSI Y1.1--1972.
The table titled Manufacturers Cross Index shows codes, names, and addresses
of manufacturers or vendors of components listed in the parts list.
Manufacturers cross index
Mfr.
code
80009TEKTRONIX INC14150 SW KARL BRAUN DR
ManufacturerAddressCity, state, zip code
PO BOX 500
BEAVERTON, OR 97077--0001
5- 2
P68XX Series Logic Analyzer Probes Instruction Manual
Replaceable Parts
P6810 replaceable parts list
Figure
& index
number
5--1
-1010--6810--101GENERAL PURPOSE PROBE (INCLUDES SHEET OF LABELS
-6352--1097--004PODLET HOLDER80009352--1097--00
-2196--3471--002P6810 LEADSET, 1 CH SINGLE--ENDED AND DIFFERENTIAL80009196-- 3471-- 00