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Warranty
Tektronix warrants that this product will be free from defects in materials and workmanship for a period of one (1)
year from the date of shipment. If any such product proves defective during this warranty period, Tektronix, at its
option, either will repair the defective product without charge for parts and labor, or will provide a replacement
in exchange for the defective product. Parts, modules and replacement products used by Tektronix for warranty
work may be n
the property of Tektronix.
ew or reconditioned to like new performance. All replaced parts, modules and products become
In order to o
the warranty period and make suitable arrangements for the performance of service. Customer shall be responsible
for packaging and shipping the defective product to the service center designated by Tektronix, with shipping
charges prepaid. Tektronix shall pay for the return of the product to Customer if the shipment is to a location within
the country in which the Tektronix service center is located. Customer shall be responsible for paying all shipping
charges, duties, taxes, and any other charges for products returned to any other locations.
This warranty shall not apply to any defect, failure or damage caused by improper use or improper or inadequate
maintenance and care. Tektronix shall not be obligated to furnish service under this warranty a) to repair damage
result
b) to repair damage resulting from improper use or connection t o incompatible equipment; c) to repair any damage
or malfunction caused by the use of non-Tektronix supplies; or d) to service a product that has been modified or
integrated with other products when the effect of such modification or integration increases the time or difficulty
of servicing the product.
THIS WARRANTY IS GIVEN BY TEKTRONIX WITH RESPECT TO THE PRODUCT IN LIEU OF ANY
OTHER WARRANTIES, EXPRESS OR IMPLIED. TEKTRONIX AND ITS VENDORS DISCLAIM ANY
IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE.
TRONIX’ RESPONSIBILITY TO REPAIR OR REPLACE DEFECTIVE PRODUCTS IS THE SOLE
TEK
AND EXCLUSIVE REMEDY PROVIDED TO THE CUSTOMER FOR BREACH OF THIS WARRANTY.
TEKTRONIX AND ITS VENDORS WILL NOT BE LIABLE FOR ANY INDIRECT, SPECIAL, INCIDENTAL,
OR CONSEQUENTIAL DAMAGES IRRESPECTIVE OF WHETHER TEKTRONIX OR THE VENDOR HAS
ADVANCE NOTICE OF THE POSSIBILITY OF SUCH DAMAGES.
[W2 – 15AUG04]
btain service under this warranty, Customer must notify Tektronix of the defect before the expiration of
ing from attempts by personnel other than Tektronix representatives to install, repair or service the product;
Optional Service ManualsSelf-service documentation for modules
Collection of logic analyzer application
cific notes
spe
TLA Product specifications and
performance verification procedures
tailed information for controlling the
De
logic analyzer using .NET
Upgrade information for your logic
analyzer
and mainframes
P6800 Series Logic Analyzer Probes Instruction Manualv
Preface
Commonly Used
Compression Footprint
Differential Input
Amplitude Definition
Terms
Refer to the following list of c ommonly u sed terms throughout the manual.
A connectorless, solderless contact between your PCB and the P6860 and P6880
Probes. Connection is obtained by applying pressure between your PCB and
the probe through a Z-axis elastomer.
For differential signals, the magnitude of the difference voltage Vmax–Vmin (and
Vmin–Vmax) must be greater than or equal to 150 mV. (See Figure i.)
Figure i: Differential input amplitude
Functional Check
Procedure
Keepout Area
Module
Module End
viP6800 Series Logic Analyzer Probes Instruction Manual
Functional check procedures verify the basic functionality of the probes by
confirming that the probes recognize signal activity at the probe tips.
The area of the printed circuit board in which only probe components may be
mounted.
The unit that plugs into a mainframe which provides instrument capabilities such
as logic analysis.
The end of the probe which plugs into the module unit.
Preface
PCB
Podlet
Podlet Holder
Probe
An acronym for P
A circuit contained in a flex lead and attached to a probe which provides
square-pin connections to the circuit under test for one data acquisition channel
and a reference pin.
A removable clip that groups eight individual podlets into a single 8-wide P6810
Probe assembly. This provides ease when connecting to a row of 2 x 8 2.54 mm
(0.100 in) square pins.
Thedevicethatconnectsamodulewithatargetsystem.
rinted Circuit Board; also known as Etched Circuit Board (ECB).
Figure ii: Probe example
Probe Adapter
Probe Head
SMT KlipChip
P6800 Series Logic Analyzer Probes Instruction Manualvii
A device that connects the LA module probe to a target system.
The end of the probe is connected to the target system or probe adapter. (See
Figure ii.)
An interface device for attaching logic analyzer probes to components with a
maximum lead diameter of 2.413 mm (0.095 in) and stackable on component lead
centers of 1.27 mm (0.050 in).
Preface
Way Station
Z-axis eLastomer
An intermediat
Probes to a single ribbon cable. (See Figure ii.)
Silicone-based material containing vertical wires that conduct only in the z-axis.
e probe part is used to connect the heads of the P6810 and P6880
viiiP6800 Series Logic Analyzer Probes Instruction Manual
Operating Basics
Product Description
This section provides a brief description of the Tektronix P6800 Logic Analyzer
Probes and adapters, information on attaching color-coded probe labels, and probe
and adapter c
onnection instructions from the logic analyzer to the target system.
The P6800 L
Logic Analyzer modules to a target system. The P6800 probes can be used with
both TLA7Axx and TLA7Bxx modules. The P6810, P6860, and P6880 probes
consist of 34 channels, while the P6864 probe consists of 17 channels.
NOTE. References to TLA7Axx Series Logic Analyzers also apply to TLA7Bxx
Series Logic Analyzers unless stated.
You can connect the P6810 probe to the target system through podlet holders or
leadsets. In addition, a variety of leadsets, SMT KlipChips and adapters aid in
your c
The P6860 probe can be connected using a compression land pattern or a Mictor
ctor using the Mictor-on-PCB to P6434 to Compression adapter.
conne
The P6880 probe is designed for connection only to the compression land pattern
gured for differential signals. The P6880 is not compatible with either the
confi
Mictor-on-PCB to P6860 probe adapter or the Compression-on-PCB to P6434
probe adapter.
The P6864 probe can be connected through the use of the compression land
pattern. Note that the P6864 is designed to minimize the needed area on the
circuit board for connections when using the quarter-channel mode in the logic
analyzer module.
ogic Analyzer Probes connect a TLA7Axx and TLA7Bxx Series
onnection to the target system.
P6800 Series Logic Analyzer Probes Instruction Manual1
Operating Basics
P6810 General Purpose
Probe
The P6810 Probe
is a 34-channel, general purpose probe. (See Figure 1.)
Figure 1: P6810 General Purpose probe
NOTE. Remember to connect the ground lead of the way station to the target
m to improve signal integrity.
syste
The following list details the capabilities and qualities of the P6810 Probe:
34 individual active channel podlets
Differential and single-ended data, clock and qualification inputs
2 mm (0.079 in) and 2.54 mm (0.1 in) podlet and leadset connection capability
Maximum nondestructive input voltage
adset support for both single-ended and differential applications
Le
Podlet holder for 8-channel applications
Color-coded signal connectors
–2.5 V to +5 V input operating range
Minimal loading of <1 pF and 20 kΩ to ground
2P6800 Series Logic Analyzer Probes Instruction Manual
Operating Basics
P6810 Leads et Adapters
and Accessories
Operation in no
Any common mode voltage is acceptable so long as the maximum positive
voltage does n
exceed –2.5 V
NOTE. Single podlet input capacitance is 0.7 pF, but in a group, each podlet will
have 1 pF input capacitance.
Leadsets enhance flexible access to the target system signals b y allowing
single-pin podlet connections of signals and grounds. This allows the separation
of ground and signal connections, providing flexible access to the PCB and
backplane connections where signals are not easily accessible together. The
following leadsets and accessories accompany the P6810 General Purpose Probe.
1-Channel single-ended and differential leadset. Supports individual
leadset connections to backplanes and other connection points requiring
-ended 2 mm (0.079 in) and 2.54 mm (0.1 in) connections. Both leads
single
contain 150 Ω damping resistors in the lead tips.
to backplanes and other multiple, dense, single-end connections in a
2 mm (0.079 in) and/or 2.54 mm (0.1 in) pin array. Two common ground
connections for all input signals. The positive leads contain 150 Ω damping
resistors and the leadset housing contains a 150 Ω damping resistor in the
ground path of each channel.
rmal or inverted polarity is acceptable
ot exceed +5 V and the maximum negative voltage does not
8-Channel differential leadset (optional accessory). Supports individual
leadset connections to backplanes and other multiple, dense, differential
nnections in a 2 mm (0.079 in) and/or 2.54 mm (0.1 in) pin array. Individual
co
+and− leads for each differential signal input. All leads contain 150 Ω
damping resistors in the lead tips.
SMT KlipChip. An interface device for attaching logic analyzer probes
to components with a maximum lead diameter of 2.413 mm (0.095 in) and
a stackable on lead center of 1.27 mm (0.050 in).
Podlet holders. Removable clip that groups eight individual podlets into a
single 8-wide probe assembly. This provides ease when connecting to a row
of 2 x 8 2.54 mm (0.1 in) square pins.
P6800 Series Logic Analyzer Probes Instruction Manual3
Operating Basics
Figure 2: P6810 probe leadset adapters and accessories
4P6800 Series Logic Analyzer Probes Instruction Manual
Operating Basics
P6860 High-Density Probe
The P6860 Probe
of two independent probe heads of 17 channel connectors each (16 data and
1 clock/qualifier).
Figure 3: P6860 High-Density probe
is a 34-channel, high-density probe. (See Figure 3.) It consists
The following list details the capabilities and qualities of the P6860 Probe:
Differential or single-ended clock and qualification inputs
Single-ended data inputs
Compression contact eliminates need for built-in connector
Land pattern supports direct signal pass-through
Supports PCB thickness of 1.27 mm to 3.81 mm (0.050 in to 0.150 in)
Consists of two independent probe heads of 17 channels each (16 data and
1 clock/qualifier)
Narrow 17-channel probe head makes for ea sie r placement and layout
2X mode, (for example, 1:2 demultiplexing) uses single-probe head
4X mode, (for example, 1:4 demultiplexing) uses one-half of the probe head
Similar channel density to current Mictor connectors
Color-coded keyed signal connectors
Adapter supports Mictor-based connections
−2.5 V to +5 V input operating range
Minimal loading of 0.7 pF @ 20 kΩ to ground loading
P6800 Series Logic Analyzer Probes Instruction Manual5
Operating Basics
P6864 High-Density 4X
Probe
Operationinno
Any common mode voltage is acceptable so long as the maximum positive
voltage does not exceed +5 V and the maximum negative voltage does not
exceed −2.5 V (clock only)
The P6864 Probe is a 17-channel, high-density 4X probe. (See Figure 4.) It
consists of a single independent probe head containing 17 channel connectors (16
data and 1 clock/qualifier) and two module connectors.
rmal or inverted polarity is acceptable (clock only)
Figure 4: P6864 High-Density 4X probe
The following list details the capabilities a nd qualities of the P6864 probe:
Differential or single-ended clock and qualification inputs
Single-ended data inputs
Compression contact eliminates need for built-in connector
Land pattern supports direct signal pass-through
Supports PCB thickness of 1.27 mm to 3.81 mm (0.050 in to 0.150 in)
Consists of one independent probe head containing 17 channels (16 data and
1 clock/qualifier)
Narrow 17-channel probe head makes for increased placement and layout
density when using 4X mode, (for example, 1:4 demultiplexing)
Color-coded keyed signal connectors
6P6800 Series Logic Analyzer Probes Instruction Manual
Operating Basics
P6880 High-Density
Differential Probe
−2.5 V to +5 V inp
Minimal loading of 0.7 pF @ 20 kΩ to ground loading
Operation in normal or inverted polarity is acceptable (clock only)
Any common mode voltage is acceptable so long as the maximum positive
voltage does not exceed +5 V and the maximum negative voltage does not
exceed −2.5 V (clock only)
The P6880 Probe is a 34-channel, high-density differential probe. (See Figure 5.)
It consists of four independent probe heads of 8/9 channels each.
ut operating range
Figure 5: P6880 High-Density Differential probe
The following list details the capabilities and qualities of the P6880 Probe:
High-density probe mechanical packaging at half the channel density in the
probe head
Differential data, clock and qualification inputs (single-ended signals may be
probed if negative input is grounded)
Same compression land pattern as High-Density Probe eliminates need for
built-in connector
Land pattern supports direct signal pass-through
Supports PCB thickness of 1.27 mm to 3.81 mm (0.050 in to 0.150 in)
P6800 Series Logic Analyzer Probes Instruction Manual7
Operating Basics
Consists of fou
clock/qualifier) for a total of 34 channels
2X mode (1:2 de
board rea l estate
4X mode (1:4
board rea l estate
Color-code
−2.5 V to +5 V input operating range
Minimal loading of 0.7 pF @ 20 kΩ to ground loading
Operation in normal or inverted polarity is acceptable
Any common mode voltage is acceptable so long as the maximum positive
voltage does not exceed +5 V and the maximum negative voltage does not
exceed −2.5 V
NOTE. You can find more information about the P6880 probe routing and pin
out in t
page 47.)
he P6880 Differential Probe Land Footprint section. (See Figure 20 on
r probe heads supporting 8/9 channels each (nine with
multiplexing) uses two probe heads to minimize required
demultiplexing) uses one probe head to minimize required
d keyed signal connectors
Mictor-on-PCB to P6860
Compression Adapter
ictor-on-PCB to P6860 Compression adapter allows existing microprocessor
The M
support packages and your hardware designs with embedded Mictor connectors to
be connected to the P6860 High-Density Probe. (See Figure 6 on page 9.)
TheCLKpinontheMictorisconnectedtotheCLK+pinofthecompression
footprint. The CLK− pin of the compression footprint is tied to ground. This
allows the differential clock input o f the P6860 probe to function as a single-ended
signal.
This adapter supports standard Mictor connector footprints and signal connections
on older logic analyzer designs.
Differential qualification and clock signals are not supported through the
Mictor-on-PCB to Compression adapter due to Mictor footprint limitations (only
+ side of clock and qualifier signals are supported).
The Mictor adapter adds 2.7 pF to the high-density compression probe load of
0.7 pF for a combined adapter and probe capacitance load of 3.4 pF.
8P6800 Series Logic Analyzer Probes Instruction Manual
Operating Basics
Figure 6: Mictor-on-PCB to P6860 Compression adapter
NOTE. The compression adapter is labeled with J1 and J2 signal identifiers to
assist you with correctly locating the probe heads on the compression adapter.
igure 6.) Each probe-head label contains channel information that y ou
(See F
compare with information contained in the Signal-name column to determine the
signal to which you connect the probe head. (See Table 13 on page 37.)
You c an find more information about comparing the clearances between the
P6434 and P6800 probes in the Compression-on-PCB to P6434 Mictor Adapter
section. (See Figure 8 on page 11.)
P6800 Series Logic Analyzer Probes Instruction Manual9
Operating Basics
Compression-on-PCB to
P6434 Mictor Adapter
The Compressio
TLA6xx, and TLA7Lx/Mx/Nx/Px/Qx logic analyzers using a P6434 Probe to take
advantage of the new compression footprint. (See Figure 7 on page 10.) This also
eliminates the need for Mictor connectors in your target system.
NOTE. To use the P6434 adapter, do not install press-in nuts. However, if board
thickness is > .093 in, you will need to install press-in nuts before migrating
to P6800 pro
Twodifferentscrewlengthsarerequiredtoaccommodatethe1.27mmto3.81mm
(0.050 in to 0.150 in) PCB thickness range.
This adapter requires the use of the Compression-on-PCB to P6434 Mictor
adapter land footprint. (See Figure 22 on page 51.)
The Compression-on-PCB to Mictor adapter adds 1.5 pF to the P6434 probe load
of 2.0 pF for a combined adapter and probe capacitance load of 3.5 pF.
n-on-PCB to P6434 Mictor adapter allows the TLA5000,
bes.
gure 7: 34-Channel Compression-on-PCB to P6434 Mictor adapter
Fi
10P6800 Series Logic Analyzer Probes Instruction M anual
Operating Basics
You can compare
P6434 Probe connection using the 34-Channel Compression-on-PCB to P6434
Mictor adapter. (See Figure 8 on page 11.) Note that the difference in clearance
between the P6434 Probe connection and the P6434 Probe connection using the
Compression-on-PCB to P6434 Mictor adapter is 3.68 mm (0.145 in).
NOTE. In addition to the 34-Channel Compression-on-PCB to P6434 Mictor
adapter, Te
This 17-channel adapter is identical to the 34-channel adapter except that the
posts that go through the circuit board are mounted such that it can connect to a
single 17-channel footprint instead of two 17-channel footprints in a side-by-side
configuration. See the Replaceable Parts section of this manual for an illustration
of both adapters). (See Figure 38 on page 71.)
ktronix also offers a 17-Channel Compression to Mictor adapter.
the clearance between the P6434 Probe connection and the
Figure 8: Clearance for probe connection using Compression-on-PCB to P6434 Mictor adapter
P6800 Series Logic Analyzer Probes Instruction Manual11
Operating Basics
Attaching Probe Labels
When you purchase a TLA7Axx logic analyzer module, you receive the probes
with all labels already attached.
However, if you purchase additional probes for the logic analyzer module, you will
need to apply the color-coded labels. You will find a d etailed description of how
to attach the labels in the following instructions on the TLA Documentation CD:
P6810 General Purpose Logic Analyzer Probe Label Instructions
P6860 High Density Logic Analyzer Probe Label Instructions
P6864 High Density 4X Logic Analyzer Probe Label Instructions
P6880 Hig
h Density Differential Logic Analyzer Probe Label Instructions
Connecting the Probes to the Logic Analyzer
Connect
Figure 9.)
1. Identi
2. Align the beveled edges of the connector to its mating connector on the logic
3. Use care to evenly tighten both screws on the module end of the probe until
NOTE. All P6800 series Logic Analyzer probes can be connected to the logic
analyzer when it is powered on. In addition, all P6800 series Logic Analyzer
probes connect to the logic analyzer in exactly the same manner.
the probes to the logic analyzer according to the following steps. (See
fy the beveled edges of the connector inside the module end of the probe.
zer module and press into place.
analy
are snug. First slightly tighten both screws, then snug each screw to
they
4 in-lbs (max).
12P6800 Series Logic Analyzer Probes Instruction M anual
Operating Basics
Figure 9: Connecting the probes to the logic analyzer
Cleaning the P686x and P6880 Compression Footprints
CAUTION. To avoid electrical damage, always turn off the power of your target
system
Before you connect the probe to the target system, you must properly clean
the c
compression footprints:
1. Use a
2. Rem
NOTE. Use alcohol sparingly and be sure that you have removed any remaining
lint or residue with the nitrogen air gun.
before cleaning the compression footprint.
ompression footprints on your board. Follow these steps to clean the
lint-free cloth moistened with isopropyl alcohol and gently wipe the
footprint surface.
ove any remaining lint using a nitrogen air gun.
P6800 Series Logic Analyzer Probes Instruction Manual13
Operating Basics
Cleaning the P
686x and P6880 Probe Heads
Before connecting the P686x and P6880 Probes to the target system, ensure that
the probe heads are free from dust, dirt, and contaminants. If necessary, clean t he
probe heads a
CAUTION. Static discharge can damage semiconductor components in the probe
head. Always wear a grounded antistatic wrist strap whenever handling the probe
head. Also verify that anything to which the probe head is connected does not
carry a static charge.
NOTE. Never clean the elastomers. Always replace them instead. Refer to the
Replaceable Parts section of this manual for information on ordering parts.
1. Remove the elastomer holder.
2. Moisten a cotton swab with isopropyl alcohol.
ccording to the following steps.
Figure 10: Cleaning the probe heads
3. Gently wipe the edge print pads of the hybrid.
4. Remove any remaining lint using a nitrogen air gun.
5. Put the elastomer holder back in place.
CAUTION. Be careful not to touch the elastomers to avoid damaging the probe
contacts. Also, do not reverse the elastomer as this will transfer contaminants.
14P6800 Series Logic Analyzer Probes Instruction M anual
Operating Basics
Storing the P6
86x and P6880 Probe Heads
To protect the elastomer, it is important to properly store the probe heads when the
probes are not in use. (See Figure 11.)
1. Locate the keying pin on the probe end and align it to the keying pin hole on
the nut bar.
2. While holding the probe end at a perpendicular angle to the n ut bar, loosely
attach both probe head screws.
Figure 11: Storing the probe heads
P6800 Series Logic Analyzer Probes Instruction Manual15
Operating Basics
Connecting th
Connecting the P6810
General Purpose Probe
e Probes to the Target System
To perform the steps that follow, connect the probe to the target system. (See
Figure 12 on page 17.) You can connect the probe heads to the target system
without turn
CAUTION. To avoid damaging the probe and target system, always position
the probe perpendicularly to the mating connector and then connect the probe.
Incorrect handling of the probe while connecting it to the target system can result
in damage to the probe or to the mating connector in the target system.
1. Connect the probe end to the square pins on the PCB.
2. If you are using the single-ended leadset, connect the negative input to ground
on the PCB. If you are using the optional differential leadset, connect the
positive side of the podlet to the positive side of the signal on the PCB, and
the negative side of the podlet to the negative side of the signal.
3. Connect the way station ground to ground on the PCB.
ing off the power to the target system.
16P6800 Series Logic Analyzer Probes Instruction M anual
Operating Basics
Figure 12: Connecting the P6810 probe to the target system
P6800 Series Logic Analyzer Probes Instruction Manual17
Operating Basics
Connecting the P686x
High Density and P6880
Differential Probes
Connect the P68
system. (See Figure 14 on page 20.) You can connect the probes to the target
system without turning off the power to the target system.
Installing the Correct Elastomer Holder. If the PCB is ≤ .093 in, use the thin
elastomer holder with the nut bar. If the PCB is > .093 in, use the thick elastomer
holder with
Nut Bar
1. Press the nut bar backing plate into the two holes on the underside of the
compression footprint on the PCB.
2. Locate the keying pin on the probe end and align it to the keying pin hole
on the PCB.
3. While holding the probe end perpendicularly to the PCB, finger-tighten
(typically, ½ in-lbs) both probe head screws until snug, not to exceed 1 in-lbs.
You are encouraged to use a torque wrench to ensure proper tightness to the
probe-
CAUTION. When attaching the probe head to the target system, you must use care
to evenly tighten probe head screws until they are snug. First tighten both screws
until the nut bar makes contact with the board surface, then snug each screw to
1 in-lbs (max). Under-tightening the probe head screws can result in intermittence.
Over-tightening can result in damage to the elastomer holder and stripped screws.
6x High-Density and P6880 Differential Probes to the target
the press-in nuts.
head screws.
18P6800 Series Logic Analyzer Probes Instruction M anual
Operating Basics
Press-in Nuts
1. Install the press-in nuts on the PCB by following the manufacturer’s
installation
procedure. You can find more details on press-in nut installation
in the following illustration. (See Figure 13 on page 19.)
Figure 13
2. Locate t
: Press-in Nuts installation
he keying pin on the probe end and align it to the keying pin hole
on the PCB.
3. While h
(typically,
olding the probe end perpendicularly to the PCB, finger tighten
1
/2in-lbs) both probe head screws until snug, not to exceed 1 in-lbs.
You are encouraged to use a torque wrench to ensure proper tightness to the
probe-head screws.
CAUTION. When attaching the probe head to the target system, you must use care
to evenly tighten probe head screws until they are snug. First slightly tighten both
ws, then snug each screw to 1 in-lbs (max). Under-tightening the probe head
scre
screws can result in intermittence. Over-tightening can result in damage to the
elastomer holder and stripped screws.
P6800 Series Logic Analyzer Probes Instruction Manual19
Operating Basics
Figure 14: Connecting the P686x and P6880 probes to the target system
NOTE. The compression adapter is labeled with J1 and J2 signal identifiers to
assist you with correctly locating the probe heads on the compression adapter.
e Figure 6 on page 9.) Each probe-head label contains channel information
(Se
that you can compare with information contained in the Signal-name column to
determine the signal to which you connect the probe head. (See Table 13 on
page 37.)
20P6800 Series Logic Analyzer Probes Instruction M anual
Operating Basics
Connecting the
Mictor-on-PCB to P6860
Compression Adapter
(Applies to P6860 Probe
Only)
The Mictor-onolder logic analyzer modules and probes to connect to the compression footprint.
(See Figure 6 on page 9.) You can connect the adapter to the target system without
turning off the target system. Connect the adapter according to the following steps.
NOTE. Be sure to use the thin elastomer holder. A thin elastomer is black and
does not have the protruding rib. (See Figure 14 on page 20.)
1. While hold
probe end into the adapter and finger-tighten the screws until snug, not to
exceed 1 in.-lbs.
2. Connect the second probe end to the adapter in the same manner.
3. Press th
on the PCB.
This ad
on older logic analyzer designs.
The dif
Mictor-on-PCB to P6860 Compression adapter due to the Mictor footprint
limitations (only + side of clock and qualifier signals are s upported).
apter supports standard Mictor connector footprints and signal connections
ferential qualification and clock signals are not supported through the
PCB to P6860 Compression adapter allows existing applications of
ing the first probe end perpendicularly to the adapter, place the
e connected probe ends and adapter into the existing Mictor connector
Connecting the
Compression-on-PCB
to P6434 Mictor Adapter
The Mictor adapter adds 2.7 pF to the High-Density Compression probe load of
0.7 pF for a combined adapter and probe capacitance load of 3.4 pF.
Compression-on-PCB to P6434 Mictor adapter allows you to connect the
The
compression footprint to the Mictor connector pins used by the P6434 Probe. (See
Figure 7 on page 10.) You can connect the adapter to the target system without
turning off the target system. Connect the adapter according to the following steps.
NOTE. To use this adapter do not install press-in nuts. However if board thickness
is >.093 in, you will need to install press-in nuts before migrating to P6800 probes.
1. Place the adapter perpendicularly on top of the compression footprint.
2. Place the backing plate on the underside of the PCB.
P6800 Series Logic Analyzer Probes Instruction Manual21
Operating Basics
3. Connect the bac
holes from the underside of the PCB and finger-tighten (typically,
king plate by sliding the two screws into the existing screw
1
/2in-lbs)
the screws until snug, not to exceed 1 in-lbs. You are encouraged to use a
torque wrench to ensure proper tightness to the probe head screws.
CAUTION. When attaching the probe head to the target system, you must use care
to evenly tighten probe head screws until they are snug. First slightly tighten both
screws, the
n snug each screw to 1 in-lbs (max). Under-tightening the probe head
screws can result in intermittence. Over-tightening can result in damage to the
elastomer holder and stripped screws.
4. Plug the P
6434 Probe into the adapter.
Screws of two different lengths are provided to attach the adapter to your PCB.
The leng
th of the screw you need depends on the thickness of the PCB (0.050 in
to 0.150 in).
This ad
apter requires use of the Compression-on-PCB to P6434 Mictor
adapter land footprint. For further dimensional information, refer to the
Compression-on-PCB to P6434 Mictor adapter land footprint section. (See
Figure 22 on page 51.)
22P6800 Series Logic Analyzer Probes Instruction M anual
Reference
This section provides reference information and specifications for the P6810
General Purpose, P6860 High-Density, P6864 High-Density 4X, and P6880
High-Densit
Designing an Interface Between the P6800 Probes and a Target System
y Differential Probes.
Signal Fixturing
Considerations
Once you ha
to design the appropriate connector into your target system board. The following
topics are in this section:
Signal fixturing considerations
Signal co
Mechanical considerations
Electrical considerations
This section contains the following information to consider for signal fixturing:
Clocks and qualifiers
Merge
Demultiplexing multiplexed busses
Half-channel and quarter-channel clocking modes (Internal 2X and 4X)
Probing analog signals
Range recognition
ve determined which probe is required, use the following information
nnections (signal names and land footprints)
d modules and source synchronous clocking
Clocks and Qualifiers. Every logic analyzer has some special purpose input
channels. Inputs designated as clocks can cause the analyzer to store data.
ualifier channels can be logically AND’ed and OR’ed with clocks to further
Q
define when the analyzer should latch data from the system under test. Routing the
appropriate signals from our design to these inputs ensures that the logic analyzer
can acquire data correctly. Unused clocks can be used as q ualifier signals.
Depending on the channel width, each TLA7Axx Series logic analyzer module
will have different set of clock and qualifier channels. The following table shows
the clock and qualifier channel availablility for each module.
P6800 Series Logic Analyzer Probes Instruction Manual23
Reference
Table 1: Logic a
Module
TLA7AA1
TLA7AA2, TLA7AB2,
TLA7AC2, and
TLA7BB2
TLA7AA3, TLA7AC3,
and TLA 7BB3
TLA7AA4, TLA7AB4,
TLA7AC4, TLA7BB4,
and TLA7BC4
nalyzer clock and qualifier availability
Clock inputsQualifier inputs
CLK:0CLK:1CLK:2CLK:3QUAL:0QUAL:1QUAL:2QUAL:3
All clock and qualifier channels are stored. The analyzer always stores the logic
state of these channels every time it latches data.
Since clock and qualifi er channels are stored in the analyzer memory there is no
need to double probe these signals for timing analysis. When switching from state
to timing analysis modes all of the clock and qualifier signals will be visible. This
also allows you to route regular signals, those not needed for clocking, to these
channels when they are not being used for their special purpose.
It is a good p ractice to take advantage of these channels to increase your options
for when you will latch data . Routing s everal of your design’s clocks and strobes
to the analyzer clock inputs will provide you with a greater flexibility in the logic
analyzer clocking setup menus.
As an example, look at a microprocessor with a master clock, a data strobe, and
an address strobe. Routing all three of these signals to analyzer clock inputs will
enable you to latch data on the processor master clock, only when data is strobed,
or only when address is strobed. Some forethought in signal routing can greatly
expand the ways in which you can latch and analyze data.
A microprocessor also provides a good example of signals that can be useful
as qualifiers. There are often signals that indicate data reads versus data writes
(R/W), signals that show when alternate bus masters have control of the processor
busses (DMA), and signals that show when various memory devices are being
used (ChipSel). All of these signals are good candidates for assignment to
qualifier channels.
By logically AND’ing the clock with one of these qualifiers you can program
the analyzer to store only data reads or data writes. Using the DMA signal as a
qualifier provides a means of filtering out alterna te bus master cycles. Chip selects
can limit data latching to specific memory banks, I/O ports, or peripheral devices.
Merged Module Sets and Source Synchronous Clocking. TLA7Axx analyzer
modules that are 102-channels or 136-channels wide can be merged together to
act as a single logic analyzer with a larger channel count. Up to five modules
can be merged to provide up to a 680-channel analyzer. A unique feature of the
24P6800 Series Logic Analyzer Probes Instruction M anual
Reference
TLA7Axx module
these two capabilities provide some additional considerations for signal routing.
Source synchr
system clock and the data bus by requiring the sending device to drive an actual
clock or strobe signal along with the data that is very tightly coupled with it in
terms of skew. The receiving device then uses this strobe to capture the data.
A variant of this scheme is being applied to large microprocessor busses, where
the bus is split into smaller, more easily managed groups that each have their own
dedicated strobe. Although the timing relationship between a particular clock and
its associated data group is very tight, the timing between the different groups can
vary grea
Many source synchronous designs use wide busses. It is not uncommon to require
asetofm
probing larger source synchronous systems. While all of the modules in a merged
set can use their clock inputs independently if needed, you must remember that
there are a maximum of four clock inputs on a 1 36 channel wide module.
To see the importance of this we will once again use a microprocessor system
as an example. A Tektronix logic analyzer processor has a 32-bit address bus
and a 64-bit data bus. The data bus is split into four 16-bit subgroups that have
independent source synchronous clocks. For the logic analyzer to correctly
acqu
bus and one each for the four 16-bit data bus subgroups.
tly and changes depending on which device has control of the bus.
erged logic analyzer modules to provide the channel count needed in
ire data from this system it will need five clock inputs, one for the address
is that it supports source synchronous clocking. Combining
onous clocking is a method which manages the skew between the
cquire both busses the analyzer would need at least 96 channels (32 address
To a
and 64 data). However, a single 102-channel card does not have the required five
clock inputs. By merging two 102-channel modules into a set you can obtain
the needed number of clock inputs. Route the address bus to one module in the
set and route the data bus, along with its four source synchronous clocks, to the
second module in the set.
Demultiplexing Multiplexed Busses. The TLA7Axx module supports both 2X
and 4X demultiplexing. Each signal on a dual or quad multiplexed bus can be
demultiplexed into its own logic analyzer channel. Refer to the following tables to
determine which channel groups to connect to feed the test data to channels in the
target system. (See Table 2.) (See Table 3.)
P6800 Series Logic Analyzer Probes Instruction Manual25
Reference
Table 2: 2X Demu
Base connecting
channel groupsTLA7AA4TLA7AA3TLA7AA2TLA7AA1TLA7AB4TLA7AB2
Base connecting
channel groupsTLA7AA4TLA7AA3TLA7AA2TLA7AA1TLA7AB4TLA7AB2
C3:7-0C2:7-0
A1:7-0A0:7-0
A3:7-0A2:7-0
E3:7-0E2:7-0
CLK:3CLK:2
CLK:1CLK:0
Prime channels receiving target system test data
A3:7-0
A2:7-0
C2:7-0
A0:7-0
D1:7-0
D0:7-0
——
——
C1:7-0
C0:7-0
D1:7-0
D0:7-0
D3:7-0
D2:7-0
E1:7-0
E0:7-0
QUAL:3
QUAL:2
QUAL:1
QUAL:0
C2:7-0
C1:7-0
C0:7-0
A0:7-0
D1:7-0
D0:7-0
A2:7-0
D3:7-0
D2:7-0
———
———
CLK:0
QUAL:1
QUAL:0
A3:7-0
A2:7-0
C2:7-0
—
C2:7-0
C1:7-0
C0:7-0
A0:7-0
D1:7-0
D0:7-0
A2:7-0
D3:7-0
D2:7-0
E2:7-0
E1:7-0
E0:7-0
CLK:2
QUAL:3
QUAL:2
CLK:0
QUAL:1
QUAL:0
A3:7-0
A2:7-0
C2:7-0
A0:7-0
D1:7-0
D0:7-0
—
—
—
—
When demultiplexing data there is no need to connect the destination channels to
the multiplexed bus. Data from the source channels are routed to the destination
channels internal to the logic analyzer. You can find more information about
the mapping of source channels to destination channels in the DemultiplexingMultiplexed Busses section. (See Table 2.) (See Table 3.)
26P6800 Series Logic Analyzer Probes Instruction M anual
Reference
Demultiplexin
means that the MagniVu memory is filled with data from whatever is connected to
the demultiplexing destination channel probe inputs. This provides an opportunity
to acquire high resolution MagniVu data on a few extra channels. Connecting the
demultiplexing destination channels to other signals will allow viewing of their
activity in the MagniVu memory but not the main memory.
Half-Channel and Quarter-Channel Clocking Modes. Half-channel clocking mode
provides double the normal 500 MHz sample rate on one half of the channels.
By trading half of the analyzers channels the remaining channels can be sampled
at a 1 GHz rate with double the memory depth. Quarter-channel clocking
mode provides quadruple the normal 500 MHz sample rate on one fourth of
the chann
channels can be sampled at a 2 GHz rate with quadruple the memory depth.
For both
routing. (See Table 2.) (See Table 3.) By taking care to assign critical signals to
the demultiplexing source channels you can obtain extra timing resolution where
most needed. Since demultiplexing affects only the main memory you will still
have the MagniVu data available for all of the signals that are disconnected from
the main memory when you switch to the high resolution timing modes.
Probing Analog Signals. TLA7Axx module provides visibility of analog signals
with iView. iView routes the actual signal seen by each channel’s probe through a
high bandwidth path to an analog multiplexer inside of the logic analyzer module.
From the logic analyzer interface you can route a ny input channel to one of the
four output connectors on the module. By connecting the analyzer iView analog
obe outputs to your oscilloscope you can see the analog characteristics of any
pr
signal probed by the logic analyzer.
g affects only the main memory for the destination channels. This
els. By trading three-fourths of the analyzers channels the remaining
of the high resolution timing modes use the same demultiplexing channel
ometimes there are analog signals that would be convenient to have fixtured for
S
easier probing. Signals such as A/D Converter inputs, D/A Converter outputs, low
voltage power supplies, termination voltages, and oscillator outputs are just a few
examples. Routing these signals to unused logic analyzer inputs provides a quick
method of viewing their activity without ever picking up a oscilloscope probe.
Take care to ensure that such signals are voltage limited and will not exceed
the maximum nondestructive input voltage for the logic analyzer probes of
±15 Vpeak.
Range Recognition. When using range recognizers, the probe groups and probe
channels must be in hardware order. Probe groups must be used from the
most-significant probe group to the least-significant probe group based on the
following order:
P6800 Series Logic Analyzer Probes Instruction Manual27
Reference
Probe channels
must be from the most-significant channel to the least-significant
channel based on the following order:
76543210
The above example assumes a 136-channel LA module. The missing channels in
LA modules w
ith fewer than 136 channels are ignored. With merged modules,
range recognition extends across the first three modules: the master module
contains the most-significant channels.
Signal Names
For more in
formation on signal connections for the P6810, P6860, P6864, and
P6880 Probes, refer to the tables starting on this page. Match the alpha character
that precedes the channel identifier (for example, E3:7) to the probe head label.
This will simplify probe connections to the logic analyzer w hen you use the
following tables.
Table 4: P6810 Probe signal connections on 136- and 102-channel modules for probe 4 and probe 3
Signal
namePodlet
Clk/QualClk/QualQ3-Q2-CK0-Q0-
Clk/Qual+Clk/QualQ3+Q2+CK0+Q0+
Data 7-
Data 7+
Data 6-6E3:6-E2:6-E1:6-E0:6-A3:6-A2:6-D3:6-D2:6-
Data 6+6E3:6+E2:6+E1:6+E0:6+A3:6+A2:6+D3:6+D2:6+
Data 5-
Data 5+
Data 4-4E3:4-E2:4-E1:4-E0:4-A3:4-A2:4-D3:4-D2:4-
Data 4+4E3:4+E2:4+E1:4+E0:4+A3:4+A2:4+D3:4+D2:4+
Data 3-3E3:3-E2:3-E1:3-E0:3-A3:3-A2:3-D3:3-D2:3-
Data 3+3E3:3+E2:3+E1:3+E0:3+A3:3+A2:3+D3:3+D2:3+
Data 2-2E3:2-E2:2-E1:2-E0:2-A3:2-A2:2-D3:2-D2:2-
Data 2+2E3:2+E2:2+E1:2+E0:2+A3:2+A2:2+D3:2+D2:2+
Data 1-1E3:1-E2:1-E1:1-E0:1-A3:1-A2:1-D3:1-D2:1-
Data 1+1E3:1+E2:1+E1:1+E0:1+A3:1+A2:1+D3:1+D2:1+
Data 0-0E3:0-E2:0-E1:0-E0:0-A3:0-A2:0-D3:0-D2:0-
Data 0+0E3:0+E2:0+E1:0+E0:0+A3:0+A2:0+D3:0+D2:0+
7
7
5
5
Probe 4 way station for 136-channel module
only
E3:7-E2:7-E1:7-E0:7-A3:7-A2:7-D3:7-D2:7-
E3:7+E2:7+E1:7+E0:7+A3:7+A2:7+D3:7+D2:7+
E3:5-E2:5-E1:5-E0:5-A3:5-A2:5-D3:5-D2:5-
E3:5+E2:5+E1:5+E0:5+A3:5+A2:5+D3:5+D2:5+
Probe 3 way station for 136- and 102-channel
modules
You can find more information on 2X and 4X demultiplexing channel assignments
in the Demultiplexing Multplexed Buses section. (See Table 2 on page 26.) (See
Table 3 on page 26.)
28P6800 Series Logic Analyzer Probes Instruction M anual
Reference
Any differenti
al input, either the differential clock/qualifiers on the P686x
High-density Probe, or all differential data and clock/qualifiers on the P6810
General Purpose Differential Probe and P6880 High-density Differential Probe,
may have their negative input pin grounded and be used as a single-ended input.
Table 5: P6810 Probe signal connections on 102- and 136-channel modules for probe 2 and probe 1
Signal
name
Clk/Qual-Clk/Qual-CK1-CK2-CK3-Q1-
Clk/Qual+Clk/Qual+CK1+CK2+CK3+Q1+
Data 7-
Data 7+
Data 6-6A1:6-A0:6-D1:6-D0:6-
Data 6+6A1:6+A0:6+D1:6+D0:6+
Data 5-
+
Data 5
-
Data 4
4+
Data
2+
Data
a3-
Dat
ta 3+
Da
ta 2-
Da
ata 1-
D
ata 1+
D
Data 0-0A1:0-A0:0-D1:0-D0:0-
Data 0+0A1:0+A0:0+D1:0+D0:0+
Podlet
7
7
5
5
4A1:4-A0:4-D1:4-D0:4-
4A1:4
2A1:2
3A1:
3A1
2A1
1A
1A
Probe 2 way s
modules
A1:7-A0:7-D1:7-D0:7-
A1:7+A0:7+D1:7+D0:7+
A1:5-A0:5-D1:5-D0:5-
A1:5+A0:5+D1:5+D0:5+
+
+
3-
:3+
:2-
1:1-
1:1+
tation for 136- and 102-channel
A0:4
A0:2
A0:
A0
A0
0:1-
A
0:1+
A
+
+
3-
:3+
:2-
D1:4
D1:2
D1:
D1
D1
1:1-
D
1:1+
D
3-
:3+
:2-
+
+
D0:4
D0:2
D0:
D0
D0
D
D
3-
:3+
:2-
0:1-
0:1+
Probe 1 way s
modules
C3:7-C2:7-C1:7-C0:7-
C3:7+C2:7+C1:7+C0:7+
C3:6-C2:6-C1:6-C0:6-
C3:6+C2:6+C1:6+C0:6+
C3:5-C2:5-C1:5-C0:5-
C3:5+C2:5+C1:5+C0:5+
C3:4-C2:4-C1:4-C0:4-
+
+
C3:4+C2:4+C1:4+C0:4+
C3:2+C2:2+C1:2+C0:2+
C3:3-C2:3-C1:3-C0:3-
C3:3+C2:3+C1:3+C0:3+
C3:2-C2:2-C1:2-C0:2-
C3:1-C2:1-C1:1-C0:1-
C3:1+C2:1+C1:1+C0:1+
C3:0-C2:0-C1:0-C0:0-
C3:0+C2:0+C1:0+C0:0+
tation for 136- and 102-channel
You can find more information on 2X and 4X demultiplexing channel assignments
in the Demultiplexing Multplexed Buses section. (See Table 2 on page 26.) (See
Table 3 on page 26.)
Any differential input, either the differential clock/qualifiers on the P686x
High-density Probe, or all differential data and clock/qualifiers on the P6810
General Purpose Differential Probe and P6880 High-density Differential Probe,
may have their negative input pin grounded and be used as a single-ended input.
P6800 Series Logic Analyzer Probes Instruction Manual29
Reference
Table6: P6810P
Signal
name
Clk/QualClk/QualCK1-CK2-CK3-
Clk/Qual+Clk/QualCK1+CK2+CK3+
Data 7-
Data 7+
Data 6-6A1:6-A0:6-D1:6-D0:6-
Data 6+6A1:6+A0:6+D1:6+D0:6+
Data 5-
Data 5+
Data 4-4A1:4-A0:4-D1:4-D0:4-
Data 4+4A1:4+A0:4+D1:4+D0:4+
Data 3-3A1:3-A0:3-D1:3-D0:3-
Data 3+3A1:3+A0:3+D1:3+D0:3+
Data 2-2A1:2-A0:2-D1:2-D0:2-
Data 2+2A1:2+A0:2+D1:2+D0:2+
Data 1-1A1:1-A0:1-D1:1-D0:1-
Data 1+1A1:1+A0:1+D1:1+D0:1+
Data 0-0A1:0-A0:0-D1:0-D0:0-
Data 0+0A1:0+A0:0+D1:0+D0:0+
robe signal connections on 68- and 34-channel modules
Podlet
7
7
5
5
Probe 2 way station for 68-channel module onlyProbe 1 way station for 34-channel
A1:7-A0:7-D1:7-D0:7-
A1:7+A0:7+D1:7+D0:7+
A1:5-A0:5-D1:5-D0:5-
A1:5+A0:5+D1:5+D0:5+
module only
C3:7-C2:7-
C3:7+C2:7+
C3:6-C2:6-
C3:6+C2:6+
C3:5-C2:5-
C3:5+C2:5+
C3:4-C2:4-
C3:4+C2:4+
C3:3-C2:3-
C3:3+C2:3+
C3:2-C2:2-
C3:2+C2:2+
C3:1-C2:1-
C3:1+C2:1+
C3:0-C2:0-
C3:0+C2:0+
A2:7-
A2:7+
A2:6-
A2:6+
A2:5-
A2:5+
A2:4-
A2:4+
A2:3-
A2:3+
A2:2-
A2:2+
A2:1-
A2:1+
A2:0-
A2:0+
You can find more information on 2X and 4X demultiplexing channel assignments
in the Demultiplexing Multplexed Buses section. (See Table 2 on page 26.) (See
Table 3 on page 26.)
Any differential input, either the differential clock/qualifiers on the P686x
High-density Probe, or all differential data and clock/qualifiers on the P6810
General Purpose Differential Probe and P6880 High-density Differential Probe,
may have their negative input pin grounded and be used as a single-ended input.
30P6800 Series Logic Analyzer Probes Instruction M anual
Reference
Table 7: P6860 H
Signal
name
Clk/Qual-
GND
Clk/Qual+
Data 15B12E3:7E1:7A3:7D3:7A 1:7D1:7
GND
Data 14B10E3:6E1:6A3:6D3:6A 1:6D1:6
Data 13A12E3:5E1:5A3:5D3:5A 1:5D1:5
GND
Data 12A10E3:4E1:4A3:4D3:4A 1:4D1:4
Data 11B9E3:3E1:3A3:3D3:3A1:3D1:3
GND
Data 10B7E3:2E1:2A3:2D3:2A1:2D1:2
Data 9A9E3:1E1:1A3:1D3:1A1:1D1:1
GND
Data 8A7E3:0E1:0A3:0D3:0A1:0D1:0
Data 7B6E2:7E0:7A2:7D2:7A0:7D0:7
D
GN
Data 6B4E2:6E0:6A2:6D2:6A0:6D0:6
Data 5A6E2:5E0:5A2:5D2:5A0:5D0:5
GND
Data 4A4E2:4E0:4A2:4D2:4A0:4D0:4
Data 3B3E2:3E0:3A2:3D2:3A0:3D0:3
GND
Data 2B1E2:2E0:2A2:2D2:2A0:2D0:2
Data 1A3E2:1E0:1A2:1D2:1A0:1D0:1
GND
Data 0A1E2:0E0:0A2:0D2:0A0:0D0:0
igh-Density Probe channel mapping on 136- and 102-channel modules
Probe 4 head for
Pad
name
A15
A14
A13
B11
A11
B8
A8
B5
A5
B2
A2
136-channel module
onlyProbe 3 head fo
Q3-Q2-CK0-Q0-CK1-CK2-CK3-Q1-
GNDGNDGNDGNDGNDGNDGNDGND
Q3+Q2+CK0+Q0+CK1+CK2+CK3+Q1+
GNDGNDGNDGNDGNDGNDGNDGND
GNDGNDGNDGNDGNDGNDGNDGND
GNDGNDGNDGNDGNDGNDGNDGND
GNDGNDGNDGNDGNDGNDGNDGND
D
GN
GNDGNDGNDGNDGNDGNDGNDGND
GNDGNDGNDGNDGNDGNDGNDGND
GNDGNDGNDGNDGNDGNDGNDGND
GN
D
GN
D
r 136- and 102-channel modules
GN
D
GN
D
GN
C3:7C1:7
C3:6C1:6
C3:5C1:5
C3:4C1:4
C3:3C1:3
C3:2C1:2
C3:1C1:1
0
C3:
:7
C2
D
D
GN
2:6
C
C2:5C0:5
C2:4C0:4
C2:3C0:3
C2:2C0:2
C2:1C0:1
C2:0C0:0
C1:
C0
GN
C
0
:7
D
0:6
You can find more information on 2X and 4X demultiplexing channel assignments
in the Demultiplexing Multplexed Buses section. (See Table 2 on page 26.) (See
Table 3 on page 26.)
Any differential input, either the differential clock/qualifiers on the P686x
High-density Probe, or all differential data and clock/qualifiers on the P6810
General Purpose Differential Probe and P6880 High-density Differential Probe,
may have their negative input pin grounded and be used as a single-ended input.
P6800 Series Logic Analyzer Probes Instruction Manual31
Reference
Table 8: P6860 H
Signal namePad nameProbe 2 head for 68-channel moduleonlyProbe1headfor34-channel module only
Clk/Qual-
GND
Clk/Qual+
Data 15B12A1:7D1:7
GND
Data 14B10A1:6D1:6
Data 13A12A1:5D1:5
GND
Data 12A10A1:4D1:4
Data 11B9A1:3D1:3
GND
0
Data 1
9
Data
GND
a8
Dat
a7
Dat
GND
ta 6
Da
ata 5
D
GND
Data 4A4A0:4D0:4
Data 3B3A0:3D0:3
GND
Data 2B1A0:2D0:2
Data 1A3A0:1D0:1
GND
Data 0A1A0:0D0:0
igh-Density Probe channel mapping on 68- and 34-channel modules
A15
A14
A13
B11
A11
B8
B7A1:2D1:2
A9A1:1D1:1
A8
A7A1:
B6A0:
B5
B4A0
6
A
5
A
B2
A2
CK1-CK2-CK3-CK0-
GNDGNDGNDGND
CK1CK2CK3CK0
C3:7
GNDGNDGNDGND
C3:6
C3:5
GNDGNDGNDGND
C3:4
C3:3
GNDGNDGNDGND
C3:2
C3:1
GNDGNDGNDGND
0
7
GNDGNDGNDGND
:6
0:5
A
GNDGNDGNDGND
GNDGNDGNDGND
GNDGNDGNDGND
D1:
D0:
D0
D
0:5
0
7
:6
C3:0
C2:7
C2:6
C2:5
C2:4
C2:3
C2:2
C2:1
C2:0
A3:7
A3:6
A3:5
A3:4
A3:3
A3:2
A3:1
A3:
A2:
A2
2:5
A
A2:4
A2:3
A2:2
A2:1
A2:0
0
7
:6
You c a n find more information about 2X and 4X demultiplexing channel
assignments in the Demultiplexing Multplexed Buses section. (See Table 2 on
page 26.) (See Table 3 on page 26.)
Any differential input, either the differential clock/qualifiers on the P686x
High-density Probe, or all differential data and clock/qualifiers on the P6810
General Purpose Differential Probe and P6880 High-density Differential Probe,
may have their negative input pin grounded and be used as a single-ended input.
32P6800 Series Logic Analyzer Probes Instruction M anual
Reference
Table 9: P6864 H
Land pattern
igh-Density 4 X Probe channel mapping on 34-, 68-, 102- and 136-channel modules
34- and 68-cha
probe labeling102- and 136-channel module probe labeling
nnel module
Signal namePad nameProbeProbe 1Probe 2
Clk/Qual -
Gnd
Clk/Qual +
D15B12A1-0
Gnd
D14B10A1-1
D13A12
Gnd
D12A10
D11B9A1-2
Gnd
D10B7A1-3
D9A9
Gnd
D8A7
D7B6A1-4
Gnd
D6B4A1-5
D5A6
Gnd
4
D
D3B3A1-6
Gnd
D2B1A1-7
D1A3
Gnd
D0A1
1
Unavailable with a 34 channel module
2
Unavailable with a 102 channel module
A15
A14
A13
B11
A11
B8
A8
B5
5
A
4
A
B2
A2
CK3-CK3-CK1-
GNDGNDGND
CK3+CK3+CK1+
1
E3-0
2
A3-0
GNDGNDGND
1
C3-7C3-7
E3-1A3-1
A1-7
GNDGNDGND
C3-6C3-6
1
E3-2
2
A1-6
A3-2
GNDGNDGND
1
C3-5C3-5
E3-3
2
A3-3
A1-5
GNDGNDGND
C3-
4
1
C3-
E3-4
4
2
A1-4
A3-4
GNDGNDGND
1
C3-3C3-3
E3-5
2
A3-5
A1
-3
GNDGNDGND
1-2
C3-2C3-2
1
E3-6
2
A
A3-6
GNDGNDGND
1
C3-1C3-1
E3-7
2
A3-7
A1-1
GNDGNDGND
C3-0C3-0
A1-0
NOTE. The P6864 probe is usable in 4X demultiplex mode only
P6800 Series Logic Analyzer Probes Instruction Manual33
Reference
Table 10: P6880
High-Density Differential Probe channel mapping on 136- and 102-channel modules for probe 4
and probe 3
Signal
name
Clk/Qual-
GND
Clk/Qual+
Data 7+B12E3:7+E2:7+E1:7+E0:7+A3:7+A2:7+D3:7+D2:7+
GND
Data 7-B10E3:7-E2:7-E1:7-E0:7-A3:7-A2:7-D3:7-D2:7-
Data 6-A12E3:6-E2:6-E1:6-E0:6-A3:6-A2:6-D3:6-D2:6-
GND
Data 6+A10E3:6+E2:6+E1:6+E0:6+A3:6+A2:6+D3:6+D2:6+
Data 5+B9E3:5+E2:5+E1:5+E0:5+A3:5+A2:5+D3:5+D2:5+
GND
Data 5-B7E3:5-E2:5-E1:5-E0:5-A3:5-A2:5-D3:5-D2:5-
Data 4-A9E3:4-E2:4-E1:4-E0:4-A3:4-A2:4-D3:4-D2:4-
GND
Data 4+A7E3:4+E2:4+E1:4+E0:4+A3:4+A2:4+D3:4+D2:4+
Data 3+B6E3:3+E2:3+E1:3+E0:3+A3:3+A2:3+D3:3+D2:3+
GND
Data 3-B4E3:3-E2:3-E1:3-E0:3-A3:3-A2:3-D3:3-D2:3-
Data 2-A6E3:2-E2:2-E1:2-E0:2-A3:2-A2:2-D3:2-D2:2-
GND
Data 2+A4E3:2+E2:2+E1:2+E0:2+A3:2+A2:2+D3:2+D2:2+
Data 1+B3E3:1+E2:1+E1:1+E0:1+A3:1+A2:1+D3:1+D2:1+
GND
Data 1-B1E3:1-E2:1-E1:1-E0:1-A3:1-A2:1-D3:1-D2:1-
Data 0-A3E3:0-E2:0-E1:0-E0:0-A3:0-A2:0-D3:0-D2:0-
GND
Data 0+A1E3:0+E2:0+E1:0+E0:0+A3:0+A2:0+D3:0+D2:0+
Pad
name
A15
A14
A13
B11
A11
B8
A8
B5
A5
B2
A2
Probe 4 head for 136-channel module onlyProbe 3 head for 102-channel m odule only
Q3-Q2-CK0-Q0-
GNDGNDGNDGNDGNDGNDGNDGND
Q3+Q2+CK0+Q0+
GNDGNDGNDGNDGNDGNDGNDGND
GNDGNDGNDGNDGNDGNDGNDGND
GNDGNDGNDGNDGNDGNDGNDGND
GNDGNDGNDGNDGNDGNDGNDGND
GNDGNDGNDGNDGNDGNDGNDGND
GNDGNDGNDGNDGNDGNDGNDGND
GNDGNDGNDGNDGNDGNDGNDGND
GNDGNDGNDGNDGNDGNDGNDGND
You c a n find more information about 2X and 4X demultiplexing channel
assignments in the Demultiplexing Multplexed Buses section. (See Table 2 on
page 26.) (See Table 3 on page 26.)
Any differential input, either the differential clock/qualifiers on the P686x
High-density Probe, or all differential data and clock/qualifiers on the P6810
General Purpose Differential Probe and P6880 High-density Differential Probe,
may have their negative input pin grounded and be used as a single-ended input.
34P6800 Series Logic Analyzer Probes Instruction M anual
Reference
Table 11: P6880
High-Density Differential Probe channel mapping on 136- and 102-channel modules for probe 2
and probe 1
Signal
name
Clk/Qual-
GND
Clk/Qual+
Data 7+B12A1:7+A0:7+D1:7+D0:7+
GND
Data 7-B10A1:7-A0:7-D1:7-D0:7-
Data 6-A12A1:6-A0:6-D1:6-D0:6-
GND
Data 6+A10A1:6+A0:6+D1:6+D0:6+
Data 5+B9A1:5+A0:5+D1:5+D0:5+
GND
Data 5-B7A1:5-A0:5-D1:5-D0:5-
Data 4-A9A1:4-A0:4-D1:4-D0:4-
GND
Data 4+A7A1:4+A0:4+D1:4+D0:4+
Data 3+B6A1:3+A0:3+D1:3+D0:3+
GND
Data 3-B4A1:3-A0:3-D1:3-D0:3-
Data 2-A6A1:2-A0:2-D1:2-D0:2-
GND
Data 2+A4A1:2+A0:2+D1:2+D0:2+
Data 1+B3A1:1+A0:1+D1:1+D0:1+
GND
Data 1-B1A1:1-A0:1-D1:1-D0:1-
Data 0-A3A1:0-A0:0-D1:0-D0:0-
GND
Data 0+A1A1:0+A0:0+D1:0+D0:0+
Pad
name
A15
A14
A13
B11
A11
B8
A8
B5
A5
B2
A2
Probe 2 headProbe 1 head
CK1-CK2-CK3-Q1-
GNDGNDGNDGNDGNDGNDGNDGND
CK1+CK2+CK3+Q1+
GNDGNDGNDGNDGNDGNDGNDGND
GNDGNDGNDGNDGNDGNDGNDGND
GNDGNDGNDGNDGNDGNDGNDGND
GNDGNDGNDGNDGNDGNDGNDGND
GNDGNDGNDGNDGNDGNDGNDGND
GNDGNDGNDGNDGNDGNDGNDGND
GNDGNDGNDGNDGNDGNDGNDGND
GNDGNDGNDGNDGNDGNDGNDGND
C3:7+C2:7+C1:7+C0:7+
C3:7-C2:7-C1:7-C0:7-
C3:6-C2:6-C1:6-C0:6-
C3:6+C2:6+C1:6+C0:6+
C3:5+C2:5+C1:5+C0:5+
C3:5-C2:5-C1:5-C0:5-
C3:4-C2:4-C1:4-C0:4-
C3:4+C2:4+C1:4+C0:4+
C3:3+C2:3+C1:3+C0:3+
C3:3-C2:3-C1:3-C0:3-
C3:2-C2:2-C1:2-C0:2-
C3:2+C2:2+C1:2+C0:2+
C3:1+C2:1+C1:1+C0:1+
C3:1-C2:1-C1:1-C0:1-
C3:0-C2:0-C1:0-C0:0-
C3:0+C2:0+C1:0+C0:0+
You c a n find more information about 2X and 4X demultiplexing channel
assignments in the Demultiplexing Multplexed Buses section. (See Table 2 on
page 26.) (See Table 3 on page 26.)
Any differential input, either the differential clock/qualifiers on the P686x
High-density Probe, or all differential data and clock/qualifiers on the P6810
General Purpose Differential Probe and P6880 High-density Differential Probe,
may have their negative input pin grounded and be used as a single-ended input.
P6800 Series Logic Analyzer Probes Instruction Manual35
Reference
Table 12: P6880
Signal
name
Clk/Qual-
GND
Clk/Qual+
Data 7+B12A1:7+A0:7+D1:7+D 0:7+
GND
Data 7-B10A1:7-A0:7-D1:7-D0:7-
Data 6-A12A1:6-A0:6-D1:6-D0:6-
GND
Data 6+A10A1:6+A0:6+D1:6+D 0:6+
Data 5+B9A1:5+A0:5+D1:5+D0:5+
GND
Data 5-B7A1:5-A0:5-D1:5-D0:5-
Data 4-A9A1:4-A0:4-D1:4-D0:4-
GND
Data 4+A7A1:4+A0:4+D1:4+D0:4+
Data 3+B6A1:3+A0:3+D1:3+D0:3+
GND
Data 3-B4A1:3-A0:3-D1:3-D0:3-
Data 2-A6A1:2-A0:2-D1:2-D0:2-
GND
Data 2+A4A1:2+A0:2+D1:2+D0:2+
Data 1+B3A1:1+A0:1+D1:1+D0:1+
GND
Data 1-B1A1:1-A0:1-D1:1-D0:1-
Data 0-A3A1:0-A0:0-D1:0-D0:0-
GND
Data 0+A1A1:0+A0:0+D1:0+D0:0+
High-Density Differential Probe channel mapping on 68- and 34-channel m odules
Pad
name
A15
A14
A13
B11
A11
B8
A8
B5
A5
B2
A2
Probe 2 head for 68-channel m odule only
CK1-CK2-CK3-CK0-
GNDGNDGNDGNDGNDGNDGNDGND
CK1-CK2-CK3+CK0+
GNDGNDGNDGNDGNDGNDGNDGND
GNDGNDGNDGNDGNDGNDGNDGND
GNDGNDGNDGNDGNDGNDGNDGND
GNDGNDGNDGNDGNDGNDGNDGND
GNDGNDGNDGNDGNDGNDGNDGND
GNDGNDGNDGNDGNDGNDGNDGND
GNDGNDGNDGNDGNDGNDGNDGND
GNDGNDGNDGNDGNDGNDGNDGND
Probe 1 head 34-
C3:7+C2:7+
C3:7-C2:7-
C3:6-C2:6-
C3:6+C2:6+
C3:5+C2:5+
C3:5-C2:5-
C3:4-C2:4-
C3:4+C2:4+
C3:3+C2:3+
C3:3-C2:3-
C3:2-C2:2-
C3:2+C2:2+
C3:1+C2:1+
C3:1-C2:1-
C3:0-C2:0-
C3:0+C2:0+
channel module only
A3:7+A2:7+
A3:7-A2:7-
A3:6-A2:6-
A3:6+A2:6+
A3:5+A2:5+
A3:5-A2:5-
A3:4-A2:4-
A3:4+A2:4+
A3:3+A2:3+
A3:3-A2:3-
A3:2-A2:2-
A3:2+A2:2+
A3:1+A2:1+
A3:1-A2:1-
A3:0-A2:0-
A3:0+A2:0+
You c a n find more information about 2X and 4X demultiplexing channel
assignments in the Demultiplexing Multplexed Buses section. (See Table 2 on
page 26.) (See Table 3 on page 26.)
Any differential input, either the differential clock/qualifiers on the P686x
High-density Probe, or all differential data and clock/qualifiers on the P6810
General Purpose Differential Probe and P6880 High-density Differential Probe,
may have their negative input pin grounded and be used as a single-ended input.
36P6800 Series Logic Analyzer Probes Instruction M anual
Reference
Table 13: Chann
CompressionMictor
Signal name
J1 Clk/Qual-
GND
J1 Clk/Qual+
J1 Data 15B12
GND
J1 Data 14B109E3:6D3:6A3:6
J1 Data 13A1211E3:5D3:5A3:5
GND
J1 Data 12A1013E3:4D3:4A3:4
J1 Data 11B915E3:3D3:3A3:3
GND
J1 Data 10B717E3:2D3:2A3:2
J1 Data 9A919E3:1D3:1A3:1
GND
J1 Data 8A721E3:0D3:0A3:0
J1 Data 7B623E2:7D2:7A2:7
GND
J1 Data 6B425E2:6D2:6A2:6
J1 Data 5A627E2:5D2:5A2:5
GND
J1 Data 4A429E2:4D2:4A2:4
J1 Data 3B331E2:3D2:3A2:3
GND
J1 Data 2B133E2:2D2:2A2:2
J1 Data 1A335E2:1D2:1A2:1
GND
J1 Data 0A137E2:0D2:0A2:0
J2 Clk/Qual-
GND
J2 Clk/Qual+
J2 Data 15B128E1:7D1:7A1:7
GND
J2 Data 14B1010E1:6D1:6A1:6
J2 Data 13A1212E1:5D1:5A1:5
el mapping for 136- and 102-channel modules
136-channel
module only136- and 102-channel modules
Pad
name
A15
A14
A13
B11
A11
B8
A8
B5
A5
B2
A2
A15
A14
A136
B11
Mictor pin
number
NCNCNCNCNC
GNDGNDGNDGNDGND
5
7
GNDGNDGNDGNDGND
GNDGNDGNDGNDGND
GNDGNDGNDGNDGND
GNDGNDGNDGNDGND
GNDGNDGNDGNDGND
GNDGNDGNDGNDGND
GNDGNDGNDGNDGND
GNDGNDGNDGNDGND
NCNCNCNCNC
GNDGNDGNDGNDGND
GNDGNDGNDGNDGND
Adapter 4/
probe head 4
Q3Q0CK0CK3
E3:7D3:7A3:7
Q2CK2CK1Q1
Adapter 3/
probe head 3
Adapter 2/
probe head 2
Adapter 1/
probe head 1
C3:7
C3:6
C3:5
C3:4
C3:3
C3:2
C3:1
C3:0
C2:7
C2:6
C2:5
C2:4
C2:3
C2:2
C2:1
C2:0
C1:7
C1:6
C1:5
P6800 Series Logic Analyzer Probes Instruction Manual37
Reference
Table 13: Channel mapping for 136- and 102-channel modules (cont.)
136-channel
CompressionMictor
Pad
Signal name
GND
J2 Data 12A1014E1:4D1:4A1:4
J2 Data 11B916E1:3D1:3A1:3
GND
J2 Data 10B718E1:2D1:2A1:2
J2 Data 9A920E1:1D1:1A1:1
GND
J2 Data 8A722E1:0D1:0A1:0
J2 Data 7B624E0:7D0:7A0:7
GND
J2 Data 6B426E0:6D0:6A0:6
J2 Data 5A628E0:5D0:5A0:5
GND
J2 Data 4A430E0:4D0:4A0:4
J2 Data 3B332E0:3D0:3A0:3
GND
J2 Data 2B134E0:2D0:2A0:2
J2 Data 1A336E0:1D0:1A0:1
GND
J2 Data 0A138E0:0D0:0A0:0
name
A11
B8
A8
B5
A5
B2
A2
Mictor pin
number
GNDGNDGNDGNDGND
GNDGNDGNDGNDGND
GNDGNDGNDGNDGND
GNDGNDGNDGNDGND
GNDGNDGNDGNDGND
GNDGNDGNDGNDGND
GNDGNDGNDGNDGND
module only136- and 102-channel modules
Adapter 4/
probe head 4
Adapter 3/
probe head 3
Adapter 2/
probe head 2
Adapter 1/
probe head 1
C1:4
C1:3
C1:2
C1:1
C1:0
C0:7
C0:6
C0:5
C0:4
C0:3
C0:2
C0:1
C0:0
You c a n find more information about 2X and 4X demultiplexing channel
assignments in the Demultiplexing Multplexed Buses section. (See Table 2 on
page 26.) (See Table 3 on page 26.)
Any differential input, either the differential clock/qualifiers on the P686x
High-density Probe, or all differential data and clock/qualifiers on the P6810
General Purpose Differential Probe and P6880 High-density Differential Probe,
may have their negative input pin grounded and be used as a single-ended input.
Table 14: Channel mapping for 68-channel module
Compression land patternMictor land patternChannel module
Signal name
J1 Clk/Qual-
GND
Pad nameMictor pin number
A15
A14
NCNCNC
GNDGNDGND
Adapter 1/
probe head 1
Adapter 2/
probe head 1
38P6800 Series Logic Analyzer Probes Instruction M anual
Table 14: Channel mapping for 68-channel module (cont.)
Compression land patternMictor land patternChannel module
Signal name
J1 Clk/Qual+
J1 Data 15B12
GND
J1 Data 14B109A3:6
J1 Data 13A1211A3:5
GND
J1 Data 12A1013A3:4
J1 Data 11B915A3:3
GND
J1 Data 10B717A3:2
J1 Data 9A919A3:1
GND
J1 Data 8A721A3:0
J1 Data 7B623A2:7
GND
J1 Data 6B425A2:6
J1 Data 5A627A2:5
GND
J1 Data 4A429A2:4
J1 Data 3B331A2:3
GND
J1 Data 2B133A2:2
J1 Data 1A335A2:1
GND
J1 Data 0A137A2:0
J2 Clk/Qual+
GND
J2 Clk/Qual+
J2 Data 15B128A1:7D1:7
GND
J2 Data 14B1010A1:6D1:6
J2 Data 13A1212A1:5D1:5
GND
J2 Data 12A1014A1:4D1:4
J2 Data 11B916A1:3D1:3
Pad nameMictor pin number
A13
B11
A11
B8
A8
B5
A5
B2
A2
A15
A14
A136
B11
A11
5
7
GNDGNDGND
GNDGNDGND
GNDGNDGND
GNDGNDGND
GNDGNDGND
GNDGNDGND
GNDGNDGND
GNDGNDGND
NCNCNC
GNDGNDGND
GNDGNDGND
GNDGNDGND
Adapter 1/
probe head 1
CK0CK3
A3:7
CK1CK2
Adapter 2/
probe head 1
C3:7
C3:6
C3:5
C3:4
C3:3
C3:2
C3:1
C3:0
C2:7
C2:6
C2:5
C2:4
C2:3
C2:2
C2:1
C2:0
Reference
P6800 Series Logic Analyzer Probes Instruction Manual39
Reference
Table 14: Channel mapping for 68-channel module (cont.)
Compression land patternMictor land patternChannel module
Signal name
GND
J2 Data 10B718A1:2D1:2
J2 Data 9A920A1:1D1:1
GND
J2 Data 8A722A1:0D1:0
J2 Data 7B624A0:7D0:7
GND
J2 Data 6B426A0:6D0:6
J2 Data 5A628A0:5D0:5
GND
J2 Data 4A430A0:4D0:4
J2 Data 3B332A0:3D0:3
GND
J2 Data 2B134A0:2D0:2
J2 Data 1A336A0:1D0:1
GND
J2 Data 0A138A0:0D0:0
Pad nameMictor pin number
B8
A8
B5
A5
B2
A2
GNDGNDGND
GNDGNDGND
GNDGNDGND
GNDGNDGND
GNDGNDGND
GNDGNDGND
Adapter 1/
probe head 1
Adapter 2/
probe head 1
You c a n find more information about 2X and 4X demultiplexing channel
assignments in the Demultiplexing Multplexed Buses section. (See Table 2 on
age26.) (SeeTable3onpage26.)
p
Any differential input, either the differential clock/qualifiers on the P686x
High-density Probe, or all differential data and clock/qualifiers on the P6810
General Purpose Differential Probe and P6880 High-density Differential Probe,
may have their negative input pin grounded and be used as a single-ended input.
40P6800 Series Logic Analyzer Probes Instruction M anual
Reference
Table 15: Chann
Compression land patternMictor land patternChannel module
Signal name
J1 Clk/Qual-
GND
J1 Clk/Qual+
J1 Data 15B12
GND
J1 Data 14B109
J1 Data 1
GND
J1 Data
J1 Data
GND
J1 Da
J1 Da
GND
J1 D
J1
GND
1Data6
J
1Data5
J
GND
J1 Data 4A429
J1 Data 3B331
GND
J1 Data 2B133
J1 Data 1A335
GND
J1 Data 0A137
J2 Clk/Qual+
GND
J2 Clk/Qual+
J2 Data 15B128A3:7
GND
J2 Data 14B1010A3:6
J2 Data 13A1212A3:5
GND
J2 Data 12A1014A3:4
3
12
11
ta 10
ta 9
ata 8
Data 7
el mapping for 34-channel module
Pad nameMictor pin num
A15
A14
A13
B11
A1211
A11
A1013
B915
B8
B717
A919
A8
A721
B623
B5
4
B
6
A
A5
B2
A2
A15
A14
A136
B11
A11
ber
NCNC
GNDGND
5
7
GNDGND
GNDGND
GNDGND
GNDGND
GNDGND
5
2
7
2
GNDGND
GNDGND
GNDGND
NCNC
GNDGND
GNDGND
GNDGND
Adapter 1/probe head 1
CK3
C3:7
C3:6
C3:5
C3:4
C3:3
C3:2
C3:1
C3:0
C2:7
C2:6
C2:5
C2:4
C2:3
C2:2
C2:1
C2:0
CK0
P6800 Series Logic Analyzer Probes Instruction Manual41
Reference
Table 15: Channel mapping for 34-channel module (cont.)
Compression land patternMictor land patternChannel module
Signal name
J2 Data 11B916A3:3
GND
J2 Data 10B718A3:2
J2 Data 9A920A3:1
GND
J2 Data 8A722A3:0
J2 Data 7B624A2:7
GND
J2 Data 6B426A2:6
J2 Data 5A628A2:5
GND
J2 Data 4A430A2:4
J2 Data 3B332A2:3
GND
J2 Data 2B134A2:2
J2 Data 1A336A2:1
GND
J2 Data 0A138A2:0
Pad nameMictor pin number
B8
A8
B5
A5
B2
A2
GNDGND
GNDGND
GNDGND
GNDGND
GNDGND
GNDGND
Adapter 1/probe head 1
You c a n find more information about 2X and 4X demultiplexing channel
assignments in the Demultiplexing Multplexed Buses section. (See Table 2 on
page 26.) (See Table 3 on page 26.)
Any differential input, either the differential clock/qualifiers on the P686x
High-density Probe, or all differential data and clock/qualifiers on the P6810
General Purpose Differential Probe and P6880 High-density Differential Probe,
may have their negative input pin grounded and be used as a single-ended input.
Special Considerations for the Adapters. Consider the following issues when
you use either the Compression-on-PCB to P6434 Mictor adapter or the
Mictor-on-PCB to P6860 Compression adapters.
Use of the Compression-on-PCB to P6434 Mictor and Mictor-on-PCB to
P6860
Compressionadaptersonexisting68-and34-channelembedded
configurations and supports may require exchanging the P6860 Probe heads
or P6434 module connector ends to accommodate all older Tektronix logic
analyzer signal connection alternatives. For additional information on P6434
and P6800 probe-to-module orientation refer to the following:
P6810 General Purpose Logic Analyzer Probe Label Instructions
P6860 High Density Logic Analyzer Probe Label Instructions
42P6800 Series Logic Analyzer Probes Instruction M anual
Reference
P6880 High Dens
P6864 High Density 4X Logic Analyzer Probe Label Instructions
P6434 Probe Label Instructions
On the Compression-on-PCB to P6434 Mictor adapter, the negative side of the
differential clock/qualifiers are left floating (N/C) to allow a differential clock
signal to be connected to the compression footprint and still be probed by a
P6434. Howe
line. This also allows the P6860 Probestobeconnectedinthefutureand
provide true differential clock/qualifier support.
On the Mictor-on-PCB to P6860 Compression adapter, the negative side of
the differential clock/qualifier inputs on the compression connection side are
internally grounded to support viewing the single-ended clock/qualifier inputs
supported by the P6434 Probe and older Tektronix logic analyzers.
ver, the P6434 will only see the CLK+ side of the differential
P6800 Series Logic Analyzer Probes Instruction Manual43
Reference
Land Footprints
The following s
Probes. These figures contain the signal to land pattern assignments.
P6810 Probe Land Footprint. The P6810 General Purpose Probe land footprint.
(See Figure 15.) Pin spacing allows for spacing tolerance between 8-channel
podlet holder and clock/qualifier podlet configurations. Negative inputs of
differenti
ection shows the land footprints for the P6810, P686x, and P6880
al signals may be grounded to support single-ended signal inputs.
Figure 15: P6810 General-Purpose probe land footprint
P686x Probe Land Footprint. The following two figures show the land footprint
for the P686x High-Density Probe and an example of the High-Density Probe land
footprint in a typical pass-through signal path layout configuration. (See Figure 16
on page 45.) This type of configuration optimizes minimal probe loading. An
example layout of the High-Density Compression and Mictor land footprints is
also shown. (See Figure 18 on page 46.)
44P6800 Series Logic Analyzer Probes Instruction M anual
Reference
Figure 16: P686x High-Density probe land footprint
Figure 17: High-Density probe land footprint in a typical pass-through signal path
out configuration
lay
P6800 Series Logic Analyzer Probes Instruction Manual45
Reference
Figure 18: Example layouts of the High-Density compression compared to the
mictor land footprints
P6880 D
footprint for the P6880 High-Density Differential Probe and an example of the
High-Density Differential Probe land footprint in a typical pass-through signal
path layout configuration. (See Figure 19 on page 47.) (See Figure 20 on page 47.)
NOTE. Because the land pattern is the same between P6880 and P6860 probes,
you can also use the P6860 probe to look at both sides of the differential signal
usin
ifferential P robe Land Footprint. The following two figures show the land
g two separate input channels on the P6860 probe.
46P6800 Series Logic Analyzer Probes Instruction M anual
Figure 19: P6880 Differential probe land footprint
Reference
Figure 20: High-Density Differential probe land footprint in a typical pass-through signal path layout configuration
P6800 Series Logic Analyzer Probes Instruction Manual47
Reference
Mechanical
Considerations
This section pr
and physical attachment requirements.
The PCB holes,
signals when the signals routed around the holes have the corresponding return
current plane immediately below the signal trace for the entire signal path from
driver to receiver.
NOTE. For optimum signal integrity, there should be a continuous, uninterrupted
ground return plane along the entire signal path.
Land Footprint R equirements for the P686x and P6880 Probes. The compression
land footprint requirements of the P686x and P6880 Probes are shown in the
illustration. (See Figure 21.)
ovides information on compression land footprint requirements
in general, do not have an impact upon the integrity of your
48P6800 Series Logic Analyzer Probes Instruction M anual
Reference
Figure 21: Land footprint requirements for the P686x and P6880 probes (top view)
P6800 Series Logic Analyzer Probes Instruction Manual49
Reference
Special Consid
WARNING. To avoid personal injury due to electric shock, always turn off the
power on your target system before cleaning the compression footprint.
Cleanliness is important for a reliable connection. (See page 13, Cleaning the
P686x and P6880 Compression Footprints.)
Line boxes around the pin groupings are the via keepout a reas (not part of the
actual land footprint).
Solder mask is required between all land pads in the component keepout area.
All signa
mask tolerances to ensure that no exposed runs or metal exist between pads.
This requirement avoids the risk of shorting signal runs.
Solder mask hardness of at least 8H (pencil hardness) and thickness of at
least 0.0762 mm to 0.1270 mm (0.0003 to 0.0005 in) has been verified for
several hundred cycles without appreciable wear from the compression
contact cycling.
The compression land footprint design was verified on the immersion gold
process.
erations
l runs in the keepout areas are required to maintain PCB and solder
Footprint Requirements for the Compression-on-PCB to P6434 Mictor
Land
Adapter. The following two figures show the land footprint requirements of the
Compression-on-PCB to P6434 Mictor adapter. (See Figure 22 on page 51.)
(See Figure 23 on page 51.) This compression adapter converts from the new
compression footprint to the existing P6434 Mictor-based 34-channel probe.
Refer to the P6434 Mass Termination Probe Manual for the Mictor land footprint
specification. The recommended channel mappings for the Compression-on-PCB
to P6434 Mictor adapter and Mictor-on-PCB to Compression adapter is listed.
See Table 13 on page 37.)
(
50P6800 Series Logic Analyzer Probes Instruction M anual
Reference
Figure 22:
to P6434 Mictor adapter
Figure 23: Land footprint requirements for the 17-channel Compression-on-PCB
to P6434 Mictor adapter
Land footprint requirements for the 34-channel Compression-on-PCB
P6800 Series Logic Analyzer Probes Instruction Manual51
Reference
Special Consid
Two compression land footprints must be spaced as per the mechanical
dimensions sp
Placement of the compression land footprints is only constrained with use of
the compres
with a High-Density Probe.
The P6434 Pr
signals. Therefore, the compression adapter cannot be used to support
differential signals beyond capturing each side of the differential signal
independently in a single-ended manner.
The compression adapter will add capacitance to the P6434 Probe input
capacitance. The Mictor adapter adds 2.7 pF to the High-Density Compression
probe load of 0.7 pF for a c ombined adapter capacitance load of 3.4 pF.
The TLA7Axx logic analyzer with the P6860 High-Density Probe will connect
directly to the compression land footprint to support high performance data
capture and viewing needs.
The TLA7Axx logic a nalyzer with the P6880 High-Density Differential Probe
will also connect directly to the compression land footprint to support high
perfo
erations
ecified to support the compression adapter.
sion adapter, not in normal usage of the TLA7Axx logic analyzer
obe and older logic analyzer modules do not support differential
rmance differential signal capture and viewing needs.
Physical Attachment Requirements for the P6810 Probe. The physical dimensions
of the P6810 General Purpose Probe. (See Figure 24.)
Figure 24: Physical attachment requirements for the P6810 probe
52P6800 Series Logic Analyzer Probes Instruction M anual
Reference
Physical Attac
connector-less P686x High-Density Probe and P6880 High-Density Differential
Probe interconnects are designed to accommodate PCB thickness ranging from
1.27 mm to 3.81 mm (0.050 in to 0.150 in). To accommodate this range, there
are two versions of the design.
Nut bar–If the PCB thickness is 1.27 mm to 2.36 mm (0.050 in to 0.093 in),
use the nut bar with the thin e lastomer. (See Figure 25.)
Press-in nut–If the PCB thickness is 2.36 mm to 3.81 mm (0.093 in to
0.150 in), use the press-in nut with the thick elastomer. (See Figure 26 on
page 54.)
hment Requirements for the P686x and P6880 Probes. The
Figure 25: Nut Bar design
P6800 Series Logic Analyzer Probes Instruction Manual53
Reference
Special Consid
erations for the Nut Bar Design
The nut bar backing plate is required to maintain PCB flatness, which supports
the compressi
on connection.
The nut bar snaps in and out of the PCB without the use of tools.
Nut bars are reusable and are not required to be a permanent part of the PCB.
The elastomer used is independent and replaceable.
Additional nut bars and both thick and thin elastomer holders may be ordered
from Tektronix.
Figure 26: Press-in Nut design
Special Considerations for the Press-in Nut Design
®
EM
The P
KF2 2-56 or equivalent press-in nut must be inserted into the PCB.
The elastomer used is independent and replaceable.
Physical Attachment Requirements for the Compression-on-PCB to P6434 Mictor
and Mictor-on-PCB to P6860 Compression Adapters. You can get the mechanical
dimensions of the adapters in the Mictor-on-PCB to P6860 Compression Adapter
section. (See Figure 6 on page 9.) (See Figure 7 on page 10.)
54P6800 Series Logic Analyzer Probes Instruction M anual
Reference
Electrical Considerations
This section pr
the P6810 General Purpose, P686x High-Density, and P6880 High-Density
Differential Probes.
The low frequency model is typically adequate for rise and fall times of 1 ns
or greater in a typical 25 Ω source impedance environment (50 Ω runs with a
pass-through connection). For source impedance outside this range, and/or rise
and fall times less than 1 ns, use the high frequency model to determine if a
significant difference is obtained in the modeling result.
The compression land pattern pad is not part of the load model. Make sure that
you include the compression land pad and in the modeling.
Transmission Lines. Due to the high performance nature of the interconnect,
ensure that stubs, which are greater than 1/4 length of the signal rise time, be
modeled as transmission lines.
P6810 General Purpose Probe Load Model. The following electrical model
ys a single podlet load model of the General Purpose Probes. (See
displa
Figure 27.)
ovides information on transmission lines and load models for
Figure 27: Single podlet load model
P6800 Series Logic Analyzer Probes Instruction Manual55
Reference
The characteri
stics listed in the following table apply to single podlets and the
leadsets shown in the illustrations. (SeeFigure28.) (SeeFigure29.) (See
Figure 30.) Note the differences in the characteristics when podlets are used
with leadsets.
Table 16: P6810 General Purpose Probe performance with single podlet and leadsets
ions
stic
Single podl
1.4 GHz when
Figure27onpage55.)
N/A.
(See Figure 24 on page 52.)(See Figure 28.) (See Figure 29 on page 57.)
High-performance probing for single-ended
or dif
Characteri
Maximum clock speed450 MHz when used with TLA7Axx modules
AC loadingRefer to the single podlet load model. (See
DC loading20 kΩ to ground20 kΩ to ground
Isolation
Dimens
Recommended usage
et only
used with TLA7Bxx modules
ferential signals.
Single podl
50 MHz (sing
lead connected
90 - 100 MHz (single-ended leadset), two
ground lea
150 - 200 MHz (differential leadset)
< 5 pF per c
under test
Each signal lead on the eight-channel leadset
contains a 150 Ω series termination near the
end of t
reflections.
(See Figure 30 on page 57.)
TTL and CMOS levels only. Ground leads
shoul
Not recommended for signals with edge rates
> 1 V/ns.
56P6800 Series Logic Analyzer Probes Instruction M anual
Figure 29: One-channel leadset (barrel connector)
Reference
Figure 3
P686x High-Density and P6880 High-Density Differential Probes Load Model. The
following electrical model includes a low-frequency and high-frequency model
of the High-Density and High-Density Differential Probes. (See Figure 31.) For
the Di
side of the signal.
0: Eight-channel differential leadset
fferential Probe, the load model is applied to both the + side and the –
P6800 Series Logic Analyzer Probes Instruction Manual57
Reference
Figure 31: High-Density and High-Density Differential probe load model
The differential load for the P686x clock input and the P6880 probe can be
modeled
signal. The + and – sides of the differential signal are well insulated in the probe
head up to and including the d ifferential input stage.
by attaching the single line model to each side (+ and –) of the differential
Mictor-on-PCB to P6860 Compression Adapter Load Model. Refer the following
illustration for an electrical model of the Mictor-on-PCB to P6860 Compression
er. (See Figure 32.) The pad cap is the capacitance of the 0.016 in x 0.032 in
adapt
pad of the P6860/P6880 compression land footprint. The capacitive load depends
upon the distance to the underlying conductors.
igure 32: Mictor-on-PCB to Compression adapter load model
F
58P6800 Series Logic Analyzer Probes Instruction M anual
Reference
Compression-o
illustration for an electrical model of the Compression-on-PCB to P6434 Mictor
adapter. (See Figure 33.) The pad cap is the capacitance of the 0.016 in x 0.032 in
pad of the P6860/P6880 compression land footprint. The capacitive load depends
upon the distance to the underlying conductors.
Figure 33: Compression-on-PCB to P6434 Mictor adapter load model
n-PCB to P6434 Mictor Adapter Load Model. Refer to the following
P6800 Series Logic Analyzer Probes Instruction Manual59
Reference
60P6800 Series Logic Analyzer Probes Instruction M anual
Specifications
Mechanical an
d Electrical S pecifications
The mechanical and electrical specifications for the P6810, P686x, and P6880
Probes are listed. (See Table 17.) The electrical specifications apply when the
probe is con
Refer to the Tektronix Logic Analyzer Family Product Specifications document
(Tektroni
Family Product Documentation CD or downloadable from the Tektronix Web site
for a complete list of specifications, including overall system specifications.
Table 17: Mechanical and electrical specifications
CharacteristicP6810P6860/P6864P6880
Threshold accuracy
Input resistance
Input capacitance<1.0 pF
Minimum digital
signal swing
Maximum
nondestructive
input signal to probe
Delay from probe
tip to module input
connector
Probe length
Operating range
1
810 single podlet input capacitance is 0.7 pF, but podlets in a group will have 1 pF input capacitance.
P6
nected between a compatible logic analyzer and a target system.
x part number 071-1344-xx) available on the Tektronix Logic Analyzer
±(35 mV ±1% of
setting)
20 kΩ ±1%20 kΩ ±1%20 kΩ ±1%
300 mV
single-ended
±15V±15V±15V
7.70 ns ±80 ps7.70 ns ±60 ps7.70 ns ±80 ps
1.8 m (6 ft)1.8 m (6 ft)1.8 m (6 ft)
+5 V to –2.5 V+5 V to –2.5 V+5 V to –2.5 V
±(35 mV ±1% of
setting)
1
0.7 pF (typical)0.7 pF (typical)
300 mV
single-ended
±(35 mV ±1% of
setting)
150 mV differential
each side
NOTE. Because the length of all three probes are electrically similar, they can be
interchanged without problems.
P6800 Series Logic Analyzer Probes Instruction Manual61
Specifications
Theprobesared
esigned to meet Tektronix standard 062-2847-00 class 5. The
environmental specifications for all three probes are listed. (See Table 18.)
Table 18: Environmental specifications
CharacteristicP6810, P6860/P6864, and P6880
Temperature
Operating0 °C to +50 °C
Nonoperati
Humidity
Altitude
Operating10,000 ft (3,048 m)
Nonoperating
Electrostatic imm unity6 kV
ng
–51°Cto71°C
10 °C to 30 °C, 95% relative humidity
30 °C to 40 °C, 75% relative humidity
40 °C to 50
40,000 ft (12,192 m)
°C, 45% relative humidity
62P6800 Series Logic Analyzer Probes Instruction M anual
Maintenance
Probe Calibration
The P6810, P686x, and P6880 Probes do not require scheduled or periodic
maintenance. Refer to the Functional Check section below to verify the basic
functionality of the probes.
To confirm that the probes meet or exceed the performance requirements for
published specifications with a compatible logic analyzer module, refer to the
TLA7ACx Logic Analyzer Module Service Manual and follow the procedures
listed und
er performance verification procedures.
Strategy
Funct
ional Check
If you are
Logic Analyzer Module Service Manual for the complete calibration procedure.
Otherwise, return the probe to the local Tektronix service center.
Except for the elastomer holders, the P6810, P686x, and P6880 Probes contain
no user-replaceable parts. If probe failure occurs, return the entire probe to your
Tektronix representative for repair.
Connect the logic analyzer probes to an active signal source. Open the Setup
window for the module where the probes are attached. Check for signal activity in
the
performing the probe calibration yourself, refer to the TLA7ACx
Setup window for the attached probe.
P6800 Series Logic Analyzer Probes Instruction Manual63
Maintenance
Inspection an
d Cleaning
CAUTION. To prevent damage during the probe connection process, do not touch
the exposed edge of the elastomer.
To maintain a reliable electrical contact, keep the probes free of dirt, dust, and
contaminants. Remove d irt and dust with a soft brush. For more extensive
cleaning, use only a damp cloth. Never use abrasive cleaners or organic solvents.
Repackaging Instructions
Use the original packaging, if possible, to return or store the p robes. If the
original packaging is not available, use a corrugated cardboard shipping carton.
Add cushioning material to prevent the probes from moving inside the shipping
contain
Enclose the following information when shipping the probe to a Tektronix Center.
er.
Owner’s address
Name and phone number of a contact person
Type of probe
Reason for return
description of the required
Full
64P6800 Series Logic Analyzer Probes Instruction M anual
Replaceable Parts
This chapter contains a list of the replaceable components for the P6810, P686x
and P6880 Probes. Use this list to identify and order replacement parts.
Parts Ordering Information
Replacement parts are available through your local Tektronix field office or
representative.
Changes to Tektronix products are sometimes made to accommodate improved
components as they become available and to give you the benefit of the latest
improvements. Therefore, when ordering parts, it is important to include the
followin
If you order a part that has been replaced with a different or improved part, your
local Tektronix field office or representative will contact you concerning any
change in part number.
ginformationinyourorder.
Part number
Instrument type or model number
Instrument serial number
Instrument modification n umber, if applicable
P6800 Series Logic Analyzer Probes Instruction Manual65
Replaceable Parts
Using the Replaceable Parts List
Replaceable Parts
The P6810 probe contains no user-replaceable parts, while the P686x and P6880
compression probes contain only the elastomer as a replaceable part. If probe
failure occurs, return the entire probe to your Tektronix representative for repair.
Refer to the following list for replaceable items:
Table 19: Parts list column descriptions
ColumnColumn nam
1
2Tektronix part numberUse this part number when
3 and 4
5
6
Figure & in
Serial n
Qty
Name & description
e
dex number
umber
Descripti
Items in this section
referenc
numbers to the exploded
view illustrations that follow.
ordering replacement parts
from Tek
Column t
the serial number at which
the part was first effective.
Column
serial number at which the
part was discontinued. No
entrie
part is good for all serial
numbers.
This indicates the quantity
of parts used.
An item name is separated
from the description by a
colo
limitations, an item name
may sometimes appear as
inc
Federal Catalog handbook
H6-1 for further item name
ide
on
e figure and index
tronix.
hree indicates
four indicates the
s indicate that the
n (:). Because of space
omplete. Use the U.S.
ntification.
breviations conform to American National Standard ANSI Y1.1-1972.
Abbreviations
Ab
66P6800 Series Logic Analyzer Probes Instruction M anual
Replaceable Parts
Table 20: P6810
Figure
&index
number
34–1010-6810-101
-5
-2196-3471-
-3196-3470-XX4
-4
replaceable parts list
Serial
Tektronix part
number
352-1097-X
SMG50
071-1122-XX1
335-03
X
XX
45-XX
no.
effective
Serial no.
discont’dQtyName & descrip
P6810 STANDARD ACCESSORIES
tion
GENERAL PURP
OF LABELS AND LABELING INSTRUCTIONS)
4
2
2
1
PODLET HOLDER
P6810 LEADSET, 1 CH SINGLE-ENDED AND
DIFFERENTIAL
P6810 LEADSET, 8 CH SINGLE-ENDED
ADAPTER K IT; BAG OF 20 KLIPCHIP ADAPTER (40
TOTAL)
MANUAL,
PURPOSE LOGIC ANALYZER PROBE LABEL
P6810 PROBE, SHEET OF LABELS
OSE PROBE (INCLUDES SHEET
TECH; INSTRUCTIONS, P6810 GENERA L
Figure 34: P6810 General Purpose probe accessories
P6800 Series Logic Analyzer Probes Instruction Manual67
Replaceable Parts
Table 21: P6860
Figure
&index
number
35–1010-6860-101
-2020-2451-X
-3
replaceable parts list
Serial
Tektronix part
number
X
020-2452-XX1
071-1123-XX1
335-0346-XX1
220-0255-XX1
no.
effective
Serial no.
discont’dQtyName & descrip
P6860 STANDARD ACCESSORIES
tion
P6860 PROBE (
PROBE LABELING INSTRUCTIONS)
1
P6860 THIN ELASTOMER HOLDER ASSEMBLY,
(used with Nut Bar), BAG OF 2 (BLACK) (TOTAL OF 2
ELASTOMER
P6860 THI
(used with Press-in nuts), BAG OF 2 (GRAY) (TOTAL
OF 2 ELASTOMER ASSEMBLIES)
MANUAL, TECH; INSTRUCTIONS, P6860 HIGH
DENSITY
P6860 PR
NUT BAR
INCLUDES SHEET OF LABELS AND
ASSEMBLIES)
CK ELA STOMER HOLDER ASSEMBLY,
LOGIC ANALYZER PROBE LABEL
OBE, SHEET OF LABELS
ASSEMBLY
Figure 35: P6860 High-Density probe accessories
68P6800 Series Logic Analyzer Probes Instruction M anual
Replaceable Parts
Table 22: P6864
Figure
&index
number
36–1010-6864-101
-2020-2451-X
-3
replaceable parts list
Serial
Tektronix part
number
X
020-2452-XX1
071-1313-XX1
335-1017-XX1
220-0255-XX1
no.
effective
Serial no.
discont’dQtyName & descrip
P6864 STANDARD ACCESSORIES
tion
P6864 PROBE (
PROBE LABELING INSTRUCTIONS)
1
THIN ELASTOMER HOLDER ASSEMBLY, (used
with Nut Bar), BAG OF 2 (BLACK) (TOTAL OF 2
ELASTOMER
THICK ELA
with Press-in nuts), BAG OF 2 (GRAY) (TOTAL OF 2
ELASTOMER ASSEMBLIES)