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1. Accessing the DPOJET M-PHY Essentials Measurements ..................................................................... 8
2. List of Transmitter Tests ...................................................................................................................... 10
3. Test Setup ........................................................................................................................................... 13
Jan 24, 2011 (Version 0.5) Added TX_EYE and will be added SJT/LJT, limit files
Apr 18, 2011 (Version 0.6) Added PSD measurement
Sep 14, 2012 (Version 0.7) Rewritten MOI for new setup files and added measurements
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INTRODUCTION
M-PHY enables faster data transfer rates with the help of an embedded clock, and is capable of
transmitting signals both in the burst mode and in the differential mode of data transfer.
Different data rates gave flexibility to operate at low speed as well as high speed and speed
ranges defined in different gears enable it suit for many application . M-PHY works either
with an independent clock embedded at the Transmitter and the Receiver and also supported
reference clock configuration
The interface is electrical but also optical friendly and enable optical data transport inside the
interconnect module. The interface can be single lane or multiple lanes gave flexibility to
configure and support multiple protocol
A block diagram of a typical link is as shown below [1]:
Multiple lanes in each direction are incorporated at both Transmitter (TX) and Receiver (RX),
which results in a link achieving the required data rate.
A LANE consists of a Single TX, RX and line that connect TX and RX using a differential wire
corresponding to two signaling wires DP and DN.
M-PHY Test Specifications are defined at the PINS of the M-TX and M-RX. The transmission lines
between the two points are called TX lines. A line may contain a converter for other media such
as Optical fiber.
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For advanced configuration, module and media converters supported are as follows [1]:
Differential LINE
Voltage
M-TX Output
Impedance
M-RX Input
Impedance
LINE State set by
LINE State Name
Positive
Low
Any
M-TX
DIF-P
Negative
Low
Any
M-TX
DIF-N
Zero
High
Any
M-RX
DIF-Z
Unknown or
floating
High
Any
None
DIF-Q
An interface based on M-PHY technology shall contain at least one LANE in each direction;
there is no symmetry requirement from an M-PHY prospective.
All lanes in a signal link are called SUB links. Two sub links of opposite directions provide bidirectional transport and additional LANE management called LINK. A set of M-TX and M-RX in a
device that composes one interface port is denoted as M-Port.
LINE state
Positive differential voltage driven by M-TX is denoted by LINE state DIF-P, a negative
differential voltage driven by M-TX is denoted by LINE state DIF-N, and a weak zero differential
voltage is maintained by M-RX.
Table1: Line State
M-TX terminates both wires with characteristic impedance during any DIF-P or DIF-N state. MRX does not terminate the LINE and does so optionally. In case of M-RX, the option of
Terminating or not terminating with characteristic impedance is interchangeable.
M-TX supports two drive strengths. When configured for Large Amplitudes (LA), it supports 400
mv PK NT (roughly 200 mVPKRT), while when configured for Small Amplitudes (SA) it will be 240
mV_NT (120mVPK-RT), Default will be large amplitude.
Termination
Swing
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References
[1] MIPI Alliance Specification for M-PHY, v1.00.00
[2] M-PHY Physical Layer Conformance Test Suite, Version 0.80
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1. Accessing the DPOJET M-PHY Essentials Measurements
Figure 1-1: TekScope Analyze Menu
On a supported Tektronix oscilloscope TekScope menu, go to Analyze -> MIPI M-PHY Essentials,
and click on it to invoke (see Figure 1-1)the M-PHY setup library in DPOJET standards tab. Figure
1-2 shows the DPOJET standards menu.
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Figure 1-2: DPOJET M-PHY Standard Menu
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