Tektronix Fully Buffered DIMM Reference manual
Technical Reference
Fully Buffered DIMM (FB-DIMM)
Methods of Implementation (MOI)
071-2042-00
www.tektronix.com
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Table of Contents
1 Introduction to RT-Eye FB-DIMM Compliance Module......................1
2 FB-DIMM Compliance Measurements ...................................................1
2.1 Common Specifications between Transmitter and Receiver.................1
2.2 Differential Transmitter (TX) Output Specifications.............................2
2.3 Differential Transmitter (TX) Compliance Eye Diagrams....................4
2.4 Differential Receiver (RX) Input Specifications.....................................5
2.5 Receiver Compliance Eye Diagrams........................................................7
2.6 Reference Clock Specifications.................................................................8
3 Preparing to Take Measurements..........................................................11
3.1 Required Equipment...............................................................................11
3.2 Probing Options for Transmitter testing...............................................11
3.2.1 SMA Connection ...........................................................................11
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3.2.2 AMB Ball connection....................................................................13
3.3 Initial Oscilloscope Setup........................................................................14
3.4 Running the RT-Eye Software ...............................................................14
3.5 Clock Recovery........................................................................................15
4 FB-DIMM Receiver (RX) Compliance Testing.....................................15
4.1 Probing the Link for RX Compliance....................................................16
4.2 Running a Complete RX Compliance Test ...........................................16
4.2.1 RX Differential Pk-Pk Input Voltage MOI.................................20
4.2.2 Minimum RX Eye Width MOI....................................................21
4.2.3 RX AC Common Mode Input Voltage MOI...............................22
4.2.4 RX DC Common Mode Input Voltage MOI...............................22
4.2.5 RX Waveform Eye Diagram Mask Test MOI............................23
4.2.6 RX Input Rise/Fall Time test MOI..............................................24
4.2.7 RX Tj Test MOI............................................................................25
4.2.8 RX Dj Test MOI (Using Dual-Dirac Method) ............................27
5 FB-DIMM Transmitter (TX) Compliance Testing...............................28
5.1 Probing the Link for TX Compliance....................................................28
5.1.1 TX Compliance Test Load............................................................28
5.2 Running a TX Compliance Test.............................................................29
5.2.1 TX Differential Pk-Pk Output Voltage MOI..............................34
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6 FB-DIMM Reference Clock Compliance Testing.................................46
6.1 Probing the Link for Reference Clock Compliance .............................46
6.2 Running a Complete Reference clock Compliance Test ......................46
5.2.2 TX De-Emphasized Differential Output Voltage
(Ratio) MOI..............................................................................................37
5.2.3 Minimum TX Eye Width MOI ....................................................39
5.2.4 TX Output Rise/Fall Time MOI..................................................40
5.2.5 TX AC Common Mode Output Voltage MOI............................42
5.2.6 TX DC Common Mode Voltage MOI .........................................43
5.2.7 TX Waveform Eye Diagram Mask Test MOI............................44
5.2.8 TX Dj Dual-Dirac MOI ................................................................45
6.2.1 Reference Clock Frequency Measurement Test MOI ...............48
6.2.2 Reference Clock Differential Voltage Hi and Lo Test MOI......50
6.2.3 Reference Clock Differential rise and fall edge rates test MOI 51
6.2.4 Reference clock Duty cycle test MOI...........................................52
6.2.5 Reference Clock Jitter RMS Test MOI.......................................52
7 Giving a Device an ID..............................................................................53
8 Creating a Compliance Report...............................................................53
ii Fully Buffered DIMM (FB-DIMM)
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1 Introduction to RT-Eye FB-DIMM Compliance Module
This document provides the procedures for making FB-DIMM compliance measurements with Tektronix
TDS6604B/DPO70604/DSA70604 or TDS6804B/DPO70804/DSA70804 or TDS7704B or TDS6124C or
TDS6154C oscilloscopes. The FB-DIMM Compliance Module (Opt. FBD) is an optional software plug-in
to the RT-Eye Serial Data Compliance and Analysis application (Opt. RTE-Version 2.0). The FB-DIMM
Compliance Module provides amplitude, timing, and jitter measurements described in Section 3 of Revision
0.85 of the FB-DIMM Draft Specification dated Dec 15, 2005. (For Compliance testing of FB-DIMM
signals (3.2 Gb/s, 4.0 Gb/s and 4.8 Gb/s) a minimum oscilloscope BW of 12 GHz is required. Using an
8 GHz BW oscilloscope, you can test the 3.2 GB/s FB-DIMM signals for compliance).
All references to the Draft Specification are to Revision 0.85 of the FB-DIMM Draft Specification. In the
subsequent sections, step-by-step procedures are described to help you perform FB-DIMM measurements.
Each measurement is described as a Method of Implementation (MOI). For further information, refer the
Compliance checklists offered to JEDEC members at
www.jedec.org.
2 FB-DIMM Compliance Measurements
Electrical Specifications for FB-DIMM are provided in Section 3 of the Draft Specification. Most of the
measurements are available in the FB-DIMM Compliance Module.
2.1 Common Specifications between Transmitter and Receiver
The TX and RX PLLs shall obey the bandwidth and jitter peaking specifications in the following table for
continuous transmission operation.
Table 1: PLL Specification for TX and RX
Fully Buffered DIMM (FB-DIMM) 1
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2.2 Differential Transmitter (TX) Output Specifications
See the Draft Specification for additional notes and a test definition.
Table 2: Summary of Differential Transmitter Outp ut Specifications (Sheet 1 of 2)
2 Fully Buffered DIMM (FB-DIMM)
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Table 2: Summary of Differential Transmitter Outp ut Specifications (Sheet 2 of 2)
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2.3 Differential Transmitter (TX) Compliance Eye Diagrams
Refer Section 3.3.1 of the Draft Specification for eye diagram definition.
Figure 1: Transmitter output eye specifications, with a nd without de-emphasis
4 Fully Buffered DIMM (FB-DIMM)
2.4 Differential Receiver (RX) Input Specifications
See the Draft Specification for additional notes and test definitions.
Table 3: Summary of Differential Receiver Input Specification (Sheet 1 of 2)
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Table 3: Summary of Differential Receiver Input Specification (Sheet 2 of 2)
6 Fully Buffered DIMM (FB-DIMM)
2.5 Receiver Compliance Eye Diagrams
See Section 3.4.1 of the Draft Specification for eye diagram definition.
Figure 2: Receiver input eye voltage and timing specifications
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2.6 Reference Clock Specifications
See the Draft Specification for additional notes and test definitions.
Table 4: Summary of Reference Clock Input Specifications (Sheet 1of 2)
8 Fully Buffered DIMM (FB-DIMM)
Table 4: Summary of Reference Clock Input Specifications (Sheet 2 of 2)
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10 Fully Buffered DIMM (FB-DIMM)
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3 Preparing to Take Measurements
3.1 Required Equipment
The following equipment is required to take measurements:
• TDS6604B/DPO70604/DSA70604 or TDS6804B/DPO70804/DSA70804 or TDS7704B or
TDS6124C or TDS6154C oscilloscope with the RT-Eye software (Opt. RTE- version 2.0) and FB-
DIMM Compliance Module (FBD) installed.
• Probes – probing configuration is MOI specific. Refer to each MOI for correct probe configuration.
• Test fixture −
1. NEX-TDSFBDP -Tektronix differential probing fixture. To access details, click the URL
http://www.busboards.com/products/scopeAccessories/tdsfbdp/index.html
2. TDSN4238B – Slot Parametric fixture is available through Tektronix.
3. New Intel DLB fixture – Contact Intel
3.2 Probing Options for Transmitter testing
The first step is to probe the link. Currently, the FB-DIMM specifications have defined the ball of the
AMB as the test point.
Note: Work is underway in the JEDEC standards committee to define CEM specifications. Tektronix
provided FBD module masks and test points are as per JEDEC standards. We also have added new masks
and new test points to be used with TDSN4238B and Intel’s DLB fixture (based on Intel’s FBD SIG test
masks). As and when the CEM specifications are defined by JEDEC, we will update our masks and test
points in our FBDIMM module.
3.2.1 SMA Connection
1. Two TCA-SMA inputs using
SMA cables (Ch1) and (Ch3)
The differential signal is created by
the RT-Eye software from the math
waveform Ch1-Ch3. The Common
mode AC measurement is also
available in this configuration from
the common mode waveform
(Ch1+Ch3)/2. This probing
technique requires breaking the
link and terminating into a
50 Ω/side termination of the
oscilloscope. While in this mode,
the FB-DIMM Serdes will transmit
the compliance test pattern (IBIST
Pattern) to maximize data
Probe Configuration A
SMA Psuedo-differential
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dependent jitter. Ch-Ch de-skew is
required as two channels are used.
This configuration does not
compensate for cable loss in the
SMA cables. The measurement
reference plane is at the input of
the TCA-SMA connectors on the
oscilloscope. Any cable loss should
be measured and entered into the
vertical attenuation menu for
accurate measurements at the SMA
Cable attachment point.
2. One P7380SMA differential
active probe (Ch1). (Only useful
for 3.2 Gb/s data rate)
The differential signal is measured
across the termination resistors
inside the P7380SMA probe. This
probing technique requires
breaking the link. While in this
mode, the FB-DIMM Serdes will
transmit the compliance test
pattern to maximize data
dependent jitter. Matched cables
are provided with the P7380 probe
to avoid introducing de-skew into
the system. Only one channel of
the oscilloscope is used. The
P7380SMA provides a calibrated
system at the Test Fixture
attachment point, eliminating the
need of compensating for cable
loss associated with the probe
configuration A.
Probe Configuration B
SMA Input Differential Probe
12 Fully Buffered DIMM (FB-DIMM)
3.2.2 AMB Ball connection
3. Two active probes (Ch1) and
(Ch3)
The differential signal is
created by the RT-Eye
software from the math
waveform Ch1-Ch3. The
Common mode AC
measurement is also available
in this configuration from the
common mode waveform
(Ch1+Ch3)/2. This probing
technique can be used for
either a live link that is
transmitting data, or a link that
is terminated into a “dummy
load.” In both the cases, the
single-ended signals should be
probed as close as possible to
the termination resistors on
both sides with the shortest
ground connection possible.
Ch-Ch de-skew is required
because two channels are used.
4. One P7380 (3.2 Gb/s data
rate only)/P7313 Differential
probe (Ch1)
The differential signal is
measured directly across the
termination resistors. This
probing technique can be used
for either a live link that is
transmitting data, or a link
terminated into a “dummy
load.” In both cases, the
signals should be probed as
close as possible to the
termination resistors. De-skew
is not necessary as a single
channel is used.
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Probe Configuration C
Two Single-ended Active Probes
Probe Configuration D
One Differential Active Probe
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3.3 Initial Oscilloscope Setup
After connecting the Device Under Test (DUT), follow the proper probing configuration for the test. Click
the DEFAULT setup button and the AUTOSET to display the serial data bit stream.
3.4 Running the RT-Eye Software
1. Go to File> Run Application> RT-Eye Serial Compliance and Analysis. For B and C series
oscilloscopes, select App>RT-Eye …. Please refer to the OLH.
Figure 3: Default menu of the RT-Eye software
Figure 3 shows the oscilloscope display. The default mode of the software is the Serial Analysis module
(Opt. RTE-Version 2.0). This software is intended for generalized Serial Data analysis on 8B/10B encoded
copper links.
14 Fully Buffered DIMM (FB-DIMM)
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