Tektronix DSA8200 Performance Verification

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DSA8200 Digital Serial Analyzer

ZZZ

Speciﬁcations and Performance Veriﬁcation

Technical Reference

*P071204804*

071-2048-04

DSA8200 Digital Serial Analyzer

ZZZ

Speciﬁcations and Performance Veriﬁcation

Technical Reference

Warning

The servicing instructions are for use by qualiﬁed personnel only. To avoid personal injury, do not perform any servicing unless you are qualiﬁed to do so. Refer to all safety summaries prior to performing service.

www.tektronix.com

071-2048-04

Copyright © Tektronix. All rights reserved. Licensed software products are owned by Tektronix or its subsidiaries or suppliers, and are protected by national copyright laws and international treaty provisions.

Tektronix products are covered by U.S. and foreign patents, issued and pending. Information in this publication supersedes that in all previously published material. Speciﬁcations and price change privileges reserved.

TEKTRONIX and TEK are registered trademarks of Tektronix, Inc.

Contacting Tektronix

Tektronix, Inc. 14150 SW Karl Braun Drive P.O . Bo x 50 0 Beaverto USA

For product information, sales, service, and technical support:

n, OR 97077

In North America, call 1-800-833-9200. World wide, visi t www.tektronix.com to ﬁnd contacts in your area.

General Safety Summary vii...................................

Service Safety Summary xi....................................

Preface xiii...................................................

Manual Structure xiii................................................

Manual Conventions xiii..............................................

Related Documentation xiv...........................................

Specifications

System Specifications 1--1.......................................

80E00 Electrical Sampling Modules Specifications 1--13..............

80C00 Optical Sampling Modules Specification s 1--21................

80A01 Trigger Prescale Preamplifier Module Specifications 1--68......

80A02 EOS/ESD Protection Module Specifications 1--70..............

80A05 Electrical Clock Recovery Module Specifications 1--72.........

80A06 PatternSync Trigger Module Specifications 1--76..............

Performance Verification

Performance Verification Procedures 2--1.........................

Brief Procedures 2--3...........................................

Perform the Diagnostics 2--3..........................................

Perform the Compensation 2--5........................................

Perform the Functional Tests 2--7.......................................

Verify Electrical Input Channels 2--7.................................

Verify Optical Input Channels 2--10...................................

Verify the Time Bases Work 2--13....................................

Perform Gated Trigger Test 2--18.....................................

Checking the Cooling Fan Operation 2--24.............................

Performance Tests 2--25.........................................

Prerequisites 2--26....................................................

Equipment Required 2--27..............................................

DSA8200 Digital Seria l Analyzer Test Records 2--30........................

DSA8200 Main-Instrument and 82A04 Module Test Record 2--31..............

80E00 Electrical Modules Test Record 2--33...............................

80C00 Optical Modules Test Record 2--41.................................

80A01 Electrical Clock Recovery Module Test Record 2--75..................

80A02 EOS/ESD Protection Module Test Record 2--77.......................

80A05 Electrical Clock Recovery Module Test Record 2--79..................

80A06 PatternSync Trigger Module Test Record 2--81.......................

Main Instrument 2--83..........................................

Prerequisites 2--83....................................................

Time Interval Accuracy, Short--Term Optimized and Locked-to-Internal

10-MHz Reference Modes 2--85.....................................

DSA8200 Digital Serial Analyzer Instrument and Modules Technical Reference

Table of Contents

External Direct Trigger Level Accuracy 2--87..............................

External Direct Trigger Sensitivity 2--90..................................

External Direct-Trigger Delay Jitter, Short-Term Optimized and Locked-to-

Internal 10-MHz Reference Modes 2--93...............................

Trigger Delay Jitter, Free Run Phase Corrected Mode 2--98...................

External Prescaled Trigger Delay Jitter, Short-Term Optimized Mode and

Locked-to-Internal 10-MHz Reference Mode 2--101......................

External Prescaled Trigger Sensitivity 2--104................................

DC Calibration Output 2--107............................................

Electrical Sampling Modules 2--109................................

Prerequisites 2--109....................................................

Input Impedance 2--111.................................................

DC Voltage Measurement Accuracy 2--113................................

Random Noise, Displayed 2--120.........................................

Analog Bandwidth up to 50 GHz (80E01, 80E06, 80E07, 80E08,

80E09, 80E10) 2--122...............................................

Analog Bandwidth above 50 GHz (80E06 and 80E09) 2--131...................

TDR-System Reflected Rise Time (80E04, 80E08, 80E10) 2--144...............

TDR-System Step Re sponse Aberrations (80E04) 2--147......................

TDR-System Step Re sponse Aberrations (80E08 and 80E10) 2--153.............

Optical Sampling Modules 2--161..................................

Prerequisites 2--161....................................................

Dark Level and Vertical Equivalent Optical Noise 2--161......................

Minimum Optical Bandwidth and Reference Receiver

Frequency Response 2--173..........................................

Integrated Rise Time and Aberrations Check 2--198..........................

Clock Recovery Optical Sensitivity Range and Recovered Clock

Timing Jitter 2--205................................................

80A01 Trigger Prescale Limiting Preamplifier Module 2--217...........

Prerequisites 2--217....................................................

System Trigger Sensitivity 2--218.........................................

80A02 EOS/ESD Protection Module 2--221..........................

Prerequisites 2--221....................................................

Logic Control Threshold 2--221..........................................

80A05 Electrical Clock Recovery Module 2--223......................

Prerequisites 2--223....................................................

Clock Recovery Sensitivity Range and Recovered Clock Timing Jitter 2--223......

80A06 PatternSync Trigger Module 2--231..........................

Prerequisites 2--231....................................................

Supported Clock Rates, Minimum Input Sensitivity, and Maximum

Jitter Checks 2--231................................................

DSA8200 Digital Serial Analyzer Instrument and Modules Technical Reference

List of Figures

Table of Contents

Figure 2--1: Compensation dialog box 2--5.........................

Figure 2--2: H ookup for electrical functional tests 2--8...............

Figure 2--3: Channel button location 2--8..........................

Figure 2--4: Channel button location 2--11..........................

Figure 2--5: Optical channel verification 2--12.......................

Figure 2--6: Hookup for the time base tests 2--13.....................

Figure 2--7: Channel button location 2--14..........................

Figure 2--8: Main time base verification 2--16.......................

Figure 2--9: Mag time base verification 2--17........................

Figure 2--10: Hookup for the gated trigger tests 2--19.................

Figure 2--11: Channel button location 2--20.........................

Figure 2--12: Signal triggered 2--21................................

Figure 2--13: Signal not triggered (signal frozen) 2--22................

Figure 2--14: Signal not triggered (no waveform) 2--23................

Figure 2--15: Signal triggered 2--24................................

Figure 2--16: Time interval accuracy test hookup 2--84...............

Figure 2--17: External direct trigger test hookup 2--87................

Figure 2--18: External direct trigger sensitivity test hookup 2--90.......

Figure 2--19: External direct trigger jitter test hooku p 2--93...........

Figure 2--20: Phase corrected trigger jitter test hookup 2--98..........

Figure 2--21: External prescaled test hookup 2--101...................

Figure 2--22: External prescaled trigger sensitivity test hookup 2--104....

Figure 2--23: DC calibration test hookup 2--108......................

Figure 2--24: Input impedance test hookup 2--111.....................

Figure 2--25: Vertical DC accuracy test hookup 2--114.................

Figure 2--26: Power-reference hookup 2--123.........................

Figure 2--27: Adapter characterization hookup 2--124.................

Figure 2--28: Measure reference signals 2--126........................

Figure 2--29: Reference signals hookup 2--128........................

Figure 2--30: SNA/Waveguide characterization 2--133.................

Figure 2--31: Power-reference characterization hookup 2--135..........

Figure 2--32: Hookup to measure Power-in 2--136.....................

Figure 2--33: Adapter--loss hookup 2--138...........................

Figure 2--34: HF response hookup 2--140............................

Figure 2--35: TDR reflected rise time hookup 2--144...................

DSA8200 Digital Serial Analyzer Instrument and Modules Technical Reference

iii

Table of Contents

Figure 2--36: TDR system step response aberrations hookup 2--147......

Figure 2--37: TDR system step response aberrations hookup 2--153......

Figure 2--38: Dark level and vertical equivalent optical noise

test hookup 2--162............................................

Figure 2--39: Minimum optical bandwidth and reference receiver

frequency response hookup 2-- 176..............................

Figure 2--40: Proper positioning of the impulse for optimum curve

download 2--180.............................................

Figure 2--41: Hookup for heterodyne test 2--191......................

Figure 2--42: Setup used for heterodyne sweep 2--193..................

Figure 2--43: Integrated rise time and aberrations hookup 2--199........

Figure 2--44: Clock recovery optical sensitivity range and

recovered clock timing jitter hookup 2--206.......................

Figure 2--45: Display example (clock signal not synchronized with

the data rate input) 2-- 211.....................................

Figure 2--46: Display example (clock signal synchronized with

the data rate input) 2-- 214.....................................

Figure 2--47: Display example (zoomed in at the crossing point) 2--215...

Figure 2--48: 80A01 test hookup 2--219..............................

Figure 2--49: 80A02 test hookup 2--222..............................

Figure 2--50: Clock recovery sensitivity range and recovered clock

timing jitter hookup 2--225....................................

Figure 2--51: Display example (clock signal synchronized with the

data rate input) 2-- 228........................................

Figure 2--52: Display example (zoomed in at the crossing point) 2--230...

Figure 2--53: Hookup for Clock Rates, Input Sensitivity, and

Jitter Checks 2--233..........................................

Figure 2--54: Example display for Supported Clock Rates,

Minimum Input Sensitivity, and Maximum Jitter Checks 2--234.....

DSA8200 Digital Serial Analyzer Instrument and Modules Technical Reference

List of Tables

Table of Contents

Table 1--1: System -- Signal acquisition 1--1.......................

Table 1--2: System -- Timebase 1-- 2..............................

T a b l e 1 -- 3 : S y s t e m -- T r i g g e r 1 -- 4................................

Table 1--4: System -- Trigger -- Phase correction modes

(mainframe with 82A04 Phase Reference module) 1--7...........

T a b l e 1 -- 5 : D i s p l a y 1 -- 8........................................

T a b l e 1 -- 6 : P o r t s 1 -- 8..........................................

Table 1--7: Data storage 1--10....................................

Table 1--8: Power consump tion, fuses, and cooling 1--10..............

Table 1--9: Mechanical 1--11.....................................

Table 1--10: System -- Environmental 1--12.........................

Table 1--11: Mechanical -- 82A04 Phase Reference module 1--12.......

Table 1--12: Electrical sampling modules -- Signal acquisition 1--14....

Table 1-- 13: Electrical sampling modu les (80E04, 80E08, and

80E10 TDR Sampling Modules) -- TDR system 1--18.............

Table 1--14: Electrical sampling modules -- Timebase system 1--19.....

Table 1--15: Electrical sampling modules -- Power consumption 1--20...

Table 1--16: Electrical sampling modules -- Mechanical 1--20..........

Table 1--17: Optical modules -- Descriptions 1--22...................

Table 1--18: Optical modules -- Acquisition 1--25....................

Table 1-- 19: Optical power meter 1--57............................

Table 1-- 20: Optical modules -- Clock recovery options

(CR, CR1, CR2, CR3, and CR4) 1--57..........................

Table 1--21: Optical modules -- Mechanical 1--65....................

Table 1--22: Optical modules -- Environmental 1--66.................

Table 1--23: Module characteristics 1--68...........................

Table 1-- 24: Environmental specifications 1--69.....................

Table 1--25: Mechanical specifications 1--69........................

Table 1--26: Electrical 1--70......................................

Table 1--27: Environmental and mechanical 1--70...................

Table 1--28: Module characteristics 1--72...........................

Table 1-- 29: Environmental specifications 1--74.....................

Table 1--30: Mechanical specifications 1--74........................

Table 1--31: Product family electromagnetic compatibility

(EMC) 1--75................................................

Table 1--32: Product family dynamics 1--75.........................

DSA8200 Digital Serial Analyzer Instrument and Modules Technical Reference

Table of Contents

Table 1--33: Product family atmospherics 1--75......................

Table 1--34: 80A06 PatternSync trigger system 1--76.................

Table 1--35: 80A06 Mechanical characteristics 1--78..................

Table 1--36: Product family electromagnetic compatibility

(EMC) 1--78................................................

Table 1--37: Product family dynamics 1--78.........................

Table 1--38: Product family atmospherics 1--78.....................

Table 2--1: Equipment required 2--27.............................

Table 2--2: DC voltage measurement accuracy 2--115.................

Table 2--3: Data for calculation of gain and linearity 2--119............

Table 2--4: Random noise limits 2--121.............................

Table 2--5: Power reference 2--123.................................

Table 2--6: DUT (device under test) reference response 1 2--127.........

Table 2--7: Bandwidth response (55 GHz -- 65 GHz) 2--142.............

Table 2--8: Dark level and vertical equivalent optical noise

limits 2--165................................................

Table 2--9: Minimum optical bandwidth limits 2--181.................

Table 2--10: Reference receiver fr equency response limits 2--182........

Table 2--11: Reference receiver frequency response limits 2--196........

Table 2--12: Minimum limits 2--202................................

Table 2--13: Aberrations 2--203....................................

Table 2--14: Clock recovery settings 2--208..........................

Table 2--15: Clock recovery settings and jitter limits 2--212............

Table 2--16: Clock recovery settings 2--226..........................

Table 2--17: Clock recovery amplitude and jitter limits 2--229..........

Table 2--18: PatternSync settings and jitter limits 2--235...............

DSA8200 Digital Serial Analyzer Instrument and Modules Technical Reference

General Safety Summary

Review the following safety precautions to avoid injury and prevent damage to this product or any products connected to it.

T o avoid potential hazards, use this product only as specified.

Only qualified personnel should perform service procedures.

While using this product, you may need to access other parts of the system. Read the General Safety Summary in other system manuals for warnings and cautions related to operating the system.

To Avoid Fire or

Personal Injury

Use Proper Power Cord. Use only the power cord specified for this product and

certified for the country of use. Power cord needed only in the mainframe, not modules.

Connect and Disconnect Properly. Do not connect or disconnect probes or test leads while they are connected to a voltage source.

Ground the Product. The mainframe is grounded through the grounding conductor of the power cord. To avoid electric shock, the grounding conductor must be connected to earth ground. Before making connections to the input or output terminals of the product, ensure that the product is properly grounded.

Ground the Product. The modules are indirectly grounded through the grounding conductor of the mainframe power cord. To avoid electric shock, the grounding conductor must be connected to earth ground. Before making connections to the input or output terminals of the product, ensure that the product is properly grounded.

Observe All Terminal Ratings. To avoid fire or shock hazard, observe all ratings and markings on the product. C onsult the product manual for further ratings information before making connections to the product.

The inputs are not rated for connection to mains or Category II, III, or IV circuits.

Do not apply a potential t o any terminal, including the common terminal, that exceeds the maximum rating of that terminal.

Power Disconnect. The power switch disconnects the product from the power source. See instructions for the location. Do not block the power switch; it must remain accessible to the user at all times.

Do Not Operate Without Covers. Do not operate this product with covers or panels removed.

Use Proper Fuse. Use only the fuse type and rating specified for this product.

DSA8200 Digital Serial Analyzer Instrument and Modules Technical Reference

vii

General Safety Summary

Avoid Exposed Circuitry. Do not touch exposed connections and components when power is present.

Wear Eye Protection. Wear eye protection if exposure to high-intensity rays or laser radiation exists.

Do Not Operate With Suspected Failures. If you suspect there is damage to this product, have it inspected by qualified service personnel.

Do Not Operate in Wet/Damp Conditions.

Do Not Operate in an Explosive Atmosphere.

Keep Product Surfaces Clean and Dry.

Provide Proper Ventilation. Refer t o the manual’s installation i nstructions for

details on installing the product so it has proper ventilation.

Symbols and Terms

Terms in this Manual. These terms may appear in this manual:

WARNING. Warning statements identify conditions or practices that could result in injury or loss of life.

CAUTION. Caution statements identify conditions or practices that could result in damage to this product or other property.

Terms on the Product. These terms may appear on the product:

DANGER indicates an injury hazard immediately accessible as you read the marking.

WARNING indicates an injury hazard not immediately accessible as you read the marking.

CAUTION indicates a hazard to property including the product.

viii

DSA8200 Digital Serial Analyzer Instrument and Modules Technical Reference

General Safety Summary

Symbols on the Product. The following symbols may appear on the product:

CAUTION

Refer to Manual

Chassis Ground

WARNING

High Voltage

Mains Disconnected

OFF (Power)

Protective Ground

(Earth) Terminal

Mains Connected

ON (Power)

Earth Terminal

Standby

DSA8200 Digital Serial Analyzer Instrument and Modules Technical Reference

General Safety Summary

DSA8200 Digital Serial Analyzer Instrument and Modules Technical Reference

Service Safety Summary

Only qualified personnel should perform service procedures. Read this Service Safety Summary and the General Safety Summary before performing any service

procedures.

Do Not Service Alone. Do not perform internal service or adjustments of this product unless another person capable of rendering first aid and resuscitation is present.

Disconnect Power. To avoid electric shock, switch off the instrument power, then disconnect the power cord from the mains power.

Use Care When Servicing With Power On. Dangerous voltages or currents may exist in this product. Disconnect power, remove battery (if applicable), and disconnect test leads before removing protective panels, soldering, or replacing components.

To avoid electric shock, do not touch exposed connections.

DSA8200 Digital Serial Analyzer Instrument and Modules Technical Reference

Service Safety Summary

xii

DSA8200 Digital Serial Analyzer Instrument and Modules Technical Reference

Preface

Manual Structure

Manual Conventions

This manual contains the specifications and performance verification procedures for the DSA8200 Digital Serial Analyzer and the modules that can be installed in this instrument (except the 80A03 module).

NOTE. The 80A03 instruction manual contains its own specifications and servicing information.

Read this preface to learn how this manual is structured, what conventions it uses, and where you can find other information related to this product.

This manual is divided into chapters that are made up of related subordinate topics. These topics can be cross referenced as sections.

Be sure to read the introductions to all procedures. These introductions provide important information needed to do the service correctly, safely, and efficiently.

Modules

Safety

This manual uses certain conventions that you should become familiar with before attempting service.

Throughout this manual, the term module appears. A module is composed of electrical and mechanical assemblies, circuit cards, interconnecting cables, and a user-accessible front panel. References to a module are different than references to products such as “Sampling modules”, “Phase Reference modules”, or “Accessory modules”, which are products installed in the instrument compartments.

Symbols and terms related to safety appear in the General Safety Summary found at the beginning of this manual.

DSA8200 Digital Serial Analyzer Instrument and Modules Technical Reference

xiii

Preface

Specifications

System Specifications

NOTE. This specification is for the instrument; the specifications for the optical, electrical, and other modules that insert in the module compartments of the instrument front panel are included later in this chapter.

This section contains the specifications for the DSA8200 Digital Serial Analyzer.

The 82A04 Phase Reference module affects the DSA8200 mainframe specifications; therefore, there is no separate specification section for the 82A04 module.

All specifications are guaranteed unless noted as “typical.” Typical specifications are provided for your convenience but are not guaranteed. Specifications that are marked with the T symbol are checked in the Performance Verification chapter of this manual.

All specifications apply to the instrument and sampling modules unless noted otherwise. To meet specifications, these conditions must first be met:

1 The instrument must have been calibrated/adjusted at an ambient tempera-

ture between +10 EC and +40 EC.

1 The instrument must have been operating continuously for 20 minutes within

the operating temperature range specified.

1 The instrument must be in an environment with temperature, altitude,

humidity, and vibration within the operating limits described in these specifications.

NOTE. “Sampling Interface” refers to both the small module compartments and the large module compartments, unless otherwise specified.

Table 1- 1: System - Signal acquisition

Description Characteristics

Number of input channels 8 acquisition channels, maximum.

Number of small sampling module compartments

Number of large sampling module compartments

Small Sampling Module Interface Tekprobe-Sampling Level 3. Hot switching is not permitted on this interface.

Large Sampling Module Interface Tekprobe-Sampling Level 3. Hot switching is not permitted on this interface.

4 compartments, 2 channels per compartment, for a total of 8 channels1.

2 compartments, for a total of 4 channels1.

DSA8200 Digital Serial Analyzer Instrument and Modules Technical Reference

1- 1

System Specifications

Table 1- 1: System - Signal acquisition (cont.)

Description Characteristics

Compartment assignments and conflict resolution

Compartment utilization Supports the 80xxx and 82xxx nomenclated modules, including Phase Reference

Real time accessory interface Small and large slots support TekProbe-SMA, Levels 1 and 2 at front of modules

Vertical sensitivity ranges 10 mV to 1 V full scale at TekProbe-Sampling interface. May be scaled according to

Vertical operating range Refer to module specifications.

Vertical number of digitized bits 14 bits at TekProbe-Sampling interface.

Offset capabilities Open loop offset mode is supported at TekProbe-Sampling interface.

Offset range Refer to module specifications.

Offset resolution 14 bits over ±1.8 V at TekProbe-Sampling interface.

Total channels ≤ 8.

Population of the Ch 1 / Ch 2 large compartment with any module (other than one requiring power only) displaces functionality of the Ch 1 / Ch 2 small compartment. Population of the Ch 3 / Ch 4 large compartment with any module (other than one requiring power only) displaces functionality of the Ch 3 / Ch 4 small compartment.

modules.

equipped with probe connector. TelConnect probes are supported with 80A03 accessory for all slot small slot modules. Hot switching is permitted on this real time accessory interface.

sampling module scaling characteristics.

Table 1- 2: System - Timebase

Description Characteristics

Horizontal modes

Mainframe Short term jitter optimized and Locked to 10 MHz Reference are supported. The 10 MHz

reference may be internal or external.

Mainframe with 82A04 Free Run and Triggered Modes are supported.

Sampling rate

Mainframe (regular modes) DC -- 200 kHz maximum, dictated by trigger rate and actual holdoff setting. If trigger rate is

less than the maximum, or the requested holdoff exceeds the minimum, the trigger rate and/or holdoff will dictate the sampling rate.

Mainframe with 82A04 (phase corrected modes)

Record length

DC -- 50 kHz maximum, one channel. If trigger rate is less than the maximum, or the requested holdoff exceeds the minimum, the trigger rate and / or holdoff will dictate sampling rate.

20, 50, 100, 250, 500, 1000, 2000 and 4000 samples.

1- 2

DSA8200 Digital Serial Analyzer Instrument and Modules Technical Reference

System Specifications

Table 1- 2: System - Timebase (cont.)

Description Characteristics

Horizontal scale range 100 fs/div to 5 ms/div in 1, 2, 5 steps or 100 fs increments are supported. Maximum record

lengths apply at certain ranges per table. For record lengths greater than 1000, the horizontal scale is limited as shown in the table below.

Scale set to an integer multiple of: Maximum record length

100 fs/div 1000

200 fs/div 2000

400 fs/div 4000

Horizontal position range

Mainframe 50 ms maximum.

Mainframe with 82A04 Range is determined by the following formula where (f) equals the frequency of the

reference clock.

× 2

Horizontal resolution 1 fs minimum.

Horizontal position setting resolution 10 fs minimum.

T Time interval accuracy, short term jitter optimized mode

Strobe placement accuracy for a given horizontal interval and position on same strobe line per table below. (Contribution from 80E04 sampling module is included in specification.)

1 ps + 1% of interval, horizontal scale ≤ 20 ps/div, rightmost point of measurement interval <200 ns.

T Time interval accuracy, locked to internal 10 MHz reference mode

Timing accuracy, free run phase corrected mode (mainframe with 82A04)

8 ps + 0.1% of interval, horizontal scale ≥ 21 ps/div, rightmost point of measurement interval <200 ns.

Guaranteed for all trigger rates.

Strobe placement accuracy for a given horizontal interval and position on same strobe line per table below. Contribution from 80E04 sampling module is included in specification.

1 ps + 1% of interval, ≤ 20 ps/div.

8 ps + 0.01% ofinterval, ≥ 21 ps/div.

Guaranteed for all trigger rates.

Maximum t iming deviation 0.1% of phase reference signal period, typical, relative to phase reference signal.

Assumes that phase reference frequency has been correctly entered. Operation of phase reference clock at frequencies requiring extended bandwidth or signal conditioning may require an instrument option.

DSA8200 Digital Serial Analyzer Instrument and Modules Technical Reference

1- 3

System Specifications

Table 1- 2: System - Timebase (cont.)

Description Characteristics

Timing accuracy, triggered phase corrected mode (mainframe with 82A04)

Horizontal deskew range and resolution

Mainframe --500 ps to +100 ns on any individual channel in 1 ps increments.

Mainframe with 82A04 Operating in Triggered Phase Corrected modes: --500 ps to +100 ns on any individual

The total number of samples contained in a single acquired waveform record (memory length in IEEE 1057, 2.2.1).

80E02 sampling module is included in this specification.

Maximum timing deviation relative to phase reference signal:

0.2% of phase reference signal period typical for measurements made >40 ns after trigger event.

0.4% of phase reference signal period typical for measurements made ≤40 ns after trigger event.

Assumes that phase reference frequency has been correctly entered.

channel in 1 ps increments.

Operating in Free Run Phase Corrected modes: Deskew range extends over the full clock cycle of the phase reference.

Table 1- 3: System - Trigger

Description Characteristics

Trigger sources

Mainframe External Direct Edge Trigger, External Prescaled Trigger, Internal Clock Trigger, and Clock

Recovery (with appropriately equipped optical modules).

Mainframe with 82A04 A phase reference signal may be applied to the instrument, when equipped with an

82A04 Phase Reference module, to provide additional phase information for signals being acquired in Triggered Phase Corrected modes and primary phase information for signals being acquired in Free Run Phase Corrected modes.

Two bandwidth options are available for the 82A04 and may be required over specific frequency ranges of operation:

The base product has an 8 GHz -- 25 GHz range of operation.

Option 60G extends the upper frequency range of operation to 60 GHz.

Auto/normal mode Normal mode: wait for trigger.

Auto mode: Trigger automatically generated after 100 ms time-out.

Slope + or -- select Edge + mode: Triggers on positive-slewing edge.

Edge -- mode: Triggers on negative-slewing edge.

1- 4

DSA8200 Digital Serial Analyzer Instrument and Modules Technical Reference

System Specifications

Table 1- 3: System - Trigger (cont.)

Description Characteristics

High frequency on/off select High Frequency ON mode: Removes trigger hysteresis and improves sensitivity. Should be

used when trigger slew rate exceeds 1 V/ns.

High Frequency OFF mode: Retains trigger hysteresis and improves noise rejection at low slew rates.

V ariable trigger hold off range and resolution

External direct trigger capabilities and conditions

External direct trigger input characteris-

tics

External direct trigger input range ±1.5 V (DC + peak AC) maximum input voltage.

External direct trigger maximum operating trigger signal

External direct trigger level range Adjustable between ±1.0 V.

T External direct trigger sensitivity

External direct trigger sensitivity 50 mV typical, DC -- 4 GHz.

External direct trigger level resolution 1mV

T External direct trigger level accuracy 50 mV + 0.10 x level.

External direct trigger delay jitter, short term optimized mode (typical)

T External direct trigger delay jitter, short term optimized mode

External direct delay jitter, locked to internal 10 MHz reference mode (typical)

T External direct delay jitter, locked to internal 10 MHz reference mode

External direct trigger minimum pulse width (typical)

External direct trigger metastability (typical)

External direct trigger real time accessory interface

Adjustable 5 s to 50 ms in 0.5 ns increments. When External Prescaled Trigger mode is used, hold off period applies to the Prescaled input divided by 16.

Direct edge triggering on signal applied to dedicated front panel connector with Holdoff, Level Adjust, Auto/Normal, High Frequency On/Off, and Enhanced Triggering On/Off controls.

External direct trigger specifications apply only under the condition that no other trigger signal is applied to respective connectors, except 82A04 Phase Reference modules.

Short term optimized mode and locked to internal 10 MHz reference specifications only apply under the condition that there is no external 10 MHz reference applied to the front panel connector.

50 Ω input resistance, DC coupled only.

p-p

100 mV, DC -- 3 GHz.

800 fs RMS + 5 ppm of horizontal position.

1.2 ps RMS + 10 ppm of horizontal position, or better.

1.6 ps RMS + 0.01 ppm of horizontal position.

2.5 ps RMS + 0.04 ppm of horizontal position, or better.

167 ps

Zero

Tekprobe-SMA, Levels 1 and 2. Hot switching is permitted on this real time accessory interface.

DSA8200 Digital Serial Analyzer Instrument and Modules Technical Reference

1- 5

System Specifications

Table 1- 3: System - Trigger (cont.)

Description Characteristics

External prescaled trigger capabilities and conditions (typical)

Prescaled triggering on signal applied to dedicated front panel connector with Holdoff, Auto/Normal.

External prescaled trigger specifications apply only under the condition that no other trigger source is applied to respective connectors.

Short term optimized mode and locked to internal 10 MHz reference specifications only apply under the condition that there is no external 10 MHz reference applied to the front panel connector.

External prescaled trigger input character-

50 Ω AC coupled input resistance; divide-by-sixteen prescaler ratio, fixed level zero volts.

istics (typical)

External prescaled trigger absolute

±2.5 Vpp

maximum input (typical)

T External prescaled trigger sensitivity

Frequency range Sensitivity

and usable range

External prescaled trigger delay jitter,

2GHz--12.5GHz 200 mV

0.9 ps

+ 5 ppm of horizontal position.

RMS

to 800 mV

p-p

short term optimized mode (typical)

T External prescaled trigger delay jitter,

1.3 ps

+ 10 ppm of horizontal position, or better.

RMS

short term optimized mode

External prescaled delay jitter, locked to

1.6 ps

+ 0.01 ppm of horizontal position.

RMS

internal 10 MHz reference mode (typical)

T External prescaled delay jitter, locked

2.5 ps

+ 0.04 ppm of horizontal position, or better.

RMS

to internal 10 MHz reference mode

External prescaled trigger metastability

Zero

(typical)

Internal clock trigger rates Rate selectable at 25, 50, 100, and 200 kHz internally and is provided to the trigger, to the

TDR stimulus drives in the small sampling module interfaces, and to the Internal Clock Out connector on the front panel.

The input resistance at the external direct trigger input and the maximum input voltage.

Maximum signal input for maintaining calibrated time base operation.

Section 4.10.2 in IEEE standard number 1057. The minimum signal levels required for stable edge triggering of an acquisition.

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DSA8200 Digital Serial Analyzer Instrument and Modules Technical Reference

System Specifications

Table 1- 4: System - Trigger - Phase correction modes (mainframe with 82A04 Phase Reference module)

Description Characteristics

Phase correction capabilities and conditions

A phase reference signal may be applied to a mainframe equipped with the 82A04 Phase Reference module to provide additional phase information for signals being acquired in Triggered Phase Corrected modes and primary phase information for signals being acquired in Free Run Phase Corrected modes. For Phase Corrected Triggered modes, the phase correction functionality overlays the functionality of the basic trigger operation, although restrictions may be imposed.

Number of phase reference module inputs

One per 82A04 module. Up to three 82A04 modules may be inserted in the small compartments of the mainframe and characterized to operate with one or more vertical sampling module(s); only one phase correction module at a time can be used.

Phase reference input connector Precision 1.85 mm female connector (V).

A 2.4 mm male to 2.92 mm (K) female adapter is provided as a standard accessory to provide connection to 3.5 mm compatible male connectors.

Phase reference module input

50 Ω AC coupled through 5 pF

characteristics (typical)

Phase reference module input

(offset ±1000 mV)

p-p

dynamic range (nonclipping)

Phase reference module input

±3 V maximum

maximum nondestruct range

Phase reference module input signal

600 mV

p-p

to 1.8 V

to achieve typical specified jitter performance.

p-p

level

Phase reference mode jitter (typical) Triggered and Free Run Phase Corrected Modes, 8 GHz -- 60 GHz clock,

600 mV -- 1.8 V

input: 200 fs

p-p

RMS

or better.

Triggered and Free Run Phase Corrected Modes, 2 GHz -- 8 GHz sine wave clock, 600 mV -- 1.8V

input: 280 fs

p-p

or better. The jitter increase between 8 GHz and

RMS

2 GHz is roughly inverse proportion to clock frequency.

Operation of phase reference clock at frequencies requiring extended bandwidth or signal conditioning may require an optional filter accessory.

Phase reference module compensation temperature range (typical)

±5 EC where compensation was performed. If compartment is changed on mainframe, or if sampling module extender is employed, or length of sampling module extender is changed, the Phase Reference module must be recompensated.

T Phase reference module input operating frequency

With 82A04 8GHzto25GHz

With 82A04-60 G 8GHzto60GHz

DSA8200 Digital Serial Analyzer Instrument and Modules Technical Reference

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System Specifications

Table 1- 4: System - Trigger - Phase correction modes (mainframe with 82A04 Phase Reference module) (cont.)

Description Characteristics

Phase reference module input operating frequency (typical)

With 82A04 2 GHz to 25 GHz usable range.

Operation below 8 GHz requires the use of external filters, as follows:

2 GHz -- 4 GHz: requires 2.2 GHz peaked lowpass filter kit, Tektronix part number 020-2566-00.

4 GHz -- 6 GHz: requires 4 GHz lowpass filter kit, Tektronix kit part number 020-2567-00.

6 GHz -- 10 GHz: requires 6 GHz filter lowpass filter kit, T ektronix kit part number 020-2568-00.

2 GHz to 25 GHz settable range.

With 82A04-60 G 2 GHz to 60 GHz usable range. Operation below 8 GHz requires the use of external

filters as noted for the standard 82A04.

2 GHz to 110 GHz settable range.

Table 1- 5: Display

Specifications Characteristics

Display type 210.4 mm (wide) x 1.578 mm (high), 263 mm (10.4 inch) diagonal, liquid crystal active matrix

color display (LCD).

Display resolution 640 horizontal by 480 vertical pixels.

Pixel pitch Pixels are 0.3288 mm (horizontal) and 0.3288 mm (ver tical).

Table 1- 6: Ports

Specifications Characteristics

Video output 1 15-pin D-subminiature connector on the rear panel. Used for a second monitor (DDC28

compliant.)

Video Output 2 15-pin D-subminiature connector on the rear panel. Used for an auxiliary duplicate primary

monitor (VGA).

Parallel port (IEEE 1284)

25-pin D-subminature connector on the rear panel. Supports the following modes: 1 Standard mode, output only

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1 Bi-directional, PS/2 compatible

1 Bi-directional Enhanced Parallel Port (IEEE 1284 standard, Mode 1 or Mode 2, v1.7)

1 Bi-directional high speed Extended Capabilities Port (ECP)

DSA8200 Digital Serial Analyzer Instrument and Modules Technical Reference

System Specifications

Table 1- 6: Ports (cont.)

Specifications Characteristics

Serial port 9-pin D-subminature serial-port connector using NS16C550 compatible UARTs supporting

transfer speeds up to 115.2 kbits/sec.

Keyboard and mouse interface USB and PS/2 compatible connectors.

LAN interface RJ-45 LAN connector supporting 10BASE-T and 100BASE-T.

External audio connectors External audio jacks for MIC, LINE OUT, LINE IN, SIDE, REAR, and CTR BASS.

USB interface Four USB 2.0 high speed connectors (one on the front panel, three on the rear panel).

GPIB interface Complies with IEEE 488.2.

Internal clock trigger out Square wave out from 50 Ω. back termination synchronized to the TDR internal clock drive

signal. Refer to Trigger System -- Internal Clock.

Typical performance into 50 Ω termination:

--0.20 to +0.20 V low level

+0.90 to +1.10 V high level

DC calibration output DC voltage from low impedance drive, programmable to 1 mV over ±1.25 V range maximum.

DC calibration output accuracy (typical)

T DC calibration output accuracy 0.2 mV + 0.1% into 50 Ω

External 10 MHz reference input 500 mV

Gated Trigger Input -- Logic Polarity

(Option GT equipped mainframes)

Gated Trigger Input -- Maximum nondestruct input levels

0.1 mV + 0.1% into 50 Ω

p-p

to5V

AC coupled into 1 kΩ, ±5 V maximum

p-p

A TTL logic 1 enables triggers to be accepted.

A TTL logic 0 disables all triggering.

Input held high (enable triggers) when no control signal is present.

±5 V maximum

(Option GT equipped mainframes)

Gated Trigger Input -- Enable-to-Acquire Delay

(Option GT equipped mainframes)

3 trigger cycles, where each cycle is defined as (holdoff time + trigger latency). For example:

With holdoff set to its minimum 5 s setting, and a 2.500 GHz clock signal applied to the

External Direct Trigger input (a period of 400 ps), the Enable-to-Acquire delay is approximated

as 3 x (5 s + 0.0004 s) = 15.0012 s.

The Enable-to-Acquire delay is the amount of time after the Gated

Trigger has been enabled (the level goes from TTL LOW to HIGH) when the first valid sample is

retained by the system as the beginning of the waveform record length. When the Gated Trigger

is enabled and triggers begin to occur, the system will reject the first three samples to avoid

system recovery conditions. Once the first three points have been

discarded, then the next valid trigger cycle will be the first point of the

record section.

Gated Trigger Input -- Maximum Disable Time

(Option GT equipped mainframes)

The system checks the status of the gated Trigger approximately once per holdoff and rearm

cycle. If the Gated Trigger is disabled immediately after this system check, it will allow nominally

a maximum time of (holdoff + trigger period) to elapsed before the checking for the status of the

Gated Trigger input, recognizing the disable condition, and halting any further sampling of the

signal.

DSA8200 Digital Serial Analyzer Instrument and Modules Technical Reference

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System Specifications

Table1-7:Datastorage

Specifications Characteristics

CD--RW/DVD drive capacity CD-RW/DVD ROM combo, 644 MB, 16.7 MB/sec, mounted on front panel

Hard disk drive capacity ≥ 40 Gbytes

Table 1- 8: Power consumption, fuses, and cooling

Specifications Characteristics

Source voltage and frequency Range for the line voltage needed to power the instrument within which the instrument meets its

performance requirements.

100-240 V RMS ±10%, 50/60 Hz 115 V RMS ±10%, 400 Hz CAT II

Fuse rating Current and voltage ratings and type of the fuse used to fuse the source line voltage.

Twosizescanbeused:

(0.25 x 1.25 inch size): UL 198G & CSA C22.2, No. 59 Fast acting: 8 Amp, 250 V; T ektronix part number 159-0046-00, BUSSMAN part number ABC-8, LITTLEFUSE part number 314008.

(5 x 20 mm size): IEC 127, sheet 1, fast acting “F”, high breaking capacity, 6.3 Amp, 250 V, BUSSMAN part number GDA ±6.3, LITTLEFUSE part number 21606.3.

Power requirements Maximum: 600 Watts.

Fully Loaded: 275 Watts, typical. Mainframe with keyboard and mouse, no modules: 192 Watts, typical.

An example of a fully loaded mainframe for these characteristic loads has installed optical modules, electrical modules, and active probes comprised of:

one 80C1 1-CR4 one 80A05-10G three 067-0387-02 one 067-0397-02

There is typically a slight 10 W deviation in the dissipation for various line conditions ranging from 48 Hz through 400 Hz as well as operating ambient temperature.

Cooling requirements Six fans with speed regulated by internal temperature sensors.

A22 (51 mm) clearance must be maintained on the left side and right side of the instrument, anda0.752 (19 mm) clearance must be maintained on the bottom of the instrument for forced air flow. It should never be operated on a bench with the feet removed, nor have any object placed nearby where it may be drawn against the air vents.

No clearance is required on the front, back, and top.

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DSA8200 Digital Serial Analyzer Instrument and Modules Technical Reference

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Tektronix DSA8200 Performance Verification

Specifications and Main Features

Frequently Asked Questions

User Manual

Table of Contents

General Safety Summary

Preface

Specifications