Controls and Connectors
Display Tests
Channels A and
INPUT CONSIDERATIONS
l
lnput Coupling
Attenuators and Maximum lnput Volts
Sensitivity and Frequency Range
Slope and LEVEL
FREQUENCY MEASUREMENTS
FREQ A
Triggering
Measurement
Measurement Rate
PERIOD MEASUREMENTS
Gating
Averaging
Low Frequencies
RATIO MEASUREMENTS
Bandwidth Limitations
Triggering
TIME INTERVAL MEASUREMENTS
Electronic
Single-Shot Using HOLD
GATE Output
MANUAL TIMING MEASUREMENTS
Starting and Stopping
Clocking Rate
I'OTALIZING
Purpose
Operation
REAR CONNECTOR
ASSIGNMENTS
Customizing the Interface
Control Lines
Signal Lines
5;PECIFlCATlONS
FUNCTIONS
DISPLAY
CH A and
OUTPUT
-Time Base
nstallation
nput Sources
StartIStop
B
B
Intervals
I10
INPUTS
Page SECTION 1 OPERATING INSTRUCTIONS (cont)
INTERNAL TlME BASE
OTHER
SECTION
SECTION
2
THEORY OF OPERATION
INPUT CIRCUIT
Attenuators, Channels A and
Signal Shaping and Slope Channels
A and
DCU Signal Selection Gates
Time
TlME BASE AND CONTROL CIRCUITS
1
Optional
Decade Divider Units
Gate Generator
COUNTER CIRCUITS
Decade Counter Units
Storage Register
Overflow Register and Drive
DECODE AND DISPLAY MULTIPLEX
Scan Clock
+8
Seven-Segment Decoder and Driver,
Leading Zero Suppression
lnput and Output Data Lines
REGULATED POWER SUPPLIES
3
SERVICE INFORMATION
Symbols and Reference Designators
Electrical Parts List
Internal Adjustment Procedure
Controls and Connectors Illustration
Block Diagram
Parts Location Grid
Trigger Amplifier Diagram
Counter Time Base and Control
Counters and Display Diagram
Mechanical Parts List
Fig.
Accessories and Repackaging
(B)
A
B (A Start-B Stop)
MHz Clock
1
MHz Clock
Counter and Time-Slot Decoder
and Display and Parameter
Diagram
1
Exploded View
(B)
(DDU's)
(DCU)
LED'S
.
Page
Section
1-DC
503
INTRODUCTION
Description
The DC 503 Universal Counter has six measurement
functions:
period timing, interval timing, manual timing, and event
counting.
The DC 503 operates in TEKTRONIX TM 500 Series
Power Modules only.
a multiple-compartment Power Module. The DC 503 is
fully compatible with other members of its digital measurement family.
The DC 503 has two channels
inputs and separate triggering level, attenuators, and
coupling mode controls. CH
CH
devices
positioned decimal point. Leading zeros to the left of the
frlequency counting, finding frequency ratios,
It
will operate in any compartment of
(A & B), each having BNC
A
has a 100 MHz capability,
B
10 MHz. Seven-segment LED numerical display
prov~ide 7-digit readout with an automatically-
SECTION
1
OPERATING
INSTRUCTIONS
most significant digit or the decimal point are blanked.
flashing display indicates register overflow.
Option
temperature-compensated, 5 MHz crystal oscillator to obtain a highly stable and precise internal time base. This
option includes
1 MHz clock.
l nstallation
Referring to Fig. 1-1, install the Counter and turn on the
Power Module. Note that installing any plug-in into a live
Power Module could cause arcing
thus reducing useful contact life; however, no internal
circuit damage will result.
1
-
Time Base
The DC 503 can be ordered equipped with a
a
divide-by-five IC counter to produce the
The DC 503
is
calibrated and ready to use as received.
at
the contact interface,
A
Fig.
1-1.
Plug-in Installation/removal.
Operating Instructions-DC
503
OPERATIONAL CHECK
Controls and Connectors
Pull out the tab labeled "Controls, Connectors, and
Adjustments" (at the rear of the manual) to expose the
front
ane el
illustration. Review the functions of the
controls, connectors, and indicators before continuing with
the operational checks.
Display Tests
With no signal applied,
displays and switching logic. The following checks will
most of the Counter's major circuits and ensure
readiness to make measurements. If any malfunctions are
detected, first refer to the Adjustment Procedure in the
Service section of this manual, then the System Mainte-
nance section of the Power Module manual.
Readout Segment Test.
check the seven character segments of each digit. A row of
8's should be displayed. This check of the display devices
and drivers can be done at anv time.
FREQ A Displays.
FREQ A GATE TlME of
location, leading zero suppression, and units indicators
according to Table
Using the FUNCTION switch, select a
1-1.
test
the DC 503's readout
Press the RESET button to
.O1
s.
Check the decimal point
TABLE
1-1
Decimal Point
.oooo
.00000
test
its
TABLE
NICLOCK RATE Switch
106
105
1 04
I
03
The GATE and units indicators should remain off.
PERIOD B Displays.
PERIOD B and the NICLOCK RATE switch to
the readout display according to Table
TABLE
NICLOCK RATE Switch 1 Units Indicator 1 Decimal Point
1
10
1 02
I
03
I
04
I
05
1
06
TlME AtB Displays.
TlME
A+B and the NICLOCK RATE switch .to
the readout displays according to Table
1-2
I
Decimal Point
.000000
.OOOOO
.OOOO
.ooo
Set the FUNCTIOIV Switch to
1.
Check
1-3.
1-3
ms
ms
ms
PS
PS
PS
PS
Set the FUNCTION switch to
.ooo
.oooo
.00000
.ooo
.oooo
.ooooo
.000000
1
s.
Check
1-4.
-
10
s
With the DISPLAY TlME control in the full ccw
position, observe that the GATE indicator flashes rapidly
for short GATE
TIMEs. Using a short GATE TIME, rotate the DISPLAY
TlME control slowly cw. Observe that the GATE light will
stay off for a longer and longer time, until the control
clicks into the HOLD detent position, holding off the
GATE indefinitely. Return the DISPLAY TlME control to
the ccw position.
RATIO A/B Displays.
RATIO A/B and the NICLOCK RATE switch to
Check the readout display according to Table
TIMEs and more slowly for longer GATE
kHz
Set the FUNCTION switch to
.OOOO
106.
1-2.
TABLE
NICLOCK RATE Switch
I
s
TIME MANUAL Displays.
TlME MANUAL and the NICLOCK RATE switch to
Check the readout display according to Table
1-4
Units lndicators
S
Set the FUNCTION switch to
Decimal Point
1-5.
0
-
1
ps.
Operating Instructions-DC
503
TABLE
NICLOCK
The GATE: light should turn on and an advancing count
should be diisplayed when the
pushed in. The GATE light should turn off when the count
is
stopped by releasing the STARTISTOP button. Test the
overflow display by setting NICLOCK RATE to
pressing START, letting the count advance until the last
decade (seventh digit) reaches
flash. Release the START button and observe that the
display
RESET clears the overflow condition, sets the count to
zero, and
RATE
Switch Units Indicators Decimal Point
still
flashes but the numbers do not change. Pressing
stops the flashing display.
1-5
ms
STARTISTOP button
9
and the display begins to
.ooo
I
ps,
is
TOTALIZE A
TOTALIZE A. Observe
display. The GATE light should turn on when the START
button
The units indicators should remain off.
Channels
the attenuators, can be checked in a no-signal-input
condition by generating psuedo-triggers with the LEVEL
controls.
other channel. Set FUNCTION to
CLOCK RATE to 1 ms. Rotate CH A LEVEL back and
forth through
on. Rotate CH B LEVEL back and forth through
selected slope until the GATE light turns off. The resultant
display
events.
method, consult the Service section of the manual for
troubleshooting aids.
is
pushed in, and turn off when START
A & B
The channel A & B input circuits, with the exception of
Select
+
is
If the GATE light cannot be turned on or off with this
Display. Set the FUNCTION switch to
a
zero
at
the right of the readout
is
released.
SLOPE for one channel and - SLOPE for the
TIME A-tB and NI
its
selected slope until the GATE light turns
its
the time interval between these two trigger
INPUT CONSIDERATIONS
l
nput Sourc:es
The switch] concentric with the LEVEL control of each
channel selects either the front-panel BNC connector
(external), or the rear interface connector (Internal) pins;
Channel A via pin
The External inputs present high impedances of approximately 1
input circuits; present nominal 50
typical coaxial cable signal connections.
ML2, paralleled by about 20 pF. The Internal
lnput Coupling
Front Panel pushbuttons select AC (Capacitive) or DC
(Direct) coupling for each channel's input signal. This
coupling takes place
selected
attenuators of each channel.
soulrce and before they are passed on to the
16A, and Channel B via pin 17B.
Q
impedances to match
after the signals arrive from the
Attenuators and Maximum lnput Volts
Both front-panel pushbuttons, when out, provide no
(XI
).
attenuation to the input signal
maximum safe input voltage
the frequency limit of each channel. With either the
XI 00 attenuator selected (buttons are self-cancelling), the
maximum safe input voltage
1 kHz or
less.
is
50 V (DC + peak AC), up to
is
500 V (DC + peak AC)
In this mode, the
XI0 or
Sensitivity and Frequency Range
CH A will respond to signal amplitudes of
mV, peak-to-peak, up to 100 MHz.
300
CH B will respond to signal amplitudes of at least
mV, peak-to-peak, up to 10 MHz.
300
Depending on the coupling mode selected, the low
is
frequency limit for each channel
coupled) or 10 Hz (AC-coupled).
either 0 Hz (DC-
at
least
at
Operating Instructions-DC
503
Slope and
A front-panel pushbutton for each channel determines
whether the trigger circuits will respond to either positive- stable triggering. See Fig.
or negative-going transitions of each input signal. over
(A)
LEVEL
Noise Impulses 200-millivolt
Erroneous count.
Fig.
1-2.
Triggeringcircuit responses to improper
hysteresis window
The LEVEL control for each channel allows the
operator to move the hysteresis window of the trigger
circuit to an optimum level on the input
+,I
.5
V of the input signal in the
(6)
Correct count.
(A)
and proper
(B)
LEVEL settings.
FREQUENCY MEASUREMENTS
FREO
100
GATE TIMEs
Make sure the LEVEL control
signal to the CH A INPUT. Set the DISPLAY TlME control
CCW.
Triggering
A
To measure and display the frequency of
MHz, set the FUNCTION switch to one
bracketed
under
the
heading
is
pushed in and connect the
a
signal up to
of
the shorter
of
FREO
A.
count varies from reading to reading,
jitter in the signal source. If the count changes unreasonable~
the
DC
503
is
not being triggered prc)per'yr either
because the controls are not set right or the signal
the
For frequency measurements, all CH B trigger settings
have no effect. "N" or "CLOCK RATE" settings are
irrelevant.
capabilities.
signal to assure
1-2.
The LEVEL control adjusts
XI
ATBEN position.
it
is
probably due to
is
beyond
The CH A LEVEL, Slope, Coupling, and
controls all affect the ability to make a measurement. In
general, the trigger controls are similar to oscilloscope
controls, except that the end result is not a stable waveform
graphic display, but a stable digital frequency display.
Coupling and
quency
control for changing DC levels. The repetitive nature of
frequency signals makes SLOPE selection insignificant.
5
amplitude signals, select an attenuation factor such that the
attenuated signal
peak-to-peak. The LEVEL control must be varied for a
stable reading.
amplitude and frequency are close to (or perhaps beyond)
the specified limits.
show jitter when measured with 7-digit resolution. If the
measurements
Attenuators and
V, peak-to-peak, should not be attenuated. For higher
A signal which looks stable on an oscilloscope may still
SLOPE.
falls into the range of
It
will not be touchy unless the signal
Use AC-coupling
to
avoid re-adjusting the LEVEL
LEVEL.
Signals between
ATTENuator
for
most
300
500
mV to 5 V,
fie-
mV and
Measurement Intervals
To adjust the trigger controls, choose a short GATE
TlME such as
display as to whether the Counter is being triggered or not.
If
it
is, numbers will appear in the display. (If the frequency
is below
shortest gate times. For such low frequencies, a PERIOD
measurement
Final selection of GATE TlME depends on the
quency being measured, desired resolution, and willingness
of the operator to wait for a measurement. Using short gate
times, higher frequencies may be measured, but at the
expense of the greater resolution capabilities of the longer
gate times.
Resolution.
must wait
displayed.
and accuracy for signals below
second count will display fewer than the available 7 digits.
.I
s
or
.O1
s.
This gives rapid feeldback via the
100
HZ, numbers may not appear during the
is
better
suited-)
A
10
s
GATE TlME means the operator
10
seconds for a measurement to be made and
It
is
the only way to get best possible resolution
1
MHz. Even then, a
fre-
10
-
Operating Instructions-DC
503
Overflow.
it
is
Choose
-
number of the measurement as far to the left
Note the
Move the decimal point to the left by choosing longer
GATE TIME!; until the desired resolution
display will flash when the most significant number over-
flows the
lution does
except for quick A-B comparisons. The relationship
GATE TIME, measured frequency, displayed digits, and
overflow
:EF
10
Through intentional use of "overflow" displays,
possible to improve the resolution of the counter.
a
GATE TlME which displays the most significant
numbers displayed to the right of the decimal.
is
achieved. The
last
storage register. Note that the increased reso-
not add to the accuracy of the measurement,
is
shown in Table 1-6.
TABLE
10
1
2100
MHz
100
;
1
7
digits
(3verflow
(3verflow Overflow
s
Overflow Overflow Overflow
1
MHz
MHz
6 digits
7
digits
1-6
1
MHz
to
,
10
MHz
1
5
digits
6
digits
7
digits 6 digits
to
as
possible.
betwen
hl
MHz
1
4
digits
5
digits
7
digits
Measurement Rate
Once a stable measurement
which measurements are made can be controlled by the
DISPLAY TlME control. Turning the control cw holds
off the gate and stores the display for
a
before
DISPLAY TlME and GATE TlME together complete
measurement-display cycle.
The D
able from about 0.1
cw end. At the cw end, there
HOLD. In HOLD, the
displayed for an indefinite time. A new count and display
may be initiated by pushing the RESET button, turning the
DISPLAY TlME control ccw, or changing to another GATE
TIME.
new measurement
ISPLAY TI ME control
s
at
the ccw end to about 10
last
is
obtained, the rate
a
longer time
is
made and displayed.
is
uncali brated and vari-
is
a
detent position called
count taken will be stored and
at
s
at
the
a
PERIOD MEASUREMENTS
-
Gating
is
Period measurement
timers primarily to overcome a basic limitation of counters,
i.e., the long time required to make a high resolution high
accuracy measurement of low frequency signals. For
example, a 1 kHz signal requires 1,000 seconds of GATE
TlME to
second, a 1 kHz signal can gate
pulses from a 1 MHz clock.
functions of signal and clock as compared to the FREQ A
mode. In FREQ A, the gate
of clock pulses while signal events are counted, then waves can be measured accurately at the very low end if the
displayed. In PERIOD B, the gate
number of signal events (N), while 1 ps clock pulses are
counted,
Averaging
signal value over
the selected number of N (AVG'D OVER N CYCLES OF
B) increases the total time to take
to selecting
general, the product of the signal period and the selected N
acc~~mulate a million counts. However, in only one
Simply stated, the PERIOD B mode reverses the rather sensitive to wave shape and amplitude. Since
then displayed.
Resolutiori and accuracy
a
large number of signal events. Increasing
a1
longer GATE TlME in the F REQ A mode. In
provided in universal counter-
a
count of one million clock
is
held open for some number abruptly, square waves are preferred. Sine and triangle
is
held open for some
is
increased by averaging the
a
measurement, similar
factor should be 1 to < 10 seconds. The maximum period
capacity
frequency
with
Low
ularly in the lowest decade from 0.1 Hz to 1.0 Hz, become
desirable for the signal to pass through the trigger hysteresis
input amplitude
driven hard. For repetitive signals below 0.1 Hz, use the
TIME A*B mode.
its
the higher frequencies, the frequency mode should be used.
The CH B controls operate the same
Because PERIOD
frequencies, the use of DC COUPLING will be more
common than with CH A.
is
9,999,999
will
cause
practical
N=~.
Frequencies
Period measurements of signals below 10 Hz, and partic-
CH
B
is
the channel provided for period measurement;
bandwidth of 10 MHz
ps.
Therefore, a period X N product
an
overflow.
for
period
is
kept high so that the trigger input
B
measurements may involve very low
This
means
that
measurement
is
adequate for that purpose. For
is
O.l
as
the CH A controls.
the
lowest
Hz,
even
it
is
is
Operating Instructions-DC
503
RATIO MEASUREMENTS
In the RATIO A/B mode, the frequency of the signal
applied to CH A
applied to CH B, and the resultant ratio
that the normal "frequency" mode
is
divided by the frequency of the signal may be desirable to set the trigger controls independently.
is
displayed. Note This may be accomplished
is
basically a ratio
mode, in which the ratio of the unknown signal to the
internal clock
is
displayed. (Decade scaling of the internal
clock and decimal point positioning normalizes the display
relative to kHz or MHz units.)
Bandwidth Limitations
Because CH B has
feasible to make ratio measurements of two signals, both
well above
10
somewhat above
applied.
a
bandwidth of only
MHZ.
ow ever,
10
MHz if adequate signal amplitude
CH B will respond to signals
10
MHz,
it
is
not
Triggering
The operation of CH A and CH B trigger controls
same
as
for frequency and period measurement. In fact, digits will be best.
is
the
TIME INTERVAL MEASUREMENTS
since both channels must be triggered to obtain
as
follows:
1
)
Go to the FREQ A mode and adjust the CH A trigger
controls
for
a
normal
frequency
2)
Go to the PERIOD B mode and adjust the CH B
measurement.
trigger controls for a normal period measurement.
Leaving CH A and CH B trigger controls
3)
go
to
is
be
displayed.
the RATIO A/B mode. The correct ratio should
The NICLOCK RATE control may now be operated to
select maximum resolution. For most measurements, the
smallest value of "N" which produces
a
useful number of
a
display,
as
it
they
Electronic Startlstop
TlME A*B mode measures and displays the elapsed
The
time
interval
subsequent triggering of CH B. The triggering event does
not have to be the same one for both channels. Separate
events do not even have to be time related.
However, the most common application
the width (duration) of
slopes for each channel, rather than the frequency (or
period) of
waveforms shown in Fig.
ramp and coincident gate from an RG
ator, which
the gate duration accurately to
as
follows:
1)
Apply the RG
A
and CH B at the same time. Set CH A to trigger on
CH
the
+
SLOPE and CH B on the - SLOPE.
2)
Set the FUNCTION switch to FREQ A and adjust
CH A LEVEL for a stable frequency display. Select
PERIOD B and adjust CH B LEVEL for a stable time
display. Do not change the
between
a
complete cycle. For example, consider the
is
being triggered by
the
triggering
a
pulse, using opposite triggering
1-3.
These represent the output
5
501
gate (the triggering event) to both
SLOPE
of
CH
A
is
to measure
501
Ramp Gener-
a
100
Hz signal. Setting
ms may be accomplished
settings.
and
the
3) Set the FUNCTION switch to TIME A-+B and select
a
CLOCK RATE for appropriate resolutior~. A CLOCK
RATE of
I
ps
will give three-decimal-place resolution for
this
4)
When the RG
triggered and the DC
I
I
I
I
+3
v
CH
"
ov
Fig.
1-3.
source, RG
Trigger
I
Point
/-5ms-;
I
Triggering for a pulse duration measurement. (Signal
501
Ramp Generator.)
501
gate goes positive, CH A
503
gate opens, allovving internal
I
I
I
I
'
CHB
"
Trigger
A
Point
I
I
I
I
I
I
I
is
Operating Instructions-DC
503
clock pulses .to be counted. When the RG 501 gate starts to
is
return to zero, CH B
and the
-
operator can adjust the RG 501 controls until the required
accuracy
accurnulated count of clock pulses
5) If the count
is
ac:h ieved.
triggered, the DC 503 gate closes,
is
displayed.
is
off the desired time interval, the
Single-Shot Using HOLD
Single-shot time intervals can be measured by putting
the
DISPLAY TlME control in HOLD. This will lock out
MANUAL TIMING MEASUREMENTS
The TlME MANUAL position
TlME
CLOCK RATE switch and
display.
A+B electronic mode. In this mode, only the
Starting antl Stopping
The TIME MANUAL mode may be thought of
"stop-watch" type of operation. With the FUNCTION
switch in the TlME MANUAL position, the display starts
counting time-base pulses when the
pressed.
lated total
last
START command
again advance), or other controls are actuated. Pushing
RESET will return the display to zero. Changing the setting
It
wnll continue to count and display the accumu-
until the STARTISTOP button
count will then be held in the display until another
is
given (in which case the count will
is
a
manual analog of the
STARTISTOP switch affect the
STARTISTOP button
is
released. The
as
both channels after CH A and CH B have been triggered,
respectively. Pushing RESET clears the display and re-arms
the trigger channels for another measurement.
GATE
front-panel GATE OUTPUT jack. Since
with the time interval measurement,
oscilloscope to graphically relate the digital measurement to
the analog signal.
of the CLOCK RATE switch will change the frequency of
the time-base pulses being counted, and return the display
to zero.
Output
The internal gate of the DC 503
it
is
available
it
may be used with an
Clocking Rate
When the CLOCK RATE switch
one-second pulses are being counted, and the display
a
accumulation advances one count per second, and so on.
On the 1
one million counts per second.
is
9,999,999, the display will flash to indicate overflow;
however, the accumulation continues at the normal rate,
except that the digits for decades above
displayed.
ys position, the count accumulates
Whenever the accumulated count
is
in the
is
at
the
is
coincident
1
s
position,
at
the rate of
greater than
107 are not
TOTALIZING
Purpose
In the TOTALIZE A mode, signal
A INPUT
displayed during the time the STARTISTOP button
pushed in. This mode
mode.
relatively infrequent and irregular events.
a~re counted and the accumulated total
is a manual analog of the frequency
It's
main application
is
Operation
Apply the signal to CH A and set the trigger controls the
same as for frequency measurement.
Starting tlie Count.
and adjust the CH A LEVEL control until
Press the STARTISTOP button in
events
applied to CH
to accumulate a count of
a
count begins to
is
is
The
advance.
numbers. Only the CH A trigger controls, the RESET
button, and the
Stopping the Count.
released and no other controls are operated, the
will continue to be displayed. No more incoming events will
be added to the total.
Restarting and Resetting.
depressed, incoming events will advance the displayed total.
Resetting the count to zero can be done at any time by
pressing the RESET button or by moving the FUNCTION
switch to some other position, then back to TOTALIZE A.
accumulated count
STARTISTOP button affect the display.
If the STARTISTOP button
is
displayed in whole
When the START
last
is
is
total
again
Operating Instructions-DC
503
REAR
Customizing the Interface
Input and output access to the DC 503
rear of the main circuit board. Fig. 1-4 identifies the
contacts and their respective
A Power Module mainframe option (Option 2)
available which provides
to which
Also possible are intra-compartment connections with other
plug-in modules in multiple-compartment mainframes. The Reset, Time-Slot Zero
Control Lines
These lines allow the user to externally command the
DC
A Reset input line, which doubles
line, clears the Counter to zero when a low
An input line to disable the flashing overflow display also
doubles as an output signal line during overflow. The the interface for possible synchronous applications.
If0 lines can be hard-wired for external access.
503
to certain operating conditions.
CONNECTOR I/O ASSIGNMENTS
.
internal scan clock can be shut off by the Internal Scan
is
available at the
I10 assignments.
a
rear-panel, multi-pin connector
as
an output signal
is
applied to
it.
Clock Disable line, while using an external scan clock.
Signal Lines
These lines provide for signal input to each channel,
is
status and clock signal outputs, BCD data outputs, and
external scan clock inputs.
(TSO), Data Good, and
Overflow lines report the status of the DC 503. BCD data
lines report the count in an 8-4-2-1, serial-by-cligit method.
As long as the Internal Scan Clock Disable line remains
high, the Internal Scan Clock output signal
When the Disable line
Clock line becomes an input line for an External Scan
Clock signal.
The DC 503's internal
is
pulled down, the Internal Scan
1
MHz Clock signal
is
iis
available.
brought to
INTERNAL
OVERFLOW
SCAN
CLOCK
OUTIEXTERNAL
OUTIOVERFLOW
BCD
OUTPUT,
SERIAL-BY-DIGIT
CHANNEL B INPUT
FUNCTION
SCAN
DISPLAY
CHANNEL
Fig.
I
ASSIGNMENTS
CONTACT
I
I
1-
-
{
25B
24B
23
:::
19B
17B
16B
B
-1
CLOCK
IN
DISABLE
DATA
1-4.
IN
GOOD
B
INPUT
GROUND
InputIOutput contact assignments at rear connector.
4
+I
4
d
-
I
I
-
-
I
-
I
-
I
I
ASSIGNMENTS
FUNCTION
27A
26A
25A
20A
19A
17A
16A CHANNEL A INPUT
14A
INTERNAL
RESET,
TIME
SLOT
CHANNEL
1-MHz
CLOCK
SCAN
INIOUT
ZERO
BCD
OUTPUT, SERIAL-BY-DIGIT
A
INPUT
OUT
CLOCK
(TS,)
GROUNID
CllSABLE
Operating Instructions-DC
503
SPECIFICATIONS
+
FUNCTIONS
OUTPUT
Frequency counting, period timing, frequency ratioing,
interval timing, manual timing, and event counting.
DISPLAY
Display Accuracy,
Resolultions:
mum
RATIO
1
TOTALIZE
to about 10
(rear
mately 1
paralleled by approximately 20
l
Range,
position.
50 V; XI0 and X100, 500 V
Ranges:
to 100 MHz, CH
coupled) to 10 MHz.
A/B, 1/106, averaged over 106 cycles; PERIOD B,
ps/cycle of 6; TlME A B, I ps; TlME MANUAL I ps;
A,
s.
Signal Soi~rces,
connecitor interface)
MQ (External) or approximately 50 Q (Internal),
nput Sensit:ivity,
adjustable over
Ma:~imum Input Voltage
CH
,A,
+
1
count f time-base accuracy.
FREQ A, 0.1 Hz at 10 s GATE TIME;
1.
Display Time,
Detent position provides HOLD mode.
CH A
and
External (front panel BNC) or internal
300 mV pea k-to-pea k.
+I
0 Hz (DC coupled) or 10 Hz (AC coupled)
6, 0 Hz (DC coupled) or 10 Hz (AC
variable from about 0.1
B INPUTS
l nput Impedances,
pF.
Coupling,
.5 V
at
the input in XI ATTEN
(DC + peak AC): XI,
at
1 kHz or less.
approxi-
Ac or DC.
Trigger Level
Frequency
Maxi-
Gate,
counting interval.
Crystal Frequency
Stability
+50°c), after
s
Hour Warm-Up
Long-Term Drift
Accuracy
operating to 50,000 feet.
(O'C to
Temperature Range:
Altitude Range:
0 to +5 V, TTL-compatible, coincident with
INTERNAL TIME BASE
1 MHz
Within 1 part in
112
105
1
part or less in
1 05 per month
Adjustable to
within 1 part in
I
07
Standard
Option
5 MHz
Within 5 parts in
1 07
1
part or
107 per month
Adjustable to
within 5 parts in
I
09
1
less
in
OTHER
-400C
Operating,
+750c-
Operating; to 15,000 feet; Non-
OOC
to +50°c; Non-
Section
2-DC
503
INPUT
Attenuators, Channels A and (B)
Events to be counted are applied via front-panel INPUT
connector
are frequency-compensated voltage dividers consisting of
resistors R 18-R25
(C118-C125). Switches S20A (S120A) and S20B (S120B)
allow front-panel selection of XI, X10, or XI00 attenuation of
coupling.
J10 (J110) to the attenuators. The attenuators
(R 1 18-R 125) and capacitors C18
the input signal. C15 (C115) provides AC
SECTION
THEORY
OPERATION
CIRCUIT
DCU Signal Selection Gates
The two separate bistable multivibrators produce sharp
signal edges for the decade counter units
TOTALIZE A, RATIO
positions,
and
MANUAL, or TlME
bistable multivibrator for the DCU drive and
by the DDU (decade divider unit) output. In PERIOD
U200D-U226C
control signal from the 1 MHz clock.
U200A-U200C
is
switched
by the channel A input signal. In TlME
is
AIB, or one of the FREQ A
is
the active bistable multivibrator
A-tB, U200D-U226C
the active multivibrator.
OF
(DCU). In
is
the active
is
controlled
It
receives
2
B,
a
Signal Shaping and Slope, Channels A and (B)
Field effect transistor (FET) 035 (0135) presents a high
impedance
base of
between the LEVEL control R45
050 (0150). Adjustment of the LEVEL control changes
the bias on
the input signal will trigger the DC 503.
060 and 1050 in the Channel A signal shaping circuitry
comprise
in the Channel B signal shaping circuitry) acts
follower.
070-080 (0160-0170)
pair.
slope by biasing the desired slope to R74
positive slope
negative slope
follower 095
and the slope-determined output signal to the appropriate
DCU signal selection gate and the A start portion of the
Time
to1 the input signal and a low impedance to the
050 (01 50). FET 040 (0140) provides isolation
(R145) and the base of
(150 (0150) and thus selects what portion of
a
hiigh frequency, high gain amplifier. 068 (0150
as
an emitter
is
a
signal switched differential
+
SLOlPE switch S75 (S170) selects the triggering
(R165). The
is
passed through 090 (0165), while the
is
passed through 074 (0180). Emitter
(0185) couples the signal level to a TTL level
A+B ciircuit.
The output signal from the active bistable multivibrator
goes to NOR gate
toggle the decade counter units.
U200B. The output of U200B
is
used to
Time A+B (A Start-B Stop)
The two separate bistable multivibrators (U220C-U220D
and U220A-U220B) produce sharp edges to toggle U224A
and B.
In TlME
at
pin 1 of U226A, making pin 3 of NAND gate U226B
high. Pin 4 of U226B starts low when
pin 4 of U224A. Pin 5 of U226B starts high due to a low
pin 13 of U224B. An "A trigger" causes U224A to toggle,
which makes pin 4 of
pin 14 of
of event to be counted).
"armed" by the high that occurs
circuit now waits for a "B trigger" which will toggle
and put a low on pin 5 of U226B. When the B trigger
arrives,
gate generator circuit closing the gate. When the gate closes,
a CLEAR resets
A+B mode the FUNCTION switch puts a low
CLEAR
U226B high. This outputs a low to
U272B1 causing the gate to "open" (permits input
U224B simultaneously becomes
at
its
pins 12 and 13. The
U226B will output a high to pin 14 of U272B in the
U224A, which in turn resets U224B.
goes low
U224B
at
at
Loading...
+ 33 hidden pages
You need points to download manuals.
1 point = 1 manual.
You can buy points or you can get point for every manual you upload.