Tektronix DAS-4100 Series Users Guide

D AS-4100 Series

USER’S GUIDE

DAS-4100 Series

User’s Guide

Revision A - October 1995

Part Number: 94540

New Contact Information

Keithley Instruments, Inc.

28775 Aurora Road

Cleveland, OH 44139

Technical Support: 1-888-KEITHLEY

Monday – Friday 8:00 a.m. to 5:00 p.m (EST)

Fax: [phone]

Visit our website at http://www.keithley.com

The information contained in this manual is believed to be accurate and reliable. However, Keithley
Instruments, Inc., assumes no responsibility for its use or for any infringements of patents or other rights
of third parties that may result from its use. No license is granted by implication or otherwise under any
patent rights of Keithley Instruments, Inc.

KEITHLEY INSTRUMENTS, INC., SHALL NO T BE LIABLE FOR ANY SPECIAL, INCIDENT AL,
OR CONSEQUENTIAL DAMAGES RELATED TO THE USE OF THIS PRODUCT. THIS
PRODUCT IS NOT DESIGNED WITH COMPONENTS OF A LEVEL OF RELIABILITY
SUITABLE FOR USE IN LIFE SUPPORT OR CRITICAL APPLICATIONS.

Refer to your Keithley Instruments license agreement for specific warranty and liability information.

MetraByte, Visual Test Extensions, and VTX are trademarks of Keithley Instruments, Inc. All other
brand and product names are trademarks or registered trademarks of their respective companies.

© Copyright Keithley Instruments, Inc., 1995.

All rights reserved. Reproduction or adaptation of any part of this documentation beyond that permitted
by Section 117 of the 1976 United States Copyright Act without permission of the Copyright owner is
unlawful.

Keithley MetraByte Division

Keithley Instruments, Inc.

440 Myles Standish Blvd. Taunton, MA 02780

FAX: [phone]

Telephone: [phone]

●

Preface

The DAS-4100 Series User’s Guide provides the information needed to
install and use DAS-4101 Series and D AS-4102 Series high-speed analog
input boards.

The manual is intended for data acquisition system designers, engineers,
technicians, scientists, and other users responsible for installing, setting
up, and connecting applications to DAS-4101 and D AS-4102 boards. It is
assumed that users are familiar with data acquisition principles, with their
computer, and with their particular application.

Throughout the manual, references to DAS-4100 Series boards apply to
all DAS-4101 and DAS-4102 boards. When a feature applies to a
particular board, that board’s name is used.

The DAS-4100 Series User’s Guide is organized as follows:

Chapter 1 provides an overview of the features of DAS-4100 Series

●

boards, including a description of supported software and accessories.
Chapter 2 provides a detailed technical description of the features of

●

DAS-4100 Series boards.
Chapter 3 describes how to unpack, install, set up, and connect

●

applications to DAS-4100 Series boards.
Chapter 4 describes how to use the scope and test program to test the

●

functions of DAS-4100 Series boards.

●

Chapter 5 provides troubleshooting information.

●

Appendix A lists the specifications for DAS-4100 Series boards.

●

Appendix B describes the Keithley Memory Manager.
Appendix C presents bandwidth charts for the supported input ranges.

●

vii

An index completes this manual.

Note:

Not all features of DAS-4100 Series boards are currently
supported by all software packages. Refer to the documentation provided
with your software package to determine which features are supported.

viii

Table of Contents

Preface

1

Overview

Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-1

Supporting Software. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-2

Accessories. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-3

Technical Reference

2

Analog-to-Digital Converter (ADC) . . . . . . . . . . . . . . . . . . . . . .2-3

Data Format. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-3

Reference Voltage Range and Vernier Gain . . . . . . . . . . . . . .2-3

Static Conversion Errors . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-3

Noise Gain. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-6

Dynamic Conversion Errors . . . . . . . . . . . . . . . . . . . . . . . . . .2-6

Channels. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-7

Input Ranges . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-8

Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-9

Onboard Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-9

Buffer Memory. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-9

Nonvolatile Memory (EEPROM). . . . . . . . . . . . . . . . . . .2-10

Host Computer Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-10

I/O Address Space . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-10

Memory Address Space . . . . . . . . . . . . . . . . . . . . . . . . . .2-10

Bus Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-12

Counters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-12

Pacer Clocks. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-13

Internal Pacer Clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-13

External Pacer Clock. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-14

Triggers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-14

Trigger Sources. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-14

Software Trigger. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-15

Analog Trigger. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-15

Digital Trigger . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-16

iii

Trigger Acquisition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-16

Post-Trigger Acquisition . . . . . . . . . . . . . . . . . . . . . . . . .2-16

About-Trigger Acquisition . . . . . . . . . . . . . . . . . . . . . . . .2-20

Trigger Synchronization . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-23

Equivalent Time Sampling (ETS) Option . . . . . . . . . . . . . . . . .2-24

Peak Detector Option. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-27

3

Setup and Installation

Unpacking the Board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-1

Installing the Software . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-2

Installing the DAS-4100 Series Standard Software Package .3-2

Installing the ASO-4100 Software Package . . . . . . . . . . . . . .3-3

DOS Installation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-3

Windows Installation . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-4

Configuring the Board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-5

Creating a Configuration File . . . . . . . . . . . . . . . . . . . . . . . . .3-6

Setting Jumpers on the Board . . . . . . . . . . . . . . . . . . . . . . . . .3-9

Setting the Base I/O Address . . . . . . . . . . . . . . . . . . . . . . .3-9

Setting the Memory Address . . . . . . . . . . . . . . . . . . . . . .3-10

Setting the Interrupt Level . . . . . . . . . . . . . . . . . . . . . . . .3-12

Setting the Input Impedance for Analog Input Channels.3-12

Trigger and Clock Input Termination . . . . . . . . . . . . . . . . . .3-16

Analog Trigger Input. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-19

Factory-Set Jumpers. . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-20

Memory Size . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-21

Adding a Ground Connection . . . . . . . . . . . . . . . . . . . . . . . .3-21

Installing the Board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-22

Attaching Applications. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-23

Scope and Test Program

4

Control Keys for D4100.EXE . . . . . . . . . . . . . . . . . . . . . . . . . . .4-1

Scope and Test Program Menus. . . . . . . . . . . . . . . . . . . . . . . . . .4-3

A/D Menu . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4-3

Display Menu . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4-6

Gates Menu . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4-8

Calibrating the DAS-4100 Series Board . . . . . . . . . . . . . . . . . . .4-9

Using Parameter Files . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4-10

iv

v

Troubleshooting

5

Identifying Symptoms and Possible Causes . . . . . . . . . . . . . . . .5-1

Testing Board and Host Computer. . . . . . . . . . . . . . . . . . . . . . . .5-3

Testing Accessory Slot and I/O Connections. . . . . . . . . . . . . . . .5-3

Technical Support. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-4

A

Specifications

B

Keithley Memory Manager

Installing and Setting Up the KMM. . . . . . . . . . . . . . . . . . . . . . B-2

Using KMMSETUP.EXE . . . . . . . . . . . . . . . . . . . . . . . . . . . B-2

Using a Text Editor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . B-3

Removing the KMM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . B-4

Bandwidth Charts for Input Voltage Ranges

C

Index

List of Figures

Figure 2-1. DAS-4100 Series Functional Block Diagram . . . .2-1

Figure 2-2. Ideal Transfer Function of a 3-Bit ADC . . . . . . . .2-4

Figure 2-3. Non-Ideal Transfer Function of a 3-Bit ADC . . . .2-5

Figure 2-4. Host Computer Memory Address Space . . . . . . .2-11

Figure 2-5. Analog Trigger Modes. . . . . . . . . . . . . . . . . . . . .2-17

Figure 2-6. Post-Trigger Acquisition . . . . . . . . . . . . . . . . . . .2-18

Figure 2-7. Memory Usage in Post-Trigger Acquisition . . . .2-19

Figure 2-8. About-Trigger Acquisition . . . . . . . . . . . . . . . . .2-21

Figure 2-9. Memory Usage in About-Trigger Acquisition. . .2-22

Figure 2-10. Possible Trigger Position. . . . . . . . . . . . . . . . . . .2-23

Figure 2-11. Trigger Jitter with Synchronized Divider . . . . . .2-23

Figure 2-12. Equivalent Time Sampling (ETS) . . . . . . . . . . . .2-24

Figure 2-13. ETS Delay . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-26

Figure 3-1. Jumper Locations. . . . . . . . . . . . . . . . . . . . . . . . . .3-9

Figure 3-2. Analog Input Circuitry. . . . . . . . . . . . . . . . . . . . .3-13

Figure 3-3. Clock I/O Connector Circuitry . . . . . . . . . . . . . .3-17

Figure 3-4. Trigger I/O Connector Circuitry . . . . . . . . . . . . .3-18

Figure 3-5. Analog Trigger In Connector Circuitry . . . . . . . .3-19

Figure C-1. ±0.5 V Input Range (Gain Code 0) . . . . . . . . . . . C-1

Figure C-2. ±2 V Input Range (Gain Code 1). . . . . . . . . . . . . C-2

Figure C-3. ±2.5 V Input Range (Gain Code 2) . . . . . . . . . . . C-2

Figure C-4. ±4 V Input Range (Gain Code 3). . . . . . . . . . . . . C-3

Figure C-5. ±0.25 V Input Range (Gain Code 4) . . . . . . . . . . C-3

Figure C-6. ±1 V Input Range (Gain Code 5). . . . . . . . . . . . . C-4

Figure C-7. ±1.25 V Input Range (Gain Code 6) . . . . . . . . . . C-4

Figure C-8. ±2 V Input Range (Gain Code 7). . . . . . . . . . . . . C-5

Figure C-9. ±0.125 V Input Range (Gain Code 8) . . . . . . . . . C-5

Figure C-10. ±0.5 V Input Range (Gain Code 9) . . . . . . . . . . . C-6

Figure C-11. ±0.625 V Input Range (Gain Code 10) . . . . . . . . C-6

Figure C-12. ±1 V Input Range (Gain Code 11). . . . . . . . . . . . C-7

Figure C-13. ±0.1 V Input Range (Gain Code 12) . . . . . . . . . . C-7

Figure C-14. ±0.4 V Input Range (Gain Code 13) . . . . . . . . . . C-8

Figure C-15. ±0.5 V Input Range (Gain Code 14) . . . . . . . . . . C-8

Figure C-16. ±0.8 V Input Range (Gain Code 15) . . . . . . . . . . C-9

List of Tables

Table 2-1. Analog Input Ranges . . . . . . . . . . . . . . . . . . . . . . .2-8

Table 2-2. Available Conversion Rates Using

Internal Clock . . . . . . . . . . . . . . . . . . . . . . . . . . .2-13

Table 3-1. Configuring DAS-4100 Series Boards . . . . . . . . .3-6

Table 3-2. Base I/O Address . . . . . . . . . . . . . . . . . . . . . . . . .3-10

Table 3-3. Memory Address . . . . . . . . . . . . . . . . . . . . . . . . .3-11

Table 3-4. Interrupt Level Selection . . . . . . . . . . . . . . . . . . .3-12

Table 3-5. Input Impedance for Analog Input Channels. . . .3-14

Table 3-6. Input Resistor Selection Chart. . . . . . . . . . . . . . .3-15

Table 3-7. TTL Clock In/Out Settings, J710. . . . . . . . . . . . .3-17

Table 3-8. TTL Trigger In/Out Settings, J711 . . . . . . . . . . .3-18

Table 3-9. Analog Trigger Input . . . . . . . . . . . . . . . . . . . . . .3-20

Table 3-10. Factory-Set Jumper Locations . . . . . . . . . . . . . . .3-20

Table 3-11. Factory-Set Memory Jumpers . . . . . . . . . . . . . . .3-21

Table 4-1. Control Keys . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4-2

Table 4-2. A/D Menu . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4-4

Table 4-3. Display Menu. . . . . . . . . . . . . . . . . . . . . . . . . . . . .4-7

Table 4-4. Gates Menu . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4-8

Table 5-1. Troubleshooting Information. . . . . . . . . . . . . . . . .5-1

Table A-1. DAS-4100 Series Specifications . . . . . . . . . . . . . A-1

vi

Table 2-1. Analog Input Ranges . . . . . . . . . . . . . . . . . . . . . . .2-8

Table 2-2. Available Conversion Rates Using

Internal Clock . . . . . . . . . . . . . . . . . . . . . . . . . . .2-13

Table 3-1. Configuring DAS-4100 Series Boards . . . . . . . . .3-6

Table 3-2. Base I/O Address . . . . . . . . . . . . . . . . . . . . . . . . .3-10

Table 3-3. Memory Address . . . . . . . . . . . . . . . . . . . . . . . . .3-11

Table 3-4. Interrupt Level Selection . . . . . . . . . . . . . . . . . . .3-12

Table 3-5. Input Resistor Selection Chart. . . . . . . . . . . . . . .3-14

Table 3-6. TTL Clock In/Out Settings, J710. . . . . . . . . . . . .3-16

Table 3-7. TTL Trigger In/Out Settings, J711 . . . . . . . . . . .3-17

Table 3-8. Analog Trigger Input . . . . . . . . . . . . . . . . . . . . . .3-17

Table 3-9. Factory-Set Jumper Locations . . . . . . . . . . . . . . .3-18

Table 3-10. Factory-Set Memory Jumpers . . . . . . . . . . . . . . .3-19

Table 4-1. Control Keys . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4-2

Table 4-2. A/D Menu . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4-4

Table 4-3. Display Menu. . . . . . . . . . . . . . . . . . . . . . . . . . . . .4-7

Table 4-4. Gates Menu . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4-8

Table 5-1. Troubleshooting Information. . . . . . . . . . . . . . . . .5-1

Table A-1. DAS-4100 Series Specifications . . . . . . . . . . . . . A-1

Figure 2-1. DAS-4100 Series Functional Block Diagram . . . .2-1

Figure 2-2. Ideal Transfer Function of a 3-Bit ADC . . . . . . . .2-4

Figure 2-3. Non-Ideal Transfer Function of a 3-Bit ADC . . . .2-5

Figure 2-4. Host Computer Memory Address Space . . . . . . .2-11

Figure 2-5. Analog Trigger Modes. . . . . . . . . . . . . . . . . . . . .2-17

Figure 2-6. Post-Trigger Acquisition . . . . . . . . . . . . . . . . . . .2-18

Figure 2-7. Memory Usage in Post-Trigger Acquisition . . . .2-19

Figure 2-8. About-Trigger Acquisition . . . . . . . . . . . . . . . . .2-21

Figure 2-9. Memory Usage in About-Trigger Acquisition. . .2-22

Figure 2-10. Possible Trigger Position. . . . . . . . . . . . . . . . . . .2-23

Figure 2-11. Trigger Jitter with Synchronized Divider . . . . . .2-23

Figure 2-12. Equivalent Time Sampling (ETS) . . . . . . . . . . . .2-24

Figure 2-13. ETS Delay . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-26

Figure 3-1. Jumper Locations. . . . . . . . . . . . . . . . . . . . . . . . . .3-9

1

Overview

Features

DAS-4100 Series boards are analog input boards for IBM
compatible computers. This chapter describes the features of the
DAS-4100 Series boards, the software that supports them, and available
accessories.

Note:

supported by all software packages. Refer to the documentation provided
with your software package to determine which features are supported.

The major features of DAS-4100 Series boards are as follows:

●

●

●

Not all features of DAS-4100 Series boards are currently

The boards support high-speed data acquisition on one or two analog
input channels; two-channel operation is simultaneous.

The analog-to-digital converter (ADC) can digitize an analog input
signal at a rate of 64 Msamples/second with a resolution of 8 bits.

Digitized data is stored in an onboard, high-speed memory buffer to
ensure continuous acquisition of data. The host computer can
download data for further processing, display, and storage.



PC AT



or

A wide variety of trigger options allows you to tailor operation of the

●

board to the specific requirements of your application.
The boards can support, as an option, Equivalent Time Sampling

●

(ETS) for repetitive waveforms; ETS provides conversion rates of up
to 2.048 Gsamples/second.

Features 1-1

The boards are suitable for the following applications:

●

– Digital oscilloscopes
– Spectrum analysis
– Automated Test Equipment (ATE)
– Capturing transient data
– Ultrasonic inspection systems
– Measuring acoustic emissions
– Nondestructive testing
– Mass spectrometry
– Radar systems
– Time-domain reflectometry
– Pattern recognition
– Video digitization
– Acquisition of optical and laser signals

Supporting Software

The following software is available for operating DAS-4100 Series
boards:

DAS-4100 Series standard software package - This package, which

●

comes with the board, is provided on 3.5-inch high-density disks. The
package includes utility programs that allow you to configure, test,
and calibrate DAS-4100 Series boards.

●

ASO-4100 software package - The optional Advanced Software

Option for DAS-4100 Series boards is provided on 3.5-inch
high-density disks. The package includes function libraries for
writing application programs using Microsoft C/C++, Borland
C/C++, or Microsoft Visual Basic™ for Windows. The package also
includes support files, utility programs, and language-specific
example programs. Refer to the DAS-4100 Series Function Call

Driver User’s Guide for more information.

®

1-2 Overview

)

DAS-4100 Series configuration utility - The configuration utility

●

(CFG4100.EXE), provided as part of both the DAS-4100 Series
standard software package and the ASO-4100 software package, runs
under DOS and allows you to create or modify a configuration file.
The configuration file provides information about the board; this
information is used by the DAS-4100 Series Function Call Dri ver and
other software packages to perform the board’s operations. Refer to
page 3-6 for more information.

●

DAS-4100 Series scope and test program - The scope and test

program (D4100.EXE), provided as part of both the DAS-4100 Series
standard software package and the ASO-4100 software package, runs
under DOS and allows you to test the hardware features of a
DAS-4100 Series board, calibrate the analog input circuitry of the
board, and perform basic oscilloscope functions on the board. Refer
to Chapter 4 for more information.

Accessories

●

Visual Test Extensions



(VTX



- These optional custom controls
for Visual Basic for W indo ws help you write application programs for
DAS-4100 Series boards. Refer to the V isual T est Extensions

User’s



Guide and the VTX online help for more information.

VisualSCOPE - This optional software package runs under Windows

●

and emulates a stand-alone oscilloscope on your host computer. Refer
to the VisualSCOPE documentation for more information.

The following accessories are av ailable for use with the DAS-4100 Series
boards:

●

SDC-5600 Digital Signal Processing board - Uses the optional DSP

port on the DAS-4100 Series board to transfer data for digital signal
processing; available from Sonix Inc., 8700 Morrissette Drive,
Springfield, VA 22152 (703-440-0222).

●

Memory expansion accessories - Provide up to 128M bytes of

additional buffer memory for storing data; refer to the Keithley
MetraByte catalog or contact your local sales office for information
on obtaining these accessories.

Accessories 1-3

2

Technical Reference

A functional block diagram of the DAS-4100 Series board is shown in
Figure 2-1.

Figure 2-1. DAS-4100 Series Functional Block Diagram

2-1

The analog signal is applied to one of the two input connectors (Channel
A or Channel B). You can use software-selectable AC or DC coupling,
and 50

Ω

or 1M

Ω

input impedances. The input signal is buf fered and then
fed into a programmable attenuator stage, followed by a programmable
gain stage, which drives the input of the analog-to-digital (A/D)
converter.

A programmable offset supplied by a digital-to-analog con verter (DAC1)
is added to the signal to shift it into the correct input voltage range of the
ADC. The overall gain and attenuation of the analog signal path are
programmable in coarse, discrete steps. To provide a final input
sensitivity programmable in very small increments, a second DAC
(DAC2) feeds a finely programmable voltage into the ADC as a reference
signal. The ADC compares the analog signal at its input to the applied
reference voltage and generates an 8-bit number proportional to the ratio
of these two voltages at the rate of the input clock.

The two DACs used together provide an accurate compensation for all
device tolerances in the analog input circuitry . The settings of these D A Cs
are stored as calibration data for various input voltage ranges in
nonvolatile memory.

The clock signal at the Clock I/O connector can be generated either
externally or internally. The internal clock signal is routed through a
programmable divider to the ADC and the counter logic.

The trigger signal at the Trigger I/O connector is an input signal when an
externally generated digital trigger signal is applied or an output signal
when a software or analog trigger event occurs.

An analog signal in the range of

16 to +16 V may be applied to the

−

Analog Trigger In connector. Operating under software control, the board
can be programmed to respond to either the rising or falling edge of the
trigger signal.

The remainder of this chapter describes the analog input features of
DAS-4100 Series boards in more detail.

2-2 Technical Reference

Analog-to-Digital Converter (ADC)

The ADC on DAS-4100 Series boards is a 64 Msamples/second, 8-bit
flash converter. This section describes the data format, reference voltage
range and vernier gain, static conversion errors, noise gain, and dynamic
conversion errors of the ADC.

Data Format

The ADC outputs data in a twos complement data format (
where
positive full scale.

128 corresponds to negative full scale and +127 corresponds to

−

Reference Voltage Range and Vernier Gain

The reference voltage range of the ADC is typically
nominal value of
input voltage range of the ADC. You specify a reference v oltage from 0 V
to

2.1 V by programming the gain DAC (DAC2). Decreasing the

−

magnitude of the reference voltage increases the overall gain, since the
full-scale input voltage range of the ADC becomes smaller. This allows
you to moderately increase the overall gain without any degradation in
input bandwidth; however, note that the existing nonlinearities of the
ADC have more impact on the accuracy of the digitized waveform.

−

2.0 V. The reference voltage determines the full-scale

Static Conversion Errors

The ADC produces one of 256 discrete output codes for an analog input
voltage, resulting in a stair-step shaped transfer function. Ideally, all steps
of this transfer function have the same width (the full-scale input voltage
V

divided by the number of steps 2

fs

ADC in bits). For DAS-4100 Series boards, the resolution is eight bits
and the ADC full-scale input voltage range is ±4 V; therefore, the
resulting step width is 31.25 mV. Figure 2-2 illustrates a 3-bit ADC
example.

N

1, where N is the resolution of the

−

−

128 to +127)

−

2.0 V to 0 V with a

Analog-to-Digital Converter (ADC) 2-3

Output
codes,
binary

Input voltage

Figure 2-2. Ideal Transfer Function of a 3-Bit ADC

Full scale

The transfer curve of a device with no conversion error at all would be a
straight line. Since the ADC transforms a continuous input voltage into
discrete codes, as expressed by the stair-step function, it has an inherent
conversion error. The magnitude of this error depends on the size of the
steps and on the number of bits of the ADC. The theoretical
signal-to-noise ratio (SNR) in dB of an ideal ADC with a full-scale input
signal is equal to (6.02 * N + 1.76) dB, where N is the resolution of the
ADC in bits. For DAS-4100 Series boards (8-bit ADC), the SNR is

49.92 dB. If a smaller input signal V
theoretical SNR is decreased by 20 * log(V

is applied to the ADC, the

in

/V

) dB.

fs

in

The transfer function of a real ADC deviates somewhat from the ideal
curve in Figure 2-2. The deviation of a transfer function from the ideal
curve is specified by integral nonlinearity and differential nonlinearity, as
shown in Figure 2-3.

2-4 Technical Reference

Output
codes,
binary

Input voltage

Figure 2-3. Non-Ideal Transfer Function of a 3-Bit ADC

Full scale

The width of the two steps producing output codes 2 and 3 is one-half the
ideal value, and the width of the next two steps is 1.5 times the ideal
width. In this case, the differential nonlinearity is ±0.5 LSB and the
maximum deviation from the ideal straight line (integral nonlinearity) is
±1.5 LSB. By shifting the straight reference line (adjusting the input
offset), the "best fit" integral nonlinearity would be ±0.75 LSB.

The ADC of DAS-4100 Series boards is specified with an integral and
differential nonlinearity of ±0.6 LSB (no missing codes). This is a
guaranteed worst-case value; the actual nonlinearity is lower. Assuming
the worst distribution of step widths still satisfying the guaranteed
nonlinearity (all even steps 0.4 LSBs wide and all odd steps 1.6 LSBs
wide), the SNR is reduced to approximately 46.3 dB. The actual value is
closer to the theoretical 49.9 dB, typically 48 dB. This value is relative to
a full-scale input signal. The noise voltage due to the conversion into
discrete amplitude values has a constant rms amplitude of 0.29 LSB.

Analog-to-Digital Converter (ADC) 2-5

Noise Gain

The small-signal gain of the ADC can be directly deri v ed from its transfer
curve: the steeper the slope, the higher the gain. Since the transfer
function is a stair-step function, most of the input voltage range has a
small-signal gain of zero (horizontal section of the curve) interspersed
with small parts of very high small-signal gain at the transition between
two output codes. This leads to an offset-dependent amplification or
attenuation of very small input signals like noise.

The offset voltage at the ADC input can be programmed in very fine
steps; in most ranges, each step can be less than one LSB. The input noise
is less than one LSB in the less sensitive input voltage ranges, but can be
made to appear with a full one LSB amplitude or to completely disappear
by finely shifting the offset voltage. This phenomenon directly results
from the noise voltage, which in this case is comparable to the actual
input noise voltage.

Dynamic Conversion Errors

The ADC samples the analog input v oltage at regular interv als, con verting
the time-continuous input signal into a time-discrete output signal. This
introduces errors in the conversion process if the input signal varies over
time. The pacer clock causes the ADC to sample its input signal at regular
intervals; however, small deviations from this regular schedule introduce
an amplitude error if the input signal changes between the correct time
and the actual time the sample is taken. This timing uncertainty is called
aperture jitter.

Other sources of dynamic distortion are unequal frequency responses and
delay times of the individual comparators inside the flash con verter . Noise
on the clock lines also contributes to the dynamic errors.

The error introduced by these types of distortion depends on the slew rate
of the input signal at the ADC input. The effective number of bits of
resolution (ENOB) specifies the resolution of an ideal converter
producing the observed output signal with the same input signal. With a
full-scale input signal of 1.23 MHz, DAS-4100 Series boards have an
ENOB of 7.5 bits.

2-6 Technical Reference

Channels

The slew rate dependency of the sampling accuracy has the effect that the
peak of a high-frequency input signal is sampled much more accurately
than the regions with the largest slew rates. This makes over-sampling
with very high effective sampling rates a useful tool for accurate peak
amplitude measurement. For these types of applications, the specification
of dynamic performance in ENOBs is not applicable.

DAS-4101 Series boards have a single analog input. DAS-4102 Series
boards can acquire data from either analog input (Channel A or B), or
from both channels simultaneously. The software is used to specify the
channel(s).

The analog input channels are terminated with a 50

Ω

socketed resistor.
You can use the configuration file to disconnect this resistor by operating
a relay; in this case, the input resistance is 1M
resistor to select any input impedance between 50

. You can also replace the

Ω

and 1 M

Ω

. Refer to

Ω

page 3-12 for more information.

Note:

To use a 10:1 oscilloscope probe, you must select the 1 M

Ω

input

resistance under software control.

Exceeding the maximum input voltage causes distortion of the sampled
waveform. If you select an input impedance of 50

Ω

, the input voltage

should not exceed 11.3 V peak-to-peak.

Channels 2-7

Input Ranges

DAS-4100 Series boards currently support 16 bipolar factory-calibrated
analog input ranges. Through software, you specify the analog input
range and the gain of the analog input channel.

Table 2-1 lists the analog input ranges supported by DAS-4100 Series
boards and their corresponding gain codes. The gain code is used in
software to determine the range. The choice of gain code affects the
bandwidth; refer to Appendix C for more information.

Table 2-1. Analog Input Ranges

Input Range Gain Code Bandwidth ( − 3dB) DC to:

±100 mV 12 100 MHz
±125 mV 8 110 MHz
±250 mV 4 100 MHz
±400 mV 13 140 MHz
±0.5 V 0 100 MHz
±0.5 V 9 160 MHz
±0.5 V 14 150 MHz
±0.625 V 10 160 MHz
±0.8 V 15 160 MHz
±1 V 5 210 MHz
±1 V 11 170 MHz
±1.25 V 6 220 MHz
±2 V 1 250 MHz
±2 V 7 230 MHz
±2.5 V 2 250 MHz
±4 V 3 280 MHz

2-8 Technical Reference

Memory

This section describes memory on the DAS-4100 Series board and
memory on the host computer.

Onboard Memory

DAS-4100 Series boards contain buffer memory for storing data and
nonvolatile memory for storing calibration values.

Buffer Memory

Since the conversion rate of DAS-4100 Series boards is too high to be
directly processed by the host computer, the digitized data is stored in an
onboard memory buffer. Groups of two samples from the ADC are
packed together and written to the memory buffer as one block.

The DAS-4101 contains 64K, 256K, 1M, or 2Mbytes of onboard
memory; the DAS-4102 contains 64K, 256K, or 1Mbytes. If you require
larger memory sizes, you can use up to eight memory expansion
accessories with up to 16M bytes of memory each to provide a maximum
of 128M bytes of memory. Since only one expansion accessory can be
active at any given time, the maximum length of a single data acquisition
is 16,777,216 samples. Intervention by the host computer is necessary to
switch between expansion accessories. You must specify that you are
using a memory expansion accessory by setting a jumper on the board;
jumper information is supplied with the memory expansion accessory.

Whenever a DAS-4100 Series board is idle, the host computer can access
the buffer memory. The computer reads the data to download it into its
own main memory and process it. For diagnostic purposes, the host
computer can also write to the buffer memory; this allows testing of the
hardware and easier debugging of application algorithms.

Memory 2-9

Nonvolatile Memory (EEPROM)

DAS-4100 Series boards contains 128 16-bit registers of Electrically
Erasable and Programmable Read-Only Memory (EEPROM). Unlike the
onboard buffer memory, the EEPROM does not lose its contents when
power to the board is removed. Most of the EEPROM holds calibration
settings for the four DACs used for fine control of analog offset and gain.

The EEPROM also holds a linearization table for the ETS delay, a copy of
the board's serial number, a CRC check code, and some housekeeping
information.

Host Computer Memory

DAS-4100 Series boards require part of both the host computer I/O
address space and the host computer memory address space.

I/O Address Space

DAS-4100 Series boards require sixteen bytes in the I/O address space of
the host computer.

You select the base address for the I/O address space by setting jumpers
on the board; refer to page 3-9 for information.

Memory Address Space

The memory address space of the host computer is used for reading the
acquired data from the DAS-4100 Series onboard buffer memory or
expansion accessory memory and for loading the counters. The host
computer accesses the onboard memory using the decoding logic on the
DAS-4100; onboard buf fer memory is mapped to the host computer upper
memory. The host computer accesses the memory of an expansion
accessory using the bus interface of the memory expansion accessory;
refer to the documentation provided with the expansion accessory for
more information.

Figure 2-4 illustrates the memory address space of a host computer.

2-10 Technical Reference

Figure 2-4. Host Computer Memory Address Space

The host computer reads from or writes to the onboard memory by using
banks of 16K bytes. The 16K byte area acts as a window through which
part of the memory on the DAS-4100 Series board is accessed. One of
these banks at a time is selected to appear in this window.

You select the base address for the memory address space by setting
jumpers on the board; refer to page 3-11 for information.

Memory 2-11

Bus Interface

The bus interface allows the host computer to initialize all onboard
parameters, read from and write to onboard memory, set the counters,
trigger the board, and obtain status information.

The bus interface uses two distinct address spaces of the host computer: a
16 byte segment in the I/O address space for control information and a
16K byte segment in the memory address space for data exchange. Refer
to page 2-10 for more information.

An interrupt can be generated to signal the host computer at the end of a
data acquisition or peak detection. You select the interrupt lev el by setting
jumpers on the board. Refer to page 3-12 for more information.

Counters

During power-up and whenever the RESET button is pressed, the host
computer activates its RESET signal, and the internal logic of the board is
forced into a known, inactive state. Since the settings of the DACs are
unknown, all reference voltages in the analog input circuitry are held at a
value close to 0 V. The first write to the board in the I/O address space
releases these voltages to their normal levels.

DAS-4100 Series boards use the following counters:

●

Start counter - Determines the location in buffer memory where the

currently sampled data is stored; it is preset by the host computer with
the starting address of the next data acquisition.

●

Length counter - Determines the total number of samples acquired.

When the length counter counts down to zero, the data acquisition
ends.

●

Post-trigger counter - Determines the number of samples to delay

the start of a data acquisition after a valid trigger has been accepted.
The post-trigger delay is programmable from 0 to 16,777,216
samples in 2-byte increments.

2-12 Technical Reference

The host computer loads the counters before the start of a data acquisition
operation or the start of the peak detector.

Pacer Clocks

Through software, you select either an internal or an external pacer clock
to determine when each A/D conversion is initiated.

Internal Pacer Clock

The internal pacer clock is the onboard 64 MHz crystal oscillator. The
clock signal is fed through a driver to the Clock I/O connector.

You can divide the frequency of the internal pacer clock by 1, 2, 4, 8, 16,
32, 64, or 128, as shown in Table 2-2.

Table 2-2. Available Conversion Rates Using Internal Clock

Sample

Divider Conversion Rate

256 64.0 Msamples/second 15.625 ns
512 32.0 Msamples/second 31.25 ns
1,024 16.0 Msamples/second 62.5 ns
2,048 8.0 Msamples/second 125 ns
4,096 4.0 Msamples/second 250 ns
8,192 2.0 Msamples/second 500 ns
16,384 1.0 Msamples/second 1000 ns
32,768 0.5 Msamples/second 2000 ns

Period

Pacer Clocks 2-13

You can also use the Clock I/O connector as an output. When used as an
output, the Clock I/O connector can provide a TTL-level output signal
(0 to 5 V) of the undi vided clock frequenc y to a doubly terminated (25
load.

External Pacer Clock

An external pacer clock is an externally generated clock signal of any
frequency up to 64 MHz applied to the Clock I/O connector. When you
start an analog input operation, the board is armed. At the ne xt rising edge
(and at every subsequent rising edge of the external pacer clock), a
conversion is initiated.

Note:

T o a v oid reflections on the connecting cable, you can terminate the
Clock I/O connector input by inserting a jumper into jumper block J700;
refer to page 3-16 for information.

Ω

)

Triggers

A trigger is an event that determines when a DAS-4100 Series board can
respond to either an internal or an external pacer clock. Depending on the
type of acquisition and setup parameters, the trigger event can occur
before, during, or after the actual sampling of data. The trigger signal can
originate from a variety of sources.

This section describes trigger sources, types of trigger acquisition, and
trigger synchronization on DAS-4100 Series boards.

Trigger Sources

DAS-4100 Series boards support software triggers, analog triggers, and
digital triggers. These trigger sources are described in the following
sections.

2-14 Technical Reference

Software T rigger

Analog T rigger

A software trigger event occurs when a particular instruction is executed
by the host computer.

When you use a software trigger, the Trigger I/O connector acts as an
output. When the trigger event occurs, either a rising or a falling edge is
output on the Trigger I/O connector. The edge polarity depends on the
internal pacer clock and can be used to start an external process, such as
pulsing an ultrasonic transducer. At the end of the data acquisition, the
signal on the Trigger I/O connector returns to its inactive state.

An analog trigger (or threshold trigger) event occurs when one of the
following conditions is met by an analog input signal:

●

The analog input signal changes from a voltage that is less than the
trigger level (threshold) to a voltage that is greater than the trigger
level (positive-edge trigger).

●

The analog input signal changes from a voltage that is greater than
the trigger level (threshold) to a voltage that is less than the trigger
level (negative-edge trigger).

●

The analog input signal is already above the trigger level at the time
the board becomes ready to accept a trigger (positive-level trigger).

The analog input signal is already below the trigger level at the time

●

the board becomes ready to accept a trigger (negative-level trigger).

DAS-4100 Series boards can be triggered by the analog input signal on
Channel A, on Channel B (DAS-4102 Series boards), or by a signal
applied to the Analog Trigger Input. To trigger on Channel A (or B), you
can use software to program the threshold in 256 steps covering the
software-selected input range. To trigger using the Analog Trigger Input,
you can program the threshold in 256 steps from

16 to +15.875 V.

−

When you use an analog trigger, the Trigger I/O connector acts as an
output. When the trigger event occurs, either a rising or a falling edge is
output on the Trigger I/O connector. A rising edge signal is output if the
trigger polarity is positive; a falling edge signal is output if the trigger
polarity is negative. At the end of the data acquisition, the signal on the
Trigger I/O connector returns to its inactive state.

Triggers 2-15

Figure 2-5 illustrates the analog trigger conditions. Note that level
triggers and edge triggers have identical results if the analog input signal
does not exceed the threshold in the specified direction at the time the
board is set up.

Digital T rigger

A digital trigger event occurs when an externally generated digital signal
of programmable polarity (positive edge or negative edge) is detected as
an input on the Trigger I/O connector.

Trigger Acquisition

Depending on your application, you can sample data before and/or after a
trigger event occurs. If you want to collect data after a specific trigger
event, use post-trigger acquisition. If you want to collect data before a
specific trigger event or before and after a specific trigger event, use
about-trigger acquisition.

Post-Trigger Acquisition

Use post-trigger acquisition to store data samples after a trigger event
occurs. You can also use a programmable post-trigger delay to shift the
sampling out in time a specified interval after the trigger event occurs.

You initialize the board by setting all control bits and counter values, and
then you arm the board. In the armed state, most of the internal logic
enters a low-power idle mode while waiting for a trigger e v ent to occur. A
trigger event starts the post-trigger counter, which is loaded with the
length of the delay from the trigger event to the beginning of the sampling
interval.

After the post-trigger counter reaches its programmed count, both start
and length counters are released. The start counter determines the address
of the first sample written into the buffer memory; the length counter
determines the number of samples to be acquired. The data acquisition
ceases when the length counter arrives at its programmed count.

2-16 Technical Reference

Input signal

Trigger time

Pacer interval

Trigger I/O output

Threshold

Analog trigger, positive edge or level

Input signal

Trigger time

Pacer interval

Trigger I/O output

Input signal

Trigger time

Pacer interval

Trigger I/O output

Threshold

Analog trigger, negative level

Threshold

Analog trigger, negative edge

Figure 2-5. Analog Trigger Modes

Triggers 2-17

Figure 2-6 illustrates post-trigger acquisition.

Input signal

Pacer interval

Trigger time

Post-trigger counter

Length counter

Figure 2-6. Post-Trigger Acquisition

Figure 2-7 illustrates the effect of the start and length counter values on
the onboard buffer memory.

2-18 Technical Reference

Figure 2-7. Memory Usage in Post-Trigger Acquisition

The counters are programmable in increments of two samples. The start
counter is loaded with the true start address in memory (the two least
significant bits are internally set to zero); the length counter is loaded with
the number of samples to be acquired divided by two. Loading the
post-trigger counter is always the last step of the setup, since this
immediately arms the board, preparing it to accept a trigger.

If the start counter is not reloaded between subsequent post-trigger data
acquisitions, consecutive memory areas are used. Tw o more samples than
programmed in the length counter are actually written to memory. At the
end of the acquisition, the start counter points to the memory location
containing these two extra samples. If the start counter is not reloaded, the
next acquisition overwrites these samples with the first two new samples.

Triggers 2-19

About-Trigger Acquisition

Use about-trigger acquisition to store data samples before a trigger event
occurs or before and after a trigger event occurs.

You initialize the board by setting all control bits and counter values, and
then you arm the board. After arming, the board starts to acquire data
immediately. The start counter determines the address of the first sample
written into the buffer memory and the minimum number of samples that
must be collected before a trigger can be accepted. (In about-trigger
acquisition, the start counter is normally loaded with the last address of
the buffer memory minus the minimum number of pre-trigger samples.)

The start counter counts up during the entire acquisition. When the start
counter reaches its maximum value, it wraps around to zero, continuing to
fill the entire buffer memory with data. If no trigger event occurs, the
entire buffer memory is filled repeatedly.

After the start counter wraps around to zero for the first time, a trigger can
be accepted. If the trigger event occurs during the time between arming
the board and the first start counter wrap to zero, it is ignored. This
ensures that a minimum amount of data is acquired before the trigger
event occurs.

When a trigger event occurs and is accepted, the current content of the
start counter is saved and the length counter starts counting. The length
counter determines the number of samples to be acquired. The acquisition
again ends when the length count is reached.

Figure 2-8 illustrates an about-trigger acquisition.

2-20 Technical Reference

Input signal

Pacer interval

Trigger time

Length counter

Start counter wrap

Minimum

pre-trigger data

Figure 2-8. About-Trigger Acquisition

The counters are programmable in increments of two samples. The start
counter is loaded with the last address in memory minus the minimum
number of pre-trigger samples; the length counter is loaded with the
number of samples to be acquired divided by two. The post-trigger
counter is loaded last; although the value written is ignored, the
post-trigger counter must be loaded to arm the board.

You can use the memory address saved at trigger time to determine the
correlation between memory address and sample time with respect to the
trigger.

Figure 2-9 illustrates the effect of start and length counter values on the
onboard buffer memory.

Triggers 2-21

Figure 2-9. Memory Usage in About-Trigger Acquisition

An about-trigger acquisition may use the entire buffer memory. In

Note:

contrast, during a post-trigger data acquisition, only the samples that are
actually used are written into buffer memory, leaving all other areas of the
buffer memory unaffected.

The term pre-trigger acquisition is often used for an about-trigger
acquisition when only the pre-trigger samples are significant. The
DAS-4100 Series Function Call Driver differentiates between pre-trigger
acquisition (where the number of post-trigger samples is zero) and
about-trigger acquisition (where you specify the number of post-trigger
samples); refer to the DAS-4100 Series Function Call Driver User’s

Guide for information. The DAS-4100 scope and test program uses the

term pre-trigger mode for both pre-trigger acquisition and about-trigger
acquisition.

2-22 Technical Reference

Trigger Synchronization

At the start of a data acquisition, the DAS-4100 Series board receives a
trigger signal, which is synchronized to the pacer clock and then used by
the control logic. Since the trigger occurs asynchronously with respect to
the pacer clock, there is an uncertainty of one pacer clock period in
measuring the trigger position. Figure 2-10 illustrates this uncertainty.

Pacer clock

Trigger

Synchronized trigger

Figure 2-10. Possible Trigger Position

The clock divider of the D AS-4100 Series board uses the undi vided clock
to synchronize the trigger signal in post-trigger data acquisitions. Then,
the board starts dividing the clock down. This results in a trigger
uncertainty (trigger jitter) of one period of the undivided clock (15.6 ns
with the 64 MHz clock) rather than one period of the divided clock. If a
clock divide factor of 1 (clock rate of 64 MHz) is selected, both methods
yield identical results. Figure 2-11 illustrates this trigger jitter.

Pacer clock

Trigger

Synchronized trigger

Figure 2-11. Trigger Jitter with Synchronized Divider

Triggers 2-23

The trigger synchronization function also operates with an external pacer
clock.

Equivalent Time Sampling (ETS) Option

If an analog input signal is repetitive, you can sample the signal several
times with the pacer clock shifted relative to the input signal by a fraction
of the sample period. This method is called equivalent time sampling
(ETS) and allows you to achieve an effective conversion rate higher than
64 Msamples/second.

With N acquisitions and a pacer clock shifted by the fraction of the
sample period 1/(N * f
conversion rate is N * f
ETS factor is 256, corresponding to an effective conversion rate of

16.4 Gsamples/second; however, jitter of the internal pacer clock and
logic delays limit the useful range of ETS factors to an upper limit of 32
(2.05 Gsamples/second). Figure 2-12 illustrates an ETS factor of two.

) between the acquisitions, the effective

clock

. N is called the ETS factor. The maximum

clock

Input signal

Pacer clock

acquisition 1

Pacer clock

acquisition 2

Figure 2-12. Equivalent Time Sampling (ETS)

2-24 Technical Reference

The individual samples are stored in adjacent sections of the buffer
memory. To reconstruct the correct sequence of samples, the host
computer interleaves the data of the individual waveforms.

To control the fine timing shift of either the trigger signal or the
resynchronized pacer clock, the trigger control section uses a
programmable high-resolution delay, the ETS delay.

The process generating the input signal is started by a software trigger
generated by the data acquisition board. Note that when using ETS, the
DAS-4100 Series board waits for a software trigger only; analog triggers
and digital triggers cannot be used.

When the trigger event occurs, an internal trigger signal is generated
synchronously to the internal pacer clock. This synchronous trigger signal
is then delayed in the ETS delay by a programmable fraction of the pacer
clock and output on the Trigger I/O connector. This starts the process
generating the input signal.

As shown in Figure 2-13, the delayed start of the input signal causes the
DAS-4100 Series board to sample the signal at dif ferent points in the tw o
acquisitions described previously. During acquisition 1 with a larger ETS
delay shift, the pacer clock occurs earlier with respect to the input signal;
therefore, the data from this acquisition is sorted into the even-numbered
samples of the combined data set: 0, 2, 4, and so on. The data from
acquisition 2 is sorted into the odd-numbered samples: 1, 3, 5, and so on.

Equivalent Time Sampling (ETS) Option 2-25

Software trigger

Synchronized trigger

Pacer clock

ETS delay 1

Trigger I/O output 1

Input signal 1

ETS delay 2

Trigger I/O output 2

Input signal 2

Figure 2-13. ETS Delay

2-26 Technical Reference

Peak Detector Option

DAS-4100 Series boards can be equipped with an optional hardware peak
detector to speed up applications, such as ultrasonic signal processing,
that make extensiv e use of peak information from the sampled wa v eform.
The peak detector operates at a speed of 96 Msamples/second and reads
the data from memory using the start counter for address generation.

Peak Detector Option 2-27

3

Setup and I

This chapter contains the information you need to install and use your
DAS-4100 Series board.

Unpacking the Board

Caution:

damage certain electrical components on any circuit board. It is
recommended that you use wrist strap grounds when handling a board. If
wrist strap grounds are not available, make sure that you discharge static
electricity from yourself by touching a grounded conductor such as your
computer chassis (your computer must be turned OFF). Whenever you
handle a board, hold it by the edges and avoid touching any board
components.

A discharge of static electricity from your hands can seriously

nstallation

To prevent any damage to your DAS-4100 Series board, perform the
following steps when unpacking the board:

1. Remove the wrapped DAS-4100 Series board from its outer shipping

carton.

2. Carefully remove the board from its antistatic wrapping material.

(You may wish to store the wrapping material for future use.)

Note:

foam pad until you are ready to install the board in the computer.

Unpacking the Board 3-1

Do not remove the pink foam pad. Leav e the board on the pink

3. Inspect the board for signs of damage. If any damage is apparent,

arrange to return the board to the factory; refer to page 5-4 for more
information.

4. Check the remaining contents of your package against the packing

list to ensure that your order is complete. Report any missing items
immediately.

5. Once you have determined that the board is acceptable, install the

software and configure the board. Refer to the following sections for
information.

Installing the Software

This section describes how to install the DAS-4100 Series standard
software package and how to install the ASO-4100 software package
from both DOS and W indo ws. To install other software packages, refer to
the documentation supplied with the software package.

Installing the DAS-4100 Series Standard Software Package

To install the DAS-4100 Series standard software package, perform the
following steps:

1. Make a backup copy of the supplied disks. Use the copies as your

working disks and store the originals as backup disks.

2. Insert disk #1 into the disk drive.

3. Assuming that you are using disk drive A, enter the following at the

DOS prompt:

A:install

The installation program prompts you for your installation
preferences, including the drive and directory you want to copy the
software to. It also prompts you to insert additional disks, as
necessary.

4. Continue to insert disks and respond to prompts, as appropriate.

When the installation program prompts you for a drive designation,
enter a designation of your choosing or accept the default drive C.

3-2 Setup and Installation

When the installation program prompts you for a directory name,
enter a name of your choosing or accept the default name.

The installation program creates a directory on the specified drive and
copies all files, expanding any compressed files.

5. When the installation program notifies you that the installation is

complete, review the following files:
– FILES.TXT lists and describes all the files copied to the hard disk

by the installation program.

– README.TXT contains information that was not available when

this manual was printed.

Installing the ASO-4100 Software Package

DOS Installation

The ASO-4100 software package contains software for both the DOS and
Windows environments. This section describes how to install both the
DOS version and the Windows version of the ASO-4100 software
package.

To install the DOS version of the ASO-4100 software package, perform
the following steps:

1. Make a backup copy of the supplied disks. Use the copies as your

working disks and store the originals as backup disks.

2. Insert disk #1 into the disk drive.

3. Assuming that you are using disk drive A, enter the following at the

DOS prompt:

A:install

The installation program prompts you for your installation
preferences, including the drive and directory you want to copy the
software to. It also prompts you to insert additional disks, as
necessary.

4. Continue to insert disks and respond to prompts, as appropriate.

When the installation program prompts you for a drive designation,
enter a designation of your choosing or accept the default drive C.

Installing the Software 3-3

When the installation program prompts you for a directory name,
enter a name of your choosing or accept the default name.

The installation program creates a directory on the specified drive and
copies all files, expanding any compressed files.

5. When the installation program notifies you that the installation is

complete, review the following files:
– FILES.TXT lists and describes all the files copied to the hard disk

– README.TXT contains information that was not available when

Windows Installation

by the installation program.

this manual was printed.

To install the Windows version of the ASO-4100 software package,
perform the following steps:

1. Make a backup copy of the ASO-Windows disk. Use the copies as

your working disks and store the originals as backup disks.

2. Insert the ASO-Windows disk into the disk drive.

3. Start Windo ws.

4. From the Program Manager menu, choose File and then choose Run.

5. Assuming that you are using disk drive A, type the following at the

command line in the Run dialog box, and then select OK:

A:SETUP

The installation program prompts you for your installation
preferences, including the drive and directory you want to copy the
software to. It also prompts you to insert additional disks, as
necessary.

6. Continue to insert disks and respond to prompts, as appropriate.

When the installation program prompts you for a drive designation,
enter a designation of your choosing or accept the default drive C.
When the installation program prompts you for a directory name,
enter a name of your choosing or accept the default name.

The installation program creates a directory on the specified drive and
copies all files, expanding any compressed files.

3-4 Setup and Installation

The installation program also creates a DAS-4100 family group; this
group includes example Windows programs and help files.

7. When the installation program notifies you that the installation is

complete, review the following files:
– FILES.TXT lists and describes all the files copied to the hard disk

by the installation program.

– README.TXT contains information that was not available when

this manual was printed.

Configuring the Board

You configure the following items for DAS-4100 Series boards by setting
jumpers on the board and/or by specifying the configuration in a
configuration file:

●

Base I/O address

●

Memory address

●

Memory x 2 option (for DAS-4101/2M)
Interrupt level

●

DC/AC coupling

●

●

Zero wait state

●

Input impedance for analog input channels
Input impedance for Clock I/O connector

●

Input impedance for Trigger I/O connector

●

●

Input impedance for Analog Trigger In connector
Ground connection

●

Table 3-1 lists the items that are configurable for DAS-4100 Series
boards, the available options, the default settings in the configuration file,
and the default jumper setting.

Configuring the Board 3-5

Table 3-1. Configuring DAS-4100 Series Boards

Attribute Options

Where Option
is Set

Default in
Configuration
File

Default on
BoardFile Board

Base I/O address
Memory address
Interrupt level

1

&H200 to &H3F0

1

A 0000 to D C000

1

2, 5, 7, 10, 11, 12, 15

DC/AC coupling DC, AC
Zero wait state

2

Enabled, Disabled

Input impedance 50 Ω to 1 M Ω
Ground

connection

Notes

1

The setting in the configuration file must match the settings of the jumpers on the board.

2

The default setting is appropriate for most computers. If you are using an older computer, you may

None,
Case-to-analog

✔
✔
✔
✔
✔
✔

✔
✔
✔

&H250 &H250
C C000 C C000
7 7
DC Not applicable
Enabled Not applicable
50 Ω

✔

Not applicable None

49.9 Ω

want to try changing the setting.

Refer to page 3-9 for information on setting the jumpers. Refer to the next
section for information on creating a configuration file.

Creating a Configuration File

A configuration file is required by the DAS-4100 Series Function Call
Driver and other software packages to perform DAS-4100 Series board
operations. A def ault configuration file called DAS4100.CFG is provided
in both the DAS-4100 Series standard software package and the
AS0-4100 software package. The factory-default settings in
DAS4100.CFG are shown in Table 3-1.

If the default settings in the configuration file are appropriate for your
application, refer to the following section to ensure that the jumper
settings on the board match the settings in the configuration file.

3-6 Setup and Installation

If the default settings are not appropriate for your application, you must
create a new configuration file or modify an existing configuration file to
specify the correct configuration options. The CFG4100.EXE
configuration utility, shipped with both the DAS-4100 Series standard
software package and the ASO-4100 software package, is provided for
this purpose.

T o create a ne w configuration file or modify an existing configuration file,
perform the following steps:

1. Invoke the configuration utility from DOS or Windows, as follows:

– If you are running under DOS , from the directory containing the

CFG4100.EXE configuration utility, enter the following at the
DOS prompt:

CFG4100 filename

where filename is the name of the configuration file you wish to
create or modify.

– If you are running under Windows , choose Run from the Program

Manager File menu, enter the following in the box, and select
OK:

CFG4100 filename

where filename is the name of the configuration file you wish to
create or modify.

Make sure that you enter the correct path to CFG4100.EXE, or
use the Browse button to find this file.

If the utility finds a configuration file named filename , it displays the
opening menu screen with filename shown; this file contains the
configuration options found in filename . If the utility does not find a
configuration file named filename , it displays the opening menu
screen with filename shown; this file contains the default
configuration options. If you do not enter a file name, the utility
displays the opening menu screen of the default configuration file
DAS4100.CFG.

Configuring the Board 3-7

Note:

The example programs, provided with the ASO-4100 software
package, use the default configuration file DAS4100.CFG. If you
intend to use the example programs, make sure that DAS4100.CFG
exists and that the settings in DAS4100.CFG match the jumper
settings of your board.

2. On the opening menu screen, enter the number of DAS-4100 Series
boards you plan to configure (1 or 2).

The utility displays the configuration options for the first board
(board 0). The number of the board is shown in the upper-left corner
of the top menu box.

3. To modify any of the configuration options, use the arrow keys to
highlight the option you want to change, press Enter to display a list
of available settings, use the arrow keys to highlight the appropriate
setting, and press Enter . These instructions are summarized in the
Commands/Status box at the bottom of the screen.

When the configuration options for this board are correct, press N to
display the configuration options for the next board.

Note:

If you modify the port (base I/O) address or the memory
address, you can press S to display the corresponding jumper settings.
Information on setting these jumpers is also provided in the following
section.

4. After you modify the appropriate configuration options for all boards,
press Esc . The utility asks if you want to save the new settings to the
specified configuration file.

5. Press Y to save the new settings and exit. Press N to exit without
saving the new settings.

When you finish creating or modifying the configuration file, refer to the
following section to ensure that the jumper settings on the board match
the settings in the configuration file.

3-8 Setup and Installation

Setting Jumpers on the Board

The locations of the jumpers required for configuring DAS-4100 Series
boards are shown in Figure 3-1.

Figure 3-1. Jumper Locations

Setting the Base I/O Address

DAS-4100 Series boards require sixteen bytes in the I/O address space of
the host computer. DAS-4100 Series boards are shipped with a base I/O
address of 250h. If your application requires a different setting, use the
I/O address jumper block (J600) to set the base I/O address. Table 3-2
lists the settings of J600 for base I/O addresses in the range of 200h to
2F0h. Note that OUT indicates that a jumper is not inserted in the
specified jumper position and IN indicates that a jumper is inserted in the
specified jumper position.

Configuring the Board 3-9

Table 3-2. Base I/O Address

IO Map J600-1 J600-2 J600-3 J600-4 J600-5 J600-6

1 200-20F OUT IN IN IN IN IN
2 210-21F OUT IN IN IN IN OUT
3 220-22F OUT IN IN IN OUT OUT
4 230-23F OUT IN IN IN OUT OUT
5 240-24F OUT IN IN OUT IN IN
6

7 260-26F OUT IN IN OUT OUT IN
8 270-27F OUT IN IN OUT OUT OUT
9 280-28F OUT IN OUT IN IN IN
10 290-29F OUT IN OUT IN IN OUT
11 2AO-2AF OUT IN OUT IN OUT IN
12 2BO-2BF OUT IN OUT IN OUT OUT
13 2CO-2CF OUT IN OUT OUT IN IN
14 2DO-2DF OUT IN OUT OUT IN OUT
15 2EO-2EF OUT IN OUT OUT OUT IN
16 2FO-2FF OUT IN OUT OUT OUT OUT

Notes

1

Default setting.

250-25F

Address bits A9 A8 A7 A6 A5 A4

1

OUT IN IN OUT IN OUT

Setting the Memory Address

Onboard memory on DAS-4100 Series boards consists of banks of
16K bytes in upper memory. DAS-4100 Series boards are shipped with a
memory address of CC00:0000. If your application requires a different
setting, use the memory address jumper block (J601) to set the memory
address, as shown in Table 3-3. Note that OUT indicates that a jumper is
not inserted in the specified jumper position and IN indicates that a
jumper is inserted in the specified jumper position.

3-10 Setup and Installation

Table 3-3. Memory Address

Map J601-1 J601-2 J601-3 J601-4 J601-5 J601-6

1 C000 IN IN OUT OUT OUT OUT
2 C400 IN IN OUT OUT OUT IN
3 C800 IN IN OUT OUT IN OUT
4

5 D000 IN IN OUT IN OUT OUT
6 D400 IN IN OUT IN OUT IN
7 D800 IN IN OUT IN IN OUT
8 DC00 IN IN OUT IN IN IN

Notes

1

Default setting.

1

CC00

Address bits A19 A18 A17 A16 A15 A14

IN IN OUT OUT IN IN

The host computer must leave room for the onboard memory of the
DAS-4100 Series board in its memory address map. To ensure that the
host computer is configured to leave room in its memory address map,
you must exclude the memory area of 16K bytes (CC00:0000 to
CFFF:000F or your memory address setting) from the memory available
for the EMS manager of your system (for example, QEMM or EMM386).

For QEMM, your C:\CONFIG.SYS file should contain a line similar to
the following:

DEVICE = C:\QEMM\QEMM386.EXE X=CC00-CFFF

For EMM386, your C:\CONFIG.SYS file should contain a line similar to
the following:

DEVICE = C:\DOS\EMM386.EXE X=CC00-CFFF

The memory address range is expressed as a segment address; omitting
the trailing zero from the full memory address listed in Table 3-3 yields
the equivalent segment address. Note that the examples assume a certain
directory structure on the disk; you may have to modify these commands.

Configuring the Board 3-11

Setting the Interrupt Level

An interrupt can be generated to signal the host computer at the end of a
data acquisition or peak detection. DAS-4100 Series boards are shipped
with an interrupt level of 7. If your application requires a dif ferent setting,
set the interrupt level by inserting a jumper into one of the positions of the
interrupt jumper block (J603). Make sure that you insert a jumper into
only one of the positions of J603; refer to Table 3-4. Note that OUT
indicates that a jumper is not inserted in the specified jumper position and
IN indicates that a jumper is inserted in the specified jumper position.

Table 3-4. Interrupt Level Selection

J603 Interrupt Bus Pin

J603-1 IRQ 15 D6
J603-2 IRQ 12 D5
J603-3 IRQ 11 D4
J603-4 IRQ 10 D3

1

J603-5
J603-6 IRQ 5 B23
J603-7 IRQ 2 B4

Notes

1

Default setting.

IRQ 7 B21

Setting the Input Impedance for Analog Input Channels

The coaxial connectors for Channel A and Channel B are terminated with
a socketed resistor. The resistors provided with the DAS-4100 Series
board have a value of 49.9
connectors; for a different termination, you can replace these resistors
with 1% metal film resistors of a different value.

to match the 50

Ω

impedance of the

Ω

3-12 Setup and Installation

The input voltage range and resistance is determined by two plug-in
resistors per channel. Channel A has a series resistor, R100, followed by a
relay controlled termination resistor to ground, R101. Channel B has two
resistors serving the same purpose: R116 and R117. The resistors are
plugged into small component jacks on the board making changes easy
and eliminating the need to solder. This voltage divider is followed by
another relay which allows AC or DC coupling. This is followed by a

1.0 M

Ω resistor to ground and a very high input resistance buffer. The

resistance of the FET input buffer can be ignored.

Figure 3-2 illustrates the analog input circuitry.

Figure 3-2. Analog Input Circuitry

Configuring the Board 3-13

The DAS-4100 is shipped with 50 Ω input resistance and an 8 V

R117

8R

V

------ -=

R116

RV8–()×

V

----------------------------=

maximum range. If a higher range is desired, the voltage divider must be
changed. The tap on the voltage di vider that goes to the buffer should not
go higher than a ±8 V range to a void clipping, assuming zero volts offset.
For example, to maintain 50
resistors should be 25

Ω, but accommodate a 16 V signal, the two

Ω.

For an input resistance of less than 10,000

Ω, the 1 MΩ resistor to ground

can be ignored. The values for the resistors are shown in Table 3-5. Note
that R represents the desired input resistance and V represents the desired
input voltage range.

Table 3-5. Input Impedance for Analog Input Channels

Impedance Channel A Channel B

Less than
10,000 Ω

R101

8R

------ -=
V

R100 R R101–= R116 R R117–=

Greater than
10,000 Ω

R100

R101

RV8–()×

----------------------------=
V

1 000 000,, R R100–()×

------------------------------------------------------------ -= R117

1 000 000,, R100 R–+

1 000 000,, R R116–()×

------------------------------------------------------------ -=

1 000 000,, R116 R–+

Table 3-6 lists the values and power ratings of the resistors you can use to
increase the maximum full-scale input voltage and change the input
impedance. The power dissipated by the input resistors at input
impedances of 1 k

Ω and above is insignificant; any resistor with a power

rating of 1/10 W or more is acceptable.

3-14 Setup and Installation

Table 3-6. Input Resistor Selection Chart

Input
Resistor
(in Ω)

50 8 0.0 0.0 49.9 1.28

75 8 0.0 0.0 75.0 0.84

93 8 0.0 0.0 93.1 0.68

100 8 0.0 0.0 100.0 0.64

Input
Range
(in V)

10 10.0 0.40 40.2 1.60
16 24.9 2.56 24.9 2.56
20 30.1 4.8 20.0 3.20

10 15.0 0.28 60.4 1.08
16 37.4 1.72 37.4 1.72
20 45.3 3.2 30.1 2.12

10 18.7 0.20 75.0 0.88
16 46.4 1.36 46.4 1.36
20 56.2 2.6 37.4 1.72

R100/R116
(in Ω)

R100/R116
(in W)

R101/R117
(in Ω)

R101/R107
(in W)

10 20.0 0.20 80.6 0.80
16 49.9 1.28 49.9 1.28
20 60.4 2.40 40.2 1.60

1,000 8 0 0.0 1,000 0.08

10 200 0.04 806 0.08
16 499 0.12 499 0.12
20 604 0.24 402 0.16

10,000 8 0 0.0 10,200 0.0

10 2,000 0.0 8060 0.0
16 4,990 0.0 4,990 0.0
20 6,040 0.01 4,020 0.0

Configuring the Board 3-15

Table 3-6. Input Resistor Selection Chart (cont.)

Input
Resistor
(in Ω)

100,000 8 0 0.0 11,000 0.0

1,000,000 8 0 0.0 OPEN 0.0

Notes

1

Default setting.

Input
Range
(in V)

10 20,000 0.0 86,600 0.0
16 49,900 0.0 52,300 0.0
20 60,400 0.0 41,200 0.0

10 200,000 0.0 3,900,000
16 499,000 0.0 1,000,000 0.0
20 604,000 0.0 665,000 0.0

R100/R116
(in Ω)

Trigger and Clock Input Termination

The Clock I/O connector has a 2000 Ω pull-up resistor to +5 V and a
jumper selectable 50
connector has jumper selectable 100
higher drive level than standard TTL levels. They are both followed by a
plug in 20

Ω series protection resistor. The 20 Ω resistor, combined with

the output resistance of the driver ICs, makes the output appear as
approximately 50

Ω termination resistor to ground. The Trigger I/O

Ω.

R100/R116
(in W)

Ω pull-up resistor to +5 V to obtain a

R101/R117
(in Ω)

1

R101/R107
(in W)

0.0

J700 is associated with the Clock I/O connector and allows a 50
termination resistor to ground. It is intended to be used to terminate 50

Ω

Ω

lines that are driving the inputs. Signals driving long lines or lines that are
driving many devices, where the DAS-4100 is at the end of the line, will
be less distorted when properly terminated with 50

The 50

Ω termination should not be used when the board is providing the

Ω.

Clock Out signal because it will load down the signal too much.

The 20, 50, and 100

Ω resistors are inserted into solderless component

jacks to change configurations or for easy replacement in case of damage.

3-16 Setup and Installation

For example, to increase drive current but reduce protection, you may
lower or short out R701 and R706. Figure 3-3 illustrates the Clock I/O
connector circuitry; the Clock I/O configuration is shown in Table 3-7.
Figure 3-4 illustrates the Trigger I/O connector circuitry; the Trigger I/O
configuration is shown in Table 3-8.

Figure 3-3. Clock I/O Connector Circuitry

Table 3-7. TTL Clock I/O Settings, J710

Component Clock Input Termination

J700

R702 50 Ω
R701 20 Ω Series Protection

Notes

1

Default setting.

Configuring the Board 3-17

1

OUT
IN R702

2 kΩ pull-up

Figure 3-4. Trigger I/O Connector Circuitry

Table 3-8. TTL Trigger I/O Settings, J711

Component Trigger T ermination Pull-Up

J701 IN R707

OUT

1

2 kΩ

R707 100 Ω

2

R706

Notes

1

Default setting.

2

Replace R706 with a shunt if J701 is IN.

20 Ω Series Protection

3-18 Setup and Installation

Analog T rigger Input

The Analog Trigger In connector is used for external trigger mode. This
connector accommodates input of an analog signal in the range of
+16 V. Operating under software control, the board will respond to either
the rising or falling edge of the trigger signal. The input presents a 4.8 k
resistor load terminated to
ground via one jumper block. When terminating with 50
presents 50
installed, the input is diode protected to 60 V
limited to 5 V
Analog Trigger In connector circuitry; the Analog Trigger In
configuration is shown in Table 3-9.

−16 to

Ω

−1.0 V. The input may be terminated to 50 Ω to
Ω, the input

Ω resistor terminated to −0.01 V. If the 50 Ω termination is not

. Input voltage should be

rms

with the 50 Ω termination. Figure 3-5 illustrates the

rms

Figure 3-5. Analog Trigger In Connector Circuitry

Configuring the Board 3-19

Factory-Set Jumpers

The additional jumpers that appear on the DAS-4100 are set for proper
board operation and should not be changed. Factory-set jumper settings
are listed in Table 3-10 in case of accidental alteration.

Table 3-10. Factory-Set Jumper Locations

Table 3-9. Analog Trigger Input

Component Input Termination

1

J201

R213 50 Ω

Notes

1

Default setting.

OUT
IN R213

4.8 kΩ

Jumper Setting Jumper Setting Jumper Setting Jumper Setting

J102 IN J503 LEFT J704.2 IN J708 IN
J103 IN J504 UP J704.3 IN J709.1 IN
J104 IN J505 UP J706.1 OUT J709.2 OUT
J105 IN J602 IN J706.2 OUT J709.3 OUT
J202 IN J605 UP J706.3 OUT J709.4 IN
J400 OUT J606 IN J706.4 IN J709.5 IN
J402 NONE J703 IN J706.5 OUT J712 OUT
J403 NONE J704.1 OUT J707 IN

3-20 Setup and Installation

Memory Size

The DAS-4100 Series boards are equipped with different types of
memory chips, depending on the memory size (64K through 2M).
Jumpers J304, J305, J306, J307, J308 and J401 are set at the factory to
correspond to the memory size and type, and should not be changed. The
information in Table 3-11 is provided for reference only.

Table 3-11. Factory-Set Memory Jumpers

Board J304 J305 J306 J307 J308 J401

DAS-4101/64K All right OUT OUT IN OUT 1 up, 2 down, 5 up, 9 up
DAS-4101/256K All right OUT OUT IN OUT 1 up, 3 down, 5 up, 9 up
DAS-4101/1M All right IN IN IN OUT 1 up, 5 up, 9 up, 10 down
DAS-4101/2M All left IN IN IN IN 4 up, 5 up, 8 down, 9 up
DAS-4102/64K All right OUT OUT IN IN 1 up, 2 down, 5 up, 9 up
DAS-4102/256K All right OUT OUT IN IN 1 up, 3 down, 5 up, 9 up
DAS-4102/1M All right IN IN IN IN 1 up, 5 up, 9 up, 10 down

Notes

1

Positions not shown are OUT.

1

Adding a Ground Connection

To prevent the switching noise generated by the digital high-speed logic
of the DAS-4100 Series board from interfering with the analog input
signal, the analog section is shielded and has a separate ground. Digital
and analog ground are connected on the board at one point.

In addition, the case of the host computer is connected to earth ground
through the power cord. An instrument connected to one of the BNC
connectors on the board may create a ground loop through its earth
ground connection. Depending on the actual configuration of your
system, you can reduce noise interference by external sources by adding a
direct connection between the bracket (case ground) and either digital or
analog ground of the board.

Configuring the Board 3-21

To add a ground connection, insert a jumper into jumper block J607 to
add a ground connection between case ground and analog ground. To
access jumper block J607, take off the shield by removing the scre w at the
top of the shield.

Experiment until you find the grounding arrangement that works best in
your system.

Installing the Board

Before installing a DAS-4100 Series board in your computer, make sure
that the jumpers on the board are set appropriately and that the jumper
settings match the settings in the configuration file, where appropriate.
Refer to page 3-5 for more information.

Caution: Installing or removing a board with the power ON can cause

damage to your computer.

To install the board, perform the following steps:

1. Turn power to the computer and all attached equipment OFF.

2. Remove the computer chassis cover.

3. Select an available slot. A DAS-4100 Series board requires a single,
full-size slot.

For adequate cooling, select a slot with good air flow, particularly
across the hot components: the two ICs with the black heat sinks next
to the shield and the DC/DC converter in the corner of the board with
the bevel. If you are concerned about insufficient cooling, consider
adding an inexpensive fan board into the expansion slot adjacent to
the component side of the DAS-4100 Series board.

4. Loosen and remove the screw at the top of the blank adapter plate,
and then slide the plate up and out to remove.

5. Holding the board by its edges or by the pink foam pad with one
hand, touch an uninsulated metal part of the computer case with your
other hand.

3-22 Setup and Installation

6. T ak e of f the pink foam pad, angle the SMB connectors into the slot in
the back of your computer, and insert the board into the selected
16-bit expansion connector on the motherboard.

7. Replace the computer chassis cover.

8. Plug in all cables and cords.

9. Turn power to the computer ON. Make sure that the power supply of
your computer can handle the current requirements of the DAS-4100
Series board; refer to Appendix A for information.

After you install the DAS-4100 Series board in the computer, you can
attach your application to the board; refer to the next section for
information. Before writing your application program, you can test the
functions of the DAS-4100 Series board using the scope and test program
under DOS; refer to Chapter 4 for information.

Refer to the documentation provided with your computer for more
information on installing boards.

Attaching Applications

You connect signal sources to a DAS-4100 Series board using the five
standard SMB coaxial connectors on the back of the board. Refer to
Figure 3-1 on page 3-9 for the location of these connectors, which are
used as follows:

● Channel A - Attach an analog input signal to Channel A of the

DAS-4100 Series board.

● Analog Trigger In- Attach an analog signal to the trigger source

multiplexer.

● Channel B - Attach an analog input signal to Channel B of the

DAS-4102 Series board.

● Trigger I/O - Attach an external digital trigger to the DAS-4100

Series board; source of output signal.

● Clock I/O - Attach an external pacer clock to the DAS-4100 Series

board; source of output signal.

Attaching Applications 3-23

The signals on the five connectors are terminated with resistors. The
resistors provided with the DAS-4100 Series board have a value of 49.9

Ω, but you can replace these resistors with a different value, if necessary.

Refer to page 3-12 for information on replacing resistors for the
Channel A and Channel B connector; refer to page 3-16 for information
on replacing resistors for the Clock I/O and Trigger I/O connectors.

You can reduce noise interference created by instruments connected to the
connectors by adding a ground connection; refer to page 3-21 for
information.

3-24 Setup and Installation

4

Scope and Test Program

The DAS-4100 Series scope and test program (D4100.EXE) is a utility
program that allows you to test the hardware features available on
DAS-4100 Series boards, to recalibrate the analog input section of the
board, and to perform basic oscilloscope functions.

D4100 is a menu-based, keyboard-controlled DOS program that requires
a VGA compatible display. It has one support file, D4100.PAR, which is
shipped with both the DAS-4100 Series standard software package and
the ASO-4100 software package.

To run the scope and test program, go to the directory containing the
D4100.EXE file and enter the following at the DOS prompt:

D4100

From the initial screen, press any key to continue. Any errors that are
found with the EEPROM configuration data CRC or with the D4100.PAR
file are shown on the second screen. From the second screen, press any
key to continue to the main program menu.

Control Keys for D4100.EXE

Table 4-1 lists the keys that control the D4100.EXE scope and test
program. In addition, several function group menus are listed at the top of
the oscilloscope screen; press the first letter in the title of a menu to
change to the menu. Note that D4100.EXE is case-insensitive.

Control Keys for D4100.EXE 4-1

Table 4-1. Control Keys

Key Description

A Switches the menu and the current highlight to the A/D menu. From

the A/D menu, you can modify most of the hardware features of the
board.

C Restores the calibration settings to the original values stored in the

EEPROM.

D Switches the menu and the current highlight to the Display menu.

The Display menu controls operations such as waveform
accumulation and averaging.

G Switches the menu and the current highlight to the Gates menu. The

Gates menu controls the parameters on which the onboard peak

detector runs.
H Displays a help screen, which lists these control keys.
L Loads a parameter file. Refer to page 4-10 for more information

about parameter files.
P Prints the currently displayed screen. The printer type is controlled

through the HP_Print.DRV file.
Q Quits the program.
R Redraws the screen. This is useful for clearing the scope display

after accumulating waveforms.
S Saves a parameter file. Refer to page 4-10 for more information

about parameter files.
T Takes a single shot. This key is valid only if the single-shot switch

on the A/D menu is turned on.
RET Selects the currently highlighted option if the highlight cursor is on

the top menu.
SPACE Toggles between setting and unsetting the move factor. The move

factor controls the rate at which the + and - keys increment the

current selection.
ESC Toggles the highlight cursor between the bottom and top menus. If a

prompt is currently on the screen, the prompt is removed and the

highlight location does not toggle.

4-2 Scope and Test Program

Table 4-1. Control Keys (cont.)

Key Description

+ Increments the current selection by the amount specified by the

move factor. If the move factor is highlighted, then the next highest

move factor is chosen. The move factor wraps around; all other

entries do not.

- Decrements the current selection by the amount specified by the

move factor. If the move factor is highlighted, then the next lowest

move factor is chosen. The move factor wraps around; all other

entries do not.
E Allows direct entry of a number. This is only valid for certain

entries. The entered number is automatically changed, if necessary,

to fit the parameters of that selection. For example, the buffer start

must be in increments of 4; if you enter a 6, it is automatically

changed to 8.

The suffix ’h’ (hexadecimal) can be used on any entered number.

Scope and Test Program Menus

The following sections describe the parameters on the scope and test
program menus.

A/D Menu

Table 4-2 lists the parameters on the A/D menu. You can access the A/D
menu at any time by pressing the A key. The A/D menu has two pages;
you may toggle between them using the page up and page down keys.

Scope and Test Program Menus 4-3

Table 4-2. A/D Menu

Parameter Description

Sampling Rate Changes the conversion rate for the board. The conversion

rate can range from 0.500 Msamples/second to
16384 Msamples/second, which is an ETS rate.

Single shot Turns single-shot mode on or off. If single-shot mode is

off, the waveforms are updated in real time. If single-shot
mode is on, waveform collection is suspended until the T
key is pressed; this causes one waveform to be taken. If
ETS mode or averaging is on, then enough waveforms for
one complete ETS shot are taken. For example, if you are
averaging four 200 MHz waveforms, then eight shots are
taken. For more information on ETS, refer to page 2-24.

Channel select Determines which channels will be displayed. Choices are

Channel A only, Channel B only, both channels, A
updating B, frozen, A frozen B updating, or both frozen.

Buffer post Specifies the number of samples to wait after the trigger

event occurs before starting to collect data. You cannot
change this parameter if pre-trigger mode (about-trigger
mode) is on; it is automatically set to two. Changing the
post-trigger delay affects the wav eform location pointed to
by buffer start.

Buffer start Specifies the starting location in onboard memory at which

waveforms are collected. If pre-trigger mode
(about-trigger mode) is on, this parameter controls the
minimum amount of pre-trigger data that is saved. For
example, if pre-trigger mode is on, and the buffer start is
set to 400, then 400 points of pre-trigger data are saved
before a trigger pulse is accepted.

Buffer length Specifies the amount of data that is saved after the trigger

pulse is accepted. The post-trigger delay setting does not
affect the buffer length. The maximum allowable value of
buffer length is 8,388,608. If the buffer length specified is
longer than memory available, then the collection will
wrap around.

Voltage level Sets the voltage input level of the board. This can range

from 0.20 V to 8.0 V peak-to-peak. This parameter is
duplicated for Channel B.

4-4 Scope and Test Program

Table 4-2. A/D Menu (cont.)

Parameter Description

Voltage offset Sets the offset voltage of the offset DAC (DAC1). This

information is initially taken from the EEPROM or from
the most recently loaded parameter file. This parameter is
duplicated for Channel B.

Vernier gain Sets the vernier gain. This information is initially taken

from the EEPROM, or from the most recently loaded
parameter file. This parameter is duplicated for Channel B.

Pre-trigger Turns pre-trigger mode (about-trigger mode) on or off. If

pre-trigger mode is on, the buffer start parameter specifies
the minimum amount of pre-trigger data to collect; if the
display start parameter on the Display menu is negative,
you can view the pre-trigger data. If pre-trigger mode is
turned off and the display start parameter is negative, the
display start is automatically changed to 0.

Trigger type Selects the trigger source. The options are software and

common (board is triggered through software control),
Thresh A, Thresh B, and Eanalog (board is triggered by the
input signal crossing a set threshold level), or Edigital
(board is triggered through a TTL signal on the T rigger I/O
connector).

Trigger threshold Specifies the trigger threshold level used by an analog

trigger. A Tr_ icon is displayed in Thresh A and Thresh B
modes on the left side of the display to indicate the set
threshold level.

Trigger in
polarity

Trigger out
polarity

Parallel trigger Overrides the trigger out polarity switch if this switch is

Only meaningful in external trigger modes. If this is ’+’
then the waveform will be triggered by a rising edge,
otherwise it will trigger on a falling edge.

Controls the polarity of the Trigger I/O connector on the
back of the board. If this is ’+’ then the Trigger I/O
connector is high while the board is digitizing and low
otherwise; this is reversed for a negative trigger out
polarity.

on. Parallel trigger is used to trigger multiple boards
simultaneously when all the boards are in external trigger
modes.

Scope and Test Program Menus 4-5

Table 4-2. A/D Menu (cont.)

Parameter Description

Interrupts Used to toggle interrupt generation. Note that D4100 will

not actually count interrupts. This switch was provided
only for testing the board circuitry with an external device,
such as an oscilloscope.

ETS wait Provides a delay between shots to allow a slow device

(such as a pulser/receiver) time to recover between shots.
This delay is only used in ETS modes; it has no effect in
transient sampling rates.

Clock Switches between an internal and an external pacer clock.

An internal pacer clock is the onboard 64 MHz clock. The
external pacer clock is an externally generated clock signal
of any frequency up to 64 MHz applied to the Clock I/O
connector.

Display Menu

Termination
coupling A/B

A/D board
number

A/D Base Port Displays the current base address of the board. This is not

This parameter is duplicated for Channel B and is used to
select the input state of the board. The signal can be either
AC or DC coupled, and can be either 50 Ω or 1 M Ω
terminated.

Only meaningful in multiple board setups. When
switching between boards, all the current parameters are
kept.

a switch; it is displayed for informational purposes only.

Table 4-3 lists the parameters on the Display menu. You can access this
menu at any time by pressing the D key.

4-6 Scope and Test Program

Table 4-3. Display Menu

Parameter Description

Scale Factor A/B Multiplies or divides the waveform by the specified

amount. This is useful for splitting the scope display by
putting channel A in one half and channel B in the other.
Markers on the right side of the scope show the current
bounds of the waveform.

Vertical Offset
A/B

Display start Allows scrolling through the collected data. If you attempt

Accumulate A/B Turns waveform accumulation on or off. If this is ON,

Lookup tables
A/B

Num. to average Specifies the number of waveforms to average before

Zero wait Turns the synchronous ready bus signal ON or OFF. If

Allows scrolling of the waveform in the vertical plane.
Note that this is purely a display offset; it is not actually
affecting the data coming off the DAS-4100 board.

to scroll past the digitized data you will see random noise;
this is merely the data that was in A/D memory upon
computer power up.

waveforms will not be erased. To clear the display of
accumulated waveforms, press the R key.

Controls data coming from the A/D board. The choices
are: OFF, twos complement, and absolute value. If lookup
tables are OFF, the data comes off in binary format. Note
that there are no display differences between binary and
twos complement format.

displaying. This can range from 1 (averaging off) to 128,
by powers of two.

synchronous ready is ON and the DAS-4100 Series board
and the host computer motherboard are synchronized
correctly, data transfer takes place at a faster rate.
However, if synchronous ready is ON and the DAS-4100
Series board and the motherboard are not synchronized
correctly, errors appear in the waveform in the form of
large spikes.

Time/points Specifies whether the time-based entries (buffer start,

buffer post, buffer length, display start A/B, gate start A/B,
and gate length A/B) are displayed in ra w data points or as
a time calculated from the current conversion rate.

Scope and Test Program Menus 4-7

Gates Menu

Table 4-4 lists the parameters of the Gates menu, which controls the
operation of the peak detector. You can access the Gates menu at an y time
by pressing the G key. The time-of-flight (TOF) and peak amplitude (PA)
readings are displayed above the scope display. The TOF is displayed
relative to the trigger point; the PA is always displayed as a voltage.

Table 4-4. Gates Menu

Parameter Description

Peak detect A/B Turns the peak detector ON or OFF. Peak detector results are

displayed beneath the volts/division display for the
appropriate channel.

> / < Specifies whether the peak detector looks for rising (>) or

falling (<) edges in edge mode, or at valleys (<) or peaks (>)
in level mode.

Level / Edge Specifies whether the peak detector looks for the first

crossing of the threshold (edge mode) or for the maximum
peak or valley (level mode).

4-8 Scope and Test Program

Calibrating the DAS-4100 Series Board

When a DAS-4100 Series board is shipped, it has already been calibrated;
however, over time, the analog section of the board can drift, slightly
distorting the calibration. To recalibrate your board, if necessary , perform
the following steps:

1. Input a one-cycle, software-triggered, calibrated triangle waveform
into the board. The signal generator must be able to output exact

0.20 V, 0.25 V, 0.50 V, 0.80 V , 1.00 V, 1.25 V, 1.60 V, 2.00 V , 2.50 V,

4.00 V, 5.00 V and 8.00 V amplitude waveforms.

2. For each of the sixteen voltage ranges, change the vernier gain and
voltage offset on the A/D menu until the peak and valley of the input
waveform just touch (but do not cross) the top and bottom of the
scope display. Make sure that the input setting of the board exactly
matches the output setting of the signal generator before calibrating a
set range.

3. With the analog input connector of f, adjust the of fset voltage until the
input signal rests exactly in the center of the scope display. This must
be done for all 16 input ranges.

The board is now calibrated. Save the current calibration information in a
parameter file, or, if you prefer, resave this information to the EEPROM.
To save the information to EEPROM, go to the EEPROM menu from the
A/D menu. Press the Page Down key and select the EEPROM option.

Note:

subsequent recalibration is not covered under warranty.

If you overwrite the factory calibration in EEPROM memory,

Calibrating the DAS-4100 Series Board 4-9

Using Parameter Files

The D4100 program creates parameter files that contain both the current
calibration information and the current settings of all the menu entries.
You can examine these parameter files using any text editor. The
parameter files are described as follows:

D4100.ADC - This file is read in when the program starts. The

●

calibration information in this file is ignored; the EEPROM has
precedence. If this file does not exist, then hardcoded defaults are
used instead.

PROG_END.PAR - This file is automatically created when D4100 is

●

exited. This allows you to automatically restore D4100 to its
operating state just before program termination.

T o sav e a parameter file, enter S ; the program prompts you for a file name.
The extension of the file name is forced to .PAR; this cannot be changed.

To load a parameter file, enter L and specify the file name (wildcards are
permitted); if you enter a wildcard, the program displays a file selection
menu containing all .PAR files; press Enter when the highlight is on the
correct file.

4-10 Scope and Test Program

5

Troubleshooting

If your DAS-4100 Series board is not operating properly, use the
information in this chapter to isolate the problem. If the problem appears
serious enough to warrant technical support, refer to page 5-4 for
information on how to contact an applications engineer.

Identifying Symptoms and Possible Causes

Table 5-1 lists general symptoms and possible solutions for problems
with DAS-4100 Series boards.

Table 5-1. Troubleshooting Information

Symptom Possible Cause Possible Solution

Board does not respond Base I/O address is unacceptable. Make sure that no other system

resource is using the base I/O
address specified by the I/O
address jumper. Reconfigure the
base I/O address, if necessary.
Refer to page 3-9 for instructions.

Interrupt level is unacceptable. Make sure that no other system

resource is using the interrupt
level specified by the interrupt
jumper. Reconfigure the interrupt
level, if necessary. Refer to page
3-12 for instructions.

Identifying Symptoms and Possible Causes 5-1

Table 5-1. Troubleshooting Information (cont.)

Symptom Possible Cause Possible Solution

Board does not respond
(cont.)

Intermittent operation Vibrations or loose connections

The board configuration is
unacceptable.

The board is incorrectly aligned
in the accessory slot.

The board is damaged. Contact the Keithley MetraByte

The I/O bus speed is in excess of
8 MHz.

exist.
The board is overheating. Check environmental and

Electrical noise exists. Provide better shielding or

Check the settings in the
configuration file. Make sure that
they match the settings of the
jumpers on the board, where
appropriate.

Check installation.

Applications Engineering
Department; refer to page 5-4.

Reduce I/O bus speed to a
maximum of 8 MHz. To change
the I/O bus speed, run BIOS
setup; refer to your computer
documentation for instructions on
running BIOS setup.

Cushion source of vibration and
tighten connections.

ambient temperature.

reroute wiring.

The I/O bus speed is in excess of
8 MHz.

System lockup A timing error occurred. Press Ctrl + Break .

5-2 Troubleshooting

Reduce I/O bus speed to a
maximum of 8 MHz. To change
the I/O bus speed, run BIOS
setup; refer to your computer
documentation for instructions on
running BIOS setup.

If you cannot identify the problem using the information in Table 5-1,
refer to the next section to determine whether the problem is in the host
computer or in the DAS-4100 Series board.

Testing Board and Host Computer

To determine whether the problem is in the host computer or in the
DAS-4100 Series board, perform the following steps:

1. Remove power connections to the host computer.

2. Unplug any cables from the DAS-4100 Series board.

3. Remove the DAS-4100 Series board from the computer and visually
check for damage. If a board is obviously damaged, refer to page 5-4
for information on returning the board.

4. With the DAS-4100 Series board out of the computer, check the
computer for proper operation. Power up the computer and perform
any necessary diagnostics.

If you have another DAS-4100 Series board that you know is functional,
refer to the next section to determine whether the problem is in the
accessory slot or in the I/O connections. If you do not have another board,
refer to page 5-4 for information on how to contact an applications
engineer.

Testing Accessory Slot and I/O Connections

To determine whether the problem is in the accessory slot or in the I/O
connections, perform the following steps:

1. When you are sure that the computer is operating properly, remove
computer power again, and install a DAS-4100 Series board that you
know is functional. Do not make any I/O connections.

2. Apply computer power and check operation with the functional
DAS-4100 Series board in place. This test checks the computer
accessory slot. If you are using more than one DAS-4100 Series
board, check the other slots you are using.

Testing Board and Host Computer 5-3

3. If the accessory slots are functional, check the I/O connections.
Connect any devices, one at a time, and check operation.

4. If operation is normal, the problem is in the DAS-4100 Series board
originally in the computer. Try the DAS-4100 Series boards one at a
time in the computer to determine which is faulty.

5. If you cannot isolate the problem, refer to the next section for
instructions on getting technical support.

Technical Support

Before returning any equipment for repair, call the Keithley MetraByte
Applications Engineering Department at:

[phone]
Monday - Friday, 8:00

A.M.

- 6:00

, Eastern Time

P.M.

An applications engineer will help you diagnose and resolve your
problem over the telephone.

5-4 Troubleshooting

Please make sure that you have the follo wing information av ailable before
you call:

DAS-4100
Series board

Model DAS-4101/64K

DAS-4101/256K
DAS-4101/512K
DAS-4101/1024K
DAS-4102/64K
DAS-4102/256K
DAS-4102/512K

DAS-4102/1024K
Serial # _____________________
Revision code _____________________

Computer

Manufacturer _____________________
CPU type 286 386 486 Pentium
Clock speed (MHz) 20 25 33 66 100 ____
Math coprocessor Yes No
Amount of RAM _____________________
Video system VGA SVGA
BIOS type _____________________
Memory manager _____________________

Operating system DOS version _____________________

Windows version 3.0 3.1 _____________
Windows mode Standard Enhanced

Software package Name _____________________

Serial # _____________________
Version _____________________
Invoice/order # _____________________

Compiler
(if applicable)

Language _____________________
Manufacturer _____________________
Version _____________________

Technical Support 5-5

If a telephone resolution is not possible, the applications engineer will
issue you a Return Material Authorization (RMA) number and ask you to
return the equipment. Include the RMA number with any documentation
regarding the equipment.

When returning equipment for repair, include the following information:

●

Your name, address, and telephone number.
The invoice or order number and date of equipment purchase.

●

A description of the problem or its symptoms.

●

●

The RMA number on the outside of the package.

Repackage the equipment, using the original antistatic wrapping, if
possible, and handling it with ground protection. Ship the equipment to:

ATTN: RMA #_______
Repair Department
Keithley MetraByte
440 Myles Standish Boulevard
Taunton, Massachusetts 02780

Telephone [phone]
Telex 503989
FAX [phone]

Note:

If you are submitting your equipment for repair under warranty,

you must include the invoice number and date of purchase.

5-6 Troubleshooting

A

Specifications

Table A-1 lists the analog input specifications for DAS-4100 Series
boards.

Table A-1. DAS-4100 Series Specifications

Feature Attribute Specifications

Channels Number One (4101 Series) or two (4102 Series)

If 4102, both can be used simultaneously

Channel-to-channel
isolation (DC to 50 MHz)

Input coupling DC (default; input range of − 8.0 V to +8.0 V without

Input impedance
Maximum safe input

voltage at 50 Ω
Input capacitance 20 pF, approximately

ADC Output Coding Twos complement ( − 128 to +127)

Type 64 Msamples/second, 8-bit flash
Input reference voltage 0 V to − 2.5 V, − 2.0 V typical
Integral and differential

linearity

50 dB with channels at same sensitivity
46 dB with 4 V signal on Channel A and Channel B
set to 260 mV sensitivity

distortion)
AC (8 V p-p, maximum input)

50 Ω (DC coupled) shunted by approximately 20 pF
5 Vrms continuous, ±250 V transients lasting less than

100 µ s

±0.6 LSB

1

A-1

Table A-1. DAS-4100 Series Specifications (cont.)

Feature Attribute Specifications

ADC (cont.) Integral and differential

±0.94 LSB with no missing codes

nonlinearity
Large-signal bandwidth 160 MHz @ Vin = full scale
Aperture jitter 15 ps rms
Input slew rate 440 V/ µ s
Step width 7.84 mV
Signal-to-noise ratio 48 dB, typical

Accuracy Gain ±5% of full scale using calibration file

DC offset ±5% of offset using calibration file
Real-time sampling period Time base accuracy (±1 ps) + ADC aperture jitter

(±17 ps) = ±18 ps total (±0.18% @ 64 MHz)

Equivalent-time sampling
period

Time base accuracy (±1 ps) + ADC aperture jitter
(±17 ps) + trigger delay jitter (±44 ps) = ±62 ps total

(0.787 @ 128 MHz)
Attenuator Attenuation factor 1, 4, 5, 8
Gain stage Gain levels 2, 4, 8,10
Offset DAC

(DAC1)

Setting Programmable in 4096 steps; increasing the setting

shifts the ADC input v oltage to a more negati ve v alue

2

Vernier gain
DAC (DAC2)

Input ranges
(factory­calibrated)

Reference voltage Programmable in 4096 steps from 0 V to − 2.1 V ;

±100 mV range
(gain code 12)

increasing setting increases the ADC input voltage

range and reduces sensitivity

Bandwidth ( − 3dB)

4

= 100 MHz

DC offset range = −1.00 to 2.00 V

3

Offset step size = 0.8791 mV

±125 mV range
(gain code 8)

Bandwidth ( − 3 dB)

DC offset range = − 1.00 to 2.00 V

6

= 110 MHz

Offset step size = 0.8547 mV

±250 mV range
(gain code 4)

Bandwidth ( − 3 dB)

DC offset range = − 1.00 to 2.00 V

6

= 100 MHz

Offset step size = 0.7326 mV

A-2 Specifications

Table A-1. DAS-4100 Series Specifications (cont.)

Feature Attribute Specifications

Input ranges
(factory­calibrated)
(cont.)

±400 mV range
(gain code 13)

±0.5 V range
(gain code 0)

±0.5 V range
(gain code 9)

±0.5 V range
(gain code 14)

±0.625 V range
(gain code 10)

±0.8 V range
(gain code 15)

±1 V range
(gain code 5)

±1 V range
(gain code 11)

±1.25 V range
(gain code 6)

±2 V range
(gain code 1)

±2 V range
(gain code 7)

Bandwidth ( − 3 dB)

DC offset range = − 4.00 to 4.00 V

Offset step size = 3.516 mV

Bandwidth ( − 3 dB)

DC offset range = − 1.00 to 1.00 V

Offset step size = 0.4884 mV

Bandwidth ( − 3 dB)

DC offset range = − 4.00 to 4.00 V

Offset step size = 0.3419 mV

Bandwidth ( − 3 dB)

DC offset range = −4 .00 to 4.00 V

Offset step size = 4.396 mV

Bandwidth ( − 3 dB)

DC offset range = −4 .00 to 4.00 V

Offset step size = 4.274 mV

Bandwidth ( − 3 dB)

DC offset range = −4 .00 to 4.00 V

Offset step size = 7.033 mV

Bandwidth ( − 3 dB)

DC offset range = −4 .00 to 5.00 V

Offset step size = 2.930 mV

Bandwidth ( − 3 dB)

DC offset range = −4 .00 to 5.00 V

Offset step size = 6.838mV

Bandwidth ( − 3 dB)

DC offset range = −4 .00 to 5.00 V

Offset step size = 3.663 mV

Bandwidth ( − 3 dB)

DC offset range = −4 .00 to 4.40 V

Offset step size = 1.954 mV

Bandwidth ( − 3 dB)

DC offset range = −4 .00 to 4.40 V

Offset step size = 5.861 mV

6

= 140 MHz

6

= 100 MHz

6

= 160 MHz

6

= 150 MHz

6

= 160 MHz

6

= 160 MHz

6

= 210 MHz

6

= 170 MHz

6

= 220 MHz

6

= 250 MHz

6

= 230 MHz

A-3

Table A-1. DAS-4100 Series Specifications (cont.)

Feature Attribute Specifications

Input ranges
(factory­calibrated)
(cont.)

±2.5 V range
(gain code 2)

±4 V range
(gain code 3)

Bandwidth ( − 3 dB)

DC offset range = −3 .00 to 4.00 V

Offset step size = 2.442mV

Bandwidth ( − 3 dB)

DC offset range = −2 .00 to 3.00 V

Offset step size = 3.907 mV
Counters Start Used for data acquisition:

Length: 16,777,216
Resolution: 2

Used for peak detection:

Length: 16,777,216
Resolution: 1

6

= 250 MHz

6

= 280 MHz

Onboard buffer
memory

Length Used for data acquisition:

Length: 16,777,216
Resolution: 2

Used for peak detection:

Length: 8,388,608
Resolution: 1

Post-trigger

5

Used for data acquisition:

Length: 16,777,216
Resolution: 2

Size DAS-4101/64K: 64K bytes

DAS-4101/256K: 256K bytes

DAS-4101/1M: 1M bytes

DAS-4101/2M: 2M bytes

DAS-4102/64K: 64K bytes

DAS-4102/256K: 256K bytes

DAS-4102/1M: 1M bytes

A-4 Specifications

Table A-1. DAS-4100 Series Specifications (cont.)

Feature Attribute Specifications

Pacer clock Internal Divisors: 1, 2, 4, 8, 16, 32, 64, 128

Internal 64 MHz oscillator: stability 100 ppm (0.01%)

over temperature and aging (1 year)

Sampling interval accuracy: 0.1%

External TTL-level signal of up to 64 MHz

Minimum pulse width: 4 ns (high or low)

Input load: 2 k Ω pull-up resistor to +5 V (can be

terminated with 50 Ω by setting a jumper)

Maximum input voltage: − 4 to +9 V (±4 V with 50 Ω

termination), transients of ±250 V (100 µ s) can be

tolerated
Trigger Sources Software

Analog (threshold): positive or negative threshold

crossing; threshold programmable in 256 steps over

the full-scale input range; edge or level trigger

External digital: positive or negative TTL input signal

on Trigger I/O connector

−

Equivalent
time sampling

6

(ETS)

External digital trigger

5 ns (high or low)

minimum pulse width
External digital trigger

input load
External digital trigger

maximum input voltage
Number of samples per

1 k Ω pull-up resistor to +5 V (can be terminated with

50 Ω by setting a jumper)

4 to +9 V (±4 V with 50 Ω termination), transients of

±250 V (100 µ s) can be tolerated

2 samples to memory size

trigger (length)
Post-trigger delay 0 to memory size in 2-byte increments

(31.25ns@ 64MHz)

Minimum pre-trigger data 0 to memory size in 2-byte increments
Trigger jitter One period of the undivided pacer clock (15.6 ns)
Delay range 10 ns to 22 ns
Delay resolution 39 ps (256 steps to 10 ns)
Delay accuracy 140 ps
Maximum rate 2.05 Gsamples/second

A-5

Table A-1. DAS-4100 Series Specifications (cont.)

Feature Attribute Specifications

6

Peak detector

Start address 1 sample increments
Detection length 1 to 4 memory size
Data formats Binary

Twos complement

Absolute value

Speed Conversion rate / 4 (for 64 MHz internal pacer clock:

16 Msamples/second, maximum

Results Peak value (8 bits)

Peak address (22 bits)
DSP port

6

Start address 1 sample increments
Transfer length 1 sample increments to 4,194,304
Data formats Binary

Twos complement

Absolute value

Transfer speed Conversion rate / 2 (32 Msamples/second)

Bus interface Bus PC ISA bus (8.0 or 8.33 MHz)

I/O map address size 16 bytes in two blocks of 8 bytes
I/O data transfer size 8 bits
Memory map address size 16K bytes in upper memory
Memory data transfer size 16 bits or 8 bits (programmable)
Data formats Binary

Twos complement

Absolute value

Access speed 3 Msamples/second to 7 Msamples/second (16-bit

mode)

1 Msamples/second (8-bit mode)

Zero wait state Programmable
Memory segmentation Entire memory or 16K byte segments
Acquisition length 4-sample increments to memory size

A-6 Specifications

Table A-1. DAS-4100 Series Specifications (cont.)

Feature Attribute Specifications

General Size Full-size AT extension board

Power consumption 2.7 A at +5.0 V, typical

0.3 A at +12.0 V, typical

0.2 A at − 12.0 V, typical

Operating temperature 0 to + 55 ° C (ambient)

−

Storage temperature

Notes

1

You can change the input impedance using two plug-in resistors per channel; refer to page 3-12.

2

The step size of the offset setting depends on the vernier gain.

3

The nominal setting should be near − 2.0 V for best ADC performance.

4

The input bandwidth is measured including digitization (50 W input impedance). If A C input coupling

is selected, the lower cutoff frequency is 4 Hz.

5

The post-trigger counter is loaded with the start counter value for peak detection; it is not used during

an about-trigger acquisition or during a peak detection.

6

Optional feature.

20 to +70 ° C

A-7

B

Keithley Memory Manager

The process that Windows uses to allocate memory can limit the amount
of memory available to Keithley DAS products operating in Windows
Enhanced mode. To reserve a memory heap that is adequate for the needs
of your product, you can use the Keithley Memory Manager (KMM),
included in the ASO software package.

The reserved memory heap is part of the total physical memory available
in your system. When you start up Windows, the KMM reserves the
memory heap. Then, whenever your application program requests
memory, the memory buffer is allocated from the reserved memory heap
instead of from the Windows global heap. The KMM is DAS product
independent and can be used by multiple Keithley DAS Windows
application programs simultaneously.

Note:

The memory allocated with the KMM can be used by a DMA

controller, if applicable.

The following are supplied with the KMM:

●

VDMAD.386 - Customized version of Microsoft’s Virtual DMA

Driver for Windows Version 3.1.

VDMAD.VXD - Customized version of Microsoft’s Virtual DMA

●

Driver for Windows 95.
Both VDMAD.386 and VDMAD.VXD consist of a copy of

Microsoft’s Virtual DMA Driver and a group of functions that is
added to perform the KMM functions. When you use the KMM to
reserve a memory heap, Microsoft’s Virtual DMA Driver is replaced
by the appropriate file.

B-1

Note:

VDMAD.VXD, it is recommended that you install the latest version;
to determine which version is the latest version, refer to the time
stamp of the file.

KMMSETUP.EXE - Windows program that helps you set up the

●

appropriate parameters and then modifies your SYSTEM.INI file
accordingly.

If you have multiple versions of VDMAD.386 or

Installing and Setting Up the KMM

T o install and set up the KMM whene v er you start up Windows, you must
modify the SYSTEM.INI file. For Windows Version 3.1, you can modify
the SYSTEM.INI file using either the KMMSETUP.EXE program or a
text editor. For Windows 95, you modify the SYSTEM.INI file using the
KMMSETUP.EXE program.

Using KMMSETUP.EXE

Using the KMMSETUP.EXE program, you modify your Windows
SYSTEM.INI file as follows:

1. Invoke KMMSETUP.EXE.
For Windows 3.1, you can select the KMMSETUP icon, or you can

choose File\Run and then choose Browse to locate
KMMSETUP.EXE.

For Windows 95, you can access the appropriate folder and then
double-click the KMMSETUP icon, or you can choose Start\Run and
then choose Browse to locate KMMSETUP.EXE.

The software displays the Keithley memory Manager - Setup panel.

2. Specify the appropriate options. For more information, choose the
Help button.

3. Select the Update button to update the SYSTEM.INI file with the
changes you have made.

4. Restart Windows to ensure that the system changes take effect.

B-2 Keithley Memory Manager

Using a Text Editor

Using a text editor, you can modify your Windows SYSTEM.INI file in
the [386Enh] section, as follows:

1. Replace the line

device=c:\windows\vdmad.386

Note:

Normally, the VDMAD.386 file is stored in the WINDOWS

device=*vdmad

with the following:

directory. If it is stored elsewhere, enter the correct path and name.

2. Add the following line:

KEIDMAHEAPSIZE=<

size

>

where size indicates the desired size of the reserved memory heap in
Kbytes.

Notes:

The memory size you specify is no longer available to
Windows. For example, if your computer has 8M bytes of memory
installed and you specify

KEIDMAHEAPSIZE=1000

(1M byte),

Windows can only see and use 7M bytes.

If you do not add the

KEIDMAHEAPSIZE

keyword or if the size you
specify is less than 128, a 128K byte minimum heap size is assumed.
The maximum heap size is limited only by the physical memory
installed in your system and by Windows itself.

3. Restart Windows to ensure that the system changes take effect.

B-3

Removing the KMM

If you make changes to the SYSTEM.INI file, you can always remove the
updated information from the SYSTEM.INI file and return all previously
reserved memory to Windows.

If you are using KMMSETUP.EXE, select the Remove button to remove
the updated information. If you are using a text editor, modify and/or
delete the appropriate lines in SYSTEM.INI. In both cases, make sure
that you restart Windows to ensure that the system changes take effect.

B-4 Keithley Memory Manager

C

Bandwidth Charts for Input

Voltage Ranges

The following figures show the effect of input voltage ranges on the
bandwidth of DAS-4100 Series board. These figures are useful in
determining the best input voltage range for a particular application. Note
that the number in parentheses indicates the gain code used.

Figure C-1. ±0.5 V Input Range (Gain Code 0)

C-1

Figure C-2. ±2 V Input Range (Gain Code 1)

Figure C-3. ±2.5 V Input Range (Gain Code 2)

C-2 Bandwidth Charts for Input Voltage Ranges

Figure C-4. ±4 V Input Range (Gain Code 3)

Figure C-5. ±0.25 V Input Range (Gain Code 4)

C-3

Figure C-6. ±1 V Input Range (Gain Code 5)

Figure C-7. ±1.25 V Input Range (Gain Code 6)

C-4 Bandwidth Charts for Input Voltage Ranges

Figure C-8. ±2 V Input Range (Gain Code 7)

Figure C-9. ±0.125 V Input Range (Gain Code 8)

C-5

Figure C-10. ±0.5 V Input Range (Gain Code 9)

Figure C-11. ±0.625 V Input Range (Gain Code 10)

C-6 Bandwidth Charts for Input Voltage Ranges

Figure C-12. ±1 V Input Range (Gain Code 11)

Figure C-13. ±0.1 V Input Range (Gain Code 12)

C-7