Tektronix BERTSCOPE BSA DATASHEET
Bit Error Rate Tester
BERTScope®BSA Series Data Sheet
Jitter Tolerance Compliance Template Testing with Margin Testing
Physical Layer Test Suite with Mask Testing, Jitter Peak, BER Contour,
and Q-factor Analysis for Comprehensive Testing with Standard or
User-defined Libraries of Jitter Tolerance Templates
Integrated Eye Diagram Analysis with BER Correlation
Optional Jitter Map Comprehensive Jitter Decomposition – with Long
Pattern (i.e. PRBS-31) Jitter Triangulation to Extend BER-based Jitter
Decomposition Beyond the Limitations of Dual Dirac TJ, DJ, and RJ for a
Comprehensive Breakdown of Jitter Subcomponents
Patented Error Location Analysis™ enables Rapid Understanding of
your BER Performance Limitations and Assess Deterministic versus
Random Erro
Perform Error Burst Analysis, or Error-free Interval Analysis
rs, Perform Detailed Pattern-dep enden t Error Analysis,
Features & Benefits
Pattern Generation and Error Analysis, High-speed BER Measurements
up to 26 Gb/s
Integrated, Calibrated Stress Generation to Address the Stressed
Receiver Sensitivity and Clock Recovery Jitter Tolerance Test
Requirements for a Wide Range of Standards
Sinusoidal Jitter to 100 MHz
Random J
Bounded, Uncorrelated Jitter
Sinusoidal Interference
Spread Spectrum Clocking
PCIe 2.0 Receiver Testing
F/2 Jitter Generation for 8xFC and 10GBASE-KR Testing
Electrical Stressed Eye Testing for:
PCI Express
10/40/100 Gb Ethernet
SFP+/SFI
XFP/XF
OIF/CEI
Fibre Channel
SATA
USB 3.0
itter
I
Applications
Design Ver
Design Characterization for High-speed, Sophisticated Designs
Certification Testing of Serial Data Streams for In dustry Standards
Design/Verification of High-speed I/O Components and Systems
Signal Integrity Analysis – Mask Testing, Jitter Peak, BER Con tour, Jitter
Map, and Q-factor Analysis
Design/Verification of Optical Transceivers
ification including Signal Integrity, Jitter, and Timing Analysis
Data Sheet
Linking D
Eye diagrams have always provided an easy and intuitive view of digital
perform
as the instruments that provide views of each have been architected in
fundamentally different ways. Eye diagrams have been composed of
shallow amounts of data that have not easily uncovered rarer events.
BERTs have counted every bit and so have provided measurements based
on vastly deeper data sets, but have lacked the intuitive presentation of
informa
The BERTScope removes this gap allowing you to quickly and easily view
an eye di
conventional eyes. Seeing a feature that looks out of the ordinary, you
are able to place cursors on the item of interest and by simply moving the
sampling point of the BERT, use the powerful error analysis capabilities
to gain more insight into the feature of interest. For example, check for
pattern sensitivity of the latest rising edges. Alternatively, use one-button
measur
bounded or likely to cause critical failures in the field. In each case,
information is readily available to enhance modeling or aid troubleshooting,
and is available for patterns up to 2
omains
ance. It has been harder to tie this directly with BER performance,
tion to aid troubleshooting.
agram based on at least two orders of magnitude more data than
ement of BER C on tour to see whether performance issues are
31
–1PRBS.
Data-rich Eye Diagrams
As shown pre viously, there is an impressive difference in data depth
between conventional eye diagrams and those take n with a BERTScope.
So what
going on – more of the world of low-probability events that is present every
time you run a long pattern through a dispersive system of any kind, have
does that mean? It means that you see more of what is really
Testing optical transmitters with BERTScope mask testing and a BERTScope CR.
The BERTScope shown with optical units enabled. In this example measurements are
converted to the optical domain automatically.
random noise or random jitter from a VCO – a world that is waiting to catch
you out when your design is deployed. Adding to this the deeper knowledge
mes from the one -butto n measurements of BER Contour, Jitter Peak,
that co
and Q-factor, and you can be confident that you are seeing the complete
picture.
2 www.tektronix.com
Bit Error Rate Tester — BERTScope®BSA Series
Clock path in BERTScope Option STR models.
With the ab
which give
measurem
are from t
set to onl
in only 1 s
measurem
produced
Here the m
ility to vary sample depth, it is very easy to move between deep measurements
a more accurate view of the real system performance, and shallow
ents that match those of a sampling scope. The measurements shown here
he eye diagram of an optical transmitter. With the BERTScope sample depth
y 3000 waveforms, the BERTScope generates the diagram shown in the middle
econd. The measured mask margin of 20% exactly correlates to the same
ent made on a sampling oscilloscope. The lower diagram shows the eye
by the same device, using Compliance Contour measured at a BER of 1×10
ask margin is reduced to 17%.
–6
Deep Mask Testing
The depth advantage gained for eye diagrams is at least 10 times greater
for mask testing. Unlike pseudo-mask testing offered by so me BERTs,
a BERTScope mask test samples every point on the perimeter of an
industry-standard mask, including th e regions above and below the eye. Not
only that, but each point is tested to a depth unseen before. This means
n for a test lasting a few seconds using a mask from the library o f
that eve
standard masks or from a mask you have created yourself, you can be sure
that your device has no lurking problems.
Accura
Testing w ith long or short patterns, the most accurate jitter measurement is
likely
get its result. W ith the BERTScope, you can quickly measure to levels of
1×10
1×10
are compliant to the MJSQ jitter methodology, and because the underlying
delay control is the best available on any BERT you can be sure that the
measur
(TJ), Random Jitter (RJ), and Deterministic Jitter (DJ), or easily export the
data and use your own fa vorite jitter model.
te Jitter Testing to Industry Standards
to come from the methodology that uses little or no extrapolation to
–9
–10
(1×10
–12
ements are accurate. Use the built-in calculations for Total Jitter
at high data rates), or wait for the instrument to measure
directly. Either way, the BERTScope’s one-button measurements
Mask Compliance Contour Testing
Many standards such as XFP/XFI and OIF CEI now specify mask tests
intended to assure a specified 1×10
–12
eye opening. Compliance Contour
view makes this easy by taking a mask, and overlaying it on your measured
BER contours – so you can immediately see whether you have passed the
mask at whatever BER level you decide.
.
Quick Selection Guide
Model Max Bit Rate
BSA260C/CPG 26 Gb/s Opt. STR
BSA175C/CPG 17.5 Gb/s Opt. STR
BSA125C/CPG 12.5 Gb/s Opt. STR
BSA85C/CPG 8.5 Gb/s Opt. STR
Stressed Eye –
SJ, RJ, BUJ, SI
Flexible Clocking
The generator clock path features in the BERTScope provides the test
flexibility needed for emerging real-world devices. Whether computer cards
or disk drives, it is often necessary to be able to provide a sub-rate system
clock, such as 100 MHz for PCI Express
running may require a differential clock signal with a particular amplitude
and offset; this is easily accomplished with the BERTScope architecture,
with many flexible divide ratios available.
Spread Spectrum Clocking (SSC) is commonly used in electrical serial
data systems to reduce EMI energy by dispersing the power spectrum.
Adjustable modulation amplitude, frequency, and a choice of triangle or sine
tion wave shape allow testing receivers to any compliance standard
modula
which utilize SSC. An additional modulator and source allows users to
stress the clock with h igh-amp litude, low-frequency Sinusoidal Jitter (SJ).
®
(PCIe). To get the target card
Generator/Analyzer
Both
Both
Both
Both
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Data Sheet
In keeping with the BERTScope philosophy, the graphical user interface presents the
control functionality in a logical, easy-to-follow format. A time domain representation of
the response shows the effects of tap weight settings. The frequency domain Bode plot
shows how the filter will compensate for the channel losses.
PatternVu
WorkingwithClosedEyes
With the need to push eve r-increasing data rates t hrough electrical
channels, the frequency-dependent losses often result in eye closure at the
receiver end. Engineers use equalization to compensate for these losses
and “open the eyes” in the r eal system. Tektronix offers powerful tools
that allow designers to characterize and test compliance of receiver and
transmitter components used in these systems.
For receiver testing, the DPP125 Digital Pre-emphasis Processor adds
calibrated pre-emphasis to the BERTScope pattern generator outputs,
emulating pre-emphasis applied at the transmitter. Pre-emphasis is
currently used in 10GBASE-KR, PCIe, SAS, DisplayPort
other standards.
Features:
1-12.5 Gb/s clock rates
3- or 4-tap versions
Flexible cursor placement allowing pre-cursor or post-cursor
PatternVu
The PatternVu option includes a software-implemented FIR filter which can
be inserted before the eye pattern display. In systems employing receiver
equalization, this allows you to view the eye diagram and perform physical
measurements on the eye as the receiver’s detector would see it, after the
effect of the equalizer. Equalizers with up to 32 taps can be implemented,
and the user can select the tap resolution per UI.
PatternVu also includes CleanEye, a pattern-locked averaging system
which removes the nondeterministic jitter components from the eye.
This allows you to clearly see pattern-dependent effects such as ISI
®
, USB 3.0, and
The intuitive user interface provides easy control of all operating parameters. A unique
Loop Response view shows the loop characteristics – actually measured, not just the
settings value.
(Inter-Symbol Interference) which are normally obscured by the presence of
high amounts of random jitter.
Single Value Waveform export is a component in the PatternVu option.
This allows you to capture a pattern-locked waveform showing single bits,
similar to a single-shot capture in a real-time oscilloscope. Once captured,
veform can be exported in a variety of formats for further analysis in
the wa
an external program.
Add Clock Recovery
The Tektronix CR125A, CR175A, and CR286A add new levels of flexibility
in compliant clock recovery. Most standards requiring jitter measurement
ify the use of clock recovery, and exactly which loop bandwidth must
spec
be used. Using a different or unknown loop bandwidth will almost certainly
give you the wrong jitter measurement. The new clock recovery instrument
enables easy and accurate measurements to be made to all of the common
standards.
4 www.tektronix.com
SSC Wavefo
rm Measurement
Display and Measure SSC Modulation
Waveforms
Spread Spectrum Clocking (SSC) is used by many of the latest serial
busses including SATA, PCI Express, and next-generation SAS in order
to reduce EMI issue s in new board and s
CR Family provides spread spectrum clock recovery together with the
display and measurement of the SSC modulation waveform. Automated
measurements include minimum and m aximum frequency deviation (in ppm
or ps), modulation rate of change (dF/dT), and modulation frequency. Also
included are display of the nominal data frequency and easy-to-use vertical
and horizontal cursors.
ystem designs. The Tektronix
Bit Error Rate Tester — BERTScope®BSA Series
The usefulness of the BERTScope CRs is not just confined to BERTScope
measurements. Use them stand-alone in the lab with your sampling oscilloscopes, or with
existing BERT equipment. Compliant measurements are available to you by pairing either
of these versatile instruments with your existing investments.
Add Jitter Analysis
Combine a Tektronix CR125A, CR175A, or CR286A with Option GJ with
your sampling scope or BERTScope for variable clock recovery from 1.2 to
Gb/s, Duty Cycle Distortion (DCD) measurem ent, and real-time jitter
11.2
spectral analysis. Display jitter spectral co mponents from 200 Hz to 90 MHz
with cursor measurements of jitter and frequency. Measure band-limited
integrated jitter with user-settable frequency-gated measurements (preset
r Spectrum Measurement
Jitte
band limits and integ rated jitter measurement for PCI Express 2.0 jitter
spectrum in this example).
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Data Sheet
Creating the stress recipe for receiver testing to a complicated standard such as PCIe
2.0 used to require "racking and stacking" several instruments, then spending hours
calibrating the setup. With BERTScope, an easy-to-understand graphical view gives you
control of all of the calibrated stress sources you need – inside the same instrument.
Eliminating the need for external cabling, mixers, couplers, modulators, etc. simplifies
stress calibration.
Taking the Stress out of Receiver Testing
As networks have changed, so have the challeng es of testing receivers.
While tests such as BER and receiver sensitivity are still important, receiver
jitter tolerance has evolved to be more real-world for jitter-limited systems
such as 1
Stressed Eye testing is becoming increasingly common as a compliance
measurement in many standards. In addition, engineers are using it to
explore the limits of their receiver performance to check margins in design
and manufacturing.
Flexible Stress Impairments
The BERTScope has high-quality, calibrated sources of stress built-in,
including RJ, SJ, BUJ, and SI.
ISI is also a common ingredient in many standards. The BSA12500ISI
differential ISI board provides a wide variety of path lengths, free from
switching suck-outs and anomalies.
0 Gb/s da ta over back planes and new high-speed buses.
Flexible Stress Impairments
Many standards call for SJ to be stepped through a template with different SJ amplitudes
at particular modulation frequencies. This is easy with the built-in Jitter Tolerance function
which automatically steps through a template that you designed, or one of the many
standard templates in the library.
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Pattern Capture
Bit Error Rate Tester — BERTScope®BSA Series
Stressed E
BERTScope Pattern Generator
ye Option
BERTScope Pattern Generator Family
The BSA125CPG, BSA175CPG, and BSA260CPG Family of pattern
generators provide a full range of PRBS patterns, common standards-based
erns, and user-defined patterns. Option STR provides full integrated,
patt
calibrated stress generation which is an ea sy-to-use alternative to a rack full
of manually calibrated instruments needed to provide a stressed pattern.
Using the Power of Error Analysis – In this example eye diagram views were linked with
BER to identify and solve a design issue in a memory chip controller. The eye diagram
(top left) shows a feature in the crossing region that is unexpected and appearing less
frequently than the main eye. Moving the BER decision point to explore the infrequent
events is revealing. Error Analysis shows that the features are related in some way to the
number 24. Further investigation traced the anomaly to clock breakthrough within the IC;
the system clock was at 1/24th of the output data rate. Redesigning the chip with greater
clock path isolation gave the clean waveform of the t op right eye diagram.
Uses include receiver testing of devices with internal BER measurement
ability such as D isplayPort, or adding stress capability to legacy BERT
instruments.
Pattern Capture
There are several methods for dealing with unknown incoming dat a. In
addition to Live Data Analysis discussed above, a useful standard feature
on all BERTScope analyzers is pattern capture. This allows the user to
specify the length of a repeating pattern and then allow the analyzer to grab
specified incoming data using the detector’s 128 Mb RAM memory. This
the
can then be used as the new detector reference pattern, or edited and
saved for later use.
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Data Sheet
MJSQ-compliant Dual Dirac jitter measurement.
Jitter Peak and BER Contour measurements made on live data.
Jitter Map
Jitter Measurements
Multi-gigabit serial data channels have eye openings only a couple hundred
picoseconds wide – or less. In systems where only a few picoseconds of
jitter count, accurate measurement of jitter is essential for managing tight
jitter budgets. The BERTScope has two sets of tools which perform these
critical measurements.
The Physical Layer Test Suite option includes measurement of Total Jitter
(TJ) along with breakdown into Random Jitter (RJ) and Deterministic
Jitter (DJ), using the well-accepted Dual Dirac method. The deep,
BERT-collected measurements use several ord ers of magnitude less
extrapolation, or in some cases no extrapolation, than oscilloscopes use as
a basis for the jitter measurements. This produces inherently more accurate
results than measurements made on other instruments which rely on high
levels of extrapolation.
The optional Jitter Map is the latest suite of jitter measurements available
for the BERTScope. It provides a compreh ensive set of subcomponent
ysis beyond RJ and DJ, including many measurements compliant with
anal
higher data rate standards. Jitter Map can also measure and decompose
jitter on extremely long patterns, such as PRBS-31, as well as live data
(requires Live Data Analysis option) p roviding that it can first run on a
shorter s
Features include:
ynchronized data pattern.
DJ breakdown into Bounded Uncorrelated Jitter (BUJ), Data Dependent
Jitter (DDJ), Inter-S ymbol Interference (ISI), Duty Cycle Distortion
(DCD), and Sub-Rate Jitter (SRJ) including F/2 (or F2) Jitter
BER-based for direct (non-extrapolated) Total Jitter (TJ) measurement
–12
BER and beyond
to 10
Separation of correlated and non-correlated jitter components eliminates
mistaking long pattern DDJ for RJ
Can measure jitter with minimum eye opening
Additional levels of b reakdown not available from other instruments such
as: E mphasis Jitter (EJ), Uncorrelated Jitter (UJ), Data Dependent Pulse
Width Shrinkage (DDPW S), and Non-ISI
Intuitive, easy-to-navigate jitter tree
Testing Interface Cards
Finally a solution to the age-old problem of making physical layer
measurements on high-speed line cards, motherboards, and live traffic
– the BERTScope Live Data Analysis option. Through novel use of the
dual-decision point architecture, the instrument is able to make parame tric
urements such as Jitter, BER Contour, and Q-factor in addition to
meas
the eye and mask measurements that are usable as standard – all that is
required is a clock signal. A dd the Jitter Map option to see even more layers
of jitter deco m position on live data. No more frustration because the pattern
is not known, is unpredictable, or involves rate-matching word inse rtions.
Troubleshooting is so much easier now that the one-button physical layer
s can be employed to provide unique insight.
test
8 www.tektronix.com
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