Tektronix AWG510 Data Sheet

External Clock Input Permits Jitter Insertion and Synchronization
One or Two Channels with 10-bit Vertical Resolution
10-Channel, 1 GHz Digital Data Generation (Opt. 03)
Real-time Noise Generation Supports Direct External Clock and
10 MHz Reference Input Waveform Transfers from DSO File Transfers from GPIB, Floppy Disk, or
10Base-T Ethernet On-Screen Waveform Editing for
Ease-of-Use Unique Real-time Sequencing Links
Multiple Waveform Files Creating Waveforms of Nearly Infinite Length
Built-in 3 GB Hard Drive for Mass Data Storage
User Modified Isolation Pulse for Disk Drive Testing
Optional 78 MB Flash Disk for ATE Applications
Communications Design and Test:
–Low Frequency Modulated RF –Digital Information Encoding Using
FSK, PSK and QAM (Quadrature Modulation) for Cellular, Fax and Modem Communications
Optical Communications Design and Test:
–Reflections, Crosstalk, and Ground
Bounce Simulation
Real-world Simulations:
–Corrupt Ideal Waveforms –Add Jitter to Waveforms with Jitter
Editor –EMP/EMI and Other System Noise –Power Supply Noise and Ripple –Transducer Simulation
As a member of the Tektronix family of arbitrary gen­erators, the AWG 500 Series is a high performance, mixed-signal source. The AWG 500 Series provides 1 GS/s sample clock rate and 4 Mword execution memories.
Its unique design integrates a graphical editing dis­play with the most powerful hardware output capabilities available. This allows on-screen viewing
of waveform editing and simplifies “what-if” test sce­narios by easily allowing the creation of composite signals.
The AWG 500 uses a graphical user interface to over­come the historical difficulties associated with developing arbitrary and complex waveforms. Several intuitive and powerful techniques are built-in to develop and edit custom waveforms.
Features and Benefits Applications
Arbitrary Waveform Generator
AWG 510 • AWG 520
®
ARBITRARY WAVEFOR GENERATOR • AWG 500 SERIES
2
The standard AWG 510 configuration pro­vides up to 2 V output or 4 V into a differential input with the complemen­tary output, each with 10-bits vertical resolution. Option 03 adds an indepen-
dent 10-bit-wide digital data port which can be used in conjunction with the marker outputs for data generation up to 12-bits wide at up to 1 GHz (14-bits AWG 520).
The standard AWG 520 configuration pro­vides 2 channels. Each channel provides 10-bit vertical resolution with amplitudes up to 2 V
p-p
.
OPERATING MODES
Continuous – Waveform is iteratively output. If a sequence is defined, the sequence order and repeat functions are applied. Triggered – Waveform is output only once when an external, internal GPIB/Ethernet, or manual trigger is received. Gated – Waveform begins output when gate is true and resets to beginning when false. Enhanced – Waveform is output as defined by the sequence.
ARBITRARY WAVEFORMS
Waveform Length – 256 to 4,194,048 points in multiples of four. Sequence Length – 1 to 8,000 steps. Both CH1 and CH2 operate from the same sequence (AWG 520). Sequence Repeat Counter – 1 to 65,536 or infinite.
CLOCK GENERATOR
Sampling Frequency – 50.000000 kHz to
1.0000000 GHz.
Resolution – 8 digits. Internal Clock –
Accuracy: ±1 ppm. Phase Noise:
At 1 GHz, 10 kHz offset: –80 dBc/Hz. At 1 GHz, 100 kHz offset: –100 dBc/Hz.
INTERNAL TRIGGER GENERATOR
Internal Trigger Rate –
Range: 1.0 µs to 10.0 s. Resolution: 3 digits, 0.1 µs minimum. Accuracy: ±0.1%.
MAIN OUTPUT
Output Signal –
AWG 510: Complementary; CH1 and CH1. AWG 520: Single-ended; CH1 and CH2.
DA Converter –
Resolution: 10 bits. Differential Non-Linearity: ±1 LSB. Integral Non-Linearity: ±1 LSB.
Normal Out –
Pulse Response (–1 and 1 waveform data, 0 V offset, Through filter):
Rise time (10 to 90%): Amplitude >1.0 V, 2.5 ns; Amplitude 1.0 V, 1.5 ns. Fall time (10 to 90%): Amplitude >1.0 V, 2.5 ns; Amplitude 1.0 V, 1.7 ns. Aberrations (at 500 MHz): Amplitude >1.0 V, ±10%; Amplitude 1.0 V, ±7%. Flatness (after 50 ns from rise/fall edge): ±3%. Small signal bandwidth (–3 dB, Amplitude
0.5 V): 300 MHz. Sinewave Characteristics (1 GS/s clock, 32 wave­form points, 31.25 MHz signal frequency, 1.0 V amplitude, 0 V offset, Through filter):
Harmonics: -50 dBc, DC to 400 MHz. Noise: -53 dBc, DC to 400 MHz. Phase Noise: -90 dbc/Hz at 10 kHz offset.
Filter:
Type: 10, 20, 50, 100 MHz Bessel low-pass. Rise time (10 to 90%): 10 MHz, 35 ns; 20 MHz, 17 ns; 50 MHz, 7.0 ns; 100 MHz, 3.5 ns. Delay from trigger: 10 MHz, 77 ns + 1 clock; 20 MHz, 57 ns + 1 clock; 50 MHz, 45 ns + 1 clock; 100 MHz, 42 ns + 1 clock; Through, 37 ns +1 clock.
Direct DA Out –
Output Voltage: 0.5 V
p-p
(with –0.27 V offset) into
50 Ω. Amplitude Accuracy: 0.5 V
p-p
±10%. DC Offset Accuracy: –0.27 V ±10% (waveform data = 0). Pulse Response (–1 and 1 waveform data):
Rise time (10 to 90%): ≤700 ps. Fall time (10 to 90%): ≤700 ps.
Output Impedance – 50 Ω. Connector – Front Panel BNC.
AUXILIARY OUTPUTS
Marker –
Number:
AWG 510: 2. AWG 520: 4.
Level:
Hi/Lo: –2.0 V to 2.0 V (0.05 V
p-p
to 4 V
p-p
) into
50 ; –4.0 V to 4.0 V (0.1 V
p-p
to 8 V
p-p
) into
1 MΩ.
Resolution: 0.05 V. Accuracy: Within ±0.1 V ±5% of setting. Rise/Fall Time (10 to 90%):
At 1 V
p-p
, Hi +0.5 V/Lo –0.5 V: 0.5 ns.
At 2 V
p-p
, Hi +1 V/Lo –1 V: 1.0 ns.
At 4 V
p-p
, Hi +2 V/Lo –2 V: 2.0 ns.
Variable Delay:
Range: 0 ns to +2 ns.
Resolution: 20 ps. Marker Skew: 32 ps. Connector: Rear-panel SMB.
Clock Out –
Level: ECL 100 K compatible. Connector: Front-panel BNC.
Noise –
Level:
Range: –145 dBm/Hz to –105 dBm/Hz.
Resolution: 1 dB.
Accuracy: ±2.5 dB at 100 MHz.
Flatness: ±2.5 dB, 1 MHz to 300 MHz
(referenced to –105 dBm/Hz at 100 MHz). Type: Gaussian. Connector: Front-panel BNC.
Digital Data Out (Opt. 03) –
Output Signals: D0 to D9 (10 bits). Level:
Hi/Lo: –2.0 V to 2.0 V (0.1 V
p-p
to 4 V
p-p
) into
50 ; –4.0 V to 4.0 V (0.2 V
p-p
to 8 V
p-p
) into
1MΩ.
Resolution: 0.1 V.
Accuracy: Within ±0.1 V ±5% of setting. Rise/Fall Time (10 to 90%):
At 1 V
p-p
, Hi +0.5 V/Lo –0.5 V: 0.5 ns.
At 2 V
p-p
, Hi +1 V/Lo –1 V: 1.0 ns.
At 4 V
p-p
, Hi +2 V/Lo –2 V: 2.0 ns.
Skew Between Data: 1 ns, 330 ps typical. Delay:
Data to marker: 4.4 ns.
Clock to data: 3.7 ns. Connector: Rear-panel SMB.
Characteristics
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