Tektronix AMM1A User manual
AMMIA
Master Analog Measurement Module
The AMMl A Analog Measurement Module combines three important Series 500 functions into a sin&e
module. First, the AMMlA functions
gle-ended or eight differential analog input signals. It contains signal conditioning and switching circuitry for these channels. Second, the Ah&ilA selects and conditions analog signals from other analog
input modules in a Series 500 system. Last, the AMMlA serves as a IZbit A/D converter for its own
analog input channels, as well as any other analog signals which have been processed by the global select/conditioning circuitry. After analog conditioning, signals are routed to the A/D converter section
of the module for the analog-to-digital conversion process.
Input signals are applied to the AMMl A’s analog input channels through on-card quick-connect screw
terminals. The AMMlA has a total of 16 local single-ended, or eight differential inputs. The input configuration is controlled through software, rather than with hardware switches. These analog input
channels can be conditioned with programmable local gains of either xl or x10.
Global conditioning consists of a high-speed software-controlled gain amplifier with programmable xl,
x2, x5 and x10 gain values. All analog inputs connected to the Series 500 pass through the global circuitry, whether the signals originate on the AMMlA or some other analog input module. Therefore, these
gain values can be applied to any analog input in the system.
as
a standard analog input module, and will accept up to 16 sin-
For A/D conversion, the AMMlA uses a E-bit successive approximation converter. A maximum conversion time of only l@ec allows sampling rates as high as 62.5kI-L~. to maximize resolution, the
AMMlA has 0-IOV and +lOV A/D converter ranges which are software selectable.
CAUTION: Always turn off the system power before installing or removing modules. To minimize
the possibility of EMI radiation, always operate the system with the top cover in place and properly
secured.
The AMMlA is designed to be used only in slot 1 of the 500-series chassis, Model 575, or Model 576. To
install the module in a series 500 chassis, first remove the baseboard top cover and install the module
in slot 1 with the component side facing the power supply. For Model 575 or 576, please refer to the Setup section of its hardware manual.
Document Number: 501-913-01 Rev. B
AMMl A-l
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SOFTWARE CONSIDERATIONS THE AMMlA ANALOG MODULE
The AhJMlA module, when used in a 575 or 500 series chassis, operates with KDAC500 and a variety
of 3rd party software packages. For programmers who are writing their own register level driver, the
following data format explanation is provided:
BASIC PEEK/POKE operations and equivalent commands in other programming languages must access the AMMIA as a 16-bit A/D module, rather than a 12-bit module. The AMMlA’s 12-bit resolution
results from padding the last four of the 16 bits with zeros. The least significant bit position where
change will be observed in the fifth least significant bit, and the low byte will increment by 1000 binary.
The high and low bytes carry information as follows:
high byte
1i
HHHHHHHH LLLL 0000
where: H = high-order bit (8)
L = low-order bit (4)
0 = bit permanently wired low (4)
Thus, a complete read of the AMMlA requires that a high and low byte be read. Converting the high
and low bytes to a full A/D count can be performed as follows:
RES = (256 * HIBYTE) + LOWBYTE
The equivalent voltage can be calculated by multiplying RES by the bit value for a 16-bit conversion
referenced to the A/D converter range. Consult the following examples:
Assume a decimal value for HIBYTE of 170, and 48 for LOWBYTE. RES can be calculated as:
low byte
RES = 170956 i- 48
RES = 43568
1. For an A/D range of +lO volts, calculate the corresponding voltage reading as:
V = (RES X. 20/65536) - 10
V = (43568 + 20/65536) -10
V = 3.296V
2. For an A/D range of O-10 volts, calculate the corresponding voltage reading as:
v = (RES + 10/65536)
V = (43568 * 10/65536)
V=6.648
AM-MA-3
AMMI A High-speed Acquisition Mode with the ANINQ Command (KDACXOO)
The ANINQ command can operate the Ah4hJlA module in a high-speed “auto-acquire” mode at an aggregated throughput rate of up to 62.5kI-I~. Auto-acquire applies to single or multiple channels. For
multiple channels, the per-channel scan rate equals 62.5lcJ& divided by the number of channels.
The analog input modules AIM2 and AlM3A can also provide up to 62.5kHz throughput when these
modules are used in a system containing an AMMIA.
To operate the AMMlA in auto-acquire mode, you must satisfy the following requirements:
1. The analog input channels sampled by ANINQ must be on an AMMlA, AIM& or AIM3A.
2. All channels sampled by the specific ANINQ command must be on one module.
3. The AMMlA’s input filter must be set to 1001612.
If any of these conditions cannot be met, the speed of an ANINQ command will revert to the speed of
a BGREAD command. Under these circumstances, it is better to use BGREAD in order to take advantage of foreground/background operating mode.
NOTE: The ANlNQ command in KDAC500 has been optimized for auto-acquire operation with the
AMMIA. If you attempt auto-acquire mode with BASIC’s PEEK/POKE, or the memory READ/WRITE
commands of other languages, you may receive incorrect data. If you do not use KDAC500, Keithley
suggests that you run the AMMlA only in “regular acquisition mode”. This mode is described under
the heading “SELECT ACQUISlTION MODE” later in this manual.
Self-calibrating During “CALL KDINIT” (KDACSOO)
The AMMlA module performs a calibration of the A/D gain and range each time KDINlT is called.
KDAC500 executes the KDlNlT function automatically each time it is loaded. KDAC500 will expect an
Ah4MlA module in the system if the configuration file (CONFIG.TBL) shows an AMMlA in slot 1. If
the software cannot complete the calibration, it will issue an error message such as “Unable to calibrate
A/D module”. If this occurs, check that:
1. The data acquisition hardware is turned on.
2. The cable between the hardware and the host computer is connected.
3. An AMMlA module is mounted in slot 1 of the data acquisition system
AMMlA-4
Connection and Operation
Signal Connection
The Ah4MlA can be programmed for either differential or single-ended local input configurations.
These local input signals are applied to screw terminals located toward the rear portion of the AMMIA.
Single-ended and differential inputs use the same screw terminals.
The channel numbers are shown in Figure 1. Figure 2 shows typical connections for channels 0 through
7 in differential mode. For differential mode, connect the high (-I-) side of an input signal to the (+> terminal, and the low (-> side of the signal to the corresponding (-) terminal. When the AMMlA is configured for single-ended input,
through 15, and the low (-1 side to the module ground at either end of the terminal strip. In Figure 2, the
numbers listed in parentheses above the lower connector are the single-ended local channels 9 through
15.
conzlect
the high (+) side of the input signal to one of the terminals 0
Series 500
Chassis Ground
Figure 2 Typical Differential Connection (Channel 0 Shown)
Measured
Voltage
AMMlA-5
CAUTION: The AMMlA inputs are non-isolated. In single-ended mode, one side of the input is
connected to power line ground. Any signal connected to the AMMlA must also be referenced to
power line ground, or module or system damage may occur Also note that inaccuracies on other
channels may result. When used in differential mode, the AMMlA local inputs must both be within
HOV of module ground for proper operation. If either signal exceeds k3OV module damage may result.
In many situations, shielded cable may be required to
minimum. If shielded cable is used, connect the shield to ground only, and do not use the shield as a
signal-carrying lead. Usually, a module ground terminal should be used, but in some cases better results may be obtained by using one of the baseboard ground posts. Use the configuration that results in
the lowest noise.
For shielding to be effective, the shield must contain both high and low signal wires, and must not carry
any other signals. If a number of AMMlA signal input lines are shielded, all shields should be connected to the same ground terminal.
minimize EMI radiation, or to keep noise to a
Signal Conditioning
Figure 3 shows a simplified block diagram of the MIA. The module is divided into six general sections: a local multiplexer, a local programmable gain amplifier, a global multiplexer, a global programmable gain amplifier, a programmable low-pass filter, and a 12-hit A/D converter.
Local input signals from channels 0 to 15 are applied to the local multiplexer for selection. At any given
time, only one channel will be selected, as determined by the SELECT CHANNEL command (covered
later in this section). The signal from the selected channel is then routed through a local programmable
gain amplifier to the global multiplexer for further signal selection and conditioning.
AMMlA-6
The global multiplexer selects a single signal from among the 10 slots in the 500 series chassis. In this
manner, signals from any of the 10 slots can be selected by software. The global multiplexer is controlled
by
the SELECT
its hardware manual for information on how the global multiplexer selects signals from slot 3 and from
the 3B channel connector.
After the signal is selected, the Global PGA applies softwareselectable gains of xl, x2, x5, or x10. The
signal finally passes through a one-pole filter with software selectable -3db frequencies of either lOOkI&
or 2kH.z. When this signal conditioning process is complete, the signal is routed to the 12-bit A/D converter for digitization. After the conversion process, digital data representing the applied signal travels
via the baseboard and interface card to the host computer.
SLOT command, discussed later in this section. Users of the 575 or 576 should consult
Local
Prcgrammable
Gain Amplifiir
16 Single-ended or
8 Differential
Inputs
(input Mode
Programmably
Selected)
Programmable
Lccal
Channel
Selection
Gr--l
LOCAL
MUX
LQ
ti
Analog Inputs
From Other
Slots
DC1 orX10)
~
GLOW
MUX
iL
J
Global
Programmable
Gain Amplifier
(Xl .X2.X5.OR
-
12BlT =
AID AND =
S/H Z
f
Programnable
Filter
(1ookHz OR
2kHz)
Figure 3. AMMlA Signal Conditioning
Input Filtering
Noise introduced into the input signal can corrupt the accuracy of the measurement. Such noise will
usually be seen as an unsteady reading, or, in some cases, as a constant offset. In the former case, the
effects of noise will usually be quite obvious, but may not be noticeable in
tion.
the
steady-state offset situa-
Frequently, noise is introduced into the signal from 50 to 6OHz power sources. In many cases, noise can
be attenuated by shielding or relocating the input signal lines, as discussed earlier. It may also be possible to reject unwanted 6OHz noise by using the AMMlA in differential mode. Since the 60Hz noise
may also be present on the low side of the signal, the differential amplifier will reject the common signal. In more difficult situations, however, it may be necessary to filter the input signal to achieve the
necessary noise reduction.
When noise is a problem, a single-pole low-pass filter like the one shown in Figure 4 can be connected
between the input signal and the corresponding AMMlA channel. Note that the filter is made up of a
single capacitor and resistor with the capacitor connected between the AMMlA channel input termi-
nals
and the module ground terminal. The resistor is then placed in series with the high input signal
lead.
From Signal
l
C-
--r
I
To AMMIA Input
Figure 4. Input Filtering
AMMlA-7
A common reference point for a simple filter like the one in Figure 4 is the -3dB or half-power point,
which is given
where f is in Hz, C is in farads, R is in ohms. Above this frequency filter response will roll off (decrease)
at a rate of -2OdB per decade. Thus, each time the frequency increases by a factor of 10, filter output voltage decreases by a factor of 10 (-20dB).
Although such filtering can quiet down a noisy signal, there is a tradeoff in the form of slower response. This response time may be important in the case of a rapidly changing input signal. For the filter
in Figure 4, the response time to 1% of fmal value is 4.6RC, while the response times to 0.1% and 0.01%
of final value are 6.9RC and 9.2RC, respectively.
As a example, assume that 10 counts of 6OHz noise is present in the input signal. To reduce the noise to
one count, an attenuation factor of 10 (-20dB) at 6OHz wiIl be necessary. Thus, the filter should have a 3dB point of 6OHz.
To determine the relative RC values, the above equations can be rearranged to solve for either R or C.
If we wish to choose a nominal capacitor value and then solve for the resistance, we have:
as
follows:
fsMB = 1/(27cRC)
R = 1/(2rrCf,,)
Choosing a nominal value of 2@ for C, the necessary resistance is:
R=1/(2xx(2xW)x6Hz)
R = 13.263k
The resulting response times with these R and C values would be:
t(l%) = 4.6RC = 122ms
t(O.l%) = 6.9RC = 183ms
t(O.O1 %) = 9.2RC = 244ms
Note that there are a number of RC values that can be used in a given situation. To minimize the effects
of the series resistance, however, it s recommended that the value of R be kept under 2OwZ.
Current-to-Voltage Conversion
AMMlA local inputs are designed to accept voltages in the range of +lOV. Thus, the AMh41A can be
directly connected to many signal sources. Some transducers and instrumentation, however, provide
current outputs that must be converted into voltages in order to be measured through an AMMl Ainput
channel.
AMMA-
When connecting current inputs to the AM&$1 A, a resistor should be installed across the input to make
the necessary current-to-voltage conversion. J4, J5, and J6 provide locations for installing these resistors
on the AMMlA. Refer to the circuit schematic and board layout diagrams for header information.
The value of the resistor can be determined from Ohm’s Law as follows:
R=E/I
Where R is the resistance in ohms, E is the maximum desired voltage in volts (usually the upper range
limit of the A/D converter), and I is the maximum anticipated current in amps.
As an example, assume the A/D converter range is zero to +lOV and that the expected current lies in
the range of four to 4OmA. The required resistance is:
R = 10/0.04
R=250
Thus, a 25OQ resistor should be installed across the input of the channel in question (note that a 25OQ
value is required when using KDAC500 engineering units conversion). Since current measurement accuracy is directly related to the accuracy of the resistor, use the smallest tolerance resistor available (typically 0.1%). Suitable 25OQ precision resistors can be purchased from Dale Resistors, (P/N
RN55E2500B), or from Keithley (P/N 500~RES-250).
Analog-to-Digital Converter Timing
When programmin g high-speed sampling sequences, certain timing constraints concerning the A/D
conversion cycle should be observed. Depending on the AMMlA’s acquire mode, the scenario for receiving converted values from the A/D is very different. Refer to the discussion of the acquire modes
below for specific instruction on how to process analog signals.
To increase system throughput, data latches have been provided on the AMMl A, making data from the
last conversion available while the converter is busy processing another reading. The data is refreshed
(updated) every time a conversion has been completed.
External Trigger Operation.
The AMMlA has the capability of triggering an acquisition from an external TI’L-level source. The
jumper on the AMMlA 03) dictates the triggering source. The external trigger can only be used in
62.5kHz auto acquire mode which is explained below in the SET ACQUISITION MODE command discussion.
When the AMMlA is in 62.5161~ auto acquire mode, the trigger source can be set to either external or
internal by the J3 jumper. When set for internal triggering, the AMMlA continuously converts analog
signals as described below in the SET ACQUISITION MODE command discussion. When the J3 jumper
is removed, a TTL-level gating signal can be attached to pin 2 of the jumper header. A low level applied
to pin 2 will enable the continuous conversion process, a high level applied to pin 2 will suspend the
AMMlA-9
continuous conversion process. In either case, the application program must synchronize itself to the
conversion process by polling the conversion status
command discussion.
The pm configuration of the jumper header is as follows:
pill1 Special trigger output - valid only when using TRGl
pm2
pm3 OV (ground) - for internal triggering
The J3 jumper should be across pins 2 and 3 for internal trigger operation. The jumper should be re
moved and the external gating source should be connected to pin 2 for external gate operation. The J3
jumper should be across pins 1 and 2 if a TRGl analog trigger module is being utilized.
Commands
Table 1 summa rizes the commands used with the AMMlA. Note that several commands share the
CMDA and CMDB locations. Some commands use only selected bits in the command byte, others are
differentiated by whether a read or write operation is performed.
as explained in the SELECT ACQUISlTION MODE
trigger input
Table 1. Commands Used with the A.&M&l
5001575
Command
SELECT CHANNEL
SELECT LOCAL CHANNEL MODE
SELECT LOCAL GAIN
SELECT ACQUISITION MODE
SELECT HLTER
SELECT SLOT
SELECT CMDA READ MODE
SELECT RANGE
SELECT GLOBAL GAIN
RESET AND RECAL
A/D LOW DATA*
A/D STATUS
A/D HIGH DATA
A/D START
EOC (end-of-conversion) STATUS
The information read from CMDA is selected by the SELECT Ch4DA READ MODE command. Refer to the sections
below for the full description of their operations.
Address Signal Line
xxx80
XX&O
XXX80
xxx80
xxx81
xxx81
xxx81
xxx81
xxx9A
XXX80
XXX80
xxx81
xxx9B
xX&B
CMDA (Write)
CMDA (Write)
CMDA (Write)
CMDA (Write)
CMDA (Write)
CMDB (Write)
CMDB (Write)
CMDB (Write)
CMDB (Write)
CMDC (Write)
CMDA (Read)
CMDA (Read)
CMDB (Read)
CMDD (Write)
CMDD (Read)
Bits Used
DO-D3
D4
D5
D6
D7
DO-D3
lx
D5
D6-D7
ALL
ALL
ALL
ALL
ALL
ALL
AMMIA-10
The “xxx” in the 500/575 address column sign&s the three hexadecimal digits that make up the base
hardware
card. The suggested address is &HCFF80, so “xxx” = “&HCFl?‘.
address
which is either switch selected or programmed on the IBIN-A or IBIN-F’S/2 interface
Select Channel, Local Gain, Filter, Acquisition Mode, and Channel Mode.
D71D6ID5lD4031D2IDlIDO
) 4 4 4-
/
Select Slot, Range, Global Gain, and CMDA Read Mode.
D71D6 ID51 D41D3 1021 DllDO
V
t-
Channel Select: SE (O-15), DIFF (O-7)
Channel Mode: Single-ended (l), DIFF (0)
Local Gain: Xl (0), Xl 0 (1)
ACQ Mode: 62.5kHz Auto Acquire (I), Regular Acquire (0)
Filter Mode: 1 OOkHz (0), 2kHz (1)
Figure 5. CMDA Write Format
Byte Format
CMDA Read Mode: A/D Status (0), Low Data (1)
Select Range: -1 OV fl OV (l), 0 fl OV (0)
Select Global Gain: Xl (0), X2 (l), X5 (2), X10 (3)
I
Figure 6. CMDB Write Format
SELECT CHANNEL
Location: xxx80
The SELECT CHANNE L command is used to control the local signal multiplexer on the AMMl A, thus
determining which of the local input channels is selected for A/D conversion. This command affects
only those signals connected to the AMMlA local inputs, and does not affect input channels connected
to modules located in other slots. SELECT CHANNE
SLOT command to select the channels on the AMMlA to be measured.
Note that the channel number occupies the least significant four bits of CMDA. Make sure that the channel number is combined with the appropriate upper four bits, as shown in Figure 5, before it is sent.
L must be used in conjunction with the SELECT
AMMIA-11