Tektronix products are covered by U.S. and foreign patents, issued and pending. Information in this publication
supersedes that in all previously published material. Specifications and price change privileges reserved.
TEKTRONIX and TEK are registered trademarks of Tektronix, Inc.
Contacting Tektronix
Tektronix, Inc.
14200 SW Karl Braun Drive
P.O . B o x 5 00
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USA
For product information, sales, service, and technical support:
n, OR 97077
In North America, call 1-800-833-9200.
Worl d wide , vis it www.tektronix.com to find contacts in your area.
Warranty
Tektronix warrants that this product will be free from defects in materials and workmanship for a period of one (1)
year from the date of shipment. If any such product proves defective during this warranty period, Tektronix, at its
option, either will repair the defective product without charge for parts and labor, or will provide a replacement
in exchange for the defective product. Parts, modules and replacement products used by Tektronix for warranty
work may be n
the property of Tektronix.
ew or reconditioned to like new performance. All replaced p arts, modules and products b ecome
In order to o
btain service under this warranty, Customer must notify Tektronix of the defect before the expiration of
the warranty period and make suitable arrangements for the performance of service. Customer shall be responsible
for packaging and shipping the defective product to the service center designated by Tektronix, with shipping
charges prepaid. Tektronix shall pay for the return of the product to Customer if the shipment is to a location within
the country in which the Tektronix service center is located. Customer shall be responsible for paying all shipping
charges, duties, taxes, and any other charges for products returned to any other locations.
This warranty shall not apply to any defect, failure or damage caused by improper use or improper or inadequate
maintenance and care. Tektronix shall not be obligated to furnish service under this warranty a) to repair damage
ing from attempts by personnel other than Tektronix representatives to install, repair or service the product;
result
b) to repair damage resulting from improper use or connection to incompatible equipment; c) to repair any damage
or malfunction caused by the use of non-Tektronix supplies; or d) to service a product that has been modified or
integrated with other products when the effect of such modification or integration increases the time or difficulty
of servicing the product.
THIS WARRANTY IS GIVEN BY TEKTRONIX WITH RESPECT TO THE PRODUCT IN LIEU OF ANY
OTHER WARRANTIES, EXPRESS OR IMPLIED. TEKTRONIX AND ITS VENDORS DISCLAIM ANY
IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE.
TRONIX’ RESPONSIBILITY TO REPAIR OR REPLACE DEFECTIVE PRODUCTS IS THE SOLE
TEK
AND EXCLUSIVE REMEDY PROVIDED TO TH E CUSTOMER FOR BREACH OF THIS WARRANTY.
TEKTRONIX AND ITS VENDORS WILL NOT BE LIABLE FOR ANY INDIRECT, SPECIAL, INCIDENTAL,
OR CONSEQUENTIAL DAMAGES IRRESPECTIVE OF WHETHER TEKTRONIX OR THE VENDOR HAS
ADVANCE NOTICE OF THE POSSIBILITY OF SUCH DAMAGES.
[W2 – 15AUG04]
Table of Contents
General Safety Summaryiii...................................
Review the following safety precautions to avoid injury and prevent damage to
this product or any products connected to it.
To avoid potential hazards, use this product only as specified.
Only qualified personnel should perform service procedures.
While using this product, you may need to access other parts of a larger system.
Read the safety sections of the other component manuals for warnings and
cautions related to operating the system.
ToAvoidFireor
Personal Injury
Use Proper Power Cord. Use only the power cord specified for this product and
certified for the country of use.
Connect and Disconnect Properly. Do not connect or disconnect probes or test
leads while they are connected to a voltage source.
Ground the Product. This product is grounded through the grounding conductor
of the power cord. To avoid electric shock, the grounding conductor must be
connected to earth ground. Before making connections to the input or output
terminals of the product, ensure that the product is properly grounded.
Do not apply a potential to any terminal, including the common terminal, that
exceeds the maximum rating of that terminal.
Power Disconnect. The power cord disconnects the product from the power
source. Do not block the power cord; it must remain accessible to the user at all
times.
Do Not Operate Without Covers. Do not operate this product with covers or panels
removed.
Do Not Operate With Suspected Failures. If you suspect there is damage to this
product, have it inspected by qualified service personnel.
Avoid Exposed Circuitry. Do not touch exposed connections and components
when power is present.
Use Proper Fuse. Use only the fuse type and rating specified for this product.
Do Not Operate in Wet/Damp Conditions.
Do Not Operate in an Explosive Atmosphere.
Keep Product Surfaces Clean and Dry.
Provide Proper Ventilation. Refer to the manual’s installation instructions for
details on installing the product so it has proper ventilation.
80A07 Clock Recovery User Manual
iii
General Safety Summary
Terms in this Manual
Symbols and Terms
on the Product
These terms may appear in this manual:
WARNING. Warning statements identify conditions or practices that could result
in injury or loss of life.
CAUTION. Caution statements identify conditions or practices that could result in
damage to this product or other property.
These terms may appear on the product:
HDANGER indicates an injury hazard immediately accessible as you read the
marking.
HWARNING indicates an injury hazard not immediately accessible as you
read the marking.
HCAUTION indicates a hazard to property including the product.
The following symbol(s) may appear on the product:
CAUTION
Refer to Manual
Earth Terminal
WARNING
High Voltage
Chassis Ground
Protective Ground
(Earth) Terminal
Standby
iv
80A07 Clock Recovery User Manual
Environmental Considerations
This section provides information about the environmental impact of the
product.
Product End-of-Life
Handling
Observe the following guidelines when recycling an instrument or component:
Equipment Recycling. Production of this equipment required the extraction and
use of natural resources. The equipment may contain substances that could be
harmful to the environment or human health if improperly handled at the
product’s end of life. In order to avoid release of such substances into the
environment and to reduce the use of natural resources, we encourage you to
recycle this product in an appropriate system that will ensure that most of the
materials are reused or recycled appropriately.
The symbol shown to the
left indicates that this
product complies with the
European Union’s requirements according to Directive 2002/96/EC on waste
electrical and electronic
equipment (WEEE). For
information about recycling options, check the
Support/Service section of
the Tektronix Web site
(www.tektronix.com).
Restriction of Hazardous
Substances
80A07 Clock Recovery User Manual
This product has been classified as Monitoring and Control equipment, and is
outside the scope of the 2002/95/EC RoHS Directive. This product is known to
contain lead, cadmium, and hexavalent chromium.
v
Environmental Considerations
vi
80A07 Clock Recovery User Manual
Preface
Manual Structure
This is the user manual for the 80A07 Electrical Clock Recovery instrument. The
manual covers capabilities, installation, operation, and specifications of the
instrument.
This manual is composed of the following chapters:
HGetting Started provides a brief product description and how to install your
instrument. Information about accessories to use with your product is also
found here.
HReference provides more detail on the funtions and capabilites of the
instrument.
HSpecifications lists the specifications for this instrument.
80A07 Clock Recovery User Manual
vii
Preface
viii
80A07 Clock Recovery User Manual
Getting Started
Clock Recovery
This section contains information on key features of your instrument, installing
your instrument, and getting acquainted with the controls.
Many communication standards now specify that jitter testing must be carried
out using a reference clock that has been derived from the data signal. Typical
phase lock loop (PLL) characteristics are specified in terms of the --3 dB
bandwidth of the recovery loop, the rate of rolloff of the frequency response, and
the degree of response peaking allowable.
The 80A07 measures and displays the PLL frequency response from 100 kHz to
12 MHz. The 80A07 allows full control of parameters including loop bandwidth
(LBW), peaking/damping and rolloff.
Design and test engineers can now find and lock onto signals of undefined or
unknown data rates. The engineer can recover full-rate clocks, including spread
spectrum clocks, for signals at data rates from 100 Mb/s to 12.5 Gb/s. The
engineer has full control of key parameters for variable-loop bandwidth,
peaking/damping and first and second order rolloffs, optimizing jitter tracking.
Golden PLL
Recover Clocks for
Optical Storage,
Enterprise and Telecom
Testing
Many test standards require the use of a Golden PLL (phase lock loop.) To
assure repeatability, most serial data compliance test standards specify the PLL
characteristics for jitter measurement. Each standard provides an optimum LBW
setting for clock recovery, often called the Golden PLL.
The 80A07 has been designed to provide users with flexibility and accuracy in
compliance measurements. It is ideal for optical test applications, like 4x/8x
Fibre Channel and 10G Ethernet standards, where the signal under test must be
split off and converted from optical to electrical before being fed into the clock
recovery data input. The 80A07 recovers a full-rate clock up to 12.5 Gb/s, an
important requirement for testing XFP and other 10 Gb/s MSA modules.
80A07 Clock Recovery User Manual
1
Getting Started
Key Features
The 80A07 provides a quality clock recovery solution with the following
features:
H100 Mb/s to 12.5 Gb/s continuous data rate coverage
HAccurate variable loop bandwidth from 100 kHz to 12 MHz
HAuto lock capability with LED display
HProgrammable peaking adjustment with first and second order rolloff
capability
HSelf-measured and displayed (Phase Locked Loop) PLL frequency response
HUSB control connection or stand-- alone operation via front panel
HSingle-ended or differential 50 Ω data inputs/outputs
HDC coupled data through path
HFull and divided clock outputs with selectable divide ratios
HMeasurement of clock phase deviation as a function of frequency and time
HData measurement capability
HEdge Density Measurement determines the mark density of the signal
under test
HIdeal for spread spectrum clock (SSC) applications with large frequency
excursions
HFour memory locations for saving user setups
2
80A07 Clock Recovery User Manual
Installation
Getting Started
To install the 80A07, connect the supplied AC power cord to a properly
grounded AC supply. The input voltage requirement is 100 VAC to 240 VAC at
50 Hz to 60 Hz.
Press the power button on the instrument using the front-panel On/Standby
switch.
AC power
connector
Figure 1: Installation
Electrostatic Discharge
Power
button
To prevent electrostatic damage, follow the precautions described in this manual
and in the documentation provided with any connecting instruments.
Circuitry in the instrument is very susceptible to damage from electrostatic
discharge or from overdrive signals. Be sure to only operate in a static-controlled
environment. Be sure to discharge to ground any electrostatic charge that may be
present on the center and outer connectors of cables before attaching the cables.
80A07 Clock Recovery User Manual
3
Getting Started
Know your signal source. If it is capable of delivering overvoltages, it is safer to
not depend on the signal source settings for protection, but instead use an
external attenuator that protects the input from the worst-case conditions. For
example, for a 10 V maximum source connected to a 1 V maximum input, use a
10X attenuator. Where possible, connect your cables to the signal source first,
and to the instrument second.
CAUTION. To prevent damage from electrostatic discharge, install the 50 Ω
terminations on the I/O connectors when the connectors are not in use.
T o prevent damage to the instrument, discharge to ground any electrostatic
charge that may be present on the center and outer conductors of cables before
attaching the cables to the instrument.
T o prevent damage to the instrument, do not create an ESD antenna by leaving
cables dangling off the input with the other end open.
Always use a wrist strap when making signal connections. Wear antistatic
clothing and work in a static-free workstation.
Static-Controlled
Workstation
T o prevent damage to the instrument, do not apply a signal outside the Maximum
Input Voltage Swing.
For information on creating a static-controlled workstation, consult the Electronic Industries Association document, EIA-625; Requirements for Handling
Electrostatic-Discharge-Sensitive (ESDS) Devices.
4
80A07 Clock Recovery User Manual
Getting Acquainted with Your Instrument
Getting Started
Ground for
antistatic
strap
Data input
Loop through data
output (terminate
with 50 Ω when
not in use)
Recovered clock with
programmable sub-rates
Lock button — Press to
initiate manual locking.
Lock range, min
10 MHz, max 500 MHz
Lock status indicator
Green -- locked
Amber -- locking
Red -- unable to lock
General Purpose knob:
-- Adjust settings
-- Scroll through menus
-- Push to confirm settings
Left and right
cursor buttons
Escape button — Exit
submenus and revert
to previous values
Power
on button
Enter button:
-- Scroll through menus
-- Change digits when editing
-- Select settings for adjustment
-- Confirm editing changes
Measured values
Status indicators
Figure 2: 80A07 front panel and display
Device settings
80A07 Clock Recovery User Manual
5
Getting Started
Edge Density. The instrument
measures and displays the average
edge density of the input data.
Device Settings. Nominal frequency of
the data input signal, loop bandwidth,
and peaking (up to 6 dB) are
configurable on the front panel display.
Phase Deviation. The clock extraction circuit
produces a phase difference between incoming
data and CR clock output. The phase deviation
Figure 3: 80A07 display details
AC power
connector
Figure 4: 80A07 rear panel
is displayed in % peak-peak and %RMS.
USB
Standards. 24 preprogrammed
industry standards available via the
front panel interface. Custom settings
can be programmed and saved.
Auxiliary output connectors
Input and Output
Connector Care
The input and output connectors on the front panel are highly sensitive connectors providing high-frequency signal connections. To maintain signal integrity, it
is important not to damage these connectors.
Never attach a cable to a connector if the cable has a worn or damaged connector
because you may damage the connector. When attaching or removing a cable
from the connectors, align the connectors carefully before turning the nut. Then
turn only the nut, not the cable. Use light finger pressure to make the initial
connection, then tighten the nut lightly with a wrench.
6
80A07 Clock Recovery User Manual
Setting up the 80A07
Getting Started
CAUTION. To prevent electrostatic damage to the 80A07 and other instrumentation, follow the precautions described in this manual and in the documentation
provided with any connecting instruments. (See Electrostatic Discharge starting
on page 3.)
NOTE. For best repeatability and to prolong connector life, use a torque wrench,
and tighten the connection to the range of 79-112 N⋅cm (7-10 in lb).
If the connectors receive heavy use, such as in a production environment, you
should install adapters to make connections.
After the proper connections have been made for data input and clock out, and
the instrument has been powered on, you may adjust the input settings.
NOTE. The DATA OUT PUT connectors must be terminated if not in use, or else
the reflections that result will severely degrade performance.
Current settings are displayed on the right side of the display. Use the knob or
cursor buttons to scroll through menu items. Press the knob or enter button to
select an item to adjust. Use the ESC button to back out of a menu or cancel an
adjustment. When editing a numeric setting, use the left and right cursor buttons
to move through digits and use the knob to make changes. Press the knob or
ENTER button to accept a change, or press the ESC button to cancel changes.
Many industry standards are also available from the front panel menu. After
selecting a standard, the nominal data rate, loop bandwidth and peaking settings
are entered automatically.
You can manually enter the following settings:
HNominal Data
Rate
HLock RangeThe frequency range around the nominal rate that
HBandwidthBandwidth of the recovery loop measured at
Nominal rate of the recovered clock.
will be scanned during locking.
-- 3 d B .
80A07 Clock Recovery User Manual
HPeakingPeaking of the recovery loop. Also sets 1st or 2nd
order roll-off of untracked jitter.
HNominal Edge
Density
Expected edge density of incoming data.
Required to set bandwidth correctly.
7
Getting Started
HEdge Density ModeSets bandwidth. Calculations are based on the
Expected Edge Density (user entered) or edge
density measured during lock.
HClock AmplitudeOutput amplitude of the full-rate clock.
HSub-rate AmplitudeOutput amplitude of the sub-rate clock.
HSub-rate DivisionDivision ratio of the sub-rate clock.
All settings are saved automatically at power off and restored at power on. You
can also save current settings to one of four Setups that can be recalled later.
The left side of the display provides several continuously updated measurements:
HFrequencyThe measured frequency of the recovered clock.
HPhase ErrorThe peak-to-peak phase error between the
incoming data and the recovered clock. This
measured value increases if jitter is present on the
input data that is not being tracked by the
recovered clock.
HPhase Error RMSThe RMS phase error between the incoming data
and the recovered clock.
HLock StateReports whether the CR is locked, unlocked, or in
the process of locking.
By default, the 80A07 is configured in Auto Lock Mode, where it automatically
attempts to acquire lock if the detected Phase Error exceeds the Phase Error
Limit setting or if the recovered clock is unstable. The user may force a relock at
any time by pressing the Lock button.
You can utilize the 80A07 with a Tektronix sampling oscilloscope such as the
DSA8200 Digital Serial Analyzer, to display the data input. Use the clock output
to trigger the oscilloscope. Figure 5 shows a typical setup configuration.
Figure 5: Typical setup configuration
8
80A07 Clock Recovery User Manual
Remote Interface
Remote Control
Getting Started
The 80A07 can be remotely controlled via the virtual front panel software. The
virtual front panel software can be installed on a personal computer or a
Tektronix sampling oscilloscope. Connection to the 80A07 is made through the
USB interface. The virtual front panel software requires the Microsoft Windows
2000 or XP operating system.
The virtual front panel software is provided on the CDROM included with your
instrument. Insert the CDROM into the CDROM drive and follow the installation prompts. Refer to the user instructions on the CDROM for operation of the
virtual front panel software.
Remote control of the 80A07 is possible with the use of the Software Developer’s Kit (SDK). The SDK is available on the CDROM provided with your
instrument. Refer to the instructions provided on the CDROM for use of the
developer’s kit.
User Adjustments
The 80A07 contains no user adjustments.
80A07 Clock Recovery User Manual
9
Getting Started
Accessories
This section lists the standard and optional accessories available for the
instrument.
Standard Accessories
Optional Accessories
The following accessories are shipped with the instrument:
Table 1: Standard accessories
ItemPart number
80A07 Electrical Clock Recovery User Manual071--2195--xx
80A07 Software disc (Virtual Front Panel and software developer’s kit)063--4040--xx
Power Cord161--0104--xx
Rack mount hardware
Left bracket119--7360--xx
Right bracket119--7361--xx
Hardware bag (screws)119--7363--xx
USB cable174--4401--xx
Fuse119--7362--xx
You can order the following accessories for use with the 80A07. Consult a
current Tektronix catalog for additions, changes, and details:
Table 2: Optional accessories
ItemPart number
Cables (450 mm/18 inch; 1 dB loss @ 20 GHz) recommended for work
to 20 GHz.
SMA male 50 Ω termination015--1022--xx
Connector saver, 3.5 mm SMA015--0549--xx
SMA accessory kit020--1693--xx
10
015--0560--xx
80A07 Clock Recovery User Manual
Reference
Clock Recovery Basics
A clock recovery system is used to generate a sampling clock from a stream of
data with an embedded clock. The sampling clock is then used by the decision
circuit to determine when to decide the logic state of the incoming data. In most
cases, the data is line coded in a format referred to as “Non-Return to Zero”
(NRZ). As the name implies, the logic state in NRZ data remains constant when
the data contains a series of bits with the same value, 1 or 0.
Jitter Transfer
Loop Response Peaking
Data
Clock
The clock recovery PLL (phased lock loop) removes virtually all of the low
frequency jitter from the input data and none of the very high frequency jitter
components. Periodic jitter with frequency components near the roll slope of the
PLL loop response will be attenuated by some degree. The Jitter Transfer
Function is a plot of the attenuation of the jitter passing from the input data to
the recovered clock output as a function of frequency content.
The Jitter Transfer Function is not exactly an inverse of the PLL loop frequency
response. The slope of the jitter transfer function, as well as its peaking will
often be different that of the PLL loop response.
1
000
111
80A07 Clock Recovery User Manual
11
Reference
PLL Loop
Response
Jitter Transfer Function
(roll off varies between
20 -- 40 dB/decade)
(constant
20 dB/decade
roll off)
The parameters which determine the JTF roll off slope and peaking are the
relationship between loop bandwidth and the bit rate, and the amount of peaking
in the PLL response. Several examples of the jitter transfer function versus PLL
loop response can be seen in the next section.
Golden PLL
Edge Density
The 80A07 has the ability to measure the P LL response and the jitter transfer
function and display a plot of these to the user. This can be useful to understand
the relationship of these parameters at the particular data rate.
Many test standards require the use of a Golden PLL (phase lock loop.)
The 80A07 is an instrumentation grade clock recovery system. The PLL
parameters of clock frequency, loop bandwidth and peaking are accurately
calibrated, and adjustable by the user. This is useful in two situations — during
transmitter testing when the user wants to measure parameters in the data signal
through the channel exactly as the receiver would, and for standards compliance
testing.
Because the clock recovery system removes the low frequency jitter from the
regenerated clock, the loop parameters must be calibrated and set to known
values for repeatable jitter measurements. To assure repeatability, most serial
data compliance test standards specify the PLL characteristics for jitter measurement. A PLL which is set to these specified parameters is often referred to as a
“Golden PLL”.
The logic state of NRZ data does not change between successive bits of the same
logic state. Therefore, there will not be a logic edge in every bit time slot, or
Unit Interval. The edge density refers to the average percentage of unit intervals
which contain a transition. A repeating 1010 pattern has a transition occurring
during every unit interval, and therefore an edge density of 100%. A Pseudo
Random Bit Stream (PRBS) pattern has an edge density of 50%. Other examples
12
80A07 Clock Recovery User Manual
Reference
include a repeating 1100 pattern, which has a 50% edge density, and a repeating
11110000 pattern, which would have an edge density of 25%.
All clock recovery systems require a minimum edge density to operate properly.
If a long pattern of all ones or zeros were sent, the clock recovery would not be
able to track jitter or spread spectrum clock (SSC) modulation or may even lose
lock on the data clock. Data encoding standards eliminate this possibility by
either modulating the bit stream using a set of rules that set a minimum for the
number of consecutive bits set to the same logic state, or add overhead data bits
to the packet which guarantee transitions occur even when the payload data is bit
stream of only one logic state.
The edge density represents the amount of energy going into the clock recovery
phase lock loop. The average energy effects the parameters of loop gain and
bandwidth. Therefore, an instrumentation grade clock recovery system such as
the 80A07 requires information on the edge density to keep the loop parameter
settings calibrated. In the 80A07, this can be done by one of two methods, auto
and manual modes. In auto mode, the actual average edge density is measured
and automatically calibrates the loop parameter settings. In manual mode, the
user enters the expected edge density. A warning message is generated when the
measured edge density varies greatly from the expected edge density. Some
serial data compliance standards, such as SATA, require the loop parameters be
calibrated to a specified edge density, regardless of the edge density of the actual
data.
Clock Multiplication and
Division
To lock to NRZ data, the phase detector used in a clock recovery PLL does not
require an edge at every unit interval. This property can be utilized to multiply a
clock frequency. The PLL will lock to a frequency that is a multiple of the clock
applied to the data input.
To multiply a clock, you enter the desired output frequency as the clock
frequency. This must be an integer multiple of the input frequency. To calibrate
the loop response (for known jitter transfer performance), you also enter the
preclinical of the multiplication factor in percent as the expected edge density.
For example, for 2X multiplication, enter 50 %, for 3x enter 33 %, for 5x enter
20 % etc. The clock recovery unit will phase lock to the multiple of the input
data frequency, providing a clean multiple of the input clock at the output.
While the PLL can accept data with edges at a sub-multiple of the clock rate, it
can handle the converse -- edge rates greater than one per unit interval (corresponding to edge densities greater than 100%). Thus, the PLL itself can not be
used directly to divide a clock to a lower multiple.
The 80A07 provides an additional Sub-Rate Clock output which is divided to a
sub multiple of the main clock output. The 80A07 utilizes a user programmable
divider for this purpose. The divider is specifically designed to minimize the
addition of jitter to the recovered clock signal. This sub-rate clock output can be
used to precisely divide a clock down to a sub multiple frequency. The 80A07
80A07 Clock Recovery User Manual
13
Reference
User Interface
provides a large s election of division ratios, ranging from 1 to 648. To use the
clock recovery instrument as a precision clock divider, you would set the clock
frequency to the actual input frequency and the edge density to 100%. Then,
select the desired division ratio for the SUBRATE CLOCK output.
Note that because the divider circuits are located outside of the PLL, the
calibrated loop characteristics and jitter transfer function will scale in frequency
by the sub-rate divisor.
The 80A07 can be used in standalone operation or in conjunction with a
Tektronix sampling oscilloscope.
As a standalone instrument, information is always immediately available on the
front panel display, showing parameters such as the PLL bandwidth, lock status,
bit rate, peaking and rolloff.
For easy verification of compliance, the correct characteristics are automatically
set when a given standard is selected from a pull-down menu. However, full
control of parameters is possible with direct entry of the user parameters. The
80A07 has variable jitter peaking, allowing jitter gain in excess of 10 dB if
desired.
Standards Coverage
Remote control of the instrument is supported via USB and a software developer’s kit.
The 80A07 instrument provides a solution for triggering a DSA8200, CSA8000,
and TDS8000 Series instruments from single-ended or differential electrical
signals. The 80A07 can be used as a standalone clock recovery device or in
conjunction with the following Tektronix sampling oscilloscopes:
HDSA8200 Digital Serial Analyzer
HCSA8000, CSA8000B, and CSA8200 Communications Signal Analyzer
(With product software version 2.0 or later)
HTDS8000, TDS8000B, and TDS8200 Digital Sampling Oscilloscope
(With product software version 2.0 or later)
The following graphics show compliance settings, and the accompanying table
(Table 3) show common standards, the data rates they employ, and the loop
bandwidths required for compliance measurements.
14
80A07 Clock Recovery User Manual
Reference
L
R
(
dB)
0
-- 1 0
eponse
-- 2 0
oop
-- 3 0
-- 4 0
100kHz 1MHz 10MHz 100MHz
10kHz
10 Gigabit Ethernet
Bit Rate: 10.3125 Gb/s
Loop Bandwidth: 4 MHz
Peaking: 0 dB
Blue trace: Jitter Transfer Function (roll
off varies between 20 -- 40 dB/decade)
Red trace: PLL Loop Response
(constant 20 dB/decade roll off)
Legend
XAUI
Bit Rate: 3.125 Gb/s
Loop Bandwidth: 1.875 MHz
Peaking: 0 dB
2x Fibre Channel
Bit Rate: 2.12 Gb/s
Loop Bandwidth: 1.275 MHz
Peaking: 0.3 dB max
4x Fibre Channel
Bit Rate: 4.25 Gb/s
Loop Bandwidth: 2.55 MHz
Peaking: 0.3 dB max
8x Fibre Channel
Bit Rate: 8.5 Gb/s
Loop Bandwidth: 5.1 MHz
Peaking: 0.3 dB max
OIF CEI 11G+
Bit Rate: 11.0 Gb/s
Loop Bandwidth: 8 MHz
Peaking: 0.1 dB max
SONET OC --192/SDH STM--64
Bit Rate: 9.95 Gb/s
Loop Bandwidth: 4 MHz
Peaking: 0 dB
8x OIF CEI 6G+
Bit Rate: 6.25 Gb/s
Loop Bandwidth: 3.6 MHz
Peaking: 0.1 dB max
Serial ATA Gen 2 f
Bit Rate: 3.0 Gb/s
baud
/500
Loop Bandwidth: 6 MHz
Peaking: 2.1 dB
XFP/XFI
Bit Rate: 10.5 Gb/s
Loop Bandwidth: 8 MHz
Peaking: 0.1 dB max
OIF CEI 11G+
Bit Rate: 11.0 Gb/s
Loop Bandwidth: 4 MHz
Peaking: 0.1 dB max
Serial ATA Gen 2 f
Bit Rate: 3.0 Gb/s
baud
/1667
Loop Bandwidth: 0.9 MHz
Peaking: 0 dB
Fully Buffered DIMM II
Bit Rate: 6.4 Gb/s
Loop Bandwidth: 11 MHz
Peaking: 0.5 dB
OIF CEI 11G+
Bit Rate: 11.0 Gb/s
Loop Bandwidth: 6 MHz
Peaking: 0.1 dB max
SONET OC --48/SDH STM--16
Bit Rate: 2.488 Gb/s
Loop Bandwidth: 1 MHz
Peaking: 0 dB
PCI Express II
Bit Rate: 5.0 Gb/s
Loop Bandwidth: 5 MHz
Peaking: 1 dB max
80A07 Clock Recovery User Manual
15
Reference
/
/
/
y
DIM
M
FullSSCsw
i
Table 3: Standards supported
Standard
Data Rate
(Gb/s)
Common
Clock Divide
Ratios
Loop
Bandwidth
(MHz)
Peaking
(dB)
Slope
Spread Spectrum
Clocking
Ethernet1.00.637
10Gb/s Ethernet
Transmitter Test
10.312≤4--20 dB/
decade
No
XAUI3.1251.875
Fibre1X1.063100.6380.3 max--20 dB/No
Channel
2X
2.12201.2750.3 max
decade
4X4.25402.5500.3 max
8X8.5805.1000.3 max
OIF CEI
1
6+Gb/s4.976 to
6.375
3.6
(f
baud
/1667)
0.1 max--20 dB/
decade
No
11+Gb/s9.95 to 11.18, ITU
6(f
/1667)
baud
other
2
SATA
Gen 1250UI1.5156.000Yes
f
/16670.9002.09 --
baud
Type 2
1.25 dB
5UI300.000
Gen 2f
/5003306.0002.09 --
baud
Type 2
1.25 dB
f
/16671.8002.09 --
baud
Type 2
1.25 dB
f
/10300.0002.09 --
baud
Type 2
1.25 dB
SONET/OC12/STM-40.6220.250--20 dB/No
SDH
OC48/STM-162.4881.000
decade
OC192/STM-649.954.000
XFP/XFIXFP/XFI Receiver
9.95 -- 11.2648.0000.1 maxNo
Tes t
Transmitter
Tes t
4.0000.1 max--20 dB/
decade
FullyFB-DIMM13.2, 4.02411 t o 330.5to32nd OrderYes.
Buffered
4.82411 t o 22
FB-DIMM24.8, 6.4, 8.0,
9.6
Forwarded
Clock
11 t o 220.5to2
Transmitter Test:
Receiver Test: 0.06
UI swing.
ng.
16
80A07 Clock Recovery User Manual
Table 3: Standards supported (cont.)
ppp
g
Reference
Loop
Bandwidth
(MHz)
8to16
Peaking
(dB)
Upto1dB
Upto3dB
Slope
--20 dB/
decade
1st or 2nd
order
Spread Spectrum
Clocking
Yes, Optional.
Receiver Test:
65 ps pk-pk swing
Standard
PCI
Express
3
SAS
Common
Data Rate
(Gb/s)
Clock Divide
Ratios
I2.5251.5001st order with
II5505to16
Gen 1f
/16671.5150.9001st order
baud
(single pole)
Gen 2f
/16673301.8001st order
baud
(single pole)
1
8 MHz for most tests for ITU applications, BW/1667 other. Minimum of 4 M Hz for stress testing in one case.
2
Gen 1 & 2 categories: “i” (internal, hard drives etc.) and “m” (medium reach) use f
baud
/500 and f
/10 for Gen 2 and
baud
250UI and 5UI for Gen 1.
“x” (extended reach) uses f
/1667, Type 2.
baud
Peaking bandwidths Implied: specified as damping factor of 0.707 min to 1.00 max — conversion taken from Gardner.
Loop bandwidths specified with transition density of 1 (100% or 1010101 pattern). Assumption is that loop bandwidth will
change proportionally as transition density reduces.
3
Specified as damping factor of 0.707 min to 1.00 max — conversion taken from Gardner.
Loop bandwidths specified with transition density of 1 (100% or 1010101 pattern). Assumption is that loop bandwidth will
change proportionally as transition density reduces.
80A07 Clock Recovery User Manual
17
Reference
14
Loop
Bandwidth
(MHz)
12
10
8
6
4
3
2
1.5
1
0
The 80A07 has a variable loop bandwidth from 100 kHz to 12 MHz. The calibrated loop bandwidth is limited as
indicated by the graph.
6
12
Figure 6: Clock recovery loop bandwidth versus data rate
Date Rate (Gb/s)
12
121086420
14
18
80A07 Clock Recovery User Manual
Specifications
Electrical Sampling Modules
This section contains specifications for the 80A07 Electrical Clock Recovery
instrument.
To meet specifications, two conditions must first be met:
HThe instrument must have been operating continuously for 20 minutes within
the operating temperature range specified.
HThe instrument must be in an environment with temperature, altitude, and
humidity within the operating limits described in these specifications
Table 4: Characteristics
SpecificationsCharacteristics
Data inputs / outputs
Input configurationTrue differential
Output configurationTrue differential
Specifications
Unused outputs must be termi nated into 50 Ω.
Connector typeAPC 3.5
Impedance50 Ω
CouplingDC
Insertion loss--2.6 dB or better
10 MHz to 12.5 GHz
Maximum nondestruct range5V
Maximum operating range5V
Input sensitivity
Single ended30 m Vppat 10 Gbps
Differential15 mVppat 10 Gbps
Clock output
Connector typeAPC 3.5
Impedance50 Ω
CouplingDC
Amplitude
Minimum300 mV
Typical540 mV
pk-pk
pk-pk
pp
pp
80A07 Clock Recovery User Manual
19
Specifications
Table 4: Characteristics (cont.)
SpecificationsCharacteristics
Amplitude accuracy10% or 30 mV
Duty cycle accuracy3% UI
JitterRMS, at 800 mVppinput, 10 Gps, 1010 pattern, 2 MHz BW, 0.5 dB peaking