TDK Semiconductor Corporation 502BXXA64CGT Datasheet

1

AVPro® 5002B

Dual SCART A/V Switch

August 2000

DESCRIPTION

The AVPro® 5002B device is an audio/video
switching IC that supports an input/output port, an
input only port, and an output only port. The device
includes multiplexers that allow the inputs to be
routed to the outputs in various configurations.
Additional outputs are provided to drive an external
RF modulator. The video outputs of the multiplexers
are buffered to drive 137ohm loads. The audio
outputs are buffered to provide 2 Vrms output into
600 ohms. The 5002B has features optimized for
BSkyB satellite receiver applications, but it can also
be used in other applications that require control of
multiple audio and video sources.

FEATURES

• Two SCART connections (Auxiliary, TV)

• Video section

- Integrated output drivers

- RGB, SVHS, composite outputs

- Programmable RGB gain

• Audio section

- 5-bit audio attenuation, 0 to -31 dB

- Auxiliary tone inputs to support BSkyB

- Ground based outputs (no AC coupling caps)

• Serial port control of switching I2C bus

• 64-lead LQFP package

BLOCK DIAGRAM

Aux_Lin

Rin

Lin

Aux_Rin

Aux_Rout

Aux_Lout

SCLK

SDATA

Enc_B

Enc_G

Enc_R

Aux_YCout

Aux_B

Aux_G

Aux_YC

TV_B

TV_G

TV_R

TV_YCout

EBLANK

ABLANK

BLANK

GND

Enc_YC

DO_1

DO_0

Aux_Cout

Aux_R

Mod_YC

+5VDC

Rbias

Vref

Support
Circuits

Tgen

-5VDC

Enc_C

Enc_Y

Audio1

TV_Fnc

-5VDC

+12VDC

Rout
Lout
TV_Rout
TV_Lout

Mod_mono

+5VDC

+5VDC

+5VDC

-5VDC

Mux

Mux

Audio2

Serial

Port

GND

GND

GND

Volume
Control

Other I/O

Aux_Fnc

AVPro® 5002B
Dual SCART A/V Switch

2

FUNCTIONAL DESCRIPTION

The 5002B is an audio/video switching device. The
device integrates both audio and video drivers so
that it can directly drive the SCART interface. The
use of a -5 volt supply eliminates the need for AC
coupling capacitors on the audio outputs. All
programmable functions of the device are controlled
through a standard I2C serial interface and a set of
internal registers. This device will interface to an
external video encoder that provides six video
outputs. In addition, the 5002B includes two
programmable digital outputs and inputs for the TV
SCART audio /video.

SCART VIDEO SWITCHING

The device is designed to accept video signals from
an auxiliary SCART connector, TV SCART
connector, and an external video encoder/DAC
device. The device includes a set of analog
multiplexers that receive video signals from these
sources and allows routing of the signals to the
various video outputs. The video output drivers have
a nominal gain of 1.83 V/V to allow for a series
resistance of 62 ohms prior to the 75 ohm
termination. A block diagram of the video switching
function is provided in Figure 1. Details of the
register settings are provided in the section titled
“Serial Port Register Tables”.

Figure 1: 5002B Video switching block diagram

Enc_B

Enc_G

Enc_R

Aux_YCout

Aux_B

Aux_G

Aux_YC

TV_B

TV_G

TV_R

TV_YCout

EBLANK

ABLANK BLANK

Enc_YC

Aux_Cout

Aux_R

Mod_YC

Enc_C

Enc_Y

TV_Fnc

Mux

VGenAux_Fnc Comparator

0V

2V

Mux
Mux

Mux

Mux

Mux

Mux

Gain

Mux

AVPro® 5002B

Dual SCART A/V Switch

3

TV RGB OUTPUTS

The device accepts RGB video signals from two
sources. The Aux_R, Aux_G, Aux_B input pins are

typically connected to the auxiliary SCART
connector. The Enc_R, Enc_G, Enc_B input pins are
connected to the RGB outputs of an external video
encoder device. These outputs are used as a video
source for the TV SCART pins TV_R, TV_G, and
TV_B. The RGB video source is selected by setting
the lower three (3) bits of serial port Register 1.
When these bits are set to xxxxxx00, the RGB
source will be the encoder. When these bits are set
to xxxxxx01, the source will be the auxiliary port.

RGB Gain: The gain of the RGB outputs can be
adjusted to one of four different levels. Bits 4 and 5
in Register 2 set the gain of the RGB output

amplifiers according to the following table:

Bit 5 Bit 4 RGB Amplifier Gain

0

0
1
1

0

1
0
1

Gain = 1.83V/V = A

0

Gain = A0 - 10%
Gain = A0 - 20%
Gain = A0 - 30%

DC Restore: The device will generate a DC restore
level on each video output based on timing
referenced to a horizontal sync pulse. When the
sync pulse is detected, the DC restore circuit will act
to position the blank level to 0.6 V at the respective
video output load. The device can be programmed
to look for the horizontal sync pulse on all of the
RGB input pins or on the associated composite
video input pin (Aux_YC for the auxiliary port or
Enc_YC for the external encoder). Bit 7 of Register 1
determines the horizontal sync source. At power-up,
this bit defaults to a low (0) state which programs the
device to look for a sync detect on the RGB input
signals. In this mode, the device can detect a
horizontal sync on any of the three RGB input
signals. When Bit 7 is set to a high (1) state, the
device will look for a sync detect from the signal on
either the Aux_YC or Enc_YC pin depending on
which source is selected.

Blanking: The signal on the Blank output pin is
determined by the state of two MSBs in Register 2
according to the following table:

Bit 7 Bit 6 Blank source

0

0
1
1

0

1
0
1

BLANK = ABLANK

BLANK = EBLANK
BLANK = 0V
BLANK = 4V @ IC output pin

The user must insure that the source of the Blank
output is the same as the source for the RGB
outputs, i.e.ABLANK is selected when the auxiliary
RGB is active and EBLANK is selected when the
encoder RGB is active.

TV COMPOSITE OUTPUT

The device provides inputs for two composite video
sources that can be switched to the TV SCART
composite video pin, TV_YCout. The AUX_YC input
pin is typically connected to the “Video In” pin on the
auxiliary SCART connector. The Enc_YC input pin is
typically connected to the “YC” or “CVBS” output
from the external video encoder device. Selection of
the video source for the TV composite output is
accomplished when the RGB video source is
selected (see the register tables).

TV SVHS OUTPUT MODE

The device supports SVHS video format. The SVHS
mode is selected for the TV SCART using the lower
three (3) bits of Register 1. When the SVHS mode is
selected, the TV_YCout pin will provide the luminance
signal output from the selected source. The chroma
output will be provided on the TV_R pin. The video
source for SVHS mode can be either the auxiliary port
or the encoder port. When the auxiliary port is
selected as the video source, the video on Aux_R will
be provided at the TV_R output pin and the Aux_YC
video will be provided at the TV_YCout pin.

The device will support SVHS mode for three
encoder interface formats. The first encoder
interface format accepts chroma signals on the
Enc_C pin and luma signals on the Enc_Y pin for
the "SVHS, Enc 1" mode. The second format will
receive chroma information on the Enc_B pin and
luma information on Enc_G. This format is
designated "SVHS, Enc 2". The third format will
receive chroma information from the Enc_R pin and
luma information from the Enc_G pin. This mode is
designated “SVHS, Enc 3”.

When the SVHS mode is selected, the DC restore
on the TV_R pin will average to approximately 1.68
VDC at the output pin. The DC restore circuit will act
to position the blank level to 0.6 V at the TV_YCout
video output load. The TV_G and TV_B outputs will
be set to 0 VDC when the SVHS mode is active.

RF MODULATOR OUTPUT

The device provides an output, Mod_YC, to drive an
external RF modulator. This output is driven by the
Enc_YC input at all times.

AVPro® 5002B
Dual SCART A/V Switch

TV VIDEO MUTE

All TV video outputs can be simultaneously disabled
by programming the lower three (3) bits in Register 1.
The power-up default condition is xxxxx111, which
sets all TV video outputs to 0 VDC and switches the
TV audio outputs to Aux_Lin/Aux_Rin. Setting these
bits to xxxxx110 will also mute the TV video outputs
and switch the TV audio outputs to Lin/Rin.

AUXILIARY COMPOSITE OUTPUT

The auxiliary port includes a composite video output
pin (AUX_YCout ) that is typically connected to the
“Video Out” pin on an auxiliary SCART connector.
Bits 3-5 in Register 1 determine the source for the
AUX_YCout pin. When these bits are set to
xx000xxx, the video source will be the Enc_B input.
When these bits are set to xx001xxx, the video
source will be the Enc_YC input.

AUXILIARY SVHS OUTPUT MODE

The device also includes an output pin (Aux_Cout )
that provides a chroma output to Pin 15 (RED) on
the auxiliary SCART connector. When connected
with the Aux_R pin, this forms a bi-directional port as
shown in the following diagram:

Using this configuration, the device will support SVHS
mode for three encoder interface formats. The first
encoder interface format will receive chroma
information from the Enc_C pin and luma information
from the Enc_Y pin. This format is designated “SVHS,
Enc 1”. The second format will receive chroma
information on the Enc_B input and luma information
on Enc_G. This format is designated "SVHS, Enc 2".
The third format will receive chroma information from
the Enc_R pin and luma information from the Enc_G
pin. This mode is designated “SVHS, Enc 3” on the
serial port register table.

When the SVHS mode is selected, the DC restore on
the Aux_Cout pin will average to approximately 0.9

VDC at the video output load. The DC restore on the
Aux_YCout pin will set the blank level to 0.6 V at the
video output load.

AUXILIARY VIDEO MUTE

All auxiliary video outputs can be simultaneously
disabled by programming Bits 3-5 in Register 1. The
power-up default condition is xx111xxx, which sets all
auxiliary video outputs to 0 VDC and switches the
auxiliary audio outputs to Lin/Rin. Setting these bits to
xx110xxx will also mute the auxiliary video outputs.

FUNCTION SWITCHING

The device provides functions switching pins for
both the auxiliary (Aux_Fnc ) and TV (TV_Fnc)
SCART ports. Both of these pins are bi-directional.
The direction of the pins is determined by setting bits
in Register 2 according to the following table:

Bits Aux_Fnc TV_Fnc
xxxx00xx output output
xxxx01xx output input
xxxx10xx input output
xxxx11xx Passthru I/O Passthru O/I

For the case where Register 2 is set to xxxx11xx,
the input signal on the Aux_Fnc pin is passed
directly through to the TV_Fnc pin as an output, or
vice versa. This mode is useful for supporting a
system power down mode where all signals from the
auxiliary port are passed directly through to the TV
port.

When a function pin is set as an input, the voltage
on that pin is applied to an internal comparitor. The
comparitor sense the voltage on the input pin and
sets the two (2) LSBs in the read register according

to the following table:

Input voltage Bits Function

< 4.0 V xxxxxx00 Normal TV

4.0 to 8.0V xxxxxx01 16:9 aspect
>8.0 V xxxxxx10 Peritelevision

Mux

Aux_R

Aux_Cout

62

Auxiliary

SCART

Pin 15

Mux

AVPro® 5002B

Dual SCART A/V Switch

5

When a function pin is set as an output, the output
level for the pin is determined by the state of the two
LSBs Register 2, according to the following table:

Bits Output voltage Function
xxxxxx00 ~0 V Normal TV
xxxxxx01 ~6 V 16:9 aspect
xxxxxx10 ~ 11 V Peritelevision
xxxxxx11 ~ 11 V Peritelevision

The function output circuit includes short circuit
protection. When a function pin is in the 6V or 11V
output mode, if the SCART connection is shorted to
ground, then the output is disabled. Likewise, when
a function pin is in the 0V output mode, if the
SCART connection is connected to a voltage
source, then the output is disabled. The load for the
function outputs is designed to be 10k or higher.

Note that both the Aux_Fnc pin and the TV_Fnc pin
can be set as outputs simultaneously, however they
will have the same output voltage.

Figure 2: 5002B Audio Switching Block Diagram

Aux_Rin

Aux_Lout

A

B

Mux

Aux_RoutMux

Mux

Mux

Aux_Lin

Lin

Rin

Audio1
Audio2

A

Attenuator: A = 0 or 20 dB attenuation
Volume Control: B = 0 to 31 dB attenuation

Lout

TV_Lout

Mux

Mux

A

B

Mux

Mux

TV_Rout

Rout

Mod_Mono

A

Mux

Mux

Mux

Mux

Mux

AVPro® 5002B
Dual SCART A/V Switch

SCART AUDIO SWITCHING

The audio inputs are considered to be associated
with the respective video inputs. As a result, the
video selection determines which audio signals will
be switched to a given SCART output. Refer to the
serial port register table for more information. Also
see the audio switching block diagram shown in
Figure 2.

The 5002B provides inputs for the auxiliary audio
source (Aux_Lin/Aux_Rin) and the stereo DAC
associated with the video encoder inputs (Lin/ Rin).

TV AUDIO OPERATION

The audio source for the TV port is selected in
concert with the video source using the three (3)
LSBs of Register 1. The selected audio signals are
input to internal multiplexers that allow the user to
select between mono and stereo output options. Bits
4 and 5 of Register 3 control the stereo/mono
selection according to the following table:

Bit 5 Bit 4 TV_Lout source TV_Rout source

0 0 left input right input

0 1 left + right left + right
1 0 left input left input
1 1 right input right input

At power-up, these bits default to 00 putting the
device in the stereo mode. The outputs of these
multiplexers are then passed through a pair of
programmable attenuators that are controlled by the
two (2) MSBs of Register 4. These register bits
provide the following control of the left and right
audio channels:

Bit 7 Bit 6 Left and right channel levels

0 0 attenuation = 0 dB

0 1 attenuation = 20 dB
1 x Both channels disabled

The output of these attenuators are then summed
with an audio signal created by summing two
additional audio inputs. These additional audio
inputs are labeled Audio1 and Audio2 on the block
diagram. The purpose of these pins is to allow
externally generated tones to be mixed with the TV
audio signal source.

The state of these two inputs is controlled by Bits 3­5 of Register 4. At power-up reset, Bit 3 is set to a
high level (1) which disables the Audio1 input.
Setting this bit low (0) enables the input. The Audio2
input passes through a programmable attenuator
prior to being summed with the Audio1 input. Bits 4

and 5 of Register 4 control the level of Audio2
according to the following table:

Bit 5 Bit 4 Audio2 Mode

0 0 Audio 2 level = 0 dB attenuation
0 1 Audio 2 level = 20 dB attenuation

1 x Audio 2 input disabled

At power-up, Bits 4 and 5 are set high (11) so that
the input is disabled. The sum of the Audio1 and

Audio2 signals is then internally summed with each
of the left and right TV audio signals.

Volume Control: The resulting left and right TV
audio channels are then passed through a volume

control circuit. The lower 6-bits in serial port Register
0 set a programmable attenuation level. The
attenuation is linear at 1 dB per step with a setting of
xx000000 producing 0 dB attenuation and a setting
of xx011111 producing 31 dB of attenuation.

TV SCART Audio Outputs: The first pair of signals
is labeled TV_Lout and TV_Rout on the block

diagram. TV_Lout and TV_Rout are typically used to
drive the TV SCART audio pins. These outputs also
have an internal multiplexer that allows the user to
select TV audio either before or after the internal
volume control function. When Bit 0 in Register 4 is
set low (0), the volume control is used. When this bit
is set high (1), the volume control is bypassed. The
power-up default state is volume control active.

TV Audio Line Outputs: The second pair of signals
is labeled Lout and Rout on the block diagram. Lout

and Rout are standard line outputs. The Lout/Rout
outputs have an internal multiplexer that allows the
user to select TV audio either before or after the
internal volume control function. When Bit 1 in
Register 4 is set low (0), the volume control is used.
When this bit is set high (1), the volume control is
bypassed. The power-up default state is volume
control active.

RF Mono Output: The Lin and Rin input signals are
summed internally to generate a mono audio signal
for an external RF modulator. This output is labeled
Mod_mono. This mono signal can also be mixed
with the Audio1 and Audio2. The switching of the
Audio1 and Audio2 signals on this pin is controlled
by the same bits that control the TV audio outputs.
The internal summing circuit is before the volume
control mux so the Mod_mono output level cannot
be adjusted.

AVPro® 5002B

Dual SCART A/V Switch

7

TV Audio Mute: A mute function is provided for all
TV audio outputs. The mute function is controlled by
setting Bit 6 in Register 0. When this bit is set to a
high state(1), all TV audio outputs are attenuated to
at least -60 dB. This will be the default condition at
power-up. When the bit is set to a low state(0), the
audio path will be in normal operating mode. This bit
can be set independent of the volume control such
that the outputs can be muted before any change in
volume, or any switching of audio sources.

AUXILIARY AUDIO OPERATION

The auxiliary port includes stereo audio outputs for a
SCART connector (Aux_Lout, Aux_Rout). The audio
inputs Lin and Rin are the only sources that can be
switched to the auxiliary audio outputs for the 5002B
device. The audio inputs are switched in concert
with the associated video inputs according to Bits 3-

5 in Register 1.
Internal multiplexers allow the Aux_Lout and

Aux_Rout outputs to be configured into either stereo
or mono audio outputs. The two MSBs of Register 3
control the stereo/mono selection according to the
following table:

Bit 7 Bit 6 Aux_Lout

source

Aux_Rout

source

0 0 Lin Rin

0 1 Lin+Rin Lin+Rin
1 0 Lin Lin
1 1 Rin Rin

At power-up, these bits default to 00 putting the
device in the stereo mode.

The auxiliary audio outputs can be muted by setting
the MSB in Register 0. This bit is set high(1) at
power-up causing the outputs to be muted. Setting
this bit low(0) enables all auxiliary audio outputs.

DIGITAL OUTPUTS

The 5002B provides two programmable digital
outputs, DO_0 and DO_1. These pins are general
purpose outputs programmed by setting Bit 0 and 1
in Register 3. Setting the register bits to 0 puts these
outputs in the logic low state. Setting the register bits
to 1 puts the outputs in the logic high state. Internal
pull-up resistors (approximately 30k) are included
on these pins.

SERIAL PORT DEFINITION

Internal functions of the device are monitored and
controlled by a standard inter-IC (I2C)bus. The serial
port operates in a slave mode only and can be
written to or read from. The default address of the
device is 1001000x.

DATA TRANSFERS

A data transfer starts when the SDATA pin is driven
from HIGH to LOW by the bus master while the
SCLK pin is HIGH. On the following eight clock
cycles, the device receives the data on the SDATA
pin and decodes that data to determine if a valid
address has been received. The first seven bits of
information are the address with the eighth bit
indicating whether the cycle is a read (bit is HIGH) or
a write (bit is LOW). If the address is valid for this
device, on the falling SCLK edge of the eighth bit of
data, the device will drive the SDATA pin low and
hold it LOW until the next rising edge of the SCLK
pin to acknowledge the address transfer. The device
will continue to transmit or receive data until the bus
master has issued a stop by driving the SDATA pin
from LOW to HIGH while the SCLK pin is held HIGH

Write Operation: When the read/write bit (bit 8) is
LOW and a valid address is decoded, the device will
receive data from the SDATA pin. The device will
continue to latch data into the registers until a stop
condition is detected. The device generates an
acknowledge after each byte of data written.

Read Operation: When the read/write bit (bit 8) is
HIGH and a valid address is decoded, the device will
transmit the data from the internal register on the
following eight SCLK cycles. Following the transfer
of the register data and the acknowledge from the
master, the device will release the data bus.

Reset: At power-up the serial port defaults to the
states indicated in boldface type. The device also

responds to the system level reset that is transmitted
through the serial port. When the master sends the
address 00000000 followed by the data 00000110,
the device resets to the default condition. The
device also generates an acknowledge.