T-CON T315HW02-V3 Schematic

5

X-BACK/Right

G1

G2

T1_RVP4

T1_RVN4

T1_RVP5

T1_RVN5

T1_RVP6

XDIOBXVCC

XSTB

XVCC

U_DB

YDIODYDIOD

YOEYOE

YDIOUYDIOU

M_VCOMI2

R0021R0021

NC

DD

R0022R0022

YCLKYCLK

U_DB

XPOL

VGHC

VGL

VCOMF

VCOMF2

XAVDD

Close to J4

VGMA21

VGMA22

VGMA8

VGMA6

VGMA11

VGMA13

VGMA17

VGMA2

VGMA4

VGMA1

VGMA15

VGMA12

VGMA19

VGMA10

Close to J4

VCOMF

VCOMF

VGMA[1..22]

R0064R0064

R0037R0037

M_VCOMI2

R0038R0038

NC

R0036R0036

NC

R0063R0063

NC

01.Gamma

CC

BB

AN0AN0

1

RXINAN0

CN0CN0

1

RXINCN0

BN0BN0

1

RXINBN0

DN0DN0

1

RXINDN0

AA

TP2010TP2010

1

PI_ODD_RIN0N

TP1996TP1996

1

PI_EVEN_RIN0N

AN1AN1

AP0AP0

PAD

1

RXINAP0

CP0CP0

PAD

1

RXINCP0

BP0BP0

PAD

1

RXINBP0

DP0DP0

PAD

1

RXINDP0

TP2009TP2009

PAD

PAD

1

PI_ODD_RIN0P

TP1995TP1995

PAD

PAD

1

PI_EVEN_RIN0P

AP1AP1

PAD

PAD

1

1

RXINAN1

RXINAP1

CP1CP1

CN1CN1

PAD

PAD

1

1

RXINCN1

RXINCP1

BP1BP1

BN1BN1

PAD

PAD

1

1

RXINBN1

RXINBP1

DP1DP1

DN1DN1

PAD

PAD

1

1

RXINDN1

RXINDP1

TP2002TP2002

TP2008TP2008

TP2007TP2007

PAD

PAD

1

1

PI_ODD_RIN1N

PI_ODD_RIN1P

TP1988TP1988

TP1985TP1985

TP1986TP1986

PAD

PAD

1

1

PI_EVEN_RIN1N

PI_EVEN_RIN1P

VCOMF

VCOMF2

VGMA[1..22]

GND

AVDD

SCL_GA

SDA_GA

V3D3

V3D3

SCL_GA

SDA_G A

1

R0091R0091

AVDD

VGL

AVDD

HAVDD

PANEL_VCC

GND

AP2AP2

AN2AN2

PAD

1

RXINAN2

CN2CN2

PAD

1

RXINCN2

BN2BN2

PAD

1

RXINBN2

DN2DN2

PAD

1

RXINDN2

TP2001TP2001

PAD

1

1

PI_ODD_RIN2N

PI_ODD_RIN2P

TP1987TP1987

PAD

1

1

PI_EVEN_RIN2N

PI_EVEN_RIN2P

CLKANCLKAN

PAD

PAD

1

RXINAP2

CP2CP2

CLKCNCLKCN

PAD

PAD

1

RXINCP2

CLKBNCLKBN

BP2BP2

PAD

PAD

1

RXINBP2

DP2DP2

CLKDNCLKDN

PAD

PAD

1

RXINDP2

TP2005TP2005

TP2006TP2006

PAD

PAD

PAD

1

1

PI_ODD_RINCLKN

PI_ODD_RINCLKP

TP1992TP1992

TP1991TP1991

PAD

PAD

PAD

1

1

PI_EVEN_RINCLKN

PI_EVEN_RINCLKP

5

1

R0092R0092

NCNC

SCL_I

SDA_I

VGLVGL

VGHCVGHC

YV1CYV1C

YV1C

VGHC

V3D3
V1D2

PANEL_VCC

CLKAPCLKAP

PAD

PAD

1

1

RXCLKAN

RXCLKAP

CLKCPCLKCP

PAD

PAD

1

1

RXCLKCP

RXCLKCN

CLKBPCLKBP

PAD

PAD

1

1

RXCLKBN

RXCLKBP

CLKDPCLKDP

PAD

PAD

1

1

RXCLKDP

RXCLKDN

TP2004TP2004

TP2003TP2003

PAD

PAD

1

1

PI_ODD_RIN3N

PI_ODD_RIN3P

TP1989TP1989

TP1990TP1990

PAD

PAD

1

1

PI_EVEN_RIN3P

PI_EVEN_RIN3N

M_VCOMI2M_VCOMI2

Close to J3,J4

B0002B0002

AVDD

C0001C0001

SDA_GA1SDA_GA1

AN3AN3

CN3CN3

BN3BN3

DN3DN3

TP2000TP2000

TP1994TP1994

PAD
PAD

SCL_GA1SCL_GA1

PAD

1

RXINAN3

PAD

1

RXINCN3

PAD

1

RXINBN3

PAD

1

RXINDN3

PAD

1

PI_ODD_RIN4N

PAD

1

PI_EVEN_RIN4N

TP1999TP1999

1

PI_ODD_RIN4P

TP1993TP1993

1

PI_EVEN_RIN4P

B0001B0001

V3D3

C0002C0002

B0004B0004

HAVDD XHAVDD

C0003C0003

AN4AN4

AP3AP3

PAD

PAD

1

1

RXINAP3

RXINAN4

CP3CP3

CN4CN4

PAD

PAD

1

1

RXINCP3

RXINCN4

BP3BP3

BN4BN4

PAD

PAD

1

1

RXINBP3

RXINBN4

DP3DP3

DN4DN4

PAD

PAD

1

1

RXINDP3

RXINDN4

U2811U2811

U2810U2810

PAD

PAD

1

SCL

TP1978TP1978

PAD

VCOMF2

VGHC
VGL
XVCC

YDIOU
YCLK
YOEYOE
YDIOD

VCOMF2

XAVDD

C0007C0007

C0004C0004

XVCC

C0008C0008

C0005C0005

C0006C0006

C0009C0009

V3D3
V1D2

AP4AP4

PAD

1

RXINAP4

CP4CP4

PAD

1

RXINCP4

BP4BP4

PAD

1

RXINBP4

DP4DP4

PAD

1

RXINDP4

PAD

1

SDA

PAD

1

PVCC

TP2818TP2818

TP2820TP2820

TP1979TP1979

TP1982TP1982

TP2819TP2819

PAD

PAD

1

WP_E

TP2821TP2821

PAD

1

M_CHECK

PAD

PAD

1

1

1

HSYNC_F

SCL_E

LVDS_FORMAT

PAD

1

AG

T1_RVN6

T1_RVCLKN

XHAVDD

T1_RVP[4..6]

TP1981TP1981

FRC_RST

PAD

1

T1_RVCLKP

T2_RVP[4..6]

T2_RVN[4..6]

T1_RVN[4..6]

XSTBXSTB

XSTB_SXSTB_S
XPOL_SXPOL_S

YV1C_SYV1C_S

TP1983TP1983

PAD

1

SDA_E

4

J4J4

3

2

1

J3J3

X-FRONT/Left

123456789

1011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980

VGL

U_DF

YOEYOE

YDIODYDIOD

YDIOUYDIOU

YCLKYCLK

XVCC

XVCC

M_VCOMI2M_VCOMI2

R0019R0019

U_DFXVCC

R0020R0020

NC

Close to J3

1

PAD

YDIOUYDIOU

1

PAD

YCLKYCLK

1

PAD

YOEYOE

1

PAD

YDIODYDIOD

NC
NC

NC
NC

R0001R0001

V3D3

Td(sec) = R(Ω) * C(F) * 0.79
=0.022u * 5.62M * 0.79 = 97mS

GH1GH1

1

I2C_SCL

I2C_SDA

R0095R0095

R0028R0028

EDID_WP
SCL_I
SDA_I

1

PAD

SDA_ISDA_I

<Variant Name>

<Variant Name>

<Variant Name>

Model Name

Model Name

Model Name

SizeDocument NumberRev

SizeDocument NumberRev

SizeDocument NumberRev

Custom

Custom

Custom

Date:Sheet of

Date:Sheet of

Date:Sheet of

1

GH2GH2

1

GH6GH6

1

GH11GH11

GH7GH7

1

1

CIS

R14_OPR14_OP

CIS

R15_OPR15_OP

U0106U0106

8

A0

VCC

7

A1

WP

6

A2

SCL

5

GND4SDA

友達光電電視顯示器產品研發處

友達光電電視顯示器產品研發處

友達光電電視顯示器產品研發處

T315HW02 V3 Tcom MEMC Board

T315HW02 V3 Tcom MEMC Board

T315HW02 V3 Tcom MEMC Board

Top View

Top View

Top View

T315HW02 V3 Tcom\MEMC Board

T315HW02 V3 Tcom\MEMC Board

T315HW02 V3 Tcom\MEMC Board

GH3GH3

GH4GH4

1

1

GH9GH9

GH10GH10

1

1

GH5GH5

GH8GH8

1

1

SCL_I

SDA_I

R0093R0093

1
2
3

EC02

EC02

EC02

110Wednesday, October 01, 2008

110Wednesday, October 01, 2008

110Wednesday, October 01, 2008

T1_RVN[0..2]

T2_RVP0

RXINAN[0..4]

RXINAN2

SW_PVCC

T2_RVN0

R0048R0048

RXINAP2

RXINAN[0..4]

T2_RVP1

RXINAP[0..4]

RXINAP[0..4]

T2_RVN1

T2_RVP2

T2_RVN2

RXCLKAN

RXINAN[0..4]

RXINAP[0..4]

RXINAN3

RXCLKAP

RXCLKAN

C106C106

123456789

T2_RVP[0..2]

T2_RVN[0..2]

XPOLXPOL

T1_LVP[4..6]

T1_LVN[4..6]

T1_LVCLKN

T1_LVCLKP

T1_LVCLKP

T1_LVCLKN

T1_LVP[4. .6]

T1_LVN[4. .6]

RXCLKAP

R0045R0045

R0044R0044

R0049R0049

32

4

NCNC

RXINAP3

RXINAN4

RXINAP4

1

CIS

R101R101

CIS

31

R105R105

2

RN001RN001

CIS

C107C107

CIS

Q101Q101

RXINCN[0..4]

R0040R0040

R0043R0043

RXINCN1

RXINCP1

RXINCN0

RXINCP0

CISCIS

IC101IC101

1

S

2

S

3

S
G4D

CIS

R104R104

G1

G2

VGHC

VGMA6

VGMA2

VGMA4

VGMA1

R0066R0066

R0033R0033

XDIOFXVCC

XSTB

XPOL

XAVDD

XHAVDD

YDIOU

YCLK

YDIOD

R0025R0025

D0003D0003

R539_DER539_DE

R544R544

D0002D0002

V3D3 B3.3VD

NC

1

D0006D0006

C0024C0024

EDID_WPEDID_WP

VCOMF2

C0012C0012

C0013C0013

C0014C0014
C0015C0015R0018R0018

Close to U401

RSTRST

PAD

1

C0026C0026

V3D3

LVDS_FORMATLVDSORD

R0094R0094

R0010R0010

1

PAD

PAD

SCL_ISCL_I

T1_LVN2

T1_LVN1

T1_LVN0

T1_LVP2

T1_LVP1

T1_LVP0

T2_LVP4

T2_LVP5

T2_LVP6

T2_LVN4

T2_LVN5

T1_LVP4

T1_LVP5

T1_LVP6

T1_LVN4

T1_LVN5

T1_LVN6

T1_LVP[4..6]

T1_LVN[4..6]

RXCLKBN

RXCLKBP

R0058R0058R0061R0061

R0057R0057

R0062R0062

T1_LVP[0..2]

R0042R0042

T1_LVP[0..2]

RXINCP[0..4]

T1_LVN[0..2]

T1_LVN[0..2]

RXCLKCN

RXINCN[0..4]

RXINCP[0..4]

Normal / Mirror Setting Table

XPOLXPOL

XSTBXSTB

PAD

PAD

1

1

U300

YDIO_S

YCLK_S

YOE_S

YOE4_S

LVDSORD

AGBSEN

High Aging

AGBSEN

RST

NormalMirror

O
X
H

X
O
L
HL

YV1CYV1C

PAD

YDIO_S

YCLK_S
YOE_S

YOE3_S
YOE4_S

1

PAD

1

PAD

1

PAD

RST

XPOL

XSTB

YDIO_SYDIO_S

YCLK_SYCLK_S
YOE_SYOE_S

C0010C0010

C0011C0011

NC

NC

Close to U401

R0070R0070
R0071R0071

R0013R0013
R0014R0014

T2_RVN[0..2]

T2_RVCLKN
T2_RVCLKP

T2_RVN[4..6]
T2_RVP[4..6]
XSTB_M
XPOL_M

YV1C_M
V3D3
V1D2

XOUT_M

EXSCL
EXSDA

GND

04.TCON_M

RXINBN[0..4]

RXINBP[0..4]

R0060R0060

T2_RVP[0..2]

T2_RVP[0..2]

T2_RVN[0..2]

RXINBN[0..4]

RXINBP[0..4]

R0059R0059

T2_RVCLKN

1

R0023R0023

T2_RVCLKP

T2_RVP[4..6]

T2_RVN[4..6]

XSTB_M

XPOL_M

YV1C_M

YV1C

R0015R0015

V3D3
V1D2

XOUT_M

SCL_I
SDA_I

YDIOU
YDIOD
U_DF
U_DB

RXCLKCP

LVDSORD

R0039R0039

R0041R0041

R0050R0050

Close to U300

32

4

RN002RN002

RXINCN2

RXINCP3

RXINCN3

RXINCP2

RXCLKCP

RXCLKCN

RXINCP[0..4]

RXINCN[0..4]

PANEL_VCCPANEL_VCC

PAD

1

8

D

7

D

6

D

5

PANEL_VCCB12V

RXINCP4

RXINCN4

CISCIS

C111C111

1

B0005B0005

B12V V12

C0022C0022

Close to J1

C0021C0021

RXINCLKCP
RXINCLKCN
RXINCP[0..4]
RXINCN[0..4]

RXINCLKAP
RXINCLKAN
RXINAP[0..4]
RXINAN[0..4]

B12V

B3.3VD

B3.3VD
GND

12Vin112Vin1

PAD

1

F0002F0002

D0004D0004

1122334

CIS

CN2615CN2615

3

12Vin

4G1MGND1G2MGND2

J5J5

RXINBP0

RXINBP1

RXINBN2

RXINBN0

RXINBN1

PI_ODD_RIN0N

PI_ODD_RIN0P

PI_ODD_RIN1N

PI_ODD_RIN1P

PI_ODD_RIN2N

PI_O DD_RIN0 N

PI_O DD_RIN0 P

PI_O DD_RIN1 N

PI_O DD_RIN1 P

PI_O DD_RIN2 N

PI_O DD_RIN2 P

910101111121213131414151516161717181819192020212122222323242425252626272728282929303031313232

11223344556677889

RXINBP2

RXINBN[0..4]

RXINBP[0..4]

RXINBP[0..4]

RXINBN[0..4]

PI_ODD_RINCLKN

PI_ODD_RIN2P

PI_O DD_RINC LKN

32

4

RXINBN4

RXINBP4

RXCLKBP

RXINBN3

RXINBP3

RXCLKBN

PI_O DD_RINC LKP

NCNC

1

RXINCLKBP

RXINCLKBN

PI_ODD_RINCLKP

PI_EVEN_RIN0N

PI_EVEN_RIN0P

PI_EVEN_RIN1N

PI_ODD_RIN3N

PI_O DD_RIN3 N

PI_EVEN_RIN1P

PI_ODD_RIN3P

PI_ODD_RIN4N

PI_ODD_RIN4P

PI_E VEN_ RIN1P

PI_E VEN_ RIN1N

PI_E VEN_ RIN0N

PI_E VEN_ RIN0P

PI_O DD_RIN4 P

PI_O DD_RIN4 N

PI_O DD_RIN3 P

PI_E VEN_ RIN2N

T2_LVN6

T1_LVCLKN

T1_LVCLKP

T2_LVN[4..6]

T2_LVP[4..6]

T2_LVP[4..6]

T2_LVN[4..6]

RXINDN[0..4]

RXINDP[0..4]

RXINDN[0..4]

RXINDP[0..4]

R0055R0055

R0053R0053

R0056R0056

Close to U401

RN003RN003

RXINDP2

RXINDN2

RXINDN0

RXINDN1

RXINDP1

RXINDP0

RXINDN[0..4]

RXINDN[0..4]

PI_EVEN_RINCLKN

PI_EVEN_RINCLKP

PI_EVEN_RIN2N

PI_EVEN_RIN2P

PI_EVEN_RIN3N

PI_EVEN_RIN3P

PI_EVEN_RIN4N

PI_EVEN_RIN4P

PI_E VEN_ RINCLK P

PI_E VEN_ RIN4P

PI_E VEN_ RIN4N

PI_E VEN_ RINCLK N

PI_E VEN_ RIN3P

PI_E VEN_ RIN3N

PI_E VEN_ RIN2P

33333434353536363737383839394040414142424343444445454646474748484949505051

2

T2_LVP0

T2_LVN0

T2_LVCLKN

T2_LVCLKP

T2_LVP[0..2]

T2_LVN[0..2]

T1_LVP[0..2]

T1_LVN[0..2]

T2_LVCLKP

T2_LVCLKN

T2_LVP[0. .2]

T2_LVN[0. .2]

RXCLKDN

RXCLKDP

R0052R0052

R0054R0054

R0051R0051

32

4

RXINDP3

RXINDN3

RXINDN4

RXINDP4

RXCLKDN

RXINDP[0..4]

RXINDP[0..4]

WP

R2764R2764

WP_E

RXCLKDP

RXINCLKDP

RXINCLKDN

MAIN_CHECK

FRC_NRESET

LVDS_FORMAT

1

FRCBlock

HSYNC

HSYNC

MAIN_CHECK

SW_PVCC

SW_PVCC

I2C_SDA

I2C_SDA

I2C_SCL

I2C_SCL

FRC_NRESET

R0634R0634

NC

R0633R0633

NC

R0615R0615

G

R0604R0604

SCL

R2760_DER2760_DE

SDA

R2761_DER2761_DE

FRC_RST

R657R657

CIS

PVCC SW_PVCC

R2770R2770

CIS

M_CHECK MAIN_CHECK

CIS

HSYNC_F HSYNC

AG

CIS

51

G2G2G1G1G3G3G4G4G5G5G6G6G7G7G8G8G9

T2_LVN1

T2_LVN2

T2_LVP1

T2_LVP2

VGMA21

VGMA22

VGMA8

VGMA11

VGMA13

VGMA17

VGMA15

VGMA12

VGMA19

VGMA10

VGMA[1..22]VGMA[1..22]

XPOL
XSTB

XAVDDXAVDD
XHAVDDXHAVDD
VCOMF2

VGHC
VGL
XVCC

U401

R0027R0027

NC

YDIO_M

YDIO_M

YCLK_M

YCLK_M

YOE_M

YOE_M

YOE3_M

YOE3_M

YOE4_M

YOE4_M

RST

RST

LVDSORD

AGBSEN

high Aging

Path balance between U300 &U401

Path balance between U300 &U401

AGBSEN AGING

C0017C0017

C502C502

R555_DER555_DE

NC

RN004RN004

CN901CN901

CIS

MGND2

G2

MGND1

G1

4

4

3

3

2

2

1

1

R0635R0635

I2C_SCL

I2C_SDA

EDID_WP

DS

Q0602Q0602

R658R658

CIS

R656R656

CIS

SCL_E

R2765R2765
R2763R2763

R2766R2766

SDA_E

NC
NC

CIS

G9

SCL_I

CIS

SDA_I

CIS

FRC_NRESET

AGING

G10

G10

1011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980

T1_RVP0

T1_RVN0

T1_RVP1

T1_RVN1

T1_RVP2

T2_RVP4

T2_RVN4

T2_RVP5

T2_RVN5

T1_RVN[4..6]

T1_RVP[4..6]

1

PAD

1

PAD

1

PAD

XIN_S

SCL_I
SDA_I

T1_RVN2

T2_RVP6

T2_RVN6

XSTB_S
XPOL_S

YV1C_S

03.TCON_S

4

T2_RVCLKN

T2_RVCLKP

T1_RVN[0..2]

T1_RVP[0..2]

T1_RVCLKN
T1_RVCLKP

T1_RVP[0..2]

T1_RVN[4..6]
T1_RVP[4..6]
XSTB_S
XPOL_S

YV1C_S
V3D3
V1D2

XIN_S YOE3_S

EXSCL
EXSDA

GND

R0046R0046

R0047R0047

RXINAP0

RXINAP1

RXIN AN0

RXIN AN1

BD103BD103

CISCIS

C178C178

C177C177

5

DD

4

3

2

1

AUO Confidential

J4

CC

DC-DC

118080

T-CON_1(Slave)
AUO-12401 B1

U0300

1

T-CON_2(Master)
AUO-12401 B1

U0401

1

J3

GAMMA

FRC PART
[Page: FRC_IO,
FRC_DDR

I2C Connector(4Pin)

1

4

CN901

Power Connector(4Pin)

41

CN2615

BB

and FRC_POWER]

DDR

IC500

DDR

511

LVDS Connector(51Pin)

J1

AA

<Variant Name>

<Variant Name>

<Variant Name>

友達光電電視顯示器產品研發處

友達光電電視顯示器產品研發處

友達光電電視顯示器產品研發處

Model Name

Model Name

Model Name

SizeDocument NumberRev

SizeDocument NumberRev

SizeDocument NumberRev

Date:Sheet of

Date:Sheet of

Date:Sheet of

5

4

3

2

T315HW02 V3 Tcom MEMC Board

T315HW02 V3 Tcom MEMC Board

T315HW02 V3 Tcom MEMC Board

Placement

Placement

Placement

C

C

C

T315HW02 V3 Tcom\MEMC Board

T315HW02 V3 Tcom\MEMC Board

T315HW02 V3 Tcom\MEMC Board

EC02

EC02

110Wednesday, October 01, 2008

110Wednesday, October 01, 2008

110Wednesday, October 01, 2008

1

EC02

5

4

3

2

1

R0225R0225

HAVDD_F

C0267C0267

AVDDAVDD

PAD

1

V3D3V3D3

PAD

1

3.3V
1000mA(avg)/1200mA(peak)

V3D3V3D3_F

U0302U0302

VinIVout

G

C0236C0236

close pin7

R0261R0261

C0271C0271

C0268C0268

HAVDDHAVDD

R0256R0256

AVDD

V1D2_F

O

GND

7.02±0.1V

PAD

410mA(avg)/680mA(peak)

1

HAVDD

V3D3

C237C237

HAVDD

R0262R0262

C238C238

V1D2V1D2

PAD

1

GND

1.2V
1000mA(avg)

V1D2

V1D2

GND

C0213C0213

C0210C0210

D0202D0202

R0221R0221

NC

S D

Q0201Q0201

G

R0220R0220

R0212R0212

C210: AVDD and VGH delay time control

C211: VGL delay time control

C0230C0230

L0202L0202

C0264C0264

C231 put closed to Pin 20

C234C234

C0233C0233

Layout closely to pin15 and far from L202 and D202
TI65161: R204=191K; R205=110K; C235=10pF
BD8160: R204=191K; R205=110K; C235=68pF

PANEL_VCC

C0626C0626

C0231C0231

1
2
3

D0208D0208

C0214C0214

PANEL_VCC

U0208U0208

SS
BST

COMP
VIN
SW4GND

G1

G1

C0215C0215C0203C0203

R0204R0204

R0205R0205

C0270C0270

8

EN

7
6

FB

5

MAX : 3.2 mm

L0203L0203

R0257R0257

VFB=0.9V

AVDD_F

C0216C0216

C0235C0235

close pin6

R0260R0260

C0265C0265

C0217C0217

R0258R0258

15.73±0.08V
410mA(avg)/680mA(peak)

C0218C0218

R0222R0222

AVDD

R0259R0259

NC

C0266C0266

Layout closely to IC, far from D201 and L201
TI65161: R201=127K; R203=10K; C206=120pF

PANEL_VCC

DD

C0201C0201

L0201L0201

C0202C0202

D0201D0201

C0204C0204

C201, C202 put closed to L201

C0256C0256

NC

CC

R0230R0230

GND

VFLK

VDPM

1

PAD

VGHVGH

U0204U0204

10
9

CD

8
7

VD

R0249R0249

R0231R0231

Current limit R to reduce inrush
current during YV1C switch

12
G1
VGH
VGHM
SVGHM
RE

GND

GND5GND

11

6

R0227R0227

G1

1
2
3
4

NC

C0260C0260

VGH

R0252R0252

R0251R0251

R0250R0250

250mA(avg)

VGHC

BB

NC

R0228R0228

VGHM

C0259C0259

NC

R0254R0254

R0253R0253

R0255R0255

AA

R0248R0248

YV1C

C0261C0261

C0258C0258

C0275C0275

AVDD

D0207D0207

D0206D0206

NCNC

C0255C0255

R0224R0224

C0257C0257

VGL

REF

Layout closely to Pin13 and far from D203, D204, D205,D206 and D207
TI65161: R207=49.9K; R208=10K
BD8160: R207=61.2K; R208=10K

BD8160: R201=127K; R203=10.2K;C206=200pF

Vo1SW

Trace overlapping

Vo1

D0205D0205

VGL

1

PAD

VGLVGL

D0204D0204

R0223R0223

C0254C0254

R207R207

R0208R0208

Layout close to Pin14 and far from D203, D204, D205,D206 and D207
TI65161: R209=226K; R210=10.2K
BD8160: R209=226K; R210=10.2K

R0201R0201

R0202R0202

R0203R0203

C0206C0206

TI65161: R213=0 ; C207=22n
BD8160: R213=7.5K; C207=2.2n

C109 put closed to Pin 8

D0203D0203

A
K

R0211R0211

C0207C0207

R0213R0213

Vo1

C0208C0208

SW

C0251C0251

PANEL_VCC

C0252C0252

C0253C0253

J

Layout close to IC

PANEL_VCC

R0209R0209

R0210R0210

C209: AVDD soft-start time control

U0201U0201

1

FB

2

COMP

3

OS

4

SW

5

SW

6

PGND

7

PGND

8

SUP

9

EN2

10

DRP

11

DRN

12

FREQ

13

FBN

14

FBP

BOOT

G1

G1

DLY2

DLY1

28

SS

27

GD

26

25

24

REF

23

GND

22

AVIN

21

VINB

20

VINB

19

NC

18

SWB

17

16

EN1

15

FBB

C0209C0209

GD

C0211C0211

REF

C0212C0212

C230 put closed to Pin 22

C0232C0232

PANEL_VCC

1/2 AVDD soft-start

C0263C0263

<Variant Name>

<Variant Name>

<Variant Name>

友達光電電視顯示器產品研發處

友達光電電視顯示器產品研發處

Model Name

Model Name

Model Name

SizeDocument NumberRev

SizeDocument NumberRev

SizeDocument NumberRev

Custom

Custom

Custom

Date:Sheet of

Date:Sheet of

5

4

3

2

Date:Sheet of

友達光電電視顯示器產品研發處

T315HW02 V3 Tcom MEMC Board

T315HW02 V3 Tcom MEMC Board

T315HW02 V3 Tcom MEMC Board

DC-DC

DC-DC

DC-DC

T315HW02 V3 Tcom\MEMC Board

T315HW02 V3 Tcom\MEMC Board

T315HW02 V3 Tcom\MEMC Board

1

EC02

EC02

EC02

110Wednesday, October 01, 2008

110Wednesday, October 01, 2008

110Wednesday, October 01, 2008