TCL Technoly Electronics 06 User Manual

5F, No.5, Industry E. Rd. VII, Hsinchu Science Park, Hsinchu city 30077, Taiwan, R.O.C Version:1.2
Phone: [phone] 10/15/2014

Fax: [phone]

BM63SPKA1MGA

BM63SPKA1MGA

Bluetooth 3.0 Digital Audio Output Module

BM63SPKA1MGA

Product Description

The ISSC BM63SPKA1MGA is a highly integrated Bluetooth 3.0 digital audio
output module, designed for high data rate, short-range wireless
communication in the 2.4 GHz ISM band. With the built-in ISSC Bluetooth
stack, profiles and digital audio interface, the ISSC BM63SPKA1MGA can
combine the external DSP and codec to provide high performance Bluetooth
audio.

Features

 Main Chip: ISSC IS2063GM(Flash version)
 Bluetooth 3.0 compliant
 Max. +4dBm Class 2 output power
 Receiver Sensitivity: GFSK typical -89dBm, π/4 PSK typical -90dBm,

8DPSK typical -83dBm

 Piconet and Scatter net support
 CVSD, A-law, -law, mSBC CODEC algorithms for voice applications
 Support SONY new feature
 SBC/AAC decode for Bluetooth audio streaming
 Microphone input and audio line-in support
 Built-in four language voice prompt (Chinese/English/Spanish/French)
 Support PCM and I2S digital audio interface
 Built-in 350mAH Li-ion battery charger
 HSP 1.2, HFP 1.6, A2DP 1.2, AVRCP 1.5,SPP 1.0 profiles supported
 Support USB 1.1 DFU and BC1.2/Apple charger detection

USB BC1.2 charger detection for DCP/CDP/SDP
Apple Charger: 2.5W, 5W, 10W, 12.5W

 3.3V operating voltage
 Built-in program ROM and 64Kb EEPROM
 51 pins for SMT module Size: 15mmx32mm
 Built-in PCB Antenna
 RoHS compliant

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P02

43

P31

42

P33

41

P36

40

DP

39

ADAP_IN

DM

38

VDD_IO

EAN

37

P03

36

P05

47

P00

35

LED3

AOHPM

6

DR0

1

RFS0

2

SCLK0

3

DT0

4

AOHPL

7

MICBIAS

MICN1

8

MICP1

9

AIR
AIL

P04

SYS_PWR

BAT_IN

AMB_DET

P30

46

P20

44

CODEC_VO

AOHPR

5

P12

P27

45

ANT1
ANT2
ANT3

HCI_RXD

HCI_TXD

P13
RST_N

P35

34

P37

33

GND

32

LED1

31

LED2

30

P01
P24

PWR(MFB)

GND

48

P15

BM63SPKA1MGA

Module Pin Out Diagram

BM63SPKA1MGA

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Pin No.

Pin type

Name

Description

1 I DR0

I2S interface: Digital Left/Right Data from ADC

2 O RFS0

I2S interface: DAC Left/Right Clock

3 O SCLK0

I2S interface: Bit Clock

4 O DT0

I2S interface: Digital Left/Right Data to DAC

5 O AOHPR

R-channel analog headphone output

6 O AOHPM

Headphone common mode output/sense input.

7 O AOHPL

L-channel analog headphone output

8 I MICN1

MIC 1 mono differential analog negative input

9 I MICP1

MIC 1 mono differential analog positive input

10

P

MICBIAS

Electric microphone biasing voltage

11 I AIR

R-channel single-ended analog input

12 I AIL

L-channel single-ended analog input

13

I/O

P12

GPIO, default pull-high input

1. KEY PIN for FT Test

2. EEPROM clock SCL

14

I/O

P13

GPIO, default pull-high input

1. KEY PIN for FT Test

2. EEPROM data SDA

15 I RST_N

KEY PIN for FT Test
System Reset Pin (Low active)

16

I/O

P01

GPIO, default pull-high input
BAT_CHK_EN

17

I/O

P24

GPIO, default pull-high input

1. KEY PIN for FT Test

2. System Configuration:
H: Boot Mode
L: Boot Mode with P2_0 low combination

18

I/O

P04

GPIO, default pull-high input.

19

I/O

P15

GPIO, default pull-high input

20

I

HCI_RXD

KEY PIN for FT Test
1-bit serial data received from MCU through UART

21

O

HCI_TXD

KEY PIN for FT Test

1-bit serial data transmitted to MCU through UART

22

P

CODEC_VO

3.1V LDO output for CODEC power

23

P

VDD_IO

I/O power supply input

BM63SPKA1MGA

Pin Definition for Flash module

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Pin No.

Pin type

Name

Description

24

P

ADAP_IN

Power adaptor input

25

P

BAT_IN

Battery input

26

P

AMB_DET

ADC analog input 1

27

P

SYS_PWR

System Power Output

28

I

PWR(MFB)

Multi-Function Push Button key

29 I LED3

LED Driver 3

30 I LED2

LED Driver 2

31 I LED1

LED Driver 1

32 P GND

Ground Pin

33

I/O

P37

GPIO, default pull-high input

34

I/O

P35

GPIO, default pull-high input (LF/ES samples)

Default pull-low input (CS/MP samples)

Charger Enable

35

I/O

P00

GPIO, default pull-high input
UART TX_IND signal to wake up MCU

36

I/O

P03

GPIO, default pull-high input
UART RX_IND signal to wake up BT
(Note: HCI_RXD can also be used to wake up BT)

37 I EAN

Embedded ROM/External Flash enable
H: Embedded; L: External Flash

38

I/O

DM

USB Differential data bus
Data -

39

I/O

DP

USB Differential data bus
Data +

40

I/O

P36

GPIO, default pull-high input

41

I/O

P33

GPIO, default pull-high input
ICHG1

42

I/O

P31

GPIO, default pull-high input
ICHG0

43

I/O

P02

GPIO, default pull-high input

44

I/O

P20

GPIO, default pull-high input

1. KEY PIN for FT Test

2. System Configuration,
H: Application
L: Baseband(IBDK Mode)

45

I/O

P27

GPIO, default pull-high input

46

I/O

P30

GPIO, default pull-high input

BM63SPKA1MGA

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Pin No.

Pin type

Name

Description

Line-in Detector

47

I/O

P05

GPIO, default pull-high input
Charger Status

48 P GND

Ground Pin

49 P ANT1

Antenna modification point

50 P ANT2

Antenna modification point

51 P ANT3

Antenna modification point

Common RAM

BT 3.0 Digital Core

ROM

Interrupts

BUS

HCI/UART

GPIOs (Buttons)

I2C (GPIOs or H/W)

RAM

MCU Core

DSP Core

Memory Controller

DMA Controller

Modem + MAC

DSP ROM/RAM

PMU

Battery Charger

LDO

SAR_ADC

LED Driver * 2

BUCK

Power Switch

BT 3.0

Transceiver

Synthesizer

RF Transmitter

RF Receiver

XTAL + POR

Misc. PMU logic

EEPROM

Buttons

ULPC 32KHz

SPI

Flash

Audio Codec

Stereo DAC

Stereo ADC

Anti-Pop

Audio Digital Core

I2S/PCM

Module

External

MCU

Block Diagram

BM63SPKA1MGA

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BM63SPKA1MGA

Digital Audio Interface

 Support I2S and PCM interface
 Sampling Rate : 8K, 16K, 44.1K, 48K, 88.2K, 96K
 Word Length: 16 bits, 24 bits
 4 application modes

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BCLK
ADCLRC
DACLRC

ADCDAT
DACDAT

Slave

SCLK0
RFS0
TFS0
DR0
DT0

Master

External CODEC/DSP

BM63

DAC

ADC

ADC

A2DP/SCO

SCO

LineIn

Bn-1

RFS0

SCLK0

DR0/DT0

Bn-2 B1 B0 Bn-1 Bn-2 B1 B0

Left Channel

Right Channel

1/fs

Word Length

BCLK
ADCLRC
DACLRC

ADCDAT
DACDAT

Slave

SCLK0
RFS0
TFS0
DR0
DT0

Master

External CODEC/DSP BM63

A2DP/SCO

DAC

LineIn

SCO

Mode 1: I2S Master

BM63SPKA1MGA

or

 Solutions with mic and line-in analog input with I2S audio output
 Mic for Bluetooth SCO link
 Line-in for external audio playback(for high SNR requirement)

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BCLK
ADCLRC
DACLRC

ADCDAT
DACDAT

Master

SCLK0
RFS0
TFS0
DR0
DT0

Slave

External CODEC/DSP

BM63

DAC

ADC

ADC

A2DP/SCO

SCO

LineIn

Bn-1

RFS0

SCLK0

DR0/DT0

Bn-2 B1 B0 Bn-1 Bn-2 B1 B0

Left Channel

Right Channel

1/fs

Word Length

BCLK
ADCLRC
DACLRC

ADCDAT
DACDAT

Master

SCLK0
RFS0
TFS0
DR0
DT0

Slave

External CODEC/DSP BM63

A2DP/SCO

DAC

LineIn

SCO

Mode 2: I2S Slave

BM63SPKA1MGA

or

 Solutions with mic and line-in analog input with I2S audio output
 Mic for Bluetooth SCO link
 Line-in for external audio playback(for high SNR requirement)

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BCLK
ADCLRC
DACLRC

ADCDAT
DACDAT

Slave

SCLK0
RFS0
TFS0
DR0
DT0

Master

External CODEC/DSP

BM63

DAC

ADC

ADC

A2DP/SCO

SCO

LineIn

Bn-1

RFS0

SCLK0

DR0/DT0

Bn-2 B1 B0

Bn-1 Bn-2 B1 B0

Left Channel

1/fs

Word Length

Right Channel

Mode 3: PCM master

BM63SPKA1MGA

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