TCL LCD42B66 Schematic

5

4

3

2

1

D D

LCD TV LCD42B66--2300+Jagasm

VER:00 DATA:2005.07.27

C C

THIS SHEET YPbPr INTERFACE AD9883 INTERFACE S2300 DEINTERLACE S2300 SDRAM VGA CONNECTOR JAGUAR ANALOG INTERFACE JAGUAR SDRAM SECTION SDRAM BASED FRAME BUFFER JAGUAR DIGITAL INTERFACE JAGUAR PANEL INTERFACE PANEL INTERFACE

B B

LVDS PANEL INTERFACE

DVI INTERFACE

MICROCONTROLLER 80C32 POWER SUPPLY AND DECAPS DC-DC

SHEET NO.DESCRIPTION

1 2 3 4 5 6 7 8 9 10 11 12 13

14 15

16 17

拟制：

审核：

A A

批准：

Title

LCD42B66

Size Document Number Rev

5

4

3

2

Date: Sheet

<Doc> 00

Custom

1

117Thursday, July 28, 2005

of

5

D D

YCBCR

4

3

2

1

P17

1

Y

2

Cb

3

Cr

4

GND

5

GND

6

GND

C C

JST-S6B-PH-K

1 2

FB95

1 2

FB88

1 2

FB96

Y_in Pb_in Pr_in

GND

C539/C542/C545 $4,10u/10V

L+5V

R252 68k

B B

Y_in

C539 R261 82

10u

R253 68k

1

3

Q10

MMBT2222ALT1

2

HD_Y 3

R254 1k

Pr_in

R262 82

R255

68k

C542 10u

R256

68k

GND

A A

使用无极性铝电解电容

L+5V

3

1

Q11

MMBT2222ALT1

2

R257 1k

GND

HD_V 3

Pb_in

R263 82

R249 68k

C545 10u

R250

68k

L+5V

3

1

Q14

MMBT2222ALT1

2

HD_U 3

R251 1k

GND

Title

LCD42B66 YPbPr_domestic

Size Document Number Rev

<Doc> 00

A

5

4

3

Date: Sheet

2

217Thursday, July 28, 2005

of

1

5

4

3

2

1

C216

0.1uF

C28

0.1u

15,16

SCL_analog

SDA_analog

C29

100

AD_HS

C561

GND

C30

0.1u

PVDD

1nF

R10 4k7

1 2

GND

0.1u

15

C31

3

FB90

GND

CX5 CX

15

C26

0.1uF

C32

0.1u

GND

C6

3.9nF

3.3AN

GND

R3 10K

AD_VSAD_VS

C8 0.1uF

R610K

GND

40

41

GND

42

VD

43

BAIN

44

GND

45

VD

46

VD

47

GND

48

GAIN

49

SOGIN

50

GND

51

VD

52

VD

53

GND

54

RAIN

55

A0

56

SCA

57

SDA

58

REF BYP

59

VD

60

GND

61626364656667686970717273747576777879

C34

C33

0.1u

GND

S1A S1AA

GND

S1B S1BB

GND

3 2

12

C4

GND

C35 47pF

U

Y

V

P25 4pin

Intr_main#

2596_on/light

P2

2596_ON_

GND

JST-S6B-PH-K

LM1117MPX-3.3 U1

IN OUT

1

GND

C23 4.7pF

GND

MC_SCLK4,10,15 MC_DATA4,10,15

1 2

GND

3 4

+3.3V

1

SCL

2 3

SDA

4 5

I/O1

6

INT

7

IO

8

IO

4

GND

C21

4.7pF

C25

4.7pF

C562

0.001u

TAB

R7 120

R11

4

12

C2 47uF/10V/5x5.4

1 2

R4

4.7K

GND

R8

150

MC_SCLK MC_DATA

GND

R215

R201 0

R200

R5

GND

FB3

GND

L3 0

GND

0

L2

C93 open

GND

L4 0

GND

C19

0.1u

0

GND

C571

0.01u

GND

R199

470

SCL_analog

470

SDA_analog

0

REST_Analog 15 INTR_analog 15

P3.4

4,15

P1.4 15

C3

0.1uF

GND

C7 47pF

C92

open

C175 open

R12 100 R13

C27

0.1u

REMOT

2596_on

C572

1u

C22

10u/16v

C20

10u/16v

C24

10u/16v

0.1u

15

L+5V

GND

FB2

+5V

FB7

1 2

R14

4.7K

R272

R271

4k7

GND

C476 open

Com port with Analog_board

定义

251

P1.6

P1.5

P1.3

INT0/P3.2

P1.4

1 2

47uF/10V/5x5.4

AD_VSVSYNC

GND

U

Y

V

4

123

LM1117MPX-3.3

9332-9883

D D

P1

GND

JST-S8B-PH-K

CTRL_SOURCE10

C C

Y

U

+12V

B B

A A

HS VS

V

U

Y

HD_Y2

HD_U2

1 2 3 4 5 6 7 8

GND

Y

U

GND

FB75

1 2

HSYNC

C42 47pF

GND

C43 47pF

GND

C44 47pF

GND

U37

1

IN

S1AA

2

S1A

3

S2A

4

DA

S1BB

5

S1B

6

S2B

7

DB

8 9

GND DC

PIV

C547

C544

0.1u

LM1117MPX-5 U38

3 2

IN OUT

12

C475

10uF/35V

GND

5

C541

0.1u

GND

S1C

S1B

S1A

VCC

S1D S2D

DD S1C S2C

GND

1

SOT223

S1C

GND

S1B

S1A

L+5V 16 15

EN

GND

14 13 12

S1CC

11 10

HD_V 2

V

C543

0.1u

TAB

4

C546

0.1u

C540

0.1u

GND

12

C474

10uF/16V

L+5V

AD_VS

VD

GND

CLAMP

GNDVDGND

R21

R19

PVDD

GND

open C179

GND

VD

GND

COAST

VSYNC

HSYNC

R2 3.3K

PVDD

PVD

GND

MIDSCV

PVD

39nF C5

FILT

LQFP80

AD9883

VSOUT

SOGOUT

HSOUT

DATACK

GND

VDD

RED7

RED6

RED5

RED4

RED3

SOG

R20

R18

4

排版时应注意下面的层不走线！

L7

12

C46

L6

12

C45

C17

C16

C15

0.1uF

0.1uF 1nF

21222324252627282930313233343536373839

VD

VDD

GND

GND BLUE0 BLUE1 BLUE2 BLUE3 BLUE4 BLUE5 BLUE6 BLUE7

VDD

GND

GREEN0 GREEN1 GREEN2 GREEN3 GREEN4 GREEN5 GREEN6 GREEN7

GND

RED2

RED1

RED0

VDD

GND

80

R15 22R

2300_HS 2300_VS

TDA9883 TOP

2

C18

3.3V

1nF

AD9883 U3

S1C S1CC

C9

0.1uF

20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1

GND

4 4

GND

Title

LCD42B66 AD9883 INTERFACE

Size Document Number Rev

<Doc> 00

Custom

Date: Sheet

R17

C12

C10

C11

C13

0.1uF

1nF

C37 open

GND

R16

C14

1nF RP1 22Rx4

RP2 22Rx4

RP3 22Rx4

RP4 22Rx4

RP5 22Rx4

RP6 22Rx4

L5

12

C36

12

47uF/6V/5x5.4 C1

45 36 27 18

1

DU0 DU1 DU2 DU3

DU4 DU5 DU6 DU7

DY0 DY1 DY2 DY3

DY4 DY5 DY6 DY7

DV0 DV1 DV2 DV3

DV4 DV5 DV6 DV7

DU[0..7]

DU[0..7] 4

DY[0..7]

DY[0..7] 4

DV[0..7]

DV[0..7] 4

P_CLK

317Thursday, July 28, 2005

of

4

GND

P_CLK2

R231 100

RES_2300#

R232 100

Hsync Vsync Field_ID data_7 data_6 data_5 data_4 data_3 data_2 data_1 data_0

DU[0..7]

DV[0..7]

DY[0..7]

R242 4k7

GND

R244

5

100

P3.4 3,15

R229

MC_DATA MC_SCLK

R233 22 R235 22 R236 22

4 5 3 6 2 7 1 8 4 5 3 6 2 7 1 8

3.3V

100

2300_HS3 2300_VS3

R238 open

R245 100

P2_CLK

12

C478 open

GND

P2_H P2_V P2_ID

22RX4RP36

P2_7 P2_6 P2_5 P2_4 P2_3 P2_2 P2_1 P2_0

22RX4RP37

P_CLK3

SOG3

GND

R275 open

GND

RES_2300#15

R224 4k7 R225 4k7 R226 4k7 R227 4k7 R228 4k7

SCL SDA

DU0 DU1 DU2 DU3 DU4

DU5 DU6 DU7 DV0 DV1 DV2 DV3 DV4 DV5 DV6 DV7 DY0

DY1 DY2 DY3 DY4

DY5 DY6 DY7

DATA0 DATA1 DATA2

3.3V

P24A

30

29

28

27

26

25

24

23

22

21

20

19

18

17

16

D D

C C

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

DU[0..7]3

DV[0..7]3

DY[0..7]3

MC_SCLK3,10,15 MC_DATA3,10,15

1

HSYNC1_PORT1

2

VSYNC1_PORT1

3

FIELD ID1_PORT1

4

IN_CLK1_PORT1

5

HSYNC2_PORT1

6

VSYNC2_PORT1

7

FIELD ID2_PORT1

8

VDD1(3.3)

9

VSSio

10

IN_CLK2_PORT1

11

PORT1_A0

12

PORT1_A1

13

PORT1_A2

14

PORT1_A3

15

PORT1_A4

16

VDDcore1(1.8)

17

VSScore

18

PORT1_A5

19

PORT1_A6

20

PORT1_A7

21

PORT1_B0

22

PORT1_B1

23

PORT1_B2

24

PORT1_B3

25

PORT1_B4

26

PORT1_B5

27

PORT1_B6

28

PORT1_B7

29

PORT1_C0

30

VDD2(3.3)

31

VSSio

32

PORT1_C1

33

PORT1_C2

34

PORT1_C3

35

PORT1_C4

36

VDDcore2(1.8)

37

VSScore

38

PORT1_C5

39

PORT1_C6

40

PORT1_C7

41

IN_SEL

42

FILM SYNC_IN

43

DEV_ADDR1

44

DEV_ADDR0

45

SCLK

46

SDATA

47

RESET_N

48

VDD3(3.3)

49

VSSio

50

SDRAM DATA0

51

SDRAM DATA1

52

SDRM DT2

4

P2_ID

P2_V

P2_7

P2_H

208

207

206

205

FILDID_PRT2

VSYN_PORT2

HSYN_PORT2

P2_6

P2_5

204

203

PORT2_7

PORT2_6

PORT2_5

P2_3

P2_4

202

PORT2_4

P2_2

201

200

PORT2_3

PORT2_2

12

33pF/5%

GND

P2_1

199

198

PORT2_1

3

DAC_VREFOUT

180

179

DAC_RSET

R

probe

178

177

DAC_COMP

DAC_AVSSR

DAC_AVDDR(3.3)

187/1%

G probe

1

176

175

174

DAC_ROUT

DAC_AVSSG

R230

1

173

DAC_GOUT

DAC_AVDDG(3.3)

C477

.1uF/50V

B

probe

1

172

171

170

169

DAC_BOUT

DAC_AVSSB

DAC_AVDDB(3.3)

168

DAC_VSS

GND

DAC1.8V

167

DAC_PVSS

DAC_VDD(1.8)

ANALOG GND

166

165

164

163

162

AVSS_PLL_FE

AVSS_PLL_SDI

AVSS_PLL_BE2

AVDD_PLL_FE(1.8)

AVDD_PLL_SDI(1.8)

PLL1.8V

161

160

159

158

157

PLL_PVSS

PLL_PVDD(1.8)

AVSS_PLL_BE1

VID_OUT7

AVDD_PLL_BE2(1.8)

AVDD_PLL_BE1(1.8)

VID_OUT6 VID_OUT5 VID_OUT4 VID_OUT3 VID_OUT2 VID_OUT1 VID_OUT0

VDD8(3.3) VID_OUT15 VID_OUT14 VID_OUT13 VID_OUT12 VID_OUT11 VID_OUT10

VDDcore7(1.8)

VID_OUT9

VID_OUT8 VID_OUT23 VID_OUT22 VID_OUT21 VID_OUT20 VID_OUT19 VID_OUT18

VDD7(3.3) VID_OUT17 VID_OUT16

VDDcore6(1.8)

CTLOUT4 CTLOUT3 CTLOUT2 CTLOUT1

CTLOUT0 TEST OUT1 TEST OUT0

SDRAM CLKIN

VDD6(3.3)

SDRAM CLKOUT

GND

VSSio

VSScore

VSSio

CLKOUT VSScore

TEST3

VSSio

CASN RASN

DAC3.3V

+1.8VD

156

OE

155 154 153 152 151 150 149 148 147 146 145 144 143 142 141 140 139 138 137 136 135 134 133 132 131 130 129 128 127 126 125 124 123 122 121 120 119 118 117 116 115 114 113 112 111 110

DQM

109

CSN

108

BA0

107

BA1

106 105

X1

13.5MHz

1 2

C480

3

GND

R234

47K,5%

C483

GND

10UF/16V

P2_CLK

P2_0

197

196

195

194

193

192

191

190

VSSio

XTAL IN

VSScore

PORT2_0

VDD9(3.3)

XTAL OUT

VDDcore8(1.8)

IN_CLK_PORT2

GND

+

189

TEST2

12

188

TEST1

C481

33pF/5%

C484

187

TEST0

DAC_PVDD(3.3)

0.1uF/50V

186

185

184

DAC_AVSS

DAC_GR_AVSS

DAC_GR_AVDD(3.3)

C479

10UF/16V

C482 .1uF/50V

183

182

DAC_VREFIN

DAC_AVDD(3.3)

U39

+

181

s2300

SDRAM_CLKIN

SDRAM_CLK DQM CSN BA0 BA1 CASN RASN

2

PC[15..0] 10

RP38 22Rx4

G/Y6 G/Y5 G/Y4

G/Y3 G/Y2 G/Y1 G/Y0

B/U/C7 B/U/C6 B/U/C5 B/U/C4

B/U/C3 B/U/C2 B/U/C1 B/U/C0

G/Y7

RP39 22Rx4 RP40 22Rx4

RP41 22Rx4

R237 22

R239 22

R240 22 R241 22 R243 22

45 36 27 18

PC15 PC14 PC13 PC12

PC11 PC10 PC9 PC8

PC7 PC6 PC5 PC4

PC3 PC2 PC1 PC0

C560

open

SDRAM_CLKIN 5

SDRAM_CLK 5 DQM 5 CSN 5 BA0 5 BA1 5 CASN 5 RASN 5

DI_YCLK

GND

2.5V

3.3V

10

P3.4 RES_2300# MC_DATA MC_SCLK

DI_YCLK PC15 PC14 PC13 PC12

PC11 PC10 PC9 PC8 PC7 PC6

PC5 PC4 PC3 PC2 PC1 PC0

1

P28A

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

GND

DI_HREF 10 DI_VREF 10 DI_VSYNC 10 DI_HSYNC 10

SDRAM DATA3

SDRAM DATA4

SDRAM DATA5

SDRAM DATA6

SDRAM DATA7

SDRAM DATA8

SDRAM DATA9

SDRAM DATA10

SDRAM DATA11

VDD4(3.3)

VSSio

SDRAM DATA12

SDRAM DATA13

SDRAM DATA14

SDRAM DATA15

VDDcore3(1.8)

VSScore

SDRAM DATA16

SDRAM DATA17

SDRAM DATA18

SDRAM DATA19

SDRAM DATA20

SDRAM DATA21

SDRAM DATA22

SDRAM DATA23

SDRAM DATA24

SDRAM DATA25

VDDcore4(1.8)

VSScore

SDRAM DATA26

SDRAM DATA27

SDRAM DATA28

SDRAM DATA29

SDRAM DATA30

SDRAM DATA31

VDD5(3.3)

VSSio

TEST IN

SDRAM ADDR10

SDRAM ADDR9

SDRAM ADDR8

SDRAM ADDR7

SDRAM ADDR6

VDDcore5(1.8)

VSScore

SDRAM ADDR5

SDRAM ADDR4

SDRAM ADDR3

SDRAM ADDR2

SDRAM ADDR1

SDRAM ADDR0

B B

GND

4

+

C489

100uF/16V

+

100UF/16V

GND

C487

+1.8VD

C490

.1uF/50V

C508 .1uF/50V

12

C488

.1uF/50V

C491 .1uF/50V

C509 .1uF/50V

C492 .1uF/50V

C510 .1uF/50V

GND

+1.8VD

5

LM1117MPX-1.8 U40

3 2

IN OUT

12

C486 .1uF/50V

+3.3VD

GND

1

+

100uF/16V

TAB

C507

FB76

3.3V 1 2

+

C485

100UF/16V

+3.3VDDAC3.3V

A A

5354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899

DATA26

DATA29

DATA31

DATA30

DATA28

DATA23

DATA22

12

.1uF/50V

DATA24

C498

L8

L9

DATA27

DATA25

DAC1.8V

5.6uH

PLL1.8V

5.6uH

C493 .1uF/50V

C511 .1uF/50V

DATA7

DATA4

DATA3

DATA6

DATA9

DATA8

DATA5

DATA10

DATA11

C494

C495

.1uF/50V

C513

C512

.1uF/50V

4

DATA18

DATA16

DATA13

DATA14

DATA15

C496 .1uF/50V

+1.8V

C514 .1uF/50V

DATA17

DATA19

C497 .1uF/50V

C515 .1uF/50V

DATA21

DATA20

3.3V

DATA12

ADDR10

3

ADDR9

ADDR8

ADDR7

ADDR6

DAC3.3V

PLL1.8V

100

101

ADDR4

ADDR5

ADDR2

ADDR3

C499 .1uF/50V

GND_ANALOG

C516 .1uF/50V

GND_PLL

102

ADDR1

103

ADDR0

WEN

104

C500 .1uF/50V

C517 .1uF/50V

ADDR[0..10]

C501 .1uF/50V

C518 .1uF/50V

GND

C502 .1uF/50V

C519 .1uF/50V

WEN

C503 .1uF/50V

C520 .1uF/50V

DATA[0..31]

C504 .1uF/50V

2

C521

10UF/16V

+

C505

47UF/16V

+

C506

47UF/16V

DAC1.8V

+

C522

.1uF/50V

GND

WEN 5

ADDR[0..10] 5

SDRAM_DATA[0..31] 5

Title

LCD42B66 S2300 DEINTERLACE

Size Document Number Rev

03 00

C

Date: Sheet

417Thursday, July 28, 2005

1

of

5

4

3.3V

3

2

1

FB93

D D

ADDR[0..10]

4

C C

DQM4

BA04 BA14

WEN4 CASN4 RASN4

B B

4

SDRAM_CLK4

SDRAM_CLKIN

CSN4

SDRAM_CLK

ADDR0 ADDR1 ADDR2 ADDR3

ADDR4 DATA4 ADDR5 ADDR6 ADDR7

ADDR8 DATA8 ADDR9 ADDR10

DQM

BA0 BA1

WEN CASN RASN CSN

R246 100/5%

SDRAM_CLKIN

FB94

R247 NL

GND

12

RP42 22Rx4

45 36 27 18

RP43 22Rx4

45 36 27 18

RP44 22Rx4

45 36 27 18

3.3V

12

25 26 27 60

61 62 63 64

65 66 24

14 21 30 57 69 70 73

16 71 28 59

22 23

17 18 19 20 68 67

R248 4k7/5%

C523

.1uF/50V

U35

A0 A1 A2 A3

A4 A5 A6 A7

A8 A9 A10

NC NC NC NC NC NC NC

DQM0 DQM1 DQM2 DQM3

BA0 BA1

WE CAS RAS CS CLK CKE

GND

C524

.1uF/50V

186

VDDVSS

C525

.1uF/50V

GND

15

29

43

VDD

KM432S2030C

86 PIN TSOP

KM432S2030C

VSS

72

58

44

3935414946

VDDQ

VSSQ

63212

38

557581

VDDQ

VDDQVSSQ

VSSQ

527884

VDDQ

VSSQ

VDDQ

VSSQ

GND

C526

+

2.2uF/25V

DQ10 DQ11

DQ12 DQ13 DQ14 DQ15

DQ16 DQ17 DQ18 DQ19

DQ20 DQ21 DQ22 DQ23

DQ24 DQ25 DQ26 DQ27

DQ28 DQ29 DQ30 DQ31

DQ0 DQ1 DQ2 DQ3

DQ4 DQ5 DQ6 DQ7

DQ8 DQ9

2 4 5 7

8 10 11 13

74 76 77 79

80 82 83 85

31 33 34 36

37 39 40 42

45 47 48 50

51 53 54 56

DATA0 DATA1 DATA2 DATA3

DATA5 DATA6 DATA7

DATA9 DATA10 DATA11

DATA12 DATA13 DATA14 DATA15

DATA16 DATA17 DATA18 DATA19

DATA20 DATA21 DATA22 DATA23

DATA24 DATA25 DATA26 DATA27

DATA28 DATA29 DATA30 DATA31

DATA[0..31]

SDRAM_DATA[0..31] 4

3.3V

A A

C527

0.1uF

GND

5

C528

0.1uF

C529

0.1uF

DECOUPLING FOR SDRAM

C530

0.1uF

4

C531

0.1uF

C532

0.1uF

C533

0.1uF

C534

0.1uF

C535

0.1uF

3

C536

0.1uF

C537

0.1uF

C538

0.1uF

Title

LCD42B66 S2300 SDRAM

Size Document Number Rev

04 00

B

Date: Sheet

2

517Thursday, July 28, 2005

of

1

5

4

3

2

1

AGREEN1P 7

ABLUE1P 7

ABLUE1N 7

TO JAGASM ADC

RED1

GND

GREEN1

GND

BLUE1

GND

VGA_HSYNC 10

VGA_VSYNC 10

1

3

D10

1 2

BAV99

3

D11

1 2

BAV99

3

D12

1 2

BAV99

3

2

A+5V

RED1

D D

3

21

1617

RED

MH1MH2

GREEN

BLUE

GND RGND GGND BGND

VCC

GND

HSYNC VSYNC

ID2

ID0

BAV99 FOOTPRINT

RED1

1

GREEN1

2

BLUE1

3 4 5 6 7 8

VGA_+5V

9 10 11

DDDA

12

PHSI1

13

PVSI1

14

DDCK

15

FB12

12 12

FB13

R48 1K

GND GND GND GND

VGA

P11

C C

DDDA(ID1)

DDCK(ID3)

ASTRON HDB600-15

CUT IN GND PLANE AND JOIN

B B

NEAR JAG

RED-GND

GREEN1

BLUE1

GND

R44 100R

R45 100R

100R

R46

100R

R47

R49 1K

VGA_+5V +5V

FB55

1 2

FB56

1 2

FB57

1 2

3

1 2

D7 BAT54C/BAV70

1

SOT23

D1

3

+5V

1 2

2

C75

R29

1u

75 1%

C77

R33

1u

75 1%

GREEN-GND

C79

R37

1u

75 1%

BLUE-GND

D2

3

+5V

R30

R34

R38 0R

D21

DIODE

D3

1 2

R28 75 1%

0R

R32 75

0R 1%

R36 75 1%

A+5V

D4

3

BAV99

1 2

C76

2.2pf

C78

2.2pf

C80

2.2pf

R286

C573

100R

1u

GND

A+5V

CUT IN GND PLANE AND JOIN NEAR ANALOG POWER SUPPLY

GND

C85 100pf

C86 100pf

R211 0

ARED1N

AGREEN1N

R210 0

1 3 5

9 11 13

3.3V

GND

C558

0.01u

147

U41

7414

R209

0

GND

ARED1P 7

ARED1N 7

AGREEN1N 7

GND

C559 1u

2 4 6 8 10 12

R285

open

SDA

SCL

5

6

7

GND

C87

0.1uF

R51

10K

R52 10K

R284

open

Title

LCD42B66 VGA CONNECTOR

Size Document Number Rev

<Doc> 00

Custom

4

3

Date: Sheet

2

617Thursday, July 28, 2005

of

1

R50

10K

3

A A

1

2

EDID DATA

8

U8

WC

VCC

DDC

NC1

GND

4

5

VCLK

ST24FW21

NC2