Page 1
LP-10R01
SERVICE MANUAL
Page 2
1.0 Introduction
1.1 Operation Specification
1.2 Functional Specification
1.3 Control And Adjustment
2.0 Theory Of Operation
2.1 Main Board
2.2 Keypad Board:
CONTENTS
2.3 Inverter Board:
3.0 Troubleshooting Instruction
3.1 No Display, Power Indicator Is Off Or Blinking
3.2 No Display, Power Indicator Is Orange
3.3 No Display, Power Indicator Is Green
4.0 Video Connector Pin Assignment
5.0 Visual Inspection Criteria-LCD Panel
6.0 Spare Parts List
Page 3
7.0 Circuit Diagram
7.1 Power Distibution
7.2 VGA Input
7.3 ADC
7.4 Damping Network
7.5 Frame Rate Conversion
7.6 ASI 321
7.7 ASI 321 Power & EXT. OSD
7.8 Microcontroller
7.9 Panel Interface
8.0 Layout Diagram
(Vetech Film)
9.0 Parts List
Page 4
About This Manual
Audience
This service manual is primarily for system engineers, service engineers, dealers and
distributors. It carries the assumption that reader understands the basic operating concepts.
Purpose
This manual contains reference data for LP-10R01 LCD monitor. It gives information
regarding the operating principles of monitors, as well as technical service and maintenance
information.
1.0 Introduction
The LP-10R01 is a high performance 10.4” TFT LCD monitor. This micro-controlled monitor
is designed for continuous operation from 31.5 to 54 KHz and is capable of displaying up to
a resolution of 800 *600 in interface mode. The razor sharp flicker-free image, and the
delicate ergonomic design of this monitor elevate not only productivity but also the user’s
comfort.
1.1 Operation Specification
1.1.1 Operation Environment
Temperature
Operation：0 to 40℃
Storage：-20 to 60℃
Humidity (Relative)
Operation：10 to 80% non-condensing
Storage：10 to 90% non-condensing
Altitude
Operation：0~8000ft
Storage：0~40000ft
Page 5
1.1.2 Safety, Ergonomic, EMC Compliance
This monitor complies with the following safety, ergonomic, and EMC standard
UL: UL1950
TUV-GS: EN60950, ISO-9241-3
FCC : Part 15 Class B
CE : EN55022 CISPR22 Class B, EN55024(EMS), EN60950
1.1.3 Signal Input Requirement
Connector:
15 pin D-Sub high-density connector for video and sync signals. See chapter 4 for
pin assignment.
Video Signals:
Type: Red, Green, Blue channels analog input.
Level: 0.7Vp-p
Impedance:75 ohms.
Sync Signals:
Type: Separate Horizontal and Vertical Sync
Level: TTL Level
Polarity: Positive or negative
1.1.4 Power Input Requirement
Operating voltage range
100~240 V AC at 50/60 HZ
Power Consumption
Normal Operation: 18W
Stand by: 2.5W
Suspend mode: 2.5W
Off mode: 2.5W
Page 6
1.2 Functional Specification
The standard conditions for verifying the following specification are:
Temperature: 25±5℃
Warm-Up Time: 15 minutes minimum
AC line input: 100~240 V AC±10%, 50 / 60±3Hz
View Distance: 30cm
1.2.1 Display Quality
Display Size (H*Z): 211.2mm*158.4mm
Brightness: more than 120 cd/ m2
Contrast Ratio: 180:1
1.2.2 Color Quality
White Balance (Use full white pattern, set brightness to maximum)
At color temperature of white light CIE9300。K+27M..P.C.D
X=0.283±0.02, Y=0.298±0.02
At color temperature of white light CIE6500。K+27M..P.C.D
X=0.313±0.02, Y=0.329±0.02
1.3 Control And Adjustment
1.3.1 External User Controls
POWER Power On / Off
MENU OSD Menu On / Off
UP Increase the Value.
DOWN Decrease the Value.
ENTER Confirm the selection
Page 7
1.3.2 Controlled Functions From OSD Menu
Brightness: Press (+) key to increase brightness, (-) key to decrease brightness.
Contrast: Press (+) key to increase contrast, (-) key to decrease contrast.
Auto Adjust: Press (+) or (-) to adjust H-phase & H-position & V-position clock
automatically.
Phase: By varying this (+)(-) control the exact sampling time within the pixel can
be adjusted.
Clock: Adjust sampling clock of analog to digital converter until clock is equal to
pixel frequency of video input.
H-Position: Press (+) key to shift screen right, (-) key to shift screen left.
V-Position: Press (+) key to shift picture upward, (-) key to shift picture downward.
Sharpness: Press (+) key to increase sharpness, (-) key to decrease Sharpness.
Color Temp: Press (+) or (-) to choose three types of color temperature 9300,
6500 and user define.
Language: Press (+) or (-) to choose any one of the following language, English,
French, German, Italian and Spanish.
OSD: Adjust OSD frame location, timeout, transparency and preset OSD.
Dos-text / graphic: Select display quality (text / graphic) when this monitor be
used in DOS.
Recall: Recall the default value.
1.3.3 Special Functions
Automatic storing: After adjusting the screen parameters, the microprocessor
automatically stores the screen settings in user mode.
Entering factory mode: Press (+) and (-) at same moment before power on, the
monitor will operate in factory mode. In this mode. The value of brightness,
contrast, black-level, red, green, phase, OSD time, color save (color temperature)
are stored as default value. During recall function, these values will be recalled
again.
Page 8
2.0 Theory Of Operation
2.1 Main Board
This module consists of microprocessor, Cheetah chip, AD converter, memory, clock
generator, power conversion, 3.3 volt regulator and backlight controller.
2.1.1 A/D(AD9884A U8):
U8 is a triple 8 bit ADC with controllable amplifiers and clamps for the digitizing of
large bandwidth RGB signals. The clamp level, the gain and all of the other
settings are controlled via a serial interface, SDA (pin29), SCL(pin30).
Analog video inputs (Rin, Gin, Bin) are internal DC polarized. These input are AC
coupled by C46, C52, C54 three capacitors. ADC outputs R0~R7, G0~G7, B0~B7
are connected to scaling IC (ASI-320) via resistor array.
2.1.2 Scaling IC(ASI-320 U14):
U14 provides memory interface, ADC interface, microprocessor interface and flat
panel interface. U14 can work either with or without the external frame buffer. The
scaling IC is the data follow center between SDRAM(U12,U13), A/D converter(U8),
MCU(U17) and LVDS transmitter (U20). Because the LVDS panel is 6 bits/color
system, scaling IC also dither the 8 bits/color (from A/D) to 6bits/color system
2.1.3 Memory:
U12~U13(A43L0616V-7) for 1M*16 SDRAM frame buffer. 2.1.4 Power conversion:
U1: Main 5 volts output are generated by DC to DC conversion, from adapter we
get 12
volts DC input, convert 12 volts to 5 volts .
2.1.4 Regulator
3.3 volts regulator: U2, U4, U5, U6 are 3.3 volt regulators.
U2 output for LCD panel
U4 output for scaling IC(U14) and AD9884(U8).
U5 output for SDRAM(U12,U13)and LVDS transmitter (U20)
U5 output for analog power of AD9884 (U8)
2.1.5 LVDS transmitter (U20)
U20 transmits the LVTTL color data via LVDS interface.
2.1.6 MCU(U17)
Page 9
Dominate the OSD, preset mode, factory initial mode etc.
2.2 Keypad Board:
The key status input to Main Board for function adjustments ON OSD menu.
2.3 Inverter Board:
Inverter DC to high voltage AC for driving CCFL.
3.0 Troubleshooting Instruction
3.1 No Display, Power Indicator Is Off Or Blinking
3.1.1 Check AC/DC adaptor is proper installed with power code or DC jack.
3.1.2 Make sure having pressed power key.
3.2 No Display, Power Indicator Is Orange
3.2.1 Check the connector VGA1 for RGB signals input to Main board or not.
3.2.2 Change the Main Board
3.3 No Display, Power Indicator Is Green
3.3.1 Check the connector P7 for LVDS signals input to panel or not.
3.3.2 Check the LCD panel connector.
3.3.3 Check CON4 for power input of inverter.
3.3.4 Change the inverter board
3.3.5 Change the Main board
Page 10
4.0 Video Connector Pin Assignment
Pin Number Signal Pin Number Signal
1 Analog Red Input 9 NC
2 Analog Red Input 10 Sync Ground
3 Analog Red Input 11 Ground
4 Ground 12 SDA (DDC Data)
5 Digital Ground 13 H. Sync
6 Analog Red Ground 14 V. Sync
7 Analog Green Ground 15 SCL (DDC CLK)
8 Analog Blue Ground
Page 11
5.0 Visual Inspection Criteria-LCD Panel
Item Criteria for defect
Display function No Display Malfunction
Flickering Obviously visible at display area
Line defect Missing line, Vertical or horizontal
Display
Inspection
(operating)
External
Inspection
(non-operating)
Point Defect (Red,
Green, Blue, Dark)
Image retention
Non-uniformity Visible through 2% ND filter.
Important dimension
Scratch on the polarize
line shape
Dent or Bubble on the
polarize (in available
viewing area)
Foreign material on
polarizer
Bright defects：5 pcs maximum
Dark defects：5 pcs maximum
Total defects：10 pcs maximum
After displaying fixed pattern for 30 minutes,
the afterimage is visible after 10 seconds.
Not conform to SPEC regarding outline and
dimension between the mounting holes.
N=5 max (W≦ 0.1 or L≦ 10)
N=0 (W<0.1 or L<10)
N=5 max (D≦ 0.4)
N=0 (D≦ 0.1)
(W>1/4L)
N=4 max (0.1<D≦ 0.4)
(W≦ 1/4L)
N=4 max (0.03<W≦ 0.10 and 0.3<L≦ 2.1)
6.0 Spare Parts List
N=0 (W>0.1 or L>2.1)
Plastic frame Break
Cable The metal wire is exposed.
Parts No. Description Notes
1 Main Board 891-0100-057
2 Inverter 891-0250-003
3 Keypad 891-0010-010
4 Power Adaptor 560-1000-002
5 LCD Panel 501-1043-121
Page 12
7.1 Power Distibution
CON1
DC JACK2.5
+12V
+12V +12INV
VCC5
P.10
INV_ON/OFF
P.10
PANEL_ON/OFF
F1
QT3216KL100HC-3A
R251003
QT4532KL150HC-3A
C19
C17
+
104
470u/25V
QT3225KL060MC-1.5A
C27
104
INV_ON/OFF
PANEL_ON/OFF
L40
L4
L6
QT4532KL150HC-3A
C3
C1
+
104
470u/16V
GND_POWER
C20
104
C28
C26
+
104
470u/16V
L1
C4
C2
+
104
470u/16V
C15 103 R59 15K
C18
Inverter
+
Power
470u/16V
DVCC5
MCU, ROM & Glue
Logics
QT3225KL060MC-1.5A
L7
C32
QT3225KL060MC-1.5A
L9
C40
D1
U1
14
111213
NCNCNC
VCC
OCSET
UGATE
PHASE
COMP
GND
4
7
HIP6013
100R,(0805,1%)
R223
R224
169R,(0805,1%)
AVCC3
C41
+
104
1N4148
2
10
BOOT
9
8
DVCC5
DVCC3
C33
C31
+
104
470u/16V
Analog Power
C39
to ADC
470u/16V
C5 102
R56 10K
R2030
RFD3055SM
VCC
PANEL_ON/OFF
C8
C6
C7
+
+
104
470u/16V
PVCC_5/3V
C29
104
R65
1K
Q5
3904
470u/16V
R60
51K
Q4
3904
R66 NC
C10
Q2
ZD1
MBR340T3
DVCC5
14
1 2
7
DVCC5
INV_ON/OFF
104
70uH/COIL/3A
U3A
74HCT14
GND
L3
R63
4.7K
R67 10K
R61
10K
R62 2.7K
R64
1K
C263
R53
C262
10uF/25V
10K
104
6
ENABLE
3
C9
SS
1
104
RT
5
FB
C16 220pF
H2,AD9884,LVDS
,SDRAM,PANEL
U4
23
VOUTVIN
VSS
RC1587M
1
104
C264
NC
U6
23
VOUTVIN
VSS
AS1117M/3.3V
1
104
R54
30K
R58
10K
Q3
1
S
2
S
3
S
4 5
GD
9435A
BGT_ADJ
R68
0
VCC5
R55
30K(NC)
8
D
7
D
6
D
CON4
1
2
3
4
5
WAFER,2022-05/DIP
DVCC3
C23
104
VCC5
DVCC5
DVCC3
AVCC3
PVCC+12INV
GND_POWER
PANEL3.3V
QT3225KL060MC-1.5A
L2
QT3225KL060MC-1.5A
C21
L5
+
47uF/10V,LESR
VCC5
DVCC5
DVCC3
AVCC3
PVCC
GND_POWER
PVCC_5/3V
C12
C14
+
470u/10V
104
PVCC
C22
C24
+
47uF/10V,LESR
104
P.02,03,09,10
P.03,04,05,09,10,11
P.02,03,05,09
P.11
DRAWING
APPROVED
LP-10R01 Power Distribution
TAIWAN VIDEO SYSTEM CO.,LTD.
Size Document Number Rev
B
LP-10R01 Power Distribution
Date: Sheet
19Friday, March 30, 2001
0
of
Page 13
7.2 VGA Input
VGA1
1
VGA_R
VGA_R_GND
6
11
VGA_G
2
VGA_G_GND
7
12
DDC_SDA
3
VGA_B
VGA_B_GND
8
13
VGA_HSYNC
4
9
VGA_CVCC5
14
VGA_VSYNC
5
10
15
DDC_SCL
CON VGA DB15
DVCC5
JY-5017-06
DIN 1
8
TCH1
XH
1
YH
2
XL
3
YL
4
CON4/2.0
P. 01
DVCC5
P. 01
AVCC3
VCC
R69 NC
AVCC3
L10 BEAD
L11 BEAD D2
L12 BEAD
D3
CVCC5
1N4148
D5
D4
D9
5.6VD85.6V
365
1
2
DVCC5
AVCC3
C47
5.6V
100pF
C48
5.6V
100pF
3
12
1 2
DAN217-T146(ROHM)
AVCC3
D6
3
12
1 2
DAN217-T146
AVCC3
D10
3
12
1 2
DAN217-T146
C46 47nF
3
3
3
R74
75
C52 47nF
R80
75
R82
75
R73 270
R79 270
R81 270C54 47nF
RED
GREEN
BLUE
R70 0
R76 0
CVCC5
1
2
3
4 5
U7
NC
NC
NC
VSS SDA
24LC21
U3B
3 4 R71 0
C43
74HCT14
NC
U3D
9 8
C49
74HCT14
NC
8
VCC
7
VCLK
6
SCL
R75 NC
C53
10K(NC)
104
R207 47
R208 47
R209 47
RED
GREEN
BLUE
HSYNC
VSYNC
R204
GND_POWER
DVCC5
14
U3C
5 6
C44
7
74HCT14
NC
U3E
11 10R77 0 R78 33
C50
74HCT14
NC
R205
R206
10K
10K
VGA_VSYNC
DDC_SCL
DDC_SDA
RED
GREEN
BLUE
HSYNC
VSYNC
GND_POWER
GND
D7
1N4148
P. 03
P. 03
P. 03
P. 03,08
P. 03,08
R72 33
DVCC5
C42
104
HSYNCVGA_HSYNC
C45
NC
VSYNCVGA_VSYNC
C51
NC
GND_POWER
DRAWING
APPROVED
LP-10R01 VGA Input
TAIWAN VIDEO SYSTEM CO.,LTD.
Size Document Number Rev
B
LP-10R01 VGA Input
Date: Sheet
of
29Friday, March 30, 2001
0
Page 14
7.3 ADC
DVCC3
DVCC3
P.01
P.01
P.01
P.02
P.02
P.02
P.02
P.02
P.08
P.08
P.08
P.08
P.08
D13 1N4148(NC)
HSYNC
HSTOPLL
D14 1N4148(NC)
VSYNC
DVCC5
DVCC3
AVCC3
VSYNC
HSYNC
RED
GREEN
BLUE
SCL
SDA
HSTOPLL
CLAMP
PIO6
R83 10K(NC)
R84 1K(NC)
R85 33
R86 NC
R89 NC
VCC
DVCC5
DVCC3
AVCC3
VSYNC
HSYNC
RED
GREEN
BLUE
SCL
SDA
HSTOPLL
CLAMP
PIO6
C55
47uF/10V,LESR
47uF/10V,LESR
R92
0
L13
QT2012
C56
+
104
47uF/10V,LESR
C0603
L14
QT2012
C71
+
C70
104
C0603
CLAMP
R87
NC
Serial Port Address Select
for AD9884A
DVCC3
R99
NC
AD_A0 AD_A1 CKINV
R103
0
102
128
1
DVCC3_ADDVCC3
C58
+
C57
104
C0603
+
C72
47uF/10V,LESR
AVCC3 PVD
+
C82
47uF/10V,LESR
GREEN
R88 NC
R90
1K
Sampling Clock Inversion
Tie high to invert.
Tie low for normal rising
edge.
DVCC3
R100
NC
R104
0
64
38
AVCC3_ADAVCC3
C73
104
C0603
C83
104
C0603
C59
104
C0603
L15
QT2012
47uF/10V,LESR
R91
0
R101
NC
R105
0
GND_POWER
C60
104
C0603
C74
104
C0603
U8
4
VD
8
VD
10
C67
C66
C65
C64
C63
C62
C61
104
C0603
C75
104
C0603
+
C84
R93
10K
104
C0603
C76
104
C0603
C85
104
C0603
CKINV
SDA
SCL
AD_A0
AD_A1
PIO6
104
C0603
C77
104
C0603
R94 150
R95 150
DVCC5
14
1 2
7
GCLOCK
HSFRMPLL
CSYNC
ADREVEN[0..7]
ADGEVEN[0..7]
ADBEVEN[0..7]
ADRODD[0..7]
ADGODD[0..7]
ADBODD[0..7]
GND_POWER
104
C0603
C78
104
C0603
C86
104
C0603
U9A
74HCT14
104
104
C0603
C0603
C80
C79
104
104
C0603
C0603
C88
C87
104
104
C0603
C0603
DVCC3
GND
GCLOCK
HSFRMPLL
CSYNC
ADREVEN[0..7]
ADGEVEN[0..7]
ADBEVEN[0..7]
ADRODD[0..7]
ADGODD[0..7]
ADBODD[0..7]
GND_POWER
104
C0603
C81
104
C0603
C89
104
C0603
R96
NC
P.08
P.08
P.08
P.06
P.06
P.06
P.06
P.06
P.06
RED
GREEN
BLUE
VD
11
VD
16
VD
18
VD
19
VD
23
VD
25
VD
124
VD
128
VD
54
VDD
64
VDD
74
VDD
84
VDD
94
VDD
104
VDD
114
VDD
120
VDD
33
PVD
34
PVD
43
PVD
48
PVD
50
PVD
7
RAIN
15
GAIN
22
BAIN
40
HSYNC
41
COAST
28
CLAMP
14
SOGIN
44
CKEXT
27
CKINV
29
SDA
30
SCL
31
A0
32
A1
125
PWRDN
5
GND
6
GND
9
GND
12
GND
13
GND
17
GND
20
GND
21
GND
24
GND
SOGOUT
26
GND
35
39
42
47
49
51
52
53
63
73
83
93
103
113
119
121
122
123
HSOUT
GND
GND
GND
REFOUT
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
DATACK
GND
/DATACK
GND
AD9884
APPROVED
LP-10R01 ADC
ADREVEN0
112
DRA0
ADREVEN1
111
DRA1
ADREVEN2
110
DRA2
ADREVEN3
109
DRA3
ADREVEN4
108
DRA4
ADREVEN5
107
DRA5
ADREVEN6
106
DRA6
ADREVEN7
105
DRA7
ADGEVEN0
92
DGA0
ADGEVEN1
91
DGA1
ADGEVEN2
90
DGA2
ADGEVEN3
89
DGA3
ADGEVEN4
88
DGA4
ADGEVEN5
87
DGA5
ADGEVEN6
86
DGA6
ADGEVEN7
85
DGA7
ADBEVEN0
72
DBA0
ADBEVEN1
71
DBA1
ADBEVEN2
70
DBA2
ADBEVEN3
69
DBA3
ADBEVEN4
68
DBA4
ADBEVEN5
67
DBA5
ADBEVEN6
66
DBA6
ADBEVEN7
65
DBA7
ADRODD0
102
DRB0
ADRODD1
101
DRB1
ADRODD2
100
DRB2
ADRODD3
099
DRB3
ADRODD4
098
DRB4
ADRODD5
097
DRB5
ADRODD6
096
DRB6
ADRODD7
095
DRB7
ADGODD0
82
DGB0
ADGODD1
81
DGB1
ADGODD2
80
DGB2
ADGODD3
79
DGB3
ADGODD4
78
DGB4
ADGODD5
77
DGB5
ADGODD6
76
DGB6
ADGODD7
75
DGB7
ADBODD0
62
DBB0
ADBODD1
61
DBB1
ADBODD2
60
DBB2
ADBODD3
59
DBB3
ADBODD4
58
DBB4
ADBODD5
57
DBB5
ADBODD6
56
DBB6
ADBODD7
55
DBB7
118
117
45
FILT
127
REFIN
126
1
NC
2
NC
3
NC
36
NC
37
NC
38
NC
46
NC
115
116
DRAWING
Size Document Number Rev
B
Date: Sheet
ADREVEN[0..7]
ADGEVEN[0..7]
ADBEVEN[0..7]
ADRODD[0..7]
ADGODD[0..7]
ADBODD[0..7]
HSFRMPLL
C92
392,5%,NPO
L39
QT2012
CSYNC
47uF/10V,LESR
393,5%,NPO
C95
104
3.3K,1%
R106 33
R107 NC
R97 NC
R98 0
C91
R102
Reserved
TAIWAN VIDEO SYSTEM CO.,LTD.
LP-10R01 ADC
PVD
C93
C96
+
104
GCLOCK
C94
10pF
0
of
39Friday, March 30, 2001
Page 15
7.4 Damping Network
Analog Interface
Damping Network
ADREVEN0
ADREVEN1
ADREVEN2
ADREVEN3
ADREVEN4
ADREVEN5
ADREVEN6
ADREVEN7
ADGEVEN0
ADGEVEN1
ADGEVEN2
ADGEVEN3
ADGEVEN4
ADGEVEN5
ADGEVEN6
ADGEVEN7
ADBEVEN0
ADBEVEN1
ADBEVEN2
ADBEVEN3
ADBEVEN4
ADBEVEN5
ADBEVEN6
ADBEVEN7
ADRODD0
ADRODD1
ADRODD2
ADRODD3
ADRODD4
ADRODD5
ADRODD6
ADRODD7
ADGODD0
ADGODD1
ADGODD2
ADGODD3
ADGODD4
ADGODD5
ADGODD6
ADGODD7
ADBODD0
ADBODD1
ADBODD2
ADBODD3
ADBODD4
ADBODD5
ADBODD6
ADBODD7
RA1
1 8
2 7
3 6
4 5
R-PACK4 33
RA3
1 8
2 7
3 6
4 5
R-PACK4 33
RA5
1 8
2 7
3 6
4 5
R-PACK4 33
RA7
1 8
2 7
3 6
4 5
R-PACK4 33
RA10
1 8
2 7
3 6
4 5
R-PACK4 33
RA12
1 8
2 7
3 6
4 5
R-PACK4 33
RA13
1 8
2 7
3 6
4 5
R-PACK4 33
RA15
1 8
2 7
3 6
4 5
R-PACK4 33
RA17
1 8
2 7
3 6
4 5
R-PACK4 33
RA19
1 8
2 7
3 6
4 5
R-PACK4 33
RA21
1 8
2 7
3 6
4 5
R-PACK4 33
RA23
1 8
2 7
3 6
4 5
R-PACK4 33
HREVEN0
HREVEN1
HREVEN2
HREVEN3
HREVEN4
HREVEN5
HREVEN6
HREVEN7
HGEVEN0
HGEVEN1
HGEVEN2
HGEVEN3
HGEVEN4
HGEVEN5
HGEVEN6
HGEVEN7
HBEVEN0
HBEVEN1
HBEVEN2
HBEVEN3
HBEVEN4
HBEVEN5
HBEVEN6
HBEVEN7
HRODD0
HRODD1
HRODD2
HRODD3
HRODD4
HRODD5
HRODD6
HRODD7
HGODD0
HGODD1
HGODD2
HGODD3
HGODD4
HGODD5
HGODD6
HGODD7
HBODD0
HBODD1
HBODD2
HBODD3
HBODD4
HBODD5
HBODD6
HBODD7
HREVEN[0..7]
HGEVEN[0..7]
HBEVEN[0..7]
HRODD[0..7]
HGODD[0..7]
HBODD[0..7]
HREVEN[0..7]
HGEVEN[0..7]
HBEVEN[0..7]
HRODD[0..7]
HGODD[0..7]
HBODD[0..7]
P.08
P.08
P.08
P.08
P.08
P.08
P.03
P.03
P.03
P.03
P.03
P.03
ADREVEN[0..7]
ADGEVEN[0..7]
ADBEVEN[0..7]
ADRODD[0..7]
ADGODD[0..7]
ADBODD[0..7]
ADREVEN[0..7]
ADGEVEN[0..7]
ADBEVEN[0..7]
ADRODD[0..7]
ADGODD[0..7]
ADBODD[0..7]
ADREVEN[0..7]
ADGEVEN[0..7]
ADBEVEN[0..7]
ADRODD[0..7]
ADGODD[0..7]
ADBODD[0..7]
APPROVED
LP-10R01 Damping Network
DRAWING
TAIWAN VIDEO SYSTEM CO.,LTD.
Size Document Number Rev
Custom
LP-10R01 Damping Network
Date: Sheet
Page 16
7.5 Frame Rate Conversion
¦¹³¡¥÷¹s¥ó½ÐLAY¦Ü-I-±
P.01
P.08
P.08
P.08
P.08
P.08
P.08
P.08
P.08
P.08
P.08
P.08
P.08
P.08
GND_POWER
DVCC3
ADQ[0..31]
AMA[0..10]
SDCLK
SDCLKI
ACKE
/ACS
/AWE
/ACAS
/ARAS
ABA
ADQM1
ADQM0
ACBS
DVCC3
ADQ[0..31]
AMA[0..10]
R156 33
SDCLKI
ACKE
/ACS
/AWE
/ACAS
/ARAS
ABA
ADQM1
ADQM0
ACBS
GND_POWER
R154
220
R157
330
ADQ[0..31]
AMA[0..10]
R147
1 8
ADQ31
2 7
ADQ15
3 6
ADQ30
4 5
ADQ14
ADQ29
ADQ13
ADQ28
ADQ12
ADQ27
ADQ11
ADQ26
ADQ10
ADQ25
ADQ9
ADQ24
ADQ8
ADQ23
ADQ7
ADQ22
ADQ6
ADQ21
ADQ5
ADQ20
ADQ4
ADQ19
ADQ3
ADQ18
ADQ2
RA-560
R148
1 8
2 7
3 6
4 5
RA-560
R149
1 8
2 7
3 6
4 5
RA-560
R150
1 8
2 7
3 6
4 5
RA-560
R151
1 8
2 7
3 6
4 5
RA-560
R152
1 8
2 7
3 6
4 5
RA-560
R153
1 8
2 7
3 6
4 5
RA-560
R155
1 8
ADQ17
2 7
ADQ1
3 6
ADQ16
4 5
ADQ0
RA-560
R158
1 8
ACKE
2 7
/AWE
3 6
/ACS
4 5
ACBS
RA-560
R159
1 8
ADQM0
2 7
ADQM1
3 6
/ACAS /CAS
4 5
/ARAS
RA-560
R160
1 8
ABA
2 7
AMA10
3 6
AMA0
4 5
AMA1
RA-560
R161
1 8
AMA2
2 7
AMA3
3 6
AMA4
4 5
AMA5
RA-560
R162
1 8
AMA6
2 7
AMA7
3 6
AMA8
4 5
AMA9
RA-560
DQ31
DQ15
DQ30
DQ14
DQ29
DQ13
DQ28
DQ12
DQ27
DQ11
DQ26
DQ10
DQ25
DQ9
DQ24
DQ8
DQ23
DQ7
DQ22
DQ6
DQ21
DQ5
DQ20
DQ4
DQ19
DQ3
DQ18
DQ2
DQ17
DQ1
DQ16
DQ0
CKE
/WE
/CS
DQM0
DQM1
/RAS
BA
MA10
MA0
MA1
MA2
MA3
MA4
MA5
MA6
MA7
MA8
MA9
DVCC3
C163
47uF/LESR
DVCC3
C173
47uF/LESR
ADQ[0..31]
SDCLKI
CKE
/CS
/WE
/CAS
/RAS
BA
DQM0
DQM0
MA0
MA1
MA2
MA3
MA4
MA5
MA6
MA7
MA8
MA9
MA10
L26
C171
QT2012
+
104
L27
C181
QT2012
+
104
U12
35
CLK
34
CKE
18
CS#
15
WE#
16
CAS#
17
RAS#
19
BA
14
DQML
36
DQMH
21
A0
22
A1
23
A2
24
A3
27
A4
28
A5
29
A6
30
A7
31
A8
32
A9
20
A10
33
NC
37
NC
MT48LC1M16A1 TSOP50
C164
C172
C165
C166
C167
+
104
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
C175
104
DRAWING
104
104
47uF/LESR
47uF/LESR
VDDQ
VDDQ
VDDQ
VDDQ
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
VSSQ
VSSQ
VSSQ
VSSQ
AMA[0..10]
VDD
VDD
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
VSS
VSS
C174
+
1
25
7
13
38
44
2
3
5
6
8
9
11
12
39
40
42
43
45
46
48
49
4
10
41
47
26
50
APPROVED
104
C182
104
LP-10R01 Frame Rate Conversion
C168
104
104
C176
C177
C178
104
104
DVCC3T_M2
SDCLKI
CKE
/CS
/WE
/CAS
/RAS
BA
DQM1
DQM1
MA0
MA1
MA2
MA3
MA4
MA5
MA6
MA7
MA8
MA9
MA10
TAIWAN VIDEO SYSTEM CO.,LTD.
Size Document Number Rev
B
LP-10R01 Frame Rate Conversion
Date: Sheet
DVCC3T_M1
C169
C170
104
104
C179
C180
104
104
U13
35
CLK
34
CKE
18
CS#
15
WE#
16
CAS#
17
RAS#
19
BA
14
DQML
36
DQMH
21
A0
22
A1
23
A2
24
A3
27
A4
28
A5
29
A6
30
A7
31
A8
32
A9
20
A10
33
NC
37
NC
MT48LC1M16A1 TSOP50
VDD
VDD
VDDQ
VDDQ
VDDQ
VDDQ
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
VSSQ
VSSQ
VSSQ
VSSQ
1
25
7
13
38
44
2
DQ16
3
DQ17
5
DQ18
6
DQ19
8
DQ20
9
DQ21
11
DQ22
12
DQ23
39
DQ24
40
DQ25
42
DQ26
43
DQ27
45
DQ28
46
DQ29
48
DQ30
49
DQ31
4
10
41
47
26
VSS
50
VSS
0
of
59Friday, March 30, 2001
Page 17
P.03
P.03
P.03,09,10
P.03,09,10
P.06
P.06
P.06
P.06
P.06
P.06
CLAMP
HSTOPLL
HREVEN[0..7]
HGEVEN[0..7]
HBEVEN[0..7]
HRODD[0..7]
HGODD[0..7]
HBODD[0..7]
P.09
P.09
7.6 ASI 321
P.09
H2_VDDI
P.09
H2_VDDO
CLAMP
P.02
HSYNC
P.02
VSYNC
P.03
CSYNC
P.03
SCL
SDA
HBODD[0..7]
HSFRMPLL
P.03
GCLOCK
HREVEN0
HREVEN1
HREVEN2
HREVEN3
HREVEN4
HREVEN5
HREVEN6
HREVEN7
H2_PLLVDD0
H2_PLLVDD1
Y2
14.318MHz
HGEVEN0
HGEVEN1
HGEVEN2
HGEVEN3
HGEVEN4
HGEVEN5
HGEVEN6
HGEVEN7
HBEVEN0
HBEVEN1
HBEVEN2
HBEVEN3
HBEVEN4
HBEVEN5
HBEVEN6
HBEVEN7
HRODD0
HRODD1
HRODD2
HRODD3
HRODD4
HRODD5
HRODD6
HRODD7
R173
1M
HSTOPLL
SCL
SDA
HREVEN[0..7]
HGEVEN[0..7]
HBEVEN[0..7]
HRODD[0..7]
HGODD[0..7]
H2_PLLVDD0
H2_PLLVDD1
C187 10pF
C188 10pF
HSFRMPLL
HGODD0
HGODD1
HGODD2
HGODD3
HGODD4
HGODD5
HGODD6
HGODD7
HBODD0
HBODD1
HBODD2
HBODD3
HBODD4
HBODD5
HBODD6
HBODD7
R172 0
R175 1K
H2_VDDO
HSYNC
VSYNC
CSYNC
GCLOCK
H2_VDDI
64
63
62
61
60
59
58
69
70
37
36
35
34
33
32
31
30
47
46
45
42
41
40
39
38
57
56
54
53
51
50
49
48
11
10
9
6
5
4
3
2
19
18
17
16
15
14
13
12
29
28
27
26
25
24
23
22
255
256
254
1
71
72
73
74
75
76
77
78
79
66
65
67
68
XTALOUT
U14
CLAMP
HSYNC
VSYNC
CSYNC
HSFRMPLL
HSTOPLL
GCLOCK
SCL
SDA
DREVEN[0]
DREVEN[1]
DREVEN[2]
DREVEN[3]
DREVEN[4]
DREVEN[5]
DREVEN[6]
DREVEN[7]
DGEVEN[0]
DGEVEN[1]
DGEVEN[2]
DGEVEN[3]
DGEVEN[4]
DGEVEN[5]
DGEVEN[6]
DGEVEN[7]
DBEVEN[0]
DBEVEN[1]
DBEVEN[2]
DBEVEN[3]
DBEVEN[4]
DBEVEN[5]
DBEVEN[6]
DBEVEN[7]
DRODD[0]
DRODD[1]
DRODD[2]
DRODD[3]
DRODD[4]
DRODD[5]
DRODD[6]
DRODD[7]
DGODD[0]
DGODD[1]
DGODD[2]
DGODD[3]
DGODD[4]
DGODD[5]
DGODD[6]
DGODD[7]
DBODD[0]
DBODD[1]
DBODD[2]
DBODD[3]
DBODD[4]
DBODD[5]
DBODD[6]
DBODD[7]
DHSYNC
DVSYNC
DVALID
DPCLK
VPCLK
VDATA[0]
VDATA[1]
VDATA[2]
VDATA[3]
VDATA[4]
VDATA[5]
VDATA[6]
VDATA[7]
PLLVDDO
PLLVSSO
PLLVDD1
PLLVSS1
ASI320
52
7
106
126
141
160
181
242
211
197
228
VDDO
VDDO
VDDO
VDDO
VDDO
VDDO
VDDO
VDDO
VDDO
VDDO
VDDO
VDDO
Digital Input
Video Input
VSSO
VSSI
VSSI
VSSO
VSSO
VSSI
VSSI
VSSI
VSSI
55
43208
80
96
102
150
172
223
P.10
P.10
P.10
P.10
P.10
P.10
21
VSSO
122
44
VDDI
VDDI
VSSO
VSSO
135
147
3VRST
H2_INT
/WR
/RD
ALE
/PSEN
151159
VDDI
VSSO
171
VDDIVSSO
174
224
VDDI
VSSO
186
VDDI
VSSO
198
ADQ0
214
VSSO
208
ADQ1
216
DQ0
DQ1
VSSO
VSSO
219
3VRST
H2_INT
/WR
/RDXTALIN
ALE
/PSEN
ADQ2
218
231
ADQ3
221
DQ2
256
VSSO
240
ADQ4
225
DQ3
VSSO
250
ADQ5
227
DQ4
VSSO
ADQ6
DQ5
1
ADQ10
ADQ9
ADQ12
ADQ7
ADQ8
ADQ11
230
233
235
237
239
243
245
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
RESET
INTWRRD
818283
848586878889909192
94
ADQ13
ADQ14
247
DQ12
DQ13
ALE
CS
95
ADQ15
249
252
DQ14
100
XTALIN
ADQ17
ADQ16
ADQ18
215
217
220
DQ15
DQ16
DQ17
DQ18
AD[0]
XTALIN
XTALOUT
101
XTALOUT
AD0
ADQ19
ADQ20
222
DQ19
AD[1]
AD1
AD2
ADQ21
226
DQ20
AD[2]
AD3
ADQ22
229
232
DQ21
64
AD[3]
AD4
ADQ24
ADQ23
234
DQ22
DQ23
128
AD[4]
AD[5]
AD5
AD6
236
DQ24
AD[6]
ADQ25
ADQ26
238
241
DQ25
AD[7]
93
AD7
ADQ27
244
DQ26
979899
TEST
ADQ28
ADQ29
246
DQ27
DQ28
TEST
SCAN
SCAN
AD[0..7]
ADQ30
248
DQ29
ADQ31
251
253
DQ30
DQ31
MCLOCK
PCLOCKI
112
113
114
213
212
207
DQM0
DQM1
OLVALID
OLFB
OLINT
OLRED
115
116
117
118
R174 1K
R176 NC
R177 1K
P.10
206
205
204
WE
CAS
RAS
CKE
OLGREEN
OLBLUE
OLCLK
119
120
203
202
201
BA
CS
209
CBS
SDCLK
210
SDCLKI
199
196
195
194
193
192
191
190
189
188
200
155
154
153
152
149
148
146
145
144
143
142
140
139
138
137
136
134
133
132
131
130
129
128
127
185
184
183
182
180
179
178
177
176
175
173
170
169
168
167
166
165
164
163
162
161
158
157
156
121
123
124
125
111
110
109
108
107
105
104
103
APPROVED
AMA0
AMA1
AMA2
AMA3
AMA4
AMA5
AMA6
AMA7
AMA8
AMA9
AMA10
ROUT02
ROUT03
ROUT04
ROUT05
ROUT06
ROUT07
GOUT02
GOUT03
GOUT04
GOUT05
GOUT06
GOUT07
BOUT02
BOUT03
BOUT04
BOUT05
BOUT06
BOUT07
R163 33 L28 QT2012
R164 33 L29 QT2012
R165 33 L30 QT2012
R166 33 L31 QT2012
PIO0
PIO1
PIO2
PIO3
PIO4
PIO6
DRAWING
REVEN[0]
REVEN[1]
REVEN[2]
REVEN[3]
REVEN[4]
REVEN[5]
REVEN[6]
REVEN[7]
GEVEN[0]
GEVEN[1]
GEVEN[2]
GEVEN[3]
GEVEN[4]
GEVEN[5]
GEVEN[6]
GEVEN[7]
BEVEN[0]
BEVEN[1]
BEVEN[2]
BEVEN[3]
BEVEN[4]
BEVEN[5]
BEVEN[6]
BEVEN[7]
RODD[0]
RODD[1]
RODD[2]
RODD[3]
RODD[4]
RODD[5]
RODD[6]
RODD[7]
GODD[0]
GODD[1]
GODD[2]
GODD[3]
GODD[4]
GODD[5]
GODD[6]
GODD[7]
BODD[0]
BODD[1]
BODD[2]
BODD[3]
BODD[4]
BODD[5]
BODD[6]
BODD[7]
PHSYNC
PVSYNC
NC
187
H2_VDDO
MA[0]
MA[1]
MA[2]
MA[3]
MA[4]
MA[5]
MA[6]
MA[7]
MA[8]
MA[9]
MA[10]
PVALID
PCLK
PIO[0]
PIO[1]
PIO[2]
PIO[3]
PIO[4]
PIO[5]
PIO[6]
PIO[7]
LP-10R01 ASI321
192
ADQ[0..31]
ADQM0
ADQM1
/ACAS
/ARAS
ACKE
/AWE
/ACS
ACBS
ABA
SDCLK
SDCLKI
AMA[0..10]
ROUT0[2..7]
GOUT0[2..7]
BOUT0[2..7]
R167 NC
R168 NC
R169 NC
R170 1K
R201 NC
R202 NC
PIO4
LVDS P.11
PIO6
AD9884
P.03
TAIWAN VIDEO SYSTEM CO.,LTD.
Size Document Number Rev
Custom
LP-10R01 ASI321
Date: Sheet
ADQ[0..31]
ADQM0
ADQM1
/ACAS
/ARAS
ACKE
/AWE
/ACS
ACBS
ABA
SDCLK
SDCLKI
P.07
P.07
P.07
P.07
P.07
P.07
P.07
P.07
P.07
P.07
P.07
P.07
AMA[0..10]
ROUT0[2..7]
GOUT0[2..7]
BOUT0[2..7]
C183
C184
10pF
100pF
C185
100pF
P.07
P.11
P.11
P.11
C186
100pF
PVALID
PHSYNC
PVSYNC
PCLK
69Friday, March 30, 2001
GND_POWER
of
P.11
P.11
P.11
P.11
0
Page 18
7.7 ASI 321 Power & EXT. OSD
DVCC3
AVCC3
DVCC3
AVCC3
P.01
P.01
L32 QT2012
C189
+
47uF/10V,LESR
DVCC3 H2_VDDI
C209
+
47uF/10V,LESR
C219
+
47uF/10V,LESR
AVCC3 H2_PLLVDD1
C223
+
47uF/10V,LESR
C190
C191
104
47uF/10V,LESR
L34 QT2012
C210
C211
47uF/10V,LESR
104
L35 QT2012
C220
C221
104
47uF/10V,LESR
L36 QT2012
C224
C225
47uF/10V,LESR
104
+
C192
C193
C194
C195
104
104
104
C199
C200
104
104
+
C212
C213
104
+
C222
104
+
C226
104
C214
104
104
H2_PLLVDD0AVCC3
104
C201
104
C215
104
C196
104
C202
104
C216
104
H2_PLLVDD0
H2_PLLVDD1
P.08
C197
104
C203
104
C217
104
P.08
H2_VDDODVCC3
C198
104
C204
104
C218
104
GND_POWER
H2_VDDO
H2_VDDI
P.08
P.08
DRAWING
APPROVED
LP-10R01 ASI321 Power & Ext. OSD
TAIWAN VIDEO SYSTEM CO.,LTD.
Size Document Number Rev
B
LP-10R01 ASI321 Power & EXT. OSD
Date: Sheet
of
79Friday, March 30, 2001
0
Page 19
7.8 Microcontroller
P.01
P.01
P.08
P.08
DVCC5
C227
10pF
C228
10pF
DVCC5
DVCC3
SCL
SDA
AD[0..7]
/PSEN
U17
32
PSEN
RST
10
21
20
12
23
34 33
44
C231
22
LEDA
LEDB
RST
XTAL1
XTAL2
1
NC
NC
NC
NC ALE
VCC
VSS
M6750(ALI)
R191 10K
R192 10K
D12
1N4148
R221 1K
DVCC5
1M
R178 100
R179
Y3
24.00MHz
C230
C229
104
104
104
VCC
DVCC5
DVCC3
SCL
SDA
2 1
C239
+
10uF/25V
P0.0,AD0
P0.1,AD1
P0.2,AD2
P0.3,AD3
P0.4,AD4
P0.5,AD5
P0.6,AD6
P0.7,AD7EA
P2.0,A8
P2.1,A9
P2.2,A10
P2.3,A11
P2.4,A12
P2.5,A13
P2.6,A14
P2.7,A15
RXD,P3.0
TXD, P3.1
INT0, P3.2
INT1,P3.3
T0, P3.4
T1, P3.5
WR, P3.6
RD, P3.7
T2, P1.0
T2EX, P1.1
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7
DVCC5
R193
10K
R200
6.8K
43
42
41
40
39
38
37
3635
24
25
26
27
28
29
30
31
11
13
14
15
16
17
18
19
2
3
4
5
6
7
8
9
14
3 4
7
Q7
3906
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
R181
220
U9B
74HCT14
RXD
TXD
R180 1K
R199 0
LEDA
/WR
/RD
ALE
KS0
KS2
KS3
KS4
KS5
INV_ON/OFF
PANEL_ON/OFF
DVCC3
Q6
3906
R182
220
GND
DVCC5
LEDB
R184 10K
LED0
LED1
C240
104
H2_INT
DVCC5
R194
510
R196
1K
RST
3VRST
R183
10K
C233
104
R185
10K
C235
104
R186
10K
C236
104
R187
10K
C237
104
3VRST
/WR
/RD
R190
1K
SDA
SER1
1
RXD
2
3
TXD
4
H2_INT
5
PIN HEAD/2.0
ALE
/PSEN
AD[0..7]
INV_ON/OFF
PANEL_ON/OFF
H2_INT
GND POWER
VCC5
DVCC5
R188
10K
C238
104
40
KEY1
LED0
1
2
LED1
3
KS0
4
KS2
5
KS3
6
KS4
7
KS5
8
WAFER,2002-08,DIP
KS0:POWER
KS1:X
KS2:UP
KS3:DOWN
KS4:ENTER+MENU
KS5:AUTO
1829
7
1
DVCC5
U19
1
NC
2
R189
1K
SCL
NC
3
NC
7
WC
6
SCL
4
GND
24C08/DIP
APPROVED
LP-10R01 Panel Micro-controller
VCC5
VCC
8
VCC
SDA
C232
104
5
SERIAL PORT
DRAWING
TAIWAN VIDEO SYSTEM CO.,LTD.
Size Document Number Rev
B
LP-10R01 Microcontroller
Date: Sheet
3VRST
/WR
/RD
ALE
/PSEN
AD[0..7]
INV_ON/OFF
PANEL_ON/OFF
H2_INT
GND_POWER
89Friday, March 30, 2001
of
P.05
P.08
P.08
P.08
P.08
P.08
P.08
P.01
P.01
P.08
0
Page 20
7.9 Panel Interface
P.01
P.01
P.08
ROUT0[0..5]
P.08
GOUT0[0..5]
P.08
BOUT0[0..5]
PVCC
DVCC3
ROUT0[0..5]
GOUT0[0..5]
BOUT0[0..5]
PVCC
DVCC3
ROUT02
ROUT03
ROUT04
ROUT05
ROUT06
ROUT07
GOUT02
GOUT03
GOUT04
GOUT05
GOUT06
GOUT07
BOUT02
BOUT03
BOUT04
BOUT05
BOUT06
BOUT07
P.08
P.08
P.08
P.08
P.08
RA25
1 8
2 7
3 6
4 5
R*4_56
RA26
1 8
2 7
3 6
4 5
R*4_56
RA27
1 8
2 7
3 6
4 5
R*4_56
RA28
1 8
2 7
3 6
4 5
R*4_56
RA29
1 8
2 7
3 6
4 5
R*4_56
RA30
1 8
2 7
3 6
4 5
R*4_56
PCLK
PHSYNC
PVSYNC
PVALID
PIO4
GND_POWER
AROUT02
AROUT03
AROUT04
AROUT05
AROUT06
AROUT07
AGOUT02
AGOUT03
AGOUT04
AGOUT05
AGOUT06
AGOUT07
ABOUT02
ABOUT03
ABOUT04
ABOUT05
ABOUT06
ABOUT07
PCLK
PHSYNC
PVSYNC
PVALID
PIO4
GND_POWER
PIO4
PHSYNC
PVSYNC
DVCC3
R222
NC
R219 NC
R220 NC
R171
PVALID
PCLK
NC
DVCC3
AROUT02
AROUT03
AROUT04
AROUT05
AROUT06
AROUT07
AGOUT02
AGOUT03
AGOUT04
AGOUT05
AGOUT06
AGOUT07
ABOUT02
ABOUT03
ABOUT04
ABOUT05
ABOUT06
ABOUT07
C259
NC
L37 QT2012
28212937
U20
44
R0
45
R1
47
R2
48
R3
1
R4
SN75LVDS84A(TI)
3
R5
4
G0
6
G1
7
G2
9
G3
10
G4
12
G5
13
B0
15
B1
16
B2
18
B3
19
B4
20
B5
14
R_FB
25
ENAB
26
CLKIN
27
PWR DWN
22
TIN18
23
TIN19
43
NC
GND
51117243031364246
VCC
GND
VCC
GND
VCC
TxOUT0+
TxOUT0+
TxOUT1TxOUT1+
TxOUT2TxOUT2+
TxCLK OUT-
TxCLK OUT+
GND
PLLGND
GND
PLLGND
28
PVCC
IN0- IN0+
IN1-
IN2-
CLK-
PVI 10.4" PANEL USED
PLLVCC
PLLVCC
LVDSVCC
41
IN0-
40
IN0+
39
IN1-
38
IN1+
IN2-
35
IN2+
34
33
CLK-
32
CLK+
LVDSGND
LVDSGND
LVDSGND
P7
12
34
56
78
910
11 12
13 14
15 16
17 18
19 20
2004PR-10/2.0
NOTE:
IN0_ »P IN0+ ¦ÜP7¥²¶·¨â¨â¨Ã¦æ,³Ì¦nµ¥ªø
IN1+
IN2+
CLK+
GND_POWER
IN1_ »P IN1+¦ÜP7¥²¶·¨â¨â¨Ã¦æ,³Ì¦nµ¥ªø
IN2_ »P IN2+¦ÜP7¥²¶·¨â¨â¨Ã¦æ,³Ì¦nµ¥ªø
CLK- »P CLK+¦ÜP7¥²¶·¨â¨â¨Ã¦æ,³Ì¦nµ¥ªø
PLLVCC
DVCC3
C241
104
C242
104
C243
104
C246
104
C247
104
DRAWING
APPROVED
LP-10R01 Panel Interface
TAIWAN VIDEO SYSTEM CO.,LTD.
Size Document Number Rev
Custom
LP-10R01 Panel Interface
Date: Sheet
0
of
99Friday, March 30, 2001
Page 21
9.0 Parts List
P/N LOCATION P/N LOCATION
213-0630-033 FH SCREW 213-0630-043 FH SCREW
216-0830-042 BH SCREW 216-0830-043 BH SCREW
216-0840-031 BH SCREW 218-0408-036 六角止滑螺帽
219-0408-A74 盤形華司 219-0410-153 WASHER
222-0000-002 CONNECTOR 222-0000-003 扁頭螺絲
302-0054-000 ID LABEL 302-0054-000 ID LABEL
305-1259-000 CARTON 305-1168-000 CARTON
305-3260-000 CARTON 306-0061-000 CARTON LABEL
306-0071-000 CARTON LABEL 312-0123-101 USER MANUAL
400-0101-150 POWER CORD 356-5613-000 FRONT PANEL
356-5613-102 CONTROL PANEL 356-5613-111 REAR COVER
356-5613-112 ARM COVER 356-5613-444 SWIVEL BASE
356-5613-446 ADRON COVER 356-5613-889 CONTROL KEYS
356-5695-910 LED LENS 357-0202-002 BASE PAD
357-0631-001 手把(PE) 412-0020-004 VGA CABLE
421-6214-169 L/W HOUSING 421-6305-170 L/W HOUSING
421-6602-168 L/W HOUSING 451-7004-033 MYLAR FILM
451-7104-032 PVC隔離片 460-0001-350 PHLYFORM
470-0010-020 PE BAG 470-0011-022 夾鍊袋
501-1043-121 LCD PANEL 560-1000-002 AC ADAPTER
602-LCD0-006 FIXED BRACKET 602-LCD0-017 ARM U PLATE
602-LCD0-019 BASE PLATE 602-LCD0-020 RIGHT HINCGE BRACKET
602-LCD0-021 LEFT HINGE BRACKET 604-0005-559 JACK PLATE
604-0030-310 SHIELDING PLATE 604-0003-312 SUB SHIELD PLATE
605-0100-001 EMI導電膠銅箔 621-0811-004 3M 1350膠帶
891-0010-010 KEYPAD 891-0060-278 CHASSIS ASS'Y
891-0070-347 PACKING MTR'L 891-0100-057 MAIN BOARD
891-0250-003 LCD INVERTER
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