Taiwan Memory Technology T15M256B-85RI, T15M256B-85R, T15M256B-85P, T15M256B-85PI, T15M256B-85DI Datasheet
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TE
CH
tm
T15M256B
TM Technology Inc. reserves the right P. 1 Publication Date: MAY. 2002
to change products or specifications without notice. Revision:A
SRAM
32K X 8 LOW POWER
CMOS STATIC RAM
FEATURES
• High speed access time: 50/70/85/100ns
• Low power supply current :
- Operating :35mA(max)
- Standby : 10uA
• Power supply : 5V (± 10%)
• Fully static operation – No clock or refreshing
required
• All inputs and outputs directly LVTTL
compatible
• Common I/O capability
• Data retention voltage : 1.5V (min)
• Available packages :
28-pin DIP(600mil),SOJ, SOP, TSOP-I
(8x13.4mm forward type and reverse type).
•
Operating temperature :
- 0 ~ +70 °C
- -40 ~ +85 °C
PART NUMBER EXAMPLES
PART NO.
PACKAGE
CODE
Operating
Temperature
T15M256B-70N
T15M256B-70J
T15M256B-70D
T15M256B-85P
T15M256B-85R
N=DIP
J=SOJ
D=SOP
P=
TSOP-I(Forward)
R= TSOP-I(Reverse)
0 ~ +70 °C
T15M256B-70NI
T15M256B-70JI
T15M256B-70DI
T15M256B-85PI
T15M256B-85RI
N=DIP
J=SOJ
D=SOP
P=
TSOP-I(Forward)
R= TSOP-I(Reverse)
-40 ~ +85 °C
GENERAL DESCRIPTION
The T15M256B is a low power CMOS static
RAM. organized as 32,768 x 8 bits that operates
on a single 5-volt power supply. Low operating
and standby current . Data retention is guaranteed
at a power supply voltage as low as 1.5V. This
device is packaged in a standard 28-pin
DIP(600mil), SOJ, SOP, TSOP-I forward and
reverse type.
BLOCK DIAGRAM
DECODER
CONTROL
A0
→
A14 →
CS
→
OE
→
WE
→
←
I/O1
←
I/O8
Vcc →
DATA I/O
CORE
ARRAY
→Vss
.
.
.
.
.
TE
CH
tm
T15M256B
TM Technology Inc. reserves the right P. 2 Publication Date: MAY. 2002
to change products or specifications without notice. Revision:A
PIN CONFIGURATION
A1 2
A1 4
A7
A6
A5
A3
A4
A2
A1
A0
I/O 1
I/O 2
I/O 3
Vs s
28
27
26
25
23
24
22
21
20
19
18
17
16
15
1
2
3
4
6
5
7
8
9
10
11
12
13
14
Vcc
A13
A8
A9
A11
A10
I/O8
I/O7
I/O6
I/O5
I/O4
WE
OE
CS
DIP
&
SOJ
A12
A14
A7
A6
A5
A3
A4
A2
A1
A0
I/O1
I/O2
I/O3
Vss
28
27
26
25
23
24
22
21
20
19
18
17
16
15
1
2
3
4
6
5
7
8
9
10
11
12
13
14
Vcc
A13
A8
A9
A11
A10
I/O8
I/O7
I/O6
I/O5
I/O4
WE
OE
CS
SOP
PIN DESCRIPTION
SYMBOL DESCRIPTION
A0 - A14 Address Inputs
I/O1 - I/O8 Data Inputs/Outputs
CS
Chip Select Inputs
WE
Write Enable
OE
Output Enable
Vcc Power Supply
Vss Ground
TSOP-I
Forward
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
OE
A11
A9
A8
A13
WE
VCC
A14
A12
A7
A6
A5
A4
A3
A10
CS
I/O8
I/O7
I/O6
I/O5
I/O4
VSS
I/O3
I/O2
I/O1
A0
A1
A2
TSOP-I
Reverse
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
A3
A4
A5
A6
A7
A12
A14
VCC
WE
A13
A8
A9
A11
OE
A2
A1
A0
I/O1
I/O2
I/O3
VSS
I/O4
I/O5
I/O6
I/O7
I/O8
CS
A10
TE
CH
tm
T15M256B
TM Technology Inc. reserves the right P. 3 Publication Date: MAY. 2002
to change products or specifications without notice. Revision:A
DC CHARACTERISTICS ABSOLUTE MAXIMUM RATINGS
PARAMETER RATING UNIT
Supply Voltage to Vss Potential -0.5 to + 7V V
Inputs to Vss Potential -0.5 to Vcc +0.5 V
Power Dissipation 0.7 W
Storage Temperature -60 to +150 °C
RECOMMENDED OPERATING CONDITIONS
PARAMETER SYM MIN TYP MAX UNIT
Supply Voltage Vcc 4.5 5 5.5 V
Input Voltage, low
V
IL
-0.3 - 0.8 V
Input Voltage, high
V
IH
2.2 - Vcc+0.3 V
Ambient Temperature
T
A
0/-40 - +70/+85 °C
TRUTH TABLE
CS OE WE
MODE I/O1- I/O8 Power
H X X Not Selected High-Z Standby
L H H Output Disable High-Z Active
L L H Read Data Out
Active
L X L Write Data In
Active
OPERATING CHARACTERISTICS
(Vcc = 5V /
± 10%
, Vss = 0V, Ta =
0 ~ +70 °C
/-40 to 85°C)
PARAMETER SYM. TEST CONDITIONS MIN. TYP. MAX. UNIT
Input Leakage Current
I
LI
Vin=Vss to Vcc - - 1 uA
Output Leakage Current
I
LO
V
I/O
=Vss to Vcc ,
CS
=
V
IH
or
OE
= VIH or WE = VIL
- - 1 uA
Output Low Voltage
V
OL
I
OL
= + 2.1mA
- - 0.4 V
Output High Voltage
V
OH
IOH= - 1.0mA
2.4 - - V
-50 - - 35 mA
-70 - - 30 mA
-85 - - 25 mA
Operating Power
Supply Current
Icc
CS=
V
IL
, I/O=0mA
Cycle = MIN.
Duty = 100%
-100
- - 20 mA
I
SB
CS
=VIH, Cycle=min, Duty=100%
- - 0.3 mA
Standby Power
Supply Current
I
SB1
CS ≥
V
cc
-0.2V
- - 10 uA
TE
CH
tm
T15M256B
TM Technology Inc. reserves the right P. 4 Publication Date: MAY. 2002
to change products or specifications without notice. Revision:A
CAPACITANCE
(Vcc = 5V /
± 10%
, Ta = 25°C, f = 1 MHz)
PARAMETER SYMBOL CONDITION MAX. UNIT
Input Capacitance
C
IN
V
IN
= 0V
6 pF
Input/ Output Capacitance
C
I/O
V
OUT
= 0V
8 pF
Note: These parameters are sampled but not 100% tested.
AC TEST CONDITIONS
PARAMETER CONDITIONS
Input Pulse Levels 0V to 3V
Input Rise and Fall Times 3 ns
Input and Output Timing Reference Level 1.5V
Output Load See Fig. 1,2
AC TEST LOADS AND WAVEFORM
R1 - 1928 ohm
5V
OUTPUT
30pF
Including
Jig and
Scope
R2
1020 ohm
R1- 1928 ohm
5V
OUTPUT
5pF
Including
Jig and
Scope
R2
1020
ohm
(For T
CLZ
, T
OLZ
, T
CHZ
, T
OHZ
, T
WHZ
, TOW )
Fig 1
Fig 2
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