Systemyde 41CL User Manual

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41CL Calculator

41CL User Manual

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41CL User Manual

Every effort has been made to ensure the accuracy of the information contained herein. If you find errors or inconsistencies please bring them to our attention.

Notice:

“HP-41C”, “HP-41CV”, “HP-41CX” and “HP” are registered trademarks of Hewlett-Packard, Inc. All uses of these terms in this document are to be construed as adjectives, whether or not the noun “calculator”,

“CPU” or “device” are actually present.

Acknowledgements:

This project never could have succeeded without Warren Furlow’s excellent Web site hp41.org. And even more important was his SDK41R6 software suite, for code development, and his V41 program for code debugging. Numerous people have answered my dumb questions on the Web site hpmuseum.org, and the book “Inside the HP-41” by Jean-Daniel Dodin was invaluable for getting a foothold on understanding the HP-41 operating system and register usage.

Gene Wright was kind enough to be my voice at the HHC 2010 conference. ‘Angel Martincontributed valuable 41CL-specific software to the project.

Eric Rechlin made the labels for the front of the calculator. Nate Martin modified his Port cover 3-D model specially for use with the serial port jack. Benoit Maag provided the photograph of the different connector types. Geoff Quickfall provided the photographs of the older display driver and corresponding capacitor fix.

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41CL User Manual

Table of Contents

1. Introduction ......................................................................................................... 5

Can my calculator be upgraded? ................................................................7

2. Getting Started .................................................................................................... 9

Installing the 41CL Circuit Board ..............................................................9

Initial Software Configuration ....................................................................18

3. 41CL Extra Functions .........................................................................................20

Extra Functions Parameter Passing ........................................................... 21

MMU Functions ........................................................................................... 22

MMUCLR ...............................................................................................22

MMUDIS ................................................................................................ 22

MMUEN ................................................................................................. 22

MMU? .................................................................................................... 23

Turbo Functions ...........................................................................................23

TURBOX ............................................................................................... 23

TURBO2, TURBO5, TURBO10, TURBO20, TURBO50 ................24

TURBO? ................................................................................................24

Plug into Port/Unplug from Port Functions .............................................. 24

PLUG1, PLUG2, PLUG3, PLUG4 ..................................................... 25

PLUG1L, PLUG2L, PLUG3L, PLUG4L, PLUGP ............................26

PLUG1U, PLUG2U, PLUG3U, PLUG4U, PLUGH ..........................27

UPLUG1, UPLUG2, UPLUG3, UPLUG4 ..........................................28

UPLUG1L, UPLUG2L, UPLUG3L, UPLUG4L, UPLUGP ............. 28

UPLUG1U, UPLUG2U, UPLUG3U, UPLUG4U, UPLUGH ........... 29

Memory Block Functions ............................................................................ 29

YMCLR .................................................................................................. 29

YMCPY .................................................................................................. 30

Memory/IO Read and Write Functions ..................................................... 31

YPOKE .................................................................................................. 31

YPEEK ...................................................................................................32

Memory Buffer Functions ........................................................................... 32

YBPNT ...................................................................................................33

YBPNT? ................................................................................................ 33

YBUILD ................................................................................................. 34

Flash Memory Functions ............................................................................. 34

YFERASE ............................................................................................. 35

YFWR .....................................................................................................35

Serial Port Functions ................................................................................... 36

SERINI ................................................................................................... 37

BAUD12, BAUD24, BAUD48, BAUD96 ...........................................38

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41CL User Manual

YGETLB, YGETUB ..............................................................................38

YPUTLB, YPUTUB .............................................................................. 39

YEXP ......................................................................................................39

YIMP .......................................................................................................40

Miscellaneous Functions ..............................................................................41

YFNS? ................................................................................................... 41

Image Database Functions .......................................................................... 41

IMDB? ....................................................................................................41

Special MMU Functions .............................................................................. 43

MAPDIS .................................................................................................43

MAPEN ..................................................................................................44

4. Error Messgaes ....................................................................................................45

5. Functions Summary ............................................................................................ 46

6. Image Identifiers ................................................................................................. 49

7. Memory Management .........................................................................................61

The MMU and program addresses .............................................................61

The MMU and data addresses .................................................................... 64

8. Programming the MMU ..................................................................................... 67

Library-4 .......................................................................................................67

The FORTH ROM ....................................................................................... 67

The HP Service ROM .................................................................................. 68

9. Image Database ....................................................................................................69

10. Patching Code ......................................................................................................78

11. Using HEPAX ...................................................................................................... 80

Patching HEPAX ..........................................................................................83

Enabling HEPAX Disassembly ................................................................... 83

12. Serial Connector ..................................................................................................85

13. Time Clone Connections .....................................................................................87

14. Updating 41CL hardware ...................................................................................90

CPLD Programming ....................................................................................91

FPGA Programming ....................................................................................92

Flash Programming ..................................................................................... 92

15. Revision History .................................................................................................. 93

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41CL User Manual

Introduction

The 41CL design takes advantage of modern technology to significantly add to the capabilities of the 41C system. In particular, the 41CL provides the following features:

• All features of an HP-41CX except for the Time Module. CX Time functions (the

software) are included, but a Time module plugged into a Port (or our Time Clone mounted on the 41CL board) is required for full timer functionality.

• Full 600-register Extended Memory is built in.

• Support for the new 1024-register Expanded Memory.

• Over 390 plug-in module images are built in. Functions are included to allow these

images to be virtually plugged into a calculator Port and unplugged from a calculator Port.

• Turbo mode, which allows the calculator to run at up to 50X normal speed. Actual

values available are 2X, 5X, 10X, 20X and 50X.

• Numerous empty pages (4K in length) of Flash memory are available for non-volatile

storage.

• 122 pages (4K in length) of RAM are available. All RAM is continuously powered.

• A sophisticated Memory Management Unit (MMU) allows full access to the large

physical memory.

• Support for fifteen Alternate Configurations, where each configuration is a compete

set of images to be plugged into the Ports.

• Full bus compatibility for the Ports, allowing the use of any peripheral designed for

the HP-41 system.

• A full-duplex serial port is available when the optional serial connector is used. This

optional connector uses a 2.5mm stereo jack mounted in a blank port cover.

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With these features, however, come some drawbacks:

• Power consumption is higher, at least while the calculator is off or in light sleep

(between keystrokes). Where the original HP-41 required about 10 μA while off, the

41CL requires about 110 μA. This will lead to reduced battery life.

• The original HP-41 could retain memory contents for several minutes while the

batteries were changed. Because of the higher current consumption, the 41CL only retains the memory contents for a few seconds while the batteries are out. For this reason, you should probably have an extra battery holder ready to go when changing batteries.

• The advanced technology used in the 41CL is a double-edged sword. The Flash

memory, as well as the programmable logic devices used to implement the NEWT microprocessor, only guarantee data retention for 20 years.

The table below shows the typical current drain for the 41CL under various conditions. The serial port is powered up whenever it is connected to something with a valid signal level.

No Time Clone installed Time Clone installed

Calculator State

Off 110 μA 3.6 mA 340 μA 3.8 mA

Light Sleep

(between key presses)

Running (1x) (Note 1) 7.1 mA 10.6 mA 7.3 mA 10.8 mA

Running (50x) (Note 2) 12.1 mA 15.6 mA 12.3 mA 15.8 mA

Flash Erase (Note 3) 46.0 mA 49.5 mA 46.2 mA 49.7 mA

Serial port

off

3.6 mA 7.1 mA 3.8 mA 7.3 mA

Serial port

off

Serial port

Note 1: Measured during a CAT 2 operation.

Note 2: Measured during a normal (not CPONLY mode) FLCHK? operation. See the 41CL Update Functions for details.

Note 3: This peak current lasts for less than 500 mS.

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Can my calculator be upgraded?

The 41CL is an upgrade created by replacing the CPU circuit board in a 41C/CV/CX with the 41CL circuit board. This replacement is only possible for calculators that actually have a CPU circuit board. The easiest way to tell if this is the case is to look at the HP-41 display. If the light part of the display has square corners, like those shown below, the calculator is a candidate for replacing the CPU circuit board.

Hewlett-Packard changed the display driver circuitry in the 41 series during production, and this change affected one component value on the CPU circuit board. The 41CL circuit board implements the component value used in later production units. Units with the correct display driver can be identified as follows:

• If your 41C (not CV or CX) has a serial number starting with “1954” or larger it uses

the correct display driver.

• If your 41CV/CX has a serial number starting with “2003” or larger it uses the correct

display driver.

It is theoretically possible to use the 41CL circuit board with the older display driver, but

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this requires soldering an extra capacitor to the calculator main board. Refer to the next section for the details.

In addition to the display driver change, Hewlett-Packard also experimented with different methods of connecting the CPU board to the main board. Unfortunately it is not possible to identify units that used these different connection methods via the serial number. Identifying such a calculator is a step in the installation process covered in the next section.

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Getting Started

The 41CL circuit board is designed to be a drop-in replacement for the original CPU circuit board, and the installation is not difficult. However, certain precautions must be taken to prevent damage to both old and new circuitry.

All integrated circuits are susceptible to damage from electrostatic discharge (ESD). If you have access to an electrostatically protected work area by all means use it. If not, make sure that you ground yourself immediately before starting the installation process. The best way to keep from generating a static charge is to not move around while working, so make sure you have everything required before starting the process. Do not

touch exposed conductors, and handle both the original CPU circuit board and the 41CL circuit board by the edges. The 41CL circuit board has a 2mm space around the

edges devoid of circuitry or components to facilitate handling in this manner.

Tools required for the installation are a small Phillips-head screwdriver, an Xacto knife or similar, a pair of tweezers, and a small flashlight.

Installing the 41CL circuit board

Follow the steps below to perform the installation:

1. Read through all of these instructions before starting the installation process, to make

sure that you understand each step. We are not responsible if you damage or ruin

your calculator or the 41CL circuit board while attempting this installation.

2. Verify that your calculator is one that has a CPU circuit board. Only calculators with

“square corners” on the LCD display panel (refer to the Introduction section for a picture) have CPU circuit boards.

3. Remove the battery case, by first sliding the case towards the top of the calculator until

the bottom end of the battery case pops free. Install fresh batteries.

4. Carefully remove the four rubber feet, using a pointed knife to pry up one corner of a

foot and a pair of tweezers to lift the foot from the case. Be careful not to damage the feet, as replacements are difficult to find. They are attached to the calculator body using double-sided tape which can usually be reused.

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5. Remove the four screws located in the recesses under the rubber feet. Be very careful

not to lose them, as they are essentially impossible to find unless you want to buy 10,000 of them. The screws are all #2-28 trilobular thread-forming types. Those at the

bottom of the case are 1/4” (they may be 3/8” if the calculator has been serviced), while those at the top of the case are 3/4”.

6. Lift off the bottom case and the U-shaped center case section. Note the orientation (front-to-back) of the center case section, because it not symmetric. Don’t worry if your old CPU board looks slightly different from that shown in the picture below. These boards went through several revisions during the life of the 41C series.

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The photo below shows an early HP-41C with the type of display driver chips that will require an extra component if used for the 41CL. If your calculator looks like the previous photo, with grey epoxy blobs, proceed to step 7.

The early display driver required a different capacitor value to control the time delay for the auto-off function. The photo below shows the required 10nF capacitor soldered in place. The type of capacitor is not critical, but it must be able to tolerate 6 volts.

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7. STOP! Before lifting the old CPU circuit board use a flashlight to look into the space

between the CPU circuit board and the base circuit board. You will be able to see which type of connector is being used. The photo below shows the three types of connector used by HP.

The connector style on the left has conductors wrapping three sides of the connector and will appear white when viewed from the side. This connector type is difficult to reuse and not really recommended.

The connector style in the middle is rare. It has conductors embedded vertically in the material and will appear white or pale pink from the side. This connector type is impossible to reuse, which is probably why it is rare. Unless you have a replacement connector you should fnd another calculator to use for the conversion.

The connector style on the right uses conductors rolled around a tubular material and will be shiny when viewed from the side. Being reusable, this type of connector is suitable for use with the 41CL circuit board.

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8. Before removing the old CPU circuit board, carefully inspect all four screw posts on

the front case. If they are cracked or broken (a common problem) they will need to be repaired before re-assembling the calculator. Instructions for this repair can be found on the Museum of HP Calculators web site. Repair the screw posts before proceeding any further.

9. Using only the edges of the board, carefully lift the old CPU circuit board off of the

base circuit board. The connectors will usually remain in place on the main circuit board. If by chance they do not, restore them to their proper location. The two halves of the connector are usually held together by a flexible piece of plastic that fits over the two screw posts just like the CPU circuit board. Some connectors were held in place by the black spacer hooking down around the ends of the connectors by about 1cm. This will interfere with several components on the bottom of the 41CL board. The spacer and connectors should look like those in the photograph below for a proper installation. If the spacer looks different, trim the excess material so that it looks like the case shown in the previous photo on the left or the right.

10. Using only the edges of the 41CL circuit board place this board on the main circuit

board, with the two lower screw posts going through the holes in the 41CL circuit board just as they did with the original CPU circuit board. Use the antistatic bag containing the 41CL circuit board to store the old CPU circuit board. Do not throw away the old CPU circuit board, as it may still have utility in the future. If you don’t want to store the old CPU circuit board, send it to us. Early versions of the 41C used

nuts screwed onto the posts to hold the CPU board in place. DO NOT use these nuts without first installing a nylon washer bewteen the 41CL board and each nut! The nuts are large enough to damage traces on the 41CL board! If you are

installing the optional serial connector, proceed with the steps below. Otherwise skip ahead to step 15.

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11. The 41CL circuit board contains a simple RS-232C serial port. The Receive Data,

Transmit Data and Ground signals for the serial port are present on the programming connector for the CPLD on the board. The optional serial connector contains a plug for this connector, connected through a cable to a 2.5mm stereo jack mounted in a blank Port cover. The serial connector is designed to occupy Port 1 on the calculator only. While it can be plugged into any other Port, doing so will interfere physically with the remaining Ports because of the cable.

CAUTION! The tension holding a 2.5mm plug in the serial connector jack is higher

than the tension holding the blank port cover in the calculator body. This means that trying to pull out the plug will tend to pull the blank port cover out of the calculator, potentially damaging the internal connections to the serial connector jack. So always remember to hold the blank port cover in place when attempting to remove the serial port plug from the calculator.

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12. Insert the connector end of the serial connector through Port 1 and in between the

space between the calculator body and the flexible Port connectors

13. Route the cable down the side of the calculator body, between the edge of the battery

compartment and the outside of the case. It is helpful to use double-sided tape to hold the cable in place next to the battery compartment between the Port and the battery charger Port.

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Note how the cable turns sharply near the bottom of the Port to take advantage of the space that will exist between the upper and lower halves of the case. It is easiest to route the cable with the center section of the case in place on the lower case half.

14. Carefully plug the connector on the cable into the connector jack on the 41CL circuit

board with the “CP” label next to it. This is the programming connector for the

CPLD. The connector used is very fragile and was not really designed for multiple insertions, so take your time, but make sure the plug is fully seated in the connector on the 41CL circuit board.

The two connectors for programming the CPLD and the FPGA on the board are identical, and plugging the serial port connector into the wrong one will damage the board. The 41CL circuit board is shipped with a blank plug in the FPGA connector to prevent accidently inserting the serial connector in the wrong jack.

This step is where the double-sided tape holding the cable in place is useful, as it keeps the cable from popping out of the channel on the side of the calculator where it resides.

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15. Carefully fit the center case section (with the proper orientation) and bottom case

back together with the remainder of the calculator body. If you installed the serial connector be very careful not to pinch the serial cable between the case halves.

16. Re-install the four screws. The proper way to do this is to slowly turn the screw

backwards until you feel the screw threads “click” into the threads in the post.

Carefully tighten the screws. Do not over-tighten the screws as you risk cracking or shearing off the screw posts. It is best to hold the case sections tightly together with one hand while tightening the screws with the other hand, as this reduces the stress the screws place on the screw posts and case pieces.

17. Re-install the battery case (with the new batteries) and turn the calculator on. If there

is no response the flexible connectors are not completely connecting the 41CL circuit board to the main circuit board, and you will need to either tighten the screws a little or reform the circular connector slightly. If garbage rather than the MEMORY

LOST message appears, try removing the battery pack for 30 seconds and re-

inserting it again. The display controller contains its own power-on-reset circuit, which sometimes does not properly synchronize with the CPU, leading to garbage in the display on power-up. This occasionally occurs even in the original design. If this doesn’t work try XEQ ALPHA TURBOX ALPHA, which guarantees operation at normal speed, even though the Turbo mode is supposed to be disabled at first poweron.

18. Once the 41CL circuit board installation is verified working, reinstall the calculator

feet, and proceed to the initial configuration of the software.

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Initial Software Configuration

The 41CL includes a set of functions that provide access to the new features of the NEWT microprocessor. When power is first applied or when the calculator is reset, resulting in the MEMORY LOST message, the 41CL Extra Functions are mapped to Page 7 to allow you to do the initial configuration of the calculator. This Page 7 mapping is enforced by the hardware for as long as the Memory Management Unit (MMU) is disabled.

During the initial configuration the 41CL Extra Functions must either be moved elsewhere so that Page 7 can be used by HP-IL Peripherals or the Page 7 entries in the MMU must be programmed to point to the 41CL Extra Functions after the MMU is enabled. Until the 41CL Extra Functions are moved from Page 7 HP-IL will not be available, and an HP-IL Module should not be inserted into the calculator because this will lead to bus conflicts.

The 41CL Extra Functions (YFNZ mnemonic) uses XROM #15. If this is going to

conflict with another module that you want to plug in please refer to the “Patching Code”

section later in this document. Note that some third-party software (CL Utilities, for example) requires the use of the XROM #15 version of the 41CL Extra Functions.

The 41CL Extra Functions image resides in an area of Flash memory that is protected from modification, so that it should always be available.

As you become more familiar with the 41CL, you may prefer to use the 41CL Extreme Functions (YFNX mnemonic), which provides a more convenient user interface that prompts for user input.

The minimum sequence for the initial configuration uses three 41CL Extra Functions

(these functions are explained in the next section). If you don’t need to use the advanced

features of the 41CL this is sufficient for the initial configuration. This sequence is:

1. XEQ ALPHA MMUCLR ALPHA initializes all of the MMU entries in memory, mak-

ing it safe to enable the MMU in the third step.

2. ALPHA YFNZ ALPHA XEQ ALPHA PLUG1L ALPHA plugs the 41CL Extra

Functions into the lower half of Port 1 (which is Page 8). Since the MMU is still dis- abled this has no effect yet. Note that any port can be used for the 41CL Extra Functions. Plugging the 41CL Extra Functions into a Port allows the use of HP-IL.

Or you can use ALPHA YFNZ ALPHA XEQ ALPHA PLUGH ALPHA to plug the 41CL Extra Functions into Page 7. This saves half of a Port, but means that HP-IL (including an HP-IL printer) will not be available. Since the MMU is still disabled this has no effect yet.

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41CL User Manual

3. Finally, XEQ ALPHA MMUEN ALPHA enables the MMU, which starts the redirec-

tion of either Page 8 or Page 7 to the 41CL Extra Functions. When using Page 8 any ROM module plugged into Port 1 will not be seen by the 41CL. However, Port 1 can still be used for modules with a fixed address such as the 82143A Printer, the 82160A HP-IL Module, the 82182A Time Module or the 82242A IR Printer Module.

Enjoy your new 41CL calculator! The only thing to remember is that the 41CL Extra Functions (or the 41CL Extreme Functions) must remain plugged into a Port for the new features to be available.

If you inadvertently plug another module image into the Port used by the 41CL Extra Functions, taking the place of these functions as far as the OS is concerned, try to recover by doing XEQ ALPHA YRES ALPHA. If this doesn’t work the only way to recover is either via BACKSPACE-ON (causing a MEMORY LOST condition) or by momentarily removing the battery pack.

The 41CL Extreme Functions allow the user to protect the MMU programming against accidental modification, and automatically protects itself against accidental deletion.

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41CL Extra Functions

The 41CL Extra Functions are required to provide access to the new features of the NEWT processor that powers the 41CL calculator. Depending on your level of experience and how adventurous you are, you may not need all of these functions.

The majority of users will only need the MMU Functions, the Turbo Functions, and the functions that allow you to Plug and Unplug module images to and from the calculator Ports.

If you are a HEPAX user you will need the Memory Block Functions and the Memory/IO Read and Write Functions. Refer to the Using HEPAX section for the details of how to do the initial setup of HEPAX memory.

Users interested in MCODE programming or building a custom module image may find the Memory Buffer Functions useful.

The Flash Memory Functions are included for those users wishing to program the Flash memory on the 41CL circuit board beyond the initial programming. Flash memory is nonvolatile, so it provides a convenient way to store information permanently.

The Serial Port Functions allow users to control the serial port on the 41CL circuit board. Using the serial port will require installation of the optional serial port connector.

Advanced users interested in modifying or replacing the Operating System will need to use the Special MMU Functions. These functions control MMU operation for the pages of memory that contain the Operating System.

The 41CL Extra Functions are sufficient to use most of the new features present in the 41CL, but once you are familiar with the machine, we recommend upgrading to the 41CL Extreme Functions. The 41CL Extreme Functions unlock several more powerful features of your 41CL.

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41CL User Manual

Extra Functions Parameter Passing

Many functions in the 41CL Extra Functions require hexadecimal (hex) values as arguments, and the ALPHA register is used to hold these arguments. Valid hex digits are the numerals 0 - 9 and the letters A - F. Any other character entered as a hex digit will result in a DATA ERROR message when the function is executed. Any leading zeros must be present for hex numbers.

Multiple hex arguments are separated by either the “-” character or the “>” character,

and these delimiters must be present in the proper location or a DATA ERROR message will result.

The figure below shows the formatting required when both an address and data are required by the function. All of the B, Dx, Lx, Px and R characters are hex digits, and

the number and position of the “-” characters indicate the type of address.

ALPHA register

11 10 9 8 7 6 5 4 3 2 1

physical address

logical address

port address

P5 P4 P3 P2 P1 P0 - D3 D2 D1 D0

L3 L2 L1 L0 - B - D3 D2 D1 D0

R - - - D3 D2 D1 D0

A physical address P5 - P0 is a direct physical memory address.

A logical address L3 - L0 is an address used in mcode, where L3 is the address of a Page, and L2 - L0 is the offset within the Page. The bank identifier B allows the bank to be directly specified (1, 2, 3 or 4), for those pages that support multiple banks. In addition, for some functions, all banks (A) may be specified. For pages that do not support banks any of these options may be specified, because the field will be ignored. This means that only Bank 1 of a plug-in module can be accessed.

A port address R is the address of one of the I/O ports contained in the NEWT microprocessor. Refer to the Newt Microprocessor Technical Manual for a list of I/O ports and how to use them.

The data field D3 - D0 is a 16-bit data value.

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41CL User Manual

MMU Functions

The MMU Functions allow the user to initialize, enable, disable, and test the status of the MMU.

MMUCLR

Executing MMUCLR (MMU Clear) clears the contents of all of the regular MMU registers (for Pages 4-F) in memory, by writing 0x0000 to these registers. MMUCLR will result in all pages (except for the Operating System, Extended Functions, Time Functions and 41CL Extra Functions) being fetched from the Ports rather than fetched from internal memory.

To prevent unpredictable results, this function should only be executed while the MMU is disabled.

MMUDIS

Executing MMUDIS (MMU Disable) clears the global MMU enable bit inside the NEWT microprocessor. This automatically reassigns the 41CL Extra Functions to Page 7, but only after the code returns to executing in one of the Operating System pages. This delayed switch allows the function to complete normally and return to the Operating System. This function does not affect the MMU register contents in memory.

MMUEN

Executing MMUEN (MMU Enable) sets the global MMU enable bit inside the NEWT microprocessor. This automatically disables mapping of the 41CL Extra Functions to Page 7, but only after the code returns to executing in one of the Operating System pages. This delayed switch allows the function to complete normally and return to the Operating System. The 41CL Extra Functions must have been assigned to some other page prior to executing MMUEN, or the 41CL Extra Functions will no longer be available to the user.

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MMU?

Executing MMU? (Test MMU Enable) tests the state of the global MMU enable bit inside the NEWT processor, returning with NO in the display if the MMU is disabled and YES in the display if the MMU is enabled. When used in a program, if the MMU is enabled the next program line will be executed; if the MMU is disabled the next line in the program is skipped.

Turbo Functions

The Turbo Functions give you control over the operating speed of the calculator. The performance in Turbo mode is not linear, because some operations must always occur at normal speed. For example, scanning the keyboard (which is done once per program line) always executes at normal speed. Similarly, accessing the display for any reason always executes at normal speed. All accesses of a physical Port occur at normal speed, along with a number of timing loops in the Operating System and Timer functions.

Turbo modes increase the current consumption during normal operation, but have no effect during idle time (between keypress) or during the time when the calculator is off. The current Turbo mode is preserved during idle time, as well as when the calculator is turned off.

Like the Turbo mode performance, the current consumption as a result of Turbo mode is not linear. This is because only a fraction of the circuitry actually runs at a different speed during Turbo mode, in addition to the aforementioned special cases.

TURBOX

Executing TURBOX (Disable Turbo Mode) immediately disables any Turbo mode in effect. Any Turbo mode increases power consumption somewhat, so the Turbo modes should be used judiciously if battery life is very important.

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41CL User Manual

TURBO2 TURBO5 TURBO10 TURBO20 TURBO50

Executing TURBO2 (Turbo 2X Mode) immediately enables the 2X Turbo mode.

Executing TURBO5 (Turbo 5X Mode) immediately enables the 5X Turbo mode.

Executing TURBO10 (Turbo 10X Mode) immediately enables the 10X Turbo mode.

Executing TURBO20 (Turbo 20X Mode) immediately enables the 20X Turbo mode.

Executing TURBO50 (Turbo 50X Mode) immediately enables the 50X Turbo mode.

TURBO?

Executing TURBO? (Test Turbo Mode) queries the state of the Turbo control bits inside the NEWT microprocessor. The current Turbo speed is returned in the X register. The results returned will be one of 0, 2, 5, 10, 20 or 50. The stack is lifted before the result is written to the X register.

Plug into Port/Unplug from Port Functions

These functions allow the user to virtually plug and unplug module images from the calculator ports. The functions use the Image Database in Flash memory to determine the type and address of the desired module image. This provides an easy way for the user to control the configuration of the calculator without having to remember specific memory addresses. Refer to the Image Identifier Table section for the mnemonics for the different module images. No attempt will be made here to explain what the different module images do; it is assumed that the user has access to the documentation for any modules of interest.

Advanced users may enjoy exploring some of the poorly-documented images that are included in the 41CL. Advanced users can even build a new module image in memory and then virtually plug it into a port by directly specifying the relevant memory address for the Plug function.

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Users should avoid XROM conflicts when using module functions in programs. Refer to the original HP documentation for details. Users can circumvent conflicts by copying a module image to RAM and then manually modifying the XROM number before plugging this modified image into a Port.

Users must also avoid hardware conflicts with physical modules. When a module image is virtually plugged into a Port no physical module that uses that Port address can be plugged into the calculator. The only exceptions are those modules or peripherals that use dedicated addressing, shown in the Table below. However, even these modules and peripherals must avoid an addressing conflict. The 82182A Time Module can be plugged into any Port without conflict.

41C Module or Peripheral Page Address

82104A Card Reader E

82143A Printer 6

82160A HP-IL Module 4 or 6, and 7

82242A IR Printer Module 6

Note that some third-party modules can be addressed independently of their physical location, but the user must still avoid address conflicts with these modules.

PLUG1 PLUG2 PLUG3

(image identifier in ALPHA register)

PLUG4

Executing PLUG1 (Plug Into Port 1) inserts a module image into Port 1, which is Pages 8 and 9 of the logical address space. This function automatically programs the MMU registers for both Pages 8 and 9 (all banks) as appropriate for the selected module image. Module images that are only one page long will be loaded into the lower page and the upper page will be left empty.

The four-character module identifier must be properly formatted in the ALPHA register or a BAD ID message will result.

If the module image cannot be used in Pages 8 and 9 a DATA ERROR message will result.

If the Image Database cannot be found in Flash memory a NO IMDB message will result. If the corresponding entry in the Image Database has not been programmed a NO

ENTRY message will be returned, and if the entry has been zeroed out (deleted) a NULL ENTRY message will be returned.

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The PLUG2 (Plug Into Port 2) function operates on Port 2 (Pages A and B).

The PLUG3 (Plug Into Port 3) function operates on Port 3 (Pages C and D).

The PLUG4 (Plug Into Port 4) function operates on Port 4 (Pages E and F).

PLUG1L PLUG2L PLUG3L

(image identifier in ALPHA register)

PLUG4L PLUGP

The PLUG1L (Plug Into Port 1 Lower Half) function is identical to the PLUG1 function except that it only operates on the lower half of Port 1 (Page 8 of the logical address space). This function can only be used with module images that are one page long.

The PLUG2L (Plug Into Port 2 Lower Half) function operates on the lower half of Port 2 (Page A).

The PLUG3L (Plug Into Port 3 Lower Half) function operates on the lower half of Port 3 (Page C).

The PLUG4L (Plug Into Port 4 Lower Half) function operates on the lower half of Port 4 (Page E).

The PLUGP (Plug Into Printer Page) function operates on the page normally used for a printer (Page 6). Do not plug a printer into the calculator if you have virtually plugged an image into the Page 6. Page 6 is special in that the Operating System often calls printer routines in this page. Normally, if no printer is plugged into the calculator the software immediately returns to the Operating System without ill effect. So any image plugged into Page 6 with the PLUGP function must keep these printer subroutine entry points clear so that the Operating System can function properly. Only these images are known to be compatible with Page 6:

Page 6 compatible images Mnemonic

HEPAX HEPX or HEP2

Operation System Extensions OSX3

Power CL Utilities PWRL or PWRX

41CL Clone Functions YCLN 41CL Extreme Functions YFNX 41CL Memory Functions YFNF

41CL Update Functions YUPS

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PLUG1U PLUG2U PLUG3U

(image identifier in ALPHA register)

PLUG4U PLUGH

The PLUG1U (Plug Into Port 1 Upper Half) function is also identical to the PLUG1 function except that it only operates on the upper half of Port 1 (Page 9 of the logical address space). This function can only be used with module images that are one page long.

The PLUG2U (Plug Into Port 2 Upper Half) function operates on the upper half of Port 2 (Page B).

The PLUG3U (Plug Into Port 3 Upper Half) function operates on the upper half of Port 3 (Page D).

The PLUG4U (Plug Into Port 4 Upper Half) function operates on the upper half of Port 4 (Page F).

The PLUGH (Plug Into HP-IL Page) function operates on the page normally used for the HP-IL module (Page 7). Do not plug an HP-IL module into the calculator if you have virtually plugged an image into the page 7.

The various PLUG functions can also be used to assign pages in physical memory directly to the Ports. The upper three nibbles of the physical memory address (so that it begins on a 4K boundary) are specified, and the PLUG function assigns either one page independent of bank; two pages independent of bank; one page with all four banks; or two pages, each with all four banks.

ALPHA register

image characteristics

16K (one page, four banks)

8K (two pages)

4K (one page)

format

7 6 5 4 3 2 1

P5 P4 P3 - 1 6 K

P5 P4 P3 - D B L

P5 P4 P3 - R A M

format

P5 P4 P3 - M A X

The -DBL, -RAM, -16K and -MAX mnemonics can be used with either RAM or Flash memory addresses. These mnemonics are decoded independent of the Image

32K (two pages, each with four banks)

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Database, so that they can be used even if the Image Database is not present in memory. The same is true for the YFNP, YUPS and YFNZ mnemonics.

UPLUG1 UPLUG2 UPLUG3 UPLUG4

Executing UPLUG1 (Unplug From Port 1) removes the module image from Port 1, which is Pages 8 and 9 of the logical address space. The function does this by clearing the MMU entries for these pages.

The UPLUG2 (Unplug From Port 2) function operates on Port 2 (Pages A and B).

The UPLUG3 (Unplug From Port 3) function operates on Port 3 (Pages C and D).

The UPLUG4 (Unplug From Port 4) function operates on Port 4 (Pages E and F).

UPLUG1L UPLUG2L UPLUG3L UPLUG4L UPLUGP

The UPLUG1L (Unplug From Port 1 Lower Half) function is identical to the UPLUG1 function except that it only operates on the lower half of Port 1 (Page 8 of the logical address space). Be careful using this function if you are planning on plugging a physical module into Port 1, because the upper half of the Port will still be fetched from internal memory.

The UPLUG2L (Unplug From Port 2 Lower Half) function operates on the lower half of Port 2 (Page A).

The UPLUG3L (Unplug From Port 3 Fower Half) function operates on the lower half of Port 3 (Page C).

The UPLUG4L (Unplug From Port 4 Lower Half) function operates on the lower half of Port 4 (Page E).

The UPLUGP (Unplug From Printer Page) function operates on Page 6.

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UPLUG1U UPLUG2U UPLUG3U UPLUG4U UPLUGH

The UPLUG1U (Unplug from Port 1 upper half) function is identical to the UPLUG1 function except that it only operates on the upper half of Port 1 (Page 9 of the logical address space). Be careful using this function if you are planning on plugging a physical module into Port 1, because the lower half of the Port will still be fetched from internal memory.

The UPLUG2U (Unplug From Port 2 Upper Half) function operates on the upper half of Port 2 (Page B).

The UPLUG3U (Unplug From Port 3 Upper Half) function operates on the upper half of Port 3 (Page D).

The UPLUG4U (Unplug From Port 4 Upper Half) function operates on the upper half of Port 4 (Page F).

The UPLUGH (Unplug From HP-IL Page) function operates on Page 7.

Memory Block Functions

The memory block functions allow the user to manipulate pages (4K blocks) of memory. In particular, a page can be initialized to a user-selected value or copied to another location in memory. Neither of these functions check whether the blocks are in Flash memory or RAM, and if you attempt to write to Flash memory the operation will appear to proceed, without any writes occurring.

Given that they are operating on 4096 memory locations, the 41CL is automatically switched to the 50x Turbo mode during the transfer. The current Turbo mode is restored after the transfer is complete.

YMCLR (address and data in ALPHA register)

Executing YMCLR (Clear Memory Block) writes the contents of the data field to an

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entire 4K block of RAM memory starting at the address specified in the address field.

The address field is truncated to create an address that is on a 4K boundary before the writes commence. Only memory addresses are valid for this function, and a DATA

ERROR message will result if an I/O address is specified. The YMCLR function cannot

be used to write to physical modules.

The figure below shows the formatting required for the address and data in the ALPHA register for the YMCLR function.

ALPHA register

11 10 9 8 7 6 5 4 3 2 1

physical address

logical address

P5 P4 P3 P2 P1 P0 - D3 D2 D1 D0

L3 L2 L1 L0 - B - D3 D2 D1 D0

YMCPY (starting address pair in ALPHA register)

Executing YMCPY (Copy Memory Block) copies the contents of one 4K block of memory (Flash or RAM) to another 4K block of RAM memory. This function only allows copying blocks of memory that start on 4K boundaries and are 4K in length. Only memory addresses are valid for this function, and DATA ERROR will result if an I/O address is specified.

When executed from the keyboard a COPYING message is written to the display during the actual transfers. These transfers are executed in 50x Turbo mode.

If the MMU is not enabled for a source logical address specified with the YMCPY func- tion, the data is fetched from a physical module and copied to internal memory. In this case the bank identifier is ignored, because the physical module will be in control of the bank select. This means that only Bank 1 of the module can be copied to memory.

This function can be used to write to a physical Port. In this case the function uses the WROM instruction, which only writes 10 bits.

The YMCPY function is ideal for creating backups of system information such as the 41C register memory or the MMU contents. To backup the 41C register memory (including all user programs) simply copy the contents of memory starting at address 0x800000 to an available block of RAM. Use address 0x804000 to backup the MMU configuration.

The figure below shows the formatting required for the address and data in the ALPHA

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ALPHA register

7 6 5 4 3 2 1

source destination

P5 P4 P3 > P5 P4 P3

physical address to logical address

logical address to physical address

logical address to logical address

P5 P4 P3 > L3 - B

L3 - B > P5 P4 P3

L3 - B > L3 - B

Memory/IO Read and Write Functions

The entire memory space is accessible using these functions, which means that you can write directly to register memory, program the MMU, update the register address information or modify (i.e. corrupt) Operating System variables.

YPOKE (address and data in ALPHA register)

Executing YPOKE (Write Word To Memory or I/O) writes directly to either RAM memory or an internal NEWT I/O port. This function does not check the address except for proper formatting, so attempting to write to Flash memory is allowed, although it will be ignored because the function does not properly format the write for Flash memory.

The peripheral version of this function only writes 12 bits to the peripheral port. This is okay because none of the NEWT peripheral write locations accept more than 12 bits.

The figure below shows the formatting required for the address and data in the ALPHA register for the YPOKE function. A bank identifier of A in the logical address case allows writing the to all four banks simultaneously.

physical address

logical address

port address

ALPHA register

11 10 9 8 7 6 5 4 3 2 1

P5 P4 P3 P2 P1 P0 - D3 D2 D1 D0

L3 L2 L1 L0 - B - D3 D2 D1 D0

R - - - D3 D2 D1 D0

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YPEEK (address and data in ALPHA register)

Executing YPEEK (Read Word From Memory or I/O) reads directly from either memory (Flash or RAM) or an internal NEWT I/O port. The data field in the ALPHA register when the function is called is ignored, but is replaced with the actual data read from either the memory or the internal I/O port.

The figure below shows the formatting required for the address and data in the ALPHA register for the YPEEK function. The placeholder data characters will be replaced by the data read by the function.

ALPHA register

11 10 9 8 7 6 5 4 3 2 1

physical address

logical address

port address

P5 P4 P3 P2 P1 P0 - D3 D2 D1 D0

L3 L2 L1 L0 - B - D3 D2 D1 D0

R - - - D3 D2 D1 D0

Memory Buffer Functions

The 41CL reserves one 4K block (one page) of System memory to be used as a buffer for assembling module images. The Extra Functions Buffer Area is located at physical addresses 0x805000 - 0x805FFF, and has an associated Extra Functions Buffer Pointer stored at address 0x804010. The memory buffer functions provide a convenient way to move data to the buffer to assemble a module image without having to continuously specify the destination address. Instead, the lower twelve bits of the destination address are held in the Buffer Pointer, which is automatically incremented by the YBUILD function after use.

Thus, to assemble blocks of code the user merely initializes the buffer pointer to the start of the block, with either 0x000 if assembling a FAT, or 0x084 if assembling functions, and then copies blocks of memory, one after the other, to the buffer. The buffer pointer is updated to point at the next buffer location after each copy. Once an image is assembled, the FAT can be built using the regular YPOKE function and the entire image moved to another location in memory using the YMCPY function for use.

Of course all of the normal memory functions may be used with the buffer area, and indeed the region can also be used as normal memory when not being used as the buffer.

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YBPNT (data in ALPHA register)

Executing YBPNT (Write Extra Functions Buffer Pointer) writes data directly to the Extra Function Buffer Pointer at address 0x804010.

The data must be a four-digit hex number but only the lower three digits of this value are used. The most-significant digit is ignored and not changed by the buffer functions.

ALPHA register

4 3 2 1

Buffer pointer value

D3 D2 D1 D0

The function returns with the normal YPOKE formatted physical address of the Buffer Pointer in the ALPHA register (but not the display):

ALPHA register

11 10 9 8 7 6 5 4 3 2 1

physical address

8 0 4 0 1 0 - D3 D2 D1 D0

YBPNT?

Executing YBPNT? (Read Extra Functions Buffer Pointer) reads directly from Extra Function Buffer Pointer at address 0x804010. The function returns with the normal

YPEEK formatted physical address of the Buffer Pointer in the ALPHA register and the

display:

physical address

ALPHA register

11 10 9 8 7 6 5 4 3 2 1

8 0 4 0 1 0 - D3 D2 D1 D0

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YBUILD (starting address and transfer length in ALPHA register)

Executing YBUILD (Write To Extra Functions Buffer) copies a block of data (up to 4096 words) from memory to the Extra Functions Buffer Area, starting at the location addressed by the Extra Functions Buffer Pointer. The Buffer Pointer is updated to point at the next Buffer Area location at the end of the transfer.

When executed from the keyboard a COPYING message is written to the display during the actual transfers. The transfers are executed in 50x Turbo mode, and then the current Turbo mode is restored.

Care must be exercised because this function will wrap around the end of the Buffer Area, back to the beginning of the Buffer Area, if the transfer length specified so indicates.

The YBUILD function only supports physical addresses. This means that if you want to transfer data from a physical module to the Buffer Area the data must first be transferred to RAM memory so that a physical address can be specified.

The figure below shows the formatting required for the address and data for the YBUILD function. The transfer length D2 - D0 is limited to 4096 words or less, and the number of words transferred is the transfer length. 000 indicates a transfer length of 4096 words.

ALPHA register

11 10 9 8 7 6 5 4 3 2 1

physical address

P5 P4 P3 P2 P1 P0 - 0 D2 D1 D0

Flash Memory Functions

If you are not absolutely sure of what you are doing, do not attempt to use these functions! While these functions do prevent you from corrupting the Operating System

of the calculator, they still allow you to erase or modify the rest of the Flash memory. You must be familiar with how Flash memory operates before attempting to use these functions.

Flash memory has limited endurance, typically 100,000 write cycles, and is erased by sectors, which are 64K bytes (32K words, or eight pages) in the case of the 41CL. An erased Flash sector returns 0xFFFF in every location. Only 0’s can be written to any given location in Flash, which means that writes to Flash can only change a “1” to a “0” and never vice-versa.

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During a Flash erase or write, no other accesses of the Flash memory are allowed. This means that these functions must be running out of RAM to work. Both Flash Memory functions check for this, and return with a CODE=ROM error message if this is not the case. If you really want to use either of the Flash Memory functions you must copy the entire 41CL Extra Functions image to RAM and then program the MMU to use this RAM copy of these functions

These functions cannot be used to modify to the Operating System area (the first sector in the Flash) and will return with the OS AREA error message if an address in the first sector of the Flash memory is specified as the destination.

YFERASE (address in ALPHA register)

Executing YFERASE (Erase Flash Sector) erases an entire sector (usually 32K words, or eight pages) of Flash memory. The address specified can lie anywhere within the sector.

The YFERASE function automatically includes a 6 second delay, because the Flash erase operation may require this much time to complete. The function will either return immediately with an error message, without executing, or send the ERASING message to the display for the entire 6 seconds before returning.

The figure below shows the formatting required for the address and data in the ALPHA register for the YFERASE function. An address that is in RAM (P5 is 8 or greater) will return immediately with the DST=RAM error message.

ALPHA register

6 5 4 3 2 1

physical address

P5 P4 P3 P2 P1 P0

YFWR (starting address pair in ALPHA register)

Executing YFWR (Write Flash Page) copies the contents of one 4K block (one page) of RAM memory to a 4K block of Flash memory. This function only allows copying block of memory that start on 4K boundaries and are 4K in length. Only physical memory addresses are valid for this function.

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The YFWR function automatically executes at 50x Turbo speed, but still requires approximately 4 seconds to complete. The current Turbo mode is restored when the function completes. The function will either return immediately with an error message, without executing, or send the WRITING message to the display for the entire 4 seconds before returning.

The figure below shows the formatting required for the address and data in the ALPHA register for the YFWR function. A destination address that is in RAM (destination P5 is 8 or greater) will return with the DST=RAM error message, and a source address that is in Flash (source P5 is 7 or less) will return with the SRC=ROM message.

ALPHA register

7 6 5 4 3 2 1

source destination

physical address to physical address

P5 P4 P3 > P5 P4 P3

Serial Port Functions

The 41CL contains an RS-232 serial port, but unless you have the special PCB connector this functionality will not be available. However, these serial port functions are present on all 41CL circuit boards.

The serial port hardware is initialized and the baud rate is set to 1200 whenever the calculator is turned on. The serial port uses 8N1 format (eight bits of data, no parity, and one stop bit).

Depending on the baud rate, it may be advisable to run the 41CL in 50x Turbo mode when performing serial operations to make sure that the CPU has sufficient speed to keep up with the serial port. The serial port functions do not automatically increase the processor speed to 50x.

Even using the 50x Turbo mode, at higher baud rates there will be gaps between transmit characters and the receiver will need gaps between receive characters. This is because some instructions still run at 1x speed independent of the Turbo mode. Keep this restriction in mind when using the serial block transfer functions. If the source of serial data generates serial characters without any intervening idle time it will probably be necessary to use 1200 baud to prevent receive overruns.

The serial port functions only support physical addresses. This means that if you want to transfer data between a physical module and the serial port the data must be buffered in RAM memory before the final transfer to or from the physical module.

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All of the serial data transfer functions contain a time-out feature to prevent locking up the machine in the case of an unavailable serial port. This time-out period is dependent on the Turbo mode, as shown in the table below:

Speed Serial time-out period

1x ~15 seconds 2x ~12 seconds

all others ~7 seconds

In the absence of a valid RS-232 level on the serial receive input the RS-232 transceiver automatically powers down. But whenever there is a valid RS-232 level on the receive input the transceiver will be powered. This is a significant addition to the current drain on the batteries, so the serial port should only be connected to a PC or other RS-232 equipment when actually using the serial port.

The calculator should always be turned off while connecting or disconnecting the serial port. The recommended way to connect the serial port is to first insert the 2.5mm

plug into the calculator and then connect the other end to an active serial connection. While the serial driver in the calculator is powering up the internal power supply may droop low enough to trigger the power-on-reset, which automatically disables the MMU. This droop is not sufficient to corrupt RAM contents, so the MMU programming will still be valid. So, after turning on the calculator with the serial port connected for the first time, it is advisable to make sure that the MMU is enabled before attempting to use the serial functions.

The tension holding a 2.5mm plug in the serial connector jack is higher than the tension holding the blank port cover in the calculator body. This means that trying to pull out the plug will tend to pull the blank port cover out of the calculator, potentially damaging the internal connections to the serial connector jack. Always remember to hold the blank

port cover in place when attempting to remove the serial port plug from the calculator.

SERINI

Executing SERINI (Initialize Serial Port) initializes the serial port and sets the baud rate to 1200. Both the transmit and receive buffers are emptied and the receiver and transmitter are both set to the idle state. This command has no effect on the RS-232 driver.

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BAUD12 BAUD24 BAUD48 BAUD96

Executing BAUD12 (Select 1200 Baud) sets the baud rate for the serial port to 1200. This is the default selection for the serial port, and is automatically selected when the calculator is turned on or when the SERINI function is executed.

Executing BAUD24 (Select 2400 Baud) sets the baud rate for the serial port to 2400.

Executing BAUD48 (Select 4800 Baud) sets the baud rate for the serial port to 4800.

Executing BAUD96 (Select 9600 Baud) sets the baud rate for the serial port to 9600.

YGETLB YGETUB

(address in the ALPHA register)

Executing YGETLB (Write Serial Byte To Lower Memory Byte) reads one byte from the serial port and writes this byte to the lower byte of the memory location specified as the address.

Executing YGETUB (Write Serial Byte To Upper Memory Byte) reads one byte from the serial port and writes this byte to the upper byte of the memory location specified as the address.

These functions do not check the address except for proper formatting, so attempting to write to Flash memory is allowed, although it will be ignored by the Flash memory.

The figure below shows the formatting required for the address and data in the ALPHA register for the YGETLB and YGETUB functions. These functions put a RECEIVING message in the display while waiting for a character, and will return with a TIMEOUT error message after the time-out period if no receive byte is available. If the serial port encounters an overrun condition the data in the receive buffer is discarded (since it is error anyway) and is not written to memory. In this case the function will return with an

OVERRUN error message.

physical address

ALPHA register

6 5 4 3 2 1

P5 P4 P3 P2 P1 P0

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YPUTLB YPUTUB

(address in the ALPHA register)

Executing YPUTLB (Write Lower Memory Byte To Serial Port) reads the lower byte from the specified address and attempts to write it to the serial port.

Executing YPUTUB (Write Upper Memory Byte To Serial Port) reads the upper byte from the specified address and attempts to write it to the serial port.

The figure below shows the formatting required for the address and data in the ALPHA register for the YPUTLB and YPUTUB functions. These functions put a SENDING message in the display while waiting to send a character, and will return with a TIME-

OUT error message after the time-out period if the transmitter cannot accept a byte.

ALPHA register

6 5 4 3 2 1

physical address

P5 P4 P3 P2 P1 P0

YEXP (address and transfer length in the ALPHA register)

Executing YEXP (Export Memory Block) transfers an entire block of data (up to 4096 words) from internal memory to the serial port. Both Flash and RAM addresses are valid for this function.

The figure below shows the formatting required for the address and data in the ALPHA register for the YEXP function. The transfer length is limited to 4096 (words) or less. The number of words transferred is the transfer length plus one, allowing block transfers of from 1 to 4096 words (2 to 8192 bytes).

ALPHA register

11 10 9 8 7 6 5 4 3 2 1

physical address

P5 P4 P3 P2 P1 P0 - 0 D2 D1 D0

This function puts a SENDING message in the display while waiting to send characters, and will return with a TIMEOUT error message after the time-out period if the transmitter cannot accept a byte at any point during the block transfer.

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The YEXP function transfers words one byte at a time, in little-endian order (least significant byte first), from the lowest memory address (the one specified in the ALPHA register) to the highest memory address.

In case of an error the transfer length in the ALPHA register will be updated to show the number of words remaining to be transferred. This allows the function to be started again without modifying the contents of the ALPHA register. Only the transfer of both bytes of a word counts as a successful transfer. If the transfer times out between the first and second byte of a word transfer, the transfer is deemed unsuccessful.

YIMP (address and transfer length in the ALPHA register)

Executing YIMP (Import Memory Block) transfers an entire block of data from the serial port into internal memory. The address must be in RAM, because this function does not properly format writes for the Flash memory. Transferring data to a physical Port is not supported either.

The figure below shows the formatting required for the address and data in the ALPHA register for the YIMP function. The transfer length is limited to 4096 (words) or less. The number of words transferred is the transfer length plus one, allowing block transfers of from 1 to 4096 words (2 to 8192 bytes).

ALPHA register

11 10 9 8 7 6 5 4 3 2 1

physical address

P5 P4 P3 P2 P1 P0 - 0 D2 D1 D0

This function puts a RECEIVING message in the display while waiting for a character, and will return with a TIMEOUT error message after the time-out period if no receive byte is available at any point during the block transfer. If the serial port encounters an overrun condition the data in the receive buffer is discarded (since it is error anyway) and is not written to memory. In this case the function will return with an OVERRUN error message.

The YIMP function transfers words one byte at a time, in little-endian order (least significant byte first), from the lowest memory address (the one specified in the ALPHA register) to the highest memory address.

In case of an error the transfer length in the ALPHA register will be updated to show the number of words remaining to be transferred. This allows the function to be started again

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without modifying the contents of the ALPHA register. Only the transfer of both bytes of a word counts as a successful transfer. If the transfer times out between the first and second byte of a word transfer, or the receiver overflows on either byte of a word transfer the transfer is deemed unsuccessful.

Miscellaneous Functions

There is only one miscellaneous function in the 41CL Extra Functions. Most users will never need it. Once you move to the 41CL Extreme Functions the MMU programming can be protected from accidental programming.

YFNS?

Executing YFNS? (Read 41CL Extra Functions Location) polls the logical memory for the current location of the 41CL Extra Functions. The page where the 41CL Extra Func- tions reside is returned in the X register as a decimal number in the range 6 through 15, corresponding to Pages 6 through F. This information can be used to prevent accidentally overwriting the 41CL Extra Functions when reprogramming the MMU.

Image Database Functions

The Image Database Functions (there is only one in the 41CL Extra Functions) allow the user to search the Image Database. A more complete set of Image Database functions is available in the 41CL Extreme Functions.

IMDB? (module identifier or Page address in ALPHA register)

Executing IMDB? (Search Image Database) searches the selected Image Database for a match, using the either a module identifier or a page address, and returns the corresponding database information.

This function tests that the Image Database is present, and returns with a NO IMDB error message if this is not true.

The figure below shows the formatting for a module identifier and page address:

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ALPHA register

4 3 2 1

41CL User Manual

module identifier

page address

M4 M3 M2 M1

- P5 P4 P3

The Image Database information is returned in both the ALPHA register and the display, in the format shown below. Since a module image may be up to 32K in length (8 pages), more than one physical address can return with a match, but only the information in the actual database entry is returned. If no address match is found the function will result in a

NO MATCH error message. Only the first match (the search proceeds from lowest

database address upwards) will ever be returned.

ALPHA register

10 9 8 7 6 5 4 3 2 1

physical address

M4 M3 M2 M1 - T - P5 P4 P3

Searches with a valid module identifier always return the corresponding contents of the Image Database, even if the entry is unprogrammed.

The type digit T specifies the type of image, according to the table below.

T digit

0 1 2 3 4

image type for this module identifier

4K image (one page)

8K image (two pages)

16K image (all four banks in one page)

16K (four pages)

32K (all four banks in two pages)

This function automatically executes the search in the 50X Turbo mode, but even so the search may take several seconds when searching for an address match. A SEARCHING message is written to the display while a search is in progress.

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Special MMU Functions

The Special MMU Functions allow the user to enable and disable the MMU translation circuitry for the Operating System pages (0-3 and 5). Normally these pages are never mapped by the MMU, for obvious reasons. But users wanting to experiment with an alternative Operating System can use the MAPEN command to enable the special MMU translation circuitry.

If the new Operating System uses the same register assignments and calling conventions, then the MAPDIS command can be used from the modified Operating System to revert to the native Operating System.

Unlike the normal MMU enable bit, the enable bit for the special MMU operation is not preserved when the calculator is turned off. This provides a fail-safe way to restore the native Operating System.

The MMU storage locations for the Operating System pages (Pages 0-3) do not follow the convention used for all other memory pages, and these pages do not support multiple banks. The table below shows the MMU storage locations for Pages 0-3.

Physical Address Contents

0x80400C MMU register for Page 0 0x80401C MMU register for Page 1 0x80402C MMU register for Page 2 0x80403C MMU register for Page 3

All of the MMU storage locations for Pages 0-3 must be initialized before executing the

MAPEN function, because these registers are not initialized by the MMUCLR function.

This will preserve the MMU mapping for the Operating System when the calculator is turned off, so that only the global enable needs to be set to restore the mapping function. The individual enable bits for each page still apply, making it easy to map just part of the Operating System.

MAPDIS

Executing MAPDIS (Disable Special MMU Mapping) clears the special MMU enable bit inside the NEWT microprocessor, which automatically restores the native Operating System. Since this function will normally be executed from a modified Operating System, the function automatically returns using the normal 41C function call/return convention, in case the modified Operating System uses a different convention.

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41CL Calculator Manual

MAPEN (passphrase in ALPHA register)

Executing MAPEN (Enable Special MMU Mapping) sets the special MMU enable bit inside the NEWT microprocessor, but only if the correct passphrase (NEW OS) is present in the ALPHA register.

An incorrect passphrase will result in a PASS ERR message.

This function automatically enables mapping of the Operating System pages, but only if the MMU is globally enabled. The MAPEN and MMUEN commands may be issued in either order. All of the normal MMU entries must be valid before the MMUEN command is issued, and all of the special MMU entries (Pages 0-3 and 5) must be valid before the

MAPEN command is issued.

The MAPEN function uses the normal 41C call/return convention, which means that the function will return through address 0x00F0. Any modified Operating System must take this into account. If necessary, this function can be patched to return through address 0x0000. Contact the factory for the details of this patch.

Page 45

41CL Calculator Manual

Error Messages

The table below lists all possible error messages returned by the 41CL Extra Functions, along with the meaning of the error message.

Error Message Function Meaning

ADDR ERROR

BAD ID

CODE=ROM

DATA ERROR

DST=RAM

NO ENTRY

NO IMDB

NO MATCH

NULL ENTRY

OS AREA

OVERRUN

PASS ERR SRC=ROM

TIMEOUT

TYPE ERR

PLUG

YFERASE

YFWR

IMDB?

PLUG

YFERASE

YFWR

functions

requiring

hexadecimal

YFERASE

YFWR

PLUG

IMDB?

PLUG

IMDB?

PLUG

YFERASE

YFWR

YGET

YIMP

MAPEN

YFWR

YEXP YGET

YIMP

YPUT

PLUG

Address is outside of Flash address range

(only in versions subsequent to -4D)

Invalid module ID in ALPHA

Trying to execute function from Flash

(only in versions prior to -4E)

Invalid hexadecimal in ALPHA

Attempting Flash operation on RAM

(only in versions prior to -4E)

unprogrammed entry in Image Database

No Image Database found

No address match found in Image Database

empty (all zeros) entry in Image Database

Attempting Flash operation on Operating System

Receiver overrun detected

Incorrect passphrase in ALPHA

Trying to transfer from Flash to Flash

Timeout during attempted transfer

Unknown image type

Page 46

41CL Calculator Manual

Function Summary

The table below lists all of the 41CL Extra Functions, along with the arguments and return values.

Function

BAUD12 BAUD24 BAUD48 BAUD96

IMDB?

MAPDIS

MAPEN

MMUCLR

MMUDIS

MMUEN

MMU?

Arguments

(ALPHA)

module ID or

address

passphrase

Returns

(X)

Returns

(ALPHA)

IMDB

entry

Returns

(Display)

IMDB

entry

YES

Notes

Module ID query always

returns IMDB entry

MMU is disabled

MMU is enabled

PLUG1

PLUG1L

PLUG1U

PLUG2

PLUG2L

PLUG2U

PLUG3

PLUG3L

PLUG3U

PLUG4

PLUG4L

PLUG4U

module ID

Page 47

PLUGH

Logical address page where

PLUGP SERINI

TURBOX

TURBO2

TURBO5 TURBO10 TURBO20 TURBO50

41CL Calculator Manual

TURBO?

UPLUG1 UPLUG1L UPLUG1U

UPLUG2 UPLUG2L UPLUG2U

UPLUG3 UPLUG3L UPLUG3U

UPLUG4 UPLUG4L UPLUG4U

UPLUGH

UPLUGP

0 2

5 10 20 50

Turbo mode disabled

2x Turbo mode

5x Turbo mode 10x Turbo mode 20x Turbo mode 50x Turbo mode

YBPNT

YBPNT?

YBUILD

YEXP

YFERASE

YFNS?

data

address/length

address

6-15

address/

data

address/

data

Buffer Pointer value is in

the data field

YFNS currently resides

Page 48

41CL Calculator Manual

YFWR

YGETLB YGETUB

YIMP

YMCLR

YMCPY

YPOKE

YPEEK

YPUTLB

YPUTUB

address

address/length

address/data

address pair

address/data

address

address/

data

address/

data

input data field is replaced

with actual data

Page 49

41CL Calculator Manual

Image Identifiers

The table below shows the module images that are present in the Flash memory of the 41CL, along with the mnemonics for use with the PLUG and PPLUG functions, any restrictions on module image placement, the group the image is in, and the XROM numbers used by the image. Four character mnemonics were chosen to allow easy-toremember ALPHA contents, but only the first and last characters of the mnemonics are parsed by the PLUG and PPLUG functions.

XROM

Mnemonic Description Restrictions Group

AADV ABRD ADV1 ADV2 ADVG

AEC3 AECR AFDE AFDF

AFIN

AGAM

ALGY

ANGZ

ANTS

AOSX

APSC

ASM4

ASMB

ASTI

ASTT

ASTU AUTO AV1Q

AVIA

B52B

BASI

Advantage Applications ENG 19

Abrasives Formulation 2 pages ENG 1/2

Adventure, part 1 4 pages GAM 12 Adventure, part 2 4 pages GAM 12/13

Advantage Math MAT 12

AECROM III 2 pages GEN 18

AECROM 2 pages GEN 18

AFDC1 2 pages GOV 16/17 AFDC2 2 pages GOV 18/19

Autofinance FIN 21

Action Games 2 pages GAM 13

ASTRO-ROM AST 31

Angel’s ZEPROM 2 pages UTL 3, 12

HP-41 Antennas Solutions ENG 16

AMC-OSX SYS 5

Pascal 2 pages PRG 20 Assembler 4 UTL 21 Assembler 3 UTL 21

Amateur Astronomy AST 24

Astro-2010 and Astro-2010 UI 4 pages AST 6/8

Astro-1 AST 31

HP Autostart HIL 10

Beechcraft AVI 31

HP Aviation Pac 1A AVI 19

Boeing-B52 2 pages GOV 21/31

BASIC 2 pages PRG 8, 11

CFG

Page 50

41CL Calculator Manual

BBSC

BCMW

BDRV

BELP BEPT BESL BIDQ BJMX

BLDR

BLJK

BPDE

BPRN

BREF

BSHM

BSMS BUD1 BUD2 BUD3

BVLU

CAB4 CCDA CCDR CCDX CENG

CEPH

CFDB

CHEM

CHES

CIRC

CITY

CIVI CIVU CLIN

CLND CMGT CMT1 CMT2 CMT3

CNTL

COOQ

CRTO CURV

CVPK

Banken Beratung Service 4 pages FIN 11/12/13/14

BCMW GEN 8

Derivatives and Integrals 2 pages MAT 31

Ellipsoids MAT 21

Ellipsoidal Refraction AST 10

Bessel Functions 2 pages MAT 2/3

Integration/Differentiation 2 pages MAT 21/22

Blackjack MAX -2E GAM 6

BLD ROM UTL 17

Blackjack -1B GAM 7

Partial Differential Equations MAT 19

Precession & Nutation AST 9

Astronomical Refraction AST 9

Bausparkasse Schwabisch Hall 4 pages UTL 21/31/15/16

HP-41 Business Sales/Marketing/Stats Solutions FIN 18

Buderus-1 2 pages ENG 10/21 Buderus-2 2 pages ENG 15/16 Buderus-3 ENG 9

Business Valuation FIN 3

Schenk CAB 41 2 pages ENG 21/31

Advanced CCD GEN 10

CCD Module 1B 2 pages UTL 9/11

CCD OS/X SYS 5

Chemical Engineering Solutions ENG 12

Current Ephemerides Module AST 24

Correlated Flash Database (RAM page 806) not pluggable OSL N/A

Chemistry User Module CHM 20

Chess 2 pages GAM 8

HP Circuit Analysis Pac 1A ENG 6

Countries GEN 18

HP-41 Civil Engineering Solutions ENG 16

Civil Engineering Special Collection 2 pages ENG 20

HP Clinical Lab & Nuclear Medicine Pac 1A MED 19

HP Calendar Solutions GEN 12

Capital Management 6 FIN

CMT-100 EPROM Test 4 pages HWS 31

CMT-200 Data Acquisition HWS 4

CMT-300 Multimeter 2 pages HWS 9

HP-41 Control Systems Solutions ENG 14

CO-OP 2 pages SVY 31

Cryptography MAT 10

CurveFit 2 pages MAT 4/5

CVPAK 2 pages ENG 21/31

Page 51

41CL Calculator Manual

DA4C DACQ

DASM

DAVA DBUG

DEMO

DEV2

DEVI DIFF DIGT

DIIL

DIVN

DMND

DRPS DRV4 DRVP

DSTY

DST1 DURR DYRK

E3AF E41S

EDTR

EEFD

EENG

EILP ELIB ELIX

EMPT

ENS1 EPRH

EPRM

EPTC

EPTN

ESML

ETS3 ETS4 ETS5 ETS9

EXIO

EXTI

E-6A

FACC

Disasm 4C UTL 15

HP Data Acquisition 1B 2 pages HWS 21/31

Disasm 4D UTL 15

David Assembler 2C UTL 2

HP-41 MCODE Debugger PRG 3

HP-41 System Demo Program 4 pages GEN 14

HP-IL Development Pac 2 2 pages HIL 22/24

HP HP-IL Development Pac 1B 2 pages HIL 22/24

Differential Equations 2 pages MAT 15

DigitPAC ENG 24

HP HP-IL Diagnostic HIL 19

Divination GAM 9

Diamond FIN 31

Drilling Rig Platform 4 pages ENG 31

DERIVE41 2 pages MAT 31

DERIVE41+ 2 pages MAT 21/31

Data/Statistical Analysis MAT 10

CalTrans Survey 4 pages SVY 8/9/10

Dekra Umfall Rechner - Accident Forensics 4 pages ENG 11/12/13/14

Dyerka UTL 31

E-3A Filght Management System 2 pages GOV 21/31

ES41 2 pages HWS 4/6

Text Editor GEN 8

EE Filter Design 2 pages ENG 17/18

HP-41 Electrical Engineering Solutions ENG 15

Extended IL Plus HIL 27 Equation Library MAT 11

Elliptical Applications MAT 16

used to signal “unplug” OSL N/A

41-ENS 2 pages SVY 21/31

MLEPR -1H UTL 4

MMEPROM UTL 16

Elliptic MAT 17

Trans-Neptunian Planets 2016-2025 AST 23

ESMLDL 7B HWS 10

ETSII3 2 pages ENG 12 ETSII4 2 pages ENG 8/14 ETSII5 2 pages ENG 10/20 ETSII6 ENG 16

HP Extended I/O 1A HIL 23

SKWID EXT-IL HIL 27

E-6A W&B 4 pages GOV 21/31/10/9

300889 FACC 2 pages GOV 10/11

Page 52

41CL Calculator Manual

FADV

FAIR FCS1 FCS2 FCS3 FCST

FDYN

FFEE

FINA

FLDB

FRID

FRML FRMX

FRTH

FSSY FSTK

FUNS GAME GAMX

GASL GASU GEDA GEOD

GEOM

GJMR GLNG

GMAQ GMAS GMAT

GMTY

GRAW

GRF1

GRF3

GRMK

GRVI GSB2 GSLV

GSWP

H67G

HCMP

HCPL

HDIS HEP2

French Adventure GAM 12

Fairfield 2 pages ENG 21/31 Forecast 1 FIN 10 Forecast 2 FIN 10 Forecast 3 FIN 10

Forecast FIN 10

Fluid Dynamics Solutions ENG 17

AirCon Loads & Water Well Strata ENG 14

HP Financial Decisions Pac 1D FIN 4

41CL Flash YCRC Database not pluggable OSL N/A

Fractional Integration & Differentiation MAT 18

Formula Evaluation MAT 30

Formula Evaluation Examples MAT 31

FORTH Pages 4 & 7 PRG N/A

FOCAL Assembly/Disassembly 2 pages PRG 14

Fish Stock Calculations ENG 16

Funstuff 4 pages GAM 10

HP Games Pac 1A GAM 10

Explore Games 2 pages GAM 12 GASPROP, lower 4 pages 4 pages ENG 1/2/3/4 GASPROP, upper 4 pages 4 pages ENG 5/6/8/7

Geodata 126A 2 pages ENG 9/10

Differential Geomoetry MAT 31

HP-41 Geometry Solutions MAT 14

Greg J McClure’s ROM 2 pages GEN 31

Gelengegetribe Konstruktion ENG 16

GMAC 1 FIN 31 GMAC 2 FIN 31 GMAC 3 2 pages FIN 21/31

Geometry-11 MAT 16

Gene’s RAW files 2 pages GEN 18

Grafiks 1/2 2 pages UTL 9 Grafiks 3/4 2 pages UTL 10

Games from Sammlung book 2 pages GEN 10

Gravity & Time 2 pages PHY 16

Games Solution Book 1/2 2 pages GAM 16

Geometric Solver MAT 18

Swap Games 2 pages GAM 9

HP-67 Games GAM TBD

Hydracomp ENG 21

Hyper-Complex Math 3 pages MAT 10/20/21

HEPAX Disassembler UTL 9

Modified HEPAX 1E SYS 7

Page 53

41CL Calculator Manual

HEPR HEPX

HILM

HILN

HMAT

HNDY HOME HORO

HPPA

HSRV

HTAB

HWND

HVAC

IBOX

ICOD

IDAS IDC1 IDC2 IERR

IGSW

ILBF

IMDB

IMS4 INDO

INTG IPRT IRSU

ISEM

ISEN ISOL

ITCP

JARR JMAT JMBC JMTX K135

KNGT KRGM KRMK

KRSS

L119

LADY

LAIT

HEPAX RAM Template SYS N/A

HEPAX 1D SYS 7

HP-IL Module HIL 28

HP-IL Module (Printer functions) HIL 29

HP-41 High-Level Math Solutions MAT 12

Handy Compact ENG 31

HP Home Management Pac 1A FIN 9

Horoscope GEN 16

Hypothetical Probate Plus 2 pages FIN 8/12

HP Service Module Page 4 OSL N/A

HEPAX Periodic Table RAM only PHY 13/14/16

HP Barcode Wand SYS 27

HVAC Solutions ENG 16

ICEbox 1H UTL 4

ICODE PRG 19

Data and Statistics MAT 10

IDC1 MED 21 IDC2 2 pages MED 21/22

IERR 2 pages MAT 1

Gladiator Arena Game GAM 24

IL Buffer HIL 22

41CL Image Database not pluggable OSL N/A

IMS System-4 2 pages GEN 31/21

Philips Indoor Lighting ENG 10

Integration 2 pages MAT 16

IR Printer Module 2 pages SYS 29

Eramco RSU Initialization HWS 4

GEIR GEN 23

ISENE GEN 17

Interchangeable Solutions ULPE Program PRG 11

NutIP TCP/IP HIL 4

K. Jarrett XF/SP books 2 pages GEN 17/18

JMB-Math 2 pages MAT 5/6

JMB-Calendar GEN 17

JMB-Matrix 2 pages MAT 8

KC-135 Weight & Balance 4 pages GOV 16/21/31

JMB Knights Tour GAM 31

Kruse/Gosmann books 2 pages GEN 17/18

Kermit 2K GEN 1 Krauss book 2 pages GEN 17 AFDC-L119 2 pages GOV 21/31

Ladybug 2 pages GEN 16

Laitram XQ2 Page 4 SYS N/A

Page 54

41CL Calculator Manual

LAND

LTLN

LBLS

LDSP

LDY4

LENG

LOGA

LNDL

LPLC LUIZ

MAHJ

MASS

MATH

MAZZ MBKF

MCCK MCHN MCMP MDP1 MDP2

MELB MENG

METX

MILE

MINV

MLBL MLMU MLRM

MLTI

MONO

MRTR

MTST

MUEC

MWK3 MWK4 MWK5

NAVI

NBOD

NCHP

NEA1 NEA3 NEA5 NEXT

LandNav NAV 1

Geodetics 9

Labels UTL

Loudspeaker Design ENG 10

Ladybug ROM Page 4 Library page 4 GEN N/A

Solar Engineering Solutions ENG 14

Logana 2 pages ENG 21/31

HP-41 Lend, Lease Savings Solutions FIN 19

Laplace Transform 2 pages MAT 10

Luiz Vieira’s Collection GEN 17

Mahjong 2 pages GAM 10

Extended Mass Storage HIL 16

HP Math Pac 1D MAT 1

Mazes and Puzzle Games GAM 16

MBK EPROM 3 pages FIN 3/13/14

Alan McCornack book GEN 16

HP Machine Design Pac 1A ENG 12

Mountain Computer 1C HWS 15

MDP1 2 pages ENG 15/16 MDP2 2 pages ENG 17/18

Melbourne GEN 12

HP-41 Mechanical Engineering Solutions ENG 16

MetroX GEN 30

Military Engineering 2 pages GOV 21/31

Merchantile Mutual Plus/Investment Pac 2 pages FIN 21/3

David Assembler Labels UTL

Merchantile Mutual Live Mortgages 2 pages FIN 31/6

MLROM UTL 21

Multi-Precision Library MAT 3

Monopoly 2 pages GAM 16

MORTAR GOV 31

MCTEST HWS 3

Muecke Baustatik Module 2 pages ENG 21/31

MWK-3 ENG 10 MWK-4 2 pages ENG 21/31

Buderus Kachelufen 2 pages ENG 12/13

HP Navigation Pac 1B 2 pages NAV 14

Gravitational N-body Problems PHY 6

NOV CHAP UTL 31 SNEAP 1 - Rheofluidics 2 pages ENG 21/31 SNEAP 2 - Rheofluidics 2 pages ENG 11/10 SNEAP 3 - Rheofluidics 2 pages ENG 13/14

NEXT UTL 6

Page 55

41CL Calculator Manual

NFCR NONL NPAC NTHY

NVCM

NYSB OBCZ

OILW OPLN OPTO

OS41 OSX3 OTRP

P18E

P3BC PANA

PAPZ

PARI

PCOD

PETR

PHYH

PKP1

PKP2

PKP3

PKP4

PKP5

PLAN

PLOT PLTO

PMLB

POLY

PPC9

PPCM

PPCU PPOK

PRFS

PRIQ

PROG

PRTW

PSOF

PSRV PWRL

PWRX

NFCROM 1B HWS 17

Non-linear Systems MAT 17

Navpac 2 pages NAV 14/15

Number Theory MAT 16

NAVCOM 2 2 pages NAV 14/15

New York Subway Metro Map 2 pages GEN 30

OBCSYS MED 31

Oilwell 2 pages ENG 21/31

Outer Planets AST 21

HP-41 Optometry Solutions MED 16

HP-41 Operating System Page 0 OSL N/A

Library-4 OS/X Bank-Switched SYS 5

Oventrop Ventil 2 pages ENG 5/6

Planetary Ephemerides for 2018 2 pages AST 23/24

Aviation Pac for P3B/C 4 pages GOV 9/21/31

Paname 2 pages GEN 5/9

Logging and Agricultural Engineering 2 pages ENG 10/16

ProtoPARIO HWS 14

Pcoder 1A HWS 16

HP Petroleum Fluids Pac 1A 2 pages ENG 15/16

HP-41 Physics Solutions PHY 15

Poul Kaarup’s Alpha and Pointers UTL 31

Poul Kaarup’s Math and Physics, pg 1 2 pages MAT 14/15

Poul Kaarup’s Flags and Stack UTL 3

Poul Kaarup’s Program Utilities UTL 5

Poul Kaarup’s Timer and Utilities UTL 18

Planets AST 17

HP Plotter Pac 1A 2 pages HIL 17/18

Plutiods AST 13

PPC-Melbourne GEN 12

Polynomial Functions 2 pages MAT 6/9

PPC Statistics 2 pages MAT 9/13

PPC ROM 2 pages GEN 10/20

PPC User Programs 2 pages GEN 17/18

Poker GAM 10

Profiset 2 pages HWS 27/31

Portable Process & Device Design 2 pages ENG 21/31

Program Generator PRG 18

Ports 2 pages NAV 11 PS0F HWS 16

Printer Service Page 4 OSL N/A

Power CL UTL 12

Power CL Extreme UTL 12

Page 56

41CL Calculator Manual

QMTH

QUAT QUEN RADA RCRD RCSN

RCTR

RDII

REAL

REGU

RGME

RM32

RMPG ROAM ROMS ROMX

ROSV RRAP RUBK SBOX

SDMO

SEAK

SECY

SERI

SESA

SGSG

SHTZ

SIHP

SIMM

SLVF

SKWD

SM44

SMCH

SMPL

SPEC SR1B STAN

STAT STEQ

STRE STRU

SUD1 SUPR

Prism Math 2 pages MAT 13

Quaternions 2 pages MAT 15/16

N-Queens GAM 9

Radiak GOV 21

HP Card Reader -1G HWS 30

Recursion MAT 9

Racetrack FIN 21

RhodeSystems II GEN 31

HP Real Estate Pac 1A 2 pages FIN 11

Control Systems (from German book) 2 pages ENG 9/10

RAW Games 2 pages GAM 18

RAMbox-32 HWS 31

RAMpage UTL 15 ROAM-0A GEN 5 ROMSV01 UTL 9

XROM UTL 31

RSU-OS 2 pages HWS 4/6

Riprap Engineering ENG 13

Rubik’s Cube GAM 8

Sandbox 2 pages MAT 8/13

Sto. Domingo SVY 31

SeaKing GOV 21

HP Securities Pac 1A FIN 19

Sums & Series MAT 18

Structural Engineering Systems Analysis 2 pages ENG 16

SGS GAS ENG 21

Spreadsheet FIN 8

Solve & Integrate MAT 24

SIM 4 pages SVY 4/10/30/31

Equation Solver MAT 29

SKWID HIL 8

Library-4 Sandmath 4x4 2 pages MAT 2/3

Speed Machine II 2 pages FIN 21/31

Simplex MAT 16

Spectral Analysis MAT 8

SLANTR AVI 11

HP Standard Applications Pac 1C GEN 5

HP Statistics Pac 1B MAT 2

Steam Properties STEQ 12

HP Stress Analysis Pac 1A ENG 8

HP Structural Analysis Pac 1B 2 pages ENG 7/19

Sudoku GAM 16

SUP-R 2 pages SVY 21/31

Page 57

41CL Calculator Manual

SURV

SWP5

SWSW

TAFB

TDSI

TDSM

TDSP

TEST TGT2 TGT3

THER TIDW

TIME

TMAX TMOD TOMS

TREK

TRIH TVMY UCCD

UCLN

UNIT UPLM

USPS

VECT

VEGS

VERM

VIEW

VOI1

VOI3

VOI5 VONK

WARP

WORD

WPNE WPRT

WRAM

WWDB

XBFR XFN3 XFN5

XPMM

XTAT

HP Survey Pac 1B SVY 3

Swap Disk Engineering Programs 2 pages ENG 12

Software Development German book UTL 6

Tinker AFB 2 pages GOV 21/31

TDS Instrument 2 pages SVY 5,12

TDS Surveying 4 pages SVY 4,10,31,30

TDS Plotter 2 pages SVY 8,9

HP-41 Test Statistics Solutions MAT 13

AP550-A2 Targeting GOV 10 AP550-A3 Targeting 2 pages GOV 21/31

HP Thermal & Transport Science Pac 1A ENG 13

Tides and Ports NAV 10

HP-41 Timer Solutions GEN 6

Turbo-MAX -3A GAM 6

HP-41 Time Module page 5 OSL 26

TOMSROM SVY 6

Trekkies GAM 11

83trinh GEN 9

TVM FIN 22

CCD Manual examples GEN 18

User Calendar GEN 18

UnitConv ENG 10

User’s Program Library - Math 2 pages MAT 13

USPS Module 2 pages GOV 21/31

Vector Analysis MAT 14

Vegas -1C GAM 6 Vermpack SVY 27

Programs from Vieweg book GEN 9

Resevoir Engineering 1/2 2 pages ENG 9 Resevoir Engineering 3/4 2 pages ENG 10 Resevoir Engineering 5/6 2 pages ENG 11

Math Programs Collection MAT 16

Warp-core GEN 21 Dictionary 2 pages GEN 18

WPN Effects 2 pages GOV 21/31

82143A Printer SYS 29

W&W Rambox-64B HWS 31

Wickes, Wlodek, Dearing Books GEN 17

Direct Stiffness Method: Beams & Frames 2 pages ENG 30

HP-41 X-Functions (page 3) page 3 OSL 25

HP-41 X-Functions (page 5, bank 2) page 5/bnk 2 OSL N/A

CL X-Memory Functions OSL 20

XM Statistics MAT 6

Page 58

41CL Calculator Manual

XTRS

YACH

YBFR YCLN YFNF YFNP YFNX YFNZ

YLIB

YRGA

YUIL

YUPS

Z4DL

ZDRV

ZENR ZEPM ZONE 120M

141B 16CS

1AST 2SWP 3SWP

41AD

441Z

4ALP

4DIG

4LIB

4MTI

4RAM

4TBX 4WIN

5MAD

5LON

5PAR

5UBH

9BAS

9BGM

9CFA

9CFB

9CST

9INF 9ELE

Direct Stiffness Method: Trusses 2 pages ENG 30

Bobby Schenk’s Yacht Module 2 pages NAV 21/31

Extra Functions Buffer Area (RAM page 805) OSL N/A

41CL Clone Functions OSL 31

41CL Memory Functions OSL 16

41CL Extra Functions Plus OSL 15

41CL Extreme Functions OSL 15

41CL Extra Functions OSL 15

41CL Extreme Functions Library Page 4 OSL N/A

YREG Applications GEN 21

41CL IL Update Functions HIL 14

41CL Update Functions OSL 31

41Z Deluxe 2 pages MAT 1/4

Z-Derive 2 pages MAT 21/22 ZENROM UTL 5 ZEPROM HWS 9

Game Zone GAM 10

120mm Mortar 2 pages GOV 21/31

C141B-FSC 2 pages GOV 22/31

16C Simulator GEN 16

ASTRO-10000 2 pages AST 23/24

Misc routines from 412 Swap Disks 2 pages GEN 10

Swap Disk Math 2 pages MAT 12/13

HP Advantage Pac 1B 2 pages GEN 22/24

Library-4 HP41Z Complex Number 2 pages MAT 1/4

Library-4 Alpha UTL 6

Library-4 41Z Diagnostic MAT 8

Library-4 Page 4 PRG N/A

Library-4 Matrix/Polynomial 2 pages MAT 22

Library-4 RampageX UTL 17

Library-4 Toolbox UTL 13

Connect Four Game GAM 16

Madrid, Spain Metro Map after METX GEN N/A

London, England Tube Map after METX GEN N/A

Paris, France Metro Map after METX GEN N/A

Berlin, Germany U-Bahn Map after METX GEN N/A

Basic Configuration N/A 3

Brainy Games Configuration N/A D

Alternate Configuration A N/A 1

Alternate Configuration B N/A 2

Custom Configuration N/A E

Informatics Configuration N/A 7

Electrical Engineering Configuration N/A 9

Page 59

41CL Calculator Manual

9HIL 9MAP 9MEC 9MTH

9PLY

9PRG

9PWR

9SCI

Mechanical Engineering Configuration N/A A

HP-IL Configuration N/A F

Maps & Words Configuration N/A B

Mathematics Configuration N/A 5

Playground Configuration N/A C

Programming Configuration N/A 8

Power-User Configuration N/A 4

Scientist’s Configuration N/A 6

Identifiers highlighted in cyan are not loaded onto V2 boards by default because of space constraints.

Identifiers highlighted in green are not loaded onto V2/V3/V4 boards by default because of space constraints.

Identifiers 9xxA through 9xxZ are not really identifiers. Instead, these mnemonics are used as aliases for secondary MMU configurations. Refer to the 41CL Extreme Functions manual for a detailed description of how this works.

Idenifiers 9MM1, 9DD2 and 9YY3 are not really identifiers. Rather, the MM/DD/ YY are replaced with the issue date of the Image Database.

Identifiers 9xx4, 9xx5 and 9xx9 are illegal and will return an error if you attempt to use them with a PLUG function.

Page 60

Group definitions are shown below:

AST Astronomy AVI Aviation CHM Chemistry ENG Engineering FIN Financial GAM Games GEN General-purpose GOV Government/Military HIL HP-IL HWS Hardware-specific MAT Mathematics MED Medicine NAV Navigation NUL Nulled Entry OSL OS/CL PHY Physics PRG Programming SVY Surveying SYS System extensions UTL Utilities UNP Unprogrammed

41CL Calculator Manual

Page 61

41CL Calculator Manual

Memory Management

The original 41C system used dedicated ROM and RAM chips to implement the memory for the calculator, and the memory organization was mostly hidden from the user. The 41CL calculator replaces these custom memory chips with a pair of industry-standard memory devices, and besides the normal 41C view of memory, provides built-in functions that allow the user direct access to the physical memory.

The original ROM memories (including the plug-in ROMs in application pacs) are replaced with a single Flash (non-volatile, but re-programmable) memory, while the RAM chips are replaced with a single low-power RAM device. Given the advance of technology since the design of the original 41C system, these new memory devices provide significantly more storage than the original 41C system could even use. To take advantage of this increased storage capacity, the 41CL design includes a Memory Management Unit (MMU). Plug-in application pacs and peripherals are still supported, but separate application pacs are really no longer necessary.

The MMU takes the memory address, in either the program (ROM) address space or the data (RAM) address space, and translates this address into an address in either the Flash memory or the static RAM. This translation is completely automatic and transparent to the user.

Most users will never need to concern themselves with the operation of the MMU, as the new 41CL Extra Functions or 41CL Extreme Functions take care of programming the MMU in most cases. However, advanced users may need to understand how the MMU works and is programmed to take full advantage of some features of the 41CL calculator.

The MMU and program addresses

The 41C system uses a 16-bit (64K) program address, which is divided into sixteen pages of 4K each. For many of these pages, there can be up to four “banks”, which are selected under software control during program operation. This natural division of 4K pages is used by the MMU in the 41CL, so that each bank in each page can be mapped by the MMU to a specific absolute address in the Flash memory or RAM on the 41CL circuit board.

To accomplish this mapping, the MMU takes the upper four bits of the program address (which selects the page), plus the two bits which select the bank, and forms a special

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memory address. The contents of this memory location, if the MMU is enabled, replaces the original upper four bits of the program address and forms a 24-bit address that is used to access the memory devices on the 41CL circuit board (the lower twelve bits are not modified by the MMU). Thus, in theory, any page can be mapped to any 4K page in the physical memory on the 41CL circuit board.

The 41CL does not allow user control of the mapping of some of the pages, to protect the Operating System (OS) of the calculator. So pages 0, 1, and 2 are normally never mapped by the MMU, because this is where the basic OS is stored. In addition, pages 3 and 5 are normally never mapped by the MMU, because this is where the X-Functions and Time Module functions for the calculator are located. But every other page can be mapped using the MMU.

The MMU entries are located in the 4K page of memory starting at address 0x804000, which is located in RAM. The actual address for an MMU entry is formed using this base address, with the page number replacing bits 7-4 and the bank number replacing bits 3-2. Note that the order of the banks follows the encoding used by the original 41C hardware, rather than conventional encoding. Since not all pages support banks only the following MMU entries are valid:

Physical Address Contents

0x80400C MMU register for Page 0 (no banking supported) 0x80401C MMU register for Page 1 (no banking supported) 0x80402C MMU register for Page 2 (no banking supported) 0x80403C MMU register for Page 3 (no banking supported)

0x804040 MMU register for Page 4, Bank 1 0x804044 MMU register for Page 4, Bank 3 0x804048 MMU register for Page 4, Bank 2

0x80404C MMU register for Page 4, Bank 4

0x804050 MMU register for Page 5, Bank 1 0x804054 MMU register for Page 5, Bank 3 0x804058 MMU register for Page 5, Bank 2

0x80405C MMU register for Page 5, Bank 4

0x804060 MMU register for Page 6, Bank 1 0x804064 MMU register for Page 6, Bank 3 0x804068 MMU register for Page 6, Bank 2

0x80406C MMU register for Page 6, Bank 4

0x804070 MMU register for Page 7, Bank 1 0x804074 MMU register for Page 7, Bank 3 0x804078 MMU register for Page 7, Bank 2

0x80407C MMU register for Page 7, Bank 4

0x804080 MMU register for Page 8, Bank 1 0x804084 MMU register for Page 8, Bank 3

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41CL Calculator Manual

0x804088 MMU register for Page 8, Bank 2

0x80408C MMU register for Page 8, Bank 4

. 0x8040F0 MMU register for Page F, Bank 1 0x8040F4 MMU register for Page F, Bank 3 0x8040F8 MMU register for Page F, Bank 2

0x8040FC MMU register for Page F, Bank 4

. .

Pages 8-F correspond to the Ports on the calculator, with pages 8-9 being Port 1, pages AB being Port 2, and so on as shown below. The MMU entries for these pages are automatically handled by 41CL Extra Functions, so only the MMU entries for Page 4 needs to be manually programmed.

Port Half Page Address PLUG function

N/A N/A 6 PLUGP N/A N/A 7 PLUGH

Lower 8 PLUG1L Upper 9 PLUG1U Lower A PLUG2L Upper B PLUG2U Lower C PLUG3L Upper D PLUG3U Lower E PLUG4L Upper F PLUG4U

PLUG1

PLUG2

PLUG3

PLUG4

Page 4 is special to the OS, and only a few ROM images can be used in it. If you don’t know what you are doing, don’t try to use Page 4. Page 6 is normally used by a printer

and Page 7 is used by HP-IL, so don’t try to use either of these pages unless you don’t need access to a printer or HP-IL.

Pages 0-3 and 5 contain the OS for the machine, so the MMU entries for these pages are normally not used.

The contents of an MMU memory location are used as follows:

bit

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

EN LCK MULTI A23 A22 A21 A20 A19 A18 A17 A16 A15 A14 A13 A12

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Bit 15 is the Enable (EN) bit. If this bit is zero, the MMU entry is ignored and the corresponding page and bank will be fetched from a Port.

Bit 14 is the Lock (LCK) bit, used only with the 41CL Extreme Functions. If this bit is set to one the entry cannot be changed, except with either the UNLOCK function or the

MMUCLR function.

Bits 13 and 12 are the Multi-page Image (MULTI) bits, used only with the 41CL Extreme Functions. These bits are managed automatically by the PLUG and PPLUG functions,

with the following meanings:

13 12 MULTI

0 0 Not part of a multi-page image 0 1 First page of a multi-page image 1 1 Middle page of a multi-page image 1 0 Last page of a multi-page image

Bits 11-0 hold the twelve address bits to be substituted for the Page address (bits 15-12) portion of the logical address, to create the physical address.

The MMU and data addresses

Data addresses (“registers” in 41C parlance) are also translated by the MMU, but this translation is not programmable. Instead, registers are mapped to specific locations in the RAM on the 41CL board. This dedicated mapping is shown in the table below. Note that the 41C OS is not capable of addressing registers above 0x3FF, but space is reserved in the 41CL memory for register addresses up to 0xFFF in case there are future enhancements to the OS code.

In the 41C system only the lower four bits of the register address can be specified by an instruction, and all of the upper register address bits are held in a dedicated register called

(not surprisingly) the “register address”. In the 41CL this register address is stored in the

RAM in a special location, at address 0x804000.

Like the original 41C, the 41CL preserves the data in RAM as long as power is applied. Unlike the original 41C, the 41CL allows RAM to be used to hold program data. All that is required for this type of operation is that the MMU point to a 4K block of RAM rather than a 4K block in the Flash portion of the address space. In the 41CL bit 23 of the physical memory address determines whether the address is in Flash (bit 23 is zero) or in RAM (bit 23 is one).

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A seven-byte 41C register is stored in four successive memory locations as shown below:

bit

addr lsb

00 Byte 1 Byte 0 (least-significant) 01 Byte 3 Byte 2 10 Byte 5 Byte 4 11 unused Byte 6 (most-significant)

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

The table below shows the organization of the 41C register memory in the physical memory of the 41CL circuit board. Because the OS manages the data in these locations, users are discouraged from attempting to modify any of these memory locations.

This table is a subset of the information presented in the mem_ref.pdf document. Refer to that document for a full explanation of how information is organized in the physical memory of the 41CL.

Physical Address Contents Operating System (OS) use

0x800000 - 0x800003 Register 000 T register

0x800004 - 0x800007 Register 001 Z register 0x800008 - 0x80000B Register 002 Y register 0x80000C - 0x80000F Register 003 X register

0x800010 - 0x800013 Register 004 LAST X register

0x800014 - 0x800017 Register 005 ALPHA register 1-7 0x800018 - 0x80001B Register 006 ALPHA register 8-14 0x80001C - 0x80001F Register 007 ALPHA register 15-21

0x800020 - 0x800023 Register 008 ALPHA register 22-28

0x800024 - 0x800027 Register 009 Temp ALPHA Scratch 0x800028 - 0x80002B Register 00A Unshifted Key Assign, OS status 0x80002C - 0x80002F Register 00B Program Return Stack

0x800030 - 0x800033 Register 00C Program Return Stack, Program Pointer

0x800034 - 0x800037 Register 00D Address Pointers 0x800038 - 0x80003B Register 00E FLAG register 0x80003C - 0x80003F Register 00F Shifted Key Assign, Program Line Number 0x800040 - 0x8000FF Registers 10 - 3F not visible to OS

0x800100 - 0x800103 Register 040 X memory

0x800104 - 0x800107 Register 041

. 0x8002F8 - 0x8002FB Register 0BE 0x8002FC - 0x8002FF Register 0BF

. .

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0x800300 - 0x800303 Register 0C0 Main memory 0x800304 - 0x800307 Register 0C1

. 0x8007F8 - 0x8007FB Register 1FE 0x8007FC - 0x8007FF Register 1FF

0x800800 - 0x800803 Register 200 not visible to OS 0x800804 - 0x800807 Register 201 X memory

0x800808 - 0x80080B Register 202

. .

0x800BB8 - 0x800BBB Register 2EE 0x800BBC - 0x800BBF Register 2EF

0x800BC0 - 0x800C03 Registers 2F0 - 300 not visible to OS

0x800C04 - 0x800C07 Register 301 X memory

0x800C08 - 0x800C0B Register 302

. .

0x800FB8 - 0x800FBB Register 3EE

0x800FBC - 0x800FBF Register 3EF

0x800FC0 - 0x800FFF Registers 3F0 - 3FF not visible to OS

0x801000 - 0x801FFF Registers 400 - 7FF not currently utilized by OS 0x802000 - 0x802FFF Registers 800 - BFF (Expanded Memory) 0x803000 - 0x803FFF Registers C00 - FFF

0x804000 OS Register Address buffer

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Programming the MMU

The PLUG functions in the 41CL Extra Functions allow the user to insert module images into nearly every open Page on the 41CL. The one exception is Page 4. This was done intentionally, because Page 4 is special as far as the Operating System (OS) is concerned, and can take over the machine in certain circumstances. But there are a number of images present in Flash memory that can only be loaded into Page 4, and this section will show you how to do this for three of them.

Library-4

The Library-4 ROM was written by Ángel Martin specifically for use with several other images that he contributed to the 41CL. The Library-4 ROM contains common subroutines that are called from these other ROMs. Having a fixed address for subroutines allows for much quicker access and more efficient code because the subroutine entry addresses can be hard-coded in the calling programs.

The Library-4 ROM image is located at address 0x120000, and has an associated IMDB entry so that it can be used with the IMDB? function. Once installed, it is completely invisible as far as the OS is concerned, even when not in use.

The Library-4 ROM is installed by simply writing to the Page 4 MMU entry, using the

YPOKE command:

ALPHA 804040-8120 ALPHA XEQ ALPHA YPOKE ALPHA

The FORTH ROM

The regular PLUG functions cannot be used to insert the FORTH ROM into the 41CL logical memory because this ROM is hard-coded to use Page 4 and Page 7. Instead, you will need to program the MMU entries for Pages 4 and 7 directly.

It’s a little more complicated than just programming the two MMU entries though. The

problem is that between programming the two MMU entries the OS is going to check certain locations in program memory, including the start of Page 4 and places near the end of Pages 5 through F. This means that the OS will get confused with only half of the

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FORTH ROM visible. The way around this problem is to disable the MMU during programming. The sequence of commands shown below will enable FORTH ROM.

First, the MMU is disabled. This has no effect on the contents of the MMU:

XEQ ALPHA MMUDIS ALPHA

Next, the MMU for pages 4 and 7 are programmed to point at the FORTH ROM image:

ALPHA 804040-809A ALPHA XEQ ALPHA YPOKE ALPHA

ALPHA 804070-809B ALPHA XEQ ALPHA YPOKE ALPHA

Finally, the MMU is re-enabled:

XEQ ALPHA MMUEN ALPHA

Disabling the FORTH ROM is only possible by turning off the calculator and momentarily removing the batteries, because once the FORTH module is active the 41CL Extra Functions are no longer available.

The HP Service ROM

The HP Service ROM was used by HP to test returned calculators, and is hard-coded to use Page 4. This ROM is intended to take over the calculator, so installation is as simple as programming the MMU for Page 4. Refer to the HP 41C Service Manual for instructions on using the test facilities in this ROM.

ALPHA 804040-8004 ALPHA XEQ ALPHA YPOKE ALPHA

Disabling the HP service ROM is only possible by turning off the calculator and momentarily removing the batteries, which disables the MMU.

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Image Data base

Image Database

An entry in the Image Database consists of four words, and the format of the database is set up to make adding new entries very easy. An unprogrammed Image Database entry contains 0xFFFF in all four words. This is the default contents of Flash memory, where the database is stored, which means that new entries can simply be added to the Image Database without first needing to erase the Flash sector where the database is stored.

The PLUG functions will return a NO ENTRY error message if the user attempts to use a module identifier corresponding to an unprogrammed database entry. An Image Database entry can be “erased” by writing 0x0000 to the first two words. In this case the

PLUG functions will return a NULL ENTRY error message for the corresponding

module identifier.

To preserve backwards-compatibility with previous versions of the 41CL Extra Functions, the Image Database entries are addressed as a function of the first and fourth characters of the module identifier only.

In order to limit the size of the database to 4K words only the characters A - Z, 1 - 5 and

9 (32 possibilities) are allowed for the first and fourth character of a module identifier.

When the first character of the module identifier is 9 and the last character is A - Z the identifier is used as an alias for a secondary MMU configuration. Refer to the 41CL Extreme Functions manual for the details of this case. The remaining identifiers with a first character of 9 are used for housekeeping. Any character is allowed for the second and third characters of the module identifier.

The contents of each database entry are shown in the table below.

Address

entry word

1 00 image group image type address<5> 2 01 page restriction type modifier address<4> address<3> 3 10 always 0 always 0 character 2 of module identifier 4 11 always 0 always 2 character 3 of module identifier

LSBs

digit 3

meaning

digit 2

meaning

digit 1

meaning

digit 0

meaning

Digits 3 and 2 of the first word in a database entry are used only by the 41CL Extreme Functions, to search the database by group. The table below shows the groups available

and their encoding in these two digits. Note that these two digits are always written as 00 when using the IMDBINS function (in the 41CL Extreme Functions), so if you want to

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add a custom identifier to a group, you will need to write directly to the correct memory location (in the RAM copy of the Image Database) with one of these values included.

word 1

digits 3:2

00 NUL none (or Null Entry) 10 GEN General-Purpose 20 MAT Mathematics 30 ENG Engineering 40 FIN Financial 50 GAM Games 60 UTL Utilities 70 SYS SystemExtensions 80 HIL HP-IL 90 HWS Hardware-Specific

A0 OSL OS/CL

C0 AST Astronomy C1 AVI Aviation C2 CHM Chemistry C3 MED Medicine C4 GOV Government/Military C5 NAV Navigation C6 PHY Physics C7 PRG Programming C8 SVY Surveying

Fx UNP Unprogrammed database entry

Group meaning

Digit 1 in the first word of a database entry specifies the type of image, according to the table below. Only these values are currently valid as far as the PLUG functions are concerned.

word 1

digit 1

0 4K image (one page) 1 8K image (two pages) 2 16K image (all four banks in one page) 3 16K (four pages) 4 32K (all four banks in two pages)

image type for this module identifier

A type digit of 4 is a slightly special case. The PLUG functions treat this image type as 32K words, consisting of four banks to be loaded into two adjacent pages. However, the images that use this type identifier really only use the first two or three banks in the second page. This leaves one or more 4K-word sections of memory available to store

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other images, and the 41CL takes advantage of this space. So the database search functions treat a type digit of 4 as 24K words in length, and return search results accordingly.

Digit 0 of the first word and digits 1 and 0 of the second word of a database entry hold the starting memory address for the image referenced by the module identifier. This is a physical address that can be in either Flash memory or RAM. Note that if the starting address is 000, along with a type digit of 0, the entry is considered a null entry.

Digit 3 of the second word of a database entry is used only by the 41CL Extreme Functions if there are restrictions on where the image can be placed, according to the table below:

word2 digit 3

0 No Restriction 1 Not Pluggable 2 Page 0 only

3-F Page 3-F only

Page Restriction

Digit 2 of the second word of a database entry is used only by the 41CL Extreme Functions to modify the type field, according to the table below:

word2

digit 2

0 No Modification 1 Modify type 3 to 12K (3 pages)

Type Modification

Digits 1 and 0 of the third and fourth words of a database entry hold the middle two characters of the module identifier. This allows an address-based search of the database to return the full module identifier. It would also allow the PLUG functions to check for the full module identifier, but this feature was not implemented to preserve backwards-com-

patibility. These two words can use either the “display” encoding, where A - Z are

encoded as 0x41-0x5A, or the “assembly language” encoding, where A - Z are encoded as 0x01-0x1A. All of the original entries in the Image Database use the “assembly language” encoding, while any user-added entries will always use the “display” encoding.

As mentioned previously, entries in the Image Database are addressed using the first and fourth characters of a module identifier. Each of these characters must be translated to a 5-bit field to create an address to index the database. The table below shows the translation algorithm.

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character 41 code address field

A 41 00000 B 42 00001 C 43 00010 D 44 00011 E 45 00100 F 46 00101 G 47 00110 H 48 00111

I 49 01000 J 4A 01001

K 4B 01010

L 4C 01011

M 4D 01100

N 4E 01101 O 4F 01110 P 50 01111 Q 51 10000 R 52 10001 S 53 10010 T 54 10011 U 55 10100 V 56 10101

W 57 10110

X 58 10111 Y 59 11000 Z 5A 11001 1 31 11010 2 32 11011 3 33 11100 4 34 11101 5 35 11110 9 39 11111

41CL Calculator Manual

The address for an Image Database entry is formed as shown below:

Image Database address nibble 2

3 2 1 0 3 2 1 0 3 2 1 0

First character module identifier

address field

Image Database address nibble 1

Fourth character module identifier

address field

Image Database

address nibble 0

word

identifier

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All versions of the PLUG functions (in the 41CL Extra Functions and the 41CL Extreme Functions) parse only the first and last characters of an image identifier. The tables below present all of the image identifiers organized in columns based on the first character, and rows based on the last character.

Identifiers highlighted in cyan are not loaded onto V2 boards by default because of space constraints.

Identifiers highlighted in green are not loaded onto V2/V3/V4 boards by default because of space constraints.

Idenifiers 9MM1, 9DD2 and 9YY3 are not really identifiers. Rather, the MM/DD/ YY are replaced with the issue date of the Image Database.

Identifiers 9xx4, 9xx5 and 9xx9 are illegal and will return an error if you attempt to use them with a PLUG function.

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A B C D E F G H I

A AVIA CCDA DAVA E-6A FINA GEDA HPPA B ASMB B52B CFDB ELIB FLDB HTAB IMDB C APSC BBSC CIRC DA4C EPTC FACC HVAC D ABRD CLND DMND EEFD FRID GEOD HWND ICOD

E AFDE BPDE FFEE GAME HOME

F AFDF BREF DIFF E3AF ILBF G ADVG CENG DBUG EENG GLNG H67G INTG H CEPH EPRH FRTH

I ASTI BASI CIVI DEVI EXTI GRVI J

K BLJK CVPK DYRK FSTK GRMK

L BESL CNTL DIIL ESML FRML GASL HCPL ISOL

M AGAM BSHM CHEM DASM EPRM GEOM HILM ISEM

N AFIN BPRN CLIN DIVN EPTN FDYN HILN ISEN O AUTO CRTO DEMO EXIO HORO INDO P BELP DRVP EILP GSWP HCMP ITCP Q AV1Q BIDQ COOQ DACQ GMAQ R AECR BLDR CCDR DURR EDTR FAIR GJMR HEPR IERR

S ANTS BSMS CHES DRPS E41S FUNS GMAS HDIS IDAS

T ASTT BEPT CMGT DIGT EMPT FCST GMAT HMAT IPRT U ASTU BVLU CIVU GASU IRSU V AADV BDRV CURV FADV GSLV HSRV

W BCMW GRAW IGSW

X AOSX BJMX CCDX ELIX FRMX GAMX HEPX IBOX

Y ALGY CITY DSTY FSSY GMTY HNDY

Z ANGZ FRMZ

1 ADV1 BUD1 CMT1 DST1 ENS1 FCS1 GRF1 IDC1

2 ADV2 BUD2 CMT2 DEV2 FCS2 GSB2 HEP2 IDC2

3 AEC3 BUD3 CMT3 ETS3 FCS3 GRF3

4 ASM4 CAB4 DRV4 ETS4 IMS4

5 ETS5

9 ETS9

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41CL Calculator Manual

J K L M N O P Q R

A LOGA PANA RADA B MELB NYSB PMLB C JMBC LPLC MUEC NPAC P3BC D LAND NBOD PCOD RCRD

E MILE P18E RGME

F MBKF PSOF G LENG MENG PROG RMPG H MATH PHYH QMTH

I MLTI NAVI PARI RDII J MAHJ

K KRMK MCCK PPOK RUBK

L LNDL MLBL NONL PWRL REAL

M KRGM MLRM NVCM PPCM ROAM

N LTLN MCHN OPLN PLAN QUEN RCSN O MONO OPTO PLTO P LDSP MCMP NCHP OTRP RRAP Q PRIQ R JARR MRTR NFCR PETR RCTR

S KRSS LBLS MASS PRFS ROMS

T JMAT KNGT LAIT MTST NEXT PLOT QUAT U MLMU PPCU REGU V MINV PSRV ROSV

W OILW PRTW

X JMTX METX PWRX ROMX

Y LADY NTHY POLY

Z LUIZ MAZZ OBCZ PAPZ

1 MDP1 NEA1 OS41 PKP1

2 MDP2 PKP2 RM32

3 MWK3 NEA3 OSX3 PKP3

4 LDY4 MWK4 PKP4

5 K135 MWK5 NEA5 PKP5

9 L119 PPC9

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41CL Calculator Manual

S T U V W X Y Z

A SESA YRGA B SR1B TAFB WWDB YLIB C SPEC D SKWD TMOD UCCD WORD

E STRE TIME WPNE ZONE

F SLVF YFNF G SGSG H SMCH TRIH YACH

I SERI TDSI J

K SEAK TREK VONK

L SMPL YUIL Z4DL

M SIMM TDSM UPLM VERM WRAM XPMM ZEPM

N STAN UCLN YCLN

O SDMO

P SIHP TDSP WARP YFNP

Q STEQ

R SUPR THER XBFR YBFR ZENR S TOMS USPS VEGS XTRS YUPS

T STAT TEST UNIT VECT WPRT XTAT U STRU V SURV ZDRV

W SWSW TIDW VIEW

X SBOX TMAX YFNX Y SECY TVMY Z SHTZ YFNZ

1 SUD1 VOI1

2 TGT2

3 TGT3 VOI3 XFN3

4 SM44

5 SWP5 VOI5 XFN5

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41CL Calculator Manual

1 2 3 4 5 9

A 9CFA B 141B 4LIB 9CFB C 9MEC

D 41AD 5MAD

E 9ELE F 9INF G 4DIG 9PRG

H 5UBH 9MTH

I 4MTI 9SCI J

L 9HIL M 120M 4RAM 9BGM N 4WIN 5LON O

P 2SWP 3SWP 4ALP 9MAP

R 5PAR 9PWR S 16CS 9BAS T 1AST 9CST U V

X 4TBX Y 9PLY Z 441Z 1 9MM1 2 9DD2 3 9YY3 4 5 9

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41CL Calculator Manual

Patching Code

The 41CL Extra Functions make it simple to patch software pre-loaded into the 41CL. Most of the software pre-loaded into the Flash memory can be copied to the RAM memory, patched, and then the MMU can be used to reference this patched code. Only pages that cannot be relocated by the MMU cannot be patched. This is pages 0-3 and 5 (which hold the Operating System, the Extended Functions and the Time Functions.) As mentioned previously, these pages are protected from modification to prevent users from inadvertently turning the 41CL into a brick.

To illustrate what is required to patch code, go through the steps below to modify the ROM ID of the 41CL Extra Functions to avoid a conflict with other modules.

To patch code the ROM image must first be copied to an available page in RAM using the YMCPY function. The YMCPY function automatically executes in 50x Turbo mode and requires about 8 seconds to complete.

ALPHA 007>80C ALPHA XEQ ALPHA YMCPY ALPHA

In this example just one location needs to be modified for proper operation. Note that whenever patches are specified only the 4K relative address will be given. Use the upper nibbles of the RAM address chosen to hold the patched code for the remainder of the address.

0x000 should be 0x0010 to change the ROM ID to 16 (which is 10 in hexadecimal)

Use the YPOKE function to write directly to the desired location in RAM memory. Since we are using the page starting at address 0x80C000 to hold the patched ROM image the following keystrokes are required to apply this patch:

ALPHA 80C000-0010 ALPHA XEQ ALPHA YPOKE ALPHA

Then we can use the PLUG1L function to insert the patched image into the lower half of Port 1 (or wherever the 41CL Extra Functions are, or will be, located):

ALPHA 80C-RAM ALPHA

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41CL Calculator Manual

XEQ ALPHA PLUG1L ALPHA

It’s that simple! The MMU in the 41CL, along with the ability to peek and poke memory, makes this machine a hacker’s delight.

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Using HEPAX

The HEPAX module was one of the most complex third-party 41C modules ever created. It had hardware and software that automatically relocated the module to the lowest unused page of memory, and provided RAM that resided in program memory for file storage. Not all of the features of the HEPAX module are supported by the 41CL calculator, and this section will discuss the details of how to use the HEPAX image included in the 41CL Flash memory.

The HEPAX module implemented write-protection for pages of HEPAX RAM, using an opcode that was ignored by the processor in the 41C. This opcode is also ignored by the NEWT processor in the 41CL, but the write-protect feature is not supported by the 41CL hardware. Keep this in mind if you attempt to write-protect pages of HEPAX memory.

The 41CL Extra Functions make it easy to create a backup copy of RAM pages, using the

YMPCY function to copy an entire page of memory to another location in physical

memory. If you are doing work that might inadvertently corrupt HEPAX RAM, which is what the write-protect feature was for, try creating a copy of the HEPAX RAM page first.

Since the HEPAX code does not “know” about physical memory, the copy will

effectively be write-protected.

The main issue for HEPAX users is that the 41CL hardware does not support the automatic relocation of the HEPAX image. The MMU makes this function unnecessary, so the HEPAX image in the 41CL has been modified to eliminate the automatic relocation feature. Unfortunately a by-product of this modification is that the HEPAX RAM will not be automatically initialized at start-up. Instead, you will need to initialize any HEPAX RAM when the HEPAX image is first plugged into a port.

The 41CL provides a template for initializing HEPAX RAM pages, which simplifies the process considerably, but you will still need to initialize one or two locations in each RAM page if you are using multiple pages of HEPAX RAM. If you want to use just one page of HEPAX RAM, no extra initialization is required.

The 41C code listing below shows the template for initializing HEPAX RAM. This template, which is stored at address 0x0B9000 in the 41CL Flash, should be copied to

each 4K block of RAM that is going to be used for HEPAX RAM. The “fixed value”

locations are checked by the HEPAX software, and values not matching those shown in the listing template will cause an error when the HEPAX code attempts to use the RAM.

Two locations in each HEPAX RAM page contain address pointers. These address

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pointers hold four-bit page numbers in the least-significant digit. The pointer at address 0xFE7 points to the previous page of HEPAX RAM, and a value of 0x000 here marks a page of HEPAX RAM as the first in the chain. The pointer at address 0xFE8 points to the next page of HEPAX RAM, and a value of 0x000 here marks a page of HEPAX RAM as the last in the chain.

;***********************************************************************

.TITLE "HEPAX RAM"

.HP

XROM 13

.FILLTO 0FE6

#000 ; FE7 Previous page identifier #000 ; FE8 Next page identifier #091 ; FE9 fixed value #000 ; FEA #000 ; FEB #000 ; FEC #090 ; FED fixed value #000 ; FEE #091 ; FEF fixed value #000 ; FF0 #0E5 ; FF1 fixed value #00F ; FF2 fixed value #200 ; FF3 fixed value

.FILLTO 0FFE

As an example, the sequence of commands listed below uses four pages of 41CL RAM (at addresses 0x808000, 0x809000, 0x80A000 and 0x80B000) as HEPAX RAM assigned to pages C through F (Ports 3 and 4).

First, the RAM is initialized by copying the HEPAX RAM template to these four pages of RAM memory:

ALPHA 0B9>808 ALPHA XEQ ALPHA YMCPY ALPHA

ALPHA 0B9>809 ALPHA XEQ ALPHA YMCPY ALPHA

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ALPHA 0B9>80A ALPHA XEQ ALPHA YMCPY ALPHA

ALPHA 0B9>80B ALPHA XEQ ALPHA YMCPY ALPHA

Next, the HEPAX RAM pointers in these pages must be initialized. The template loads 0x0000 into all of the pointers to start with, so only the non-zero pointers are written:

ALPHA 808FE8-000D ALPHA XEQ ALPHA YPOKE ALPHA

ALPHA 809FE7-000C ALPHA XEQ ALPHA YPOKE ALPHA

ALPHA 809FE8-000E ALPHA XEQ ALPHA YPOKE ALPHA

ALPHA 80AFE7-000D ALPHA XEQ ALPHA YPOKE ALPHA

ALPHA 80AFE8-000F ALPHA XEQ ALPHA YPOKE ALPHA

ALPHA 80BFE7-000E ALPHA XEQ ALPHA YPOKE ALPHA

Finally the RAM pages are plugged into the Ports:

ALPHA 808-RAM ALPHA XEQ ALPHA PLUG3L ALPHA

ALPHA 809-RAM ALPHA XEQ ALPHA PLUG3U ALPHA

ALPHA 80A-RAM ALPHA XEQ ALPHA PLUG4L ALPHA

ALPHA 80B-RAM ALPHA XEQ ALPHA PLUG4U ALPHA

At this point the HEPAX RAM is initialized to a point where the HEPAX code can

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recognize and use it. Next PLUG the HEPAX image into a Port. To verify that you’ve done everything correctly, try executing a HEPDIR command. The display should return

H:DIR EMPTY, and clearing this from the display should show 2610, which is the

size of four pages of HEPAX RAM.

Patching HEPAX

The HEPAX DISASM function scans the keyboard during the disassembly process, but it appears that to save space this scanning function was not implemented properly. (The code does not look at the keyboard valid flag.)

In addition, early versions of the 41CL keyboard scanner did not output the same scan code as the original 41C when no key is being pressed. (The idle state code was not specified in the HP documentation.)

As a result of these two issues the HEPAX DISASM code thinks that the ON key has been pressed immediately after the last address digit has been entered, turning the calculator off.

The way around this issue is to remove the test for a press of the ON key during the HEPAX DISASM function. This requires copying one page of the HEPAX code to RAM so that one location can be patched, and then pointing the MMU at the patched code.

The example below assumes that the HEPAX module has been loaded into the lower half of Port 2, which is page A, and that the uppermost page of RAM (starting address 0x83F000) will be used for the patched HEPAX page.

First, the Bank 4 HEPAX image is copied to RAM:

ALPHA 030>83F ALPHA XEQ ALPHA YMCPY ALPHA

Next, the instruction that tests for a press of the ON key is replaced with a NOP instruction:

ALPHA 83F08D-0000 ALPHA XEQ ALPHA YPOKE ALPHA

Finally, this RAM page is substituted for bank 4 of the HEPAX image in Flash by directly programming the MMU register. The MMU register must be programmed directly because we are only substituting one bank of the HEPAX code.

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ALPHA 8040AC-883F ALPHA XEQ ALPHA YPOKE ALPHA

Enabling HEPAX Disassembly

The HEPAX DISASM function does not allow the disassembly of the HEPAX code itself. If you want to remove this restriction, four locations in Bank 1 of the HEPAX code need to be modified. The code is in Bank 1 of the HEPAX code, and we will use the RAM at address 0x83E000 to hold the patched code.

First, the Bank 1 HEPAX image is copied to RAM:

ALPHA 02D>83E ALPHA XEQ ALPHA YMCPY ALPHA

Next, the instructions that branch to an error routine are replaced with NOP instructions:

ALPHA 83E131-0000 ALPHA XEQ ALPHA YPOKE ALPHA

ALPHA 83E132-0000 ALPHA XEQ ALPHA YPOKE ALPHA

ALPHA 83E133-0000 ALPHA XEQ ALPHA YPOKE ALPHA

ALPHA 83E134-0000 ALPHA XEQ ALPHA YPOKE ALPHA

Finally, this RAM page is substituted for bank 1 of the HEPAX image in Flash by directly programming the MMU register:

ALPHA 8040A0-883E ALPHA XEQ ALPHA YPOKE ALPHA

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Serial Connector

The serial connector jack signals are assigned as follows:

• Tip: Transmit Data from the point of view of the 41CL calculator. This should connect to pin 2 of a female DB9 connector for use with a PC.

• Mid: Ground. This should connect to pin 5 of a female DB9 connector for use with a PC.

• Ring: Receive Data from the point of view of the 41CL calculator. This should connect to pin 3 of a female DB9 connector for use with a PC.

The type of cable required to connect the 41CL calculator to a PC is also used for older digital cameras and cell phones, so it can still be found. However, be aware that two different signal arrangements were used for these types of cables, depending on the manufacturer. See the table below for one source.

The RS-232 driver on the 41CL board normally only powers up when a valid signal level is detected on the Receive Data input. This can make 41CL-to-41CL serial transfers complicated. Starting with Version 4, the 41CL board supports a way for software to force the RS-232 driver on unconditionally. So if one of the 41CL calculators involved in a 41CL- to-41CL transfer supports this feature the transfer is simple. All that is required is a null-modem adapter connecting the two serial cables. See the table below for one source.

If you want to try to construct an internal serial connector yourself the part numbers are listed below. Note that the cable comes with 10 conductors, so you will have to trim it down to three conductors. Refer to the 41CL schematic for the signal connections on the circuit board connector.

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Part Source Part number

Serial cable (DB-9 to 2.5mm stereo): www.cableclub.com BC20213-6

Null-modem adapter: www.monoprice.com 1202

Plug for circuit board connector: www.digikey.com 455-2189-ND

Multi-conductor cable: www.digikey.com MB20G-10-ND

2.5mm Stereo Jack: www.mouser.com 161-7000-EX

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Time Clone Connections

41CL boards starting with version V4 have connection points for the 41C port bus on the top of the board. This allows a Time Clone board to be attached using short jumper wires. The Time Clone board can be fastened to the top of the Flash memory chip with a small piece of double-sided tape to hold it in place. The figure below shows the connection points on the top of the 41CL board.

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The figure below shows the connection points on the bottom of the Time Clone board. These connection points are in the same order required for mounting the board in a module housing.

The figure below shows the placement and connections for the Time Clone board. The board is held in place by a small (5 mm by 5 mm) piece of double-sided tape. The best place on the Time Clone board to affix the tape is on the FFC connector, which is on the top of the board.

Use 30-guage wire, stripped for 1.5 mm on both ends. The following wire lengths are recommended:

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Signal Figure color Wire Length

VCC Black 2.5 cm GND Brown 2.5 cm PWO Red 5 cm

DATA Orange 3 cm

FI Yellow 4 cm

ISA Green 3 cm

SYNC Blue 3 cm

PH2 Violet 3 cm PH1 Grey 3 cm

The connection points on the 41CL board are 1 mm by 1 mm, so the wires should be soldered oriented on the diagonal, in the directions shown in the figure. Solder the wires to the 41CL board first, working from right to left in the figure. Then solder the wires to the Time Clone board, working from top to bottom.

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Updating 41CL Hardware

The 41CL board uses programmable logic. This means that with the right equipment the hardware can be updated to correct errors. The same facilities that allow hardware programming can also be used to update the Flash memory on the board. This section will describe the connections necessary to perform hardware programming. The figure below shows the top side of the 41CL board.

All programming operations require that the board be powered. Using the normal HP41 connector on the bottom of the board is not an appropriate way to power the board for programming. Instead, there are three solder pads in the corner opposite the programming

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connectors that need to have wires soldered to them.

Solder short (20-30cm should be sufficient) wires to the solder pads labelled VIN, GND and POR. The RST solder pad is not required for programming.

Battery power is not appropriate from programming. Instead use a benchtop power supply. The 41CL board requires 5V (4.0v minimum / 6.0V maximum) for programming.

• Make sure the power supply is OFF before connecting it to the 41CL board.

• Connect the GND wire to the ground of a benchtop power supply.

• Connect the VIN wire to the positive output from the power supply.

• Connect the POR wire to the ground of the power supply to program the FPGA or the

Flash. Leave this wire unconnected to program the CPLD. Grounding the POR signal turns on the switched power supplies on the board.

Do not turn on the power supply until the programming cable is connected. Be aware that some variable power supplies overshoot quite a bit on start-up. If you are using a variable supply it is probably better to manually ramp up the supply voltage from zero to the final value rather than turning on the supply with the full supply voltage selected.

CPLD Programming

The CPLD is programmed using the connector labelled CP on the board. This is the same connector used for the serial port signals. The CPLD is programmed using a Xilinx programming cable. The figure below shows the wiring required between the CPLD connector on the board and the standard Xilinx programming cable.

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FPGA Programming

The FPGA is programmed using the connector labelled FP on the board, using an Actel programming cable. The figure below shows the wiring required between the FPGA connector on the board and the standard Actel programming cable.

Flash Programming

The Flash memory is also programmed using the connector labelled FP on the board. The exact connection will depend on the JTAG programming hardware that you use. The important thing to remember is that the TRST signal must be grounded to enable the JTAG controller, and the VPUMP signal must be left floating.

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Revision History

Date Changes Pages

01/14/2011 Initial release 01/15/2011 Misc. typos 01/19/2011 Added chapter on FORTH41, added rampage image 01/23/2011 more typos 01/25/2011 more typos 02/10/2011 more typos, added pictures, serial connector section 02/22/2011 more typos 04/04/2011 Added paragraph on backing up 41C register memory

Added “Patching Code” section

04/22/2011 Removed “current bank” as logical address option.

Added clarification to serial functions. Miscellaneous clarifications to text. Added some new module images and mnemonics.

Modified the “Patching Code” section for a different example.

04/29/2011 Updates to Flash functions, color changes 04/30/2011 Fixed some error messages (PLUGxx and YFERASE)

Function Summary, Error Messages sections added 05/01/2011 Deleted ASTU module mnemonic. Included in ASTT. 18 05/03/2011 Spectral Analysis ROM added 05/17/2011 Added Algebra, Sandmath II and Modified Advantage modules 06/06/2011 Corrected XROM number for BCMW ROM.

Added cautionary note about serial port connector. 06/11/2011 Added part list for serial connector 59-60 06/14/2011 Typo in register byte layout 38 06/16/2011 Added info on current drain

Added info on Operating System usage of register address space3138-39 06/24/2011 Updated recover procedure for lost Y-functions. 12 07/16/2011 Updated Chapters 3, 4 and 5 for YFNS-1C 13-50 08/25/2011 Complete revision 09/11/2011 typos 09/16/2011 New modules, flash memory map 01/10/2012 Added new module images on second batch of boards 43-55 02/02/2012 Clarifications in “Introduction” and “Getting Started” chapters 5-14 02/19/2012 Added new images for Version 3 hardware 18-58 08/13/2012 Updated for YFNS-4A 09/03/2012 Added Library-4 Sandmath information 09/28/2012 Added notes about connecting to the serial port. 35 10/05/2012 Revised YFNS/Z to -4B, YFNP to -1B 12/13/2012 Added new module images and mnemonics 12/14/2012 Added one more module image 12/15/2012 Added more Library-4 images 12/25/2012 Added YCRC values for all images Ch. 10

23 59 on

various 93 on

18 59

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12/31/2012 mistake in number of available RAM pages 58 01/01/2013 added note to Printer Service ROM: page 4 takeover ROM 54 01/07/2012 a number of typos (thank you Dan Grelinger for your review) 01/08/2013 Clarified the differences between YFNZ, YFNS and YFNP Ch. 2 01/28/2013 PLUGP warning

Module Table

Memory Buffer Functions explanation

Special MMU Functions explanation

Added new images, new image versions

19 20-26 31 40

Ch.5, Ch. 10 02/07/2013 Note about MMUCLR not affecting MMU registers for Pages 0-3 16, 41 02/16/2013 Updated YCRC value for new images Ch. 10 02/22/2013 Added two new images Ch. 10 02/26/2013 Typos and clarifications throughout 03/05/2013 More new images... 04/24/2013 More new images... also, had to move ROSU image because it’s

actually an 8K image 05/10/2013 Complete reformat 05/12/2013 forgot Number Theory ROM in tables 05/14/2013 serial connector clarification 05/22/2103 added missing YCRC values 109, 110 05/25/2013 new images 05/27/2013 new images 06/10/2013 typos 120 06/19/2013 updated YCRC values for latest images Ch. 16 07/03/2013 new images, updated YCRC values for new & latest images Chs. 7, 13, memref 08/19/2013 updated images Chs. 7, 13, memref 08/27/2013 new/revised images Chs. 7, 13, memref 09/09/2013 updated YCRC values for new/updated images memref 11/29/2013 updated YCRC values for new/updated images memref 12/04/2013 updated YCRC values for updated images memref 12/05/2013 Expanded descriptions for 41CL Extreme Functions Ch. 12, 17 12/11/2013 Expanded descriptions for 41CL Extreme Functions Ch. 6, 7 01/04/2014 updated YCRC values for updated images memref 02/24/2014 corrected bank numbering in memory reference memref 03/14/2014 updated YCRC values for updated images, aesthetics memref 04/01/2014 new images memref 04/08/2014 new versions: PWRL, PWRX, YFNX memref 04/28/2014 new versions: YFNX, 4RAM memref 05/04/2014 added NutIP ROM image memref, etc. 05/23/2014 new images memref, etc. 05/28/2014 new versions: TVMY, SM33 memref 06/03/2014 new versions: SM33, YFNX, YLIB memref 07/10/2014 new images: BASI, FCST, FCS2, COOQ memref, etc. 07/18/2014 new image: FSSY memref, etc. 07/27/2014 new images: FFEE, ETS9 memref, etc. 07/31/2014 new images: CIVI, CIVU, VONK memref, etc. 08/04/2014 new image: NONL memref, etc. 08/06/2014 new versions: ETS9, NONL memref 08/12/2014 updated memory reference memref 08/16/2014 typo (thank you, Gene) 28 08/17/2014 another typo (does it ever end?)

new versions: CIVU, ETS5

75 memref

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08/23/2014 new versions: PWRX

new image: XPMM

memref, etc. 08/26/2014 new versions: 4LIB, PWRX memref 10/06/2014 new versions: PWRX, YFNX memref 10/16/2014 new version: XPMM memref 10/17/2014 new version: XPMM memref 11/22/2014 updated 41CL functions 11/24/2014 reformat 12/04/2014 new versions: 4LIB, PWRX, CLUT; updated memref 12/17/2014 typos, removed memref it’s now a stand-alone document only 01/18/2015 new images: SM44, ANGZ, TMAX, BLJK, BJMX, VEGS 02/03/2015 mark obsolete/superceeded images in identifier table 55-62 02/11/2015 new image: PPCU 59, 89 02/17/2015 new identifier: MBFR; clarification for IMDB operation 59, 89, 42 02/22/2015 user feedback (thank you, Bob) various 02/23/2015 new images: WWDB, JARR, GRAW, MCCK, KRGM, UCCD various 02/24/2015 new images: PKP1, PKP2, PKP3, PKP5, PKP7 various 02/26/2015 updated identifer information for V2 boards various 03/01/2015 UCCD XROM number 61 03/28/2015 new image: GTWN, minor changes to V2 image selection various 04/29/2015 new images: TTRC, 16CS various 06/01/2015 new images: TDSI, TDSM, TDSP, HCPL various 09/08/2015 new images: STEQ, 2SWP various 09/10/2015 updated acknowledgement section inside cover 09/12/2015 new images: PPOK, TIDW various 09/15/2015 cleaned up Image Identifer section 09/05/2015 new image: PRTW various 10/05/2015 new image: CLND various 10/26/2015 new images: GRVI, RUBK, TAFB, JBMC, UCLN, EEFD various 11/16/2015 new images: 3SWP, XBFR, XTRS, CRTO various 12/07/2015 new/updated images: XTAT, 3SWP, EPTN various 12/18/2015 new images: WORD, CITY, PLAN, PLTO various 01/08/2016 new image: GJMR various 01/10/2016 removed reference to 7 obsolete images to make space for future

various

new images: ALGG, MADV, SANA, 4ADV, 4SMT, 4SM4, 4UTL 01/17/2016 updated SM44, new SERI, ELPT various 01/23/2016 removed reference to another obsolete image: SM33 various 03/04/2016 new image: 4ZDL various 04/17/2016 new image: HTAB various 04/22/2016 new image: GSB2 various 05/12/2016 new images: KRSS, KNGT, MAHJ, QUEN various 05/13/2016 new image: GSWP

added caution about using nuts to hold 41CL board in place.

various

12 05/17/2016 new image: OPLN various 06/04/2016 updated images: ADV1/2, BASI, GSB2, GSWP, MAHJ, 2SWP

various

new images: AGAM, GRMK, RGME, SR1B

superceeded images: GTWN 06/08/2016 new images: DBUG, RCRD various 06/10/2016 new image: GAMX various 06/20/2016 new images: 141B various 06/28/2016 new image: ADVG various 07/08/2016 new image: HNDY various

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07/27/2016 updated image: ELPT

various

new images: ROMX, GRF1, GRF3, GASL, GASU 08/02/2016 updated image: NONL

various

new image: GEOD 08/04/2016 new image: CAB4 various 08/23/2016 new image: YRGA

various

removed obsolete image: CLUT 09/06/2016 updated images: XPMM, ROMX, TTRC, 4LIB

various

new image: 4WIN 09/26/2016 deleted obsolete images: 4AOS, 4PLY, 4MTR various 11/07/2016 updated images: ETS4, TEST

various

new images: E-6A, H67G, KRMK 11/09/2016 new image: PPC9 various 03/23/2017 new images: FRID, RCSN, TGT2, TGT3 various 04/11/2017 new image: IMS4 (not loaded in Flash by default) various 04/18/2017 deleted obsolete images: BLND, MTRX

various

new image: METX (reusing M--X mnemonic) 04/27/2017 removed references to YFNS

various updated image: METX new images: 5MAD, 5LON

05/01/2017 deleted obsolete image: RAMP various 05/04/2017 new image: WPNE various 05/20/2017 new image: LADY, LDY4 various 05/27/2017 deleted obsolete image: ALPH, TTRC

various new image: WARP

06/09/2017 deleted obsolete image: TOOL, YFNS

various new im ages: FRML, YUPS

06/25/2017 new images: 1AST, ZDRV various 07/04/2017 new image: BPDE various 07/08/2017 deleted obsolete image: CCDP various 08/04/2017 corrected Table of Contents 08/14/2017 new image: 5PAR various 09/01/2017 new images: BELP, RDII, YCLN various 09/19/2017 typo 73 10/01/2017 deleted obsolete image: Z41Z various 10/21/2017 new image: BDRV various 11/23/2017 new images: MRTR, P18E various 12/01/2017 new image: YUIL various 01/22/2018 many new and updated images various 02/16/2018 many new and updated images (again) various 02/23/2018 changed mnemonic from ELPT to EPTC (conflict with EMPT) various 03/11/2018 new images: ASTI, ELIX, IGSW various 03/22/2018 new image: LDSP various 04/02/2018 new image: HORO various 04/24/2018 new image: UPLM various 05/14/2018 new images: BSHM, DRV4, DRVP, GMAQ, NBOD, REGU,

various SWSW, VIEW, ZONE

06/10/2018 new image: HILN various 06/24/2018 new image: QMTH various 06/26/2018 new image: BREF various 09/10/2018 new images: BEPT, SDMO; deleted image: MTRA various 09/21/2018 new images: LTLN, PAPZ, RRAP various

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09/25/2018 new image: FSTK various 12/02/2018 new images: ELIB, MWK5 various 01/23/2019 moved to MS Word; added info about special cases, Time Clone various 02/08/2019 new images: GLNG, SLVF; split FRML into FRML & FRMX various 03/27/2019 new image: CEPH various

Systemyde 41CL User Manual

Specifications and Main Features

Frequently Asked Questions

User Manual