Low-cost Green-Mode PWM Controller for Flyback Converters
SG6848x1
FEATURES
Green-mode PWM Controller
Low Start-up Current (5uA)
Low Operating Current (3mA)
Programmable PWM Frequency
Peak-current-mode Operation
Leading-edge Blanking
Built-in Synchronized Slope Compensation
Cycle-by-cycle Current Limiting
Constant Output Power Limit
Gate Output Voltage Clamped at 15V
Small SOT-26 Package Available
APPLICATIONS
General-purpose switching mode power supplies and
flyback power converters, such as
Battery chargers
Power adapters
Open-frame SMPS
Replacements for linear transformers and RCC
5V standby power for PC power supply.
DESCRIPTION
This highly integrated PWM controller provides
several special enhancements designed to meet the low
standby-power needs of low-power SMPS. To
minimize standby power consumption, the proprietary
green-mode function provides off-time modulation to
continuously decrease PWM frequency under light-load
conditions. This green-mode function enables the power
supply to easily meet even the strictest power
conservation requirements.
The BiCMOS fabrication process enables reducing
the start-up current to 5uA, and the operating current to
3mA. As a result, a large start-up resistance can be used.
Built-in synchronized slope compensation ensures the
stability of peak-current-mode control. Proprietary
internal compensation provides a constant output power
limit over a universal AC input range (90VAC to
264VAC). Cycle-by-cycle current limiting ensures safe
operation during short-circuits.
To protect the external power MOSFET from being
damaged by supply over voltage, the SG6848x1’s output
driver is clamped at 15V. The SG6848x1’s controllers can
be used to improve the performance and reduce the
production cost of power supplies. The SG6848x1 is the
best choice for replacing linear and RCC power supplies.
It is available in DIP-8 and SOT-26 packages.
Low-cost Green-Mode PWM Controller for Flyback Converters
OPERATION DESCRIPTION
10uF/50V, the power-on delay T
is less than 2.8S for
D_ON
90VAC input.
The SG6848x1 devices integrate many useful
functions into one controller for low-power switching
mode power supplies. The following descriptions
The FB input
highlight some of the features of the SG6848D1.
This pin is designed for feedback control and to
Start-up Circuitry
When the power is turned on, the input rectified
voltage, Vdc, charges the hold-up capacitor C1 via a
start-up resistor R
the start threshold voltage V
activates the entire power supply.
. As the voltage of VDD pin reaches
IN
, the SG6848x1
TH(ON)
V
TH(ON)
Vdc
activate the green-mode function. Figure 2 is a typical
feedback circuit mainly consisting of a shunt regulator
and an opto-coupler. R
and R2 form a voltage divider for
1
the output voltage regulation. R3 and C1 are adjusted for
control-loop compensation. A small-value RC filter (e.g.
= 47ohm, CFB= 1nF) placed from the FB pin to GND
R
FB
can increase stability. The maximum source current on the
FB pin is 2mA. The phototransistor must be capable of
sinking this current to pull the FB level down at no load.
Thus, the value of the biasing resistor Rb is determined as
follows,
SG6848x1
R
SG6848D1
VDD
GND
I
DDST
C1
IN
D1
T
D_ON
Figure 1. Power Circuit
The maximum power-on delay time is determined as
follows,
)(
INDDSTdcONTH
T
1)(
eRIVV (1)
−⋅−=
where
VVV
ZDo
(2)
mAK
2≥⋅
Rb
V
Z
regulator. Typical value is 2.5V;
K is the current transfer rate (CTR) of the opto-coupler.
maximum value of Rb is 650ohm.
OND
_
⋅−1
CR
IN
where V
is the drop voltage of a photodiode, about 1.2V;
D
is the minimum operating voltage of the shunt
For an output voltage Vo=5V, with CTR=100%, the
V
O
R1
FB
R
FB
C
FB
Rb
R3
C1
is the start-up current of SG6848x1;
I
DDST
is the power-on delay time of the power
T
D_ON
R2
supply.
Due to the low start-up current, a large R
such as
IN
1.5Mohm can be used. Also with a hold-up capacitor of
Low-cost Green-Mode PWM Controller for Flyback Converters
SG6848x1
Oscillator & Green Mode Operation
One external resistor, RIi, connected between RI and
GND pins is used to program the PWM frequency of the
SG6848x1. The approximated formula is:
=
6650
I
is from 50 to 100KHz.
OSC
RI
SG6848D 1
GND
(3)
)Kohm(R
OSC
)KHz(F
The recommended F
RI CI
Figure 3. Setting PWM frequency
The patented green-mode function provides off-time
modulation to reduce the PWM frequency at light-load
and no-load conditions. The sink current of the FB pin
determines the green mode operation as shown in Figure 4.
At light load, the sink current of the FB pin will increase.
When the sink current is larger than 1mA, the PWM
frequency decreases in order to reduce the power
consumption of the power supply at light-load and in
no-load conditions.
For lightning surge tests, a small capacitor (not over
50pF) connected from the RI pin to GND is recommended.
This added capacitor also improves stability, especially at
light load and high input line voltage conditions.
Built-in Slope Compensation
A flyback converter can be operated in either
discontinuous current mode (DCM) or continuous current
mode (CCM). There are many advantages to operating the
converter in CCM. With the same output power, a
converter in CCM exhibits smaller peak inductor currents
than one in DCM. Therefore, a small-sized transformer
and a low-rated MOSFET can be applied. On the
secondary side of the transformer, the rms output current
of DCM can be up to twice that of CCM. Larger wire
gauge and output capacitors with larger ripple current
ratings are required. DCM operation also results in higher
output voltage spikes. A large LC filter must also be
added. Therefore, a flyback converter in CCM achieves
better performance with lower component cost.
Despite the above advantages of operating in CCM,
there is one concern–stability. Operating in CCM, the
output power is proportional to the average inductor
current, while the peak current is controlled. This causes
the well-known sub-harmonic oscillation when the PWM
duty cycle exceeds 50%. Adding slope compensation
(reducing the current-loop gain) is an effective way to
prevent this oscillation. The SG6848x1 introduces a
synchronized positive-going ramp (V
switching cycle to stabilize the current loop. The sensed
voltage together with this slope compensation signal
) is fed into the non-inverting input of the PWM
(V
SLOPE
comparator. The resulting voltage is compared with the
FB signal to adjust the PWM duty cycle, such that the
output voltage is regulated. Therefore, users can use the
SG6848x1 to design a cost-effective, highly efficient and
compact sized flyback power supply operating in CCM
without adding any external components.
Low-cost Green-Mode PWM Controller for Flyback Converters
Constant Output Power Limit
UVLO level of the SG6848x1, the power supply will
enter hiccup operation mode and hence limit the output
The maximum output power of a flyback converter
can generally be determined from the current-sense
resistor R
. When the load increases, the peak inductor
S
current increases accordingly. When the output current
arrives at the protection value, the OCP comparator
dominates the current control loop. OCP occurs when the
current-sense voltage reaches the threshold value. The
output GATE driver is turned off after a small propagation
delay, td. The delay time results in unequal power-limit
level under universal input. In the SG6848x1, a saw-tooth
power. However, it is possible that the V
remains higher than the UVLO level even if the output is
shorted. This happens when the coupling between the aux
and the primary winding is too good. Therefore, the
construction of the transformer becomes a dominant
factor. The recommended construction layout is to
increase the insulation thickness for the aux winding and
place the primary aux winding in one side of the bobbin.
For low output voltage applications, using a low dropout
voltage diode and a larger secondary winding also helps.
power-limiter is designed to solve the unequal
power-limit problem. As shown in Figure 5, the power
One side
limiter is designed as a positive ramp signal and is fed to
the inverting input of the OCP comparator. This results in
Primary aux winding
a lower current limit at high-line inputs than at low-line
inputs. However, with fixed propagation delay, td, the
peak primary current would be the same for various line
Primary main winding
Secondary winding
input voltages. Therefore the maximum output power can
practically be limited to a constant value within a wide
Primary main winding
input voltage range without adding any external circuitry.
Figure 6. Transformer construction
t
ton
off
V
TH,FLT
SG6848x1
voltage
DD
Increased thickness
Leading-Edge Blanking
A voltage signal proportional to the MOSFET
High line
sense vo ltage
Low line
sense voltage
TH,VALLEY
current develops on the current-sensing resistor, R
time the MOSFET is turned on, a spike, which is induced
. Each
S
V
by the diode reverse recovery and by the output
capacitances of the MOSFET and diode, inevitably
appears on the sensed signal. Inside the SG6848x1, a
leading-edge blanking time of about 200 nsec. is
0
T
1
T2
Figure 5. Constant power limit compensation
introduced to avoid premature termination of the
MOSFET by the spike. Therefore, only a small-value RC
filter (e.g. 100ohm + 470pF) is required between the
SENSE pin and R
isrecommended.
R
S
. Still, a non-inductive resistor for the
S
Short Circuit Protection
When the output of a flyback power supply is shorted,
the primary VDD will decrease due to the coupling
polarity between the aux winding and the secondary
winding of a transformer. When V
Low-cost Green-Mode PWM Controller for Flyback Converters
Lab Note
Before reworking or soldering/de-soldering on the
power supply, it is suggested to discharge the primary
SG6848D1
Blanking
Circuit
Gate
Sense
capacitors by an external bleeding resistor. Otherwise the
PWM IC may be destroyed by external high voltage
during soldering or de-soldering.
This device is sensitive to ESD discharge. To
improve the production yield, the production line should
be ESD protected in accordance to ANSI ESD S1.1, ESD
S1.4, ESD S7.1, ESD STM 12.1, and EOS/ESD S6.1.
Printed Circuit Board (PCB) Layout
Figure 7. Turn on spike
Gate Drive
The SG6848x1’s output stage is a fast totem pole
driver that can drive a MOSFET gate directly. It is also
equipped with a voltage clamping Zener diode to protect
the MOSFET from damage caused by undesirable
over-drive voltage. The output voltage is clamped at 15V.
An internal pull-down resistor is used to avoid a floating
state of the gate before startup. A gate drive resistor in the
range of 47 to 100ohm is recommended. This resistor
limits the peak gate drive current and provides damping to
prevent oscillations at the MOSFET gate terminal.
VDD
ON/OFF
Driver
SG6848D1
15V
Gate
Figure 8. Gate drive
High frequency switching current/voltage makes
PCB layout a very important design issue. Good PCB
layout minimizes excessive EMI and helps the power
supply survive during surge/ESD tests. Here, we give
some common guidelines:
In order to get better EMI performance and reduce
line frequency ripples, the output of the bridge rectifier
should be connected to capacitor C1 first, and then to the
switching circuits.
The high frequency current loop is in C1 –
Transformer – MOSFET – R
– C1. The area enclosed
S
by this current loop should be as small as possible. Keep
the traces (especially 4→1) short, direct, and wide. High
voltage traces related to the drain of the MOSFET and the
RCD snubber should be kept far way from control circuits
to prevent unnecessary interference. If a heatsink is used
for the MOSFET, it’s better to connect this heatsink to a
ground.
As indicated by 3, the ground of control circuits
should be connected first before any other circuitry.
As indicated by 2, the area enclosed by the
transformer aux winding, D1, and C2 should also be
kept small. Place C2 close to the SG6848x1 for good
decoupling.
Two suggestions for ground connections, with
different pro and cons, are offered.
Low-cost Green-Mode PWM Controller for Flyback Converters
GND3 → 2 → 4 → 1: This should avoid common
impedance interference for the sense signal.
high frequency impedance and help increase ESD
immunity.
SG6848x1
GND3→2→1→4: This should be better for ESD
tests, where the earth ground is not available on the power
supply. Regarding the ESD discharge path, the charges go
from secondary through the transformer’s stray
capacitance to GND2 first. Then the charge goes from
GND2 to GND1 and back to the mains. It should be noted
that control circuits should not be placed in the discharge
path. Point discharges for common choke can decrease the
Vdc
C1
Common mode
choke
1
R
I
C
R
FB
Should a Y-cap between primary and secondary be
required, it is suggested to connect this Y-cap to the
positive terminal of C1 (Vdc). If this Y-cap is connected
to the primary GND, it should be connected to the
negative terminal of C1(GND1) directly. The Point
discharge of this Y-cap also helps with ESD. However,
the distance between these two points should be at least
5mm according to safety requirements.
Low-cost Green-Mode PWM Controller for Flyback Converters
SG6848x1
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applications.
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