ESP32-0037-7002 is a wireless product, which mainly includes an ESP32-PICO-D4, a 32768Hz
crystal and a 2.4GHz antenna. See the block diagram as Figure 1. 0037-7002 provides the WIFI and
Blue Tooth (BLE) functions.
The ESP32-PICO-D4 is a System-in-Package (SIP) module that is based on ESP32, providing
complete Wi-Fiand Bluetooth functionalities. The module integrates a 4-MB SPI flash.
At the core of this module is the ESP32 chip, which is a single 2.4 GHz Wi-Fi and Bluetooth combo
chip. ESP32-PICO-D4 integrates all peripheral components seamlessly, including a crystal oscillator,
flash, filter capacitors and RF matching links in one single package.
Figure 1 Block diagram of ESP32-0037-7002
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2 Pin Definitions
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2.1 Pin Layout
Pin 1
Pin 30
Pin 2
Pin 29
Pin 3
Pin 4
Pin 5
Pin 6
Pin 7
Pin 8
Pin 9
Pin 28
Pin 27
Pin 26
Pin 25
Pin 24
Pin 23
Pin 22
Pi
n
Pi
n
Figure 2 Pin Layout of ESP32-0037-7002
Pi
n
Pin Pi
n
Pi
n
Pi
n
Pi
n
Pi
n
Pi
n
Pi
n
Pi
n
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2.2 Pin Description
Table 2: Pin Description
No. Name Type Function
1
2
3
4
5
6
7
8
9
10 VDD P Power supply (2.3V ~ 3.6V)
11 IO13 I/O GPIO13, ADC2_CH4, TOUCH4, RTC_GPIO14, MTCK, HSPID,
ESP32 has five strapping pins, which can be seen in Section 5 Schematics:
• MTDI
• GPIO0
• GPIO2
• MTDO
• GPIO5
Software can read the value of these five bits from the register ”GPIO_STRAPPING”.
During the chip power-on reset, the latches of the strapping pins sample the voltage level as strapping
bits of ”0” or ”1”, and hold these bits until the chip is powered down or shut down. The strapping bits
configure the device boot mode, the operating voltage of VDD_SDIO and other system initial settings.
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Each strapping pin is connected with its internal pull-up/pull-down during the chip reset. Consequently,
if a strapping pin is unconnected or the connected external circuit is high-impendence, the internal
weak pull-up/pull-down will determine the default input level of the strapping pins.
To change the strapping bit values, users can apply the external pull-down/pull-up resistances, or
apply the host
MCU’s GPIOs to control the voltage level of these pins when powering on ESP32.
After reset, the strapping pins work as the normal functions pins.
Refer to Table 3 for detailed boot modes’ configuration by strapping pins.
Table 3: Strapping Pins
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3 functionalDescription
This chapter describes the modules integrated in ESP32-0037-7002, and their functions.
3.1 CPU and Internal Memory
ESP32 contains two low-power Xtensa® 32-bit LX6 microprocessors. The internal memory includes:
• 448 KB of ROM for booting and core functions.
• 520 KB (8 KB RTC FAST Memory included) of on-chip SRAM for data and instruction.
– 8 KB of SRAM in RTC, which is called RTC FAST Memory and can be used for data storage; it is
accessed by the main CPU during RTC Boot from the Deep-sleep mode.
• 8 KB of SRAM in RTC, which is called RTC SLOW Memory and can be accessed by the coprocessor during the Deep-sleep mode.
• 1 kbit of eFuse, of which 256 bits are used for the system (MAC address and chip configuration) and
the remaining 768 bits are reserved for customer applications, including Flash-Encryption and Chip-ID.
3.2 External Flash and SRAM
The ESP32-PICO-D4 module integrates 4 MB of external SPI flash. The 4-MB SPI flash can be
memory-mapped onto the CPU code space, supporting 8, 16 and 32-bit access. Code execution is
supported.
3.3 Crystal Oscillators
ESP32-PICO-D4 integrates a 40 MHz crystal oscillator.
3.4 RTC and Low-Power Management
With the use of advanced power-management technologies, ESP32 can switch between different
power modes (see Table 5).
• Power modes
– Active mode: The chip radio is powered on. The chip can receive, transmit, or listen.
– Modem-sleep mode: The CPU is operational and the clock is configurable. The Wi-
Fi/Bluetooth baseband and radio are disabled.
– Light-sleep mode: The CPU is paused. The RTC memory and RTC peripherals, as well as
the ULPcoprocessor are running. Any wake-up events (MAC, host, RTC timer, or external interrupts)
will wake up the chip.
– Deep-sleep mode: Only RTC memory and RTC peripherals are powered on. Wi-Fi and
Bluetooth connection data are stored in RTC memory. The ULP-coprocessor can work.
– Hibernation mode: The internal 8-MHz oscillator and ULP-coprocessor are disabled. The
RTC recovery memory is powered down. Only one RTC timer on the slow clock and some RTC
GPIOs are active. The RTC timer or the RTC GPIOs can wake up the chip from the Hibernation mode.
• Sleep Patterns
– Association sleep pattern: The power mode switches between the Active mode, Modem-
and Lightsleep mode, during this sleep pattern. The CPU, Wi-Fi, Bluetooth, and radio are woken up at
predetermined intervals to keep Wi-Fi/BT connections alive.
– ULP sensor-monitored pattern: The main CPU is in the Deep-sleep mode. The ULP-
coprocessor takes sensor measurements and wakes up the main system, based on the data collected
from sensors.
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