Synopsys 640-pin Generic Device Adapter User Manual
Using the ModelSource
640-pin Generic Device
Adapter
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Release R3.6b
November 2001
The ModelSource 640-pin Adapter
Copyright © 2001 Synopsys, Inc.
All rights reserved.
Printed in USA.
Information in this document is subject to change without notice.
Synopsys and the Synopsys logo are registered trademarks of Synopsys, Inc. For a list
of Synopsys trademarks, refer to this web page:
http://www.synopsys.com/copyright.html
All company and product names are trademarks or registered trademarks of their
respective owners.
2 Synopsys, Inc. November 2001
The ModelSource 640-pin Adapter Contents
Contents
Preface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
About This Application Note . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Related Documents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Manual Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Typographical and Symbol Conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Getting Help . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
The Synopsys Website . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Comments? . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Chapter 1
Describing a 640-pin Logic Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Hardware Requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Software Requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Procedural Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Chapter 2
Building the Daughterboard . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Daughterboard Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Connector Pin Detail . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Connectors J1 and J3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Connectors J2, J4, J5 and J6 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Parts List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Routing Guidelines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Chapter 3
Connecting the Daughterboard . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Adapter Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Procedures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Chapter 4
Developing the Shell Software . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
User-Generated Files . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Files Provided by Synopsys . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
November 2001 Synopsys, Inc. 3
The ModelSource 640-pin Adapter Contents
Chapter 5
Completing the Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Mounting the Adapter onto the ModelSource Modeling Systems . . . . . . . . . . . . . 25
Labeling the Daughterboard . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Verifying the Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Unmounting the Adapter from the ModelSource Modeling Systems . . . . . . . . . . . 27
Appendix A
J1–J6 Connector Pinouts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
November 2001 Synopsys, Inc. 4
The ModelSource 640-pin Adapter Preface
Preface
About This Application Note
This application note describes the features and use of the ModelSource 640-pin
Generic Device Adapter (hereafter referred to as the “Adapter”), which allows you to
model a 640-pin device using ModelSource modeling systems.
This application note assumes that you are familiar with model-building procedures as
described in these Synopsys documents:
●
Logic Model Development Manual
●
Shell Software Reference Manual
●
ModelSource User’s Manual
●
LM-family Modeler Manual
Related Documents
To see a complete listing, refer to the Guide to Hardware Modeling Documents.
Manual Overview
This manual contains the following chapters and appendixes:
Preface Describes the application note and lists the
typographical conventions and symbols used in it; tells
how to get technical assistance.
Chapter 1
Describing a 640-pin Logic
Model
November 2001 Synopsys, Inc. 5
Describes the hardware and software needed to create a
Logic Model using the 640-pin Generic Device Adapter.
Preface The ModelSource 640-pin Adapter
Chapter 2
Building the Daughterboard
Chapter 3
Connecting the Daughterboard
Chapter 4
Developing the Shell Software
Chapter 5
Completing the Model
Provides specifications for building the 640-pin Adapter
Daughterboard.
Describes the Adapter and provides a procedure for
connecting it and the Daughterboard.
Briefly outlines software development tasks and
provides references.
Describes mounting the Adapter onto the Modeling
Systems; labeling the Daughterboard; verifying the
model; and unmounting the Adapter.
Appendix A
Provides a pinout listing for J1-J6 connectors.
J1–J6 Connector Pinouts
Typographical and Symbol Conventions
● Default UNIX prompt
Represented by a percent sign (
● User input (text entered by the user)
%).
Shown in
bold type, as in the following command line example:
% cd $LMC_HOME/hdl
● System-generated text (prompts, messages, files, reports)
Shown as in the following system message:
No Mismatches: 66 Vectors processed: 66 Possible
● Variables for which you supply a specific value
Shown in italic type, as in the following command line example:
% setenv LMC_HOME prod_dir
In this example, you substitute a specific name for prod_dir when you enter the
command.
● Command syntax
Choice among alternatives is shown with a vertical bar ( | ) as in the following
syntax example:
-effort_level low | medium | high
In this example, you must choose one of the three possibilities: low, medium, or
high.
6 Synopsys, Inc. November 2001
The ModelSource 640-pin Adapter Preface
Optional parameters are enclosed in square brackets ( [ ] ) as in the following
syntax example:
pin1 [pin2 ... pinN]
In this example, you must enter at least one pin name (pin1), but others are optional
( [pin2 ... pinN]).
Getting Help
If you have a question while using Synopsys products, use the following resources:
1. Start with the available product documentation installed on your network or located
at the root level of your Synopsys CD-ROM. Every documentation set contains
overview information in the intro.pdf file.
Additional Synopsys documentation is available at this URL:
http://www.synopsys.com/products/lm/docs
Datasheets for models are available using the Model Directory:
http://www.synopsys.com/products/lm/modelDir.html
2. Visit the online Support Center at this URL:
http://www.synopsys.com/support/lm/support.html
This site gives you access to the following resources:
❍ SOLV-IT!, the Synopsys automated problem resolution system
❍ product-specific FAQs (frequently asked questions)
❍ lists of supported simulators and platforms
❍ the ability to open a support help call
❍ the ability to submit a delivery request for some product lines
3. If you still have questions, you can call the Support Center:
North American customers:
Call the Synopsys Eaglei and Logic Modeling Products Support Center hotline at
1-800-445-1888 (or 1-503-748-6920) from 6:30 AM to 5 PM Pacific Time, Monday
through Friday.
International customers:
Call your local sales office.
November 2001 Synopsys, Inc. 7
Preface The ModelSource 640-pin Adapter
The Synopsys Website
General information about Synopsys and its products is available at this URL:
http://www.synopsys.com
Comments?
To report errors or make suggestions, please send e-mail to:
doc@synopsys.com
To report an error that occurs on a specific page, select the entire page (including
headers and footers), and copy to the buffer. Then paste the buffer to the body of your
e-mail message. This will provide us with information to identify the source of the
problem.
8 Synopsys, Inc. November 2001
The ModelSource 640-pin Adapter Chapter 1: Describing a 640-pin Logic Model
1
Describing a 640-pin Logic Model
This chapter describes the necessary components and provides a procedural summary
for building a 640-pin Logic Model.
Hardware Requirements
To build a complete 640-pin Logic Model using the 640-pin Adapter, you need the
following hardware:
● The device you want to model, henceforth referred to as the device under test
(DUT). The DUT can have up to 640 input, output, and I/O signals, exclusive of
supply voltage and auxiliary signals. The DUT can include more than one physical
package, as long as the components fit within an area approximately 6” x 6”.
● One 640-pin Generic Device Adapter Daughterboard, henceforth referred to as the
“Daughterboard”, to which you attach the DUT.
● Four ModelSource modeling systems, either 4 MS3200 units or 4 MS3400 units.
You cannot mix these two types of units.
● One 640-pin Adapter, which provides the interface between the modeling systems
and the Daughterboard.
November 2001 Synopsys, Inc. 9
Chapter 1: Describing a 640-pin Logic Model The ModelSource 640-pin Adapter
Software Requirements
To support the 640-pin Logic Model, you need the following software:
● User-created Shell Software files, described in the Shell Software Reference
Manual.
● The product-specific Shell Software files GEN640.ADP and GEN640.PKG,
provided by Synopsys and described in later text.
● R3.3b or later of the Runtime Modeler Software.
● The lm utility, R3.3b or later, for labeling the Daughterboard.
Procedural Summary
The steps in building a 640-pin Logic Model are as follows:
1. Build the Daughterboard and attach the DUT to it.
2. Connect the Daughterboard to the Adapter.
3. Develop the model Shell Software.
4. Mount the Adapter onto the ModelSource modeling systems.
5. Label the Daughterboard.
6. Verify the model.
Steps 1, 2 and 4 are described in detail in this application note. Steps 3, 5, and 6 are
summarized here; for more details, refer to the Logic Model Development Manual.
10 Synopsys, Inc. November 2001
The ModelSource 640-pin Adapter Chapter 2: Building the Daughterboard
2
Building the Daughterboard
This chapter describes the specifications you must meet when building the
Daughterboard.
Daughterboard Description
Figure 1 shows the physical specifications of the Daughterboard from the component
side. The Daughterboard is designed to have a footprint area in excess of 10” by 14”,
allowing for a multi-chip DUT.
Following are descriptions of some of the items shown on the drawing. All connectors
are to be installed from the far side.
● Guide pin holes: These are designed to mate with the guide pins on the Adapter to
ensure correct orientation when attaching the Daughterboard to the Adapter.
● Board stiffeners: Four (two long and two short) are required around the perimeter of
the Daughterboard to reinforce it. Fabrication drawings for compatible long and
short stiffeners are provided in Figure 3 on page 15.
● Connectors J1-J6: These are to be installed from the far side, and are designed to
mate with corresponding connectors on the Adapter. The location of Pin A1 of each
connector is indicated on the drawing. Details of the connector pins are provided in
text that follows.
November 2001 Synopsys, Inc. 11
Chapter 2: Building the Daughterboard The ModelSource 640-pin Adapter
Figure 1: 640-pin Adapter Daughterboard
12 Synopsys, Inc. November 2001
The ModelSource 640-pin Adapter Chapter 2: Building the Daughterboard
Connector Pin Detail
Connectors J1–J6 include the connections (DUT1–DUT640) between the DUT and the
Adapter through the Daughterboard and, in addition, supply voltage, ground
connections, and various auxiliary signals. Figure 2 shows details of J1–J6 connector
pins, from the component side. Pinouts are listed in “J1–J6 Connector Pinouts” on
page 29.
Connectors J1 and J3
These connectors include two each of Teradyne signal modules, and have 6 rows of 48
pins each. You will notice in Appendix A that no connections are listed for Rows B and
E; these are exclusively ground.
Connectors J2, J4, J5 and J6
These connectors include one each of Teradyne signal modules (A1–F24, at the left of
the figure) and two each of Teradyne power modules (AP1–FP4 and AP5–FP8, at the
right of the figure). As with connectors J1 and J3, the left (signal module) side has rows
B and E exclusively connected to ground. The right (power module) side has no rows B,
C, or E.
November 2001 Synopsys, Inc. 13
Chapter 2: Building the Daughterboard The ModelSource 640-pin Adapter
Connectors J1 and J3
One Teradyne
Signal Module
1242448
A
B
C
D
E
F
Rows B and E are connected to ground
Connectors J2, J4, J5 and J6
One Teradyne
Signal Module
1
A
B
C
D
E
F
Rows B and E are
connected to ground do not exist
One Teradyne
Signal Module
Two Teradyne
Power Modules
AP1 AP8
DP1 DP8
FP1 FP8
Rows B, C, and E
Figure 2: Connector Pin Detail, Shown from Component Side
Parts List
The required parts are as follows:
● Eight Teradyne HDM signal modules, 488-5324-XXX. These are available either as
press fit or solder tail, in a variety of tail lengths. The last three digits (XXX) of the
part number depend on which type you choose; for specific part numbers, see the
Teradyne product documentation.
● Eight Teradyne HDM power modules, 437-5034-500. These are currently available
only as solder tail.
● Twelve Southco retractable screw fasteners, 47-65-221-70.
● To mount the stiffeners:
❍ Fourteen 4-40 1/4” pan head Phillips screws
14 Synopsys, Inc. November 2001
The ModelSource 640-pin Adapter Chapter 2: Building the Daughterboard
❍ Fourteen #4 lock washers
❍ Fourteen #4 flat washers
● One EEProm, Catalyst semiconductor CAT93C86.
Note
The above does not include the package type designation; that is up to the
model designer.
● Two Synopsys board stiffeners (short), 600-00193 (or build according to
specifications).
● Two Synopsys board stiffeners (long), 600-00XXX (or build according to
specifications).
Figure 3 shows a drawing of the short and long board stiffeners.
Short Stiffener
Long Stiffener
Figure 3: Fabrication Drawing of Board Stiffeners
Requirements
● You must locate the connectors and guide pin holes exactly as shown in Figure 1 on
page 12, so that the Daughterboard will fit onto the Adapter.
● The height of the DUT above the Daughterboard must not exceed 2.25 inches.
November 2001 Synopsys, Inc. 15
Chapter 2: Building the Daughterboard The ModelSource 640-pin Adapter
● The DUT signal traces (DUT1 through DUT640) are controlled impedance, and
must be 93 ohms ± 10%. (All other signals are uncontrolled but will function
correctly at 93 ohms.)
● You must make the following specific connections:
❍ J1-A1 to J1-F48 (SEAT1)
❍ J2-A1 to J2-F24 (SEAT2)
❍ J3-A1 to J3-F48 (SEAT3)
❍ J4-A1 to J4-F24 (SEAT4)
❍ J5-A1 to J5-F24 (SEAT5)
❍ J6-A1 to J6-F24 (SEAT6)
(These connections pass a daisychain signal through all four J connectors to allow
the ModelSource system to detect whether or not the Adapter is seated correctly.)
● You must provide a series termination of 4.7 ohms within 1 inch of the DUT’s signal
pins. Use as small a surface mount package as can practically be mounted.
Routing Guidelines
Provide connections for your DUT device(s) on the Daughterboard. Route the DUT
signals (DUT1 through DUT640) and other appropriate signals to the J connector pins
according to the pinout listing in “J1–J6 Connector Pinouts” on page 29.
The following are some guidelines:
● For optimal pattern clock rates, ensure that all DUT signals are the same length, or
nearly so (within 0.5 inch).
● Use either microstrip (preferred) or stripline for the signal layers, but do not mix
them, because their propagation velocities are different. Use microstrip if the signal
routing fits on two layers; use stripline if the signal routing requires more than two
layers.
● For ease of testing, create test points for the following signals:
❍ J1-D17 (KEEPALIVE)
❍ J1-A15 (TRIGGER)
❍ J1-A19 (PLAY)
❍ J1-A17 (SAMPLE)
❍ Any voltages used by the DUT
16 Synopsys, Inc. November 2001
The ModelSource 640-pin Adapter Chapter 2: Building the Daughterboard
❍ J4-FP5–J4-FP8 (FANP12V), if used
❍ DUT signal used for DUT clock
● You can connect to any of the available power supplies listed in Table 1. Do not
interconnect different power supplies.
Table 1: Available Power Supplies
Pins Signal Power Supply
J2-AP5–J2-AP8
P5V +5V DC, 6A max
J4-AP5–J4-AP8
J2-AP1–J2-AP4 ADJVCC1 +3-5V DC, 6A max
J4-AP1–J4-AP4 ADJVCC2 +3-5V DC, 6A max
J4-FP1–J4-FP4 M5V -5.2V DC, 400mA max
J2-FP5–J2-FP8 P12V +12V DC, 400mA max
J4-FP5–J4-FP8 FANP12V +12V DC, 400mA max (for
fan/heat sink only)
● For bypass/decoupling capacitors, follow the DUT manufacturer’s
recommendations, if provided; otherwise, use the following guidelines:
❍ For each supply of P5V, ADJVCC1 or ADJVCC2, provide 47µF, 16V tantalum
(use two of these, if space permits).
❍ For each supply of P12V, M5V, provide 10µF, 16V tantalum.
❍ For bypass, for every 25 signal pins, place a pair of 0.1µF and 0.01µF high
frequency X7R or NPO capacitors directly underneath the device, if possible, or
around the perimeter of the device.
November 2001 Synopsys, Inc. 17
Chapter 2: Building the Daughterboard The ModelSource 640-pin Adapter
18 Synopsys, Inc. November 2001
The ModelSource 640-pin Adapter Chapter 3: Connecting the Daughterboard
3
Connecting the Daughterboard
This section describes the Adapter and gives instructions for interconnecting it and the
Daughterboard.
Adapter Description
Figure 4 shows a drawing of the Adapter. The items of interest to the user are as follows:
● Connectors that mate with Daughterboard connectors J1–J6
● Ejectors for disconnecting the Daughterboard from the Adapter
● Guide pins that fit the Daughterboard guide pin holes to ensure correct orientation
● Test points for the signals TRIGGER, KEEPALIVE, PLAY, FEEDBACK,
SAMPLE, ADJVCC1, +5V, -5V, and GND
November 2001 Synopsys, Inc. 19
Chapter 3: Connecting the Daughterboard The ModelSource 640-pin Adapter
2
6
3
Ejector
Guide
Pin
Mates
with J4
Test
Points
Mates
with J5
Mates
with J1
Mates
with J
Mates
with J
Mates
with J
Test
Points
Ejector
Test
Points
Figure 4: The 640-pin Generic Device Adapter
20 Synopsys, Inc. November 2001
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