Surface Concept Delayline DLD 8080 User Manual
DDeellaayylliinnee DDeetteeccttoorr DDLLDD 88008800
Delayline Detector
DLD 8080
Manual
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A
ll rights reserved. No part of this
manual may be reproduced without the
prior permission of Surface Concept
GmbH.
Surface Concept GmbH
Am Sägewerk 23a
55124 Mainz
Germany
Tel. ++49 6131 62760
Fax: ++49 6131 6271629
www.surface-concept.com,
support@surface-concept.de
Manual Version: 1.2
Date: 2010-05-10
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1 Table of Contents
1 Table of Contents.................................................................................................................................................................................. 5
2 Introduction.............................................................................................................................................................................................. 8
2.1 General Information................................................................................................................................................................... 8
2.2 Safety Instructions...................................................................................................................................................................... 8
2.3 General Overview of the System .......................................................................................................................................... 9
3 Installation .............................................................................................................................................................................................10
3.1 Initial Inspection ........................................................................................................................................................................10
3.2 Installation ................................................................................................................................................................................... 11
3.2.1 Mounting the delayline detector.............................................................................................................................. 11
3.2.2 Detector Orientation ....................................................................................................................................................11
3.2.3 Cabling and High Voltage............................................................................................................................................ 12
3.2.4 Recommended System Requirements................................................................................................................ 14
4 USB 2.0 Driver Installation ............................................................................................................................................................ 15
5 DLD - Principle of Operation .......................................................................................................................................................... 18
5.1 Basics of Delayline Detection.............................................................................................................................................. 18
5.2 Basic Operational Modes of the Delayline Detector ................................................................................................ 19
5.2.1 2D(x, y) Area Detection ............................................................................................................................................... 19
5.2.2 3D(x, y, t) time resolved imaging............................................................................................................................. 19
5.3 Data Acquisition........................................................................................................................................................................ 20
5.4 Working with the DLD – Important details .................................................................................................................. 20
6 Delayline Detector Layout ..............................................................................................................................................................21
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6.1 Delayline Detector - Vacuum Wiring............................................................................................................................... 21
6.2 Delayline Detector – Connection Ports ......................................................................................................................... 22
7 Pulse Processing Electronics ....................................................................................................................................................... 24
7.1 Pulse Processing Electronics ACU 3.4.2...................................................................................................................... 24
7.1.1 Positions of the Discriminator Threshold Regulators................................................................................... 25
8 Time-to-Digital-Converter (TDC) ................................................................................................................................................... 26
8.1 Schematic Description of the USB2.0-TDC .................................................................................................................26
8.2 Basic Operation Modes of the GPX TDC Chip............................................................................................................. 27
8.2.1 I-Mode (USB2.0-TDC/ Double USB2.0-TDC )................................................................................................... 27
8.2.2 R-Mode (High Resolution/ Dual Channel/ Quad Channel USB2.0-TDC) ............................................. 27
8.2.3 G-Mode (High Resolution/ Dual Channel/ Quad Channel USB2.0-TDC) ............................................. 27
8.3 Layout of the Quad Channel USB2.0-TDC..................................................................................................................... 28
8.3.1 TDC Inputs (Stop + Start)........................................................................................................................................... 28
8.3.2 Trigger Synchronization IN/OUT............................................................................................................................ 28
8.3.3 Line Input ........................................................................................................................................................................... 29
8.4 Interface (PC) and Software................................................................................................................................................ 29
9 Dual HV Supply............................................................................................................................................................................. 30
9.1 Layout of Dual HV Supply & the HV filterbox................................................................................................................ 31
9.1.1 Line Input of Dual HV Supply .....................................................................................................................................32
9.2 Connection schemes for different operation modes............................................................................................... 32
10 Operation of the DLD................................................................................................................................................................... 36
10.1 Getting Started ....................................................................................................................................................................36
10.2 Turning on the High Voltage........................................................................................................................................... 36
10.2.1 “Start-Up” Procedure (for new systems and for systems, after being vented).............................37
10.2.2 Standard Start Procedure.................................................................................................................................... 38
10.3 Bake Out Procedure.......................................................................................................................................................... 39
11 Microchannel Plate (MCP)........................................................................................................................................................ 40
11.1 Storage.................................................................................................................................................................................... 40
11.2 Handling .................................................................................................................................................................................. 40
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11.3 Operation................................................................................................................................................................................ 41
12 Technical Data .............................................................................................................................................................................. 42
13 List of Figure....................................................................................................................................................................................43
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2 Introduction
2.1 General Information
This manual is intended to assist users in the installation, operation and maintenance of the Delayline
Detector DLD 8080. It is divided into 13 chapters. The chapter “Introduction” contains a brief description of
the DLD. The chapter “Installation” refers to installation and cabling. One chapter describes the USB driver
installation. Chapter “Principle of Operation” explains the theory of operation of the DLD. 3 chapters describe
the technical details of the detector readout package and chapter “Operation of the DLD” describes the
operation of the DLD. The final chapters contain amongst others, technical details about the microchannel
plates and the delayline detector in general.
2.2 Safety Instructions
Please read this manual carefully before performing any electrical or electronic operations and strictly
follow the safety rules given within this manual.
The following symbols appear throughout the manual:
The “note symbol” marks text passages, which contain important information/ hints
about the operation of the detector. Follow these information to ensure a proper
functioning of the detector.
The “caution symbol” marks warnings, which are given to prevent an accidentally
damaging of the detector or the readout system. Do NOT
ignore these warnings and
follow them strictly
. Otherwise no guarantee is given for arose damages.
The “high voltage symbol” marks warnings, given in conjunction with the description of
the operation/ use of high voltage supplies and/ or high voltage conducting parts.
Hazardous voltages are present, which can cause serious or fatal injuries. Therefore
only persons with the appropriate training are allowed to carry out the installation,
adjustment and repair work.
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2.3 General Overview of the System
The Surface Concept delayline detectors are particularly developed for the needs of 1D(x), 2D(x,t), 2D(x,y) or
3D(x,y,t) area and time detection of electrons, ions, x-ray and UV-light as well as for multi hit detection of high
rates with the 4-quadrant detector systems.
The DLD 8080 is mounted on a CF 150 vacuum flange with feed-throughs for high voltage supply and signal
transfer. It consists of a microchannel plate stack and two layers (x, y) of meander structured delaylines. The
image is sampled by the DLD readout electronics.
The 3D (x, y, t) detection bases on the measurement of time differences and time sums of signals, with a high
temporal resolution in one device. The count rate can reach up to 2.0 MHz in the commonly used 4-fold
coincidence measurement.
Typical applications are for example:
• imaging of parallel incident particle beams, particularly electrons
• spatially resolved time of flight spectroscopy in 2D/time resolved mode
• time referenced imaging of electrons excited by repetitive driven sources
and in energy analyzers:
• Fermi surface mapping, band mapping, photoelectron diffraction measurements, and similar angular
dispersion experiments in 2D mode
• XPS, UPS, ESCA and AES in virtual channel mode
• Stroboscopic experiments in 2D/time resolved mode
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3 Installation
3.1 Initial Inspection
Visual inspection of the system is required to ensure that no damage has occurred during shipping. Should
there be any signs of damage, please contact SURFACE CONCEPT immediately. Please check the delivery
according to the packing list (see Table 1) for completeness.
1. Dual HV Supply
2. Quad Channel USB 2.0–TDC with USB2.0 cable
3. Delayline Detector DLD8080 under vacuum
4. HV filterbox
5. Pulse processing unit ACU 3.4.2
6. 2x SHV cables (5m),
7. 1x SHV cable (approx. 10 cm)
8. 1x SHV termination plug
9. 1x DLD readout cable (HDMI)
10. Documentation and Software (CD)
Table 1: Packing list for the Delayline Detector
Figure 1: Contents of delivery package
1
2
3
10
5
4
67
8
9
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3.2 Installation
3.2.1 Mounting the delayline detector
The detector is transported under vacuum. Vent the transport container carefully and release the M8
screws of the vacuum container and pull out the detector carefully
.
Check the front side of the MCP stack for particles.
The microchannel plates in front of the detector should be protected from exposure to
particle contamination. Particles that stick to the plate can be removed by carefully using
a single-hair brush carefully and/or with dry nitrogen. Reading the instructions
“microchannel plates” in chapter 11 is strongly recommended.
Install the detector to your vacuum chamber.
The DLD needs a tube with a diameter of minimum 160 mm, to be installed to.
The max. outer diameter of the detector housing is 147mm. The housing is connected to
the MCP front potential. Due to isolation distances (detector housing potential can reach
more than 4000 V) the min. diameter of the tube, where the detector is installed to, must
be of at least 160mm.
Keep the transport container in case that the detector must be sent back for repair. It can also be used to
store the detector when not installed in a vacuum chamber.
The detector should be kept under vacuum all the time.
3.2.2 Detector Orientation
The black dot in Figure 2 marks the 0/0 position of the DLD image, which corresponds to the upper left
corner of the DLD image in the GUI software.
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Figure 2: 0/0 position of the DLD image (black dot).
3.2.3 Cabling and High Voltage
The general connection scheme of the delayline detector including its readout package is shown in Figure 3.
Figure 3: Connection scheme of the delayline detector and readout package.
• The pulse processing unit ACU can be connected directly to the DLD 4-fold SMB feed-through. The
metal pin gives the orientation. Fasten the ACU with the two clips on the housing.
• Use the DLD readout cable to connect the “Lines Out” socket on the front of the ACU with the “TDC
Input” socket at the rear panel of the USB2.0-TDC. To perform time measurements with respect to an
external clock, provide start pulses to the start input of the TDC. Use the BNC socket named “TTL
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Start” to apply standard TTL signals.
The start input of the TDC is not working with start signals of frequencies smaller 25 kHz and
larger than 7 MHz.
Larger start pulse frequencies must be divided down with an appropriate frequency divider (e.g.
divider with factor of 16 for 80 MHz start pulse frequency).
• There is a CF40 flange with 2 SHV feed-throughs for high voltage supply of the detector. The
connection of the feed-throughs is as follows:
MCP front (F) and detector anode (A)
The Dual HV Supply holds 6 SHV connectors labeled A, REF A, F, REF F, B+ and B-.
The connectors A and F must always be connected to the corresponding SHV feed-through of the DLD
with the HV filterbox in between.
Do not operate the DLD without the HV filterbox.
This will lead to a significant decrease in the image quality.
The operation voltage for the DLD (specified in the specification sheet) is always applied between A and
F. It is produced by the HV module “HV A”.
REF A and REF F are connected to A and F respectively. They allow connecting a reference potential to
the one or other side of the MCP stack. The DLD can be operated floating on a bias voltage (positive or
negative). The HV module “HV B” can be used to generate this bias voltage.
For the first tests the detector should be operated with the following HV connection:
• Connect the 2 SHV connectors A & F of the Dual HV Supply with the corresponding inputs of the
HV Filterbox.
• Connect the 2 SHV cables (named A & F) of the HV Filterbox to the corresponding SHV feed-
throughss on the CF 40.
• Terminate the REF F connector with the termination plug.
• The other three connectors won’t be used.
Further information about the cabling of the Dual HV Supply as well as about the detector operation
voltages can be found in chapter 9 and chapter 10.
A SHV termination plug is included in the delivery. In cases that no reference voltage is applied,
the termination plug must be used to ground the reference inputs. Otherwise the MCP stack is
not functioning as the reference potential is missing.
Be sure that all voltages are settled to zero before connecting the high voltage cables to
the detector, otherwise serious damage to the detector can occur due to high voltage
sparks.
• Connect the power cable to the main connector of the USB2.0-TDC and use the USB 2.0 cable to
connect the USB2.0-TDC to the PC. Switch on the TDC and follow the instructions for installing the
device driver if connected for the first time. If the device driver is already installed, the USB connection
is established automatically. Do not use PC front panel USB connectors; they are often restricted in
performance. For further details on driver installation please see chapter 4.
If the device driver is already installed, the USB connection is established automatically.
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Finish the complete cabling before the TDC is turned on and the GUI monitor software is
started. Also, close the software and turn off the TDC before performing any changes to
the cabling. This applies especially to the connection and disconnection of the start input
of the TDC. The start input of the TDC cannot handle pulses which are arriving in a time
interval of smaller than 150 ns, as they are produced by e.g. connecting to and
disconnecting from the start input respectively.
Don’t start the detector operation before you are familiar with the detailed descriptions
of chapter 5 within this manual.
3.2.4 Recommended System Requirements
Read-out of the USB2.0–TDC is done with a standard PC via USB2.0. For the PC the following system
requirements are highly recommended:
• Processor: 1.6 GHz
• RAM: 1GB
• Windows XP / Windows 2000
• USB 2.0 (no front panel connector)
• Monitor resolution: in Y min. 864 pixel (most critical), in X min. 1024 pixel
The use of USB2.0 for the readout of the TDC is highly recommended. In principle the readout of
the TDC is compatible to USB1.0, but the required data transfer rates are not reached. Do not
use PC front panel USB connectors; they are often restricted in performance.
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