Supertex LR745 Datasheet

Supertex inc.

VIN

VOUT

GND

GND

LR745

High Input Voltage

SMPS Start-up

Features

► Accepts inputs from 35 to 450V
► Output current limiting
► For PWM ICs with start-up threshold voltage

of 13.9 - 18.0V

► Very low power consumption after start-up

Applications

► Notebook and laptop computers
► Telecommunication power supplies
► Battery chargers
► Motor controllers

Ordering Information

Part Number Package Options Packing

LR745N3-G TO-92 1000/Bag

LR745N3-G P002 TO-92 2000/Reel

LR745N3-G P003 TO-92 2000/Reel

LR745N3-G P005 TO-92 2000/Reel

LR745N3-G P013 TO-92 2000/Reel

LR745N3-G P014 TO-92 2000/Reel

LR745N8-G TO-243AA (SOT-89) 2000/Reel

-G denotes a lead (Pb)-free / RoHS compliant package

Typical Thermal Resistance

Package θ

TO-92 132OC/W

TO-243AA (SOT-89) 133OC/W

(OC/W)

ja

General Description

The Supertex LR745 is a high input voltage SMPS start­up circuit. The LR745 is ideally suited for use with industry
standard low voltage PWM ICs having start thresholds of

13.9 to 18.0V. It allows the PWM ICs to be operated from

rectied 120 or 240VAC lines, and eliminates the use of

power resistors often used for this purpose.

The internal circuitry of the LR745 allows the PWM ICs
to operate at a VCC voltage below their start threshold
voltage after start-up. The auxiliary voltage can be less

than the start threshold voltage, which allows for improved
efciency.Current from the high voltage line is drawn only
during the start-up period. After start-up, the internal high
voltage line is disconnected from the IC, thereby reducing

the continuous power dissipation to a minimum.

Pin Conguration

VOUT

VIN

GND

TO-92 TO-243AA (SOT-89)

Package Marking

SiLR

745

YWLL

Package may or may not include the following marks: Si or

Y = Last Digit of Year Sealed
W = Code for Week Sealed
L = Lot Number
= “Green” Packaging

TO-92

Absolute Maximum Ratings

Parameter Value

Input voltage 450V

Output voltage 25V

Operating and storage temperature -55°C to +150OC

Absolute Maximum Ratings are those values beyond which damage to the device may
occur. Functional operation under these conditions is not implied. Continuous operation
of the device at the absolute rating level may affect device reliability. All voltages are
referenced to device ground.

Doc.# DSFP-LR745
C080113

LR7W

Package may or may not include the following marks: Si or

W = Code for Week Sealed
= “Green” Packaging

TO-243AA (SOT-89)

Supertex inc.

www.supertex.com

Electrical Characteristics

(Test conditions unless otherwise specied: TA = 25°C; VIN = 450V)

Sym Parameter Min Typ Max Units Conditions

LR745

V

I

V

I

OUT

OUT

IN

INQ

V

over temperature 17.7 - 24.3 V I

OUT

Output current limiting 2.0 3.0 4.0 mA ---

Operating input voltage range 35 - 450 V ---

Input quiescent current - - 500 µA V

Output turn off voltage 12.6 13.25 13.9 V ---

Output voltage 18.0 - 24 V I

V

OFF

V

over temperature 12.3 13.25 14.2 V TA = -40°C to +85OC

OFF

Output reset voltage 6.3 7.0 7.7 V ---

V

RESET

I

OFF

V

AUX

I

AUX

V

RESET

VIN off-state leakage current - - 75 µA V

External voltage applied to V

Input current applied to V

Block Diagram

VIN

= 0

OUT

= 0, TA = -40°C to +85OC

OUT

= 400V, I

IN

OUT

= 0

over temperature 6.0 7.0 8.0 V TA = -40°C to +85OC

= 400V

IN

OUT

OUT

- - 22 V ---

- - 500 µA V

R

4

AUX

= 22V

GND

M2

Q

V

R D

CLK

REF

Clock

Reset

V

OUT

+

23V

-

comp1

comp1

M

1

V

Z

2.0 - 4.0mA

VOUT

R

-

+

-

+

1

R

2

R

3

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LR745

Block Diagram Detailed Description

The Supertex LR745 is a high voltage, switch-mode power
supply start-up circuit which has 3 terminals: VIN, GND, and
VOUT. An input voltage range of 35 - 450VDC can be ap­plied directly at the input VIN pin. The output voltage, V

OUT

is monitored by the 2 comparators, COMP1 and COMP2.
An internal reference, V

R3 set the nominal V

, and resistor divider R1, R2, and

REF

trip points of 7.0V for COMP1 and

OUT

13.25V for COMP2.

When a voltage is applied on VIN, V

from 0V. When V

is less than 7.0V, the output of COMP1

OUT

will start to ramp up

OUT

will be at a logic high state, keeping the D ip op in a re­set state. The output of the D ip op, Q, will be at logic

low keeping transistor M2 off. The data input for the D ip

op, D, is internally connected to a logic high. As V

OUT

be-

comes greater than 7.0V, COMP1 will change to a logic low

state. V

will continue to increase, and the constant current

OUT

source of typically 3.0mA output will charge an external stor­age capacitor. As V

reaches above 13.25V, the output of

OUT

COMP2 will then switch from a logic high to a logic low state.
The D ip op’s output does not change state since its clock
input is designed to trigger only on a rising edge, logic low

to logic high transition. When there is no load connected to

the output, the output voltage will continue to increase until it
reaches 21.5V, which is the zener voltage minus the thresh-

old voltage of transistor M1. The zener voltage is typically

23V, and the threshold voltage of M1 is typically 1.5V. The
zener diode is biased by resistor R4.

V

will start to decrease when it is connected to an exter-

OUT

nal load greater than the internal constant current source,

which is the case when the PWM IC starts up. When V

OUT

falls below 13.25V, the output of COMP2 will switch from a
logic low to a logic high. The output of COMP2 will clock in a
logic 1 into the D ip op, causing the D ip op’s output, Q,

to switch from a logic low to a logic high. Transistor M2 will
then be turned on pulling the gate of transistor M1 to ground,
thereby turning transistor M1 off. Transistor M1 will remain off
as long as V

is greater than 7.0V. Once V

OUT

decreases

OUT

below 7.0V, COMP1 will reset the D ip op, thereby turning

transistor M2 off and transistor M1 back on.

Typical Application

Figure 1 shows a simplied typical conguration of a switch­mode power supply, SMPS, using the Supertex LR745 in the

start-up circuit.

The LR745’s VOUT terminal is connected to the VCC line
of a PWM IC, Unitrode part #UC3844. An auxiliary winding

on the transformer is used to generate a V

voltage to pow-

CC

er the PWM IC after start-up. The LR745 is used to supply

power for the PWM IC only during start-up. After start-up, the

LR745 turns off and the auxiliary winding is used to supply

power for the PWM IC. Figure 2 shows the typical current

,

and voltage waveforms at various stages from power up to
operation powered by the auxiliary winding.

Stage I

Once a voltage is applied on VIN, the LR745 will start to

charge the VCC capacitor, C1. The VCC voltage will start to
increase at a rate limited by the internal current limiter of

3.0mA. The PWM IC is in its start-up condition and will typi­cally draw 0.5mA from the VCC line. The VCC voltage will con-

tinue to increase until it reaches the PWM IC’s start thresh­old voltage of typically 16V.

Stage II

Once VCC reaches 16V, the PWM IC is in its operating condi-

tion and will draw typically 20mA, depending on the operat­ing frequency and size of the switching MOSFET. The output
of the LR745, V

, is internally current limited to 3.0mA. The

OUT

remaining 17mA will be supplied by C1 causing the V
age decrease. When VCC decreases to 13.25V, the LR745

will turn off its output, thereby reducing its input current from

3.0mA to 10s of microamperes. At this point, all 20mA will be

supplied by C1. The PWM IC can now operate to a minimum
VCC voltage of typically 10V.

Once the switching MOSFET starts operating, the energy in

the primary winding is transferred to the secondary outputs

and the auxiliary winding, thereby building up V
essary to size the VCC storage capacitor, C1, such that V

. It is nec-

AUX

increases to a voltage greater than 10V before VCC decreas­es to 10V. This allows V

to supply the required operating

AUX

current for the PWM IC.

If for some reason the auxiliary voltage does not reach 10V,

VCC will continue to decrease. Once VCC goes below 10V,
the PWM IC will return to its start-up condition. The PWM
IC will now only draw 0.5mA. VCC will continue to decrease
but at a much slower rate. Once VCC decreases below 7.0V,

the LR745 will turn the output, V

, back on. V

OUT

will start

OUT

charging C1 as described in Stage I.

Stage III

At this stage the LR745’s output is turned off and the PWM

IC is operating from the V
V

, can be designed to vary anywhere between the mini-

AUX

mum operating VCC voltage of the PWM IC (10V) to the maxi-

mum auxiliary voltage rating of the LR745 (22V).

supply. The auxiliary voltage,

AUX

CC

volt-

AUX

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Figure 1: Simplied SMPS Using LR745

LR745

V

IN

I

IN

LR7

VOUT

GND

V

CC

C

1

Figure 1: LR745 Start-up Waveforms

Stage

I

16.0

V

OUT

13.5

(V)

12.0

High Voltage

V

AUX

I

AUX

D

C

2

PWM IC
UC3844

Stage

II

PWM IC Start Threshold Voltage

LR7 V

Trip Point

OFF

2

Stage

III

I

IN

(mA)

V

AUX

(V)

I

AUX

(mA)

8.0

4.0

0.0

3.0

2.0

1.0

0.0

12.0

8.0

4.0

0.0

30.0

20.0

10.0

Auxiliary Supply Powers PWM IC

≈ 0mA

I

IN

V

= 12V

AUX

I

= 20mA

AUX

t

t

t

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LR745

1

1

Design Considerations

I. Calculating the value for C

Sizing the VCC capacitor, C1, is an important factor. Making

C1 too large will cause the SMPS to power up too slowly.

However, if too small, C1 will not allow the SMPS to power
up due to insufcient charge in the capacitor to power the

IC and MOSFET until the auxiliary supply is available. The
value of C1 can be approximated by the following equation:

• N • I

V

f

START

- V

MIN

C1 =

where,

f = switching frequency
N = number of clock cycles required to charge V

V

value

MIN

I = PWM operating current
V

= PWM IC start threshold rating

START

V

= PWM IC minimum VCC operating voltage

MIN

Consider for example, a PWM IC with a switching frequency
of 100KHz, operating current of 20mA, start threshold of
16V, and a minimum operating voltage of 10V. If 100 clock
cycles are required to charge the auxiliary voltage to 10V,

the minimum value of C1 is calculated as follows:

1

to

AUX

II. SMPS with wide minimum to maximum load

An important point is that the LR745’s output voltage, V

must discharge to below the nominal V

trip point of 13.25V

OFF

in order for its output to turn off. If the SMPS requires a wide

minimum to maximum output load variation, it will be difcult

to guarantee that VCC will fall below 13.25V under minimum
load conditions. Consider an SMPS that is required to power
small as well as large loads and is also required to power up
quickly. Such a SMPS may power up too fast with a small

load, not allowing the VCC voltage to fall below 13.25V. For
such conditions, the circuit in Figure 3 is recommended.

In Figure 3, the VREF pin of the UC3844 is used to bias the

ground pin of the LR745. The VREF pin on the UC3844 is

a 5.0V reference, which stays at 0V until the VCC voltage

reaches the start threshold voltage. Once VCC reaches the

start threshold voltage, V

will switch digitally from 0V to

REF

5.0V. During start-up, the LR745 will be on, and VCC will start
to increase up to 16V. Once VCC reaches16V, the UC3844

will start to operate and V
The LR745 will see an effective V

will increase from 0V to 5.0V.

REF

voltage of 11V (16V mi-

OUT

nus 5.0V) because the ground of the LR745 is now at 5.0V.
The LR745 will immediately turn off its output, V

out having to wait for the VCC voltage to decrease. The V
switching from 0 to 5.0V during start is a common feature in
most PWM ICs.

OUT

OUT

, with-

REF

,

C1 =

• 100 • 20mA

100kHz

16V - 10V

C1 = 3.3µF

Figure 3: Using V

for the LR745 Ground Voltage

REF

VIN

VOUT VCC

LR7

C

1

GND

VREF

PWM IC
UC3844

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3-Lead TO-92 Package Outline (N3)

D

Seating
Plane

1 2 3

L

LR745

A

Front View

E1

1

Bottom View

e1

b

e

c

Side View

E

3

2

Symbol A b c D E E1 e e1 L

MIN .170 .014

Dimensions

(inches)

NOM - - - - - - - - -

MAX .210 .022

JEDEC Registration TO-92.

* This dimension is not specied in the JEDEC drawing.

† This dimension differs from the JEDEC drawing.

Drawings not to scale.
Supertex Doc.#: DSPD-3TO92N3, Version E041009.

Doc.# DSFP-LR745
C080113

†

†

.014

.022

†

.175 .125 .080 .095 .045 .500

†

.205 .165 .105 .105 .055 .610*

Supertex inc.

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3-Lead TO-243AA (SOT-89) Package Outline (N8)

D

D1

E

H

E1

C

LR745

L

1 2 3

b

e

e1

Top View

b1

A

Side View

Symbol A b b1 C D D1 E E1 e e1 H L

†

1.50
BSC

3.00

BSC

3.94 0.73

Dimensions

(mm)

MIN 1.40 0.44 0.36 0.35 4.40 1.62 2.29 2.00

NOM - - - - - - - - - -

MAX 1.60 0.56 0.48 0.44 4.60 1.83 2.60 2.29 4.25 1.20

JEDEC Registration TO-243, Variation AA, Issue C, July 1986.

† This dimension differs from the JEDEC drawing
Drawings not to scale.
Supertex Doc. #: DSPD-3TO243AAN8, Version F111010.

(The package drawings in this data sheet may not reect the most current specications. For the latest package outline

information go to http://www.supertex.com/packaging.html.)

Supertex inc. does not recommend the use of its products in life support applications, and will not knowingly sell them for use in such applications unless it receives

an adequate “product liability indemnification insurance agreement.” Supertex inc. does not assume responsibility for use of devices described, and limits its liability
to the replacement of the devices determined defective due to workmanship. No responsibility is assumed for possible omissions and inaccuracies. Circuitry and
specifications are subject to change without notice. For the latest product specifications refer to the Supertex inc. (website: http//www.supertex.com)

©2013 Supertex inc. All rights reserved. Unauthorized use or reproduction is prohibited.

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Supertex inc.

1235 Bordeaux Drive, Sunnyvale, CA 94089

Tel: [phone]

www.supertex.com

†