Supertex LR645 Datasheet

Supertex inc.

Start-up / Linear Regulator

LR645

High Input Voltage SMPS

Features

► Accepts inputs from 15 to 450V
► Output currents up to 3.0mA continuous, 30mA peak
► Supply current typically 50µA
► Line regulation typically 0.1mV/V
► Output can be trimmed from 8.0 to 12V
► Output current can be increased to 150mA with

external FET

Applications

► Off-line SMPS startup circuits (pulse loads)
► Low power off-line regulators
► Regulators for noisy inputs

Caution!

The LR645 does NOT provide galvanic isolation. When
operated from an AC line, potentially lethal voltages can be
present on the IC. Adequate means of protecting the end
user from such voltages must be provided by the circuit de­veloper.

Ordering Information

Part Number Package Options Packing

LR645LG-G 8-Lead SOIC 2500/Reel

LR645N3-G TO-92 1000/Bag

LR645N3-G P002 TO-92 2000/Reel

LR645N3-G P003 TO-92 2000/Reel

LR645N3-G P005 TO-92 2000/Reel

General Description

The Supertex LR645 is a high input voltage, low output

current linear regulator. It has a 3-terminal xed output voltage

version available in TO-92, TO-220 and SOT-89 packages, as
well as an adjustable voltage version available in an 8-lead
SOIC package. The 3-terminal version functions like any
other low voltage 3-terminal regulator except it allows the use
of much higher input voltages. When used in a SMPS start­up circuit, it eliminates the need for large power resistors. In
this application, current is drawn from the high voltage line

only during start-up. Only leakage current ows after start-up,

thereby reducing the continuous power dissipation to a few
milliwatts.

The adjustable voltage version allows trimming of the output
voltage from 8.0 to 12V. This version can also be connected
to an external depletion mode MOSFET for increased output
current. When used in conjunction with Supertex depletion
mode MOSFET DN2540N5, an output current of up to 150mA
is achieved.

Pin Conguration

TRIM

NC

GATE
NC

8-Lead SOIC

GND

+VIN

NC

VOUT

GND

VOUT

VIN

GND

TO-92

LR645N3-G P013 TO-92 2000/Reel

LR645N3-G P014 TO-92 2000/Reel

LR645N5-G TO-220 50/Tube

LR645N8-G TO-243AA (SOT-89) 2000/Reel

-G denotes a lead (Pb)-free / RoHS compliant package

Refer to ‘P0xx’ Tape & Reel Specs for P002, P003, P005, P013, and

P014 TO-92 Taping Specications and Winding Styles

Absolute Maximum Ratings

Parameter Value

Input voltage 450V

Output voltage 15.5V

Operating and storage temperature -55°C to +150OC

Absolute Maximum Ratings are those values beyond which damage to the device
may occur. Functional operation under these conditions is not implied. Continuous
operation of the device at the absolute rating level may affect device reliability. All
voltages are referenced to device ground.

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GND

+VIN

VOUT

GND

TO-220 TO-243AA (SOT-89)

Typical Thermal Characteristics

Package θ

ja

8-Lead SOIC 101OC/W 0.31

TO-92 132OC/W 0.74

TO-220 29OC/W 1.8

TO-243AA (SOT-89) 133OC/W 1.6

* Mounted on FR5 board; 25mm x 25mm x 1.57mm

Signicant PD increase possible on ceramic substrate

Power Dissipation

@TA = 25OC

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VIN

VOUT

GND

Package Marking

Top Marking

LR645

YYWW

LR645

LLLL

YY = Year Sealed
WW = Week Sealed
L = Lot Number
= “Green” Packaging

SiLR

645

YWLL

8-Lead SOIC

Packages may or may not include the following marks: Si or Packages may or may not include the following marks: Si or

Y = Last Digit of Year Sealed
W = Code for Week Sealed
L = Lot Number
= “Green” Packaging

TO-92

L = Lot Number

LR645N5
LLLLLLLLL

YYWW

YY = Year Sealed
WW = Week Sealed
= “Green” Packaging

TO-220

Packages may or may not include the following marks: Si or

LR6W

Packages may or may not include the following marks: Si or

W = Code for Week Sealed
= “Green” Packaging

TO-243AA (SOT-89)

Electrical Characteristics

(Test conditions unless otherwise specied: TA = 25°C; VIN = 15 to 450V, C

Sym Parameter Min Typ Max Units Conditions

Output voltage 9.3 10 10.7 V No load

V

OUT

Output voltage over temperature

1

9.0 10 11.5 V TJ = - 40 to +125°C, No load

Line regulation - 40 200 mV VIN = 15 to 400V, No load

ΔV

OUT

V

IN

I

INQ

I

OFF

I

AUX

ΔV

/ΔVINRipple rejection ratio

OUT

e

n

I

PEAK

V

AUX

Load regulation - 150 400 mV V

Operating input voltage range 15 - 450 V ---

Input quiescent current - 50 150 µA No Load

VIN off-state leakage current - 0.1 10 µA V

Input current to V

Noise voltage

Output peak current

OUT

1

1

2

External voltage applied to V

OUT

- - 200 µA V

50 60 - dB 120Hz, No Load

- 25 - µV 0.01 to 100KHz

- 30 - mA C

- - 13.2 V ---

8-lead, adjustable output voltage version only:

Test conditions unless otherwise specied: TA = 25°C; VIN = 15 to 450V, C

V

OUT

Output regulation trim range

Load regulation at 8V trim

ΔV

OUT

Notes:

1. Guaranteed by design.

2. Pulse test duration <1.0msec, duty cycle <2%.

Load regulation at 12V trim

1

1

1

8 - 12 V No load

- 200 400 mV V

- 100 400 mV V

= 0.01µF)

OUT

= 0.01µF

OUT

= 50V, I

IN

≥ V

AUX

≥ V

AUX

= 10µF, V

OUT

= 15V, I

IN

= 50V, I

IN

= 0 to 3.0mA

OUT

+1V applied to V

OUT

+1V applied to V

OUT

= 400V

IN

= 0 to 1.0mA

OUT

= 0 to 3.0mA

OUT

OUT

OUT

pin

pin

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LR645 Block Diagram

LR645

VIN

LR645

VOUT

TRIM

LR645: SMPS Start-Up Circuit

One of the main applications for the LR645 is a start-up
circuit for off-line switch-mode power supplies (SMPS), as
shown in Figure1. A minimum output capacitance of 0.01µF
is recommended for stability. The wide operating input volt­age range of the LR645 allows the SMPS to operate and
start-up from rectied AC or a DC voltage of 15 to 450V with­out adjustment.

During start-up, the LR645 powers the VCC line of the PWM
IC with a nominal output voltage of 10V. The auxiliary voltage
connected through a diode to the VOUT pin of the LR645 will
start to increase. When the auxiliary voltage becomes larger

–

+

GATE

GND

than the output voltage the LR645 turns OFF its internal high
voltage input line and output voltage, allowing the auxiliary
voltage to power the VCC line of the PWM IC. The input
current drawn by the LR645 from the high voltage line after
start-up will therefore only be leakage current of the internal
MOSFET switch, which is typically 0.1µA.

The 3-terminal version shown in Figure 1 has load regula-

tion guaranteed from 0 to 3.0mA at a xed nominal output

voltage of 10V. Applications requiring higher output current
and/or a different output voltage can use the 8 pin adjustable
version.

Figure 1: SMPS Start-Up Circuit

+

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15 - 450V

-

VIN

C

LR6

IN

GND

+

5.0V

-

V

= 12V

AUX

VCC

C

OUT

PWM IC

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+

LR645: High Current SMPS Start-Up Circuit

The 8 lead version of the LR645 has connections for an ex­ternal depletion-mode MOSFET for higher output current and
external resistors for adjustable output voltage. As shown in
Figure 2, the output current is increased to 150mA by using
the Supertex 400V depletion-mode MOSFET DN2540. The
maximum operating input voltage will be limited by the drain­to-source breakdown voltage of the external MOSFET, but
cannot exceed the 450V rating of the LR645.

The output voltage can be adjusted from 8 to 12V with 2 ex­ternal resistors, R1 and R2. The ratio of R2/R1 determines
the output voltage. R2 is connected between the V
TRIM pins. R1 is connected between TRIM and GND pins.
Figure 5 is a curve showing output voltage versus resistor

ratio R2/R1. The optimum range for R1 + R2 is 200KΩ to
300KΩ. This minimizes loading and optimizes accuracy of
the output voltage. Figure 5 uses an R1 + R2 of 250KΩ.

Figure 2: High Current SMPS Start-Up Circuit

+

DN2540

15V

to

400V

C

IN

GATE

LR645

VOUT

TRIM

R2

VCC

C

OUT

PWM IC

5.0V

–

V

AUX

= 12V

LR645

and

OUT

GND

–

Note:
When used with the DN25, +V

R1

is not connected on the LR6.

IN

LR645: Off Line Linear Regulator

Circuits requiring low voltages to operate logic and analog

circuits benet from the LR645. The conventional use of

step down transformers can be eliminated, thereby saving
space and cost. Some examples of these applications are:
proximity controlled light switches, street lamp controls, and
low voltage power supplies for appliances such as washing
machines, dishwashers, and refrigerators.

The wide operating input voltage range of 15 to 450V as well
as the ripple rejection ratio of 50dB minimum allows the use
of a small, high voltage input capacitor. The input AC line can

be either full-wave or half-wave rectied. A minimum output

capacitance of 0.01µF is recommended for output stability.

Figure 3: Cascading for Precision

Max

C

OUT

0.1µF

875

ACSA

5.000V

± 0.002V

@

0 to 3mA

AC Line

24V - 277V

C

IN

1.0µF

LR6

Figure 3 shows the LR645 as a pre-regulator to a precision­regulator for high precision regulation. Higher output cur­rent is also possible by using an external depletion-mode
MOSFET DN2540N5 as shown in Figure 4.

Power Dissipation Considerations

The LR645 is a true linear regulator. Its power dissipation is­therefore a function of input voltage and output load current.
Forexample, if the LR645 is providing a continuous load cur­rent of 3mAat 10V while its input voltage is 400V, total dis­sipation in the LR645 will be:

P

= (VIN - V

DISS

= (400V - 10V) x (3.0mA + 150µA)

= 1.23 Watts

The 1.23 watts is for continuous operation. This is within the
dissipation capabilities of the TO-220 and SOT-89 packag­es. See the thermal characteristics chart on page 2 for derat­ings. For SMPS start-up applications, the output current is
usually required only during start-up. This duration depends
upon the auxiliary supply output capacitor and C
typically a few hundred milliseconds. All package types of
the LR645 have been characterized for use with a C
least 10µF, and an AC line of 277V.

OUT

) x (I

OUT

+ I

MAX QUIESCENT

)

, but is

OUT

of at

OUT

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Figure 4: High Current Regulation

DN2540N5

AC Line

24 - 277V

GATE

V

OUT

LR645

C

IN

C

GND

Figure 5: Typical Output Voltage vs Resistor Ratio

12

OUT

5.0V
REG

LR645

5.0V

+

0 - 150mA

-

10

Output Voltage (V)

8

2.5 3.0 3.5 4.0

Resistor Ratio (R2/R1)

R1 + R2 = 250kΩ

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8-Lead SOIC (Narrow Body) Package Outline (LG)

4.90x3.90mm body, 1.75mm height (max), 1.27mm pitch

LR645

D

8

Note 1
(Index Area
D/2 x E1/2)

EE1

1

Top View

Note 1

A

h

A2

A

A1

e

Side View

Seating

Plane

b

A

θ1

L

L1

View B

h

View A-A

L2

θ

Gauge

Plane

Seating

Plane

View B

Note:

1. This chamfer feature is optional. A Pin 1 identier must be located in the index area indicated. The Pin 1 identier can be: a molded mark/identier;
an embedded metal marker; or a printed indicator.

Symbol A A1 A2 b D E E1 e h L L1 L2 θ θ1

O

0

Dimension

(mm)

MIN 1.35* 0.10 1.25 0.31 4.80* 5.80* 3.80*

NOM - - - - 4.90 6.00 3.90 - - - -

1.27

BSC

0.25 0.40

1.04
REF

0.25
BSC

MAX 1.75 0.25 1.65* 0.51 5.00* 6.20* 4.00* 0.50 1.27 8O15

JEDEC Registration MS-012, Variation AA, Issue E, Sept. 2005.

* This dimension is not specied in the JEDEC drawing.

Drawings are not to scale.
Supertex Doc. #: DSPD-8SOLGTG, Version I041309.

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O

5

O

3-Lead TO-92 Package Outline (N3)

D

Seating
Plane

1 2 3

L

LR645

A

Front View

E1

1

Bottom View

e1

b

e

c

Side View

E

3

2

Symbol A b c D E E1 e e1 L

MIN .170 .014

Dimensions

(inches)

NOM - - - - - - - - -

MAX .210 .022

JEDEC Registration TO-92.

* This dimension is not specied in the JEDEC drawing.

† This dimension differs from the JEDEC drawing.

Drawings not to scale.
Supertex Doc.#: DSPD-3TO92N3, Version E041009.

Doc.# DSFP-LR645
A062113

†

†

.014

.022

†

†

.175 .125 .080 .095 .045 .500

.205 .165 .105 .105 .055 .610*

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3-Lead TO-220 Package Outline (N5)

Seating

E

E2

ΦP

Q

H1

Plane

A

A1

LR645

A

E

H1

D

D1

View

B

4

Chamfer

Optional

12

Front View View A - A

3

L

A2

e

c

A

Side View

1

2

3

Thermal

Pad

L1

D1

E1

bb2

View B

Symbol A A1 A2 b b2 c D D1 D2 E E1 E2 e H1 L L1 Q ΦP

Dimen-

sion

(inches)

JEDEC Registration TO-220, Variation AB, Issue K, April 2002.

* This dimension is not specied in the JEDEC drawing.

† This dimension differs from the JEDEC drawing.

Drawings not to scale.
Supertex Doc. #: DSPD-3TO220N5, Version C041009.

Doc.# DSFP-LR645
A062113

MIN .140 .020 .080 .015 .045 .012†.560 .326†.474†.380 .270 0.20*

NOM - - - .027 .057 - - - - - - - - - - - -

MAX .190 .055 .120†.040 .070 .024 .650 .361†.507 .420 .350 .030 .270 .580 .250 .135 .161

8

.230 .500 .200* .100 .139

.100
BSC

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3-Lead TO-243AA (SOT-89) Package Outline (N8)

D

D1

E

H

E1

C

LR645

L

1 2 3

b

e

e1

Top View

b1

A

Side View

Symbol A b b1 C D D1 E E1 e e1 H L

†

1.50
BSC

3.00

BSC

3.94 0.73

Dimensions

(mm)

MIN 1.40 0.44 0.36 0.35 4.40 1.62 2.29 2.00

NOM - - - - - - - - - -

MAX 1.60 0.56 0.48 0.44 4.60 1.83 2.60 2.29 4.25 1.20

JEDEC Registration TO-243, Variation AA, Issue C, July 1986.

† This dimension differs from the JEDEC drawing
Drawings not to scale.
Supertex Doc. #: DSPD-3TO243AAN8, Version F111010.

(The package drawings in this data sheet may not reect the most current specications. For the latest package outline

information go to http://www.supertex.com/packaging.html.)

Supertex inc. does not recommend the use of its products in life support applications, and will not knowingly sell them for use in such applications unless it receives

an adequate “product liability indemnification insurance agreement.” Supertex inc. does not assume responsibility for use of devices described, and limits its liability
to the replacement of the devices determined defective due to workmanship. No responsibility is assumed for possible omissions and inaccuracies. Circuitry and
specifications are subject to change without notice. For the latest product specifications refer to the Supertex inc. (website: http//www.supertex.com)

©2013 Supertex inc. All rights reserved. Unauthorized use or reproduction is prohibited.

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Tel: [phone]

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†