The information in this User’s Manual has been carefully reviewed and is believed to be accurate.
The vendor assumes no responsibility for any inaccuracies that may be contained in this document,
and makes no commitment to update or to keep current the information in this manual, or to notify
any person or organization of the updates. Please Note: For the most up-to-date version of this
manual, please see our Website at www.supermicro.com.
Super Micro Computer, Inc. ("Supermicro") reserves the right to make changes to the product
described in this manual at any time and without notice. This product, including software and documentation, is the property of Supermicro and/or its licensors, and is supplied only under a license.
Any use or reproduction of this product is not allowed, except as expressly permitted by the terms
of said license.
IN NO EVENT WILL SUPER MICRO COMPUTER, INC. BE LIABLE FOR DIRECT, INDIRECT,
SPECIAL, INCIDENTAL, SPECULATIVE OR CONSEQUENTIAL DAMAGES ARISING FROM THE
USE OR INABILITY TO USE THIS PRODUCT OR DOCUMENTATION, EVEN IF ADVISED OF
THE POSSIBILITY OF SUCH DAMAGES. IN PARTICULAR, SUPER MICRO COMPUTER, INC.
SHALL NOT HAVE LIABILITY FOR ANY HARDWARE, SOFTWARE, OR DATA STORED OR USED
WITH THE PRODUCT, INCLUDING THE COSTS OF REPAIRING, REPLACING, INTEGRATING,
INSTALLING OR RECOVERING SUCH HARDWARE, SOFTWARE, OR DATA.
Any disputes arising between the manufacturer and the customer shall be governed by the laws of
Santa Clara County in the State of California, USA. The State of California, County of Santa Clara
shall be the exclusive venue for the resolution of any such disputes. Supermicro's total liability for
all claims will not exceed the price paid for the hardware product.
FCC Statement: This equipment has been tested and found to comply with the limits for a Class
A digital device pursuant to Part 15 of the FCC Rules. These limits are designed to provide
reasonable protection against harmful interference when the equipment is operated in a commercial
environment. This equipment generates, uses, and can radiate radio frequency energy and, if not
installed and used in accordance with the manufacturer’s instruction manual, may cause harmful
interference with radio communications. Operation of this equipment in a residential area is likely
to cause harmful interference, in which case you will be required to correct the interference at your
own expense.
California Best Management Practices Regulations for Perchlorate Materials: This Perchlorate
warning applies only to products containing CR (Manganese Dioxide) Lithium coin cells. “Perchlorate
Material-special handling may apply. See www.dtsc.ca.gov/hazardouswaste/perchlorate”.
WARNING: Handling of lead solder materials used in this
product may expose you to lead, a chemical known to
the State of California to cause birth defects and other
reproductive harm.
Manual Revision 1.1
Release Date: May 22, 2013
Unless you request and receive written permission from Super Micro Computer, Inc., you may not
copy any part of this document.
Information in this document is subject to change without notice. Other products and companies
referred to herein are trademarks or registered trademarks of their respective companies or mark
holders.
This manual is written for system integrators, PC technicians and
knowledgeable PC users. It provides information for the installation and use of the
X9DBU-3F/X9DBU-iF motherboard.
About This Motherboard
The Super X9DBU-3F/X9DBU-iF motherboard supports dual Intel E5-2400 (Socket
B2) processors and Intel QPI (QuickPath Interface) Technology (V.1.1), providing
point-to-point connections with transfer speeds of up to 8.0 TG/s. With the C602/
C606 chipset built in, the X9DBU-3F/X9DBU-iF motherboard supports Intel® Manageability Engine (ME), Rapid Storage Technology, Digital Media Interface (DMI),
PCI-E Gen. 3.0, and DDR3 memory of up to 1600 MHz, greatly enhancing system
performance. This motherboard is ideal for high-end server platforms. Please refer
to our website at http://www.supermicro.com for processor and memory update
and support.
Preface
Manual Organization
Chapter 1 describes the features, specifi cations and performance of the mother-
board. It also provides detailed information on the Intel C602/C606 chipset.
Chapter 2 provides hardware installation instructions. Read this chapter when in-
stalling the processor, memory modules, and other hardware components into the
system. If you encounter any problems, see Chapter 3, which describes troubleshooting procedures for video, memory, and system setup stored in the CMOS.
Chapter 4 includes an introduction to the BIOS, and provides detailed information
on running the CMOS Setup utility.
Appendix A provides BIOS Error Beep Codes.
Appendix B lists software installation instructions.
iii
Page 4
X9DBU-3F/X9DBU-iF Motherboard User’s Manual
Conventions Used in the Manual
Pay special attention to the following symbols for proper system installation and to
prevent damage to the system or injury to yourself:
Warning: Important information is given to ensure proper system installation or to
avoid damaging system components
Note: Additional is information given to differentiate between models or to
provide information for correct system setup.
iv
Page 5
Contacting Supermicro
Headquarters
Address: Super Micro Computer, Inc.
980 Rock Ave.
San Jose, CA 95131 U.S.A.
Tel:+1 (408) 503-8000
Fax: +1 (408) 503-8008
Email: marketing@supermicro.com (General Information)
B-2 Confi guring SuperDoctor® III .......................................................................... B-2
viii
Page 9
Chapter 1: Overview
Chapter 1
Overview
1-1 Overview
Checklist
Congratulations on purchasing your computer motherboard from an acknowledged
leader in the industry. Supermicro boards are designed with the utmost attention to
detail to provide you with the highest standards in quality and performance.
Please check that the following items have all been included with your motherboard.
If anything listed here is damaged or missing, contact your retailer.
The following items are included in the retail box.
• One (1) Supermicro Mainboard
• Two (2) Serial ATA cables (CBL-0044Lx2)
• Two (2) I-Pass to 4 Serial ATA (50-cm) cables (CBL-097L-03x2) (X9DBU-3F)
• One (1) I-Pass to 4 Serial ATA (50-cm) cables (CBL-097L-03) (X9DBU-iF)
• One I/O Shield (MCP-260-00027-0N)
• One (1) Quick Reference Guide (MNL-1294-QRG)
Note: For your system to work properly, please follow the links below to
download all necessary drivers/utilities and the user's manual for your
motherboard.
SMCI product manuals: http://www.supermicro.com/support/manuals/
Product Drivers and utilities: ftp://ftp.supermicro.com/
If you have any questions, please contact our support team at support@supermicro.
com.
1-1
Page 10
X9DBU-3F/X9DBU-iF Motherboard User’s Manual
Motherboard Image
Note: All graphics shown in this manual were based upon the latest PCB
revision available at the time of publishing of the manual. The motherboard
you've received may or may not look exactly the same as the graphics
shown in this manual.
1-2
Page 11
Motherboard Layout
Chapter 1: Overview
JPMB1
JPW4
P1 DIMMB2
USB0/1
IPMI_LAN
JVRM_SMB
P1 DIMMB1
FAN2
PHY
P1 DIMMA2
KB/MOUSE
P1 DIMMA1
8-Pin PWR
8-Pin PWR
24-Pin Main PWR
FAN1
JPW3
JPI2C1
JPW2
JPW1
LED3
UID
UIOP
1
JPL1
LAN2
LAN
P2 DIMMD2
CTRL
82580
[CPU2_Port3D]
P2 DIMMD1
SXB2: CPU2 PCI-E 3.0 X8
[CPU2_Port3C]
[CPU2_Port1B]
SXB1: CPU2/CPU1 PCI-E 3.0 X8 + x8
[CPU2_Port1A]
[CPU1_Port3A]
JF1
Battery
1
JPME1
BIOS
[CPU1_Port3B]
LED2
XDP_CPU
BUZZER
FAN4
JD1
JPME2
1
1
1
1
JSTBY1
2
3
4
COM2
JTPM1
I-SATA5
JSD1
USB6
USB7
USB4/5
USB2/3
JL1
SAS4~7
JI2C1
JI2C2
JWD1
JPB1
1
JTAG OF CPLD
JBR1
I-SATA4
I-SATA3
I-SATA2
I-SATA1
I-SATA0
SAS0~3
1
LED1
XDP_PCH
JBT1
BMC
CTRL
Intel IOH
FANB
T-SGPIO1
1
JPG1
T-SGPIO2
FANA
JOH1
LAN1
P2 DIMME2
P2 DIMME1
X9DBU
Rev. 1.02
FAN3
P2 DIMMF1
VGA
P2 DIMMF2
P1 DIMMC2
P1 DIMM1A
ALWAYS POPULATE DIMMxA FIRST
DIMM_C2
COM1
P1 DIMMC1
Note : For the latest CPU/Memory updates, please refer to our website at
http://www.supermicro.com/products/motherboard/ for details.
1-3
Page 12
X9DBU-3F/X9DBU-iF Motherboard User’s Manual
X9DBU-3F/X9DBU-iF Quick Reference
JPMB1
JPW4
P1 DIMMB2
USB0/1
IPMI_LAN
JVRM_SMB
P1 DIMMB1
FAN2
PHY
P1 DIMMA2
KB/MOUSE
P1 DIMMA1
8-Pin PWR
8-Pin PWR
24-Pin Main PWR
FAN1
JPW3
JPI2C1
JPW2
JPW1
LED3
UID
UIOP
1
JPL1
LAN2
LAN
P2 DIMMD2
CTRL
82580
[CPU2_Port3D]
P2 DIMMD1
SXB2: CPU2 PCI-E 3.0 X8
[CPU2_Port3C]
[CPU2_Port1B]
SXB1: CPU2/CPU1 PCI-E 3.0 X8 + x8
[CPU2_Port1A]
[CPU1_Port3A]
JF1
Battery
1
BIOS
JPME1
[CPU1_Port3B]
LED2
XDP_CPU
BUZZER
FAN4
JD1
JPME2
1
1
1
1
JSTBY1
2
3
4
COM2
JTPM1
I-SATA5
JSD1
USB6
USB7
USB4/5
USB2/3
JL1
SAS4~7
JI2C1
JI2C2
JWD1
JPB1
1
JTAG OF CPLD
JBR1
1
I-SATA4
I-SATA3
I-SATA2
I-SATA1
I-SATA0
SAS0~3
LED1
XDP_PCH
JBT1
BMC
CTRL
Intel IOH
FANB
T-SGPIO1
1
JPG1
T-SGPIO2
FANA
JOH1
LAN1
P2 DIMME2
P2 DIMME1
X9DBU
Rev. 1.02
FAN3
P2 DIMMF1
VGA
P2 DIMMF2
P1 DIMMC2
P1 DIMM1A
ALWAYS POPULATE DIMMxA FIRST
DIMM_C2
COM1
P1 DIMMC1
Notes:
• See Chapter 3 for detailed information on jumpers, I/O ports and JF1 front
panel connections.
• " " indicates the location of "Pin 1".
• Jumpers/LED Indicators/connectors/headers not indicated or documented are
for testing only.
• Use only the correct type of onboard CMOS battery as specifi ed by the manu-
facturer. Do not install the onboard battery upside down to avoid possible short
circuit.
BuzzerInternal Buzzer
COM1/COM2Backplane COM Port1/Front Accessible COM2 Header
FAN1~4, FANA/BCPU/System Fan Headers
IPMB14-pin External BMC I
2
C Header (for an IPMI Card)
I-SATA 0~5Intel PCH SATA Connectors 0~5 (SA TA 3.0 Ports 0/1, SATA 2.0
Ports 2~5)
JBAT1 Onboard Battery (See Chpt. 4 for Used Battery Disposal)
JD1Power LED/Speaker (PWR LED Pins 1~3, Speaker: Pins 4~7)
JF1Front Panel Control Header
JL1Chassis Intrusion
JOH1Overheat/Fan Fail LED
2
JPI
C1Power Supply SMBbus I2C Header
JPW1ATX 24-Pin Power Connector (See Warning on Pg. 1-6.)
JPW2~JPW312V 8-Pin Power Connectors (See Warning on Pg. 1-6.)
JPW44-Pin Power Connector
JSTBY1Standby
JTAG of CPLDJTAG of CPLD (Complex Programming Logical Device)
JTPM1TPM (Trusted Platform Module)/Port 80
JSD1SATA DOM (Device On Module) Power Connector
KB/MouseKeyboard/Mouse
LAN1/2G-bit Ethernet Ports 1/2
(IPMI) LANIPMI Dedicated LAN
1-5
Page 14
X9DBU-3F/X9DBU-iF Motherboard User’s Manual
SAS 0~3, 4~7Serial-Link S-SATA/SAS 0~3, SAS 4~7
SXB1CPU1/CPU2 PCI-Exp. 3.0 x8 + x8 Slot
SXB2(CPU2)/
Slots
T-SGPIO 1/2Serial link General Purpose I/O Connections 1/2
UIOP SMC-Proprietary Universal I/O Slot
USB 0/1 Back Panel USB 0/1
USB 2/3, 4/5Front Panel Accessible USB 2/3, 4/5 Connections
USB 6, USB7Front Panel Type A USB 6 Port
UID SwitchUID (Unit Identifi er) Switch
VGA1Backpanel VGA Port 1/Front Panel VGA Port2
X9DBU-3F/X9DBU-iF LED Indicators
LEDDescriptionStateStatus
LED1 BMC HeatbeatGreen: BlinkingBMC: Normal
LED2Stand by PWR LEDGreen: OnSB Power On
LED3UID LED
Blue: On (Windows OS)
Blinking (Linux)
Unit Identifi ed
Warning: To avoid damaging your motherboard and components, please use a
power supply that supports a 24-pin, two 8-pin and one 4-pin power connectors. Be
sure to connect the 24-pin and the 8-pin power connectors to your power supply
for adequate power delivery to your system. The 4-pin power connector is optional;
however, Supermicro recommends that this connector also be plugged in for optimal
power delivery.
1-6
Page 15
Motherboard Features
Chapter 1: Overview
CPU
Memory
• Dual Intel
processor supports two full-width QuickPath Interconnect (QPI) links of up to 8.0 GT/s per link and with
data transfer rate of up to 16 GB/s direction peak
bandwidth per port
®
E5-2400 (Socket B2) processors; each
• Integrated memory controller supports up to 384
GB of 240-pin Registered (RDIMM)/Load Reduced
(LRDIMM) ECC or Unbuffered (UDIMM) ECC/NonECC DDR3 with speeds of 800/1066/1333/1600 MHz
in 12 memory modules
Note: For the latest CPU/memory updates,
please refer to our Website at http://www.supermicro.com/products/motherboard.
DIMM sizes
• R_DIMM/LR_
DIMM
1GB, 2GB, 4GB, 8GB,16GB and
32GB @ 1.35V/1.5V
• Virtualization: VT-x, VT-d, and VT-c
Chipset
Graphics
Network
I/O Devices
• Intel® C602 (X9DBU-iF)/C606 (X9DBU-3F) PCH
• Matrox G200eW Video Controller
• Intel I350 Gigabit Ethernet Controller for LAN ports 1/2
SATA/SAS Connections
• SATA PortsTwo (2) SATA 3.0 ports (SATA
0/1),
Four (4) SATA 2.0 ports (SATA
2~5),
One (1) mini-iPass port with
SATA 2.0 (X9DBU-iF Only)
• RAIDRAID 0, 1, 5, 10
• S-SATA/SASFour (4) S-SATA/SAS 0~3,
Four (4) SAS 4~7,
Two (2) mini-iPass port with
SATA 2.0 (X9DBU-3F Only)
• RAIDRAID 0, 1, 10
Super I/O
• Nuvoton W83527 SI/O
• Nuvoton WPCM450R-F Base-board Controller (BMC)
supports IPMI LAN 2.0
1-7
Page 16
X9DBU-3F/X9DBU-iF Motherboard User’s Manual
IPMI 2.0
• Nuvoton WPCM450R Base-board Controller (BMC)
supports IPMI_LAN 2.0
Serial (COM) Port
• Two (2) Fast UART 16550 connections: 9-pin RS-
232 port
Keyboard/Mouse
• Back Panel USB Keyboard/Mouse
• PS/2 Keyboard/Mouse
Graphics Output
• Graphic Output
UIO Platform
• PCI-E 3.0 x16
• Two (2) PCI-E 3.0 x8
Peripheral
Devices
BIOS
Power
Confi g.
• One (1) SMC-Proprietary Universal IO (UIO)
USB Devices
• Two (2) USB 2.0 ports on the rear I/O panel (USB
0/1),
• Two (2) Front Panel USB headers for 4 connections
Note 1: CPU Maximum Thermal Design Power (TDP) is subject to chassis
and heatsink cooling restrictions. For proper thermal management, please
check the chassis and heatsink specifi cations for proper CPU TDP sizing.
Note 2: For IPMI Confi guration Instructions, please refer to the Embedded
IPMI Confi guration User's Guide available @ http://www.supermicro.com/
support/manuals/.
• 13.050" (L) x 12.075" (W) (331.47 mm x 306.71
mm)
1-9
Page 18
X9DBU-3F/X9DBU-iF Motherboard User’s Manual
#C-2
#C-1
#B-2
#B-1
#A-2
#A-1
DDR3
CPU1
QPI
8G
CPU2
P1
#F-2
#F-1
#E-2
#E-1
#D-2
#D-1
DDR3
RJ45
RJ45
SLOT 2
LOWER
GLAN
I350-AM2
SAS
I-PASS
SPI
DDR3
PCI-E X8 G3
PCI-E X16
PCI-E X8
SLOT 3
PCI-E X4 G3
SPI
800/1066/1333/1600
PCI-E X8 G3
in x4 Slot
3.0 Gb/S
SAS
I-PASS
3.0 Gb/S
MUX
MUX
DDR2 RAM
#3A/B
#3C/D #1B #1AP1DMI
Uplink DMI
X4 G3
PEG0DMI
SAS [0:3]
PCH
SAS [4:7]
SSB-A/D
SPI
PCI
USB [9,10]LPC
SPIPCIUSB
RMII
BMC
WPCM450
DDR
CRT
VGA
RTL8201F
RJ45
COM1
External
Serial
PortRMII
LPC
4GB/sPCI-E
COM2
Header
#1A/B#3C/D
SATA [2:5]
SATA [0:1]
USB [0:7]
TPM Header
3.0 Gb/S
6.0 Gb/S
PCI-E X8 G3
I-SATA
#2~#5
port 0,1
REAR
DDR3
PCI-E X8
PCI-E X8 G3
I-SATA
#0~#1
REAR
800/1066/1333/1600
SLOT 1
PCI-E X16
SLOT 2
4,52,3
HDR 2X5
UPPER
7
TYPE-A6TYPE-A
Note: This is a general block diagram and may not exactly represent the
features on your motherboard. See the Motherboard Features pages for
the actual specifi cations of each motherboard. 2. This block diagram is
intended for your reference only.
System Block Diagram
1-10
Page 19
Chapter 1: Overview
1-2 Processor and Chipset Overview
Built upon the functionality and the capabilities of the Intel E5-2400 (Socket B2)
processor and the C602/C606 chipset, the X9DBU-3F/X9DBU-iF motherboard
provides the performance and feature sets required for dual_processor-based
high-end system platforms.
With support of Intel QuickPath interconnect (QPI) Technology, the X9DBU-3F/
X9DBU-iF motherboard offers point-to-point serial interconnect interface with a
transfer speed of up to 8.0 GT/s, providing superb system performance.
The C602/C606 chipset provides extensive IO support, including the following
functions and capabilities:
• PCI-Express Rev. 2.0 support
• PCI-Express Gen. 3 uplink supported by some SKUs
• ACPI Power Management Logic Support Rev. 3.0b or Rev. 4.0
• USB host interface back panel and front access support
• Intel Rapid Storage Technology supported
• Intel Virtualization Technology for Directed I/O (Intel VT-d) supported
The Basic I/O System (BIOS) provides a setting that determines how the system will
respond when AC power is lost and then restored to the system. You can choose for
the system to remain powered off (in which case you must press the power switch
to turn it back on), or for it to automatically return to the power-on state. See the
Advanced BIOS Setup section for this setting. The default setting is Last State.
1-4 PC Health Monitoring
This section describes the features of PC health monitoring of the motherboard. This
motherboard has onboard system management fi rmware that supports PC health
monitoring. An onboard voltage monitor will scan the following onboard voltages
continuously: 1.5V, 1.8V, +3.3V, 3.3V Standby, +5V, +5V Standby and Battery Voltage. Once a voltage becomes unstable, a warning is given, or an error message
is sent to the screen.
Fan Status Monitor with Firmware Control
The PC health monitor chip can check the RPM status of a cooling fan. The onboard CPU and chassis fans are controlled by the fi rmware thermal management
under IPMI.
Environmental Temperature Control
A thermal control sensor monitors the CPU temperature in real time and will turn
on the thermal control fan whenever the CPU temperature exceeds a user-defi ned
threshold. The overheat circuitry runs independently from the CPU. Once it detects
that the CPU temperature is too high, it will automatically turn on the thermal fan
control to prevent the CPU from overheating. The onboard chassis thermal circuitry
can monitor the overall system temperature and alert the user when the chassis
temperature is too high.
Note: To avoid possible system overheating, please be sure to provide
adequate airfl ow to your system.
System Resource Alert
This feature is available when used with SuperDoctor III in the Windows OS
environment or used with SuperDoctor II in Linux. SuperDoctor is used to notify
the user of certain system events. For example, you can confi gure SuperDoctor to
1-12
Page 21
Chapter 1: Overview
provide yo u with warn i n gs when syste m te m perature, C P U te m perature, vo l tages
and fan sp eeds go b eyond a pred efi ned range.
1-5 ACPI Features
ACPI stands for Advanced Confi guration and Power Interface. The ACPI specifi ca-
tion defi nes a fl exible and abstract hardware interface that provides a standard
way to integrate power management features throughout a PC system, including
hardware, operating system and application software. This enables the system to
automatically turn on and off peripherals such as CD-ROMs, network cards, hard
disk drives and printers.
In addition to enabling operating system-directed power management, ACPI also
provides a generic system event mechanism for Plug and Play, and an operating
system-independent interface for confi guration control. ACPI leverages the Plug and
Play BIOS data structures, while providing a processor architecture-independent
implementation that is compatible with Windows 7, Windows Vista and Windows
2008 Operating Systems.
Slow Blinking LED for Suspend-State Indicator
When the CPU goes into a suspend state, the chassis power LED will start blinking
to indicate that the CPU is in suspend mode. When the user presses any key, the
CPU will "wake up" and the LED will automatically stop blinking and remain on.
1-6 Power Supply
As with all computer products, a stable power source is necessary for proper and
reliable operation. It is even more important for processors that have high CPU
clock rates.
The X9DBU-3F/X9DBU-iF motherboard accommodates 24-pin ATX power supplies. Although most power supplies generally meet the specifi cations required
by the CPU, some are inadequate. In addition, two 12V 8-pin power connections
(JPW2/JPW3) and the 4-Pin Power Connector (JPW4) are also required to ensure
adequate power supply to the system. Your power supply must also supply 1.5A
for the Ethernet ports.
Warning: To avoid damaging your motherboard and components, please use a
power supply that supports a 24-pin, two 8-pin and one 4-pin power connectors. Be
sure to connect the 24-pin and the 8-pin power connectors to your power supply
for adequate power delivery to your system. The 4-pin power connector is optional;
however, Supermicro recommends that this connector also be plugged in for optimal
power delivery.
1-13
Page 22
X9DBU-3F/X9DBU-iF Motherboard User’s Manual
It is strongly recommended that you use a high quality power supply that meets ATX
power supply Specifi cation 2.02 or above. It must also be SSI compliant. (For more
information, please refer to the website at http://www.ssiforum.org/). Additionally, in
areas where noisy power transmission is present, you may choose to install a line
fi lter to shield the computer from noise. It is recommended that you also install a
power surge protector to help avoid problems caused by power surges.
1-7 Super I/O
The Super I/O supports two high-speed, 16550 compatible serial communication
ports (UARTs). Each UART includes a 16-byte send/receive FIFO, a programmable
baud rate generator, complete modem control capability and a processor interrupt
system. Both UARTs provide legacy speed with baud rates of up to 115.2 Kbps
as well as an advanced speed with baud rates of 250 K, 500 K, or 1 Mb/s, which
support higher speed modems.
The Super I/O provides functions that comply with ACPI (Advanced Confi guration
and Power Interface), which includes support of legacy and ACPI power management through an SMI or SCI function pin. It also features auto power management
to reduce power consumption.
1-8 Advanced Power Management
The new advanced power management features supported by this motherboard
include IPNM and ME. Please note that you will need to do following to use these
two new features:
• Use a power supply that supports PMBus 1.1 or 1.2.
• Install the NMView software in your system. NMView is optional and can be
purchased from Supermicro.
Intel® Intelligent Power Node Manager (IPNM)
The Intel® Intelligent Power Node Manager (IPNM) provides your system with
real-time thermal control and power management for maximum energy effi ciency.
Although IPNM is supported by the BMC (Baseboard Management Controller),
your system must also have IPNM-compatible Management Engine (ME) fi rmware
installed in your system for IPNM support.
Note: Support for IPNM Specifi cation Version 1.5 or Vision 2.0 depends
on the power supply used in the system.
1-14
Page 23
Chapter 1: Overview
Management Engine (ME)
The Management Engine, which is an ARC controller embedded in the PCH, provides Server Platform Services (SPS) to your system. The services provided by
SPS are different from those provided by the ME on client platforms.
1-9 Introduction to the IPMI Controller
The Nuvoton WPCM450R Controller, a Baseboard Management Controller (BMC),
supports 2D/VGA-compatible Graphic Cores with PCI interface, creating multi-media
virtualization via Keyboard/Video/Mouse Redirection (KVMR). The WPCM450R
Controller is ideal for remote system management.
The WPCM450R Controller interfaces with the host system via PCI connections
to communicate with the graphics cores. It supports USB 2.0 and 1.1 for remote
keyboard/mouse/virtual media emulation. It also provides LPC interface support to
control Super IO functions. The WPCM450R Controller is connected to the network
via an external Ethernet PHY module or shared NCSI connections.
The WPCM450R communicates with onboard components via six SMBus interfaces, PECI (Platform Environment Control Interface) buses, and General Purpose
I/O ports.
WPCM450R DDR2 Memory Interface
The WPCM450R supports a 16-bit DDR2 memory module with a speed of up to 220
MHz. For best signal integrity, the WPCM450R provides point-to-point connection.
WPCM450R PCI System Interface
The WPCM450R provides 32-bit, 33 MHz 3.3V PCI interface, which is compliant
with the PCI Local Bus Specifi cation Rev. 2.3. The PCI system interface connects
to the onboard PCI Bridge used by the graphics controller.
Other Features Supported by the WPCM BMC Controller
The WPCM450R supports the following features:
• IPMI 2.0
• Serial over LAN
• KVM over LAN
• LAN Alerting-SNMP Trap
1-15
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X9DBU-3F/X9DBU-iF Motherboard User’s Manual
• Event Log
• X-Bus parallel interface for I/O expansion
• Multiple ADC inputs, Analog and Digital Video outputs
• SPI Flash Host BIOS and fi rmware bootstrap program supported
• Reduced Media Independent Interface (RMII)
• OS (Operating System) Independent
• Provides remote Hardware Health Monitoring via IPMI. Key features
• Provides Network Management Security via remote access/console redirec-
tion.
• Supports the following Management tools: IPMIView, CLI (Command Line
Interface)
• RMCP+ protocol supported
Note: For more information on IPMI confi guration, please refer to the
IPMI User's Guide posted on our website at http://www.supermicro.com/
support/manuals/.
1-16
Page 25
Chapter 2: Installation
Chapter 2
Installation
2-1 Standardized Warning Statements
The following statements are industry-standard warnings, provided to warn the user
of situations which have the potential for bodily injury . Should you have questions or
experience diffi culty, contact Supermicro's Technical Support department for assis-
tance. Only certifi ed technicians should attempt to install or confi gure components.
Read this section in its entirety before installing or confi guring components in the
Supermicro chassis.
Battery Handling
Warning!
There is a danger of explosion if the battery is replaced incorrectly. Replace the
battery only with the same or equivalent type recommended by the manufacturer.
Dispose of used batteries according to the manufacturer's instructions
Warnung
Bei Einsetzen einer falschen Batterie besteht Explosionsgefahr. Ersetzen Sie die
Batterie nur durch den gleichen oder vom Hersteller empfohlenen Batterietyp.
Entsorgen Sie die benutzten Batterien nach den Anweisungen des Herstellers.
2-1
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X9DBU-3F/X9DBU-iF Motherboard User’s Manual
!הרהזא
Attention
Danger d'explosion si la pile n'est pas remplacée correctement. Ne la remplacer
que par une pile de type semblable ou équivalent, recommandée par le fabricant.
Jeter les piles usagées conformément aux instructions du fabricant.
¡Advertencia!
Existe peligro de explosión si la batería se reemplaza de manera incorrecta. Re-
emplazar la batería exclusivamente con el mismo tipo o el equivalente recomendado por el fabricante. Desechar las baterías gastadas según las instrucciones
del fabricante.
배터리가 올바르게 교체되지 않으면 폭발의 위험이 있습니다. 기존 배터리와 동일
하거나 제조사에서 권장하는 동등한 종류의 배터리로만 교체해야 합니다. 제조사
의 안내에 따라 사용된 배터리를 처리하여 주십시오.
Waarschuwing
Er is ontploffi ngsgevaar indien de batterij verkeerd vervangen wordt. Vervang de
batterij slechts met hetzelfde of een equivalent type die door de fabrikant aanbevolen wordt. Gebruikte batterijen dienen overeenkomstig fabrieksvoorschriften
afgevoerd te worden.
2-2
Page 27
Chapter 2: Installation
רצומה קוליס
Product Disposal
Warning!
Ultimate disposal of this product should be handled according to all national laws
and regulations.
製品の廃棄
この製品を廃棄処分する場合、国の関係する全ての法律・条例に従い処理する必要が
あります。
警告
本产品的废弃处理应根据所有国家的法律和规章进行。
警告
本產品的廢棄處理應根據所有國家的法律和規章進行。
Warnung
Die Entsorgung dieses Produkts sollte gemäß allen Bestimmungen und Gesetzen
des Landes erfolgen.
¡Advertencia!
Al deshacerse por completo de este producto debe seguir todas las leyes y regla-
mentos nacionales.
Attention
La mise au rebut ou le recyclage de ce produit sont généralement soumis à des
lois et/ou directives de respect de l'environnement. Renseignez-vous auprès de
l'organisme compétent.
Waarschuwing
De uiteindelijke verwijdering van dit product dient te geschieden in overeenstemming
met alle nationale wetten en reglementen.
2-2 Static-Sensitive Devices
Electrostatic Discharge (ESD) can damage electronic com ponents. To avoid damaging your system board, it is important to handle it very carefully. The following
measures are generally suffi cient to protect your equipment from ESD.
Precautions
• Use a grounded wrist strap designed to prevent static discharge.
• Touch a grounded metal object before removing the board from the antistatic
bag.
• Handle the board by its edges only; do not touch its components, peripheral
chips, memory modules or gold contacts.
• When handling chips or modules, avoid touching their pins.
• Put the motherboard and peripherals back into their antistatic bags when not
in use.
• For grounding purposes, make sure that your system chassis provides excellent
conductivity between the power supply, the case, the mounting fasteners and
the motherboard.
Unpacking
The motherboar d is shipped i n a ntistati c pa ckaging to avo i d s tatic dama g e. When
unpacking the board, make sure that the person handling it is static-protected.
2-4
Page 29
Chapter 2: Installation
2-3 Processor and Heatsink Installation
When handling the processor package, avoid placing direct pressure on the label
area of the fan.
Not es:
• Always connect the power cord last, and always remove it before adding,
removing, or changing any hardware components. Make sure that you install
the processor into the CPU socket before you install the CPU heatsink.
• Make sure to install the motherboard into the chassis before you install the
CPU heatsink and heatsink fans.
• Make sure that the processor wattage (TDP) does not exceed the maximum
rating for the motherboard. Also, check that it is within the rating limits of
the heatsink and chassis to ensure proper cooling and operation. Refer to
the chassis manual for more information.
• When purchasing a motherboard without a processor pre-installed, make
sure that the CPU socket plastic cap is in place, and none of the CPU socket
pins are bent; otherwise, contact the retailer immediately.
• Refer to the M oth er bo ard Feat ure s se ct io n of th e manu al an d our we bsi te
for more i nform ation on C PU suppo rt a nd update s.
Installing an LGA 1356 Processor
1. Press the socket clip to release the load plate, which covers the CPU socket,
from its locked position.
2. Gently lift the socket clip to open the load plate.
3. Hold the plastic cap at its north and south center edges to remove it from the
CPU socket.
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X9DBU-3F/X9DBU-iF Motherboard User’s Manual
4. After removing the plastic cap, hold the CPU at the north and south center
edges with your thumb and index fi nger,.
5. Align the CPU key, which is a semi-circle cutout, with the socket key, which is
the notch below the gold color dot on the side of the socket.
6. Align Pin 1 on the CPU with Pin 1 on the CPU socket.
7. Once both CPU and the socket are aligned, carefully lower the CPU straight
down into the socket. (To avoid damaging the CPU or the socket, do not rub
the CPU against the surface of the socket or its pins.)
8. With the CPU inside the socket, inspect the four corners of the CPU to make
sure that the CPU is properly installed.
9. Once the CPU is securely seated on the socket, lower the CPU load plate to
the socket.
10. Use your thumb to gently push the socket clip down to the clip lock.
Warning: Please s ave the plastic c ap. The moth erboard mu st be shippe d with the
plastic cap properly installed to protect CPU socket pins. Shipping without the plastic
cap pro per ly inst alled w ill cau se damag e to the so cket pins.
2-6
Page 31
Chapter 2: Installation
Installing a Passive CPU Heatsink
1. Apply the proper amount of thermal grease to the heatsink.
2. Place the heatsink on top of the CPU so that the two mounting holes on the
heatsink are aligned with those on the retention mechanism.
3. Inser t t wo push -pi ns on th e sides of t he heat sink th rough t he mount ing hol es
on the mot her board, a nd tur n the pus h- pins cl ock wis e to loc k them.
Screw#3
Screw#1
Screw#2
Screw#4
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X9DBU-3F/X9DBU-iF Motherboard User’s Manual
Removing the Passive Heatsink
Warning: We do not recommend that the CPU or the heatsink be removed. However,
if you do need to remove the heatsink, please follow the instructions below to uninstall
the heatsink to avoid damaging the CPU or other components.
1. Unplug the power cord from the power supply.
2. Press down the push-pin or unscrew the screw on the heatsink, and turn it
counter-clock-wise to loosen it. Repeat the same step to loosen the second
push-pin.
3. Hold the heatsink as shown in the picture below, and gently wriggle the heatsink to loosen it. (Do not use excessive force when wriggling the heatsink.)
4. Once the heatsink is loosened, remove it from the motherboard.
5. To reinstall the CPU and the heatsink, clean the surface of the CPU and the
heatsink to get rid of the old thermal grease. Reapply the proper amount of
thermal grease on the surface before reinstalling them on the motherboard.
2-8
Page 33
Chapter 2: Installation
2-4 Installing and Removing the Memory Modules
Note: Check Supe rmic ro's web site for r ecom mende d memo ry m odule s.
CAUTION
Exercise extreme care when installing or removing DIMM
module s to prevent a ny possi ble dam age.
Installing & Removing DIMMs
1. Insert the desired number of DIMMs into the memory slots, starting with P1DIMM #1A. (For best memory performance, please use the modules of the
same type and speed in the same bank.)
2. Push the release tabs outwards on both ends of the DIMM slot to unlock it.
USB0/1
COM1
VGA
P2 DIMMF2
KB/MOUSE
JPW4
IPMI_LAN
JVRM_SMB
PHY
[CPU2_Port3D]
[CPU2_Port3C]
UIOP
SXB2: CPU2 PCI-E 3.0 X8
LED3
UID
1
JPL1
LAN2
LAN1
LAN
P2 DIMME2
P2 DIMME1
P2 DIMMF1
P2 DIMMD2
CTRL
82580
P2 DIMMD1
Notches
[CPU2_Port1B]
SXB1: CPU2/CPU1 PCI-E 3.0 X8 + x8
[CPU2_Port1A]
[CPU1_Port3A]
JPME2
1
JI2C1
JTAG OF CPLD
1
JI2C2
JPB1
1
1
JPMB1
JSTBY1
2
3
4
JWD1
1
COM2
JTPM1
JBR1
I-SATA5
JSD1
I-SATA4
USB6
I-SATA3
I-SATA2
USB7
I-SATA1
I-SATA0
USB4/5
USB2/3
JL1
SAS4~7
SAS0~3
[CPU1_Port3B]
LED1
BMC
CTRL
1
JPG1
XDP_PCH
1
Intel IOH
T-SGPIO2
T-SGPIO1
JBT1
FANA
FANB
XDP_CPU
Battery
JPME1
1
BIOS
X9DBU
Rev. 1.02
BUZZER
FAN4
LED2
JOH1
JF1
FAN3
JD1
P1 DIMMB1
P1 DIMMC1
P1 DIMMB2
P1 DIMMC2
P1 DIMMA1
P1 DIMMA2
JPW3
8-Pin PWR
P1 DIMM1A
JPI2C1
ALWAYS POPULATE DIMMxA FIRST
DIMM_C2
JPW2
8-Pin PWR
24-Pin Main PWR
JPW1
FAN1
FAN2
Release Tabs
3. Align the DIMM module key with the receptive point on the memory slot.
4. Align the notches on both ends of the module with the receptive points on
ends of the slot.
5. Use two thumbs together to press the notches of the module straight down
into the slot until the module snaps into place.
6. Press the release tabs to the locked positions to secure the DIMM module
into the slot.
Press both notches straight
down into the memory slot at
the same time.
Removing Memory Modules
Press both notches on the ends of the DIMM module to unlock it. Once the DIMM
module is loosened, remove it from the memory slot.
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X9DBU-3F/X9DBU-iF Motherboard User’s Manual
Memory Support for the X9DBU-3F/X9DBU-iF Motherboard
The X9DBU-3F/X9DBU-iF Motherboard supports up to 384 GB Registered
(RDIMM)/Load Reduced (LRDIMM) ECC or Unbuffered (UDIMM) ECC/Non-ECC
DDR3 memory with speeds of 1600/1333/1066/800 MHz in 12 DIMM slots. For the
latest memory updates, please refer to our website a at http://www.supermicro.com/
products/motherboard.
Processor & Memory Module Population Confi guration
For memor y to wor k pro perl y, follow the tab les be low for me mor y inst allati on.
Processors and their Corresponding Memory Modules
CPU#Corresponding DIMM Modules
CPU 1P1-
DIMMA1
CPU2P2-
DIMMD1
P1DIMMA2
P2DIMMD2
P1DIMMB1
P2DIMME1
P1DIMMB2
P2DIMME2
P1DIMMC1
P2DIMMF1
P1DIMMC2
P2DIMMF2
Processor and Memory Module Population for Optimal Performance
Number of
CPUs+DIMMs
1 CPU &
2 DIMMs
1 CPU &
4 DIMMs
1 CPU &
6 DIMMs
2 CPUs &
4 DIMMs
2 CPUs &
6 DIMMs
2 CPUs &
8 DIMMs
2 CPUs &
10 DIMMs
2 CPUs &
12 DIMMs
(For memory to work properly, please follow the instructions below.)
Intel E5-2400 Series Processor UDIMM Memory Support
Ranks Per
DIMM &
Data Width
SRx8
Non-ECC
DRx8
Non-ECC
SRx16
Non-ECC
SRx8
ECC
DRx8
ECC
Note: For detailed information on memory support and updates, please refer to the SMC Recom-
mended Memory List posted on our website at http://www.supermicro.com/support/resources/
mem.cfm.
Memory Capacity
Per DIMM
(See the Note below)
1GB2GB4GBNA1066,1333NA1066
2GB4GB8GB NA1066,1333NA1066
512MB1GB2GBNA1066,1333NA1066
1GB2GB4GB1066, 13331066,133310661066
2GB4GB8GB1066, 13331066,133310661066
Speed (MT/s) and Voltage Validated by Slot
per Channel (SPC) and DIMM Per Channel
(DPC)
2 Slots Per Channel
1DPC2DPC
1.35V1.5V1.35V1.5V
Populating RDIMM (ECC) Memory Modules
Intel E5-2400 Series Processor RDIMM Memory Support
Ranks
Per
DIMM
& Data
Width
SRx8 1GB2GB4GB1066, 13331066, 1333,
DRx8 2GB4GB8GB1066, 13331066, 1333,
SRx4 2GB4GB8GB1066, 13331066, 1333,
DRx44GB8GB16GB1066, 13331066, 1333,
QRx48GB16GB32GB800800800800
QRx84GB8GB16GB800800800800
Note: For detailed information on memory support and updates, please refer to the SMC Recommended
Memory List posted on our website at http://www.supermicro.com/support/resources/mem.cfm.
Memory Capacity
Per DIMM
(See the Note Below)
Speed (MT/s) and Voltage Validated by Slot per Channel (SPC) and
1.35V1.5V1.35V1.5V
DIMM Per Channel (DPC)
2 Slots Per Channel
1DPC2DPC
1600
1600
1600
1600
1066,
1333
1066,
1333
1066,
1333
1066,
1333
1066, 1333,
1066, 1333,
1066, 1333,
1066, 1333,
1600
1600
1600
1600
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X9DBU-3F/X9DBU-iF Motherboard User’s Manual
Populating LRDIMM (ECC) Memory Modules
Intel E5-2600 Series Processor LRDIMM Memory Support
Ranks Per
DIMM & Data
Width
(See the Note
Below)
QRx4 (DDP)16GB32GB1066,1066,
QRx8 (P)8GB16GB1066,1066,
Note: For detailed information on memory support and updates, please refer to the
SMC Recommended Memory List posted on our website at http://www.supermicro.
com/support/resources/mem.cfm.
Memory Capacity
Per DIMM
Speed (MT/s) and Voltage Validated
by Slot per Channel (SPC) and
DIMM Per Channel (DPC)
1 Slot Per
Channel
1DPC1DPC and 2DPC
1.35V1.5V1.35V1.5V
1333
1333
Other Important Notes and Restrictions
2 Slots Per
Channel
10661066,
10661066,
• For the memory modules to work properly, please install DIMM modules of the
same type, same speed and same operating frequency on the motherboard.
Mixing of RDIMMs, UDIMMs or LRDIMMs is not allowed. Do not install both
ECC and Non-ECC memory modules on the same motherboard.
• Using DDR3 DIMMs with different operating frequencies is not allowed. All chan-
nels in a system will run at the lowest common frequency.
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Chapter 2: Installation
2-5 Motherboard Installation
All motherboards have standard mounting holes to fi t different types of chassis.
Make sure that the locations of all the mounting holes for both motherboard and
chassis match. Although a chassis may have both plastic and metal mounting fasteners, metal ones are highly recommended because they ground the motherboard
to the chassis. Make sure that the metal standoffs click in or are screwed in tightly.
Then use a screwdriver to secure the motherboard onto the motherboard tray.
Tools Needed
• Phillips Screwdriver
• Pan head screws (10 pieces)
• Standoffs (10 pieces, if needed)
Location of Mounting Holes
There are ten (10) mounting holes on this motherboard indicated by the arrows.
JPMB1
LED3
UID
UIOP
1
JPL1
LAN2
LAN
CTRL
82580
[CPU2_Port3D]
P2 DIMMD1
SXB2: CPU2 PCI-E 3.0 X8
[CPU2_Port3C]
[CPU2_Port1B]
SXB1: CPU2/CPU1 PCI-E 3.0 X8 + x8
[CPU2_Port1A]
[CPU1_Port3A]
1
JPG1
T-SGPIO2
FANA
[CPU1_Port3B]
Battery
JPME1
1
BIOS
FAN4
JOH1
LED2
JF1
JD1
JPME2
1
JSTBY1
2
3
4
COM2
JTPM1
JSD1
USB6
USB7
USB4/5
USB2/3
JL1
1
1
1
I-SATA5
SAS4~7
JWD1
JI2C1
JI2C2
JPB1
1
JTAG OF CPLD
I-SATA4
I-SATA3
I-SATA2
I-SATA1
I-SATA0
SAS0~3
LED1
BMC
CTRL
XDP_PCH
JBR1
1
Intel IOH
T-SGPIO1
JBT1
FANB
BUZZER
P2 DIMMD2
XDP_CPU
P2 DIMME2
P2 DIMME1
X9DBU
Rev. 1.02
FAN3
LAN1
P2 DIMMF1
VGA
P2 DIMMF2
P1 DIMMC2
P1 DIMM1A
ALWAYS POPULATE DIMMxA FIRST
DIMM_C2
COM1
P1 DIMMC1
JPW4
P1 DIMMB2
IPMI_LAN
JVRM_SMB
P1 DIMMB1
FAN2
USB0/1
P1 DIMMA2
KB/MOUSE
PHY
P1 DIMMA1
JPW3
8-Pin PWR
JPI2C1
JPW2
8-Pin PWR
24-Pin Main PWR
JPW1
FAN1
Warning: 1) To avoid damaging the motherboard and its components, please do
not use a force greater than 8 lb/inch on each mounting screw during motherboard
installation. 2) Some components are very close to the mounting holes. Please take
precautionary measures to avoid damaging these components when installing the
motherboard to the chassis.
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X9DBU-3F/X9DBU-iF Motherboard User’s Manual
Installing the Motherboard
1. Install the I/O shield into the chassis.
2. Locate the mounting holes on the motherboard.
3. Locate the matching mounting holes on the chassis. Align the mounting holes
on the motherboard with the mounting holes on the chassis.
4. Install standoffs in the chassis as needed.
5. Install the motherboard into the chassis carefully to avoid damaging motherboard components.
6. Using the Phillips screwdriver, insert a Pan head #6 screw into a mounting
hole on the motherboard and its matching mounting hole on the chassis.
7. Repeat Step 5 to insert #6 screws into all mounting holes.
8. Make sure that the motherboard is securely placed in the chassis.
Note: Images displayed are for illustration only. Your chassis or components might look different from those shown in this manual.
2-14
Page 39
Chapter 2: Installation
1
2
3
456
7
8
9
2-6 Control Panel Connectors and I/O Ports
The I/O p ort s are col or-co ded in c onform ance wi th the PC 9 9 spec ifi cation. See
the pic ture be low for t he co lors a nd loc atio ns of the var ious I /O por t s.
Back Panel Connectors and I/O Ports
P1 DIMMC2
P1 DIMM1A
ALWAYS POPULATE DIMMxA FIRST
DIMM_C2
P1 DIMMC1
USB0/1
COM1
KB/MOUSE
JPW4
IPMI_LAN
JVRM_SMB
PHY
P1 DIMMB1
P1 DIMMB2
P1 DIMMA1
P1 DIMMA2
JPW3
8-Pin PWR
JPI2C1
JPW2
8-Pin PWR
24-Pin Main PWR
JPW1
FAN1
FAN2
10
LED3
UID
UIOP
1
JPL1
LAN
CTRL
82580
[CPU2_Port3D]
P2 DIMMD1
SXB2: CPU2 PCI-E 3.0 X8
[CPU2_Port3C]
[CPU2_Port1B]
SXB1: CPU2/CPU1 PCI-E 3.0 X8 + x8
[CPU2_Port1A]
[CPU1_Port3A]
JPME2
LED1
1
JI2C1
JTAG OF CPLD
1
JI2C2
JPB1
1
1
JPMB1
JSTBY1
2
3
4
JWD1
1
COM2
JTPM1
XDP_PCH
JBR1
I-SATA5
1
JSD1
I-SATA4
USB6
I-SATA3
I-SATA2
USB7
I-SATA1
I-SATA0
USB4/5
USB2/3
JL1
SAS4~7
SAS0~3
[CPU1_Port3B]
BMC
CTRL
1
JPG1
Battery
JPME1
1
Intel IOH
BIOS
T-SGPIO2
T-SGPIO1
JBT1
FANA
FANB
JOH1
BUZZER
FAN4
LED2
JF1
JD1
XDP_CPU
P2 DIMMD2
LAN2
P2 DIMME1
X9DBU
Rev. 1.02
FAN3
P2 DIMME2
VGA
LAN1
P2 DIMMF2
P2 DIMMF1
Back Panel I/O Port Locations and Defi nitions
1. Keyboard
2. Mouse
3. Back Panel USB Port 0
4. Back Panel USB Port 1
5. IPMI LAN
6. COM Port 1 (Turquoise)
7. Back Panel VGA (Blue)
8. Gigabit LAN 1
9. Gigabit LAN 2
10. UID Switch
2-15
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X9DBU-3F/X9DBU-iF Motherboard User’s Manual
1
2
3
4
567
8
ATX PS/2 Keyboard and Mouse
Ports
The ATX PS/2 keyboard and PS/2
mouse are located next to the Back
Panel USB Ports 0/1 and the IPMI
LAN port on the motherboard. See the
table at right for pin defi nitions.
Universal Serial Bus (USB)
Two Universal Serial Bus ports (USB
0/1) are located on the I/O back panel.
In addition, two USB headers, located
close to the I-SATA ports, provide four
front-accessible USB connections
(USB 2/3, USB 4/5). Two Type A
connectors (USB 6, USB 7) are also
located on the motherboard to provide
front USB support. (Cables are not
included). See the tables on the right
for pin defi nitions.
Two COM connections (COM1 &
COM2) are located on the motherboard. COM1 is located on the Back
panel I/O panel. COM2, located next
to the TPM/Port 80 header, provides
front access support. See the table on
the right for pin defi nitions.
One video port (VGA1) is located next
to COM Port1 on the I/O backplane.
Refer to the board layout below for
the location.
P1 DIMMC2
P1 DIMM1A
ALWAYS POPULATE DIMMxA FIRST
DIMM_C2
P1 DIMMC1
USB0/1
COM1
KB/MOUSE
JPW4
IPMI_LAN
JVRM_SMB
PHY
P1 DIMMB1
P1 DIMMB2
P1 DIMMA1
P1 DIMMA2
8-Pin PWR
8-Pin PWR
24-Pin Main PWR
FAN1
FAN2
LED3
UID
UIOP
1
JPL1
LAN
CTRL
82580
[CPU2_Port3D]
P2 DIMMD1
SXB2: CPU2 PCI-E 3.0 X8
[CPU2_Port3C]
[CPU2_Port1B]
SXB1: CPU2/CPU1 PCI-E 3.0 X8 + x8
[CPU2_Port1A]
[CPU1_Port3A]
JPME2
LED1
1
JI2C1
JTAG OF CPLD
1
JI2C2
JPB1
1
1
JPMB1
JSTBY1
2
3
4
JWD1
1
COM2
JTPM1
XDP_PCH
JBR1
I-SATA5
1
JSD1
I-SATA4
USB6
I-SATA3
I-SATA2
USB7
I-SATA1
I-SATA0
USB4/5
USB2/3
JL1
SAS4~7
SAS0~3
[CPU1_Port3B]
BMC
CTRL
1
JPG1
Battery
JPME1
1
Intel IOH
BIOS
T-SGPIO2
T-SGPIO1
JBT1
FANA
FANB
JOH1
BUZZER
FAN4
LED2
JF1
JD1
XDP_CPU
P2 DIMMD2
LAN2
P2 DIMME1
X9DBU
Rev. 1.02
FAN3
P2 DIMME2
VGA
LAN1
P2 DIMMF2
P2 DIMMF1
1. COM1
2. COM2
3. VGA1
JPW3
JPI2C1
JPW2
JPW1
2-17
Page 42
X9DBU-3F/X9DBU-iF Motherboard User’s Manual
1
2
3
Ethernet Ports
Two Gigabit Ethernet ports (LAN1/2)
are located on the I/O backplane on
the motherboard to provide Ethernet
connections. In addition, an IPMI
Dedicated LAN, located above USB
0/1 ports on the backplane, provides
KVM support for IPMI 2.0. All these
ports accept RJ45 type cables. (Note:
Please refer to the LED Indicator Section for LAN LED information.)
LAN Ports
Pin Defi nition
Pin# Defi nition
1P2V5SB10SGND
2TD0+11Act LED
3TD0-12P3V3SB
4TD1+13Link 100 LED (Yel-
A Unit Identifier (UID) Switch and
two LED Indicators are located on
the motherboard. The UID Switch is
located next to the GLAN 2 port on
the backplane. The Rear UID LED
(LED3) is located next to the UID
Switch. The Front Panel UID LED
is located at Pins 7/8 of the Front
Control Panel at JF1. Connect a cable
to Pin 8 on JF1 for Front Panel UID
LED indication. When you press the
UID switch, both Rear UID LED and
Front Panel UID LED Indicators will
be turned on. Press the UID switch
again to turn off both LED Indicators.
These UID Indicators provide easy
identifi cation of a system unit that
may be in need of service.
Note: UID can also be triggered via IPMI on the motherboard. For more information on IPMI, please refer
to the IPMI User's Guide
posted on our Website @
http://www.supermicro.com.
UID Switch
Pin# Defi nition
1Ground
2Ground
3Button In
4Ground
UID LED (LE2)
Status
Color/State OS Status
Blue: OnWindows OSUnit Identifi ed
Blue:
Linux OSUnit Identifi ed
Blinking
1920
Ground
FP PWRLED
HDD LED
NIC1 Link LED
NIC2 Link LED
Blue+ (OH/Fan Fail/
PWR FaiL/UID LED)
Power Fail LED
Ground
Ground
X
2
NMI
NIC1 Activity LED
NIC2 Activity LED
Reset
PWR
1
X
3.3 V
ID_UID_SW/3/3V Stby
Red+ (Blue LED Cathode)
3.3V
Reset Button
Power Button
LED3
UID
UIOP
1
JPL1
LAN2
LAN1
LAN
P2 DIMME2
P2 DIMME1
P2 DIMMD2
CTRL
82580
[CPU2_Port3D]
P2 DIMMD1
SXB2: CPU2 PCI-E 3.0 X8
[CPU2_Port3C]
[CPU2_Port1B]
SXB1: CPU2/CPU1 PCI-E 3.0 X8 + x8
[CPU2_Port1A]
[CPU1_Port3A]
JPME2
LED1
1
JI2C1
JTAG OF CPLD
1
JI2C2
JPB1
1
1
JPMB1
JSTBY1
2
3
4
JWD1
1
COM2
JTPM1
XDP_PCH
JBR1
I-SATA5
1
JSD1
I-SATA4
USB6
I-SATA3
I-SATA2
USB7
I-SATA1
I-SATA0
USB4/5
USB2/3
JL1
SAS4~7
SAS0~3
[CPU1_Port3B]
BMC
CTRL
1
JPG1
Battery
Intel IOH
T-SGPIO2
T-SGPIO1
JBT1
FANA
FANB
JOH1
JF1
XDP_CPU
JPME1
1
BIOS
X9DBU
Rev. 1.02
BUZZER
FAN4
LED2
FAN3
JD1
P2 DIMMF1
P2 DIMMF2
VGA
P1 DIMMC2
P1 DIMM1A
ALWAYS POPULATE DIMMxA FIRST
DIMM_C2
P1 DIMMC1
P1 DIMMB2
KB/MOUSE
JPW4
IPMI_LAN
JVRM_SMB
PHY
P1 DIMMB1
P1 DIMMA1
P1 DIMMA2
JPW3
8-Pin PWR
JPI2C1
JPW2
8-Pin PWR
24-Pin Main PWR
JPW1
FAN1
FAN2
USB0/1
COM1
1. UID Switch
2. Rear UID LED (LE2)
3. Front UID LED
2-19
Page 44
X9DBU-3F/X9DBU-iF Motherboard User’s Manual
Front Control Panel
JF1 contains header pins for various buttons and indicators that are normally located on a control panel at the front of the chassis. These connectors are designed
specifi cally for use with Supermicro's server chassis. See the fi gure below for the
descriptions of the various control panel buttons and LED indicators. Refer to the
following section for descriptions and pin defi nitions.
JPMB1
LED3
UID
UIOP
1
JPL1
LAN2
LAN
P2 DIMME1
P2 DIMMD2
CTRL
82580
[CPU2_Port3D]
P2 DIMMD1
SXB2: CPU2 PCI-E 3.0 X8
[CPU2_Port3C]
[CPU2_Port1B]
SXB1: CPU2/CPU1 PCI-E 3.0 X8 + x8
[CPU2_Port1A]
[CPU1_Port3A]
T-SGPIO2
[CPU1_Port3B]
XDP_CPU
1
JPG1
Battery
JPME1
1
BIOS
X9DBU
FANA
JOH1
JF1
FAN4
LED2
Rev. 1.02
BUZZER
FAN3
JD1
JPME2
1
2
3
4
COM2
JTPM1
USB6
USB7
USB4/5
USB2/3
JL1
JSTBY1
LED1
BMC
1
1
1
I-SATA5
JSD1
SAS4~7
CTRL
JI2C1
JTAG OF CPLD
JI2C2
JPB1
JWD1
1
XDP_PCH
JBR1
1
I-SATA4
I-SATA3
Intel IOH
I-SATA2
I-SATA1
I-SATA0
T-SGPIO1
JBT1
SAS0~3
FANB
P2 DIMME2
LAN1
P2 DIMMF1
VGA
P2 DIMMF2
P1 DIMMC2
P1 DIMM1A
ALWAYS POPULATE DIMMxA FIRST
DIMM_C2
COM1
P1 DIMMC1
JPW4
P1 DIMMB2
IPMI_LAN
JVRM_SMB
P1 DIMMB1
FAN2
USB0/1
P1 DIMMA2
KB/MOUSE
PHY
P1 DIMMA1
JPW3
8-Pin PWR
JPI2C1
JPW2
8-Pin PWR
24-Pin Main PWR
JPW1
FAN1
JF1 Header Pins
Ground
X
FP PWRLED
HDD LED
NIC1 Link LED
NIC2 Link LED
Blue+ (OH/Fan Fail/
PWR FaiL/UID LED)
Power Fail LED
Ground
Ground
1920
NMI
X
3.3 V
ID_UID_SW/3/3V Stby
NIC1 Activity LED
NIC2 Activity LED
Red+ (Blue LED Cathode)
3.3V
Reset
PWR
2
1
Rese t Button
Power Button
2-20
Page 45
Front Control Panel Pin Defi nitions
Chapter 2: Installation
NMI Button
The non-maskable interrupt button
header is located on pins 19 and 20
of JF1. Refer to the table on the right
for pin defi nitions.
Power LED
The Power LED connection is located
on pins 15 and 16 of JF1. Refer to the
table o n the ri ght for p in defi nitions.
NMI Button
Pin Defi nitions (JF1)
Pin# Defi nition
19Control
20Ground
Power LED
Pin Defi nitions (JF1)
Pin# Defi nition
153.3V
16PWR LED
A. NMI
B. PWR LED
DIMM_C2
P1 DIMMC2
P1 DIMM1A
ALWAYS POPULATE DIMMxA FIRST
P1 DIMMC1
USB0/1
COM1
KB/MOUSE
JPW4
IPMI_LAN
JVRM_SMB
PHY
Ground
X
FP PWRLED
B
HDD LED
P1 DIMMB1
P1 DIMMB2
P1 DIMMA1
P1 DIMMA2
NIC1 Link LED
JPW3
8-Pin PWR
8-Pin PWR
24-Pin Main PWR
NIC2 Link LED
JPI2C1
Blue+ (OH/Fan Fail/
PWR FaiL/UID LED)
JPW2
Power Fail LED
Ground
JPW1
FAN1
FAN2
Ground
1920
NMI
A
X
3.3 V
ID_UID_SW/3/3V Stby
NIC1 Activity LED
NIC2 Activity LED
Red+ (Blue LED Cathode)
3.3V
Reset
Reset Butto n
Power Button
PWR
2
1
LED3
UID
UIOP
1
JPL1
LAN
P2 DIMMD2
CTRL
82580
[CPU2_Port3D]
P2 DIMMD1
SXB2: CPU2 PCI-E 3.0 X8
[CPU2_Port3C]
[CPU2_Port1B]
SXB1: CPU2/CPU1 PCI-E 3.0 X8 + x8
[CPU2_Port1A]
[CPU1_Port3A]
JPME2
LED1
BMC
CTRL
1
JI2C1
JTAG OF CPLD
1
JI2C2
JPB1
1
1
JPMB1
JSTBY1
2
3
4
JWD1
1
COM2
JTPM1
XDP_PCH
JBR1
I-SATA5
1
JSD1
I-SATA4
USB6
I-SATA3
I-SATA2
USB7
I-SATA1
I-SATA0
USB4/5
USB2/3
JL1
JBT1
SAS4~7
SAS0~3
[CPU1_Port3B]
XDP_CPU
1
JPG1
Battery
JPME1
1
Intel IOH
BIOS
T-SGPIO2
T-SGPIO1
FANA
FANB
JOH1
JF1
BUZZER
FAN4
LED2
JD1
LAN2
P2 DIMME2
P2 DIMME1
X9DBU
Rev. 1.02
FAN3
VGA
LAN1
P2 DIMMF2
P2 DIMMF1
2-21
Page 46
X9DBU-3F/X9DBU-iF Motherboard User’s Manual
D
E
HDD LED
The HDD LED connection is located
on pins 13 and 14 of JF1. Attach a
cable here to indicate HDD activity. See the table on the right for pin
defi nitions.
NIC1/NIC2 LED Indicators
The NIC (Network Interface Controller) LED connections for GLAN port 1
are located on pins 11 and 12 of JF1,
and the LED connection for GLAN
Port 2 are on Pins 9 and 10. Attach
the NIC LED cables here to display
network activity. Refer to the table on
the right for pin defi nitions.
HDD LED
Pin Defi nitions (JF1)
Pin# Defi nition
133.3V Standby
14HD Active
GLAN1/2 LED
Pin Defi nitions (JF1)
Pin# Defi nition
9NIC 2 Activity LED
10NIC 2 Link LED
11NIC 1 Activity LED
12NIC 1 Link LED
A. HDD LED
B. NIC1 Link LED
C. NIC1 Activity LED
D. NIC2 Link LED
E. NIC2 Activity LED
ALWAYS POPULATE DIMMxA FIRST
DIMM_C2
P1 DIMMC2
P1 DIMM1A
P1 DIMMC1
USB0/1
COM1
KB/MOUSE
JPW4
IPMI_LAN
JVRM_SMB
PHY
Ground
X
FP PWRLED
HDD LED
P1 DIMMB2
P1 DIMMB1
P1 DIMMA2
P1 DIMMA1
8-Pin PWR
8-Pin PWR
24-Pin Main PWR
A
NIC1 Link LED
B
JPW3
NIC2 Link LED
JPI2C1
Blue+ (OH/Fan Fail/
PWR FaiL/UID LED)
JPW2
Power Fail LED
Ground
JPW1
FAN1
FAN2
Ground
1920
NMI
X
3.3 V
ID_UID_SW/3/3V Stby
NIC1 Activity LED
C
NIC2 Activity LED
Red+ (Blue LED Cathode)
3.3V
Reset
Reset Butto n
Power Button
PWR
2
1
LED3
UID
UIOP
1
JPL1
LAN
P2 DIMMD2
CTRL
82580
[CPU2_Port3D]
P2 DIMMD1
SXB2: CPU2 PCI-E 3.0 X8
[CPU2_Port3C]
[CPU2_Port1B]
SXB1: CPU2/CPU1 PCI-E 3.0 X8 + x8
[CPU2_Port1A]
[CPU1_Port3A]
JPME2
LED1
BMC
CTRL
1
JI2C1
JTAG OF CPLD
1
JI2C2
JPB1
1
1
JPMB1
JSTBY1
2
3
4
JWD1
1
COM2
JTPM1
XDP_PCH
JBR1
I-SATA5
1
JSD1
I-SATA4
USB6
I-SATA3
I-SATA2
USB7
I-SATA1
I-SATA0
USB4/5
USB2/3
JL1
JBT1
SAS4~7
SAS0~3
[CPU1_Port3B]
XDP_CPU
1
JPG1
Battery
JPME1
1
Intel IOH
BIOS
T-SGPIO2
T-SGPIO1
FANA
FANB
JOH1
JF1
BUZZER
FAN4
LED2
JD1
LAN2
P2 DIMME1
X9DBU
Rev. 1.02
FAN3
P2 DIMME2
VGA
LAN1
P2 DIMMF2
P2 DIMMF1
2-22
Page 47
Chapter 2: Installation
Overheat (OH)/Fan Fail LED
Connect an LED cable to pins 7 and 8
of JF1 to provide advanced warnings
of chassis overheating and fan failure.
Refer to the table on the right for pin
defi nitions.
Power Fail LED
The Power Fail LED connection is
locate d on pins 5 and 6 of JF1. Refer to the table on the right for pin
defi nitions.
OH/Fan Fail/PWR Fail LED
Pin Defi nitions (JF1)
Pin# Defi nition
7Vcc
8OH/Fan Fail LED)
OH/Fan Fail Indicator
Status
State Defi nition
OffNormal
OnOverheat
Flash-
Fan Fail
ing
PWR Fail LED
Pin Defi nitions (JF1)
Pin# Defi nition
53.3V
6PWR Supply Fail
A. OH/Fail/PWR Fail LED (Red)
B. PWR Supply Fail
P1 DIMMC2
P1 DIMM1A
ALWAYS POPULATE DIMMxA FIRST
DIMM_C2
P1 DIMMC1
USB0/1
COM1
KB/MOUSE
JPW4
IPMI_LAN
JVRM_SMB
PHY
Ground
X
Power LED
HDD LED
P1 DIMMB1
P1 DIMMB2
P1 DIMMA1
P1 DIMMA2
JPW3
8-Pin PWR
JPI2C1
JPW2
8-Pin PWR
24-Pin Main PWR
A
NIC1 LED
NIC2 LED
OH/Fan Fail LED
PWR Fail LED
B
Ground
JPW1
FAN1
FAN2
Ground
1920
NMI
X
Vcc
Vcc
Vcc
Vcc
Vcc
Vcc
Reset
Reset Button
Power Button
PWR
2
1
LED3
UID
UIOP
1
JPL1
LAN
P2 DIMMD2
CTRL
82580
[CPU2_Port3D]
P2 DIMMD1
SXB2: CPU2 PCI-E 3.0 X8
[CPU2_Port3C]
[CPU2_Port1B]
SXB1: CPU2/CPU1 PCI-E 3.0 X8 + x8
[CPU2_Port1A]
[CPU1_Port3A]
JPME2
LED1
BMC
CTRL
1
JI2C1
JTAG OF CPLD
1
JI2C2
JPB1
1
1
JPMB1
JSTBY1
2
3
4
JWD1
1
COM2
JTPM1
XDP_PCH
JBR1
I-SATA5
1
JSD1
I-SATA4
USB6
I-SATA3
I-SATA2
USB7
I-SATA1
I-SATA0
USB4/5
USB2/3
JL1
JBT1
SAS4~7
SAS0~3
[CPU1_Port3B]
XDP_CPU
1
JPG1
Battery
JPME1
1
Intel IOH
BIOS
T-SGPIO2
T-SGPIO1
FANA
FANB
JOH1
JF1
BUZZER
FAN4
LED2
JD1
LAN2
P2 DIMME1
X9DBU
Rev. 1.02
FAN3
P2 DIMME2
VGA
LAN1
P2 DIMMF2
P2 DIMMF1
2-23
Page 48
X9DBU-3F/X9DBU-iF Motherboard User’s Manual
Reset Button
The Reset Button connection is located
on pins 3 and 4 of JF1. Attach it to a
hardware reset switch on the computer
case. Refer to the table on the right for
pin defi nitions.
Power Button
The Power Button connection is located
on pins 1 and 2 of JF1. Momentarily
contacting both pins will power on/off
the system. This button can also be confi gured to function as a suspend button
(with a setting in the BIOS - See Chapter
5). To turn off the power when the system
is in suspend mode, press the button for
4 seconds or longer. Refer to the table on
the right for pin defi nitions.
Reset Button
Pin Defi nitions (JF1)
Pin# Defi nition
3Reset
4Ground
Power Button
Pin Defi nitions (JF1)
Pin# Defi nition
1Signal
2Ground
A. Reset Button
B. PWR Button
LED3
UID
UIOP
1
JPL1
LAN2
LAN
P2 DIMME2
P2 DIMME1
P2 DIMMD2
CTRL
82580
[CPU2_Port3D]
P2 DIMMD1
SXB2: CPU2 PCI-E 3.0 X8
[CPU2_Port3C]
[CPU2_Port1B]
SXB1: CPU2/CPU1 PCI-E 3.0 X8 + x8
[CPU2_Port1A]
[CPU1_Port3A]
JPME2
LED1
1
JI2C1
JTAG OF CPLD
1
JI2C2
JPB1
1
1
JPMB1
JSTBY1
2
3
4
JWD1
1
COM2
JTPM1
XDP_PCH
JBR1
I-SATA5
1
JSD1
I-SATA4
USB6
I-SATA3
I-SATA2
USB7
I-SATA1
I-SATA0
USB4/5
USB2/3
JL1
JBT1
SAS4~7
SAS0~3
[CPU1_Port3B]
BMC
CTRL
1
JPG1
Battery
1
Intel IOH
BIOS
T-SGPIO2
T-SGPIO1
FANA
FANB
JOH1
JF1
XDP_CPU
JPME1
X9DBU
Rev. 1.02
BUZZER
FAN4
LED2
FAN3
JD1
LAN1
P2 DIMMF1
P2 DIMMF2
VGA
P1 DIMMC2
P1 DIMM1A
ALWAYS POPULATE DIMMxA FIRST
DIMM_C2
P1 DIMMC1
JPW4
P1 DIMMB2
P1 DIMMB1
FAN2
IPMI_LAN
JVRM_SMB
KB/MOUSE
PHY
P1 DIMMA1
P1 DIMMA2
JPW3
8-Pin PWR
JPI2C1
Blue+ (OH/Fan Fail/
JPW2
PWR FaiL/UID LED)
8-Pin PWR
24-Pin Main PWR
JPW1
FAN1
Ground
FP PWRLED
HDD LED
NIC1 Link LED
NIC2 Link LED
Power Fail LED
X
Ground
Ground
1920
NMI
X
3.3 V
ID_UID_SW/3/3V Stby
NIC1 Activity LED
NIC2 Activity LED
Red+ (Blue LED Cathode)
3.3V
Reset
Reset Bu t ton
Power Button
PWR
2
1
A
B
USB0/1
COM1
2-24
Page 49
Chapter 2: Installation
D
2-7 Connecting Cables
Power Connectors
A 24-pin main power supply
connector(JPW1), two 8-pin CPU PWR
connectors (JPW2/JPW3) and a 4-pin
auxiliary power connector are located on
the motherboard. These power connectors
meet the SSI EPS 12V specifi cation. These
power connectors must also be connected
to your power supply. See the table on the
right for pin defi nitions.
Warning: To avoid damaging your motherboard
and components, please use a power supply
that supports a 24-pin, two 8-pin and one 4-pin
power connectors. Be sure to connect the 24pin and the two 8-pin power connectors to your
power supply for adequate power delivery to
your system. The 4-pin power connector is optional; however, Supermicro recommends that
this connector also be plugged in for optimal
power delivery.
PWR (Req'd)
B. JPW2: 8-pin Processor
PWR (Req'd)
C. JPW3: 8-pin Processor
PWR, or
D. JPW4: 4-pin Auxiliary
PWR required
(Note: all these power
connectors are required)
P1 DIMMB1
P1 DIMMC1
P1 DIMMB2
P1 DIMMA2
P1 DIMMA1
JPME2
1
JPMB1
JSTBY1
2
3
4
COM2
JTPM1
USB6
USB7
USB4/5
USB2/3
JL1
LED1
BMC
1
JTAG OF CPLD
I-SATA4
I-SATA3
I-SATA2
I-SATA1
I-SATA0
SAS0~3
CTRL
1
JPG1
FANB
Intel IOH
T-SGPIO1
T-SGPIO2
FANA
Battery
1
BIOS
JOH1
JF1
XDP_PCH
JBR1
1
JBT1
1
JI2C1
1
JI2C2
JPB1
1
JWD1
I-SATA5
JSD1
SAS4~7
JPME1
[CPU1_Port3B]
XDP_CPU
P1 DIMM1A
ALWAYS POPULATE DIMMxA FIRST
8-Pin PWR
8-Pin PWR
JPW3
C
JPI2C1
JPW2
B
DIMM_C2
X9DBU
Rev. 1.02
BUZZER
FAN4
LED2
FAN3
JD1
24-Pin Main PWR
A
JPW1
FAN1
FAN2
2-25
Page 50
X9DBU-3F/X9DBU-iF Motherboard User’s Manual
D
E
F
G
Fan Headers
This motherboard has six system/CPU
fan headers (Fan 1~Fan 4, Fan A and
FAN B) on the motherboard. All these
4-pin fans headers are backward compatible with the traditional 3-pin fans.
However, fan speed control is available
for 4-pin fans only. The fan speeds are
controlled through IPMI connection.
Chassis Intrusion
A Chassis Intrusion header is located
at JL1 on the motherboard. Attach an
appropriate cable from the chassis to
inform you of a chassis intrusion when
the chassis is opened.
A. Fan 1
B. Fan 2
C. Fan 3
D. Fan 4
E. Fan A
F. Fan B
[CPU2_Port1B]
SXB1: CPU2/CPU1 PCI-E 3.0 X8 + x8
[CPU2_Port1A]
P1 DIMMB1
P1 DIMMC1
P1 DIMMB2
[CPU1_Port3A]
JPME2
1
JSTBY1
2
3
4
COM2
JTPM1
JSD1
USB6
USB7
USB4/5
USB2/3
JL1
1
1
1
I-SATA5
SAS4~7
LED1
BMC
JTAG OF CPLD
I-SATA4
I-SATA3
I-SATA2
I-SATA1
I-SATA0
JBR1
SAS0~3
CTRL
XDP_PCH
1
Intel IOH
T-SGPIO2
T-SGPIO1
JBT1
FANA
FANB
JI2C1
JI2C2
JPB1
JWD1
1
[CPU1_Port3B]
XDP_CPU
1
JPG1
Battery
JPME1
1
BIOS
X9DBU
Rev. 1.02
BUZZER
FAN4
JOH1
LED2
JF1
FAN3
JD1
P1 DIMMC2
P1 DIMM1A
ALWAYS POPULATE DIMMxA FIRST
DIMM_C2
C
P1 DIMMA1
P1 DIMMA2
8-Pin PWR
8-Pin PWR
24-Pin Main PWR
FAN1
FAN2
B
A
G. Chassis Intrusion
JPW3
JPI2C1
JPW2
JPW1
2-26
Page 51
Chapter 2: Installation
Buzzer
The buzzer, located at SP1, can be
used to provide audible indications
for various beep codes. See the table
on the right for pin defi nitions. Refer
to the layout below for the locations of
the Internal Buzzer (SP1).
Overheat/Fan Fail LED
The JOH1 header is used to connect
an LED indi cat or to p rovi de war ni ngs
of chassis overheating and fan failure.
This LED w ill b link w he n a fan f ailu re
occurs. Refer to the tables on right for
pin defi nitions.
Internal Buzzer (SP1)
Pin Defi nition
Pin# Defi nitions
Pin 1Pos. (+)Beep In
Pin 2Neg. (-)Alarm
Speaker
OH/Fan Fail LED
Status
State Message
SolidOverheat
BlinkingFan Fail
JPMB1
A. Buzzer (Internal
Speaker)
B. OH LED
JPW3
JPI2C1
JPW2
LED3
UID
UIOP
1
JPL1
LAN2
LAN
CTRL
82580
[CPU2_Port3D]
P2 DIMMD1
SXB2: CPU2 PCI-E 3.0 X8
[CPU2_Port3C]
[CPU2_Port1B]
SXB1: CPU2/CPU1 PCI-E 3.0 X8 + x8
[CPU2_Port1A]
[CPU1_Port3A]
JPME2
1
JSTBY1
2
3
4
COM2
JTPM1
JSD1
USB6
USB7
USB4/5
USB2/3
JL1
1
1
1
I-SATA5
SAS4~7
LED1
BMC
JTAG OF CPLD
I-SATA4
I-SATA3
I-SATA2
I-SATA1
I-SATA0
JBR1
1
SAS0~3
XDP_PCH
CTRL
JPG1
Intel IOH
T-SGPIO2
T-SGPIO1
JBT1
FANA
FANB
JI2C1
JI2C2
JPB1
JWD1
1
[CPU1_Port3B]
1
Battery
JPME1
1
BIOS
FAN4
JOH1
LED2
JF1
JD1
A
BUZZER
P2 DIMMD2
XDP_CPU
P2 DIMME2
P2 DIMME1
X9DBU
Rev. 1.02
FAN3
LAN1
P2 DIMMF1
VGA
P2 DIMMF2
P1 DIMMC2
P1 DIMM1A
ALWAYS POPULATE DIMMxA FIRST
DIMM_C2
COM1
P1 DIMMC1
JPW4
P1 DIMMB2
IPMI_LAN
JVRM_SMB
P1 DIMMB1
FAN2
USB0/1
P1 DIMMA2
KB/MOUSE
PHY
P1 DIMMA1
8-Pin PWR
8-Pin PWR
24-Pin Main PWR
JPW1
FAN1
B
2-27
Page 52
X9DBU-3F/X9DBU-iF Motherboard User’s Manual
TPM Header/Port 80
A Trusted Platform Module/Port 80
header is located at JTPM1 to provide
TPM support and Port 80 connection.
Use this header to enhance system
performance and data security. See
the table on the right for pin defi ni-
tions.
IPMB
A System Management Bus header for
IPMI 2.0 is located at JIPMB. Connect
the appropriate cable here to use the
IPMB I
supply, fan and system temperatures.
See the table on the right for pin
defi nitions.
Standby Header
A Standby header (JSTBY1) is located
next to the BMC Controller. Refer to
the layout below for the location.
PWR SMB
Pin Defi nitions
Pin# Defi nition
1Clock
2Data
3PWR Fail
4Ground
5+3.3V
JPMB1
2
JPW3
JPI2C1
JPW2
A. JPI
B. Standby
A
LED3
UID
UIOP
1
JPL1
LAN2
LAN
CTRL
82580
[CPU2_Port3D]
P2 DIMMD1
SXB2: CPU2 PCI-E 3.0 X8
[CPU2_Port3C]
[CPU2_Port1B]
SXB1: CPU2/CPU1 PCI-E 3.0 X8 + x8
[CPU2_Port1A]
[CPU1_Port3A]
JPME2
1
JSTBY1
2
3
4
COM2
JTPM1
JSD1
USB6
USB7
USB4/5
USB2/3
JL1
B
1
1
1
I-SATA5
SAS4~7
LED1
BMC
JTAG OF CPLD
I-SATA4
I-SATA3
I-SATA2
I-SATA1
I-SATA0
JBR1
1
SAS0~3
XDP_PCH
CTRL
JPG1
Intel IOH
T-SGPIO2
T-SGPIO1
JBT1
FANA
FANB
JI2C1
JI2C2
JPB1
JWD1
1
[CPU1_Port3B]
1
Battery
JPME1
1
BIOS
FAN4
JOH1
LED2
JF1
JD1
BUZZER
P2 DIMMD2
XDP_CPU
P2 DIMME2
P2 DIMME1
X9DBU
Rev. 1.02
FAN3
LAN1
P2 DIMMF1
VGA
P2 DIMMF2
P1 DIMMC2
P1 DIMM1A
ALWAYS POPULATE DIMMxA FIRST
DIMM_C2
COM1
P1 DIMMC1
JPW4
P1 DIMMB2
IPMI_LAN
JVRM_SMB
P1 DIMMB1
FAN2
USB0/1
P1 DIMMA2
KB/MOUSE
PHY
P1 DIMMA1
8-Pin PWR
8-Pin PWR
24-Pin Main PWR
JPW1
FAN1
C1
2-29
Page 54
X9DBU-3F/X9DBU-iF Motherboard User’s Manual
T-SGPIO 1/2 Headers
Two SGPIO (Serial-Link General
Purpose Input/Output) headers are
located between Fan A and Fan B on
the motherboard. These headers support Serial_Link interface for onboard
SATA connections. See the table on
the right for pin defi nitions.
DOM Power Connector
A power connector for SATA DOM
(Disk On Module) devices is located at
JSD1. Connect an appropriate cable
here to provide power support for your
DOM devices.
On JD1 header, pins 1-3 are used for
power LED indication, and pins 4-7 are
for the speaker. See the tables on the
right for pin defi nitions. Please note that
the speaker connector pins (4-7) are used
with an external speaker. If you wish to
use the onboard speaker, you should close
pins 6-7 with a jumper.
To modify the operation of the motherboard,
jumpers can be used to choose between
optional settings. Jumpers create shorts between two pins to change the function of the
connector. Pin 1 is identifi ed with a square
solder pad on the printed circuit board. See
the motherboard layout pages for jumper
locations.
Note: On two-pin jumpers,
"Closed" means the jumper is on
and "Open" means the jumper is
off t he pins.
GLAN/10G_LAN Enable/Disable
Use JPL1 to enable/disable LAN Port s 1/2.
See the table on the right for jumper settings.
The defau lt sett ing is Ena bled.
JBT1 is used to clear CMOS. Instead of pins, this "jumper" consists of contact pads
to prevent acc i d ent a l c le ar i ng o f C M OS . To clear CM O S, u se a m et al o bj e c t suc h
as a small screwdriver to touch both pads at the same time to short the connection.
Always remove the AC power cord from the system before clearing CMOS.
Note 1: For an ATX power supply, you must completely shut down the
system, remove the AC power cord, and then short JBT1 to clear CMOS.
Note 2: Be sure to remove the onboard CMOS Battery before you short
JBT1 to clear CMOS.
Note 3: Clearing CMOS will also clear all passwords.
Watch Dog Enable/Disable
Watch Dog (JWD1) is a system monitor that
can reb o ot t h e sys te m wh e n a s oft war e ap p licatio n ha ng s. Cl os e Pin s 1-2 to re set t he sy s tem if an appl ic ati on h ang s. Cl ose Pi ns 2- 3 to
generate a n on-maskab le interrupt sig nal for
the application that hangs. See the table on
the ri ght fo r jum per s et ti ngs . Watch D og mu st
also be enabled in the BIOS.
Jumper JPG1 allows the user to enable the onboard VGA connectors. The
default setting is 1-2 to enable the connection. See the table on the right for
jumper settings.
BMC Enable
Jumper JPB1 allows you to enable the
embedded the Nuvoton WPCM450R
BMC (Baseboard Management) Controller to provide IPMI 2.0/KVM support on
the motherboard. See the table on the
right for jumper settings.
Use Jumper JPME1 to select ME Firmware Recovery mode, which will limit
resource allocation for essential system
operation only in order to maintain normal power operation and management.
In the single operation mode, online
upgrade will be available via Recovery
mode. See the table on the right for
jumper settings.
Manufacturer Mode Select
Close Pin 2 and Pin 3 of Jumper JPME2
to bypass SPI fl ash security and force
the system to operate in the Manufacturer mode, allowing the user to fl ash
the system fi rmware from a host server
for system setting modifi cations. See the
table on the right for jumper settings.
The LAN 1/2 ports are located on the IO
Backplane. Each Ethernet LAN port has
two LEDs. The Yellow LED on the right
indicates activity. The Link LED on the left
may be green, amber or off to indicate the
speed. See the tables at right for more
information.
IPMI Dedicated LAN LEDs
In addition to the Gigabit Ethernet ports,
an IPMI Dedicated LAN is also located
above the Backplane USB ports 0/1 on the
motherboard. The amber L ED on the right
indicates activity, while the green LED on
the left indicates the speed of the connection. See the tables at right for more
information.
Rear View (when facing the
rear side of the chassis)
GLAN Activity Indicator (Left)
LED Settings
Color Status Defi nition
YellowFlashingActive
GLAN Link Indicator
LED Settings
LED Color Defi nition
OffNo Connection or 10 Mbps
Green100 Mbps
Amber1 Gbps
Green 1 Gbps (when LAN 1~4 are
An Onboard Power LED is located at
LED2 on the motherboard. When this
LED is on, the system is on. Be sure to
turn off the system and unplug the power
cord before removing or installing components. See the tables at right for more
information.
Rear UID LED
The rear U ID LED is l ocate d at LED3 on
the rear of the motherboard. This LED
is used in conjunction with the rear UID
switch to provide easy identifi cation of a
system that might be in need of service.
Refer to UID Switch on Page 3-15 for
more information.
Onboard PWR LED Indicator (LE1)
LED Settings
LED Color Status
OffSystem Off (PWR cable
not connected)
GreenSystem On
Green:
ACPI S1 State
Flashing
Quickly
Green:
ACPI S3 (STR) State
Flashing
Slowly
UID LED
Status
Color/State OS Status
Blue: OnWindows OSUnit Identifi ed
Blue:
Linux OSUnit Identifi ed
Blinking
JPMB1
B
LED3
UID
UIOP
1
JPL1
LAN2
LAN
CTRL
82580
[CPU2_Port3D]
P2 DIMMD1
SXB2: CPU2 PCI-E 3.0 X8
[CPU2_Port3C]
[CPU2_Port1B]
SXB1: CPU2/CPU1 PCI-E 3.0 X8 + x8
[CPU2_Port1A]
[CPU1_Port3A]
JPME2
1
JSTBY1
2
3
4
COM2
JTPM1
JSD1
USB6
USB7
USB4/5
USB2/3
JL1
1
1
1
I-SATA5
SAS4~7
LED1
BMC
JTAG OF CPLD
I-SATA4
I-SATA3
I-SATA2
I-SATA1
I-SATA0
JBR1
SAS0~3
CTRL
XDP_PCH
1
Intel IOH
T-SGPIO2
T-SGPIO1
JBT1
FANA
FANB
JI2C1
JI2C2
JPB1
JWD1
1
[CPU1_Port3B]
1
JPG1
Battery
JPME1
1
BIOS
A
FAN4
JOH1
LED2
JF1
JD1
BUZZER
P2 DIMMD2
XDP_CPU
P2 DIMME2
P2 DIMME1
X9DBU
Rev. 1.02
FAN3
LAN1
P2 DIMMF1
VGA
P2 DIMMF2
P1 DIMMC2
P1 DIMM1A
ALWAYS POPULATE DIMMxA FIRST
DIMM_C2
COM1
P1 DIMMC1
JPW4
P1 DIMMB2
IPMI_LAN
JVRM_SMB
P1 DIMMB1
FAN2
USB0/1
P1 DIMMA2
KB/MOUSE
PHY
P1 DIMMA1
8-Pin PWR
8-Pin PWR
24-Pin Main PWR
JPW1
FAN1
A. PWR LED
B. Rear UID LED
JPW3
JPI2C1
JPW2
2-38
Page 63
Chapter 2: Installation
BMC Heartbeat LED
A BMC Heartbeat LED is located at
LED1 on the motherboard. When LED1
is blink ing, B MC f unct ion s nor mally. See
the tab le at right f or more i nform ation.
BMC Heartbeat LED
Status
Color/State Defi nition
Green:
BMC: Normal
Blinking
JPMB1
A. BMC Heartbeat
LED3
UID
UIOP
1
JPL1
LAN2
LAN
CTRL
82580
[CPU2_Port3D]
P2 DIMMD1
SXB2: CPU2 PCI-E 3.0 X8
[CPU2_Port3C]
[CPU2_Port1B]
SXB1: CPU2/CPU1 PCI-E 3.0 X8 + x8
[CPU2_Port1A]
[CPU1_Port3A]
A
JPME2
1
JSTBY1
2
3
4
COM2
JTPM1
JSD1
USB6
USB7
USB4/5
USB2/3
JL1
1
1
1
I-SATA5
SAS4~7
LED1
BMC
JTAG OF CPLD
I-SATA4
I-SATA3
I-SATA2
I-SATA1
I-SATA0
JBR1
1
SAS0~3
XDP_PCH
CTRL
JPG1
Intel IOH
T-SGPIO2
T-SGPIO1
JBT1
FANA
FANB
JI2C1
JI2C2
JPB1
JWD1
1
[CPU1_Port3B]
1
Battery
JPME1
1
BIOS
FAN4
JOH1
LED2
JF1
JD1
BUZZER
P2 DIMMD2
XDP_CPU
P2 DIMME2
P2 DIMME1
X9DBU
Rev. 1.02
FAN3
LAN1
P2 DIMMF1
VGA
P2 DIMMF2
P1 DIMMC2
P1 DIMM1A
ALWAYS POPULATE DIMMxA FIRST
DIMM_C2
COM1
P1 DIMMC1
JPW4
P1 DIMMB2
IPMI_LAN
JVRM_SMB
P1 DIMMB1
FAN2
USB0/1
P1 DIMMA2
KB/MOUSE
PHY
P1 DIMMA1
JPW3
8-Pin PWR
JPI2C1
JPW2
8-Pin PWR
24-Pin Main PWR
JPW1
FAN1
LED
2-39
Page 64
X9DBU-3F/X9DBU-iF Motherboard User’s Manual
D
E
F
G
2-10 Serial ATA Connections
Serial ATA Ports
There are six Serial AT A Ports (I-SAT A0~ISATA 5) loc ated on the mothe rboard, includin g four SATA2 por ts and t wo SATA3
ports. These ports provide serial-link
signal connections, which are faster than
the co nnectio ns of Parallel ATA. Se e the
table o n the ri ght for p in defi nitions.
SAS Ports
Eight Serial Attached SCSI Ports (SSATA/SAS 0~3, SAS 4~7) located on
the X9DBU-3F/X9DBU-iF motherboard
to provide serial link connections. These
ports are supported by the Intel C606
Chip. See the table on the right for pin
defi nitions.
Note: For more information on SATA HostRAID confi guration, please refer
to the Intel SATA HostRAID User's Guide posted on our Website @ http://
www.supermicro.com..
A. I-SATA0
B. I-SATA1
C. I-SATA2
D. I-SATA3
E. I-SATA4
UIOP
[CPU2_Port3D]
SXB2: CPU2 PCI-E 3.0 X8
[CPU2_Port3C]
LED3
LAN
CTRL
82580
P2 DIMMD1
UID
1
JPL1
LAN2
P2 DIMME2
P2 DIMME1
P2 DIMMD2
LAN1
P2 DIMMF1
VGA
P2 DIMMF2
COM1
USB0/1
IPMI_LAN
JVRM_SMB
KB/MOUSE
PHY
JPW4
F. I-SATA5
G. S-SAT/SAS 0~3
[CPU2_Port1B]
SXB1: CPU2/CPU1 PCI-E 3.0 X8 + x8
[CPU2_Port1A]
P1 DIMMB1
P1 DIMMC1
P1 DIMMB2
[CPU1_Port3A]
JPME2
1
JSTBY1
2
3
4
COM2
JTPM1
JSD1
USB6
USB7
USB4/5
USB2/3
JL1
1
1
1
I-SATA5
SAS4~7
LED1
BMC
JTAG OF CPLD
I-SATA4
I-SATA3
C
I-SATA2
I-SATA1
I-SATA0
B
A
SAS0~3
CTRL
XDP_PCH
JBR1
1
Intel IOH
T-SGPIO2
T-SGPIO1
JBT1
FANA
FANB
JI2C1
JI2C2
JPB1
JWD1
1
H
[CPU1_Port3B]
XDP_CPU
1
JPG1
Battery
JPME1
1
BIOS
X9DBU
Rev. 1.02
BUZZER
FAN4
JOH1
LED2
JF1
FAN3
JD1
P1 DIMMC2
P1 DIMM1A
ALWAYS POPULATE DIMMxA FIRST
DIMM_C2
P1 DIMMA1
P1 DIMMA2
8-Pin PWR
8-Pin PWR
24-Pin Main PWR
FAN1
FAN2
H. SAS 4~7
JPW3
JPI2C1
JPW2
JPW1
2-40
Page 65
Chapter 3: Troubleshooting
Chapter 3
Troubleshooting
3-1 Troubleshooting Procedures
Use the following procedures to troubleshoot your system. If you have followed all
of the procedures below and still need assistance, refer to the ‘Technical Support
Procedures’ and/or ‘Returning Merchandise for Service’ section(s) in this chapter.
Warning: Always disconnect the power cord before adding, changing or installing any
hardware components.
Before Power On
1. Make sure that there are no short circuits between the motherboard and
chassis.
2. Disconnect all ribbon/wire cables from the motherboard, including keyboard
and mouse cables.
3. Remove all add-on cards.
4. Install CPU 1 fi rst (making sure it is fully seated), and connect the front panel
connectors to the motherboard.
No Power
1. Make sure that there are no short circuits between the motherboard and the
chassis.
2. Make sure that the ATX power connectors are properly connected.
3. Check that the 115V/230V switch on the power supply is properly set, if available.
4. Turn the power switch on and off to test the system, if applicable.
5. The battery on your motherboard may be old. Check to verify that it still supplies ~3VDC. If it does not, replace it with a new one.
3-1
Page 66
X9DBU-3F/X9DBU-iF Motherboard User’s Manual
No Video
1. If the power is on, but you have no video, remove all add-on cards and
cables.
2. Use the speaker to determine if any beep codes exist. Refer to Appendix A
for details on beep codes.
System Boot Failure
If the system does not display POST or does not respond after the power is turned
on, check the following:
1. Check for any error beeps from the motherboard speaker.
• If there is no error beep, try to turn on the system without any DIMM module
installed. If there is still no error beep, try to turn on the system again with only
one processor installed in CPU Socket#1. If there is still no error beep, replace
the motherboard.
• If there are error beeps, clear the CMOS setting by unplugging the power cord
and contacting both pads on the CMOS Clear Jumper (JBT1). (Refer to Section 2-8 in Chapter 2.)
2. Remove all components from the motherboard, especially the DIMM modules. Make sure that the system's power is on, and memory error beeps are
activated.
3. Turn on the system with only one DIMM module installed. If the system boots,
check for bad DIMM modules or slots by following the procedure of memoryerror troubleshooting in this chapter.
Losing the System’s Setup Confi guration
1. Make sure that you are using a high quality power supply. A poor quality
power supply may cause the system to lose the CMOS setup information.
Refer to Section 2-7 for details on recommended power supplies.
2. The battery on your motherboard may be old. Check to verify that it still supplies ~3VDC. If it does not, replace it with a new one.
3. If the steps indicated above do not fi x setup confi guration problems, contact
your vendor for repairs.
3-2
Page 67
Chapter 3: Troubleshooting
Memory Errors
When a No Memory Beep Code is issued by the system, check the following:
1. Make sure that the memory modules are compatible with the system and that
the DIMM modules are properly and fully installed. (For memory compatibility,
refer to the Memory Compatibility Chart posted on our website at http://www.
supermicro.com.)
2. Check if different speeds of DIMMs have been installed. It is strongly recommended that you use the memory modules of the same speed and same type
for all DIMMs in the system.
3. Make sure that you are using the correct type of Registered (RDIMM)/Load
Reduced (LRDIMM) ECC or Unbuffered (UDIMM) ECC/Non-ECC DDR3
DIMM modules recommended by the manufacturer.
4. Check for bad DIMM modules or slots by swapping a single module among
all memory slots and check the results.
5. Make sure that all memory modules are fully seated in their slots. Follow the
instructions given in Section 2-4 in Chapter 2.
6. Please follow the instructions given in the DIMM Population Tables listed in
Section 2-4 to install your memory modules.
When the System Becomes Unstable
A. The system becomes unstable during or after OS system installation
When the system becomes unstable during or after OS system installation, check
the following:
1. CPU/BIOS support: Make sure that your CPU is supported, and you have the
latest BIOS installed in your system.
2. Memory support: Make sure that the memory modules are supported by testing the modules using memtest86 or a similar utility.
Note: Refer to the product page on our website at http://www.supermicro.
com for memory and CPU support and updates.
3. HDD support: Make sure that all hard disk drives (HDDs) work properly. Replace the bad HDDs with good ones.
3-3
Page 68
X9DBU-3F/X9DBU-iF Motherboard User’s Manual
4. System cooling: Check system cooling to make sure that all cooling fans and
system fans work properly. Check Hardware Monitoring settings in the BIOS
to make sure that the CPU and System temperatures are within the normal
range. Also check the front panel Overheat LED, and make sure that the
Overheat LED is not on.
5. Adequate power supply: Make sure that the power supply provides adequate
power to the system. Make sure that all power connectors are connected.
Please refer to our website for more information on minimum power requirement.
6. Proper software support: Make sure that the correct drivers are used.
B. The system becomes unstable before or during OS installation
When the system becomes unstable before or during OS installation, check the
following:
1. Source of installation: Make sure that the devices used for installation are
working properly, including boot devices such as CD/DVD disc, CD/DVDROM.
2. Cable connection: Check to make sure that all cables are connected and
working properly.
3. Using minimum confi guration for troubleshooting: Remove all unnecessary
components (starting with add-on cards fi rst), and use minimum confi gura-
tion (with a CPU and a memory module installed) to identify the problematic
areas. Refer to the steps listed in Section A above for proper troubleshooting
procedures.
4. Identifying bad components by isolating them: If necessary, remove a component in question from the chassis, and test it in isolation to make sure that it
works properly. Replace a bad component with a good one.
5. Check and change one component at a time instead of changing several
items at the same time. This will help isolate and identify the problem.
6. To fi nd out if a component is good, swap the component with a new one to
see if the system will work properly. If so, then the old component is bad.
You can also install the component in question in another system. If the new
system works, the component is good and the old system has problems.
3-4
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3-2 Technical Support Procedures
Before contacting Technical Support, please take the following steps. Also, please
note that as a motherboard manufacturer, Supermicro also sells motherboards
through its channels, so it is best to fi rst check with your distributor or reseller for
troubleshooting services. They should know of any possible problem(s) with the
specifi c system confi guration that was sold to you.
1. Please go through the ‘Troubleshooting Procedures’ and 'Frequently Asked
Question' (FAQ) sections in this chapter or see the FAQs on our website
(
http://www.supermicro.com/) before contacting Technical Support.
2. BIOS upgrades can be downloaded from our website
com
).
3. If you still cannot resolve the problem, include the following information when
contacting Supermicro for technical support:
(http://www.supermicro.
• Motherboard model and PCB revision number
• BIOS release date/version (This can be seen on the initial display when your
system fi rst boots up.)
• System confi guration
4. An example of a Technical Support form is on our website at
supermicro.com).
(http://www.
• Distributors: For immediate assistance, please have your account number ready
when placing a call to our technical support department. We can be reached by
e-mail at support@supermicro.com.
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3-3 Battery Removal and Installation
Battery Removal
To remove the onboard battery, follow the steps below:
1. Power off your system and unplug your power cable.
2. Locate the onboard battery.
3. Using a tool such as a pen or a small screwdriver, push the battery lock outwards to unlock it. Once unlocked, the battery will pop out from the holder.
4. Remove the battery.
Proper Battery Disposal
Warning: Please handle used batteries carefully. Do not damage the battery in any
way; a damaged battery may release hazardous materials into the environment. Do
not discard a used battery in the garbage or a public landfi ll. Please comply with the
regulations set up by your local hazardous waste management agency to dispose of
your used battery properly.
Battery Installation
1. To install an onboard battery, follow the steps 1 & 2 above and continue
below:
2. Identify the battery's polarity. The positive (+) side should be facing up.
3. Insert the battery into the battery holder and push it down until you hear a
click to ensure that the battery is securely locked.
Warning: When replacing a battery, be sure to only replace it with the same type.
OR
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3-4 Frequently Asked Questions
Que sti on: Wh at a re th e var iou s t ype s of m emo r y th at my mo th er boa rd c an
support?
Answer: The motherboard supports Registered (RDIMM)/Load Reduced (LRDIMM)
ECC or Unbuffered (UDIMM) ECC/Non-ECC DDR3 DIMM modules. To enhance
memory performance, do not mix memory modules of different speeds and sizes.
Please follow all memory installation instructions given on Section 2-4 in Chapter 2.
Que stio n: How do I u pda te my BI OS?
It is recommended that you do not upgrade your BIOS if you are not experiencing
any problems with your system. Updated BIOS fi les are located on our website
at
http://www.supermicro.com. Please check our BIOS warning message and the
information on how to update your BIOS on our website. Select your motherboard
model and download the BIOS fi le to your computer. Also, check the current BIOS
revision to make sure that it is newer than your BIOS before downloading. You can
choose from the zip fi le and the .exe fi le. If you choose the zip BIOS fi le, please
unzip the BIOS fi le onto a bootable USB device. Run the batch fi le using the format
AMI.bat fi lename.rom from your bootable USB device to fl ash the BIOS. Then, your
system will automatically reboot.
Warning: Do not shut down or reset the system while updating the BIOS to prevent
possible system boot failure!)
Note: The SPI BIOS chip used on this motherboard cannot be removed.
Send your motherboard back to our RMA Department at Supermicro for
repair. For BIOS Recovery instructions, please refer to the AMI BIOS
Recovery Instructions posted at http://
Question: H ow do I ha ndl e the u sed ba tt er y?
Answer: Please handle used batteries carefully. Do not damage the battery in any
way; a damaged battery may release hazardous materials into the environment. Do
not discard a used battery in the garbage or a public landfi ll. Please comply with the
regulations set up by your local hazardous waste management agency to dispose
of your used battery properly. (Refer to Section 3-3 on Page 3-6.)
www.supermicro.com.
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3-5 Returning Merchandise for Service
A receipt or copy of your invoice marked with the date of purchase is required before
any warranty service will be rendered. You can obtain service by calling your vendor for a Returned Merchandise Authorization (RMA) number. When returning the
motherboard to the manufacturer, the RMA number should be prominently displayed
on the outside of the shipping carton, and the shipping package is mailed prepaid
or hand-carried. Shipping and handling charges will be applied for all orders that
must be mailed when service is complete. For faster service, You can also request
a RMA authorization online (http://www.supermicro.com).
This warranty only covers normal consumer use and does not cover damages incurred in shipping or from failure due to the alternation, misuse, abuse or improper
maintenance of products.
During the warranty period, contact your distributor fi rst for any product problems.
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Chapter 4: AMI BIOS
Chapter 4
BIOS
4-1 Introduction
This chapter describes the AMI BIOS Setup utility for the X9DBU-3F/X9DBU-iF. It
also provides the instructions on how to navigate the AMI BIOS Setup utility screens.
The AMI ROM BIOS is stored in a Flash EEPROM and can be easily updated.
Starting BIOS Setup Utility
To enter the AMI BIOS Setup utility screens, press the <Del> key while the system
is booting up.
Note: In most cases, the <Del> key is used to invoke the AMI BIOS setup
screen. There are a few cases when other keys are used, such as <F3>,
<F4>, etc.
Each main BIOS menu option is described in this manual. The Main BIOS setup
menu screen has two main frames. The left frame displays all the options that can
be confi gured. Grayed-out options cannot be confi gured. Options in blue can be
confi gured by the user. The right frame displays the key legend. Above the key
legend is an area reserved for informational text. When an option is selected in the
left frame, it is highlighted in white. Often, informational text about the option will
display on the right.
Note: The AMI BIOS has default informational messages built in. The
manufacturer retains the option to include, omit, or change any of these
informational messages.
The AMI BIOS Setup utility uses a key-based navigation system called "hot keys."
Most of the AMI BIOS setup utility "hot keys" can be used at any time during setup
navigation. These keys include <F3>, <F4>, <Enter>, <ESC>, arrow keys, etc.
Note 1: In this section, options printed in Bold are default settings.
Note 2: <F3> is used to load optimal default settings. <F4> is used to save
the settings and exit the setup utility.
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How To Change the Confi guration Data
The confi guration data that determines the system parameters may be changed by
entering the AMI BIOS Setup utility. This Setup utility can be accessed by pressing
<Delete> at the appropriate time during system boot.
Note: For AMI UEFI BIOS Recovery, please refer to the UEFI BIOS Recovery User Guide posted @http://www.supermicro.com/support/manuals/.
Starting the Setup Utility
Normally, the only visible Power-On Self-Test (POST) routine is the memory test.
As the memory is being tested, press the <Delete> key to enter the main menu of
the AMI BIOS Setup utility. From the main menu, you can access the other setup
screens. An AMI BIOS identifi cation string is displayed at the left bottom corner of
the screen below the copyright message.
Warning: Do not upgrade the BIOS unless your system has a BIOS-related issue.
Flashing the wrong BIOS can cause irreparable damage to the system. In no event
shall the manufacturer be liable for direct, indirect, special, incidental, or consequential
damage arising from a BIOS update. If you have to update the BIOS, do not shut down
or reset the system while the BIOS is being updated to avoid possible boot failure.
4-2 Main Setup
When you fi rst enter the AMI BIOS Setup utility , you will enter the Main setup screen.
You can always return to the Main setup screen by selecting the Main tab on the
top of the screen. The Main BIOS Setup screen is shown below.
The AMI BIOS main menu displays the following information:
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System Date
This item displays the system date in Day MM/DD/YY format (e.g. Wed 10/12/2012).
System Time
This item displays the system time in HH:MM:SS format (e.g. 15:32:52).
Supermicro X9DBU
Version
This item displays the SMC version of the BIOS ROM used in this system.
Build Date
This item displays the date that the BIOS ROM was built.
Memory Information
Total Memory
This displays the amount of memory that is available in the system.
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4-3 Advanced Setup Confi gurations
Use the arrow keys to select Advanced Setup and press <Enter> to access the
following submenu items.
Boot Features
Quiet Boot
This feature allows the user to select bootup screen display between POST messages and the OEM logo. Select Disabled to display the POST messages. Select
Enabled to display the OEM logo instead of the normal POST messages. The options are Enabled and Disabled.
AddOn ROM Display Mode
Use this item to set the display mode for the Option ROM. Select Keep Current to
use the current AddOn ROM Display setting. Select Force BIOS to use the Option
ROM display mode set by the system BIOS. The options are Force BIOS and
Keep Current.
Bootup Num-Lock
Use this fe ature to set the Powe r-on state for t he Numloc k key. T he options a re
Of f and On.
Wait For 'F1' If Error
Selec t Enabl ed to fo rce t he system t o wait unt il the ' F1' key is pressed i f an er ror
occu rs. Th e optio ns are Di sable d and Enabled.
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Interrupt 19 Capture
Interrupt 19 is the software interrupt that handles the boot disk function. When this
item is set to Enabled, the ROM BIOS of the host adaptors will "capture" Interrupt 19
at bootup and allow the drives that are attached to these host adaptors to function
as bootable disks. If this item is set to Disabled, the ROM BIOS of the host adaptors will not capture Interrupt 19, and the drives attached to these adaptors will not
function as bootable devices. The options are Enabled and Disabled.
Re-try Boot
If this item is enabled, the BIOS will automatically attempt to boot from a specifi ed
boot devic e again a fter i ts initi al failu re to boot . The defau lt sett ing is Disabled.
Power Confi guration
Watch Dog Function
If enabled, the Watch Dog timer will allow the system to automatically reboot when
a non- re cove rab le er ro r oc cur s th at last s for m ore t han fi ve minutes. The options
are Enabl ed and Disabled.
Power Button Function
If this feature is set to Instant Off, the system will power off immediately as soon
as the user presses the power button. If this feature is set to 4 Seconds Override,
the system will power off when the user presses the power button for 4 seconds or
longer. The options are Instant Off and 4 Seconds Override.
Restore on AC Power Loss
Use this feature to set the power state after a power outage. Select Stay Off for the
system power to remain off after a power loss. Select Power On for the system
power to be turned on after a power loss. Select Last State to allow the system
to resume its last state before a power loss. The options are Power On, Stay Off,
and Last State.
CPU Confi guration
This submenu displays the information of the CPU as detected by the BIOS. It also
allows the user to confi gure CPU settings.
Socket 1 CPU Information/Socket 2 CPU Information
This submenu displays the following information regarding the CPUs installed
in Socket 1/ Socket 2.
• Type of CPU
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• CPU Signature
• Microcode Patch
• CPU Stepping
• Maximum CPU Speed
• Minimum CPU Speed
• Processor Cores
• Intel HT (Hyper-Threading) Technology
• Intel VT-x Technology
• Intel SMX Technology
• L1 Data Cache
• L1 Code Cache
• L2 Cache
• L3 Cache
CPU Speed
This item displays the speed of the CPU installed in Socket 1/Socket 2.
64-bit
This item indicates if the CPU installed in Socket 1 or Socket 2 supports 64-bit
technology.
Clock Spread Spectrum
Select Enable to enable Clock Spectrum support, which will allow the BIOS to monitor and attempt to reduce the level of Electromagnetic Interference caused by the
components whenever needed. The options are Disabled and Enabled.
RTID (Record Types IDs)
This feature displays the total number of Record Type IDs for local and remote
pools. The options are Optimal and Alternate.
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Hyper-threading
Select Enabled to support Intel Hyper-threading Technology to enhance CPU performance. The options are Enabled and Disabled.
Active Processor Cores
Set to Enabled to use a processor's second core and above. (Please refer to Intel's
website for more information.) The options are All, 1, and 2.
Limit CPUID Maximum
This feature allows the user to set the maximum CPU ID value. Enable this function
to boot the legacy operating systems that cannot support processors with extended
CPUID functions. The options are Enabled and Disabled (for the Windows OS).
Execute-Disable Bit (Available if supported by the OS & the CPU)
Select Enabled to enable the Execute Disable Bit which will allow the processor
to designate areas in the system memory where an application code can execute
and where it cannot, thus preventing a worm or a virus from fl ooding illegal codes
to overwhelm the processor or damage the system during an attack. The default is
Enabled. (Refer to Intel and Microsoft Web sites for more information.)
Intel® AES-NI
Select Enable to use the Intel Advanced Encryption Standard (AES) New Instructions (NI) to ensure data security. The options are Enabled and Disabled.
MLC Streamer Prefetcher (Available when supported by the CPU)
If set to Enabled, the MLC (mid-level cache) streamer prefetcher will prefetch
streams of data and instructions from the main memory to the L2 cache to improve
CPU performance. The options are Disabled and Enabled.
MLC Spatial Prefetcher (Available when supported by the CPU)
If this feature is set to Disabled, The CPU prefetches the cache line for 64 bytes.
If this feature is set to Enabled the CPU fetches both cache lines for 128 bytes as
comprised. The options are Disabled and Enabled.
DCU Streamer Prefetcher (Available when supported by the CPU)
Select Enabled to support Data Cache Unit (DCU) prefetch of L1 data to speed
up data accessing and processing in the DCU to enhance CPU performance. The
options are Disabled and Enabled.
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DCU IP Prefetcher
Select Enabled for DCU (Data Cache Unit) IP Prefetcher support, which will prefetch
IP addresses to improve network connectivity and system performance. The options
are Enabled and Disabled.
Intel® Virtualization Technology (Available when supported by the CPU)
Select Enabled to support Intel Virtualization Technology, which will allow one
platf orm to r un mult iple op erati ng system s and app licat ions i n indep endent p ar titions, creating multiple "virtual" systems in one physical computer. The options
are Enabled and Disabled.
Note: If there is any change to this setting, you will need to power off and
restar t the system for the change to take ef fect. Please refer to Intel’s
website for d etaile d infor matio n.)
CPU Power Management Confi guration
This submenu allows the user to confi gure the following CPU Power Management
settings.
Power Technology
Select Energy Effi ciency to support power-saving mode. Select Custom to custom-
ize system power settings. Select Disabled to disable power-saving settings. The
options are Disabled, Energy Effi cient, and Custom. If the option is set to Custom,
the following items will display:
EIST (Available when Power Technology is set to Custom)
EIST (Enhanced Intel SpeedStep Technology) allows the system to automatically
adjust processor voltage and core frequency to reduce power consumption and
heat dissipation. The options are Disabled (GV3 Disabled), and Enabled (GV3 Enabled). (Note: GV3 is Intel Speedstep support used on older platforms. Please
refer to Intel’s website for detailed information.)
C1E Support (Available when Power Technology is set to Custom)
Select Enabled to enable Enhanced C1 Power State to boost system performance. The options are Enabled and Disabled.
CPU C3 Report (Available when Power Technology is set to Custom)
Select Enabled to allow the BIOS to report the CPU C3 State (ACPI C2) to the
operating system. During the CPU C3 State, the CPU clock generator is turned
off. The options are Enabled and Disabled.
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CPU C6 Report (Available when Power Technology is set to Custom)
Select Enabled to allow the BIOS to report the CPU C6 State (ACPI C3) to the
operating system. During the CPU C6 State, the power to all cache is turned
off. The options are Enabled and Disabled.
CPU C7 Report (Available when Power Technology is set to Custom)
Select Enabled to allow the BIOS to report the CPU C7 State (ACPI C3) to the
operating system. CPU C7 State is a processor-specifi c low C-State. The options
are Enabled and Disabled.
Package C-State limit (Available when Power Technology is set to
Custom)
This feature allows the user to set the limit on the C-State package register. The
options are C0, C2, C6, and No Limit.
Energy Performance Bias
Use this feature to select an appropriate fan setting to achieve maximum system
performance (with maximum cooling) or maximum energy effi ciency with maximum
power saving). The fan speeds are controlled by the fi rmware management via IPMI
2.0. The options are Performance, Balanced Performance, Balanced Energy, and
Energy Effi cient.
Factory Long Duration Power Limit
This item displays the power limit (in watts) set by the manufacturer during which
long duration power is maintained.
Long Duration Power Limit
This item displays the power limit (in watts) set by the user during which long duration power is maintained. The default setting is 0.
Factory Long Duration Maintained
This item displays the period of time (in seconds) set by the manufacturer during
which long duration power is maintained.
Long Duration Maintained
This item displays the period of time (in seconds) during which long duration power
is maintained. The default setting is 0.
Recommended Short Duration Power Limit
This item displays the short duration power settings (in watts) recommended by
the manufacturer.
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Short Duration Power Limit
During Turbo Mode, the system may exceed the processors default power setting
and exceed the Short Duration Power limit. By increasing this value, the processor
can provide better performance for short duration. This item displays the time period
during which short duration power is maintained. The default setting is 0.
Chipset Confi guration
North Bridge
This feature allows the user to confi gure the settings for the Intel North Bridge.
Integrated IO Confi guration
Intel VT-d
Select Enabled to enable Intel Virtualization Technology support for Direct I/O
VT-d
by reporting the I/O device assignments to the VMM (Virtual Machine
Monitor) through the DMAR ACPI Tables. This feature offers fully-protected I/O
resource sharing across Intel platforms, providing greater reliability, security
and availability in networking and data-sharing. The options are Enabled and
Disabled.
®
Intel
I/OAT
Select Enabled to enable Intel I/OAT (I/O Acceleration Technology), which signifi cantly reduces CPU overhead by leveraging CPU architectural improvements
and freeing the system resource for other tasks. The options are Disabled and
Enabled.
DCA Support
When set to Enabled, this feature uses Intel's DCA (Direct Cache Access)
Technology to improve data transfer effi ciency. The default is Enabled and can
not be changed.
IIO 1 PCIe Port Bifurcation Control
This submenu confi gures the following IO PCIe Port Bifurcation Control settings
for IIO 1 PCIe ports to determine how the available PCI-Express lanes to be
distributed between the PCI-Exp. Root Ports.
IOU3-PCIe Port
This feature allows the user to set the PCI-Exp bus speed between IOU3 and
PCI-e port. The options are x4x4x4x4, x4x4x8, x8x4x4, and x8x8.
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Port 3A Link Speed
Select GEN1 to enable PCI-Exp Generation 1 support for Port 3A. Select GEN2
to enable PCI-Exp Generation 2 support for Port 3A. Select GEN3 to enable
PCI-Exp Generation 3 support for Port 3A. The options are GEN1, GEN2, and
GEN3.
Port 3C Link Speed
Select GEN1 to enable PCI-Exp Generation 1 support for Port 3C. Select GEN2
to enable PCI-Exp Generation 2 support for Port 3C. Select GEN3 to enable
PCI-Exp Generation 3 support for Port 3C. The options are GEN1, GEN2, and
GEN3.
IIO 2 PCIe Port Bifurcation Control
This submenu confi gures the following IO PCIe Port Bifurcation Control settings
for IIO 2 PCIe ports to determine how the available PCI-Express lanes to be
distributed between the PCI-Exp. Root Ports.
IOU1-PCIe Port
This feature allows the user to set the PCI-Exp bus speed between IOU1 and
PCI-e port. The options are x4x4, and x8.
Port 1A Link Speed
Select GEN1 to enable PCI-Exp Generation 1 support for Port 1A. Select GEN2
to enable PCI-Exp Generation 2 support for Port 1A. Select GEN3 to enable
PCI-Exp Generation 3 support for Port 1A. The options are GEN1, GEN2, and
GEN3.
IOU3-PCIe Port
This feature allows the user to set the PCI-Exp bus speed between IOU3 and
PCI-e port. The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, and x16.
Port 3A Link Speed
Select GEN1 to enable PCI-Exp Generation 1 support for Port 3A. Select GEN2
to enable PCI-Exp Generation 2 support for Port 3A. Select GEN3 to enable
PCI-Exp Generation 3 support for Port 3A. The options are GEN1, GEN2, and
GEN3.
Port 3C Link Speed
Select GEN1 to enable PCI-Exp Generation 1 support for Port 3C. Select GEN2
to enable PCI-Exp Generation 2 support for Port 3C. Select GEN3 to enable
PCI-Exp Generation 3 support for Port 3C. The options are GEN1, GEN2, and
GEN3.
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SXB1, SXB2 Slot CTLE Value
Use this feature to select the PCIE GEN3 CTLE value. The default value is Auto.
QPI Confi guration
Current QPI Link Speed
This item displays the current status of the QPI Link.
Current QPI Link Frequency
This item displays the frequency of the QPI Link.
Isoc
Select Enabled to enable Isochronous support to meet QoS (Quality of Service)
requirements. This feature is especially important for virtualization technology.
The options are Enabled and Disabled.
QPI (Quick Path Interconnect) Link Speed Mode
Use this feature to select data transfer speed for QPI Link connections. The
options are Fast and Slow.
QPI Link Frequency Select
Use this feature to select the desired QPI frequency. The options are Auto, 6.4
GT/s, 7.2 GT/s, and 8.0 GT/s.
DIMM Confi guration
This section displays the following DIMM information.
Current Memory Mode
This item displays the current memory mode.
Current Memory Speed
This item displays the current memory speed.
Mirroring
This item displays if memory mirroring is supported by the motherboard. Memory
mirroring creates a duplicate copy of the data stored in the memory to enhance
data security.
Sparing
This item displays if memory sparing is supported by the motherboard. Memory
sparing enhances system performance.
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DIMM Information
This section displays the following DIMM information.
Memory Mode
When Independent is selected, all DIMMs are available to the operating system.
When Mirroring is selected, the motherboard maintains two identical copies of all
data in memory for data backup. When Lockstep is selected, the motherboard
uses two areas of memory to run the same set of operations in parallel. The
options are Independent, Mirroring, and Lockstep.
DRAM RAPL Mode
RAPL (Running Average Power Limit) provides mechanisms to enforce power
consumption limits on supported processors The options are DRAM RAPL
MODE0 , DRAM RAPL MODE1, and Disabled.
DDR Speed
Use this feature to force a DDR3 memory module to run at a frequency other
than what is specifi ed by the manufacturer. The options are Auto, Force DDR3-
800, Force DDR3-1066, Force DDR3-1333, Force DDR3-1600 and Force SPD.
Channel Interleaving
This feature selects from the different channel interleaving methods. The options
are Auto, 1 Way, 2 Way, 3, Way, and 4 Way.
Rank Interleaving
This feature allows the user to select a rank memory interleaving method. The
options are Auto, 1 Way, 2 Way, 4, Way, and 8 Way.
Patrol Scrub
Patrol Scrubbing is a process that allows the CPU to correct correctable memory
errors detected on a memory module and send the correction to the requestor
(the original source). When this item is set to Enabled, the IO hub will read and
write back one cache line every 16K cycles, if there is no delay caused by internal
processing. By using this method, roughly 64 GB of memory behind the IO hub
will be scrubbed every day. The options are Enabled and Disabled.
Demand Scrub
Demand Scrubbing is a process that allows the CPU to correct correctable
memory errors found on a memory module. When the CPU or I/O issues a
demand-read command, and the read data from memory turns out to be a
correctable error, the error is corrected and sent to the requestor (the original
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source). Memory is updated as well. Select Enabled to use Demand Scrubbing
for ECC memory correction. The options are Enabled and Disabled.
Data Scrambling
Select Enabled to enable data scrambling to ensure data security and integrity.
The options are Disabled and Enabled.
Device Tagging
Select Enabled to support device tagging. The options are Disabled and Enabled.
Thermal Throttling
Throttling improves reliability and reduces power consumption in the processor via automatic voltage control during processor idle states. The options are
Disabled and CLTT (Closed Loop Thermal Throttling).
South Bridge Confi guration
This feature allows the user to confi gure the settings for the Intel PCH chip.
PCH Information
This feature displays the following PCH information.
Name: This item displays the name of the PCH chip.
Stepping: This item displays the PCH stepping.
USB Devices: This item displays the USB devices detected by the BIOS.
All USB Devices
This feature enables all USB ports/devices. The options are Disabled and Enabled.
(If set to Enabled, EHCI Controller 1 and Controller 2 will appear.)
EHCI Controller 1/EHCI Controller 2 (Available when All USB Devices is set
to Enabled)
Select Enabled to enable EHCI (Enhanced Host Controller Interface) Controller 1
or Controller 2. The options are Disabled and Enabled.
Legacy USB Support (Available when USB Functions is not Disabled)
Select Enabled to support legacy USB devices. Select Auto to disable legacy support if USB devices are not present. Select Disabled to have USB devices available
for EFI (Extensive Firmware Interface) applications only. The settings are Disabled,
Enabled and Auto.
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Chapter 4: AMI BIOS
Port 60/64 Emulation
Select Enabled to enable I/O port 60h/64h emulation support for the legacy USB
keyboard so that it can be fully supported by the operating systems that does not
recognize a USB device. The options are Disabled and Enabled.
EHCI Hand-Off
This item is for operating systems that do not support Enhanced Host Controller
Interface (EHCI) hand-off. When enabled, EHCI ownership change will be claimed
by the EHCI driver. The options are Disabled and Enabled.
SATA Confi guration
When this submenu is selected, the AMI BIOS automatically detects the presence
of IDE or SATA devices and displays the following items.
SATA Port0~SATA Port5: The AMI BIOS displays the status of each SATA port
as detected by the BIOS.
SATA Mode
Use this feature to confi gure SATA mode for a selected SATA port. The options are
Disabled, IDE Mode, AHCI Mode and RAID Mode. The following are displayed
depending on your selection:
IDE Mode
The following items are displayed when IDE Mode is selected:
Serial-ATA (SATA) Controller 0 and Serial-ATA (SATA) Controller 1
Use this feature to activate or deactivate the SATA controller, and set the
compatibility mode. The options are Disabled, Enhanced, and Compatible.
The default for SATA Controller 0 is Compatible. The default of SATA Controller 1 is Enhanced.
AHCI Mode
The following items are displayed when the AHCI Mode is selected.
Aggressive Link Power Management
When Enabled, the SATA AHCI controller manages the power usage of
the SATA link. The controller will put the link in a low power mode during
extended periods of I/O inactivity, and will return the link to an active state
when I/O activity resumes. The options are Enabled and Disabled.
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Port 0~5 Hot Plug
Select Enabled to enable hot-plug support for a particular port, which will
allow the user to change a hardware component or device without shutting
down the system. The options are Enabled and Disabled.
Staggered Spin Up
Select Enabled to enable Staggered Spin-up support to prevent excessive
power consumption caused by multiple HDDs spinning-up simultaneously.
The options are Enabled and Disabled.
RAID Mode
The following items are displayed when RAID Mode is selected:
Port 0~5 Hot Plug
Select Enabled to enable hot-plug support for the particular port. The options
are Enabled and Disabled.
SCU (Storage Control Unit) Confi guration
Storage Controller Unit
Select Enabled to enable PCH SCU storage devices. The options are Disabled
and Enabled.
SCU RAID Option ROM
Select Enabled to support the onboard SCU Option ROM to boot up the system via
a storage device. The options are Disabled and Enabled.
SCU Port 0~SCU Port 7: The AMI BIOS will automatically detect the onboard SCU
devices and display the status of each SCU device as detected.
Note: iF boards only support SATA drives. 3F boards support both SATA
and SAS drives
PCIe/PCI/PnP Confi guration
PCI ROM Priority
Use this feature to select the Option ROM to boot the system when there are multiple Option ROMs available in the system. The options are EFI Compatible ROM
and Legacy ROM.
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PCI Latency Timer
Use this feature to set the latency Timer of each PCI device installed on a PCI bus.
Select 64 to set the PCI latency to 64 PCI clock cycles. The options are 32, 64, 96,
128, 160, 192, 224 and 248.
Above 4G Decoding (Available if the system supports 64-bit PCI decoding)
Select Enabled to decode a PCI device that supports 64-bit in the space above 4G
Address. The options are Enabled and Disabled.
PERR# Generation
Select Enabled to allow a PCI device to generate a PERR number for a PCI Bus
Signal Error Event. The options are Enabled and Disabled.
SERR# Generation
Select Enabled to allow a PCI device to generate an SERR number for a PCI Bus
Signal Error Event. The options are Enabled and Disabled.
Maximum Payload
Select Auto to allow the system BIOS to automatically set the maximum payload
value for a PCI-E device to enhance system performance. The options are Auto,
128 Bytes and 256 Bytes.
Maximum Read Request
Select Auto to allow the system BIOS to automatically set the maximum Read
Request size for a PCI-E device to enhance system performance. The options are
This feature allows the user to set the Active State Power Management (ASPM)
level for a PCI-E device. Select Force L0s to force all PCI-E links to operate at L0s
state. Select Auto to allow the system BIOS to automatically set the ASPM level for
the system. Select Disabled to disable ASPM support. The options are Disabled,
Force L0s, and Auto.
Warning: Enabling ASPM support may cause some PCI-E devices to fail!
Onboard LAN Option ROM Select
Selec t iSC S I to use t he i SC SI O pti on RO M to b oot t he c om pute r usi ng a networ k
device. S ele ct PXE (Preboot Execution Environment) t o use an PXE O pti on RO M
to boot the c omp uter usin g a netw ork dev ice. Th e optio ns are iSC SI and PXE.
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Load Onboard LAN1 Option ROM/Load Onboard LAN2 Option ROM
Select Enabled to enable the onboard LAN1 Option ROM~LAN2 Option ROM. This
is to boot the computer using a network device. The default set ting f or L AN1 Op tion ROM is Enabled, and the default s et tin g for LA N2 O pti on RO M is Disabled.
VGA Priority
This feature allows the user to select the graphics adapter to be used as the primary
boot device. The options are Onboard, and Offboard.
Super IO Confi guration
Super IO Chip: This item displays the Super IO chip used in the motherboard.
Serial Port 1 Confi guration
Serial Port
Select Enabled to enable a serial port specifi ed by the user. The options are En-
abled and Disabled.
Device Settings
This item displays the settings of Serial Port 1.
Change Settings
This option specifi es the base I/O port address and the Interrupt Request address of
Serial Port 1. Select Disabled to prevent the serial port from accessing any system
resources. When this option is set to Disabled, the serial port becomes unavailable.
The options are Auto, IO=3F8h; IRQ=4; IO=3F8h; IRQ=3, 4, 5, 6, 7, 9, 10, 11, 12;
IO=2F8h; IRQ=3, 4, 5, 6, 7, 9, 10, 11, 12; IO=3E8h; IRQ=3, 4, 5, 6, 7, 9, 10, 11,
12; and IO=2E8h; IRQ=3, 4, 5, 6, 7, 9, 10, 11, 12;
Device Mode
Use this feature to select the desired mode for a serial port specifi ed. The options
are Normal and High Speed.
Serial Port 2 Confi guration
Serial Port
Select Enabled to enable a serial port specifi ed by the user. The options are En-
abled and Disabled.
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Device Settings
This item displays the settings of Serial Port 2.
Change Settings
This option specifi es the base I/O port address and the Interrupt Request address of
Serial Port 1. Select Disabled to prevent the serial port from accessing any system
resources. When this option is set to Disabled, the serial port becomes unavailable.
The options are Auto, IO=3F8h; IRQ=4; IO=3F8h; IRQ=3, 4, 5, 6, 7, 9, 10, 11, 12;
IO=2F8h; IRQ=3, 4, 5, 6, 7, 9, 10, 11, 12; IO=3E8h; IRQ=3, 4, 5, 6, 7, 9, 10, 11,
12; and IO=2E8h; IRQ=3, 4, 5, 6, 7, 9, 10, 11, 12;
Device Mode
Use this feature to select the desired mode for a serial port specifi ed. The options
are Normal and High Speed.
Serial Port 2 Attribute
Use this feature to select the attribute for serial port 2. The options are SOL (Serial
On LAN), and COM.
Serial Port Console Redirection
COM 1/COM 2
These two submenus allow the user to confi gure the following Console Redirection
settings for a COM Port specifi ed by the user.
Console Redirection
Select Enabled to use a COM Port selected by the user for Console Redirection.
The options are Enabled and Disabled. The default setting for COM1 is Disabled,
and for COM2 is Enabled.
Console Redirection Settings
This feature allows the user to specify how the host computer will exchange data
with the client computer, which is the remote computer used by the user.
Terminal Type
This feature allows the user to select the target terminal emulation type for Console Redirection. Select VT100 to use the ASCII Character set. Select VT100+ to
add color and function key support. Select ANSI to use the Extended ASCII Character Set. Select VT-UTF8 to use UTF8 encoding to map Unicode characters
into one or more bytes. The options are ANSI, VT100, VT100+, and VT-UTF8.
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Bits Per second
Use this feature to set the transmission speed for a serial port used in Console
Redirection. Make sure that the same speed is used in the host computer and the
client computer. A lower transmission speed may be required for long and busy
lines. The options are 9600, 19200, 38400, 57600 and 115200 (bits per second).
Data Bits
Use this feature to set the data transmission size for Console Redirection. The
options are 7 Bits and 8 Bits.
Parity
A parity bit can be sent along with regular data bits to detect data transmission
errors. Select Even if the parity bit is set to 0, and the number of 1's in data bits
is even. Select Odd if the parity bit is set to 0, and the number of 1's in data bits
is odd. Select None if you do not want to send a parity bit with your data bits
in transmission. Select Mark to add a mark as a parity bit to be sent along with
the data bits. Select Space to add a Space as a parity bit to be sent with your
data bits. The options are None, Even, Odd, Mark and Space.
Stop Bits
A stop bit indicates the end of a serial data packet. Select 1 Stop Bit for standard
serial data communication. Select 2 Stop Bits if slower devices are used. The
options are 1 and 2.
Flow Control
This feature allows the user to set the fl ow control for Console Redirection to
prevent data loss caused by buffer overfl ow. Send a "Stop" signal to stop send-
ing data when the receiving buffer is full. Send a "Start" signal to start sending
data when the receiving buffer is empty. The options are None and Hardware
RTS/CTS.
VT-UTF8 Combo Key Support
Select Enabled to enable VT-UTF8 Combination Key support for ANSI/VT100
terminals. The options are Enabled and Disabled.
Recorder Mode
Select Enabled to capture the data displayed on a terminal and send it as text
messages to a remote server. The options are Disabled and Enabled.
Resolution 100x31
Select Enabled for extended-terminal resolution support. The options are Disabled and Enabled.
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Chapter 4: AMI BIOS
Legacy OS Redirection Resolution
Use this feature to select the number of rows and columns used in Console
Redirection for legacy OS support. The options are 80x24 and 80x25.
Putty KeyPad
This feature selects Function Keys and KeyPad settings for Putty, which is a
terminal emulator designed for the Windows OS. The options are VT100, LINUX,
XTERMR6, SC0, ESCN, and VT400.
Serial Port for Out-of-Band Management/Windows Emergency Management
Services (EMS)
The submenu allows the user to confi gure Console Redirection settings to support
Out-of-Band Serial Port management.
Console Redirection (for EMS)
Select Enabled to use a COM Port selected by the user for Console Redirection.
The options are Enabled and Disabled.
Console Redirection Settings (for EMS)
This feature allows the user to specify how the host computer will exchange
data with the client computer, which is the remote computer used by the user.
Out-of-Band Management Port
The feature selects a serial port used by the Microsoft Windows Emergency
Management Services (EMS) to communicate with a remote server. The options
are COM1 and COM2.
Terminal Type
This feature allows the user to select the target terminal emulation type for Console Redirection. Select VT100 to use the ASCII character set. Select VT100+
to add color and function key support. Select ANSI to use the extended ASCII
character set. Select VT-UTF8 to use UTF8 encoding to map Unicode characters
into one or more bytes. The options are ANSI, VT100, VT100+, and VT-UTF8.
Bits Per Second
This item sets the transmission speed for a serial port used in Console Redirection. Make sure that the same speed is used in the host computer and the client
computer. A lower transmission speed may be required for long and busy lines.
The options are 9600, 19200, 57600, and 115200 (bits per second).
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Flow Control
This feature allows the user to set the fl ow control for Console Redirection to
prevent data loss caused by buffer overfl ow. Send a "Stop" signal to stop send-
ing data when the receiving buffer is full. Send a "Start" signal to start sending
data when the receiving buffer is empty. The options are None, Hardware RTS/
CTS, and Software Xon/Xoff.
Data Bits, Parity, Stop Bits
The status of these features is displayed.
ACPI Settings
Use this feature to confi gure Advanced Confi guration and Power Interface (ACPI)
power management settings for your system.
ACPI Sleep State
Use this feature to select the ACPI State when the system is in sleep mode. Select
S1 (CPU Stop Clock) to erase all CPU caches and stop executing instructions.
Power to the CPU(s) and RAM is maintained, but RAM is refreshed. Select Suspend Disabled to use power-reduced mode. Power will only be supplied to limited
components (such as RAMs) to maintain the most critical functions of the system.
The options are S1 (CPU Stop Clock), and Suspend Disabled.
NUMA (NON-Uniform Memory Access)
This feature enables the Non-Uniform Memory Access ACPI support. The options
are Enabled and Disabled.
High Precision Event Timer
Select Enabled to activate the High Precision Event Timer (HPET) that produces
periodic interrupts at a much higher frequency than a Real-time Clock (RTC) does
in synchronizing multimedia streams, providing smooth playback, reducing the dependency on other timestamp calculation devices, such as an x86 RDTSC Instruction embedded in the CPU. The High Performance Event Timer is used to replace
the 8254 Programmable Interval Timer. The options are Enabled and Disabled.
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Chapter 4: AMI BIOS
Trusted Computing (A vailable when a TPM device is detected
by the BIOS)
Confi guration
TPM Support
Select Enabled on this item and enable the TPM jumper on the motherboard to
enable TPM support to improve data integrity and network security. The options
are Enabled and Disabled.
TPM State
Select Enabled to enable TPM security settings to improve data integrity and
network security. The options are Disabled and Enabled.
Pending Operation
Use this item to schedule an operation for the security device. The options are
None, Enable Take Ownership, Disable Take Ownership, and TPM Clear.
Note: During restart, the computer will reboot in order to execute the pend-
ing operation and change the state of the security device.
Current Status Information: This item displays the information regarding the
current TPM status.
TPM Enable Status
This item displays the status of TPM Support to indicate if TPM is currently
enabled or disabled.
TPM Active Status
This item displays the status of TPM Support to indicate if TPM is currently active or deactivated.
TPM Owner Status
This item displays the status of TPM Ownership.
Intel TXT (LT-SX) Confi guration
Intel TXT (LT-SX) Hardware Support
This feature indicates if the following hardware components support the Intel
Trusted Execution Technology.
This feature displays the following TXT confi guration setting.
TXT (L T -SX) Support: This item indicates if the Intel TXT support is enabled
or disabled. The default setting is Disabled.
Intel TXT (LT-SX) Dependencies
This feature displays the features that need to be enabled for the Intel Trusted
Execution Technology to work properly in the system.
VT-d Support: Intel Virtualization Technology with Direct I/O support
VT Support: Intel Virtualization Technology support
TPM Support: Trusted Platform support
TPM State: Trusted Platform state
Intel TXT (LT-SX) Dependencies
This feature displays the features that need to be enabled for the Intel Trusted
Execution Technology to work properly in the system.
VT-d Support: Intel Virtualization Technology with Direct I/O support
VT Support: Intel Virtualization Technology support
TPM Support: Trusted Platform support
TPM State: Trusted Platform state
ME Subsystem
This feature displays the following ME Subsystem Confi guration settings.
• ME BIOS Interface Version
• ME Version
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4-4 Event Logs
Use this feature to confi gure Event Log settings.
Chapter 4: AMI BIOS
Change SMBIOS Event Log Settings
This feature allows the user to confi gure SMBIOS Event settings.
Enabling/Disabling Options
SMBIOS Event Log
Select Enabled to enable SMBIOS (System Management BIOS) Event Logging
during system boot. The options are Enabled and Disabled.
Runtime Error Logging Support
Select Enabled to support Runtime Error Logging. The options are Enabled and
Disabled.
Memory Correctable Error Threshold
This feature allows the user to enter the threshold value for correctable memory
errors. The default setting is 10.
PCI Error Logging Support
Select Enabled to support error event logging for PCI slots. The options are Enabled
and Disabled.
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Erasing Settings
Erase Event Log
Select Enabled to erase the SMBIOS (System Management BIOS) Event Log, which
is completed before an event logging is initialized upon system reboot. The options
are No, Yes, next reset, and Yes, every reset.
When Log is Full
Select Erase Immediately to immediately erase SMBIOS error event logs that exceed the limit when the SMBIOS event log is full. Select Do Nothing for the system
to do nothing when the SMBIOS event log is full. The options are Do Nothing and
Erase Immediately.
SMBIOS Event Log Standard Settings
Log System Boot Event
Select Enabled to log system boot events. The options are Disabled and Enabled.
MECI (Multiple Event Count Increment)
Enter the increment value for the multiple event counter. Enter a number between
1 to 255. The default setting is 1.
METW (Multiple Event Count Time Window)
This item allows the user to decide how long (in minutes) should the multiple event
counter wait before generating a new event log. Enter a number between 0 to 99.
The default setting is 60.
View SMBIOS Event Log
This item allows the user to view the event in the SMBIOS event log. Select this
item and press <Enter> to view the status of an event in the log.
Date/Time/Error Code/Severity
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4-5 IPMI
Use this feature to confi gure Intelligent Platform Management Interface (IPMI)
settings.
IPMI Firmware Revision
This item indicates the IPMI fi rmware revision used in your system.
IPMI Status
This item indicates the status of the IPMI fi rmware installed in your system.
System Event Log
Enabling/Disabling Options
SEL Components
Select Enabled for all system event logging at bootup. The options are Enabled
and Disabled.
Erasing Settings
Erase SEL
Select Yes, On next reset to erase all system event logs upon next system reboot.
Select Yes, On every reset to erase all system event logs upon each system reboot.
Select No to keep all system event logs after each system reboot. The options are
No, Yes, On next reset, and Yes, On every reset.
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When SEL is Full
This feature allows the user to decide what the BIOS should do when the system
event log is full. Select Erase Immediately to erase all events in the log when the
system event log is full. The options are Do Nothing and Erase Immediately.
Custom EFI Logging Options
Log EFI Status Codes
Select Enabled to log EFI (Extensible Firmware Interface) Status Codes, Error
Codes or Progress Codes. The options are Enabled and Disabled.
Note: After making changes on a setting, be sure to reboot the system for
the changes to take effect.
BMC Network Confi guration
LAN Channel 1: This feature allows the user to confi gure the settings for LAN1 Port.
Update IPMI LAN Confi guration
This feature allows the BIOS to implement any IP/MAC address changes at the next
system boot. If the option is set to Yes, any changes made to the settings below will
take effect when the system is rebooted. The options are No and Yes.
Confi guration Address Source
This feature allows the user to select the source of the IP address for this computer .
If Static is selected, you will need to know the IP address of this computer and enter
it to the system manually in the fi eld. If DHCP is selected, the BIOS will search for
a DHCP (Dynamic Host Confi guration Protocol) server in the network that is at-
tached to and request the next available IP address for this computer. The options
are DHCP and Static. The following items are assigned IP addresses automatically
if DHCP is selected, or can be confi gured manually if Static is selected.
Station IP Address
This item displays the Station IP address for this computer . This should be in decimal
and in dotted quad form (i.e., 192.168.10.253).
Subnet Mask
This item displays the sub-network that this computer belongs to. The value of each
three-digit number separated by dots should not exceed 255.
Station MAC Address
This item displays the Station MAC address for this computer. Mac addresses are
6 two-digit hexadecimal numbers.
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