Supero X9DBL-i, X9DBL-3, X9DBL-iF, X9DBL-3F User Manual

X9DBL-i

X9DBL-3

X9DBL-iF

X9DBL-3F

USER’S MANUAL

Revision 1.0c

X9DBL-i/3/iF/3F Motherboard User’s Manual

The information in this User’s Manual has been carefully reviewed and is believed to be accurate.
The vendor assumes no responsibility for any inaccuracies that may be contained in this document,
and makes no commitment to update or to keep current the information in this manual, or to notify
any person or organization of the updates. Please Note: For the most up-to-date version of this

manual, please see our Website at www.supermicro.com.

Super Micro Computer, Inc. ("Supermicro") reserves the right to make changes to the product
described in this manual at any time and without notice. This product, including software and docu­mentation, is the property of Supermicro and/or its licensors, and is supplied only under a license.
Any use or reproduction of this product is not allowed, except as expressly permitted by the terms
of said license.

IN NO EVENT WILL SUPER MICRO COMPUTER, INC. BE LIABLE FOR DIRECT, INDIRECT,
SPECIAL, INCIDENTAL, SPECULATIVE OR CONSEQUENTIAL DAMAGES ARISING FROM THE
USE OR INABILITY TO USE THIS PRODUCT OR DOCUMENTATION, EVEN IF ADVISED OF
THE POSSIBILITY OF SUCH DAMAGES. IN PARTICULAR, SUPER MICRO COMPUTER, INC.
SHALL NOT HAVE LIABILITY FOR ANY HARDWARE, SOFTWARE, OR DATA STORED OR USED
WITH THE PRODUCT, INCLUDING THE COSTS OF REPAIRING, REPLACING, INTEGRATING,
INSTALLING OR RECOVERING SUCH HARDWARE, SOFTWARE, OR DATA.

Any disputes arising between the manufacturer and the customer shall be governed by the laws of
Santa Clara County in the State of California, USA. The State of California, County of Santa Clara
shall be the exclusive venue for the resolution of any such disputes. Supermicro's total liability for
all claims will not exceed the price paid for the hardware product.

FCC Statement: This equipment has been tested and found to comply with the limits for a Class
A digital device pursuant to Part 15 of the FCC Rules. These limits are designed to provide
reasonable protection against harmful interference when the equipment is operated in a commercial
environment. This equipment generates, uses, and can radiate radio frequency energy and, if not
installed and used in accordance with the manufacturer’s instruction manual, may cause harmful
interference with radio communications. Operation of this equipment in a residential area is likely
to cause harmful interference, in which case you will be required to correct the interference at your
own expense.

California Best Management Practices Regulations for Perchlorate Materials: This Perchlorate
warning applies only to products containing CR (Manganese Dioxide) Lithium coin cells. “Perchlorate
Material-special handling may apply. See www.dtsc.ca.gov/hazardouswaste/perchlorate”.

WARNING: Handling of lead solder materials used in this
product may expose you to lead, a chemical known to
the State of California to cause birth defects and other
reproductive harm.

Manual Revision 1.0c
Release Date: May 23, 2013
Unless you request and receive written permission from Super Micro Computer, Inc., you may not

copy any part of this document.
Information in this document is subject to change without notice. Other products and companies

referred to herein are trademarks or registered trademarks of their respective companies or mark
holders.

Copyright © 2013 by Super Micro Computer, Inc.
All rights reserved.

Printed in the United States of America

Preface

This manual is written for system integrators, PC technicians and
knowledgeable PC users. It provides information for the installation and use of the
X9DBL-i/3/iF/3F motherboard.

About This Motherboard

The Super X9DBL-i/3/iF/3F motherboard supports dual Intel E5-2400 Series
(Socket B2) processors and Intel QPI (QuickPath Interface) Technology (V.1.1),
providing point-to-point connections with transfer speeds of up to 8.0 TG/s. With
the C606/C602 chipset built in, the X9DBL-i/3/iF/3F motherboard supports Intel®
Manageability Engine (ME), Rapid Storage Technology, Digital Media Interface
(DMI), PCI-E Gen. 3.0, and DDR3 memory of up to 1600 MHz. These features
greatly enhance system performance. This motherboard is ideal for high-end server
platforms. Please refer to our Website at http://www.supermicro.com for processor
and memory support.

Preface

Manual Organization

Chapter 1 describes the features, specifi cations and performance of the mother-

board. It also provides detailed information on the Intel C606/C602 chipset.
Chapter 2 provides hardware installation instructions. Read this chapter when in-

stalling the processor, memory modules, and other hardware components into the
system. If you encounter any problems, see Chapter 3, which describes trouble­shooting procedures for video, memory, and system setup stored in the CMOS.

Chapter 4 includes an introduction to the BIOS, and provides detailed information
on running the CMOS Setup utility.

Appendix A provides BIOS Error Beep Codes.
Appendix B lists software installation instructions.

iii

X9DBL-i/3/iF/3F Motherboard User’s Manual

Conventions Used in the Manual

Pay special attention to the following symbols for proper system installation and to
prevent damage to the system or injury to yourself:

Warning: Important information is given to ensure proper system installation or to avoid
damaging system components

Note: Additional information is given to differentiate between various
models or to provide information for correct system setup.

iv

Contacting Supermicro

Headquarters

Address: Super Micro Computer, Inc.

980 Rock Ave.

San Jose, CA 95131 U.S.A.
Tel: [phone]
Fax: [phone]
Email: [e-mail] (General Information)

[e-mail] (Technical Support)

Preface

Web Site:

Europe

Address: Super Micro Computer B.V.

Tel: [phone]
Fax: [phone]
Email: [e-mail] (General Information)

Asia-Pacifi c

Address: Super Micro Computer, Inc.

www.supermicro.com

Het Sterrenbeeld 28, 5215 ML

's-Hertogenbosch, The Netherlands

[e-mail] (Technical Support)

[e-mail] (Customer Support)

4F, No. 232-1, Liancheng Rd

Chung-Ho Dist., New Taipei City 235

Taiwan
Tel: [phone]
Fax: [phone]
Web Site:
Technical Support:
Email: [e-mail]
Tel: [phone]

www.supermicro.com.tw

v

X9DBL-i/3/iF/3F Motherboard User’s Manual

Table of Contents

Preface
Chapter 1 Overview

1-1 Overview ......................................................................................................... 1-1

1-2 Processor and Chipset Overview...................................................................1-11

1-3 Special Features ...........................................................................................1-12

1-4 PC Health Monitoring .................................................................................... 1-12

1-5 ACPI Features ...............................................................................................1-13

1-6 Power Supply ................................................................................................1-13

1-7 Super I/O ....................................................................................................... 1-14

1-8

1-9 Introduction to the IPMI Controller (For X9DBL-iF/3F only) ......................... 1-15

Advanced Power Management ..................................................................... 1-14

Intel® Intelligent Power Node Manager (IPNM) ............................................1-14

Management Engine (ME) ............................................................................1-15

WPCM450R DDR2 Memory Interface ..........................................................1-15

WPCM450R PCI System Interface ...............................................................1-15

Other Features Supported by the WPCM BMC Controller ...........................1-15

Chapter 2 Installation

2-1 Standardized Warning Statements ................................................................. 2-1

2-2 Static-Sensitive Devices ..................................................................................2-4

2-3 Processor and Heatsink Installation................................................................2-5

Installing an LGA 1356 Processor .................................................................. 2-5

Installing a Passive CPU Heatsink ................................................................. 2-7

Removing the Heatsink ................................................................................... 2-8

2-4 Installing and Removing the Memory Modules ...............................................2-9

Installing & Removing DIMMs .........................................................................2-9

Removing Memory Modules ........................................................................... 2-9

2-5 Motherboard Installation ................................................................................2-13

Tools Needed ................................................................................................ 2-13

Location of Mounting Holes .......................................................................... 2-13

Installing the Motherboard ............................................................................2-14

2-6 Control Panel Connectors and I/O Ports ...................................................... 2-15

Back Panel Connectors and I/O Ports .......................................................... 2-15

Back Panel I/O Port Locations and Defi nitions ...........................................2-15

ATX PS/2 Keyboard and Mouse Ports .....................................................2-16

Universal Serial Bus (USB) ...................................................................... 2-16

Serial Ports ............................................................................................... 2-17

vi

Table of Contents

Video Connection ..................................................................................... 2-17

Ethernet Ports .......................................................................................... 2-18

Unit Identifi er Switch ................................................................................2-19

Front Control Panel ....................................................................................... 2-20

Front Control Panel Pin Defi nitions............................................................... 2-21

NMI Button ............................................................................................... 2-21

Power LED .............................................................................................. 2-21

HDD LED ..................................................................................................2-22

NIC1/NIC2 LED Indicators ....................................................................... 2-22

Overheat (OH)/Fan Fail/PWR Fail/UID LED ............................................ 2-23

Power Fail LED ........................................................................................2-23

Reset Button ........................................................................................... 2-24

Power Button ...........................................................................................2-24

2-7 Connecting Cables ........................................................................................ 2-25

Power Connectors ...................................................................................2-25

Fan Headers .............................................................................................2-26

Chassis Intrusion .....................................................................................2-26

Internal Buzzer ......................................................................................... 2-27

Overheat/Fan Fail LED ............................................................................2-27

TPM Header/Port 80 ................................................................................ 2-28

IPMB .........................................................................................................2-28

Power SMB (I

2

C) Connector .................................................................... 2-29

Standby Header ....................................................................................... 2-29

T-SGPIO 1/2 & SCU-SGPIO 1/2 Headers ............................................... 2-30

Power LED/Speaker ................................................................................. 2-31

2-8 Jumper Settings ............................................................................................2-32

Explanation of Jumpers ................................................................................2-32

GLAN Enable/Disable ..............................................................................2-32

CMOS Clear ............................................................................................. 2-33

Watch Dog Enable/Disable ...................................................................... 2-33

VGA Enable ..............................................................................................2-34

BMC Enable ............................................................................................ 2-34

Management Engine (ME) Recovery ...................................................... 2-35

Manufacturer Mode Select ....................................................................... 2-35

2-9 Onboard LED Indicators ...............................................................................2-37

GLAN LEDs .............................................................................................. 2-37

IPMI Dedicated LAN LEDs .......................................................................2-37

Onboard Power LED ............................................................................... 2-38

Rear UID LED ......................................................................................... 2-38

vii

X9DBL-i/3/iF/3F Motherboard User’s Manual

BMC Heartbeat LED ................................................................................2-39

2-10 Serial ATA Connections ................................................................................. 2-40

Serial ATA Ports........................................................................................ 2-40

SCU-SATA/SAS Ports .............................................................................. 2-40

Chapter 3 Troubleshooting

3-1 Troubleshooting Procedures ........................................................................... 3-1

3-2 Technical Support Procedures ........................................................................3-5

3-3 Battery Removal and Installation .................................................................... 3-6

3-4 Frequently Asked Questions ........................................................................... 3-7

3-5 Returning Merchandise for Service.................................................................3-8

Chapter 4 BIOS

4-1 Introduction ......................................................................................................4-1

4-2 Main Setup ...................................................................................................... 4-2

4-3 Advanced Setup Confi gurations...................................................................... 4-4

4-4 Event Logs ....................................................................................................4 -26

4-5 IPMI ............................................................................................................... 4-28

4-6 Boot ...............................................................................................................4- 30

4-7 Secur it y ......................................................................................................... 4- 31

4-8 Save & Exit ...................................................................................................4 -32

Appendix A BIOS Error Beep Codes

A-1 BIOS Error Beep Codes ................................................................................. A-1

Appendix B Software Installation Instructions

B-1 Installing Software Programs ..........................................................................B-1

B-2 Confi guring SuperDoctor® III .......................................................................... B-2

viii

Chapter 1: Overview

Chapter 1

Overview

1-1 Overview

Checklist

Congratulations on purchasing your computer motherboard from an acknowledged
leader in the industry. Supermicro boards are designed with the utmost attention to
detail to provide you with the highest standards in quality and performance.

Please check that the following items have all been included with your motherboard.
If anything listed here is damaged or missing, contact your retailer.

The following items are included in the retail box.

• One (1) Supermicro Mainboard

• Eight (8) Serial ATA cables (CBL-0044Lx8) (X9DBL-3F/3 Only)

• Six (6) Serial ATA cables (CBL-0044Lx6) (X9DBL-iF/i Only)

• One (1) I/O Shield (MCP-260-00027-0N)

• One (1) Quick Reference Guide (MNL-1307-QRG)

Note: For your system to work properly, please follow the links below to
download all necessary drivers/utilities and the user's manual for your
motherboard.

SMCI product manuals: http://www.supermicro.com/support/manuals/
Product Drivers and utilities: ftp://ftp.supermicro.com/
If you have any questions, please contact our support team at support@supermicro.

com.

1-1

X9DBL-i/3/iF/3F Motherboard User’s Manual

Motherboard Image

Note: All graphics shown in this manual were based upon the latest PCB

revision available at the time of publishing of the manual. The motherboard
you've received may or may not look exactly the same as the graphics
shown in this manual.

1-2

Motherboard Layout

Chapter 1: Overview

TPM/Port80

USB4/5

USB2/3

7

JBR1

T-SGPIO1

COM2

SLOT1 PCI 33MHZ

USB6

S-SATA/
SAS0
S-SATA/
SAS1
S-SATA/
SAS2
S-SATA/
SAS3

S-SATA/
SAS4

JPME2

S-SATA/
SAS5

1

S-SATA/SAS6

S-SATA/
SAS7

I-SATA5
I-SATA4

I-SATA3
I-SATA2
I-SATA1

I-SATA0

JPME1

JL1

T-SGPIO2

LED1

JIPMB1

CPU1 SLOT2 PCI-E 3.0 X4(IN X8)

JSTBY1

JI2C1JI2C2

J9

JBT1

BIOS

JWD1

SCU-

SGPIO1

SCU-

SGPIO2

BMC CTRL

CPLD

FANA

JPG1

CPU2 SLOT3 PCI-E 3.0 X8

JPB1

Intel PCH

JWP1

JOH1

JF1(FP Control)

LAN CTRL

CPU2 SLOT4 PCI-E 3.0 X8

CPU2 SLOT5 PCI-E 3.0 X8

Battery

LED2

JD1

LAN CTRL

CPU1 SLOT6 PCI-E 3.0 X16

BT1

SP1

JUIDB1

P2-DIMM1D

LED3

P2-DIMM1E

FAN5

P2-DIMM1F

VGA COM1

FAN4

LAN2

JPL1
JPL2

LAN1

X9DBL-i/3 (F)

Rev. 1.01

JVRM_I2C2

P1-DIMM1C

USB0/1

IPMI_LAN

JVRM_I2C1

P1-DIMM1B

KB/MOUSE

JCPUVRD_SMB

JPW2

JPW1

P1-DIMM1A

CPU2

CPU1

JPW3

FAN3

FAN2

JPI2C1

FAN1

Note : For the latest CPU/Memory updates, please refer to our website at
http://www.supermicro.com/products/motherboard/ for details.

1-3

X9DBL-i/3/iF/3F Motherboard User’s Manual

X9DBL-i/3/iF/3F Quick Reference

7

JBR1

T-SGPIO1

COM2

TPM/Port80

SLOT1 PCI 33MHZ

USB6

USB4/5

USB2/3

JPME2

1

JPME1

T-SGPIO2

S-SATA/
SAS0
S-SATA/
SAS1

S-SATA/

SAS2
S-SATA/
SAS3

S-SATA/
SAS4

S-SATA/

SAS5
S-SATA/SAS6

S-SATA/
SAS7

I-SATA5
I-SATA4

I-SATA3
I-SATA2
I-SATA1

I-SATA0

JL1

SGPIO1

SCU-

SGPIO2

LED1

JIPMB1

JSTBY1

JI2C1JI2C2

J9

JBT1

BIOS

SCU-

BMC CTRL

JPG1

CPU1 SLOT2 PCI-E 3.0 X4(IN X8)

CPU2 SLOT3 PCI-E 3.0 X8

JPB1

CPLD

Intel PCH

JWP1

JOH1

FANA

JWD1

JF1(FP Control)

LAN CTRL

CPU2 SLOT4 PCI-E 3.0 X8

CPU2 SLOT5 PCI-E 3.0 X8

Battery

LED2

JD1

LAN CTRL

BT1

SP1

LED3

JUIDB1

P2-DIMM1E

P2-DIMM1D

CPU1 SLOT6 PCI-E 3.0 X16

FAN5

P2-DIMM1F

VGA COM1

FAN4

LAN2

JPL1
JPL2

LAN1

X9DBL-i/3 (F)

Rev. 1.01

JVRM_I2C2

USB0/1

IPMI_LAN

P1-DIMM1C

JVRM_I2C1

JCPUVRD_SMB

P1-DIMM1B

KB/MOUSE

JPW2

JPW1

P1-DIMM1A

CPU2

CPU1

JPW3

FAN3

JPI2C1

FAN2

FAN1

Notes:

• See Chapter 2 for detailed information on jumpers, I/O ports and JF1 front

panel connections.

• " " indicates the location of "Pin 1".

• Jumpers/LED Indicators/connectors/headers not indicated are for testing only.

Components not documented are reserved for internal testing only.

• Use only the correct type of onboard CMOS battery as specifi ed by the

manufacturer. Do not install the onboard battery upside down to avoid possible
explosion.

1-4

Chapter 1: Overview

X9DBL-i/3/iF/3F Jumpers

Jumper

JBT1

2

JI

C1/JI2C2 SMB to PCI-E Slots Pins Open (Normal)

Description Default Setting

Clear CMOS See Chapter 2

JPB1 BMC Enable Pins 1-2 (Enabled)
JPG1 VGA Enable Pins 1-2 (Enabled)
JPL1/JPL2 LAN1/LAN2 Enable Pins 1-2 (Enabled)
JPME1 Management Engine

Pins 1-2 (Normal)

(ME) Recovery Mode

JPME2 Management Engine

Pins 1-2 (Normal)

(ME) Manufacture Mode

JWD1 Watch Dog Pins 1-2 (Reset)

X9DBL-i/3/iF/3F Connectors

Connectors Description

Battery Onboard Battery (See Chpt. 4 for Used Battery Disposal)
COM1/COM2 Backplane COM Port1/Front Accessible COM2 Header
FAN1~5, FANA CPU/System Fan Headers
I-SATA 0~5 Intel PCH SATA Connectors 0~5
JD1 Power LED/Speaker (PWR LED Pins 1~3, Speaker: Pins 4~7)
JF1 Front Panel Control Header
JIPMB1 4-pin External BMC I

2

C Header (for an IPMI Card)
JL1 Chassis Intrusion
JOH1 Overheat/Fan Fail LED

2

JPI

C1 Power Supply SMBbus I2C Header
JPW1 ATX 24-Pin Power Connector (See Warning on Pg. 1-6.)
JPW2~JPW3 12V 8-Pin Power Connectors (See Warning on Pg. 1-6.)
JSTBY1 Standby Power Header
JTPM1 TPM (Trusted Platform Module)/Port 80
KB/Mouse Keyboard/Mouse
LAN1/2 G-bit Ethernet Ports 1/2
(IPMI) LAN IPMI_Dedicated LAN
S-SATA/SAS 0~3,

S-SATA/SAS Connections 0~3, SAS 4~7 (X9DBL-3F/3 Only)

SAS 4~7
S-SATA/SAS 0~3 S-SATA Connections 0~3 from Intel SCU (X9DBL-iF/i Only)
SP1 Internal Buzzer/Speaker
Slot1 PCI 33 MHz Slot

1-5

X9DBL-i/3/iF/3F Motherboard User’s Manual

(CPU2) Slot3/4/5 PCI-Exp. 3.0 x8 Slots
(CPU 1) Slot2 PCI-Exp. 3.0 x4 in x8 Slot
(CPU 1) Slot6 PCI-Exp. 3.0 x16 Slot
SCU-SGPIO 1 Serial Link General Purpose I/O Connector 1 for SCU-SATA/

SAS 0~3 (from SCU)

SCU-SGPIO 2
(For X9DBL-3/3F)

Serial Link General Purpose I/O Connector 2 for SCU-SATA/

SAS 4~7 (from SCU)
T-SGPIO 1 Serial Link General Purpose I/O Connector 1 for I-SATA 0~5
T-SGPIO 2 Serial Link General Purpose I/O Connector 1 for I-SATA 4/5
TPM/Port 80 TPM (Trusted Platform Module)/Port 80 Connection (JTPM)
USB 0/1 Back Panel USB 0/1
USB 2/3, 4/5 Front Panel Accessible USB 2/3, 4/5 Connections
USB 6 Front Panel Type A USB 6 Port
UID Switch UID (Unit Identifi er) Switch
VGA Backpanel VGA Port 1/Front Panel VGA Port2

X9DBL-i/3/iF/3F LED Indicators

LED Description State Status

LED1 BMC Heartbeat LED Green: Blinking Normal
LED2 Sta ndby PWR L ED Green: On SB Power On

LED3 UID LE D

Blue: On (Windows OS)
Blinking (Linux)

Unit Identifi ed

Warning: To avoid damaging the power supply or the motherboard, please use a power
supply that contains a 24-pin, and two 8-pin power Power connectors. Be sure to con­nect these power supply connectors to all power connector on the motherboard. Failure
in doing so will void the manufacturer warranty on your power supply and motherboard.

1-6

Motherboard Features

Chapter 1: Overview

CPU

Memory

Chipset

• Dual Intel

to 95W); each processor supports two full-width Intel
QuickPath Interconnect (QPI) links of up to 8.0 GT/s per
QPI link with data transfer rate of up to 16 GB/s band­width per port

®

E5-2400 Series (Socket B2) processors (up

• Integrated memory controller supports six 240-pin DDR3

Registered/Load Reduced ECC or Unbuffered ECC/Non­ECC 800/1066/1333/1600 MHz memory modules with
support of up to 192 GB in three-channel memory bus

Note: For the latest CPU/memory updates, please
refer to our Website at http://www.supermicro.com/
products/motherboard.

DIMM sizes

• R_DIMM/LR_

DIMM

1GB, 2GB, 4GB, 8GB,16GB and
32GB @ 1.35V/1.5V

• Virtualization: VT-x, VT-d, and VT-c

• Intel® C606/C602 PCH

Graphics
Network

I/O
Devices

• Matrox G200eW Video Controller

• Dual Intel 82574L Gigabit Ethernet Controllers for LAN1/

LAN2 ports.

SATA/SAS Connections

• SATA Ports Six (6) SATA ports total: Two (2)

SATA 3.0 ports & four (4) SATA

2.0 ports

• RAID RAID 0, 1, 5, 10

• SAS Connectors Eight (8) SAS Connectors SCU-

SATA/SAS 0~3, 4~7 for X9DBL­3F/3,

Four (4) SATA 2.0 Connec­tions: SCU-SATA/SAS 0~3 for
X9DBL-iF/i

• RAID RAID 0, 1, 10

Super I/O

• Nuvoton W83527 SI/O

• Nuvoton WPCM450R Base-board Controller (BMC) sup-

ports IPMI_LAN 2.0 (for X9DBL-3F/iF only)

1-7

X9DBL-i/3/iF/3F Motherboard User’s Manual

IPMI 2.0 (For X9DBL-iF/3F)

• Nuvoton WPCM450R Base-board Controller (BMC)

supports IPMI_LAN 2.0

Serial (COM) Port

• Two (2) Fast UART 16550 connections: 9-pin RS-

232 port

Keyboard/Mouse

• Backplane USB Keyboard/Mouse

VGA

• Backplane VGA Port 1

Expansion Slots

• One (1) PCI-E 3.0 x16 Slot (Slot6)

• Three (3) PCI-E 3.0 x8 Slots (Slots3~5)

• One (1) PCI-E 3.0 x4 in x8 Slot (Slot2)

Peripheral
Devices

BIOS

Power
Confi g.

PC Health
Monitoring

• One PCI 33 MHz (Slot1)

USB Devices

• Two (2) USB 2.0 ports on the rear I/O panel (USB 0/1)

• Two (2) Front Panel USB headers for 4 connections

(USB 2/3, USB 4/5)

• One Type A USB connectors for front-access (USB 6)

• 64 Mb AMI BIOS

®

Flash EEPROM

• APM 1.2, DMI 2.3, PCI 2.3, ACPI 1.0/2.0, USB Key-

board, Plug & Play (PnP) and SMBIOS 2.3

• ACPI/ACPM Power Management

• Main switch override mechanism

• Keyboard Wake-up from Soft-Off

• Power-on mode for AC power recovery

CPU Monitoring

• Onboard voltage monitors for 1.5V, 1.8V, +3.3V, 3.3V

Standby, +5V, +5V Standby and Battery Voltage.

• CPU Thermal Design Power (TDP): support up to

95W (See Note 1 next page)

• CPU 6-Phase switching voltage regulator

• CPU/System overheat LED and control

• CPU Thermal Trip support

• Thermal Monitor 2 (TM2) support

1-8

Chapter 1: Overview

• Intel® Intelligent Power Node Management (IPNM)

• Intel® Management Engine (ME)

Fan Control

• Fan status monitoring with fi rmware 4-pin (Pulse

Width Modulation) fan speed control

• Low noise fan speed control

LED Indicators

• System/CPU Overheat LED

• Suspend-state LED

• UID/Remote UID LED

System
Management

• PECI (Platform Environment Confi guration Interface)

2.0 support

• System resource alert via SuperDoctor® III

• Dual Cooling Zones

• Thermal Monitor 2 (TM2) support

• PECI (Platform-Environment Confi guration Interface)

support

• SuperoDoctor® III, Watch Dog, NMI

• Chassis Intrusion Header and Detection

Dimensions

Note 1: CPU Maximum Thermal Design Power (TDP) is subject to chassis

and heatsink cooling restrictions. For proper thermal management, please
check the chassis and heatsink specifi cations for proper CPU TDP sizing.

Note 2: For IPMI Confi guration Instructions, please refer to the Embedded
IPMI Confi guration User's Guide available @ http://www.supermicro.com/
support/manuals/.

• 12.00" (L) x 10.00" (W) (304.80 mm x 254.00 mm)

1-9

X9DBL-i/3/iF/3F Motherboard User’s Manual

RJ45

RJ45

IPMI LAN

SLOT 2

PCI-E X4

GLAN 1
82574L

GLAN 2
82574L

VGA

#C-1

#B-1

#A-1

DDR3

PCI-E X4 Gen3

in X8 slot

SLOT 6

PCI-E X16

BMC
VGA

SLOT 1

#1 #3 #1 DMI

800/1066/1333/1600

PCI-E X16 Gen3

PCI-E X1 Gen2

PCI-E X1 Gen2

PCI-E X1

PCI-32MHz

PCI-33MHz

CPU 1

DDR3

PCI-E x4

PEG0

PCI-E

#1
PCI-E

#1

PCI

SPI

BIOS

P0

DMI
4GB/s

DMI

PCH

SSB-D/A

LPC

SIO
W83527

QPI

P1

8G

#3 #3 #1

TPM
Header

CPU 2

DDR3

PCI-E X8 Gen3

PCI-E X8 Gen3

6.0 Gb/S

3.0 Gb/S for Ports 2~5
(SCU-SATA/SAS)

3.0 Gb/S
for Ports 0/1

USB 2.0

USB

#0~#6

#D-1

PCI-E X8 Gen3

PCI-E X8

SLOT 3

PCI-E X8

SAS

#0~#7

#0~#5

2 Rear
4 Front
1 Type-A

#F-1

#E-1

DDR3

800/1066/1333/1600

SLOT 5

PCI-E X8

SLOT 4

SATA

SCU-

SATA/SAS

COM1
External

COM2
Header

System Block Diagram

Note: This is a general block diagram and may not exactly represent

the features on your motherboard. See the Motherboard Features pages
for the actual specifi cations of each motherboard. This block diagram is
intended for your reference only.

1-10

Chapter 1: Overview

1-2 Processor and Chipset Overview

Built upo n the functio nality and th e capabilitie s of Intel E5-240 0 Series (Soc ket
B2) processor and C606/C602 chipset, the X9DBL-i/3/iF/3F motherboard provides
the performance and feature sets required for dual_processor-based high-end
system platforms.

With support of Intel QuickPath interconnect (QPI) Technology, the X9DBL-i/3/
iF/3F motherboard offers point-to-point serial interconnect interface with a transfer
speed o f up to 8.0 GT/s, prov idin g super b system p er for manc e.

The C606/C602 chipset provides extensive IO support, including the following
functions and capabilities:

• PCI-Express Rev. 2.0 support

• PCI-Express Gen. 3 uplink supported by some SKUs

• ACPI Power Management Logic Support Rev. 3.0b or Rev. 4.0

• USB host i nter face b ackpl ane and f ront ac ces s suppor t

• Intel Rapid S torag e Technol ogy supp or ted

• Intel Vir tua lizati on Technology fo r Direc ted I/O (Inte l VT-d) sup por ted

• Intel Trusted Executi on Technology sup por ted

• Serial Peripheral Interface (SPI) Supported

• Digit al Medi a Inter face ( DMI) supp or ted

• Advanced Host Controller Interface (AHCI) supported

1-11

X9DBL-i/3/iF/3F Motherboard User’s Manual

1-3 Special Features

Recovery from AC Power Loss

The Basic I/O System (BIOS) provides a power setting that determines how the
system will respond when AC power is lost and then restored to the system. You
can choose for the system to remain powered off (in which case you must press
the power switch to turn it back on), or for it to automatically return to the power-on
state. See the Advanced BIOS Setup section for this setting. The default setting
is Last State.

1-4 PC Health Monitoring

This section describes the features of PC health monitoring of the motherboard.
This motherboard has an onboard System_Hardware_Monitor chip that supports
PC health monitoring. An onboard voltage monitor will scan the following onboard
voltages continuously: 1.5V, 1.8V, +3.3V, 3.3V Standby, +5V, +5V Standby and
Battery Voltage. Once a voltage becomes unstable, a warning is given, or an error
message is sent to the screen. The user can adjust the voltage thresholds to defi ne
the sensitivity of the voltage monitor.

Fan Status Monitor with Firmware Control

The PC health monitor chip can check the RPM status of a cooling fan. The on­board CPU and chassis fans are controlled by the fi rmware thermal management
under IPMI.

Environmental Temperature Control

A thermal control sensor monitors the CPU temperature in real time and will turn
on the thermal control fan whenever the CPU temperature exceeds a user-defi ned
threshold. The overheat circuitry runs independently from the CPU. Once it detects
that the CPU temperature is too high, it will automatically turn on the thermal fan
control to prevent the CPU from overheating. The onboard chassis thermal circuitry
can monitor the overall system temperature and alert the user when the chassis
temperature is too high.

Note: To avoid possible system overheating, please be sure to provide
adequate airfl ow to your system.

System Resource Alert

This feature is available when used with SuperDoctor® III in the Windows OS

1-12

Chapter 1: Overview

environment or used with SuperDoctor® II in Linux. SuperDoctor® is used to notify
the use r of certain system events. For example, you can confi gure SuperDoctor®
to provide you with warnings when system temperature, CPU temperature,
voltag es and fa n speed s go beyond a p redefi ned range.

1-5 ACPI Features

ACPI stands for Advanced Confi guration and Power Interface. The ACPI specifi ca-
tion defi nes a fl exible and abstract hardware interface that provides a standard
way to integrate power management features throughout a PC system, including
hardware, operating system and application software. This enables the system to
automatically turn on and off peripherals such as CD-ROMs, network cards, hard
disk drives and printers.

In addition to enabling operating_system-directed power management, ACPI also
provides a generic system event mechanism for Plug and Play, and an operating
system-independent interface for confi guration control. ACPI leverages the Plug and
Play BIOS data structures, while providing a processor architecture-independent
implementation that is compatible with Windows 7, Windows Vista and Windows
2008 Operating Systems.

Slow Blinking LED for Suspend-State Indicator

When the CPU goes into a suspend state, the chassis power LED will start blinking
to indicate that the CPU is in suspend mode. When the user presses any key, the
CPU will "wake up" and the LED will automatically stop blinking and remain on.

1-6 Power Supply

As with all computer products, a stable power source is necessary for proper and
reliable operation. It is even more important for processors that have high CPU
clock rates.

The X9DBL-i/3/iF/3F motherboard accommodates 24-pin ATX power supplies.
Although most power supplies generally meet the specifi cations required by the
CPU, some are inadequate. In addition, two 12V 8-pin power connections (JPW2/
JPW3) are also required to ensure adequate power supply to the system. Your
power supply must also supply 1.5A for the Ethernet ports.

Warning: To avoid damaging the power supply or the motherboard, please use a power
supply that contains a 24-pin and two 8-pin power connectors. Be sure to connect
these power supply connectors to all power connectors on the motherboard. Failure
to do so will void the manufacturer warranty on your power supply and motherboard.

1-13

X9DBL-i/3/iF/3F Motherboard User’s Manual

It is strongly recommended that you use a high quality power supply that meets ATX
power supply Specifi cation 2.02 or above. It must also be SSI compliant. (For more
information, please refer to the website at http://www.ssiforum.org/). Additionally, in
areas where noisy power transmission is present, you may choose to install a line
fi lter to shield the computer from noise. It is recommended that you also install a
power surge protector to help avoid problems caused by power surges.

1-7 Super I/O

The Super I/O supports two high-speed, 16550 compatible serial communication
ports (UARTs). Each UART includes a 16-byte send/receive FIFO, a programmable
baud rate generator, complete modem control capability and a processor interrupt
system. Both UARTs provide legacy speed with baud rates of up to 115.2 Kbps
as well as an advanced speed with baud rates of 250 K, 500 K, or 1 Mb/s, which
support higher speed modems.

The Super I/O provides functions that comply with ACPI (Advanced Confi guration
and Power Interface), which includes support of legacy and ACPI power manage­ment through an SMI or SCI function pin. It also features auto power management
to reduce power consumption.

1-8 Advanced Power Management

The new advanced power management features supported by this motherboard
include IPNM and ME. Please note that you will need to do following to use these
two new features:

• Use a power supply that supports PMBus 1.1 or 1.2.

• Install the NMView software in your system. NMView is optional and can be

purchased from Supermicro.

Intel® Intelligent Power Node Manager (IPNM)

The Intel® Intelligent Power Node Manager (IPNM) provides your system with
real-time thermal control and power management for maximum energy effi ciency.
Although IPNM is supported by the BMC (Baseboard Management Controller),
your system must also have IPNM-compatible Management Engine (ME) fi rmware
installed in your system for IPNM support.

Note: Support for IPNM Specifi cation Version 1.5 or Vision 2.0 depends
on the power supply used in the system.

1-14

Chapter 1: Overview

Management Engine (ME)

The Management Engine, which is an ARC controller embedded in the PCH, pro­vides Server Platform Services (SPS) to your system. The services provided by
SPS are different from those provided by the ME on client platforms.

1-9 Introduction to the IPMI Controller (For X9DBL-iF/3F
only)

The Nuvoton WPCM450R Controller, a Baseboard Management Controller (BMC),
supports 2D/VGA-compatible Graphic Cores with PCI interface, creating multi-media
virtualization via Keyboard/Video/Mouse Redirection (KVMR). The WPCM450R
Controller is ideal for remote system management.

The WPCM450R Controller interfaces with the host system via PCI connections
to communicate with the graphics cores. It supports USB 2.0 and 1.1 for remote
keyboard/mouse/virtual media emulation. It also provides LPC interface support to
control Super IO functions. The WPCM450R Controller is connected to the network
via an external Ethernet PHY module or shared NCSI connections.

The WPCM450R communicates with onboard components via six SMBus inter­faces, PECI (Platform Environment Control Interface) buses, and General Purpose
I/O ports.

WPCM450R DDR2 Memory Interface

The WPCM450R supports a 16-bit DDR2 memory module with a speed of up to 220
MHz. For best signal integrity, the WPCM450R provides point-to-point connection.

WPCM450R PCI System Interface

The WPCM450R provides 32-bit, 33 MHz 3.3V PCI interface, which is compliant
with the PCI Local Bus Specifi cation Rev. 2.3. The PCI system interface connects
to the onboard PCI Bridge used by the graphics controller.

Other Features Supported by the WPCM BMC Controller

The WPCM450R supports the following features:

• IPMI 2.0

• Serial over LAN

• KVM over LAN

• LAN Alerting-SNMP Trap

1-15

X9DBL-i/3/iF/3F Motherboard User’s Manual

• Event Log

• X-Bus parallel interface for I/O expansion

• Multiple ADC inputs, Analog and Digital Video outputs

• SPI Flash Host BIOS and fi rmware bootstrap program supported

• Reduced Media Independent Interface (RMII)

• OS (Operating System) Independency

• Provides remote Hardware Health Monitoring via IPMI. Key features

• Provides Network Management Security via remote access/console redirec-

tion.

• Supports the following Management tools: IPMIView, CLI (Command Line

Interface)

• RMCP+ protocol supported

Note: For more information on IPMI confi guration, please refer to the
IPMI User's Guide posted on our website at http://www.supermicro.com/
support/manuals/.

1-16

Chapter 2: Installation

Chapter 2

Installation

2-1 Standardized Warning Statements

The following statements are industry-standard warnings, provided to warn the user
of situations which have the potential for bodily injury . Should you have questions or
experience diffi culty, contact Supermicro's Technical Support department for assis-
tance. Only certifi ed technicians should attempt to install or confi gure components.

Read this section in its entirety before installing or confi guring components in the
Supermicro chassis.

Battery Handling

Warning!

There is a danger of explosion if the battery is replaced incorrectly. Replace the
battery only with the same or equivalent type recommended by the manufacturer.
Dispose of used batteries according to the manufacturer's instructions

電池の取り扱い

電池交換が正しく行われなかった場合、破裂の危険性があります。交換する電池はメー
カーが推奨する型、または同 等のものを使 用下さい。使用済電池は製造元の指示に従

って処 分して 下さい。

警告
电池更换不当会有爆炸危险。请只使用同类电池或制造商推荐的功能相当的电池更
换原有电池。请按制造商的说明处理废旧电池。

警告
電池更換不當會有爆炸危險。請使用製造商建議之相同或功能相當的電池更換原有
電池。請按照製造商的說明指示處理廢棄舊電池。

Warnung
Bei Einsetzen einer falschen Batterie besteht Explosionsgefahr. Ersetzen Sie die

Batterie nur durch den gleichen oder vom Hersteller empfohlenen Batterietyp.
Entsorgen Sie die benutzten Batterien nach den Anweisungen des Herstellers.

2-1

X9DBL-i/3/iF/3F Motherboard User’s Manual

!הרהזא

Attention
Danger d'explosion si la pile n'est pas remplacée correctement. Ne la remplacer

que par une pile de type semblable ou équivalent, recommandée par le fabricant.
Jeter les piles usagées conformément aux instructions du fabricant.

¡Advertencia!
Existe peligro de explosión si la batería se reemplaza de manera incorrecta. Re-

emplazar la batería exclusivamente con el mismo tipo o el equivalente recomen­dado por el fabricante. Desechar las baterías gastadas según las instrucciones
del fabricante.

תנכס תמייקץוציפ .הניקת אל ךרדב הפלחוהו הדימב הללוסה לש ףילחהל שי

גוסב הללוסה תא מ םאותה תרבחלמומ ןרציתצ.

תוללוסה קוליס תושמושמה עצבל שי .ןרציה תוארוה יפל

ﺮﻄﺧ ﻙﺎﻨﻫ ﻦﻣ ﻝﺍﺪﺒﺘﺳﺍ ﺔﻟﺎﺣ ﻲﻓ ﺭﺎﺠﻔﻧﺍ ﺔﻳﺭﺎﻄﺒﻟﺍ ﺔﺤﻴﺤﺻ ﺮﻴﻏ ﺔﻘﻳﺮﻄﺑ ﻚﻴﻠﻌﻓ

ﺔﻳﺭﺎﻄﺒﻟﺍ ﻝﺍﺪﺒﺘﺳﺍ

ﻂﻘﻓ ﻉﻮﻨﻟﺍ ﺲﻔﻨﺑ ﺎﻬﻟﺩﺎﻌﻳ ﺎﻣ ﻭﺃ ﺎﻤﻛﺖﺻﻭﺃ ﺔﻌﻨﺼﻤﻟﺍ ﺔﻛﺮﺸﻟﺍ ﻪﺑ

ﺕﺎﻳﺭﺎﻄﺒﻟﺍ ﻦﻣ ﺺﻠﺨﺗ ﻟ ﺎﻘﻓﻭ ﺔﻠﻤﻌﺘﺴﻤﻟﺍﺔﻌﻧﺎﺼﻟﺍ ﺔﻛﺮﺸﻟﺍ ﺕﺎﻤﻴﻠﻌﺘ

경고!

배터리가 올바르게 교체되지 않으면 폭발의 위험이 있습니다. 기존 배터리와 동일
하거나 제조사에서 권장하는 동등한 종류의 배터리로만 교체해야 합니다. 제조사
의 안내에 따라 사용된 배터리를 처리하여 주십시오.

Waarschuwing
Er is ontploffi ngsgevaar indien de batterij verkeerd vervangen wordt. Vervang de

batterij slechts met hetzelfde of een equivalent type die door de fabrikant aan­bevolen wordt. Gebruikte batterijen dienen overeenkomstig fabrieksvoorschriften
afgevoerd te worden.

2-2

Chapter 2: Installation

רצומה קוליס

Product Disposal

Warning!

Ultimate disposal of this product should be handled according to all national laws
and regulations.

製品の廃棄

この製品を廃棄処分する場合、国の関係する全ての法律・条例に従い処理する必要が

あります。

警告
本产品的废弃处理应根据所有国家的法律和规章进行。

警告
本產品的廢棄處理應根據所有國家的法律和規章進行。

Warnung
Die Entsorgung dieses Produkts sollte gemäß allen Bestimmungen und Gesetzen

des Landes erfolgen.
¡Advertencia!
Al deshacerse por completo de este producto debe seguir todas las leyes y regla-

mentos nacionales.
Attention
La mise au rebut ou le recyclage de ce produit sont généralement soumis à des

lois et/ou directives de respect de l'environnement. Renseignez-vous auprès de
l'organisme compétent.

!הרהזא

ו תויחנהל םאתהב תויהל בייח הז רצומ לש יפוס קוליס.הנידמה יקוח

2-3

X9DBL-i/3/iF/3F Motherboard User’s Manual

ﻲﺋﺎﻬﻨﻟﺍ ﺺﻠﺨﺘﻟﺍ ﻦﻣ ﺞﺘﻨﻤﻟﺍ ﺍﺬﻫ ﻪﻌﻣ ﻞﻣﺎﻌﺘﻟﺍ ﻲﻐﺒﻨﻳ ﻟ ﺎﻘﻓﻭ ﻊﻴﻤﺠﺔﻴﻨﻁﻮﻟﺍ ﺢﺋﺍﻮﻠﻟﺍﻭ ﻦﻴﻧﺍﻮﻘﻟﺍ ﺪﻨﻋ

경고!

이 제품은 해당 국가의 관련 법규 및 규정에 따라 폐기되어야 합니다.

Waarschuwing
De uiteindelijke verwijdering van dit product dient te geschieden in overeenstemming

met alle nationale wetten en reglementen.

2-2 Static-Sensitive Devices

Electrostatic Discharge (ESD) can damage electronic com ponents. To avoid dam­aging your system board, it is important to handle it very carefully. The following
measures are generally suffi cient to protect your equipment from ESD.

Precautions

• Use a grounded wrist strap designed to prevent static discharge.

• Touch a grounded metal object before removing the board from the antistatic

bag.

• Handle the board by its edges only; do not touch its components, peripheral

chips, memory modules or gold contacts.

• When handling chips or modules, avoid touching their pins.

• Put the motherboard and peripherals back into their antistatic bags when not

in use.

• For grounding purposes, make sure that your system chassis provides excellent

conductivity between the power supply, the case, the mounting fasteners and
the motherboard.

Unpacking

The motherboar d i s s h i p ped in antistatic packaging to avoid static damag e. When
unpacking the board, make sure that the person handling it is static-protected.

2-4

Chapter 2: Installation

2-3 Processor and Heatsink Installation

When handling the processor package, avoid placing direct pressure on the label area
of the fan.

Notes:

• Always connect the power cord last, and always remove it before adding, re-

moving, or changing any components. Make sure that you install the processor
into the CPU socket before you install the CPU heatsink.

• Make sure that the processor wattage (TDP) does not exceed the maximum

rating for the motherboard. Also, check that it is within the rating limits of the
heatsink and chassis to ensure proper cooling and operation. Refer to the
chassis manual for more information.

• Make sure to install the motherboard into the chassis before you install the

CPU heatsink and heatsink fans.

• When purchasing a motherboard without a processor pre-installed, make sure

that the CPU socket plastic cap is in place, and none of the CPU socket pins
are bent; otherwise, contact the retailer immediately.

• Refer to the M otherboar d Features secti on of the manual an d our website

for more i nform ation on C PU suppo rt a nd update s.

Installing an LGA 1356 Processor

1. Press the socket clip to release the load plate that covers the CPU socket from
its locked position.

2. Gently lift the socket clip to open the load plate.

2-5

X9DBL-i/3/iF/3F Motherboard User’s Manual

3. Hold the plastic cap at its north and south center edges to remove it from the
CPU socket.

4. After removing the plastic cap, hold the CPU at the north and south center
edges with your thumb and index fi nger.

5. Align the CPU key, a semi-circle cutout, against the socket key, which is the
notch below the gold color dot on the side of the socket.

6. Align Pin 1 on the CPU with Pin 1 on the CPU socket.

7. Once both CPU and the socket are aligned, carefully lower the CPU straight
down into the socket. (To avoid damaging the CPU or the socket, do not rub
the CPU against the surface of the socket or its pins.)

8. With the CPU inside the socket, inspect the four corners of the CPU to make
sure that the CPU is properly installed.

9. Once the CPU is securely seated on the socket, lower the CPU load plate to
the socket.

10. Use your thumb to gently push the socket clip down to the clip lock.

Warning: Please s ave the plastic c ap. The mothe rboard mu st be shipped w ith the
plastic cap properly installed to protect CPU socket pins. Shipping without the plastic
cap pro per ly inst alled w ill cau se damag e to the so cket pins.

2-6

Chapter 2: Installation

Installing a Passive CPU Heatsink

1. Do not apply any thermal grease to the heatsink or the CPU die -- the re­quired amount has already been applied.

2. Place the heatsink on top of the CPU so that the four mounting holes are
aligned with those on the Motherboard's and the Heatsink Bracket under­neath.

3. Screw in two diagonal screws (i.e., the #1 and the #2 screws) until just snug
(-do not over-tighten the screws to avoid possible damage to the CPU.)

4. Finish the installation by fully tightening all four screws.

Screw#1

Screw#3 Screw#4

Screw#2

Screw#1

Screw#2

2-7

X9DBL-i/3/iF/3F Motherboard User’s Manual

Removing the Heatsink

Warning: We do not recommend that the CPU or the heatsink be removed. However,

if you do need to uninstall the heatsink, please follow the instructions below to uninstall
the heatsink to prevent damage done to the CPU or the CPU socket.

1. Unscrew the heatsink screws from the motherboard in the sequence as
shown in the illustration below.

2. Gently wriggle the heatsink to loosen it from the CPU. (Do not use excessive
force when wriggling the heatsink!)

3. Once the CPU is loosened, remove the CPU from the CPU socket.

4. Remove the used thermal grease and clean the surface of the CPU and the
heatsink, Reapply the proper amount of thermal grease on the surface before
reinstalling the CPU and the heatsink.

Loosen screws
in sequence as
shown.

Motherboard

Screw#1

Screw#4

Screw#3

Screw#2

OPEN 1st

2-8

Chapter 2: Installation

T

T

S

S

S

S

2-4 Installing and Removing the Memory Modules

Note: Check Supe rmic ro's web site for r ecom mende d memo ry m odule s.

CAUTION

Exercise extreme care when installing or removing DIMM

module s to prevent a ny possi ble dam age.

Installing & Removing DIMMs

1. Insert the desired number of DIMMs into the memory slots, starting with P1­DIMM #1A. (For best memory performance, please use the modules of the
same type and speed in the same bank.)

2. Push the release tabs outwards on both ends of the DIMM slot to unlock it.

LED1

COM2

BMC CTRL

TPM/Port80

JIPMB1

CPU1 SLOT2 PCI-E 3.0 X4(IN X8)

SLOT1 PCI 33MHZ

JSTBY1

USB6

JI2C1JI2C2

USB4/5

J9

CPLD

USB2/3

S-SATA/
SAS0
S-SATA/
SAS1
S-SATA/
SAS2
S-SATA/
SAS3
S-SATA/
SAS4

JPME2

S-SATA/
SAS5

7

1

S-SATA/SAS6

JBT1

S-SATA/
SAS7

I-SATA5
I-SATA4

I-SATA3
I-SATA2

I-SATA1

BIOS

I-SATA0

JPME1

JBR1

JL1

FANA

JWD1

JPG1

CPU2 SLOT3 PCI-E 3.0 X8

JPB1

Intel PCH

JWP1

JOH1

JF1(FP Control)

LAN CTRL

CPU2 SLOT4 PCI-E 3.0 X8

LED2

LAN CTRL

CPU2 SLOT5 PCI-E 3.0 X8

BT1

Battery

SP1

JD1

LED3

JUIDB1

P2-DIMM1D

CPU1 SLOT6 PCI-E 3.0 X16

P2-DIMM1E

FAN5

FAN4

P2-DIMM1F

FAN3

LAN2

LAN1

X9DBL-i/3 (F)

Rev. 1.01

CPU2

VGA COM1

JPL1
JPL2

CPU1

FAN2

USB0/1

KB/MOUSE

IPMI_LAN

JVRM_I2C2

JVRM_I2C1

JCPUVRD_SMB

JPW2

JPW1

P1-DIMM1C

P1-DIMM1B

P1-DIMM1A

Release Tabs

JPW3

JPI2C1

FAN1

3. Align the DIMM module key with the receptive point on the memory slot.

4. Align the notches on both ends of the module with the receptive points on
ends of the slot.

5. Use two thumbs together to press the notches of the module straight down
into the slot until the module snaps into place.

Notches

6. Press the release tabs to the locked positions to secure the DIMM module
into the slot.

Press both notches straight
down into the memory slot at
the same time.

Removing Memory Modules

Press both notches on the ends of the DIMM module to unlock it. Once the DIMM
module is loosened, remove it from the memory slot.

2-9

X9DBL-i/3/iF/3F Motherboard User’s Manual

Memory Support for the X9DBL-i/3/iF/3F Motherboard

The X9DBL-i/3/iF/3F Motherboard supports up to 192 GB of Registered/Load
Reduced ECCC or Unbuffered ECC/Non-ECCe4 DDR3 memory with speeds of
800/1066/1333/1600 MHz in 6 DIMM slots. For the latest memory updates, please
refer to our website a at http://www.supermicro.com/products/motherboard.

Processor & Memory Module Population Confi guration

For memory to work properly, follow the tables below for memory installation.

Processors and their Corresponding Memory Modules

CPU# Corresponding DIMM Modules
CPU 1 P1-DIMM1A P1-DIMM1B P1-DIMM1C
CPU2 P2-DIMM1D P2-DIMM1E P2-DIMM1F

Processor and Memory Module Population

Number of

CPUs+DIMMs

1 CPU &
1 DIMMs

1 CPU &
2 DIMMs

1 CPU &
3 DIMMs

2 CPUs &

2 DIMMs

2 CPUs &

3 DIMMs

2 CPUs &

4 DIMMs

2 CPUs &

5 DIMMs

2 CPUs &

6 DIMMs

CPU1
P1-DIMM1A

CPU1
P1-DIMM1A, P1-DIMM1B

CPU1
P1-DIMM1A, P1-DIMM1B, P1-DIMM1C

CPU1 + CPU2
P1-DIMM1A, P2-DIMM1D

CPU1 + CPU2
P1-DIMM1A, P2-DIMM1D, P1-DIMM1B

CPU1 + CPU2
P1-DIMM1A, P2-DIMM1D, P1-DIMM1B, P2-DIMM1E

CPU1 + CPU2
P1-DIMM1A, P2-DIMM1D, P1-DIMM1B, P2-DIMM1E, P1-DIMM1C

CPU1 + CPU2
P1-DIMM1A, P2-DIMM1D, P1-DIMM1B, P2-DIMM1E, P1-DIMM1C, P2-DIMM1F

CPU and Memory Population Confi guration Table

(*For memory to work proper, please install DIMMs in pairs)

2-10

Chapter 2: Installation

Populating UDIMM ECC-Non ECC Memory Modules

Intel E5-2400 Series Processor UDIMM Memory Support

Ranks Per

DIMM &

Data Width

SRx8

Non-ECC

DRx8

Non-ECC

SRx16

Non-ECC

SRx8 ECC 1GB 2GB 4GB 1066,1333 1066, 1333

DRx8 ECC 2GB 4GB 8GB 1066, 1333 1066, 1333

Note: For detailed information on memory support and updates, please refer to the SMC

Recommended Memory List posted on our website at http://www.supermicro.com/
support/resources/mem.cfm.

Memory Capacity

Per DIMM

(See the Note below)

1GB 2GB 4GB NA 1066, 1333

2GB 4GB 8GB NA 1066, 1333

512MB 1GB 2GB NA 1066, 1333

1 Slot per Channel

1DPC

1.35V 1.5V

Populating RDIMM ECC Memory Modules

Intel E5-2400 Series Processor RDIMM Memory Support

Ranks Per

DIMM &

Data Width

SRx8 1GB 2GB 4GB 1066, 1333 1066, 1333, 1600

DRx8 2GB 4GB 8GB 1066, 1333 1066, 1333, 1600

SRx4 2GB 4GB 8GB 1066, 1333 1066, 1333, 1600

DRx4 4GB 8GB 16GB 1066, 1333 1066, 1333, 1600
QRx4 8GB 16GB 32GB 800 800
QRx8 4GB 8GB 16GB 800 800

Note: For detailed information on memory support and updates, please refer to the SMC

Recommended Memory List posted on our website at http://www.supermicro.com/support/
resources/mem.cfm.

Memory Capacity

Per DIMM

(See the Note Below)

1 Slot Per Channel

1DPC

1.35V 1.5V

2-11

X9DBL-i/3/iF/3F Motherboard User’s Manual

Populating LRDIMM ECC Memory Modules

Intel E5-2400 Series Processor LRDIMM Memory

Support

Ranks Per

DIMM & Data

Width

QRx4 (DDP) 16GB 32GB 1066 1066,1333

QRx8 (P) 8GB 16GB 1066 1066,1333

Note: For detailed information on memory support and updates, please refer

to the SMC Recommended Memory List posted on our website at http://www.
supermicro.com/support/resources/mem.cfm.

Memory Capacity

Per DIMM

(See the Note Below)

1 Slot Per Channel

1DPC

1.35V 1.5V

Other Important Notes and Restrictions

• For the memory modules to work properly, please install DIMM modules of the

same type, same speed and same operating frequency on the motherboard.
Mixing of RDIMMs, UDIMMs or LRDIMMs is not allowed. Do not install both
ECC and Non-ECC memory modules on the same motherboard.

• Using DDR3 DIMMs with different operating frequencies is not allowed. All chan-

nels in a system will run at the lowest common frequency.

2-12

Chapter 2: Installation

2-5 Motherboard Installation

All motherboards have standard mounting holes to fi t different types of chassis.
Make sure that the locations of all the mounting holes for both motherboard and
chassis match. Although a chassis may have both plastic and metal mounting fas­teners, metal ones are highly recommended because they ground the motherboard
to the chassis. Make sure that the metal standoffs click in or are screwed in tightly.
Then use a screwdriver to secure the motherboard onto the motherboard tray.

Tools Needed

• Phillips Screwdriver

• Pan head screws (8 pieces)

• Standoffs (8 pieces, if needed)

Location of Mounting Holes

There are eight (8) mounting holes on this motherboard indicated by the arrows.

7

JBR1

T-SGPIO1

COM2

TPM/Port80

SLOT1 PCI 33MHZ

USB6

USB4/5

USB2/3

JPME2

1

JPME1

T-SGPIO2

S-SATA/
SAS0

S-SATA/
SAS1
S-SATA/

SAS2
S-SATA/
SAS3

S-SATA/

SAS4

S-SATA/
SAS5

S-SATA/SAS6

S-SATA/
SAS7

I-SATA5
I-SATA4

I-SATA3

I-SATA2

I-SATA1

I-SATA0

JL1

SCU-

SGPIO2

JIPMB1

JSTBY1

JI2C1JI2C2

JBT1

SGPIO1

LED1

J9

BIOS

SCU-

BMC CTRL

JPG1

CPU1 SLOT2 PCI-E 3.0 X4(IN X8)

CPU2 SLOT3 PCI-E 3.0 X8

JPB1

CPLD

Intel PCH

JWP1

JOH1

FANA

JWD1

JF1(FP Control)

LAN CTRL

CPU2 SLOT4 PCI-E 3.0 X8

CPU2 SLOT5 PCI-E 3.0 X8

Battery

LED2

JD1

LAN CTRL

BT1

SP1

LED3

JUIDB1

P2-DIMM1E

P2-DIMM1D

CPU1 SLOT6 PCI-E 3.0 X16

FAN5

P2-DIMM1F

VGA COM1

FAN4

LAN2

JPL1
JPL2

LAN1

X9DBL-i/3 (F)

Rev. 1.01

CPU2

CPU1

FAN3

FAN2

JPI2C1

JVRM_I2C2

USB0/1

IPMI_LAN

P1-DIMM1C

JVRM_I2C1

JCPUVRD_SMB

P1-DIMM1B

KB/MOUSE

JPW2

JPW1

P1-DIMM1A

JPW3

FAN1

Warning: 1) To avoid damaging the motherboard and its components, please do not use
a force greater than 8 lb/inch on each mounting screw during motherboard installation.

2) Some components are very close to the mounting holes. Please take precautionary
measures to avoid damaging these components when installing the motherboard to
the chassis.

2-13

X9DBL-i/3/iF/3F Motherboard User’s Manual

Installing the Motherboard

1. Install the I/O shield into the chassis.

2. Locate the mounting holes on the motherboard.

3. Locate the matching mounting holes on the chassis. Align the mounting holes
on the motherboard with the mounting holes on the chassis.

4. Install standoffs in the chassis as needed.

5. Install the motherboard into the chassis carefully to avoid damaging mother­board components.

6. Using the Phillips screwdriver, insert a Pan head #6 screw into a mounting
hole on the motherboard and its matching mounting hole on the chassis.

7. Repeat Step 5 to insert #6 screws into all mounting holes.

8. Make sure that the motherboard is securely placed in the chassis.

Note: Images displayed are for illustration only. Your chassis or compo­nents might look different from those shown in this manual.

2-14

Chapter 2: Installation

1

2

3

456

7

8

9

2-6 Control Panel Connectors and I/O Ports

The I/O p ort s are col or-co ded in c onform ance wi th the PC 9 9 spec ifi cation. See
the pic ture be low for t he co lors a nd loc atio ns of the var ious I /O por t s.

Back Panel Connectors and I/O Ports

VGA COM1

JPL1
JPL2

LAN2

LAN1

X9DBL-i/3 (F)

Rev. 1.01

CPU2

CPU1

FAN3

LED1

COM2

BMC CTRL

TPM/Port80

JIPMB1

JPG1

CPU1 SLOT2 PCI-E 3.0 X4(IN X8)

CPU2 SLOT3 PCI-E 3.0 X8

SLOT1 PCI 33MHZ

USB6

USB4/5

USB2/3

S-SATA/
SAS0
S-SATA/
SAS1
S-SATA/
SAS2
S-SATA/
SAS3
S-SATA/
SAS4

JPME2

S-SATA/
SAS5

7

1

S-SATA/SAS6

S-SATA/
SAS7

I-SATA5

I-SATA4

I-SATA3
I-SATA2
I-SATA1

I-SATA0

JPME1

JBR1

JL1

T-SGPIO1

T-SGPIO2

SGPIO1

SCU-

SGPIO2

CPU2 SLOT4 PCI-E 3.0 X8

JSTBY1

JPB1

JI2C1JI2C2

J9

CPLD

Intel PCH

JBT1

BIOS

JWP1

JOH1

FANA

JWD1

JF1(FP Control)

SCU-

LAN CTRL

CPU2 SLOT5 PCI-E 3.0 X8

LED2

JD1

Battery

BT1

JUIDB1

LAN CTRL

CPU1 SLOT6 PCI-E 3.0 X16

SP1

P2-DIMM1D

LED3

FAN5

FAN4

P2-DIMM1E

P2-DIMM1F

USB0/1

KB/MOUSE

IPMI_LAN

JVRM_I2C2

JVRM_I2C1

JCPUVRD_SMB

JPW2

JPW1

P1-DIMM1C

P1-DIMM1B

P1-DIMM1A

JPW3

JPI2C1

FAN2

FAN1

10

Back Panel I/O Port Locations and Defi nitions

1. Keyboard

2. Mouse

3. Back Panel USB Port 0

4. Back Panel USB Port 1

5. IPMI LAN (X9DBL-iF/3F Only)

6. COM Port 1

7. Back Panel VGA (Blue)

8. Gigabit LAN 1

9. Gigabit LAN 2

10. UID Switch

2-15

X9DBL-i/3/iF/3F Motherboard User’s Manual

7

1

2

3

4

5

6

ATX PS/2 Keyboard and Mouse
Ports

The ATX PS/2 keyboard and PS/2
mouse are located next to the Back
Panel USB Ports 0/1 and the IPMI
LAN port on the motherboard. See the
table at right for pin defi nitions.

Universal Serial Bus (USB)

Two Universal Serial Bus ports (USB
0/1) are located on the I/O back panel.
In addition, two USB headers, located
close to the SAS connectors, provide
four front-accessible USB connections
(USB 2/3, USB 4/5). One Type A con­nectors (USB 6) is also located on
the motherboard to provide front USB
support. (Cables are not included).
See the tables on the right for pin
defi nitions.

PS/2 Keyboard/Mouse Pin

Defi nitions

PS2 Keyboard PS2 Mouse
Pin# Defi nition Pin# Defi nition
1 KB Data 1 Mouse Data
2 No Connection 2 No Connection
3 Ground 3 Ground

4 Mouse/KB VCC

(+5V)

4 Mouse/KB VCC

(+5V)
5 KB Clock 5 Mouse Clock
6 No Connection 6 No Connection
VCC: with 1.5A PTC (current limit)

Backplane USB

(USB 0/1)

Pin Defi nitions

Pin# Defi nition
1 +5V
2 PO­3 PO+
4 Ground
5NA

FP USB (2/3, 4/5, 6)

Pin Defi nitions

USB 2, 4, 6
Pin # Defi nition

USB 3, 5
Pin # Defi nition

1 +5V 1 +5V
2 PO- 2 PO­3 PO+ 3 PO+
4 Ground 4 Ground
5 NC 5 Key

(NC= No connection)

LED1

COM2

BMC CTRL

TPM/Port80

JIPMB1

JPG1

CPU1 SLOT2 PCI-E 3.0 X4(IN X8)

CPU2 SLOT3 PCI-E 3.0 X8

SLOT1 PCI 33MHZ

USB6

JI2C1JI2C2

USB4/5

USB2/3

S-SATA/
SAS0
S-SATA/
SAS1

S-SATA/

SAS2
S-SATA/
SAS3
S-SATA/
SAS4

JPME2

S-SATA/

SAS5

7

1

S-SATA/SAS6

S-SATA/
SAS7

I-SATA5
I-SATA4

I-SATA3
I-SATA2
I-SATA1

I-SATA0

JPME1

JBR1

JL1

T-SGPIO1

T-SGPIO2

SGPIO1

SCU-

SGPIO2

CPU2 SLOT4 PCI-E 3.0 X8

JSTBY1

JPB1

J9

CPLD

Intel PCH

JBT1

BIOS

JWP1

JOH1

FANA

JWD1

JF1(FP Control)

SCU-

LAN CTRL

CPU2 SLOT5 PCI-E 3.0 X8

LED2

JD1

Battery

BT1

JUIDB1

LAN CTRL

CPU1 SLOT6 PCI-E 3.0 X16

SP1

P2-DIMM1D

LED3

FAN5

FAN4

P2-DIMM1E

P2-DIMM1F

LAN2

FAN3

LAN1

X9DBL-i/3 (F)

Rev. 1.01

CPU2

VGA COM1

JPL1
JPL2

CPU1

FAN2

1. Keyboard

JVRM_I2C2

USB0/1

IPMI_LAN

JVRM_I2C1

JCPUVRD_SMB

KB/MOUSE

JPW2

2. Mouse

3. Backpanel USB 0

4. Backpanel USB 1

JPW1

P1-DIMM1C

P1-DIMM1B

P1-DIMM1A

5. Front Accessible USB 2/3

6. Front Accessible USB 4/5

7. FP USB 6

JPW3

JPI2C1

FAN1

2-16

Chapter 2: Installation

2

1

123

Serial Ports

Two COM connections (COM1 &
COM2) are located on the mother­board. COM1 is located on the Back­plane I/O panel. COM2, located next
to the TPM/Port 80 header, provides
front access support. See the table on
the right for pin defi nitions.

Video Connection

Serial COM) Ports

Pin Defi nitions

Pin # Defi nition Pin # Defi nition
1 DCD 6 DSR
2 RXD 7 RTS
3 TXD 8 CTS
4 DTR 9 RI
5 Ground 10 N/A

One video (VGA) is located next to
COM Port1 on the I/O backplane.
Refer to the board layout below for
the location.

VGA COM1

JPL1
JPL2

LAN2

LAN1

X9DBL-i/3 (F)

Rev. 1.01

CPU2

CPU1

FAN3

JPI2C1

FAN2

LED1

COM2

BMC CTRL

TPM/Port80

JIPMB1

JPG1

CPU1 SLOT2 PCI-E 3.0 X4(IN X8)

CPU2 SLOT3 PCI-E 3.0 X8

SLOT1 PCI 33MHZ

JSTBY1

USB6

JI2C1JI2C2

USB4/5

USB2/3

S-SATA/
SAS0
S-SATA/
SAS1
S-SATA/
SAS2
S-SATA/
SAS3
S-SATA/
SAS4

JPME2

S-SATA/
SAS5

7

1

S-SATA/SAS6

JBT1
S-SATA/
SAS7

I-SATA5

I-SATA4

I-SATA3
I-SATA2
I-SATA1

I-SATA0

JPME1

JBR1

JL1

T-SGPIO1

T-SGPIO2

SGPIO1

SCU-

SGPIO2

CPU2 SLOT4 PCI-E 3.0 X8

JPB1

J9

CPLD

Intel PCH

BIOS

JWP1

JOH1

LED2

FANA

JWD1

JF1(FP Control)

SCU-

LAN CTRL

CPU2 SLOT5 PCI-E 3.0 X8

BT1

Battery

JD1

JUIDB1

P2-DIMM1D

LAN CTRL

CPU1 SLOT6 PCI-E 3.0 X16

SP1

LED3

FAN5

FAN4

P2-DIMM1E

P2-DIMM1F

JVRM_I2C2

P1-DIMM1C

USB0/1

KB/MOUSE

IPMI_LAN

JVRM_I2C1

JCPUVRD_SMB

JPW2

JPW1

P1-DIMM1B

P1-DIMM1A

JPW3

FAN1

1. COM1

2. COM2

3. VGA

2-17

X9DBL-i/3/iF/3F Motherboard User’s Manual

132

Ethernet Ports

Two Gigabit Ethernet ports (LAN1/2)
are located on the I/O backplane on
the motherboard to provide internet
connections. In addition, an IPMI_
Dedicated LAN, located above USB
0/1 ports on the backplane, provides
KVM support for IPMI 2.0. All these
ports accept RJ45 type cables. (Note:
Please refer to the LED Indicator Sec­tion for LAN LED information.)

LAN Ports

Pin Defi nition

Pin# Defi nition
1 P2V5SB 10 SGND
2 TD0+ 11 Act LED
3 TD0- 12 P3V3SB
4 TD1+ 13 Link 100 LED (Yel-

low, +3V3SB)

5 TD1- 14 Link 1000 LED (Yel-

low, +3V3SB)
6 TD2+ 15 Ground
7 TD2- 16 Ground
8 TD3+ 17 Ground
9 TD3- 18 Ground

(NC: No Connection)

LED1

COM2

BMC CTRL

TPM/Port80

JIPMB1

JPG1

CPU1 SLOT2 PCI-E 3.0 X4(IN X8)

CPU2 SLOT3 PCI-E 3.0 X8

SLOT1 PCI 33MHZ

USB6

JI2C1JI2C2

USB4/5

USB2/3

S-SATA/
SAS0

S-SATA/
SAS1
S-SATA/

SAS2
S-SATA/
SAS3

S-SATA/

SAS4

JPME2

S-SATA/

SAS5

7

1

S-SATA/SAS6

JBT1
S-SATA/
SAS7

I-SATA5

I-SATA4

I-SATA3
I-SATA2
I-SATA1

I-SATA0

JPME1

JBR1

JL1

T-SGPIO1

T-SGPIO2

SGPIO1

SCU-

SGPIO2

CPU2 SLOT4 PCI-E 3.0 X8

JSTBY1

JPB1

J9

CPLD

Intel PCH

BIOS

JWP1

JOH1

LED2

FANA

JWD1

JF1(FP Control)

SCU-

LAN CTRL

CPU2 SLOT5 PCI-E 3.0 X8

BT1

Battery

JD1

JUIDB1

P2-DIMM1D

LAN CTRL

CPU1 SLOT6 PCI-E 3.0 X16

SP1

LED3

FAN5

FAN4

P2-DIMM1E

P2-DIMM1F

LAN2

FAN3

LAN1

X9DBL-i/3 (F)

Rev. 1.01

CPU2

VGA COM1

JPL1
JPL2

CPU1

FAN2

USB0/1

KB/MOUSE

IPMI_LAN

JVRM_I2C2

JVRM_I2C1

JCPUVRD_SMB

JPW2

JPW1

P1-DIMM1C

P1-DIMM1B

P1-DIMM1A

JPW3

JPI2C1

FAN1

1. GLAN1

2. GLAN2

3. IPMI_LAN

2-18

Chapter 2: Installation

1

2

3

456

1

Unit Identifi er Switch

A Unit Identifier (UID) Switch and
two LED Indicators are located on
the motherboard. The UID Switch is
located next to Fan5 on the mother­board. The Rear UID LED (LED3) is
located next to the UID Switch. The
Front Panel UID LED is located at
Pins 7/8 of the Front Control Panel
at JF1. Connect a cable to Pin 8 on
JF1 for Front Panel UID LED indica­tion. When you press the UID switch,
both Rear UID LED and Front Panel
UID LED Indicators will be turned on.
Press the UID switch again to turn
off both LED Indicators. These UID
Indicators provide easy identifi cation
of a system unit that may be in need
of service.

Note: UID can also be trig­gered via IPMI on the moth­erboard. For more informa­tion on IPMI, please refer
to the IPMI User's Guide
posted on our Website @
http://www.supermicro.com.

UID Switch

Pin# Defi nition
1 Ground
2 Ground
3 Button In
4 Ground

UID LED (LE2)

Status

Color/State OS Status
Blue: On Windows OS Unit Identifi ed
Blue:

Linux OS Unit Identifi ed

Blinking

1920

Ground

FP PWRLED

HDD LED

NIC1 Link LED

NIC2 Link LED

Blue+ (OH/Fan Fail/
PWR FaiL/UID LED)

Power Fail LED

Ground

Ground

X

2

NMI

3.3 V

ID_UID_SW/3/3V Stby

NIC1 Activity LED

NIC2 Activity LED

Red+ (Blue LED Cathode)

3.3V

Reset

PWR

1

X

Reset Button

Power Button

LED1

COM2

BMC CTRL

TPM/Port80

JIPMB1

JPG1

CPU1 SLOT2 PCI-E 3.0 X4(IN X8)

CPU2 SLOT3 PCI-E 3.0 X8

SLOT1 PCI 33MHZ

JSTBY1

USB6

JI2C1JI2C2

USB4/5

USB2/3

S-SATA/
SAS0
S-SATA/
SAS1
S-SATA/
SAS2
S-SATA/
SAS3
S-SATA/
SAS4

JPME2

S-SATA/
SAS5

7

1

S-SATA/SAS6

JBT1
S-SATA/
SAS7

I-SATA5

I-SATA4

I-SATA3
I-SATA2
I-SATA1

I-SATA0

JPME1

JBR1

JL1

T-SGPIO1

T-SGPIO2

SGPIO1

SCU-

SGPIO2

CPU2 SLOT4 PCI-E 3.0 X8

JPB1

J9

CPLD

Intel PCH

BIOS

JWP1

JOH1

LED2

FANA

JWD1

JF1(FP Control)

SCU-

LAN CTRL

CPU2 SLOT5 PCI-E 3.0 X8

Battery

JD1

BT1

JUIDB1

P2-DIMM1D

LAN CTRL

CPU1 SLOT6 PCI-E 3.0 X16

SP1

LED3

FAN5

FAN4

P2-DIMM1E

P2-DIMM1F

VGA COM1

JPL1
JPL2

LAN2

LAN1

X9DBL-i/3 (F)

Rev. 1.01

CPU2

CPU1

FAN3

USB0/1

KB/MOUSE

IPMI_LAN

JVRM_I2C2

JVRM_I2C1

JCPUVRD_SMB

JPW2

JPW1

P1-DIMM1C

P1-DIMM1B

P1-DIMM1A

JPW3

JPI2C1

FAN2

FAN1

1. UID Switch

2. Rear UID LED (LED3)

3. Front UID LED

2-19

X9DBL-i/3/iF/3F Motherboard User’s Manual

Front Control Panel

JF1 contains header pins for various buttons and indicators that are normally lo­cated on a control panel at the front of the chassis. These connectors are designed
specifi cally for use with Supermicro's server chassis. See the fi gure below for the
descriptions of the various control panel buttons and LED indicators. Refer to the
following section for descriptions and pin defi nitions.

JBR1

TPM/Port80

USB4/5

USB2/3

JPME2

7

JPME1

T-SGPIO1

COM2

SLOT1 PCI 33MHZ

USB6

1

JL1

T-SGPIO2

S-SATA/
SAS0
S-SATA/
SAS1

S-SATA/

SAS2
S-SATA/
SAS3
S-SATA/
SAS4

S-SATA/

SAS5
S-SATA/SAS6

S-SATA/
SAS7

I-SATA5
I-SATA4

I-SATA3
I-SATA2
I-SATA1

I-SATA0

SCU-

SGPIO2

SGPIO1

LED1

JIPMB1

JSTBY1

JI2C1JI2C2

J9

JBT1

BIOS

SCU-

BMC CTRL

JPG1

CPU1 SLOT2 PCI-E 3.0 X4(IN X8)

CPU2 SLOT3 PCI-E 3.0 X8

JPB1

CPLD

Intel PCH

JWP1

JOH1

FANA

JWD1

CPU2 SLOT4 PCI-E 3.0 X8

JF1(FP Control)

LAN CTRL

CPU2 SLOT5 PCI-E 3.0 X8

Battery

LED2

JD1

BT1

JUIDB1

P2-DIMM1D

LAN CTRL

CPU1 SLOT6 PCI-E 3.0 X16

SP1

LAN1

X9DBL-i/3 (F)

Rev. 1.01

CPU2

VGA COM1

JPL1
JPL2

CPU1

FAN2

LED3

FAN5

FAN4

P2-DIMM1E

P2-DIMM1F

LAN2

FAN3

USB0/1

KB/MOUSE

IPMI_LAN

JVRM_I2C2

JVRM_I2C1

JCPUVRD_SMB

JPW2

JPW1

P1-DIMM1C

P1-DIMM1B

P1-DIMM1A

JPW3

JPI2C1

FAN1

JF1 Header Pins

Ground

X

FP PWRLED

HDD LED

NIC1 Link LED

NIC2 Link LED

Blue+ (OH/Fan Fail/
PWR FaiL/UID LED)

Power Fail LED

Ground

Ground

2-20

1920

NMI

X

3.3 V

ID_UID_SW/3/3V Stby

NIC1 Activity LED

NIC2 Activity LED

Red+ (Blue LED Cathode)

3.3V

Reset

PWR

2

1

Rese t Button

Power Button

Front Control Panel Pin Defi nitions

Chapter 2: Installation

NMI Button

The non-maskable interrupt button
header is located on pins 19 and 20
of JF1. Refer to the table on the right
for pin defi nitions.

Power LED

The Power LED connection is located
on pins 15 and 16 of JF1. Refer to the
table o n the ri ght for p in defi nitions.

NMI Button

Pin Defi nitions (JF1)

Pin# Defi nition
19 Control
20 Ground

Power LED

Pin Defi nitions (JF1)

Pin# Defi nition
15 3.3V
16 PWR LED

A. NMI
B. PWR LED

VGA COM1

JPL1
JPL2

LAN2

LAN1

X9DBL-i/3 (F)

Rev. 1.01

CPU2

CPU1

FAN3

LED1

COM2

BMC CTRL

TPM/Port80

JIPMB1

JPG1

CPU1 SLOT2 PCI-E 3.0 X4(IN X8)

CPU2 SLOT3 PCI-E 3.0 X8

SLOT1 PCI 33MHZ

JSTBY1

USB6

JI2C1JI2C2

USB4/5

USB2/3

S-SATA/
SAS0
S-SATA/
SAS1
S-SATA/
SAS2
S-SATA/
SAS3
S-SATA/
SAS4

JPME2

S-SATA/
SAS5

7

1

S-SATA/SAS6

JBT1
S-SATA/
SAS7

I-SATA5
I-SATA4

I-SATA3
I-SATA2
I-SATA1

I-SATA0

JPME1

JBR1

JL1

T-SGPIO1

T-SGPIO2

SGPIO1

SCU-

SGPIO2

CPU2 SLOT4 PCI-E 3.0 X8

JPB1

J9

CPLD

Intel PCH

BIOS

JWP1

JOH1

JF1(FP Control)

LED2

FANA

JWD1

SCU-

LAN CTRL

CPU2 SLOT5 PCI-E 3.0 X8

Battery

JD1

BT1

JUIDB1

P2-DIMM1D

LAN CTRL

CPU1 SLOT6 PCI-E 3.0 X16

SP1

LED3

FAN5

FAN4

P2-DIMM1E

P2-DIMM1F

JVRM_I2C2

P1-DIMM1C

USB0/1

KB/MOUSE

IPMI_LAN

JVRM_I2C1

JCPUVRD_SMB

JPW2

B

JPW1

P1-DIMM1B

P1-DIMM1A

Ground

X

FP PWRLED

HDD LED

NIC1 Link LED

NIC2 Link LED

Blue+ (OH/Fan Fail/
PWR FaiL/UID LED)

Power Fail LED

JPW3

JPI2C1

FAN2

FAN1

Ground

Ground

1920

NMI

A

X

3.3 V

ID_UID_SW/3/3V Stby

NIC1 Activity LED

NIC2 Activity LED

Red+ (Blue LED Cathode)

3.3V

Reset

Reset Butto n

Power Button

PWR

2

1

2-21

X9DBL-i/3/iF/3F Motherboard User’s Manual

D

E

HDD LED

The HDD LED connection is located
on pins 13 and 14 of JF1. Attach a
cable here to indicate HDD activ­ity. See the table on the right for pin
defi nitions.

NIC1/NIC2 LED Indicators

The NIC (Network Interface Control­ler) LED connections for GLAN port 1
are located on pins 11 and 12 of JF1,
and the LED connection for GLAN
Port 2 are on Pins 9 and 10. Attach
the NIC LED cables here to display
network activity. Refer to the table on
the right for pin defi nitions.

HDD LED

Pin Defi nitions (JF1)

Pin# Defi nition
13 3.3V Standby
14 HD Active

GLAN1/2 LED

Pin Defi nitions (JF1)

Pin# Defi nition
9 NIC 2 Activity LED
10 NIC 2 Link LED
11 NIC 1 Activity LED
12 NIC 1 Link LED

A. HDD LED
B. NIC1 Link LED
C. NIC1 Activity LED
D. NIC2 Link LED
E. NIC2 Activity LED

1920

NMI

X

3.3 V

ID_UID_SW/3/3V Stby

NIC1 Activity LED

C

NIC2 Activity LED

Red+ (Blue LED Cathode)

3.3V

Reset

Reset Butto n

Power Button

PWR

2

1

LED1

COM2

BMC CTRL

TPM/Port80

JIPMB1

JPG1

CPU1 SLOT2 PCI-E 3.0 X4(IN X8)

CPU2 SLOT3 PCI-E 3.0 X8

SLOT1 PCI 33MHZ

USB6

USB4/5

USB2/3

S-SATA/
SAS0

S-SATA/
SAS1
S-SATA/

SAS2
S-SATA/
SAS3
S-SATA/
SAS4

JPME2

S-SATA/

SAS5

7

1

S-SATA/SAS6

S-SATA/
SAS7

I-SATA5
I-SATA4

I-SATA3
I-SATA2

I-SATA1

I-SATA0

JPME1

JBR1

JL1

T-SGPIO1

T-SGPIO2

SGPIO1

SCU-

SGPIO2

CPU2 SLOT4 PCI-E 3.0 X8

JSTBY1

JPB1

JI2C1JI2C2

J9

CPLD

Intel PCH

JBT1

BIOS

JWP1

JOH1

JF1(FP Control)

LED2

FANA

JWD1

SCU-

LAN CTRL

CPU2 SLOT5 PCI-E 3.0 X8

BT1

Battery

JD1

JUIDB1

LAN CTRL

CPU1 SLOT6 PCI-E 3.0 X16

SP1

P2-DIMM1D

LED3

FAN5

FAN4

P2-DIMM1E

P2-DIMM1F

FAN3

LAN2

LAN1

X9DBL-i/3 (F)

Rev. 1.01

CPU2

VGA COM1

JPL1
JPL2

CPU1

JVRM_I2C2

USB0/1

KB/MOUSE

IPMI_LAN

JVRM_I2C1

JCPUVRD_SMB

JPW2

Ground

X

FP PWRLED

JPW1

P1-DIMM1C

P1-DIMM1B

P1-DIMM1A

B

HDD LED

A

NIC1 Link LED

NIC2 Link LED

Blue+ (OH/Fan Fail/
PWR FaiL/UID LED)

Power Fail LED

JPW3

JPI2C1

FAN2

FAN1

Ground

Ground

2-22

Chapter 2: Installation

Overheat (OH)/Fan Fail/PWR Fail/
UID LED

Conne ct an LED c able to pi ns 7 and
8 of Front Control Panel to use the
Overheat/Fan Fail/Power Fail and
UID LED c onnec tio ns. The Re d LED
on pin 7 provides warnings of over­heat, fan f ai lu re o r p owe r f ai lu re. T h e
Blue LED on p in 8 wor ks as t he f ron t
panel UID LED indicator. The Red
LED takes p rec ed enc e over t he B lue
LED by default . Refer to th e tabl e on
the ri ght for pi n defi nitions.

Power Fail LED

The Power Fail LED connection is
locate d on pins 5 and 6 of JF1. Re­fer to the table on the right for pin
defi nitions.

OH/Fan Fail/ PWR Fail/Blue_UID

LED Pin Defi nitions (JF1)

Pin# Defi nition
7 Red_LED-Cathode/OH/Fan Fail/

Power Fail5.5V.SB

8 Blue_UID LED

OH/Fan Fail/PWR Fail

LED Status (Red LED)

State Defi nition
Off Normal
On Overheat
Flashing Fan Fail

PWR Fail LED

Pin Defi nitions (JF1)

Pin# Defi nition
5 3.3V
6 PWR Supply Fail

LED1

COM2

BMC CTRL

TPM/Port80

JIPMB1

JPG1

CPU1 SLOT2 PCI-E 3.0 X4(IN X8)

CPU2 SLOT3 PCI-E 3.0 X8

SLOT1 PCI 33MHZ

USB6

JI2C1JI2C2

USB4/5

USB2/3

S-SATA/
SAS0
S-SATA/
SAS1

S-SATA/

SAS2
S-SATA/
SAS3
S-SATA/
SAS4

JPME2

S-SATA/

SAS5

7

1

S-SATA/SAS6

JBT1
S-SATA/
SAS7
I-SATA5
I-SATA4

I-SATA3
I-SATA2
I-SATA1

I-SATA0

JPME1

JBR1

JL1

T-SGPIO1

T-SGPIO2

SGPIO1

SCU-

SGPIO2

CPU2 SLOT4 PCI-E 3.0 X8

JSTBY1

JPB1

J9

CPLD

Intel PCH

BIOS

JWP1

JOH1

FANA

JWD1

JF1(FP Control)

SCU-

LAN CTRL

CPU2 SLOT5 PCI-E 3.0 X8

LED2

JD1

Battery

BT1

JUIDB1

P2-DIMM1D

LAN CTRL

CPU1 SLOT6 PCI-E 3.0 X16

SP1

LED3

FAN5

P2-DIMM1E

P2-DIMM1F

A. OH/Fail/PWR Fail LED (Red)
B. PWR Supply Fail

1920

NMI

X

3.3 V

ID_UID_SW/3/3V Stby

NIC1 Activity LED

NIC2 Activity LED

Red+ (Blue LED Cathode)

3.3V

Reset

Reset Button

Power Button

PWR

2

1

LAN2

LAN1

X9DBL-i/3 (F)

Rev. 1.01

VGA COM1

JPL1
JPL2

FAN4

JVRM_I2C2

USB0/1

IPMI_LAN

JVRM_I2C1

JCPUVRD_SMB

KB/MOUSE

Ground

X

JPW2

FP PWRLED

JPW1

P1-DIMM1C

P1-DIMM1B

P1-DIMM1A

HDD LED

NIC1 Link LED

CPU2

CPU1

A

NIC2 Link LED

Blue+ (OH/Fan Fail/
PWR FaiL/UID LED)

Power Fail LED

B

JPW3

FAN3

JPI2C1

FAN2

FAN1

Ground

Ground

2-23

X9DBL-i/3/iF/3F Motherboard User’s Manual

Reset Button

The Reset Button connection is located
on pins 3 and 4 of JF1. Attach it to a
hardware reset switch on the computer
case. Refer to the table on the right for
pin defi nitions.

Power Button

The Power Button connection is located
on pins 1 and 2 of JF1. Momentarily
contacting both pins will power on/off
the system. This button can also be con­fi gured to function as a suspend button
(with a setting in the BIOS - See Chapter

5). To turn off the power when the system
is in suspend mode, press the button for
4 seconds or longer. Refer to the table on
the right for pin defi nitions.

Reset Button

Pin Defi nitions (JF1)

Pin# Defi nition
3 Reset
4 Ground

Power Button

Pin Defi nitions (JF1)

Pin# Defi nition

1 Signal
2 Ground

A. Reset Button
B. PWR Button

VGA COM1

JPL1
JPL2

LAN2

LAN1

X9DBL-i/3 (F)

Rev. 1.01

CPU2

CPU1

LED1

COM2

BMC CTRL

TPM/Port80

JIPMB1

JPG1

CPU1 SLOT2 PCI-E 3.0 X4(IN X8)

CPU2 SLOT3 PCI-E 3.0 X8

SLOT1 PCI 33MHZ

JSTBY1

USB6

JI2C1JI2C2

USB4/5

USB2/3

S-SATA/
SAS0
S-SATA/
SAS1
S-SATA/
SAS2
S-SATA/
SAS3
S-SATA/
SAS4

JPME2

S-SATA/
SAS5

7

1

S-SATA/SAS6

JBT1
S-SATA/
SAS7
I-SATA5
I-SATA4

I-SATA3
I-SATA2
I-SATA1

I-SATA0

JPME1

JBR1

JL1

T-SGPIO1

T-SGPIO2

SGPIO1

SCU-

SGPIO2

CPU2 SLOT4 PCI-E 3.0 X8

JPB1

J9

CPLD

Intel PCH

BIOS

JWP1

JOH1

LED2

FANA

JWD1

JF1(FP Control)

SCU-

LAN CTRL

CPU2 SLOT5 PCI-E 3.0 X8

BT1

Battery

JD1

JUIDB1

LAN CTRL

CPU1 SLOT6 PCI-E 3.0 X16

SP1

P2-DIMM1D

LED3

FAN5

FAN4

P2-DIMM1E

P2-DIMM1F

FAN3

JVRM_I2C2

USB0/1

IPMI_LAN

JVRM_I2C1

JCPUVRD_SMB

KB/MOUSE

JPW2

Ground

X

FP PWRLED

JPW1

P1-DIMM1C

P1-DIMM1B

P1-DIMM1A

HDD LED

NIC1 Link LED

NIC2 Link LED

Blue+ (OH/Fan Fail/
PWR FaiL/UID LED)

Power Fail LED

JPW3

JPI2C1

FAN2

FAN1

Ground

Ground

1920

NMI

X

3.3 V

ID_UID_SW/3/3V Stby

NIC1 Activity LED

NIC2 Activity LED

Red+ (Blue LED Cathode)

3.3V

Reset

Reset Bu t ton

Power Button

PWR

2

1

A

B

2-24

Chapter 2: Installation

P

I

I

2-7 Connecting Cables

Power Connectors

A 24-pin main power supply connector(JPW1)
and two 8-pin CPU PWR connectors (JPW2/
JPW3) are located on the motherboard.
These power connectors meet the SSI EPS
12V specifi cation. These power connectors
must also be connected to your power
supply. See the table on the right for pin
defi nitions.

Warning: To provide adequate power supply
to the motherboard, be sure to connect the 24­pin ATX PWR (JPW1) and the two 8-pin PWR
connectors (JPW2/JPW3) to the power supply.
Failure to do so will void the manufacturer war­ranty on your power supply and motherboard.

ATX Power 24-pin Connector

Pin Defi nitions

Pin# Defi nition Pin # Defi nition
13 +3.3V 1 +3.3V
14 -12V 2 +3.3V
15 COM 3 COM
16 PS_ON 4 +5V
17 COM 5 COM
18 COM 6 +5V
19 COM 7 COM
20 Res (NC) 8 PWR_OK
21 +5V 9 5VSB
22 +5V 10 +12V
23 +5V 11 +12V
24 COM 12 +3.3V

12V 8-pin PWR Con-

nector

Pin Defi nitions

Pins Defi nition
1 through 4 Ground
5 through 8 +12V

(Required)

JBR1

COM2

TPM/Port80

USB6

USB4/5

USB2/3

JPME2

7

JPME1

T-SG

SLOT1 PCI 33MHZ

S-SATA/
SAS0

S-SATA/
SAS1
S-SATA/

SAS2
S-SATA/
SAS3

S-SATA/

SAS4

S-SATA/

SAS5

1

S-SATA/SAS6

S-SATA/
SAS7

I-SATA5
I-SATA4

I-SATA3

I-SATA2

I-SATA1

I-SATA0

JL1

T-SG

SCU-SGP

LED1

BMC CTRL

JIPMB1

CPU1 SLOT2 PCI-E 3.0 X4(IN X8)

JSTBY1

JI2C1JI2C2

J9

CPLD

JBT1

BIOS

FANA

JWD1

SCU-SGP

JPG1

CPU2 SLOT3 PCI-E 3.0 X8

JPB1

Intel PCH

JWP1

JOH1

JF1(FP Control)

LAN CTRL

CPU2 SLOT4 PCI-E 3.0 X8

CPU2 SLOT5 PCI-E 3.0 X8

LED2

JD1

BT1

Battery

JUIDB1

P2-DIMM1D

LAN CTRL

CPU1 SLOT6 PCI-E 3.0 X16

SP1

LED3

P2-DIMM1E

FAN5

P2-DIMM1F

VGA COM1

FAN4

LAN2

LAN1

X9DBL-i/3 (F)

Rev. 1.01

JPL1
JPL2

JVRM_I2C2

USB0/1

IPMI_LAN

JVRM_I2C1

KB/MOUSE

JCPUVRD_SMB

A. JPW1: 24-pin ATX
PWR (Req'd)
B. JPW2: 8-pin Processor

JPW2

PWR (Req'd)

B

C. JPW3: 8-pin Processor

JPW1

P1-DIMM1A

A

PWR, or

P1-DIMM1C

P1-DIMM1B

(Note: all these power
connectors are required)

CPU2

CPU1

JPW3

C

FAN3

JPI2C1

FAN2

FAN1

2-25

X9DBL-i/3/iF/3F Motherboard User’s Manual

D

E

F

G

Fan Headers

This motherboard has six system/CPU
fan headers (Fan 1~Fan 5 and Fan A)
on the motherboard. All these 4-pin fans
headers are backward compatible with
the traditional 3-pin fans. However, fan
speed control is available for 4-pin fans
only. The fan speeds are controlled by
Thermal Management via Hardware
Monitoring in the Advanced Setting in
the BIOS. (See Chapter 4 for more de­tails.) See the table on the right for pin
defi nitions.

Chassis Intrusion

A Chassis Intrusion header is located
at JL1 on the motherboard. Attach an
appropriate cable from the chassis to
inform you of a chassis intrusion when
the chassis is opened.

Fan Header

Pin Defi nitions

Pin# Defi nition
1 Ground
2 +12V
3 Tachometer
4 PWR Modulation

Chassis Intrusion

Pin Defi nitions

Pin# Defi nition
1 Intrusion Input
2 Ground

JBR1

COM2

TPM/Port80

USB6

USB4/5

USB2/3

JPME2

7

JPME1

T-SGPIO1

SLOT1 PCI 33MHZ

S-SATA/
SAS0

S-SATA/
SAS1
S-SATA/

SAS2
S-SATA/
SAS3

S-SATA/

SAS4

S-SATA/

SAS5

1

S-SATA/SAS6

S-SATA/
SAS7

I-SATA5
I-SATA4

I-SATA3

I-SATA2

I-SATA1

I-SATA0

JL1

T-SGPIO2

SCU-

SGPIO2

LED1

BMC CTRL

JIPMB1

CPU1 SLOT2 PCI-E 3.0 X4(IN X8)

JSTBY1

JI2C1JI2C2

J9

CPLD

JBT1

BIOS

FANA

JWD1

SCU-

SGPIO1

JPG1

CPU2 SLOT3 PCI-E 3.0 X8

JPB1

Intel PCH

JWP1

JOH1

JF1(FP Control)

LAN CTRL

CPU2 SLOT4 PCI-E 3.0 X8

CPU2 SLOT5 PCI-E 3.0 X8

LED2

JD1

BT1

Battery

JUIDB1

P2-DIMM1D

LAN CTRL

CPU1 SLOT6 PCI-E 3.0 X16

SP1

LED3

P2-DIMM1E

FAN5

P2-DIMM1F

VGA COM1

FAN4

LAN2

JPL1
JPL2

LAN1

X9DBL-i/3 (F)

Rev. 1.01

JVRM_I2C2

USB0/1

IPMI_LAN

JVRM_I2C1

KB/MOUSE

JCPUVRD_SMB

JPW2

A. Fan 1
B. Fan 2
C. Fan 3
D. Fan 4
E. Fan A

P1-DIMM1C

P1-DIMM1B

JPW1

P1-DIMM1A

F. Fan B
G. Chassis Intrusion

CPU2

CPU1

JPW3

FAN3

C

JPI2C1

FAN2

B

FAN1

A

2-26

Chapter 2: Installation

1

2

Internal Buzzer

The internal buzzer, located at SP1,
can be used to provide audible indica­tions for various beep codes. See the
table on the right for pin defi nitions.
Refer to the layout below for the loca­tions of the Internal Buzzer.

Overheat/Fan Fail LED

The JOH1 header is used to connect
an LED indi cat or to p rovi de war ni ngs
of chassis overheating and fan failure.
This LED w ill b link w he n a fan f ailu re
occurs. Refer to the tables on right for
pin defi nitions.

Internal Buzzer (SP1)

Pin Defi nition

Pin# Defi nitions
Pin 1 Pos. (+) Beep In
Pin 2 Neg. (-) Alarm

Speaker

OH/Fan Fail LED

Status

State Message
Solid Overheat
Blinking Fan Fail

JBR1

COM2

TPM/Port80

USB6

USB4/5

USB2/3

JPME2

7

JPME1

T-SGPIO

SLOT1 PCI 33MHZ

S-SATA/
SAS0
S-SATA/
SAS1
S-SATA/
SAS2
S-SATA/
SAS3

S-SATA/
SAS4

S-SATA/
SAS5

1

S-SATA/SAS6

S-SATA/
SAS7

I-SATA5
I-SATA4

I-SATA3
I-SATA2
I-SATA1

I-SATA0

JL1

T-SGPIO

SCU-

SGPIO2

LED1

BMC CTRL

JIPMB1

CPU1 SLOT2 PCI-E 3.0 X4(IN X8)

JSTBY1

JI2C1JI2C2

J9

CPLD

JBT1

BIOS

FANA

JWD1

SCU-

SGPIO1

JPG1

CPU2 SLOT3 PCI-E 3.0 X8

JPB1

Intel PCH

JWP1

JOH1

JF1(FP Control)

B

LAN CTRL

CPU2 SLOT4 PCI-E 3.0 X8

CPU2 SLOT5 PCI-E 3.0 X8

LED2

JD1

BT1

Battery

JUIDB1

P2-DIMM1D

LAN CTRL

CPU1 SLOT6 PCI-E 3.0 X16

SP1

A

LED3

P2-DIMM1E

FAN5

P2-DIMM1F

USB0/1

FAN4

LAN2

FAN3

LAN1

X9DBL-i/3 (F)

Rev. 1.01

CPU2

JPL1
JPL2

CPU1

JPI2C1

FAN2

JVRM_I2C2

P1-DIMM1C

IPMI_LAN

JVRM_I2C1

P1-DIMM1B

KB/MOUSE

JCPUVRD_SMB

P1-DIMM1A

FAN1

JPW2

JPW1

JPW3

A. Buzzer (Internal
Speaker)
B. OH LED

2-27

X9DBL-i/3/iF/3F Motherboard User’s Manual

TPM Header/Port 80

A Trusted Platform Module/Port 80
header is located at JTPM1 to provide
TPM support and Port 80 connection.
Use this header to enhance system
performance and data security. See
the table on the right for pin defi ni-
tions.

IPMB

A System Management Bus header
for IPMI 2.0 is located at JIPMB1.
Connect the appropriate cable here
to use the IPMB I

2

C connection on

your system.

TPM/Port 80 Header

Pin Defi nitions

Pin # Defi nition Pin # Defi nition
1 LCLK 2 GND
3 LFRAME# 4 <(KEY)>
5 LRESET# 6 +5V (X)
7 LAD 3 8 LAD 2
9 +3.3V 10 LAD1
11 LAD0 12 GND
13 SMB_CLK4 14 SMB_DAT4
15 +3V_DUAL 16 SERIRQ
17 GND 18 CLKRUN# (X)
19 LPCPD# 20 LDRQ# (X)

IPMB Header

Pin Defi nitions

Pin# Defi nition
1 Data
2 Ground
3 Clock
4 No Connection

B

7

JBR1

T-SGPIO1

COM2

TPM/Port80

SLOT1 PCI 33MHZ

USB6

USB4/5

USB2/3

JPME2

1

JPME1

T-SGPIO2

S-SATA/
SAS0

S-SATA/
SAS1
S-SATA/

SAS2
S-SATA/
SAS3
S-SATA/
SAS4

S-SATA/

SAS5
S-SATA/SAS6

S-SATA/
SAS7

I-SATA5
I-SATA4

I-SATA3
I-SATA2

I-SATA1

I-SATA0

JL1

SCU-

SGPIO2

A

JIPMB1

JSTBY1

JI2C1JI2C2

JBT1

SGPIO1

LED1

BMC CTRL

JPG1

CPU1 SLOT2 PCI-E 3.0 X4(IN X8)

CPU2 SLOT3 PCI-E 3.0 X8

JPB1

J9

CPLD

Intel PCH

BIOS

JWP1

FANA

JWD1

SCU-

JOH1

CPU2 SLOT4 PCI-E 3.0 X8

JF1(FP Control)

LAN CTRL

CPU2 SLOT5 PCI-E 3.0 X8

Battery

LED2

JD1

BT1

LED3

JUIDB1

P2-DIMM1D

LAN CTRL

CPU1 SLOT6 PCI-E 3.0 X16

SP1

P2-DIMM1E

FAN5

P2-DIMM1F

VGA COM1

FAN4

LAN2

FAN3

JPL1
JPL2

LAN1

X9DBL-i/3 (F)

Rev. 1.01

CPU2

CPU1

FAN2

JPI2C1

JVRM_I2C2

P1-DIMM1C

USB0/1

IPMI_LAN

JVRM_I2C1

P1-DIMM1B

KB/MOUSE

JCPUVRD_SMB

P1-DIMM1A

A. TPM/Port 80
Header
B. IPMB

JPW2

JPW1

JPW3

FAN1

2-28

Chapter 2: Installation

Power SMB (I2C) Connector

Power System Management Bus (I
Connector (JPI

2

C1) monitors power

2

C)

supply, fan and system temperatures.
See the table on the right for pin
defi nitions.

Standby Header

A Standby Power header (JSTBY1) is
located next to PCI-E Slot2. Refer to
the layout below for the location.

PWR SMB

Pin Defi nitions

Pin# Defi nition
1 Clock
2 Data

3 PWR Fail
4 Ground
5 +3.3V

JBR1

COM2

TPM/Port80

USB6

USB4/5

USB2/3

JPME2

7

JPME1

T-SGPIO1

SLOT1 PCI 33MHZ

B

S-SATA/
SAS0

S-SATA/
SAS1
S-SATA/

SAS2
S-SATA/
SAS3
S-SATA/
SAS4

S-SATA/

SAS5

1

S-SATA/SAS6

S-SATA/
SAS7

I-SATA5
I-SATA4

I-SATA3
I-SATA2

I-SATA1

I-SATA0

JL1

T-SGPIO2

SCU-

SGPIO2

LED1

BMC CTRL

JIPMB1

CPU1 SLOT2 PCI-E 3.0 X4(IN X8)

JSTBY1

JI2C1JI2C2

J9

CPLD

JBT1

BIOS

FANA

JWD1

SCU-

SGPIO1

JPG1

CPU2 SLOT3 PCI-E 3.0 X8

JPB1

Intel PCH

JWP1

JOH1

JF1(FP Control)

LAN CTRL

CPU2 SLOT4 PCI-E 3.0 X8

CPU2 SLOT5 PCI-E 3.0 X8

LED2

JD1

BT1

Battery

JUIDB1

P2-DIMM1D

LAN CTRL

CPU1 SLOT6 PCI-E 3.0 X16

SP1

LED3

P2-DIMM1E

FAN5

P2-DIMM1F

VGA COM1

FAN4

LAN2

FAN3

JPL1
JPL2

LAN1

X9DBL-i/3 (F)

Rev. 1.01

CPU2

CPU1

FAN2

JPI2C1

JVRM_I2C2

P1-DIMM1C

USB0/1

IPMI_LAN

JVRM_I2C1

P1-DIMM1B

KB/MOUSE

JCPUVRD_SMB

P1-DIMM1A

JPW3

FAN1

A. JPI
B. Standby PWR

JPW2

JPW1

2

C1

A

2-29

X9DBL-i/3/iF/3F Motherboard User’s Manual

D

T-SGPIO 1/2 & SCU-SGPIO 1/2
Headers

Two T-SGPIO (SATA General Purpose
Input/Output) headers (T-SGPIO 1/2) are
located on the motherboard to provide
support to I-SATA/SAS 0~5 and I-SATA
4/5 ports on the motherboard. Addition­ally , SCU-SGPIO 1 header is also located
on the motherboard to provide support
to S-SATA/SAS 0~3 Connections. SCU­SGPIO 2 provides support to SCU-SATA/
SAS 4~7 on X9DBL-3/3F. These headers
support Serial_Link interface for onboard
SATA/SAS connections. See the tables
included here for details.

SCU­SGPIO 1

SCU­SGPIO 2

Serial Link General Purpose I/O Connector 1 for SCU-SATA/
SAS 0~3 (from SCU)

Serial Link General Purpose I/O Connector 2 for SCU-SATA/
SAS 4~7 (from SCU) (For X9DBL-3/3F Only)

T-SGPIO/SCU-SGPIO

Pin Defi nitions

Pin# Defi nition Pin Defi nition
1NC 2 NC
3 Ground 4 Data

5 Load 6 Ground
7 Clock 8 NC

Note: NC= No Connection

T-SGPIO 1 Serial Link General Purpose I/O Connector 1 for I-SATA 0~5
T-SGPIO 2 Serial Link General Purpose I/O Connector 1 for I-SATA 4/5

JBR1

COM2

TPM/Port80

USB6

USB4/5

USB2/3

JPME2

7

JPME1

T-SGPIO1

SLOT1 PCI 33MHZ

S-SATA/
SAS0

S-SATA/
SAS1
S-SATA/

SAS2
S-SATA/
SAS3
S-SATA/
SAS4

S-SATA/

SAS5

1

S-SATA/SAS6

S-SATA/
SAS7

I-SATA5
I-SATA4

I-SATA3
I-SATA2

I-SATA1

I-SATA0

JL1

T-SGPIO2

SGPIO1

SCU-

SGPIO2

LED1

BMC CTRL

JIPMB1

CPU1 SLOT2 PCI-E 3.0 X4(IN X8)

JSTBY1

JI2C1JI2C2

J9

CPLD

JBT1

BIOS

FANA

JWD1

SCU-

JPG1

CPU2 SLOT3 PCI-E 3.0 X8

JPB1

Intel PCH

JWP1

JOH1

JF1(FP Control)

LAN CTRL

CPU2 SLOT4 PCI-E 3.0 X8

CPU2 SLOT5 PCI-E 3.0 X8

LED2

JD1

BT1

Battery

JUIDB1

P2-DIMM1D

LAN CTRL

CPU1 SLOT6 PCI-E 3.0 X16

SP1

LED3

P2-DIMM1E

FAN5

P2-DIMM1F

VGA COM1

FAN4

LAN2

FAN3

JPL1
JPL2

LAN1

X9DBL-i/3 (F)

Rev. 1.01

CPU2

CPU1

FAN2

JPI2C1

JVRM_I2C2

P1-DIMM1C

USB0/1

IPMI_LAN

JVRM_I2C1

P1-DIMM1B

KB/MOUSE

JCPUVRD_SMB

JPW2

JPW1

P1-DIMM1A

JPW3

FAN1

A. T-SGPIO1
B. T-SGPIO2
C. SCU-SGPIO1
D. SCU-SGPIO2
(For X9DBL-3/3F
Only)

A

B

C

2-30

Chapter 2: Installation

Power LED/Speaker

On JD1 header, pins 1-3 are used for
power LED indication, and pins 4-7 are
for the speaker. See the tables on the
right for pin defi nitions. Please note that
the speaker connector pins (4-7) are used
with an external speaker. If you wish to
use the onboard speaker, you should close
pins 6-7 with a jumper.

PWR LED Connector

Pin Defi nitions

Pin Setting Defi nition
Pin 1 Anode (+)
Pin2 Cathode (-)
Pin3 NA

Speaker Connector

Pin Settings

Pin Setting Defi nition
Pins 4-7 External Speaker
Pins 6-7 Internal Speaker

JBR1

COM2

TPM/Port80

USB6

USB4/5

USB2/3

JPME2

7

JPME1

T-SGPIO1

SLOT1 PCI 33MHZ

S-SATA/
SAS0

S-SATA/
SAS1
S-SATA/

SAS2
S-SATA/
SAS3

S-SATA/

SAS4

S-SATA/

SAS5

1

S-SATA/SAS6

S-SATA/
SAS7

I-SATA5
I-SATA4

I-SATA3

I-SATA2

I-SATA1

I-SATA0

JL1

T-SGPIO2

SGPIO1

SCU-

SGPIO2

LED1

BMC CTRL

JIPMB1

JPG1

CPU1 SLOT2 PCI-E 3.0 X4(IN X8)

JSTBY1

JPB1

JI2C1JI2C2

J9

CPLD

JBT1

BIOS

FANA

JWD1

SCU-

CPU2 SLOT3 PCI-E 3.0 X8

Intel PCH

JWP1

JOH1

JF1(FP Control)

LAN CTRL

CPU2 SLOT4 PCI-E 3.0 X8

CPU2 SLOT5 PCI-E 3.0 X8

LED2

JD1

BT1

Battery

A

JUIDB1

P2-DIMM1D

LAN CTRL

CPU1 SLOT6 PCI-E 3.0 X16

SP1

LAN1

X9DBL-i/3 (F)

Rev. 1.01

VGA COM1

JPL1
JPL2

LED3

FAN5

FAN4

P2-DIMM1E

P2-DIMM1F

LAN2

JVRM_I2C2

P1-DIMM1C

USB0/1

IPMI_LAN

JVRM_I2C1

P1-DIMM1B

KB/MOUSE

JCPUVRD_SMB

JPW2

JPW1

P1-DIMM1A

A. PWR LED/Speaker

CPU2

CPU1

JPW3

FAN3

JPI2C1

FAN2

FAN1

2-31

X9DBL-i/3/iF/3F Motherboard User’s Manual

Connector

Pins

Jumper

Cap

Setting

2-8 Jumper Settings

Explanation of Jumpers

To modify the operation of the motherboard,
jumpers can be used to choose between
optional settings. Jumpers create shorts be­tween two pins to change the function of the
connector. Pin 1 is identifi ed with a square
solder pad on the printed circuit board. See
the motherboard layout pages for jumper
locations.

Note: On two pin jumpers, "Closed"
means the jumper is on and "Open"
means th e jumpe r is of f the pi ns.

GLAN Enable/Disable

Use JPL1/JPL2 to enable/disable LAN Ports
1/2. See the table on the right for jumper set­tings. T he defaul t sett ing is Enab led.

3 2 1

3 2 1

Pin 1-2 short

LAN1/2 Enable

Jumper Settings

Jumper Setting Defi nition
1-2 Enabled (default)
2-3 Disabled

7

JBR1

T-SGPIO1

COM2

TPM/Port80

SLOT1 PCI 33MHZ

USB6

USB4/5

USB2/3

JPME2

1

JPME1

T-SGPIO2

S-SATA/
SAS0
S-SATA/
SAS1
S-SATA/
SAS2
S-SATA/
SAS3

S-SATA/
SAS4

S-SATA/
SAS5

S-SATA/SAS6

S-SATA/
SAS7

I-SATA5
I-SATA4

I-SATA3
I-SATA2
I-SATA1

I-SATA0

JL1

SGPIO2

JIPMB1

JSTBY1

JI2C1JI2C2

JBT1

SCU-

SGPIO1

SCU-

LED1

BMC CTRL

JPG1

CPU1 SLOT2 PCI-E 3.0 X4(IN X8)

CPU2 SLOT3 PCI-E 3.0 X8

JPB1

J9

CPLD

Intel PCH

BIOS

JWP1

FANA

JWD1

JOH1

CPU2 SLOT4 PCI-E 3.0 X8

JF1(FP Control)

LAN CTRL

CPU2 SLOT5 PCI-E 3.0 X8

Battery

LED2

JD1

LAN CTRL

BT1

LED3

JUIDB1

P2-DIMM1D

CPU1 SLOT6 PCI-E 3.0 X16

SP1

P2-DIMM1E

FAN5

P2-DIMM1F

VGA COM1

FAN4

LAN2

LAN1

FAN3

A

JPL1
JPL2

B

X9DBL-i/3 (F)

Rev. 1.01

CPU2

CPU1

FAN2

JPI2C1

JVRM_I2C2

P1-DIMM1C

USB0/1

IPMI_LAN

JVRM_I2C1

P1-DIMM1B

KB/MOUSE

JCPUVRD_SMB

P1-DIMM1A

JPW2

JPW1

JPW3

FAN1

A. GLAN1 Enable
B. GLAN2 Enable

2-32

Chapter 2: Installation

CMOS Clear

JBT1 is used to clear CMOS. Instead of pins, this "jumper" consists of contact pads
to prevent acc i d ent a l c le ar i ng o f C M OS . To clear CM O S, u se a m et al o bj e c t suc h
as a small screwdriver to touch both pads at the same time to short the connection.
Always remove the AC power cord from the system before clearing CMOS.

Note 1: For an ATX power supply, you must completely shut down the
system, remove the AC power cord, and then short JBT1 to clear CMOS.

Note 2: Be sure to remove the onboard CMOS Battery before you short
JBT1 to clear CMOS.

Note 3: Clearing CMOS will also clear all passwords.

Watch Dog Enable/Disable

Watch Dog (JWD1) is a system monitor that
can reb o ot t h e sys te m wh e n a s oftwa r e ap p li­catio n ha ng s. Cl os e Pin s 1-2 to re set t he sy s ­tem if an appl ic ati on h ang s. Cl ose Pi ns 2- 3 to
generate a n on-maskab le interrupt sig nal for

Jumper Setting Defi nition
Pins 1-2 Reset (default)
Pins 2-3 NMI
Open Disabled

Watch Dog

Jumper Settings

the application that hangs. See the table on
the ri ght fo r jum per s et ti ngs . Watch D og mu st
also be enabled in the BIOS.

JBR1

COM2

TPM/Port80

USB6

USB4/5

USB2/3

JPME2

7

JPME1

T-SGPIO1

SLOT1 PCI 33MHZ

S-SATA/
SAS0

S-SATA/
SAS1
S-SATA/

SAS2
S-SATA/
SAS3
S-SATA/
SAS4

S-SATA/

SAS5

1

S-SATA/SAS6

S-SATA/
SAS7

I-SATA5
I-SATA4

I-SATA3
I-SATA2

I-SATA1

I-SATA0

JL1

T-SGPIO2

SCU-

SGPIO2

LED1

BMC CTRL

JIPMB1

CPU1 SLOT2 PCI-E 3.0 X4(IN X8)

JSTBY1

JI2C1JI2C2

J9

CPLD

JBT1

A

BIOS

B

FANA

JWD1

SCU-

SGPIO1

JPG1

CPU2 SLOT3 PCI-E 3.0 X8

JPB1

Intel PCH

JWP1

JOH1

JF1(FP Control)

LAN CTRL

CPU2 SLOT4 PCI-E 3.0 X8

CPU2 SLOT5 PCI-E 3.0 X8

LED2

JD1

BT1

Battery

LED3

JUIDB1

P2-DIMM1D

LAN CTRL

CPU1 SLOT6 PCI-E 3.0 X16

SP1

P2-DIMM1E

FAN5

P2-DIMM1F

VGA COM1

FAN4

LAN2

FAN3

LAN1

X9DBL-i/3 (F)

Rev. 1.01

CPU2

JPL1
JPL2

CPU1

FAN2

JPI2C1

JVRM_I2C2

P1-DIMM1C

USB0/1

IPMI_LAN

JVRM_I2C1

P1-DIMM1B

KB/MOUSE

JCPUVRD_SMB

P1-DIMM1A

FAN1

A. Clear CMOS
B. Watch Dog Enable

JPW2

JPW1

JPW3

2-33

X9DBL-i/3/iF/3F Motherboard User’s Manual

VGA Enable

Jumper JPG1 allows the user to en­able the onboard VGA connectors. The
default setting is 1-2 to enable the con­nection. See the table on the right for
jumper settings.

BMC Enable

Jumper JPB1 allows you to enable the
embedded the Nuvoton WPCM450R
BMC (Baseboard Management) Control­ler to provide IPMI 2.O/KVM support on
the motherboard. See the table on the
right for jumper settings.

VGA Enable

Jumper Settings

Jumper Setting Defi nition
1-2 Enabled (Default)
2-3 Disabled

BMC Enable

Jumper Settings

Jumper Setting Defi nition
Pins 1-2 BMC Enable
Pins 2-3 Normal (Default)

7

JBR1

T-SGPIO1

COM2

TPM/Port80

SLOT1 PCI 33MHZ

USB6

USB4/5

USB2/3

JPME2

1

JPME1

T-SGPIO2

S-SATA/
SAS0

S-SATA/
SAS1
S-SATA/

SAS2
S-SATA/
SAS3
S-SATA/
SAS4

S-SATA/

SAS5
S-SATA/SAS6

S-SATA/
SAS7

I-SATA5
I-SATA4

I-SATA3
I-SATA2

I-SATA1

I-SATA0

JL1

SCU-

SGPIO2

JIPMB1

JSTBY1

JI2C1JI2C2

JBT1

SGPIO1

LED1

BMC CTRL

A

JPG1

CPU1 SLOT2 PCI-E 3.0 X4(IN X8)

CPU2 SLOT3 PCI-E 3.0 X8

JPB1

B

J9

CPLD

Intel PCH

BIOS

JWP1

FANA

JWD1

SCU-

JOH1

CPU2 SLOT4 PCI-E 3.0 X8

JF1(FP Control)

LAN CTRL

CPU2 SLOT5 PCI-E 3.0 X8

Battery

LED2

JD1

BT1

JUIDB1

P2-DIMM1D

LAN CTRL

CPU1 SLOT6 PCI-E 3.0 X16

SP1

LED3

FAN5

FAN4

P2-DIMM1E

P2-DIMM1F

LAN2

FAN3

JPL1
JPL2

LAN1

X9DBL-i/3 (F)

Rev. 1.01

CPU2

VGA COM1

CPU1

FAN2

JPI2C1

JVRM_I2C2

P1-DIMM1C

USB0/1

IPMI_LAN

JVRM_I2C1

P1-DIMM1B

KB/MOUSE

JCPUVRD_SMB

JPW2

JPW1

P1-DIMM1A

JPW3

FAN1

A. VGA Enabled
B. BMC Enabled

2-34

Chapter 2: Installation

Management Engine (ME) Recovery

Use Jumper JPME1 to select ME Firm­ware Recovery mode, which will limit
resource allocation for essential system
operation only in order to maintain nor­mal power operation and management.
In the single operation mode, online
upgrade will be available via Recovery
mode. See the table on the right for
jumper settings.

Manufacturer Mode Select

Close Pin 2 and Pin 3 of Jumper JPME2
to bypass SPI fl ash security and force
the system to operate in the Manufac­turer mode, allowing the user to fl ash
the system fi rmware from a host server
for system setting modifi cations. See the
table on the right for jumper settings.

ME Recovery

Jumper Settings

Jumper Setting Defi nition
1-2 Normal (Default)
2-3 ME Recovery

ME Mode Select

Jumper Settings

Jumper Setting Defi nition
1-2 Normal (Default)
2-3 Manufacture Mode

JBR1

COM2

TPM/Port80

USB6

USB4/5

USB2/3

JPME2

7

JPME1

T-SGPIO1

SLOT1 PCI 33MHZ

S-SATA/
SAS0

S-SATA/
SAS1
S-SATA/

SAS2
S-SATA/
SAS3
S-SATA/
SAS4

B

S-SATA/

SAS5

1

S-SATA/SAS6

S-SATA/
SAS7

I-SATA5
I-SATA4

I-SATA3
I-SATA2

I-SATA1

I-SATA0

A

JL1

T-SGPIO2

SCU-

SGPIO2

LED1

BMC CTRL

JIPMB1

CPU1 SLOT2 PCI-E 3.0 X4(IN X8)

JSTBY1

JI2C1JI2C2

J9

CPLD

JBT1

BIOS

FANA

JWD1

SCU-

SGPIO1

JPG1

CPU2 SLOT3 PCI-E 3.0 X8

JPB1

Intel PCH

JWP1

JOH1

JF1(FP Control)

LAN CTRL

CPU2 SLOT4 PCI-E 3.0 X8

CPU2 SLOT5 PCI-E 3.0 X8

LED2

JD1

BT1

Battery

LED3

JUIDB1

P2-DIMM1D

LAN CTRL

CPU1 SLOT6 PCI-E 3.0 X16

SP1

P2-DIMM1E

FAN5

P2-DIMM1F

VGA COM1

FAN4

LAN2

FAN3

LAN1

X9DBL-i/3 (F)

Rev. 1.01

CPU2

JPL1
JPL2

CPU1

FAN2

JPI2C1

JVRM_I2C2

P1-DIMM1C

USB0/1

IPMI_LAN

JVRM_I2C1

P1-DIMM1B

KB/MOUSE

JCPUVRD_SMB

P1-DIMM1A

FAN1

A. JPME1

B. JPME2

JPW2

JPW1

JPW3

2-35

X9DBL-i/3/iF/3F Motherboard User’s Manual

D

I2C Bus to PCI-Exp. Slots

Jumpers JI2C1 and JI2C2 allow you
to connect the System Management

2

Bus (I

C) to PCI-Express slots. The
default setting is Open to disable the
connection. See the table on the right
for jumper settings.

I2C Bus to CPU1/CPU2 VRMs

Use Jumpers JVRM_I2C1/JVRM_I2C2
to connect the System Management
Buses (I
The default setting for the X9DBL-3F/
iF is on Pins 1-2 to enable the con­nection. The default setting for the
X9DBL-3/i is on Pins 2-3 to enable
the connection. See the table on the
right for jumper settings.

2

C) to CPU1/CPU2 VRMs.

I2C to PCI-Exp

Jumper Settings

Jumper Setting Defi nition
Closed Enabled
Open Disabled (Default)

I2C to VRMs (for X9DBL-3F/iF)

Jumper Settings

Jumper Setting Defi nition
Pins 1-2 Enabled (Default)

I2C to VRMs (for X9DBL-3/i)

Jumper Settings

Jumper Setting Defi nition
Pins 2-3 Enabled (Default)

JBR1

COM2

TPM/Port80

USB6

USB4/5

USB2/3

JPME2

7

JPME1

T-SGPIO1

SLOT1 PCI 33MHZ

S-SATA/
SAS0

S-SATA/
SAS1
S-SATA/

SAS2
S-SATA/
SAS3
S-SATA/
SAS4

S-SATA/

SAS5

1

S-SATA/SAS6

S-SATA/
SAS7

I-SATA5
I-SATA4

I-SATA3
I-SATA2

I-SATA1

I-SATA0

JL1

T-SGPIO2

SCU-

SGPIO2

LED1

BMC CTRL

JIPMB1

CPU1 SLOT2 PCI-E 3.0 X4(IN X8)

JSTBY1

B

JI2C1JI2C2

A

J9

CPLD

JBT1

BIOS

FANA

JWD1

SCU-

SGPIO1

JPG1

CPU2 SLOT3 PCI-E 3.0 X8

JPB1

Intel PCH

JWP1

JOH1

JF1(FP Control)

LAN CTRL

CPU2 SLOT4 PCI-E 3.0 X8

CPU2 SLOT5 PCI-E 3.0 X8

LED2

JD1

BT1

Battery

JUIDB1

P2-DIMM1D

LAN CTRL

CPU1 SLOT6 PCI-E 3.0 X16

SP1

LED3

P2-DIMM1E

FAN5

P2-DIMM1F

VGA COM1

FAN4

LAN2

FAN3

JPL1
JPL2

LAN1

X9DBL-i/3 (F)

Rev. 1.01

CPU2

CPU1

FAN2

JPI2C1

JVRM_I2C2

P1-DIMM1C

USB0/1

IPMI_LAN

JVRM_I2C1

P1-DIMM1B

KB/MOUSE

C

JCPUVRD_SMB

P1-DIMM1A

FAN1

JPW2

JPW1

JPW3

2

A. JI

C1

2

B. JI

C2

C. JVRM_I

2

C1

C. JVRM_I2C2

2-36

2-9 Onboard LED Indicators

GLAN LEDs

Link LED

Chapter 2: Installation

Activity LED

The LAN 1/2 ports are located on the IO
Backplane. Each Ethernet LAN port has
two LEDs. The Yellow LED on the right
indicates activity. The Link LED on the left
may be green, amber or off to indicate the
speed. See the tables at right for more
information.

IPMI Dedicated LAN LEDs

In addition to the Gigabit Ethernet ports, an
IPMI Dedicated LAN is also located above
the Backplane USB ports 0/1 on the X9DBL­iF/3F motherboard. The amber L ED on the
right indicates activity, while the green LED
on the lef t indic ates the spee d of the con ­nection. See the tables at right for more
information.

Rear View (when facing the
rear side of the chassis)

GLAN Activity Indicator (Left)

LED Settings

Color Status Defi nition
Yellow Flashing Active

GLAN Link Indicator

LED Settings

LED Color Defi nition
Off No Connection, 10 Mbps
Green 100 Mbps
Amber 1 Gbps

IPMI LAN

Link LED Activity LED

IPMI LAN Link LED (Left) &

Activity LED (Right)

Color/State Defi nition
Link (Left) Green: Solid 100 Mbps
Activity (Right) Amber: Blinking Active

JBR1

TPM/Port80

USB4/5

USB2/3

7

T-SGPIO1

COM2

SLOT1 PCI 33MHZ

USB6

JPME2

1

JPME1

T-SGPIO2

S-SATA/
SAS0
S-SATA/
SAS1
S-SATA/
SAS2
S-SATA/
SAS3
S-SATA/
SAS4

S-SATA/
SAS5
S-SATA/SAS6

S-SATA/
SAS7

I-SATA5

I-SATA4

I-SATA3
I-SATA2
I-SATA1

I-SATA0

JL1

SGPIO2

SCU-

LED1

BMC CTRL

JIPMB1

CPU1 SLOT2 PCI-E 3.0 X4(IN X8)

JSTBY1

JI2C1JI2C2

J9

CPLD

JBT1

BIOS

FANA

JWD1

SCU-

SGPIO1

JPG1

CPU2 SLOT3 PCI-E 3.0 X8

JPB1

Intel PCH

JWP1

JOH1

JF1(FP Control)

CPU2 SLOT4 PCI-E 3.0 X8

LED2

LAN CTRL

CPU2 SLOT5 PCI-E 3.0 X8

BT1

Battery

JD1

JUIDB1

P2-DIMM1D

LAN CTRL

CPU1 SLOT6 PCI-E 3.0 X16

SP1

A

LED3

FAN5

FAN4

P2-DIMM1E

P2-DIMM1F

LAN2

JPL1
JPL2

LAN1

X9DBL-i/3 (F)

Rev. 1.01

CPU2

VGA COM1

CPU1

JVRM_I2C2

B

P1-DIMM1C

USB0/1

IPMI_LAN

JVRM_I2C1

P1-DIMM1B

KB/MOUSE

JCPUVRD_SMB

P1-DIMM1A

JPW2

JPW1

A. Ethernet Port
LEDs
B. IPMI LAN LEDs

B

JPW3

FAN3

JPI2C1

FAN2

FAN1

A

2-37

X9DBL-i/3/iF/3F Motherboard User’s Manual

Onboard Power LED

An Onboard Power LED is located at
LED2 on the motherboard. When this
LED is on, the system is on. Be sure to
turn off the system and unplug the power
cord before removing or installing com­ponents. See the tables at right for more
information.

Rear UID LED

The rear U ID LED is l ocate d at LED3 on
the rear of the motherboard. This LED
is used in conjunction with the rear UID
switch to provide easy identifi cation of a
system that might be in need of service.
Refer to UID Switch on Page 3-15 for
more information.

Onboard PWR LED Indicator (LE1)

LED Settings

LED Color Status
Off System Off (PWR cable

not connected)
Green System On
Green:

ACPI S1 State
Flashing
Quickly

Green:

ACPI S3 (STR) State
Flashing
Slowly

UID LED

Status

Color/State OS Status
Blue: On Windows OS Unit Identifi ed
Blue:

Linux OS Unit Identifi ed

Blinking

7

JBR1

T-SGPIO1

COM2

TPM/Port80

SLOT1 PCI 33MHZ

USB6

USB4/5

USB2/3

JPME2

1

JPME1

T-SGPIO2

S-SATA/
SAS0

S-SATA/
SAS1
S-SATA/

SAS2
S-SATA/
SAS3
S-SATA/
SAS4

S-SATA/

SAS5
S-SATA/SAS6

S-SATA/
SAS7

I-SATA5
I-SATA4

I-SATA3
I-SATA2

I-SATA1

I-SATA0

JL1

SCU-

SGPIO2

JIPMB1

JSTBY1

JI2C1JI2C2

JBT1

SGPIO1

LED1

BMC CTRL

JPG1

CPU1 SLOT2 PCI-E 3.0 X4(IN X8)

CPU2 SLOT3 PCI-E 3.0 X8

JPB1

J9

CPLD

Intel PCH

BIOS

JWP1

FANA

JWD1

SCU-

JOH1

CPU2 SLOT4 PCI-E 3.0 X8

A

JF1(FP Control)

LAN CTRL

CPU2 SLOT5 PCI-E 3.0 X8

Battery

LED2

JD1

BT1

JUIDB1

P2-DIMM1D

LAN CTRL

CPU1 SLOT6 PCI-E 3.0 X16

SP1

B

LED3

FAN5

FAN4

P2-DIMM1E

P2-DIMM1F

LAN2

FAN3

JPL1
JPL2

LAN1

X9DBL-i/3 (F)

Rev. 1.01

CPU2

VGA COM1

CPU1

FAN2

JPI2C1

JVRM_I2C2

P1-DIMM1C

USB0/1

IPMI_LAN

JVRM_I2C1

P1-DIMM1B

KB/MOUSE

JCPUVRD_SMB

JPW2

JPW1

P1-DIMM1A

JPW3

FAN1

A. PWR LED
B. Rear UID LED

2-38

Chapter 2: Installation

BMC Heartbeat LED

A BMC Heartbeat LED is located at
LED1 on the motherboard. When LED1
is blink ing, B MC f unct ion s nor mally. See
the tab le at right f or more i nform ation.

BMC Heartbeat LED

Status

Color/State Defi nition
Green:

BMC: Normal

Blinking

JBR1

COM2

TPM/Port80

USB6

USB4/5

USB2/3

JPME2

7

JPME1

T-SGPIO1

SLOT1 PCI 33MHZ

S-SATA/
SAS0

S-SATA/
SAS1
S-SATA/

SAS2
S-SATA/
SAS3

S-SATA/

SAS4

S-SATA/

SAS5

1

S-SATA/SAS6

S-SATA/
SAS7

I-SATA5
I-SATA4

I-SATA3

I-SATA2

I-SATA1

I-SATA0

JL1

T-SGPIO2

SCU-

SGPIO2

LED1

A

BMC CTRL

JIPMB1

CPU1 SLOT2 PCI-E 3.0 X4(IN X8)

JSTBY1

JI2C1JI2C2

J9

CPLD

JBT1

BIOS

FANA

JWD1

SCU-

SGPIO1

JPG1

CPU2 SLOT3 PCI-E 3.0 X8

JPB1

Intel PCH

JWP1

JOH1

JF1(FP Control)

LAN CTRL

CPU2 SLOT4 PCI-E 3.0 X8

CPU2 SLOT5 PCI-E 3.0 X8

LED2

JD1

BT1

Battery

JUIDB1

P2-DIMM1D

LAN CTRL

CPU1 SLOT6 PCI-E 3.0 X16

SP1

LED3

P2-DIMM1E

FAN5

P2-DIMM1F

VGA COM1

FAN4

LAN2

LAN1

X9DBL-i/3 (F)

Rev. 1.01

JPL1
JPL2

JVRM_I2C2

P1-DIMM1C

USB0/1

IPMI_LAN

JVRM_I2C1

P1-DIMM1B

KB/MOUSE

JCPUVRD_SMB

P1-DIMM1A

A. BMC Heaer­beat LED

JPW2

JPW1

CPU2

CPU1

JPW3

FAN3

JPI2C1

FAN2

FAN1

2-39

X9DBL-i/3/iF/3F Motherboard User’s Manual

2-10 Serial ATA Connections

Serial ATA Ports

There are six Serial AT A Ports (I-SAT A0~I­SATA 5) loc ated on the mothe rboard, in­cludin g four SATA2 por ts and t wo SATA3
ports. These ports provide serial-link
signal connections, which are faster than
the co nnectio ns of Parallel ATA. Se e the
table o n the ri ght for p in defi nitions.

SCU-SATA/SAS Ports

Four Serial_LInk ports (SCU-SATA/SAS
0~3) from Intel SCU are located on the
motherboard. Additionally, another four
Serial_ Link ports (SCU-SATA /SAS 4~7)
are located on the X9DBL-3/3F. These
Serial_ Link conne ctions provi de onboard
seria l link interf ace. See the t able on the
right fo r pin defi nitions.

SATA/SAS

Pin Defi nitions

Pin# Defi nition
1 Ground
2 TX_P
3 TX_N
4 Ground
5 RX_N
6 RX_P
7 Ground

JBR1

COM2

TPM/Port80

USB6

USB4/5

USB2/3

JPME2

7

JPME1

T-SGPIO1

SLOT1 PCI 33MHZ

S-SATA/
SAS0
S-SATA/
SAS1

S-SATA/

SAS2
S-SATA/
SAS3
S-SATA/
SAS4

B

S-SATA/

SAS5

1

S-SATA/SAS6

S-SATA/
SAS7

I-SATA5
I-SATA4

I-SATA3
I-SATA2

A

I-SATA1

I-SATA0

JL1

T-SGPIO2

SCU-

SGPIO2

LED1

BMC CTRL

JIPMB1

CPU1 SLOT2 PCI-E 3.0 X4(IN X8)

JSTBY1

JI2C1JI2C2

J9

CPLD

JBT1

BIOS

FANA

JWD1

SCU-

SGPIO1

Note: For more information on SATA HostRAID confi guration, please refer
to the Intel SATA HostRAID User's Guide posted on our Website @ http://
www.supermicro.com.

JPG1

CPU2 SLOT3 PCI-E 3.0 X8

JPB1

Intel PCH

JWP1

JOH1

JF1(FP Control)

LAN CTRL

CPU2 SLOT4 PCI-E 3.0 X8

CPU2 SLOT5 PCI-E 3.0 X8

LED2

JD1

BT1

Battery

JUIDB1

P2-DIMM1D

LAN CTRL

CPU1 SLOT6 PCI-E 3.0 X16

SP1

LED3

P2-DIMM1E

FAN5

P2-DIMM1F

VGA COM1

FAN4

LAN2

FAN3

LAN1

X9DBL-i/3 (F)

Rev. 1.01

CPU2

JPL1
JPL2

CPU1

FAN2

JPI2C1

JVRM_I2C2

P1-DIMM1C

USB0/1

IPMI_LAN

JVRM_I2C1

P1-DIMM1B

KB/MOUSE

JCPUVRD_SMB

JPW1

P1-DIMM1A

JPW3

FAN1

A. I-SATA0~5
B. SCU-SA T A/
SAS 0~3, 4~7

JPW2

(S-SATA/SAS
4~7 are for
X9DBL-3/3F
only)

2-40

Chapter 3: Troubleshooting

Chapter 3

Troubleshooting

3-1 Troubleshooting Procedures

Use the following procedures to troubleshoot your system. If you have followed all
of the procedures below and still need assistance, refer to the ‘Technical Support
Procedures’ and/or ‘Returning Merchandise for Service’ section(s) in this chapter.

Warning: Always disconnect the power cord before adding, changing or installing any
hardware components.

Before Power On

1. Make sure that there are no short circuits between the motherboard and
chassis.

2. Disconnect all ribbon/wire cables from the motherboard, including keyboard
and mouse cables.

3. Remove all add-on cards.

4. Install CPU 1 fi rst (-making sure it is fully seated), and connect the front panel
connectors to the motherboard.

No Power

1. Make sure that there are no short circuits between the motherboard and the
chassis.

2. Make sure that the ATX power connectors are properly connected.

3. Check that the 115V/230V switch on the power supply is properly set, if avail­able.

4. Turn the power switch on and off to test the system, if applicable.

5. The battery on your motherboard may be old. Check to verify that it still sup­plies ~3VDC. If it does not, replace it with a new one.

3-1

X9DBL-i/3/iF/3F Motherboard User’s Manual

No Video

1. If the power is on, but you have no video, remove all add-on cards and
cables.

2. Use the speaker to determine if any beep codes exist. Refer to Appendix A
for details on beep codes.

System Boot Failure

If the system does not display POST or does not respond after the power is turned
on, check the following:

1. Check for any error beeps from the motherboard speaker.

• If there is no error beep, try to turn on the system without any DIMM module

installed. If there is still no error beep, try to turn on the system again with only
one processor installed in CPU Socket#1. If there is still no error beep, replace
the motherboard.

• If there are error beeps, clear the CMOS setting by unplugging the power cord

and contacting both pads on the CMOS Clear Jumper (JBT1). (Refer to Sec­tion 2-8 in Chapter 2.)

2. Remove all components from the motherboard, especially the DIMM mod­ules. Make sure that the system's power is on, and memory error beeps are
activated.

3. Turn on the system with only one DIMM module installed. If the system boots,
check for bad DIMM modules or slots by following the procedure of memory­error troubleshooting in this chapter.

Losing the System’s Setup Confi guration

1. Make sure that you are using a high quality power supply. A poor quality
power supply may cause the system to lose the CMOS setup information.
Refer to Section 2-7 for details on recommended power supplies.

2. The battery on your motherboard may be old. Check to verify that it still sup­plies ~3VDC. If it does not, replace it with a new one.

3. If the steps indicated above do not fi x setup confi guration problems, contact
your vendor for repairs.

3-2

Chapter 3: Troubleshooting

Memory Errors

When a No_Memory_Beep_Code is issued by the system, check the following:

1. Make sure that the memory modules are compatible with the system and that
the DIMM modules are properly and fully installed. (For memory compatibility,
refer to the Memory Compatibility Chart posted on our website at http://www.
supermicro.com.)

2. Check if different speeds of DIMMs have been installed. It is strongly recom­mended that you use the memory modules of the same speed and same type
for all DIMMs in the system.

3. Make sure that you are using the correct type of Reduced/Load Reduced
ECC or Unbuffered ECC/Non-ECC DDR3 DIMM modules recommended by
the manufacturer.

4. Check for bad DIMM modules or slots by swapping a single module among
all memory slots and check the results.

5. Make sure that all memory modules are fully seated in their slots. Follow the
instructions given in Section 2-4 in Chapter 2.

6. Please follow the instructions given in the DIMM Population Tables listed in
Section 2-4 to install your memory modules.

When the System Becomes Unstable

A. The system becomes unstable during or after OS system installation

When the system becomes unstable during or after OS system installation, check
the following:

1. CPU/BIOS support: Make sure that your CPU is supported, and you have the
latest BIOS installed in your system.

2. Memory support: Make sure that the memory modules are supported by test­ing the modules using memtest86 or a similar utility.

Note: Refer to the product page on our website at http://www.supermicro.
com for memory and CPU support and updates.

3. HDD support: Make sure that all hard disk drives (HDDs) work properly. Re­place the bad HDDs with good ones.

3-3

X9DBL-i/3/iF/3F Motherboard User’s Manual

4. System cooling: Check system cooling to make sure that all cooling fans and
system fans work properly. Check Hardware Monitoring settings in the BIOS
to make sure that the CPU and System temperatures are within the normal
range. Also check the front panel Overheat LED, and make sure that the
Overheat LED is not on.

5. Adequate power supply: Make sure that the power supply provides adequate
power to the system. Make sure that all power connectors are connected.
Please refer to our website for more information on minimum power require­ment.

6. Proper software support: Make sure that the correct disk drivers are used.

B. The system becomes unstable before or during OS installation

When the system becomes unstable before or during OS installation, check the
following:

1. Source of installation: Make sure that the devices used for installation are
working properly, including boot devices such as CD/DVD disc, CD/DVD­ROM.

2. Cable connection: Check to make sure that all cables are connected and
working properly.

3. Using minimum confi guration for troubleshooting: Remove all unnecessary
components (-starting with add-on cards fi rst), and use minimum confi gura-
tion (with a CPU and a memory module installed) to identify the problematic
areas. Refer to the steps listed in Section A above for proper troubleshooting
procedures.

4. Identifying bad components by isolating them: If necessary, remove a compo­nent in question from the chassis, and test it in isolation to make sure that it
works properly. Replace a bad component with a good one.

5. Check and change one component at a time instead of changing several
items at the same time. This will help isolate and identify the problem.

6. To fi nd out if a component is good, swap the component with a new one to
see if the system will work properly. If so, then the old component is bad. You
can also install the component in another system. If the new system works,
the component is good and the old system has problems.

3-4

Chapter 3: Troubleshooting

3-2 Technical Support Procedures

Before contacting Technical Support, please take the following steps. Also, please
note that as a motherboard manufacturer, Supermicro also sells motherboards
through its channels, so it is best to fi rst check with your distributor or reseller for
troubleshooting services. They should know of any possible problem(s) with the
specifi c system confi guration that was sold to you.

1. Please go through the ‘Troubleshooting Procedures’ and 'Frequently Asked
Question' (FAQ) sections in this chapter or see the FAQs on our website
(

http://www.supermicro.com/) before contacting Technical Support.

2. BIOS upgrades can be downloaded from our website

com

).

3. If you still cannot resolve the problem, include the following information when
contacting Supermicro for technical support:

(http://www.supermicro.

• Motherboard model and PCB revision number

• BIOS release date/version (This can be seen on the initial display when your

system fi rst boots up.)

• System confi guration

4. An example of a Technical Support form is on our website at

supermicro.com).

(http://www.

• Distributors: For immediate assistance, please have your account number ready

when placing a call to our technical support department. We can be reached by
e-mail at [e-mail].

3-5

X9DBL-i/3/iF/3F Motherboard User’s Manual

3-3 Battery Removal and Installation

Battery Removal

To remove the onboard battery, follow the steps below:

1. Power off your system and unplug your power cable.

2. Locate the onboard battery.

3. Using a tool such as a pen or a small screwdriver, push the battery lock out­wards to unlock it. Once unlocked, the battery will pop out from the holder.

4. Remove the battery.

Proper Battery Disposal

Warning: Please handle used batteries carefully. Do not damage the battery in any

way; a damaged battery may release hazardous materials into the environment. Do
not discard a used battery in the garbage or a public landfi ll. Please comply with the
regulations set up by your local hazardous waste management agency to dispose of
your used battery properly.

Battery Installation

1. To install an onboard battery, follow the steps 1 & 2 above and continue
below:

2. Identify the battery's polarity. The positive (+) side should be facing up.

3. Insert the battery into the battery holder and push it down until you hear a
click to ensure that the battery is securely locked.

Warning: When replacing a battery, be sure to only replace it with the same type.

OR

3-6

Chapter 3: Troubleshooting

3-4 Frequently Asked Questions

Que sti on: Wh at a re th e var iou s t ype s of m emo r y th at my mo th er boa rd c an
support?

Answer: The motherboard supports Registered/Load Reduced ECC or Unbuffered

ECC/Non-ECC DDR3 DIMM modules. To enhance memory performance, do not mix
memory modules of different speeds and sizes. Please follow all memory installation
instructions given on Section 2-4 in Chapter 2.

Que stio n: How do I u pda te my BI OS?

It is recommended that you do not upgrade your BIOS if you are not experiencing
any problems with your system. Updated BIOS fi les are located on our website
at

http://www.supermicro.com. Please check our BIOS warning message and the

information on how to update your BIOS on our website. Select your motherboard
model and download the BIOS fi le to your computer. Also, check the current BIOS
revision to make sure that it is newer than your BIOS before downloading. You can
choose from the zip fi le and the .exe fi le. If you choose the zip BIOS fi le, please
unzip the BIOS fi le onto a bootable USB device. Run the batch fi le using the format
AMI.bat fi lename.rom from your bootable USB device to fl ash the BIOS. Then, your
system will automatically reboot.

Warning: Do not shut down or reset the system while updating the BIOS to prevent
possible system boot failure!)

Note: The SPI BIOS chip used on this motherboard cannot be removed.

Send your motherboard back to our RMA Department at Supermicro for
repair. For BIOS Recovery instructions, please refer to the AMI BIOS
Recovery Instructions posted at http://

Question: H ow do I ha ndl e the u sed ba tt er y?
Answer: Please handle used batteries carefully. Do not damage the battery in any

way; a damaged battery may release hazardous materials into the environment. Do
not discard a used battery in the garbage or a public landfi ll. Please comply with the
regulations set up by your local hazardous waste management agency to dispose
of your used battery properly. (Refer to Section 3-3 on Page 3-6.)

www.supermicro.com.

3-7

X9DBL-i/3/iF/3F Motherboard User’s Manual

3-5 Returning Merchandise for Service

A receipt or copy of your invoice marked with the date of purchase is required before
any warranty service will be rendered. You can obtain service by calling your ven­dor for a Returned Merchandise Authorization (RMA) number. When returning the
motherboard to the manufacturer, the RMA number should be prominently displayed
on the outside of the shipping carton, and the shipping package is mailed prepaid
or hand-carried. Shipping and handling charges will be applied for all orders that
must be mailed when service is complete. For faster service, You can also request
a RMA authorization online (http://

This warranty only covers normal consumer use and does not cover damages in­curred in shipping or from failure due to the alternation, misuse, abuse or improper
maintenance of products.

During the warranty period, contact your distributor fi rst for any product problems.

www.supermicro.com).

3-8

Chapter 4: AMI BIOS

Chapter 4

BIOS

4-1 Introduction

This chapter describes the AMI BIOS Setup utility for the X9DBL-i/3/iF/3F. It also
provides the instructions on how to navigate the AMI BIOS Setup utility screens.
The AMI ROM BIOS is stored in a Flash EEPROM and can be easily updated.

Starting BIOS Setup Utility

To enter the AMI BIOS Setup utility screens, press the <Del> key while the system
is booting up.

Note: In most cases, the <Del> key is used to invoke the AMI BIOS setup
screen. There are a few cases when other keys are used, such as <F3>,
<F4>, etc.

Each main BIOS menu option is described in this manual. The Main BIOS setup
menu screen has two main frames. The left frame displays all the options that can
be confi gured. Grayed-out options cannot be confi gured. Options in blue can be
confi gured by the user. The right frame displays the key legend. Above the key
legend is an area reserved for informational text. When an option is selected in the
left frame, it is highlighted in white. Often, informational text about the option will
display on the right.

Note: The AMI BIOS has default informational messages built in. The
manufacturer retains the option to include, omit, or change any of these
informational messages.

The AMI BIOS Setup utility uses a key-based navigation system called "hot keys."
Most of the AMI BIOS setup utility "hot keys" can be used at any time during setup
navigation. These keys include <F3>, <F4>, <Enter>, <ESC>, arrow keys, etc.

Note 1: In this section, options printed in Bold are default settings.
Note 2: <F3> is used to load optimal default settings. <F4> is used to save

the settings and exit the setup utility.

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X9DBL-i/3/iF/3F Motherboard User’s Manual

How To Change the Confi guration Data

The confi guration data that determines the system parameters may be changed by
entering the AMI BIOS Setup utility. This Setup utility can be accessed by pressing
<Delete> at the appropriate time during system boot.

Note: For AMI UEFI BIOS Recovery, please refer to the UEFI BIOS Re­covery User Guide posted @http://www.supermicro.com/support/manuals/.

Starting the Setup Utility

Normally, the only visible Power-On Self-Test (POST) routine is the memory test.
As the memory is being tested, press the <Delete> key to enter the main menu of
the AMI BIOS Setup utility. From the main menu, you can access the other setup
screens. An AMI BIOS identifi cation string is displayed at the left bottom corner of
the screen below the copyright message.

Warning: Do not upgrade the BIOS unless your system has a BIOS-related issue. Flash­ing the wrong BIOS can cause irreparable damage to the system. In no event shall the
manufacturer be liable for direct, indirect, special, incidental, or consequential damage
arising from a BIOS update. If you have to update the BIOS, do not shut down or reset
the system while the BIOS is being updated to avoid possible boot failure.

4-2 Main Setup

When you fi rst enter the AMI BIOS Setup utility , you will enter the Main setup screen.
You can always return to the Main setup screen by selecting the Main tab on the
top of the screen. The Main BIOS Setup screen is shown below.

The AMI BIOS main menu displays the following information:

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Chapter 4: AMI BIOS

System Date/System Time

Use this option to change the system time and date. Highlight System Time or
System Date using the arrow keys. Enter new values through the keyboard and

press <Enter>. Press the <Tab> key to move between fi elds. The date must be
entered in Day MM/DD/YY format. The time is entered in HH:MM:SS format. (Note:
The time is in the 24-hour format. For example, 5:30 P.M. appears as 17:30:00.).

Supermicro X9DBL-3F/X9DBL-iF

Version

This item displays the SMC version of the BIOS ROM used in this system.

Build Date

This item displays the date that the BIOS ROM was built.

Memory Information

Total Memory

This displays the amount of memory that is available in the system.

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X9DBL-i/3/iF/3F Motherboard User’s Manual

4-3 Advanced Setup Confi gurations

Use the arrow keys to select Advanced Setup and press <Enter> to access the
following submenu items.

Boot Features

Quiet Boot

This feature allows the user to select bootup screen display between POST mes­sages and the OEM logo. Select Disabled to display the POST messages. Select
Enabled to display the OEM logo instead of the normal POST messages. The op­tions are Enabled and Disabled.

AddOn ROM Display Mode

Use this item to set the display mode for the Option ROM. Select Keep Current to
use the current AddOn ROM Display setting. Select Force BIOS to use the Option
ROM display mode set by the system BIOS. The options are Force BIOS and
Keep Current.

Bootup Num-Lock

Use this fe ature to set the Powe r-on state for t he Numloc k key. T he options a re
Of f and On.

Wait For 'F1' If Error

Selec t Enabl ed to fo rce t he system t o wait unt il the ' F1' key is pressed i f an er ror
occu rs. Th e optio ns are Di sable d and Enabled.

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Chapter 4: AMI BIOS

Interrupt 19 Capture

Interrupt 19 is the software interrupt that handles the boot disk function. When this
item is set to Enabled, the ROM BIOS of the host adaptors will "capture" Interrupt 19
at bootup and allow the drives that are attached to these host adaptors to function
as bootable disks. If this item is set to Disabled, the ROM BIOS of the host adap­tors will not capture Interrupt 19, and the drives attached to these adaptors will not
function as bootable devices. The options are Enabled and Disabled.

Re-try Boot

If this item is enabled, the BIOS will automatically attempt to boot from a specifi ed
boot devic e again a fter i ts initi al failu re to boot . The defau lt sett ing is Disabled.

Power Confi guration

Watch Dog Function

If enabled, the Watch Dog timer will allow the system to automatically reboot when
a non- re cove rab le er ro r oc cur s th at last s for m ore t han fi ve minutes. The options
are Enabl ed and Disabled.

Power Button Function

If this feature is set to Instant Off, the system will power off immediately as soon
as the user presses the power button. If this feature is set to 4 Seconds Override,
the system will power off when the user presses the power button for 4 seconds or
longer. The options are Instant Off and 4 Seconds Override.

Restore on AC Power Loss

Use this feature to set the power state after a power outage. Select Stay Off for the
system power to remain off after a power loss. Select Power On for the system
power to be turned on after a power loss. Select Last State to allow the system
to resume its last state before a power loss. The options are Power On, Stay Off,
and Last State.

CPU Confi guration

This submenu displays the information of the CPU as detected by the BIOS. It also
allows the user to confi gure CPU settings.

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Socket 1 CPU Information/Socket 2 CPU Information

This submenu displays the following information regarding the CPUs installed
in Socket 1/ Socket 2.

• Type of CPU

• CPU Signature

• Microcode Patch

• CPU Stepping

• Maximum CPU Speed

• Minimum CPU Speed

• Processor Cores

• Intel HT (Hyper-Threading) Technology

• Intel VT-x Technology

• Intel SMX Technology

• L1 Data Cache

• L1 Code Cache

• L2 Cache

• L3 Cache

CPU Speed
This item displays the speed of the CPU installed in Socket 1/Socket 2.

64-bit
This item indicates if the CPU installed in Socket 1 or Socket 2 supports 64-bit

technology.

Clock Spread Spectrum

Select Enable to enable Clock Spectrum support, which will allow the BIOS to moni­tor and attempt to reduce the level of Electromagnetic Interference caused by the
components whenever needed. The options are Disabled and Enabled.

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Chapter 4: AMI BIOS

RTID (Record Types IDs)

This feature displays the total number of Record Type IDs for local and remote
pools. The options are Optimal and Alternate.

Hyper-threading

Select Enabled to support Intel Hyper-threading Technology to enhance CPU per­formance. The options are Enabled and Disabled.

Active Processor Cores

Set to Enabled to use a processor's second core and above. (Please refer to Intel's
website for more information.) The options are All, 1, and 2.

Limit CPUID Maximum

This feature allows the user to set the maximum CPU ID value. Enable this function
to boot the legacy operating systems that cannot support processors with extended
CPUID functions. The options are Enabled and Disabled (for the Windows OS).

Execute-Disable Bit (Available if supported by the OS & the CPU)

Select Enabled to enable the Execute Disable Bit which will allow the processor
to designate areas in the system memory where an application code can execute
and where it cannot, thus preventing a worm or a virus from fl ooding illegal codes
to overwhelm the processor or damage the system during an attack. The default is

Enabled. (Refer to Intel and Microsoft Web sites for more information.)

Intel® AES-NI

Select Enable to use the Intel Advanced Encryption Standard (AES) New Instruc­tions (NI) to ensure data security. The options are Enabled and Disabled.

MLC Streamer Prefetcher (Available when supported by the CPU)

If set to Enabled, the MLC (mid-level cache) streamer prefetcher will prefetch
streams of data and instructions from the main memory to the L2 cache to improve
CPU performance. The options are Disabled and Enabled.

MLC Spatial Prefetcher (Available when supported by the CPU)

If this feature is set to Disabled, The CPU prefetches the cache line for 64 bytes.
If this feature is set to Enabled the CPU fetches both cache lines for 128 bytes as
comprised. The options are Disabled and Enabled.

DCU Streamer Prefetcher (Available when supported by the CPU)

Select Enabled to support Data Cache Unit (DCU) prefetch of L1 data to speed
up data accessing and processing in the DCU to enhance CPU performance. The
options are Disabled and Enabled.

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X9DBL-i/3/iF/3F Motherboard User’s Manual

DCU IP Prefetcher

Select Enabled for DCU (Data Cache Unit) IP Prefetcher support, which will prefetch
IP addresses to improve network connectivity and system performance. The options
are Enabled and Disabled.

Intel® Virtualization Technology (Available when supported by the CPU)

Select Enabled to support Intel Virtualization Technology, which will allow one
platf orm to r un mult iple op erati ng system s and app licat ions i n indep endent p ar ti­tions, creating multiple "virtual" systems in one physical computer. The options
are Enabled and Disabled.

Note: If there is any change to this setting, you will need to power off and
restar t the system for the chang e to take effect. Please refer to Intel’s
website for d etaile d inform ation.)

 CPU Power Management Confi guration

This submenu allows the user to confi gure the following CPU Power Management
settings.

Power Technology

Select Energy Effi ciency to support power-saving mode. Select Custom to cus-
tomize system power settings. Select Disabled to disable power-saving settings.
The options are Disabled, Energy Effi cient, and Custom. If the option is set to
Custom, the following items will display:

EIST (Available when Power Technology is set to Custom)

EIST (Enhanced Intel SpeedStep Technology) allows the system to au­tomatically adjust processor voltage and core frequency to reduce power
consumption and heat dissipation. The options are Disabled (GV3 Disabled),
and Enabled (GV3 Enabled). (Note: GV3 is Intel Speedstep support used
on older platforms. Please refer to Intel’s website for detailed information.)

C1E Support (Available when Power Technology is set to Custom)

Select Enabled to enable Enhanced C1 Power State to boost system per­formance. The options are Enabled and Disabled.

CPU C3 Report (Available when Power Technology is set to Custom)

Select Enabled to allow the BIOS to report the CPU C3 State (ACPI C2) to
the operating system. During the CPU C3 State, the CPU clock generator
is turned off. The options are Enabled and Disabled.

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Chapter 4: AMI BIOS

CPU C6 Report (Available when Power Technology is set to Custom)

Select Enabled to allow the BIOS to report the CPU C6 State (ACPI C3) to
the operating system. During the CPU C6 State, the power to all cache is
turned off. The options are Enabled and Disabled.

CPU C7 Report (Available when Power Technology is set to Custom)

Select Enabled to allow the BIOS to report the CPU C7 State (ACPI C3) to
the operating system. CPU C7 State is a processor-specifi c low C-State.
The options are Enabled and Disabled.

Package C-State limit (Available when Power Technology is set to
Custom)

This feature allows the user to set the limit on the C-State package register.
The options are C0, C2, C6, and No Limit.

Energy Performance Bias

Use this feature to select an appropriate fan setting to achieve maximum system
performance (with maximum cooling) or maximum energy effi ciency with maxi-
mum power saving). The fan speeds are controlled by the fi rmware management
via IPMI 2.0. The options are Performance, Balanced Performance, Balanced
Energy, and Energy Effi cient.

Factory Long Duration Power Limit

This item displays the power limit (in watts) set by the manufacturer during which
long duration power is maintained.

Long Duration Power Limit

This item displays the power limit (in watts) set by the user during which long
duration power is maintained. The default setting is 0.

Factory Long Duration Maintained

This item displays the period of time (in seconds) set by the manufacturer during
which long duration power is maintained.

Long Duration Maintained

This item displays the period of time (in seconds) during which long duration
power is maintained. The default setting is 0.

Recommended Short Duration Power Limit

This item displays the short duration power settings (in watts) recommended by
the manufacturer.

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X9DBL-i/3/iF/3F Motherboard User’s Manual

Short Duration Power Limit

During Turbo Mode, the system may exceed the processors default power set­ting and exceed the Short Duration Power limit. By increasing this value, the
processsor can provide better performance for short duration. This fi gure shows
the period of time in during which short duration power (in watts) is maintained.
The default setting is 0.

Chipset Confi guration

North Bridge

This feature allows the user to confi gure the settings for the Intel North Bridge.

Integrated IO Confi guration

Intel® VT-d

Select Enabled to enable Intel Virtualization Technology support for Direct I/O
VT-d

by reporting the I/O device assignments to the VMM (Virtual Machine

Monitor) through the DMAR ACPI Tables. This feature offers fully-protected I/O
resource sharing across Intel platforms, providing greater reliability, security
and availability in networking and data-sharing. The options are Enabled and
Disabled.

®

Intel

I/OAT

Select Enabled to enable Intel I/OAT (I/O Acceleration Technology), which sig­nifi cantly reduces CPU overhead by leveraging CPU architectural improvements
and freeing the system resource for other tasks. The options are Disabled and

Enabled.

DCA Support

When set to Enabled, this feature uses Intel's DCA (Direct Cache Access)
Technology to improve data transfer effi ciency. The options are Enabled and
Disabled.

IIO 1 PCIe Port Bifurcation Control

This submenu confi gures the following IO PCIe Port Bifurcation Control settings
for IIO 1 PCIe ports to determine how the available PCI-Express lanes to be
distributed between the PCI-Exp. Root Ports.

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Chapter 4: AMI BIOS

Port 1B Link Speed

Select GEN1 to enable PCI-Exp Generation 1 support for Port 1B. Select GEN2
to enable PCI-Exp Generation 2 support for Port 1B. Select GEN3 to enable
PCI-Exp Generation 3 support for Port 1B. The options are GEN1, GEN2, and

GEN3.

Port 3A Link Speed

Select GEN1 to enable PCI-Exp Generation 1 support for Port 3A. Select GEN2
to enable PCI-Exp Generation 2 support for Port 3A. Select GEN3 to enable
PCI-Exp Generation 3 support for Port 3A. The options are GEN1, GEN2, and

GEN3.

IIO 1 PCIe Port Data Direct I/O Control

This feature confi gures the following IO PCIe port data direct I/O control settings
for IIO 1 PCIe ports. Intel's Data Direct I/O control allows direct data transfer
between the host processor cache and the Ethernet controllers/adaptors. This
direct communication greatly reduces trips to the main memory, which increases
performance while also lowering power consumption.

Port 0A

This feature allows the user to enable Data Direct I/O control for the port speci-

fi ed. The options are Enabled and Disabled.

Port 1A, Port 1B, Port 2A, Port 2B, Port 3A

This feature allows the user to enable Data Direct I/O control for the ports speci-

fi ed. The options are Enabled and Disabled.

Port 3C Link Speed

Select GEN1 to enable PCI-Exp Generation 1 support for Port 3C. Select GEN2
to enable PCI-Exp Generation 2 support for Port 3C. Select GEN3 to enable
PCI-Exp Generation 3 support for Port 3C. The options are GEN1, GEN2, and

GEN3.

IIO 2 PCIe Port Bifurcation Control

This submenu confi gures the following IO PCIe Port Bifurcation Control settings
for IIO 2 PCIe ports to determine how the available PCI-Express lanes to be
distributed between the PCI-Exp. Root Ports.

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X9DBL-i/3/iF/3F Motherboard User’s Manual

Port 1A Link Speed

Select GEN1 to enable PCI-Exp Generation 1 support for Port 1A. Select GEN2
to enable PCI-Exp Generation 2 support for Port 1A. Select GEN3 to enable
PCI-Exp Generation 3 support for Port 1A. The options are GEN1, GEN2, and

GEN3.

Port 3A Link Speed

Select GEN1 to enable PCI-Exp Generation 1 support for Port 3A. Select GEN2
to enable PCI-Exp Generation 2 support for Port 3A. Select GEN3 to enable
PCI-Exp Generation 3 support for Port 3A. The options are GEN1, GEN2, and

GEN3.

Port 3C Link Speed

Select GEN1 to enable PCI-Exp Generation 1 support for Port 3C. Select GEN2
to enable PCI-Exp Generation 2 support for Port 3C. Select GEN3 to enable
PCI-Exp Generation 3 support for Port 3C. The options are GEN1, GEN2, and

GEN3.

IIO 2 PCIe Port Data Direct I/O Control

This feature confi gures the following IO PCIe port data direct I/O control settings
for IIO 2 PCIe ports. Intel's Data Direct I/O control allows direct data transfer
between the host processor cache and the Ethernet controllers/adaptors. This
direct communication greatly reduces trips to the main memory, which increases
performance while also lowering power consumption.

Port 0A

This feature allows the user to enable Data Direct I/O control for the port speci-

fi ed. The options are Enabled and Disabled.

Port 1A, Port 1B, Port 2A, Port 2B, Port 3A

This feature allows the user to enable Data Direct I/O control for the ports speci­fi ed. The options are Enabled and Disabled.

QPI Confi guration

Current QPI Link Speed

This item displays the current status of the QPI Link.

Current QPI Link Frequency

This item displays the frequency of the QPI Link.

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Chapter 4: AMI BIOS

Isoc

Select Enabled to enable Isochronous support to meet QoS (Quality of Service)
requirements. This feature is especially important for virtualization technology.
The options are Enabled and Disabled.

QPI (Quick Path Interconnect) Link Speed Mode

Use this feature to select data transfer speed for QPI Link connections. The
options are Fast and Slow.

QPI Link Frequency Select

Use this feature to select the desired QPI frequency. The options are Auto, 6.4
GT/s, 7.2 GT/s, and 8.0 GT/s.

DIMM Confi guration

This section displays the following DIMM information.

Current Memory Mode

This item displays the current memory mode.

Current Memory Speed

This item displays the current memory speed.

Mirroring

This item displays if memory mirroring is supported by the motherboard. Memory
mirroring creates a duplicate copy of the data stored in the memory to enhance
data security.

Sparing

This item displays if memory sparing is supported by the motherboard. Memory
sparing enhances system performance.

DIMM Information

CPU Socket 1 DIMM Information/ CPU Socket 2 DIMM Information

The status of the memory modules detected by the BIOS will be displayed as
detected by the BIOS.

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X9DBL-i/3/iF/3F Motherboard User’s Manual

Memory Mode

When Independent is selected, all DIMMs are available to the operating system.
When Mirroring is selected, the motherboard maintains two identical copies of all
data in memory for data backup. When Lockstep is selected, the motherboard
uses two areas of memory to run the same set of operations in parallel. The
options are Independent, Mirroring, and Lockstep.

DRAM RAPL Mode

RAPL (Running Average Power Limit) provides mechanisms to enforce power
consumption limits on supported processors The options are DRAM RAPL
MODE0 , DRAM RAPL MODE1, and Disabled.

DDR Speed

Use this feature to force a DDR3 memory module to run at a frequency other
than what is specifi ed by the manufacturer. The options are Auto, Force DDR3-
800, Force DDR3-1066, Force DDR3-1333, Force DDR3-1600 and Force SPD.

Channel Interleaving

This feature selects from the different channel interleaving methods. The options
are Auto, 1 Way, 2 Way, 3, Way, and 4 Way.

Rank Interleaving

This feature allows the user to select a rank memory interleaving method. The
options are Auto, 1 Way, 2 Way, 4, Way, and 8 Way.

Patrol Scrub

Patrol Scrubbing is a process that allows the CPU to correct correctable memory
errors detected on a memory module and send the correction to the requestor
(the original source). When this item is set to Enabled, the IO hub will read and
write back one cache line every 16K cycles, if there is no delay caused by internal
processing. By using this method, roughly 64 GB of memory behind the IO hub
will be scrubbed every day. The options are Enabled and Disabled.

Demand Scrub

Demand Scrubbing is a process that allows the CPU to correct correctable
memory errors found on a memory module. When the CPU or I/O issues a
demand-read command, and the read data from memory turns out to be a
correctable error, the error is corrected and sent to the requestor (the original
source). Memory is updated as well. Select Enabled to use Demand Scrubbing
for ECC memory correction. The options are Enabled and Disabled.

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Chapter 4: AMI BIOS

Data Scrambling

Select Enabled to enable data scrambling to ensure data security and integrity.
The options are Disabled and Enabled.

Device Tagging

Select Enabled to support device tagging. The options are Disabled and En­abled.

Thermal Throttling

Throttling improves reliability and reduces power consumption in the proces­sor via automatic voltage control during processor idle states. The options are
Disabled and CLTT (Closed Loop Thermal Throttling).

South Bridge Confi guration

This feature allows the user to confi gure the settings for the Intel PCH chip.

PCH Information

This feature displays the following PCH information.

Name: This item displays the name of the PCH chip.

Stepping: This item displays the PCH stepping.

USB Devices: This item displays the USB devices detected by the BIOS.

All USB Devices

This feature enables all USB ports/devices. The options are Disabled and Enabled.
(If set to Enabled, EHCI Controller 1 and Controller 2 will appear.)

EHCI Controller 1/EHCI Controller 2 (Available when All USB Devices is set
to Enabled)

Select Enabled to enable EHCI (Enhanced Host Controller Interface) Controller 1
or Controller 2. The options are Disabled and Enabled.

Legacy USB Support (Available when USB Functions is not Disabled)

Select Enabled to support legacy USB devices. Select Auto to disable legacy sup­port if USB devices are not present. Select Disabled to have USB devices available
for EFI (Extensive Firmware Interface) applications only. The settings are Disabled,
Enabled and Auto.

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X9DBL-i/3/iF/3F Motherboard User’s Manual

Port 60/64 Emulation

Select Enabled to enable I/O port 60h/64h emulation support for the legacy USB
keyboard so that it can be fully supported by the operating systems that does not
recognize a USB device. The options are Disabled and Enabled.

EHCI Hand-Off

This item is for operating systems that do not support Enhanced Host Controller
Interface (EHCI) hand-off. When enabled, EHCI ownership change will be claimed
by the EHCI driver. The options are Disabled and Enabled.

SATA Confi guration

When this submenu is selected, the AMI BIOS automatically detects the presence
of IDE or SATA devices and displays the following items.

SATA Port0~SATA Port5: The AMI BIOS displays the status of each SATA port
as detected by the BIOS.

SATA Mode

Use this feature to confi gure SATA mode for a selected SATA port. The options are
Disabled, IDE Mode, AHCI Mode and RAID Mode. The following are displayed
depending on your selection:

IDE Mode

The following items are displayed when IDE Mode is selected:

Serial-ATA (SATA) Controller 0~1

Use this feature to activate or deactivate the SATA controller, and set the
compatibility mode. The options are Disabled, Enhanced, and Compatible.
The default for SATA Controller 0 is Compatible. The default of SATA Con­troller 1 is Enhanced.

AHCI Mode

The following items are displayed when the AHCI Mode is selected.

Aggressive Link Power Management

When Enabled, the SATA AHCI controller manages the power usage of
the SATA link. The controller will put the link in a low power mode during
extended periods of I/O inactivity, and will return the link to an active state
when I/O activity resumes. The options are Enabled and Disabled.

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Chapter 4: AMI BIOS

Port 0~5 Hot Plug
Select Enabled to enable hot-plug support for a particular port, which will

allow the user to change a hardware component or device without shutting
down the system. The options are Enabled and Disabled.

Staggered Spin Up

Select Enabled to enable Staggered Spin-up support to prevent excessive
power consumption caused by multiple HDDs spinning-up simultaneously.
The options are Enabled and Disabled.

RAID Mode

The following items are displayed when RAID Mode is selected:

Port 0~5 Hot Plug

Select Enabled to enable hot-plug support for the particular port. The options
are Enabled and Disabled.

SCU (Storage Control Unit) Confi guration

Storage Controller Unit

Select Enabled to enable PCH SCU storage devices. The options are Disabled
and Enabled.

OnChip SCU Option ROM

Select Enabled to support the onboard SCU Option ROM to boot up the system via
a storage device. The options are Disabled and Enabled.

SCU Port 0~SCU Port 7: The AMI BIOS will automatically detect the onboard SCU
devices and display the status of each SCU device as detected.

Note: X9DBL-iF boards only support SATA drives. X9DBL-3F boards sup­port both SATA and SAS drives.

PCIe/PCI/PnP Confi guration

PCI ROM Priority

Use this feature to select the Option ROM to boot the system when there are mul­tiple Option ROMs available in the system. The options are EFI Compatible ROM
and Legacy ROM.

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X9DBL-i/3/iF/3F Motherboard User’s Manual

PCI Latency Timer

Use this feature to set the latency Timer of each PCI device installed on a PCI bus.
Select 64 to set the PCI latency to 64 PCI clock cycles. The options are 32, 64, 96,
128, 160, 192, 224 and 248.

Above 4G Decoding (Available if the system supports 64-bit PCI decoding)

Select Enabled to decode a PCI device that supports 64-bit in the space above 4G
Address. The options are Enabled and Disabled.

PERR# Generation

Select Enabled to allow a PCI device to generate a PERR number for a PCI Bus
Signal Error Event. The options are Enabled and Disabled.

SERR# Generation

Select Enabled to allow a PCI device to generate an SERR number for a PCI Bus
Signal Error Event. The options are Enabled and Disabled.

Maximum Payload

Select Auto to allow the system BIOS to automatically set the maximum payload
value for a PCI-E device to enhance system performance. The options are Auto,
128 Bytes and 256 Bytes.

Maximum Read Request

Select Auto to allow the system BIOS to automatically set the maximum Read
Request size for a PCI-E device to enhance system performance. The options are

Auto, 128 Bytes, 256 Bytes, 512 Bytes, 1024 Bytes, 2048 Bytes, and 4096 Bytes.

ASPM Support

This feature allows the user to set the Active State Power Management (ASPM)
level for a PCI-E device. Select Force L0s to force all PCI-E links to operate at L0s
state. Select Auto to allow the system BIOS to automatically set the ASPM level for
the system. Select Disabled to disable ASPM support. The options are Disabled,
Force L0s, and Auto.

Warning: Enabling ASPM support may cause some PCI-E devices to fail!

PCI Slot 1 OPROM, CPU1 Slot 2 PCI-E 3.0 x4 OPROM, CPU2 Slot 3 PCI-E

3.0 x8 OPROM, CPU2 Slot 4 PCI-E 3.0 x8 OPROM, CPU2 Slot 5 PCI-E 3.0 x8
OPROM, CPU1 Slot 6 PCI-E 3.0 x16 OPROM

Selec t Enabled to en able Opti on ROM supp ort to boot the computer using a de­vice installed on the slots specifi ed above. The options are Enabled and Disabled.

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Chapter 4: AMI BIOS

Onboard LAN Option ROM Select

Selec t iSC S I to use t he i SC SI O pti on RO M to b oot t he c om pute r usi ng a networ k
device. S ele ct PXE (Preboot Execution Environment) t o use an PXE O pti on RO M
to boot the c omp uter usin g a netw ork dev ice. Th e optio ns are iSC SI and PXE.

Load Onboard LAN1 Option ROM/Load Onboard LAN2 Option ROM

Select Enabled to enable the onboard LAN1 Option ROM~LAN2 Option ROM. This
is to boot the computer using a network device. The default set ting f or L AN1 Op ­tion ROM is Enabled, and the default s et tin g for LAN 2 Op tio n ROM i s Disabled.

Load Onboard SAS Option ROM

Selec t Enabled to use the S AS Option ROM to boot the computer using a SAS
device. The options a re Enabled and Disabled.

VGA Priority

This feature allows the user to select the graphics adapter to be used as the primary
boot device. The options are Onboard, and Offboard.

Super IO Confi guration

Super IO Chip: This item displays the Super IO chip used in the motherboard.

Serial Port 1 Confi guration

Serial Port
Select Enabled to enable a serial port specifi ed by the user. The options are En-

abled and Disabled.

Device Settings

This item displays the settings of Serial Port 1.

Change Settings

This option specifi es the base I/O port address and the Interrupt Request address of
Serial Port 1. Select Disabled to prevent the serial port from accessing any system
resources. When this option is set to Disabled, the serial port becomes unavailable.
The options are Auto, IO=3F8h; IRQ=4; IO=3F8h; IRQ=3, 4, 5, 6, 7, 9, 10, 11, 12;
IO=2F8h; IRQ=3, 4, 5, 6, 7, 9, 10, 11, 12; IO=3E8h; IRQ=3, 4, 5, 6, 7, 9, 10, 11,
12; and IO=2E8h; IRQ=3, 4, 5, 6, 7, 9, 10, 11, 12;

Device Mode

Use this feature to select the desired mode for a serial port specifi ed. The options
are Normal and High Speed.

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Serial Port 2 Confi guration

Serial Port
Select Enabled to enable a serial port specifi ed by the user. The options are En-

abled and Disabled.

Device Settings

This item displays the settings of Serial Port 2.

Change Settings

This option specifi es the base I/O port address and the Interrupt Request address of
Serial Port 1. Select Disabled to prevent the serial port from accessing any system
resources. When this option is set to Disabled, the serial port becomes unavailable.
The options are Auto, IO=3F8h; IRQ=4; IO=3F8h; IRQ=3, 4, 5, 6, 7, 9, 10, 11, 12;
IO=2F8h; IRQ=3, 4, 5, 6, 7, 9, 10, 11, 12; IO=3E8h; IRQ=3, 4, 5, 6, 7, 9, 10, 11,
12; and IO=2E8h; IRQ=3, 4, 5, 6, 7, 9, 10, 11, 12;

Device Mode

Use this feature to select the desired mode for a serial port specifi ed. The options
are Normal and High Speed.

Serial Port 2 Attribute

Use this feature to select the attribute for serial port 2. The options are SOL (Serial
Over LAN), and COM.

Serial Port Console Redirection

COM 1/COM 2

These two submenus allow the user to confi gure the following Console Redirection
settings for a COM Port specifi ed by the user.

Console Redirection

Select Enabled to use a COM Port selected by the user for Console Redirection.
The options are Enabled and Disabled. The default setting for COM1 is Disabled,
and for COM2 is Enabled.

Console Redirection Settings

This feature allows the user to specify how the host computer will exchange data
with the client computer, which is the remote computer used by the user.

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Terminal Type

This feature allows the user to select the target terminal emulation type for Con­sole Redirection. Select VT100 to use the ASCII Character set. Select VT100+ to
add color and function key support. Select ANSI to use the Extended ASCII Char­acter Set. Select VT-UTF8 to use UTF8 encoding to map Unicode characters
into one or more bytes. The options are ANSI, VT100, VT100+, and VT-UTF8.

Bits Per second

Use this feature to set the transmission speed for a serial port used in Console
Redirection. Make sure that the same speed is used in the host computer and the
client computer. A lower transmission speed may be required for long and busy
lines. The options are 9600, 19200, 38400, 57600 and 115200 (bits per second).

Data Bits

Use this feature to set the data transmission size for Console Redirection. The
options are 7 Bits and 8 Bits.

Parity

A parity bit can be sent along with regular data bits to detect data transmission
errors. Select Even if the parity bit is set to 0, and the number of 1's in data bits
is even. Select Odd if the parity bit is set to 0, and the number of 1's in data bits
is odd. Select None if you do not want to send a parity bit with your data bits
in transmission. Select Mark to add a mark as a parity bit to be sent along with
the data bits. Select Space to add a Space as a parity bit to be sent with your
data bits. The options are None, Even, Odd, Mark and Space.

Stop Bits

A stop bit indicates the end of a serial data packet. Select 1 Stop Bit for standard
serial data communication. Select 2 Stop Bits if slower devices are used. The
options are 1 and 2.

Flow Control

This feature allows the user to set the fl ow control for Console Redirection to
prevent data loss caused by buffer overfl ow. Send a "Stop" signal to stop send-
ing data when the receiving buffer is full. Send a "Start" signal to start sending
data when the receiving buffer is empty. The options are None and Hardware
RTS/CTS.

VT-UTF8 Combo Key Support

Select Enabled to enable VT-UTF8 Combination Key support for ANSI/VT100
terminals. The options are Enabled and Disabled.

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Recorder Mode

Select Enabled to capture the data displayed on a terminal and send it as text
messages to a remote server. The options are Disabled and Enabled.

Resolution 100x31

Select Enabled for extended-terminal resolution support. The options are Dis­abled and Enabled.

Legacy OS Redirection Resolution

Use this feature to select the number of rows and columns used in Console
Redirection for legacy OS support. The options are 80x24 and 80x25.

Putty KeyPad

This feature selects Function Keys and KeyPad settings for Putty, which is a
terminal emulator designed for the Windows OS. The options are VT100, LINUX,
XTERMR6, SC0, ESCN, and VT400.

Serial Port for Out-of-Band Management/Windows Emergency Management
Services (EMS)

The submenu allows the user to confi gure Console Redirection settings to support
Out-of-Band Serial Port management.

Console Redirection (for EMS)

Select Enabled to use a COM Port selected by the user for Console Redirection.
The options are Enabled and Disabled.



Console Redirection Settings (for EMS)

This feature allows the user to specify how the host computer will exchange
data with the client computer, which is the remote computer used by the user.

Out-of-Band Management Port

The feature selects a serial port used by the Microsoft Windows Emergency
Management Services (EMS) to communicate with a remote server. The options
are COM1 and COM2.

Terminal Type

This feature allows the user to select the target terminal emulation type for Con­sole Redirection. Select VT100 to use the ASCII character set. Select VT100+
to add color and function key support. Select ANSI to use the extended ASCII
character set. Select VT-UTF8 to use UTF8 encoding to map Unicode characters
into one or more bytes. The options are ANSI, VT100, VT100+, and VT-UTF8.

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Chapter 4: AMI BIOS

Bits Per Second

This item sets the transmission speed for a serial port used in Console Redirec­tion. Make sure that the same speed is used in the host computer and the client
computer. A lower transmission speed may be required for long and busy lines.
The options are 9600, 19200, 57600, and 115200 (bits per second).

Flow Control

This feature allows the user to set the fl ow control for Console Redirection to
prevent data loss caused by buffer overfl ow. Send a "Stop" signal to stop send-
ing data when the receiving buffer is full. Send a "Start" signal to start sending
data when the receiving buffer is empty. The options are None, Hardware RTS/
CTS, and Software Xon/Xoff.

Data Bits, Parity, Stop Bits

The status of these featres is displayed.

ACPI Settings

Use this feature to confi gure Advanced Confi guration and Power Interface (ACPI)
power management settings for your system.

ACPI Sleep State

Use this feature to select the ACPI State when the system is in sleep mode. Select
S1 (CPU Stop Clock) to erase all CPU caches and stop executing instructions.
Power to the CPU(s) and RAM is maintained, but RAM is refreshed. Select Sus­pend Disabled to use power-reduced mode. Power will only be supplied to limited
components (such as RAMs) to maintain the most critical functions of the system.
The options are S1 (CPU Stop Clock), and Suspend Disabled.

NUMA (NON-Uniform Memory Access)

This feature enables the Non-Uniform Memory Access ACPI support. The options
are Enabled and Disabled.

High Precision Event Timer

Select Enabled to activate the High Precision Event Timer (HPET) that produces
periodic interrupts at a much higher frequency than a Real-time Clock (RTC) does
in synchronizing multimedia streams, providing smooth playback, reducing the de­pendency on other timestamp calculation devices, such as an x86 RDTSC Instruc­tion embedded in the CPU. The High Performance Event Timer is used to replace
the 8254 Programmable Interval Timer. The options are Enabled and Disabled.

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Trusted Computing (A vailable when a TPM device is detected
by the BIOS)

Confi guration

TPM Support

Select Enabled on this item and enable the TPM jumper on the motherboard to
enable TPM support to improve data integrity and network security. The options
are Enabled and Disabled.

TPM State

Select Enabled to enable TPM security settings to improve data integrity and
network security. The options are Disabled and Enabled.

Pending Operation

Use this item to schedule an operation for the security device. The options are

None, Enable Take Ownership, Disable Take Ownership, and TPM Clear.

Note: During restart, the computer will reboot in order to execute the pend-

ing operation and change the state of the security device.

Current Status Information: This item displays the information regarding the
current TPM status.

TPM Enable Status

This item displays the status of TPM Support to indicate if TPM is currently
enabled or disabled.

TPM Active Status

This item displays the status of TPM Support to indicate if TPM is currently ac­tive or deactivated.

TPM Owner Status

This item displays the status of TPM Ownership.

Intel TXT (LT-SX) Confi guration

Intel TXT (LT-SX) Hardware Support

This feature indicates if the following hardware components support the Intel
Trusted Execution Technology.

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Chapter 4: AMI BIOS

CPU: TXT (Trusted Execution Technology) Feature

Chipset: TXT (Trusted Execution Technology) Feature

Intel TXT (LT-SX) Confi guration

This feature displays the following TXT confi guration setting.

TXT (L T -SX) Support: This item indicates if the Intel TXT support is enabled
or disabled. The default setting is Disabled.

Intel TXT (LT-SX) Dependencies

This feature displays the features that need to be enabled for the Intel Trusted
Execution Technology to work properly in the system.

VT-d Support: Intel Virtualization Technology with Direct I/O support
VT Support: Intel Virtualization Technology support
TPM Support: Trusted Platform support
TPM State: Trusted Platform state

ME Subsystem

This feature displays the following ME Subsystem Confi guration settings.

• ME BIOS Interface Version

• ME Version

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4-4 Event Logs

Use this feature to confi gure Event Log settings.

Change SMBIOS Event Log Settings

This feature allows the user to confi gure SMBIOS Event settings.

Enabling/Disabling Options

SMBIOS Event Log

Select Enabled to enable SMBIOS (System Management BIOS) Event Logging
during system boot. The options are Enabled and Disabled.

Runtime Error Logging Support

Select Enabled to support Runtime Error Logging. The options are Enabled and
Disabled.

Memory Correctable Error Threshold

This feature allows the user to enter the threshold value for correctable memory
errors. The default setting is 10.

PCI Error Logging Support

Select Enabled to support error event logging for PCI slots. The options are Enabled
and Disabled.

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Chapter 4: AMI BIOS

Erasing Settings

Erase Event Log

Select Enabled to erase the SMBIOS (System Management BIOS) Event Log, which
is completed before an event logging is initialized upon system reboot. The options
are No, Yes, next reset, and Yes, every reset.

When Log is Full

Select Erase Immediately to immediately erase SMBIOS error event logs that ex­ceed the limit when the SMBIOS event log is full. Select Do Nothing for the system
to do nothing when the SMBIOS event log is full. The options are Do Nothing and
Erase Immediately.

SMBIOS Event Log Standard Settings

Log System Boot Event
Select Enabled to log system boot events. The options are Disabled and Enabled.

MECI (Multiple Event Count Increment)

Enter the increment value for the multiple event counter. Enter a number from 1 to

255. The default setting is 1.

METW (Multiple Event Count Time Window)

This item allows the user to decide how long (in minutes) should the multiple event
counter wait before generating a new event log. Enter a number from 0 to 99. The
default setting is 60.

View SMBIOS Event Log

This item allows the user to view the event in the SMBIOS event log. Select this
item and press <Enter> to view the status of an event in the log.

Date/Time/Error Code/Severity

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4-5 IPMI

Use this feature to confi gure Intelligent Platform Management Interface (IPMI)
settings.

IPMI Firmware Revision

This item indicates the IPMI fi rmware revision used in your system.

IPMI Status

This item indicates the status of the IPMI fi rmware installed in your system.

System Event Log

Enabling/Disabling Options

SEL Components

Select Enabled for all system event logging at bootup. The options are Enabled
and Disabled.

Erasing Settings

Erase SEL

Select Yes, On next reset to erase all system event logs upon next system reboot.
Select Yes, On every reset to erase all system event logs upon each system reboot.
Select No to keep all system event logs after each system reboot. The options are
No, Yes, On next reset, and Yes, On every reset.

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