Supero X6DVA-4G, X6DVA-EG User Manual

®

X6DVA-4G X6DVA-EG

USER’S MANUAL

Revision 1.1b

SUPER

The information in this User’s Manual has been carefully reviewed and is believed to be accurate. The vendor assumes no responsibility for any inaccuracies that may be contained in this document, makes no commitment to update or to keep current the information in this manual, or to notify any person or organization of the updates.

Please Note: For the most up-to-date version of this manual, please see our web site at www.supermicro.com.

SUPER MICRO COMPUTER reserves the right to make changes to the product described in this manual at any time and without notice. This product, including software, if any, and documentation may not, in whole or in part, be copied, photocopied, reproduced, translated or reduced to any medium or machine without prior written consent.

IN NO EVENT WILL SUPER MICRO COMPUTER BE LIABLE FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING FROM THE USE OR INABILITY TO USE THIS PRODUCT OR DOCUMENTATION, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. IN PARTICULAR, SUPER MICRO COMPUTER SHALL NOT HAVE LIABILITY FOR ANY HARDWARE, SOFTWARE, OR DATA STORED OR USED WITH THE PRODUCT, INCLUDING THE COSTS OF REPAIRING, REPLACING, INTEGRATING, INSTALLING OR RECOVERING SUCH HARDWARE, SOFTWARE, OR DATA.

Any disputes arising between manufacturer and customer shall be governed by the laws of Santa Clara County in the State of California, USA. The State of California, County of Santa Clara shall be the exclusive venue for the resolution of any such disputes. Super Micro's total liability for all claims will not exceed the price paid for the hardware product.

*

California Best Management Practices Regulations for Perchlorate Materials: This Perchlorate warning applies only to products containing CR (Manganese Dioxide) Lithium coin cells. "Perchlorate Material-special handling may apply. See WWW.dtsc.ca.gov/hazardouswaste/ perchlorate".

WARNING: Handling of lead solder materials used in this product may expose you to lead, a chemical known to the State of California to cause birth defects and other reproductive harm.

FCC Statement: This equipment has been tested and found to comply with the limits for a Class A digital device pursuant to Part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference when the equipment is operated in a commercial environment. This equipment generates, uses, and can radiate radio frequency energy and, if not installed and used in accordance with the manufacturer’s instruction manual, may cause harmful interference with radio communications. Operation of this equipment in a residential area is likely to cause harmful interference, in which case you will be required to correct the interference at your own expense.

Revision Number: Rev. 1.1b Release Date: June 8, 2007

Unless you request and receive written permission from SUPER MICRO COMPUTER, you may not copy any part of this document.

iii

Preface

Preface About This Manual

This manual is written for system integrators, PC technicians and knowledgeable PC users. It provides information for the installation and use of the X6DVA-4G/X6DVA-EG motherboard. The X6DVA4G/X6DVA-EG supports single or dual Intel® Xeon NoconaTM processors (w/ext. EM64T) at a 800 MHz front side bus. Based upon Intel's NetBurst microarchitecture, the Nocona processor supports the IA-32 software and includes features found in the XeonTM processor such as Hyper Pipelined Technology, which includes a multi-stage pipeline, allowing the processor to operate at much higher core frequencies. Packaged in a 604-pin Flip Chip Micro Pin Grid Array(FC-mPGA4) platform in a Zero Insertion Force(ZIF) socket (mPGA 604), the Nocona Processor (800 MHz) supports Hyper-Threading Technology and is ideal for high performance workstation and server environments with up to two processors on one system bus. Please refer to the motherboard specifications pages on our web site (http://www.supermicro.com/products/motherboard/) for updates on supported processors. This product is intended to be professionally installed.

Manual Organization

Chapter 1 begins with a checklist of what should be included in your

mainboard box, describes the features, specifications and performance of the motherboard and provides detailed information about the chipset.

Chapter 2 begins with instructions on handling static-sensitive devices. Read this chapter when you want to install the processor and DIMM memory modules and when mounting the mainboard in the chassis. Also refer to this chapter to connect the floppy and hard disk drives, SCSI drives, the IDE interfaces, the parallel and serial ports, the keyboard and mouse, the power supply and various control panel buttons and indicators.

If you encounter any problems, see Chapter 3, which describes troubleshooting procedures for the video, the memory and the setup configuration stored in CMOS. For quick reference, a general FAQ [Frequently Asked Questions] section is provided.

Chapter 4 includes an introduction to BIOS and provides detailed information on running the CMOS Setup utility.

Appendix A gives information on BIOS POST messages. Appendix B provides BIOS POST codes. Appendix C provides software and the OS installation instructions.

iv

Wake-On-Ring ......................................................................................... 2-14

Serial Ports ............................................................................................. 2-15

GLAN (Ethernet Port) ............................................................................. 2-15

ATX PS/2 Keyboard and Mouse Ports ................................................2-16

Fan Headers ........................................................................................... 2-16

VGA Enable ............................................................................................. 2-17

Power Fault ............................................................................................. 2-17

SMB Power Connector .......................................................................... 2-18

Power LED/Speaker/Keylock Header ................................................. 2-18

2- 6 Jumper Settings............................................................................................ 2-19

Explanation of Jumpers ........................................................................ 2-19

GLAN Enable/Disable............................................................................. 2-19

Clear CMOS.............................................................................................. 2-20

Watch Dog ............................................................................................... 2-20

Connecting PCI Slot 1,2,3 to SMB........................................................ 2-21

SCSI Controller Enable/Disable ............................................................. 2-22

SCSI Termination Enable/Disable.......................................................... 2-22

Alarm Reset ............................................................................................. 2-23

Power Force-On .....................................................................................2-23

2- 7 Onboard LED Indicators .............................................................................. 2-24

2- 8 Parallel Port, Floppy/Hard Disk Drive and SCSI Connections ............... 2-26

Parallel Port Connector ......................................................................... 2-26

Floppy Connector ................................................................................... 2-27

IDE Connectors ...................................................................................... 2-27

Ultra320 SCSI Connectors .................................................................... 2-28

Chapter 3: Troubleshooting

3-1 Troubleshooting Procedures ........................................................................ 3-1

Before Power On .................................................................................... 3-1

No Power .................................................................................................. 3-1

No Video ................................................................................................... 3-1

Memory Errors .......................................................................................... 3-2

Losing the System’s Setup Configuration ........................................... 3-2

3-2 Technical Support Procedures .................................................................... 3-2

3-3 Frequently Asked Questions ........................................................................ 3-3

3-4 Returning Merchandise for Service ............................................................ 3-5

Chapter 4: BIOS

Table of Contents

X6DVA-4G/X6DVA-EG User's Manual

Table of Contents

v

4- 1 Introduction....................................................................................................... 4-1

4- 2 Running Main BIOS Setup .............................................................................. 4-2

4-3 Advanced Setup.............................................................................................. 4-4

4- 4 Boot Setup ...................................................................................................... 4-18

4-5 Security Setup ............................................................................................... 4-21

4- 6 Exit ................................................................................................................... 4-22

Appendices:

Appendix A: BIOS POST Messages ..................................................................... A-1

Appendix B: BIOS POST Codes ............................................................................. B-1

Appendix C: Installing Software Drivers and the Operating System ..............C-1

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X6DVA-4G/X6DVA-EG User's Manual

Chapter 1: Introduction

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Introduction

Chapter 1

Introduction

1-1 Overview

Checklist

Congratulations on purchasing your computer motherboard from an acknowledged leader in the industry. Supermicro boards are designed with the utmost attention to detail to provide you with the highest standards in quality and performance. Check that the following items have all been included with your motherboard. If anything listed here is damaged or missing, contact your retailer. All included with Retail Box.

One (1) Supermicro Mainboard

One (1) ribbon cable for IDE devices (CBL-036)

One (1) floppy ribbon cable (CBL-022)

One (1) 9-pin serial port DTK cable (CBL-010)

One (1) SATA cable (CBL-044)

One (1) SCSI Cable (CBL-034-0320) (*X6DVA-4G only)

One (1) CPU mounting plate (SKT-0159)

Two (2) CPU retention brackets-(*Pre-installed) (SKT-0158)

One (1) I/O backpanel shield (CSE-PT7)

One (1) Supermicro CD containing drivers and utilities (CDR-INTC)

One (1) User's/BIOS Manual

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X6DVA-4G/X6DVA-EG User's Manual

Contacting Supermicro

Headquarters

Address: SuperMicro Computer, Inc.

980 Rock Ave.

San Jose, CA 95131 U.S.A. Tel: +1 (408) 503-8000 Fax: +1 (408) 503-8008 Email: [email protected] (General Information)

[email protected] (Technical Support) Web Site: www.supermicro.com

Europe

Address: SuperMicro Computer B.V.

Het Sterrenbeeld 28, 5215 ML

's-Hertogenbosch, The Netherlands Tel: +31 (0) 73-6400390 Fax: +31 (0) 73-6416525 Email: [email protected] (General Information)

[email protected] (Technical Support)

[email protected] (Customer Support)

Asia-Pacific

Address: SuperMicro, Taiwan

D5, 4F, No. 16 Chien-Ba Road

Chung-Ho 235, Taipei Hsien, Taiwan, R.O.C. Tel: +886-(2) 8226-3990 Fax: +886-(2) 8226-3991 Web Site: www.supermicro.com.tw Technical Support: Email: [email protected] Tel: 886-2-8228-1366, ext.132 or 139

Chapter 1: Introduction

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Introduction

Figure 1-1. SUPER X6DVA-4G/X6DVA-EG Image

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Introduction

X6DVA-4G/X6DVA-EG User's Manual

Figure 1-2. SUPER X6DVA-4G/X6DVA-EG Motherboard Layout

GLAN1

®

S

UPER X6DVA-4G

(not drawn to scale)

GLAN2

DIMM 2B DIMM 2A DIMM 3B DIMM 3A

DIMM 1A

DIMM 1B

8-pin PWR2

SMB PWR

FP CTRL

Speaker

WOR

GLAN CTLR

X4 PCI-Epxess

PCIX #6 (PCIX-133)

North Bridge

VGA

COM1

USB0/1

KB/ Mouse

PW4

ATX PWR1

24-Pin

Fan1

PW1

CPU 1

CPU 2

COM2

6300ESB ICH

GLAN CTLR

PWR Fault

J2

J3

J4

J1

PW3

J18

J19

J20

J21

J22

J23

J8B1

JPL1

LAN1Enable

JPL2

LAN2Enable

PCIX #5 (PCIX-100)

JPR1

Alarm Reset

J9B1

J15 J13

JPA1

(*SCSI Enable)

PCIX slots/ SMB Connect

JF2

PWLED/ SPKR

PCI-E#4

J14

Battery

Fan6

Fan5

JPG1

J17

VGA Enable

32- bit PCI #1

J5

Printer

J10

Floppy

J24

SCSI

J28

JL1

IDE 2

J38

Fan4

SATA0

SATA1

JS0

Cha. Intru

JS1

JBT1

Clr CMOS

J41

IPMI

JWD

WD

IDE 1

J44

JF1

Fan3

E7320 (Lindenhurst

-VS)

MCH

PXH

(PCI-E/ PCIX Interface)

SI/O

VGA CTLR

SCSI (LSI 53C20)

64- bit

USB2,3

JA1

JSLED

SATA LED

DS9

Fan2

PW2

JWOL

DS7

DS8

POST

LED

System LED

SCSI ChannelTerm. Enable

JPF

PWR Force On

BIOS

DS1

DS4

DS2

DS3

CPU PW LED

CPU1 VRM OHLED

CPU2 VRM OH LED

DS5

PWR LED

WOL

SCSI LED

Notes:

1. All images and layouts shown in this manual were based upon the latest PCB revision available at the time of publishing. The motherboard you’ve received may or may not look exactly the same as the graphics shown in this manual.

2. Jumpers not indicated are for test purposes only.

3. See Chapter 2 for detailed information on jumpers, I/O ports and JF1 front panel connections.

4. " " indicates the location of Pin 1.

5. SCSI is for the X6DVA-4G only.

6. Use the correct type of onboard CMOS battery as specified by the manufacturer. Do not install the onboard battery upside down.

Chapter 1: Introduction

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Introduction

Jumper Description Default Setting

J13/J15 PCI #1/PCI-X #5,#6 to System SMB On (Connected) JA1(*Note) SCSI Channel Term. Enable Off (Enable) JBT1 CMOS Clear See Chapter 2 JPA1(*Note) SCSI Controller Enable Pins 1-2 (Enabled) JPF Power Force on Open (Disabled) JPG1 VGA Enable Pins 1-2 (Enabled) JPL1/JPL2 LAN1/LAN 2 Enable/Disable Pins 1-2 (Enabled) JPR1 Power Fail Alarm Reset Open (Disabled) JWD Watch Dog Enable Pins 1-2 (Reset)

Connector Description

ATX PWR (PW1) Primary 24-pin ATX PWR Connector (Required) 12V PWR (PW2) 12V 8-pin PWR Connector(Required) COM1 (J4)/COM2 (J5) COM1/COM2 Serial Port Connector/Header DIMM 1A-3B(J18-J23) Memory (RAM) Slots(1A,1B, 2A,2B, 3A,3B) DS1-DS5, DS7-DS8 Onboard LED Indicators (*See Chapter 2)

DS7/DS8:POST Code LED (*See Chpt.2 & App.A) DS9 System LED (*See Chapter 2) FAN 1- 6 CPU/Chassis Fan Headers GLAN 1/2 G-bit Ethernet Ports IDE1(J44), IDE2(J38) IDE1/2 Hard Disk Drive Connectors J1 VGA Connector J2 Keyboard/Mouse J10 Parallel (Printer) Header J24 Floppy Disk Drive Connector J28 SCSI Connector (*X6DVA-4G only) J41 IPMI Connector JF1 Front Control Panel Connector JF2 PWR LED (Pins1-3), Speaker (Pins 6-7) JL1 Chassis Intrusion Header JSLED Serial ATA LED PCI#1/PCI-E#4 PCI-#1 32-bit slot/PCI-E#4 x4 PCI-E(@2GB/sec) PCI#5/PCI#6(J9B1/J8B1)64-bit PCI-X 100/PCI-X 133 slot PW3 Power SMB PW 4 PWR FAIL SATA0/1(JS0/JS1) Serial ATA0 Header(JS0), Serial ATA1Header(JS1) WOL (JWOL) Wake-on-LAN Header WOR (JWOR) Wake-on-Ring Header USB 0/1(J3) (Back Panel) Universal Serial Bus Ports USB 2/3 (Front Panel) Universal Serial Bus Headerss

Quick Reference ( X6DVA-4G/X6DVA-EG)

(*Please refer to Chapter 2 for pin definitions.)

(*Note: for the X6DVA-4G only)

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X6DVA-4G/X6DVA-EG User's Manual

Motherboard Features

CPU

• Single or dual Intel® 604-pin 32-bit/Ext. EM64T Nocona

TM

(up to 3.6

GHz) processors at 800 MHz front side (system) bus speed.

(*Notes: CPU FSB speed is set by Manufacturer. Please do not change the FSB setting. )

Memory

• Six 184-pin DIMM sockets supporting up to 12/24 GB Registered ECC DDR-333/266 (PC2700/PC2100) SDRAM required

Notes: 1. Memory size is set via BIOS. 2. Interleaved memory; requires memory modules to be installed in pairs. See Section 2-3 for details.

Chipset

• Intel E7320 (Lindenhurst-VS) chipset with support of: MCH, PXH and 6300ESB ICH

Expansion Slots

• One PCI-E slot (*x4@2GB sec)

• Two 64-bit PCI-X slots (*One 64-bit PCI-X-133 slot, one PCI-X-100 slot)

• One 32-bit PCI slot

BIOS

• 8 Mb AMI® Flash ROM

• APM 1.2, DMI 2.1, PCI 2.2, ACPI 2.0, Plug and Play (PnP), SMBIOS 2.3

PC Health Monitoring

• Onboard voltage monitors for CPU cores, chipset voltage, Memory voltage, 3.3V, +5V, +12V,− 12V, 3.3V standby and 5Vstandby

• CPU/chassis temperature monitors

• Environmental temperature monitor and control via Supero Doctor III

• CPU slow-down on temperature overheat

• CPU thermal trip support for processor protection, +5V standby alert LED

• Power-up mode control for recovery from AC power loss

• Auto-switching voltage regulator for CPU core

• System overheat LED and control

• Chassis intrusion detection

• System resource alert via Super Doctor III

• TM2 Feature

• Fan Control (Please refer to the section-"Hardware Monitoring" in BIOS

Chapter 1: Introduction

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Introduction

for more information.)

• VRM Protection Feature (880C, *980C, 1080C) (*Default)

ACPI Features

• Microsoft OnNow

• Slow blinking LED for suspend state indicator

• Main switch override mechanism

Onboard I/O

• LSI Logic Single Channel 53C1020 Ultra 320 SCSI(*X6DVA-G4 only)

• One IPMI 2.0

• Two Intel 82541 GI Gigabit Ethernet controllers

• 2 EIDE Ultra DMA/100 bus master interfaces

• 1 floppy port interface (up to 2.88 MB)

• 1 EPP/ECP Parallel Header

• PS/2 mouse and PS/2 keyboard ports

• Up to 4 USB 2.0 (Universal Serial Bus) (2 ports/2 headers)

• 2 Intel 6300 ESB Serial ATA

• Super I/O

• 2 Serial port/header

Other

• Internal/external modem ring-on

• Wake-on-Ring (WOR)

• Console redirection

CD/Diskette Utilities

• BIOS flash upgrade utility and device drivers

Dimensions

• ATX 12" x 10" (304.8 x 254 mm)

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Introduction

X6DVA-4G/X6DVA-EG User's Manual

Figure 1-9. Block Diagram of the E7320 (Lindenhurst-VS) Chipset

Note: This is a general block diagram. Please see the previous Motherboard

Features pages for details on the features of each motherboard.

Mouse

Keyboard

Flpy/Prntr

COM1

FPUSB FPUSB

USB

SATA

IDE

Video SRAM

PCI 33MHz Slot#1

82541

6300ESB-

4

5

6

Chapter 1: Introduction

1-9

Introduction

1-2 Chipset Overview

Built upon the functionality and the capability of the E7320 (LindenhurstVS) chipset, the X6DVA-4G/X6DVA-EG motherboard provides the performance and feature set required for dual processor-based servers, with configuration options optimized for communications, presentation, storage, computation or database applications. The Intel E7320 (Lindenhurst-VS) chipset consists of the following components: the E7320 (Lindenhurst-VS) Memory Controller Hub (MCH), the I/O Controller Hub (6300ESB ICH), and THE PCI-X Hub (PXH).

The E7320 (Lindenhurst-VS) MCH supports single or dual Nocona processors with Front Side Bus speeds of up to 800 MHz(*Note). Its memory controller provides direct connection to two channels of registered DDR266, DDR333 with a marched system bus address and data bandwidths of up to

6.4GB/s. The E7320 (Lindenhurst-VS) also supports the new PCI Express high speed serial I/O interface for superior I/O bandwidth. The MCH provides configurable x8 PCI Express interfaces which may alternatively be configured as two independent x4 PCI Express interfaces. These interfaces support connection of the MCH to a variety of other bridges that are compliant with the PCI Express Interface Specification, Rev. 1.0a. The MCH interfaces with the 6300ESB I/O Controller Hub (6300ESB ICH) via Hub Interface. The PCI- Bus provides connection between a PCI Express interface and two independent PCI bus interfaces that can be configured for standard PCI 2.3 protocol, as well as the enhanced high-frequency PCI-X protocol. The PXH can be configured to support for 32- or 64-bit PCI devices running at 33 MHz, 66 MHz, 100 MHz, and 133 MHz.

6300ESB ICH System Features

In addition to providing the I/O subsystem with access to the rest of the system, the 6300ESB I/O Controller Hub (6300ESB ICH) integrates many I/ O functions.

The 6300ESB integrates: 2-channel Ultra ATA/100 Bus Master IDE Controller, two Serial ATA (SATA) Host Controllers, SMBus 2.0 Controller, LPC/ Flash BIOS Interface, PCI-X (66MHz) 1.0 Interface, PCI 2.2 Interface and System Management Controller.

(*Notes: The CPU FSB speed is set at 800 MHz by the Manufacturer.

Please do not change the CPU FSB setting.)

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X6DVA-4G/X6DVA-EG User's Manual

1-3 Special Features

Recovery from AC Power Loss

BIOS provides a setting for you to determine how the system will respond when AC power is lost and then restored to the system. You can choose for the system to remain powered off (in which case you must hit the power switch to turn it back on) or for it to automatically return to a poweron state. See the Power Lost Control setting in the Advanced BIOS Setup section (Advanced Power Configuration) to change this setting. The default setting is Last State.

1-4 PC Health Monitoring

This section describes the PC health monitoring features of the SUPER X6DVA-4G/X6DVA-EG. All have an onboard System Hardware Monitor chip that supports PC health monitoring.

Onboard Voltage Monitors for the CPU Cores, Chipset Voltage, Memory Voltage, +3.3V, +5V, +12V, -12V, +3.3V Standby, and +5V Standby

An onboard voltage monitor will scan these voltages continuously. Once a voltage becomes unstable, a warning is given or an error message is sent to the screen. Users can adjust the voltage thresholds (in SDIII) to define the sensitivity of the voltage monitor.

Fan Status Monitor with Fan Speed Control

The PC health monitor can check the RPM status of the cooling fans. The onboard CPU and chassis fans are controlled by Thermal Management via BIOS.

Environmental Temperature Control

The thermal control sensor monitors the CPU temperature in real time and will turn on the thermal control fan whenever the CPU temperature exceeds a user-defined threshold. The overheat circuitry runs independently from the CPU. It can continue to monitor for overheat conditions even when the CPU is in sleep mode. Once it detects that the CPU temperature is too high, it will automatically turn on the thermal control fan to prevent any overheat

Chapter 1: Introduction

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Introduction

damage to the CPU. The onboard chassis thermal circuitry can monitor the overall system temperature and alert users when the chassis temperature is too high.

CPU Overheat LED and Control

This feature is available when the user enables the CPU overheat warning function in the BIOS. This allows the user to define an overheat temperature.

TM2/CPU VRM Overheat

When the CPU reaches 700 C and above (Overheat), the CPU will slow down and the CPU voltage will drop to reduce CPU power consumption and VRM heat dissipation.

When CPU temperature reaches 780 C (*Default) and above, the system will go into the throttling state. The Overheat LED and Alarm Buzzer will be turned on. The CPU speed will decrease. When this happens, you can go to the Health Monitor Setting in the BIOS to reset CPU Overheat Temperature.

VRM Protection

When the CPU VRM temperature reaches the threshold preset by the user in the BIOS, the system will go into the TM2 Mode. The CPU will slow down,

the VRM current will drop to prevent the VRM from overheat. (The settings are: 880C, *980C, 1080C.) (*Default)

Auto-Switching Voltage Regulator for the CPU Core

The auto-switching voltage regulator for the CPU core can support up to 20A current and auto-sense voltage IDs ranging from .8375V to 1.6V. This will allow the regulator to run cooler and thus make the system more stable.

1-5 ACPI Features

ACPI stands for Advanced Configuration and Power Interface. The ACPI specification defines a flexible and abstract hardware interface that provides a standard way to integrate power management features throughout a PC system, including its hardware, operating system and application software. This enables the system to automatically turn on and off peripherals

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Introduction

X6DVA-4G/X6DVA-EG User's Manual

such as CD-ROMs, network cards, hard disk drives and printers. This also includes consumer devices connected to the PC such as VCRs, TVs, telephones and stereos.

In addition to enabling operating system-directed power management, ACPI provides a generic system event mechanism for Plug and Play and an operating system-independent interface for configuration control. ACPI leverages the Plug and Play BIOS data structures while providing a processor architecture-independent implementation that is compatible with Windows 2000, Windows NT 5.0, Windows XP, and Windows Server 2003 .

Microsoft OnNow

The OnNow design initiative is a comprehensive, system-wide approach to system and device power control. OnNow is a term for a PC that is always on but appears to be off and responds immediately to user or other requests.

Slow Blinking LED for Suspend-State Indicator

When the CPU goes into a suspend state, the chassis power LED will start blinking to indicate that the CPU is in suspend mode. When the user presses any key, the CPU will wake-up and the LED will automatically stop blinking and remain on.

Main Switch Override Mechanism

When an ATX power supply is used, the power button can function as a system suspend button to make the system enter a SoftOff state. The monitor will be suspended and the hard drive will spin down. Pressing the power button again will cause the whole system to wake-up. During the SoftOff state, the ATX power supply provides power to keep the required circuitry in the system alive. In case the system malfunctions and you want to turn off the power, just press and hold the power button for 4 seconds. This option can be set in the Power section of the BIOS Setup routine.

External Modem Ring-On (WOR)

Wake-up events can be triggered by a device such as the external modem ringing when the system is in the SoftOff state. Note that external modem ring-on can only be used with an ATX 2.01 (or above) compliant power supply.

Chapter 1: Introduction

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Introduction

Wake-On-LAN (WOL)

Wake-On-LAN is defined as the ability of a management application to remotely power up a computer that is powered off. Remote PC setup, updates and asset tracking can occur after hours and on weekends so that daily LAN traffic is kept to a minimum and users are not interrupted. The motherboard has a 3-pin header (WOL) to connect to the 3-pin header on a Network Interface Card (NIC) that has WOL capability. Wake-On-LAN must be enabled in BIOS. Note that Wake-On-LAN can only be used with an ATX

2.01 (or above) compliant power supply.

1-6 Power Supply

As with all computer products, a stable power source is necessary for proper and reliable operation. It is even more important for processors that have high CPU clock rates.

The SUPER X6DVA-4G/X6DVA-EG can only accommodate ATX 24-pin power supplies. Although most power supplies generally meet the specifications required by the CPU, some are inadequate. You should use one that will supply at least 400W of power and includes the additional +12V, 8pin power connector - an even higher wattage power supply is recommended for high-load configurations. Also your power supply must supply

1.5A for the Ethernet ports.

NOTE: An additional 12V 8-pin power connector (PW2) is required to support Intel Xeon CPUs. Failure to provide this extra power will result in instability of the CPU after only a few minutes of operation. See Section 2-5 for details on connecting the power supply.

It is strongly recommended that you use a high quality power supply that meets ATX power supply Specification 2.02 or above. It must also be SSI compliant (info at http://www.ssiforum.org/). Additionally, in areas where noisy power transmission is present, you may choose to install a line filter to shield the computer from noise. It is recommended that you also install a power surge protector to help avoid problems caused by power surges.

1-7 Super I/O

The disk drive adapter functions of the Super I/O chip include a floppy disk drive controller that is compatible with industry standard 82077/765, a data separator, write pre-compensation circuitry, decode logic, data rate selection, a clock generator, drive interface control logic and interrupt and DMA

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X6DVA-4G/X6DVA-EG User's Manual

reduces the number of components required for interfacing with floppy disk drives. The Super I/O supports 360 K, 720 K, 1.2 M, 1.44 M or 2.88 M disk drives and data transfer rates of 250 Kb/s, 500 Kb/s or 1 Mb/s.It also provides two high-speed, 16550 compatible serial communication ports (UARTs), one of which supports serial infrared communication. Each UART includes a 16-byte send/receive FIFO, a programmable baud rate generator, complete modem control capability and a processor interrupt system. Both UARTs provide legacy speed with baud rate of up to 115.2 Kbps as well as an advanced speed with baud rates of 250 K, 500 K, or 1 Mb/s, which support higher speed modems.

The Super I/O supports one PC-compatible printer port (SPP), Bi-directional Printer Port (BPP) , Enhanced Parallel Port (EPP) or Extended Capabilities Port (ECP).

The Super I/O provides functions that comply with ACPI (Advanced Configuration and Power Interface), which includes support of legacy and ACPI power management through an SMI or SCI function pin. It also features auto power management to reduce power consumption.

The IRQs, DMAs and I/O space resources of the Super I/O can flexibly adjust to meet ISA PnP requirements, which support ACPI and APM (Advanced Power Management).

logic. The wide range of functions integrated onto the Super I/O greatly

Chapter 2: Installation

2-1

Chapter 2

Installation

2-1 Static-Sensitive Devices

Electric-Static-Discharge (ESD) can damage electronic components. To prevent damage to your system board, it is important to handle it very carefully. The following measures are generally sufficient to protect your equipment from ESD.

Precautions

• Use a grounded wrist strap designed to prevent static discharge.

• Touch a grounded metal object before removing the board from the antistatic bag.

• Handle the board by its edges only; do not touch its components, peripheral chips, memory modules or gold contacts.

• When handling chips or modules, avoid touching their pins.

• Put the motherboard and peripherals back into their antistatic bags when not in use.

• For grounding purposes, make sure your computer chassis provides excellent conductivity between the power supply, the case, the mounting fasteners and the motherboard.

• Use only the correct type of onboard CMOS battery as specified by the manufacturer. Do not install the onboard battery upside down to avoid possible explosion.

Unpacking

The motherboard is shipped in antistatic packaging to avoid static damage. When unpacking the board, make sure the person handling it is static protected.

2-2

X6DVA-4G/X6DVA-EG User's Manual

IMPORTANT: Always connect the power cord last and always remove it before adding, removing or changing any hardware components. Make sure that you install the processor into the CPU socket before you install the CPU heat sink. Note that for the X6DVA-4G/X6DVA-EG you need to install the Xeon mounting plate under the board.

2-2 PGA Processor and Heatsink Installation

When handling the processor package, avoid placing direct pressure on the label area of the fan. Also, do not place the motherboard on a conductive surface, which can damage the BIOS battery and prevent the system from booting up.

!

CPU Installation

1. Lift the lever on the CPU socket:

lift the lever completely as shown on the picture on the right; otherwise, you will damage the CPU socket when power is applied. (Install CPU1 first.)

Installing the CPU Mounting Plate and Retention Bracket

Place the CPU mounting plate(*) below the pre-installed retention brackets on the reverse side of the motherboard. (*Note: You must install the mounting plate on the motherboard to provide the heatsink with adequate support.)

*CPU Mounting Plate

CPU Retention Bracket (x2 for dual CPU board)

CPU Socket

Mounting Holes

Xeon CPU

Heatsink

*CPU Mounting Plate

Motherboard

CPU Socket

CPU

Heatsink

Socket lever

Chapter 2: Installation

2-3

3. Press the lever down until

you hear the *click* so you can be sure that the CPU is securely installed in the CPU socket.

Pin1

2. Place the heatsink on top of the

CPU so that the four mounting holes are aligned with those on the retention mechanism.

3. Screw in two diagonal screws (ie

the #1 and the #2 screws) until just snug (-do not fully tighten the screws to avoid possible damage to the CPU.)

4. Finish the installation by fully

tightening all four screws.

CEK Heatsink

Screw#1

Screw#2

Screw#1

(Caution! We do not recommend that the

CPU or the heatsink be removed. However, if you do need to un-install the heatsink, please follow the instructions below to uninstall the heatsink to prevent damage done to the CPU or the CPU socket.)

1. Do not apply any thermal grease to

the heatsink or the CPU die; the required amount of thermal grease has already been applied.

Heatsink Installation

(*Note: Heatsinks are very heavy, please handle with care.)

2. Insert the CPU in the socket,

making sure that pin 1 of the CPU aligns with pin 1 of the socket (both corners are marked with a triangle). When using only one CPU, install it into CPU socket #1 (Socket #2 is automatically disabled if only one CPU is used).

Socket lever

To Un-install the Heatsink

2-4

X6DVA-4G/X6DVA-EG User's Manual

Figure 2-1. PGA604 Socket: Empty and with Processor Installed

Lever

Processor

(installed)

Triangle

Empty socket

Warning! Make

sure you lift the lever completely when installing the CPU. If the lever is only partly raised, damage to the socket or CPU may result.

!

1. Unscrew and remove the heatsink screws from the motherboard in the sequence as show in the second picture on the right.

2. Hold the heatsink as show in the picture on the right and gently wriggle the heatsink to loosen it from the CPU. (Do not use excessive force when wriggling the heatsink!!)

3. Once the CPU is loosened from the heatsink, remove the heatsink from the CPU socket.

4. Clean the surface of the CPU and the heatsink to get rid of the old thermal grease. Reapply the proper amount of thermal grease on the surface before you re-install the CPU and the heatsink.

Chapter 2: Installation

2-5

Figure 2-2. Installing and Removing DIMMs

To Install:

Insert module vertically and press down until it snaps into place. Pay attention to the alignment notch at the bottom.

2-3 Installing DIMMs

Note: Check the Supermicro web site for recommended memory modules:

(http://www.supermicro.com/support/resources/)

CAUTION Exercise extreme care when installing or removing

DIMM modules to prevent any possible damage. Also note that

the memory is interleaved to improve performance (see step1.)

DIMM Installation (See Figure 2-2)

1. Insert the desired number of DIMMs into the memory slots, starting with

DIMM #1A. The memory scheme is interleaved so you must install two modules at a time, beginning with DIMM #1A, then DIMM #1B, and so on.

2. Insert each DIMM module vertically into its slot. Pay attention to the

notch along the bottom of the module to prevent inserting the DIMM module incorrectly.

3. Gently press down on the DIMM module until it snaps into place in the

slot. Repeat for all modules (see step 1 above).

Memory Support

The X6DVA-4G/X6DVA-EG supports up to 12/24 GB of Reg. ECC DDR 333/ 266 (PC2700/PC2100) memory. All motherboards were designed to support 4 GB modules in each slot, but has only been verified for up to 2 GB modules.

Mounting the Motherboard in the Chassis

All motherboards have standard mounting holes to fit different types of chassis. Make sure the location of all the mounting holes for both the motherboard and the chassis match. Although a chassis may have both plastic and metal mounting fasteners, metal ones are highly recommended because they ground the motherboard to the chassis. Make sure the metal standoffs click in or are screwed in tightly. Then use a screwdriver to secure the motherboard.

2-6

X6DVA-4G/X6DVA-EG User's Manual

To Remove:

Use your thumbs to gently push near the edge of both ends of the module. This should release it from the slot.

2-4 I/OPorts/Control Panel Connectors

The I/O ports are color coded in conformance with the PC 99 specification. See Figure 2-3 below for the locations of the various I/O ports.

Figure 2-3. I/O Port Locations and Definitions

Chapter 2: Installation

2-7

Front Control Panel

JF1 contains header pins for various buttons and indicators that are normally located on a control panel at the front of the chassis. These connectors are designed specifically for use with Supermicro server chassis. See Figure 2-4 for the descriptions of the various control panel buttons and LED indicators. Refer to the following section for descriptions and pin definitions.

Figure 2-4. JF1 Header Pins

Power Button

OH/Fan Fail LED

1

NIC1 LED

Reset Button

2

Power Fail LED

HDD LED

Power LED

Reset

Pwr

Vcc

Ground

1920

Vcc

X

Ground

NMI

X

NIC2 LED

Vcc

2-8

X6DVA-4G/X6DVA-EG User's Manual

ATX Power Supply 24-pin Connector

Pin Definitions (PW1)

Pin Number Definition 13 +3.3V 14 -12V 15 COM 16 PS_ON # 17 COM 18 COM 19 COM 20 Res(NC ) 21 +5V 22 +5V 23 +5V 24 COM

Pin Number Definition

1 +3.3V 2 +3.3V

3 COM

4 +5V

5 COM

6 +5V

7 COM

8 PWR_OK 9 5VSB 10 +12V 11 +12V 12 +3.3V

2-5 Connecting Cables

ATX Power Connector

There is a 24-pin main power supply connector(PW1) and an optional 8-pin CPU PWR connector (PW2) on the board. This power connector meets the SSI EPS 12V specification. See the table on the right for pin definitions. For CPU PWR (PWR2), please refer to the item listed below.

Pins

1 thru 4

5 thru 8

Definition

Ground

+12v

CPU 8-Pin PWR

Connector (PW2)

Processor Power Connector

In addition to the Primary ATX power connector (above), the 12v 8-pin Processor connector at W2 must also be connected to your power supply. See the table on the right for pin definitions.

GLAN1

®

S

UPER X6DVA-4G

GLAN2

DIMM 2B

DIMM 2A

DIMM 3B

DIMM 3A

DIMM 1A

DIMM 1B

8-pin PWR2

SMB PWR

FP CTRL

S

p

e

a

k

e

r

W

O

R

G

L

A

N

C

T

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PCIX #6 (PCIX-133)

N

o

rth

B

rid

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e

V

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A

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1

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P

W

4

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T

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2

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in

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a

n

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C

P

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1

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P

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6

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H

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J

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J

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J

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J

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J

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8

J

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9

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J

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J

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3

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ATX PWR

8-pin PWR

Chapter 2: Installation

2-9

Power LED

The Power LED connection is located on pins 15 and 16 of JF1. Refer to the table on the right for pin definitions.

NMI Button

The non-maskable interrupt button header is located on pins 19 and 20 of JF1. Refer to the table on the right for pin definitions.

Number

19 20

Definition

Control Ground

NMI Button Pin

Definitions

Number

15 16

Definition

Vcc

Control

PWR_LED Pin Definitions

GLAN1

®

S

U

P

E

R

X

6D

V

A

-4G

GLAN2

D

IM

M

2

B

D

IM

M

2

A

D

IM

M

3

B

D

IM

M

3

A

D

IM

M

1

A

D

IM

M

1

B

8-pin PWR2

SMB PWR

FP CTRL

Speaker

WOR

GLAN CTLR

X

4

P

C

I-E

p

x

e

s

P

C

IX

#

6

(P

C

IX

-1

3

)

North Bridge

VGA

COM1

USB0/1

KB/ Mouse

PW4

ATX PWR1

24-Pin

Fan1

PW1

CPU 1

CPU 2

COM2

6300ESB ICH

GLAN CTLR

PWR Fault

J2

J3

J4

J1

PW3

J18

J19

J20

J21

J22

J23

J8B1

JPL1

LAN1Enable

JPL2

LAN2Enable

P

C

IX

#5

(P

C

IX

-1

0

)

JPR1

Alarm Reset

J9B1

J15 J13

JPA1

(*SCSI Enable)

PCIX slots/ SMB Connect

JF2

PWLED/ SPKR

P

C

I-E

#4

J14

Battery

Fan6

Fan5

JPG1

J17

VGA Enable

3

2- b

it P

C

I #1

J5

Printer

J10

Floppy

J24

SCSI

J28

JL1

IDE 2

J38

Fan4

SATA0

SATA1

JS0

Cha. Intru

JS1

JB

T1

Clr CMOS

J41

IPMI

JWD

WD

IDE 1

J44

JF1

F

a

n

3

E7320 (Lindenhurst

-VS)

MCH

PXH

(PCI-E/ PCIX Interface)

SI/O

VGA CTLR

SCSI (LSI 53C20)

64- bit

USB2,3

J

A

1

JSLED

SATA LED

D

S9

F

a

n

2

PW2

JWOL

D

S

7

D

S8

PO

S

T

LED

System LED

SCSI ChannelTerm. Enable

JPF

PWR Force On

BIOS

DS1

DS4

DS2

DS3

CPU PW LED

CPU1 VRM OHLED

CPU2 VRM OH LED

DS5

PWR LED

WOL

SCSI LED

NMI

PWR LED

Power Button

OH/Fan Fail LED

1

NIC1 LED

Reset Button

2

Power Fail LED

HDD LED

Power LED

Reset

Pwr

Vcc

Ground

1920

Vcc

X

Ground

NMI

X

NIC2 LED

Vcc

2-10

X6DVA-4G/X6DVA-EG User's Manual

NIC1/NIC2 LED Indicators

The NIC (Network Interface Controller) LED connections for the GLAN port1 is located on pins 11 and 12 of JF1, and for the GLAN port2 is located on pins 9 and 10 of JF1. Attach the NIC LED cables to display network activity. Refer to the tables on the right for pin definitions.

NIC1 LED Pin

Definitions

Number

11 12

Definition

Vcc

GND

HDD LED

The HDD LED connection is located on pins 13 and 14 of JF1. Attach the hard drive LED cable here to display disk activity (for any hard drives on the system, including SCSI, Serial ATA and IDE). See the table on the right for pin definitions.

HDD LED Pin

Definitions

Number

13 14

Definition

Vcc

HD Active

NIC2 LED Pin

Definitions

Number

9

10

Definition

Vcc

GND

GLAN1

®

S

U

P

E

R

X

6D

V

A

-4G

GLAN2

D

IM

M

2

B

D

IM

M

2

A

D

IM

M

3

B

D

IM

M

3

A

D

IM

M

1

A

D

IM

M

1

B

8-pin PWR2

SMB PWR

FP CTRL

Speaker

WOR

GLAN CTLR

X

4

P

C

I-E

p

x

e

s

P

C

IX

#6

(P

C

IX

-1

3

)

North Bridge

VGA

COM1

USB0/1

KB/ Mouse

PW4

ATX PWR1

24-Pin

Fan1

PW1

CPU 1

CPU 2

COM2

6300ESB ICH

GLAN CTLR

PWR Fault

J2

J3

J4

J1

PW3

J18

J19

J20

J21

J22

J23

J8B1

JPL1

LAN1Enable

JPL2

LAN2Enable

P

C

IX

#

5 (P

C

IX

-10

0

)

JPR1

Alarm Reset

J9B1

J15 J13

JPA1

(*SCSI Enable)

PCIX slots/ SMB Connect

JF2

PWLED/ SPKR

P

C

I-E

#

4

J14

Battery

Fan6

Fan5

JPG1

J17

VGA Enable

3

2

- b

it P

C

I #

1

J5

Printer

J10

Floppy

J24

SCSI

J28

JL1

IDE 2

J38

Fan4

SATA0

SATA1

JS0

Cha. Intru

JS1

JB

T1

Clr CMOS

J41

IPMI

JWD

WD

ID

E 1

J44

JF1

F

a

n

3

E7320 (Lindenhurst

-VS)

MCH

PXH

(PCI-E/ PCIX Interface)

SI/O

VGA CTLR

SCSI (LSI 53C20)

64- bit

USB2,3

J

A

1

JSLED

SATA LED

D

S9

F

a

n

2

PW2

JWOL

D

S

7

D

S8

P

O

ST

LED

System LED

SCSI ChannelTerm. Enable

JPF

PWR Force On

BIOS

DS1

DS4

DS2

DS3

CPU PW LED

CPU1 VRM OHLED

CPU2 VRM OH LED

DS5

PWR LED

WOL

SCSI LED

HDD LED

NIC1/NIC2 LED

Power Button

OH/Fan Fail LED

1

NIC1 LED

Reset Button

2

Power Fail LED

HDD LED

Power LED

Reset

Pwr

Vcc

Ground

1920

Vcc

X

Ground

NMI

X

NIC2 LED

Vcc

Chapter 2: Installation

2-11

Power Button

OH/Fan Fail LED

1

NIC1 LED

Reset Button

2

Power Fail LED

HDD LED

Power LED

Reset

Pwr

Vcc

Ground

1920

Vcc

X

Ground

NMI

X

NIC2 LED

Vcc

Overheat/Fan Fail LED

Connect an LED to the OH/Fan Fail LED connection on pins 7 and 8 of JF1 to provide advanced warning of chassis overheating and fan failure. Refer to the table on the right for pin definitions.

Power Fail LED

The Power Fail LED connection is located on pins 5 and 6 of JF1. Refer to the table on the right for pin definitions.

Overheat/Fan Fail

LED

LED State

Off On

Blink

Message

Normal

Overhea

t

Fan Fail

Power Fail LED Pin

Definitions

Number

5

6

Definition

Vcc

GND

OH/Fan Fail LED

Pin Definitions

Number

7 8

Definition

Vcc

GND

GLAN1

®

S

U

P

E

R

X

6D

V

A

-4G

GLAN2

D

IM

M

2

B

D

IM

M

2

A

D

IM

M

3

B

D

IM

M

3

A

D

IM

M

1

A

D

IM

M

1

B

8-pin PWR2

SMB PWR

FP CTRL

Speaker

WOR

GLAN CTLR

X

4

P

C

I-E

p

x

e

s

P

C

IX

#

6

(P

C

IX

-1

3

3)

North Bridge

VGA

COM1

USB0/1

KB/ Mouse

PW4

ATX PWR1

24-Pin

Fan1

PW1

CPU 1

CPU 2

COM2

6300ESB ICH

GLAN CTLR

PWR Fault

J2

J3

J4

J1

PW3

J18

J19

J20

J21

J22

J23

J8B1

JPL1

LAN1Enable

JPL2

LAN2Enable

P

C

IX

#

5

(P

C

IX

-1

0

)

JPR1

Alarm Reset

J9B1

J15 J13

JPA1

(*SCSI Enable)

PCIX slots/ SMB Connect

JF2

PWLED/ SPKR

P

C

I-E

#4

J14

Battery

Fan6

Fan5

JPG1

J17

VGA Enable

3

2- b

it P

C

I #

1

J5

Printer

J10

Floppy

J24

SCSI

J28

JL1

IDE 2

J38

Fan4

SATA0

SATA1

JS0

Cha. Intru

JS1

JB

T1

Clr CMOS

J41

IPMI

JWD

WD

ID

E 1

J44

JF1

F

a

n

3

E7320 (Lindenhurst

-VS)

MCH

PXH

(PCI-E/ PCIX Interface)

SI/O

VGA CTLR

SCSI (LSI 53C20)

64- bit

USB2,3

J

A

1

JSLED

SATA LED

D

S9

F

a

n

2

PW2

JWOL

D

S7

D

S

8

P

O

ST

LED

System LED

SCSI ChannelTerm. Enable

JPF

PWR Force On

BIOS

DS1

DS4

DS2

DS3

CPU PW LED

CPU1 VRM OHLED

CPU2 VRM OH LED

DS5

PWR LED

WOL

SCSI LED

Health LED

PWR Fail LED

2-12

X6DVA-4G/X6DVA-EG User's Manual

Power Button

OH/Fan Fail LED

1

NIC1 LED

Reset Button

2

Power Fail LED

HDD LED

Power LED

Reset

Pwr

Vcc

Ground

1920

Vcc

X

Ground

NMI

X

NIC2 LED

Vcc

Power Button

The Power Button connection is located on pins 1 and 2 of JF1. Momentarily contacting both pins will power on/off the system. To turn off the power when set to suspend mode, press the button for at least 4 seconds. Refer to the table on the right for pin definitions.

Number

1 2

Definition

PW_ ON

Ground

Power Button

Connector

Pin De finitions

Reset Button

The Reset Button connection is located on pins 3 and 4 of JF1. Attach it to the hardware reset switch on the computer case. Refer to the table on the right for pin definitions.

Number

3 4

Definition

Reset

Ground

Reset Pin

Definitions

GLAN1

®

S

U

P

E

R

X

6D

V

A

-4G

GLAN2

D

IM

M

2

B

D

IM

M

2

A

D

IM

M

3

B

D

IM

M

3

A

D

IM

M

1

A

D

IM

M

1

B

8-pin PWR2

SMB PWR

FP CTRL

Speaker

WOR

GLAN CTLR

X

4 P

C

I-E

p

x

es

s

P

C

IX

#

6

(P

C

IX

-1

3

3)

North Bridge

VGA

COM1

USB0/1

KB/ Mouse

PW4

ATX PWR1

24-Pin

Fan1

PW1

CPU 1

CPU 2

COM2

6300ESB ICH

GLAN CTLR

PWR Fault

J2

J3

J4

J1

PW3

J18

J19

J20

J21

J22

J23

J8B1

JPL1

LAN1Enable

JPL2

LAN2Enable

P

C

IX

#

5 (P

C

IX

-1

0

)

JPR1

Alarm Reset

J9B1

J15 J13

JPA1

(*SCSI Enable)

PCIX slots/ SMB Connect

JF2

PWLED/ SPKR

P

C

I-E

#

4

J14

Battery

Fan6

Fan5

JPG1

J17

VGA Enable

3

2

- b

it P

C

I #

1

J5

Printer

J10

Floppy

J24

SCSI

J28

JL1

IDE 2

J38

Fan4

SATA0

SATA1

JS0

Cha. Intru

JS1

JB

T1

Clr CMOS

J41

IPMI

JWD

WD

ID

E 1

J44

JF1

F

a

n

3

E7320 (Lindenhurst

-VS)

MCH

PXH

(PCI-E/ PCIX Interface)

SI/O

VGA CTLR

SCSI (LSI 53C20)

64- bit

USB2,3

J

A

1

JSLED

SATA LED

D

S

9

F

a

n

2

PW2

JWOL

D

S

7

D

S8

P

O

ST

LED

System LED

SCSI ChannelTerm. Enable

JPF

PWR Force On

BIOS

DS1

DS4

DS2

DS3

CPU PW LED

CPU1 VRM OHLED

CPU2 VRM OH LED

DS5

PWR LED

WOL

SCSI LED

Reset

PWR Button

Chapter 2: Installation

2-13

Chassis Intrusion

A Chassis Intrusion header is located at JL1. Attach the appropriate cable to inform you of a chassis intrusion.

Number

1 2

Definition

Intrusion Inpu

t

Ground

Chassis Intrusion

Pin Definitions

Universal Serial Bus (USB)

There are two Universal Serial Bus ports(USB 0/1) located on the I/O panel and additional two USB ports(USB 2/3) next to the IDE1 on the motherboard. These two FP USB ports can be used to provide front side chassis access (cables not included). See the tables on the right for pin definitions.

Pin# Definition

1 +5V

2 P0-

3 P0+

4 Ground

Number

2 4 6 8

10

Definition

+5V

PO-

PO+

Ground

Number

1 3 5 7

Definition

+5V

PO-

PO+

Ground

USB Pin Definition

USB 2/3 (Front Panel USB)

USB O/1 (Back Panel USB)

USB 0/1

USB 2/3

GLAN1

®

S

UPER X6DVA-4G

GLAN2

DIMM 2B

DIMM 2A

DIMM 3B

DIMM 3A

DIMM 1A

DIMM 1B

8-pin PWR2

SMB PWR

FP C

TR

L

Speaker

WOR

GLAN CTLR

X4 PCI-Epxess

PCIX #6 (PCIX-133)

North Bridge

VGA

COM1

USB0/1

KB/ Mouse

PW4

ATX PWR1

24-Pin

Fan1

PW1

CPU 1

CPU 2

COM2

6300ESB ICH

GLAN CTLR

PWR Fault

J2

J3

J4

J1

PW3

J18

J19

J20

J21

J22

J23

J8B1

JPL1

LAN1Enable

JPL2

LAN2Enable

PCIX #5 (PCIX-100)

JPR1

Alarm Reset

J9B1

J15 J13

JPA1

(*SCSI Enable)

PCIX slots/ SMB Connect

JF2

PWLED/ SPKR

PCI-E#4

J14

Battery

Fan6

Fan5

JPG1

J17

VGA Enable

32- bit PCI #1

J5

Printer

J10

Floppy

J24

SCSI

J28

JL1

IDE 2

J38

Fan4

SATA0

SATA1

JS0

Cha. Intru

JS1

JBT1

Clr CMOS

J41

IPMI

JWD

WD

IDE 1

J44

JF1

Fan3

E7320

(Lindenhurst

-VS)

MCH

PXH (PCI-E/

PCIX

Interface)

SI/O

VGA CTLR

SCSI (LSI 53C20)

64- bit

USB2,3

JA

1

JSLED

SATA LED

DS9

Fan2

PW2

JWOL

DS7

DS8

POST

LED

System LED

SCSI ChannelTerm. Enable

JPF

PWR Force On

BIOS

DS1

DS4

DS2

DS3

CPU PW LED

CPU1 VRM OHLED

CPU2 VRM OH LED

DS5

PWR LED

WOL

SCSI LED

Chassis Intrusion

2-14

X6DVA-4G/X6DVA-EG User's Manual

Wake-On-Ring

The Wake-On-Ring header is designated WOR. This function allows your computer to receive and "wake-up" by an incoming call to the modem when in suspend state. See the table on the right for pin definitions. You must have a Wake-On-Ring card and cable to use this feature.

Wake-on-Ring

Pin Definitions

(WOR)

Number

1 2

Definition

Ground

Wake-up

Wake-On-LAN

The Wake-On-LAN header(JWOL) is designated WOL on the motherboard. See the table on the right for pin definitions. You must enable the LAN Wake-Up setting in BIOS to use this function. (You must also have a LAN card with a Wake-On-LAN connector and cable to use this feature.)

Number

1 2 3

Definition

+5V Standby

Ground

Wake-up

Wake-On-LAN Pin

Definitions (JWOL)

GLAN1

®

S

UPER X6DVA-4G

GLAN2

D

IM

M

2

B

D

IM

M

2

A

D

IM

M

3

B

D

IM

M

3A

D

IM

M

1

A

D

IM

M

1

B

8-pin PWR2

SMB PWR

FP

C

TR

L

S

p

e

a

k

e

r

W

O

R

G

L

A

N

C

T

L

R

X

4

P

C

I-E

p

x

e

s

P

C

IX

#

6

(P

C

IX

-1

3

)

N

o

rth

B

rid

g

e

V

G

A

C

O

M

1

U

S

B

0

/1

K

B

/

M

o

u

s

e

P

W

4

A

T

X

P

W

R

1

2

4

-P

in

F

a

n

1

PW1

C

P

U

1

C

P

U

2

C

O

M

2

6

3

0

E

S

B

IC

H

G

L

A

N

C

T

L

R

P

W

R

F

a

u

lt

J

2

J

3

J

4

J

1

PW3

J

1

8

J

1

9

J

2

0

J

2

1

J

2

J

2

3

J

8

B

1

J

P

L

1

L

A

N

1

E

n

a

b

le

J

P

L

2

L

A

N

2

E

n

a

b

le

P

C

IX

#

5

(P

C

IX

-1

0

)

J

P

R

1

A

la

rm

R

e

s

e

t

J

9

B

1

J

1

5

J

1

3

J

P

A

1

(*S

C

S

I E

n

a

b

le

)

P

C

IX

s

lo

ts

/

S

M

B

C

o

n

e

c

t

J

F

2

P

W

L

E

D

/

S

P

K

R

P

C

I-E

#

4

J

1

4

Battery

F

a

n

6

F

a

n

5

J

P

G

1

J

1

7

V

G

A

E

n

a

b

le

3

2

- b

it P

C

I #

1

J

5

P

rin

te

r

J

1

0

F

lo

p

y

J

2

4

S

C

S

I

J

2

8

J

L

1

ID

E

2

J

3

8

F

a

n

4

S

A

T

A

0

S

A

T

A

1

J

S

0

C

h

a

. In

tr

u

J

S

1

J

B

T

1

Clr CMOS

J

4

1

IP

M

I

J

W

D

W

D

ID

E

1

J

4

J

F

1

Fan3

E

7

3

2

0

(L

in

d

e

n

h

u

r

s

t

-V

S

)

M

C

H

P

X

H

(P

C

I-E

/

P

C

IX

In

te

rfa

c

e

)

S

I/O

V

G

A

C

T

L

R

S

C

S

I (L

S

I

5

3

C

2

0

)

64- bit

U

S

B

2

,3

JA1

J

S

L

E

D

S

A

T

A

L

E

D

S

9

Fan2

P

W

2

J

W

O

L

D

S

7

D

S

8

P

O

S

T

L

E

D

S

y

s

te

m

L

E

D

S

C

S

I

C

h

a

n

e

lT

e

rm

.

E

n

a

b

le

J

P

F

P

W

R

F

o

rc

e

O

n

B

IO

S

D

S

1

D

S

4

D

S

2

D

S

3

C

P

U

P

W

L

E

D

C

P

U

1

V

R

M

O

H

L

E

D

C

P

U

2

V

R

M

O

H

L

E

D

S

5

P

W

R

L

E

D

WOL

S

C

S

I L

E

D

WOR WOL

Chapter 2: Installation

2-15

Serial Ports

There are one Serial Port-COM1 (J4) and one Serial Header- COM2 (J5) on the X6DVA-4G/EG. COM2 is located next to the parallel port. See the table on the right for pin definitions.

Seria l P o rt P i n D e fin itions

(COM 1 , C O M 2 )

Pin Number Definition 1 DCD 2 DS R 3 Serial In 4 RTS 5 Seria l O u t

Pin Number De finition 6 CTS 7 DTR 8 RI 9 Ground 10 NC

GLAN (Giga-bit Ethernet) Ports

A G-bit Ethernet port (designated JLAN1/JLAN2) is located beside the VGA port on the IO backplane. This port accepts RJF1 type cables.

GLAN1

®

S

UPER X6DVA-4G

GLAN2

DIMM 2B

DIMM 2A

DIMM 3B

DIMM 3A

DIMM 1A

DIMM 1B

8-pin PWR2

SMB PWR

FP CTRL

Speaker

WOR

GLAN CTLR

X

4

P

C

I-E

p

x

e

s

P

C

IX

#

6

(P

C

IX

-1

3

)

North Bridge

VGA

COM1

USB0/1

KB/ Mouse

PW4

ATX PWR1

24-Pin

Fan1

PW1

CPU 1

CPU 2

COM2

6300ESB

ICH

GLAN

CTLR

PWR Fault

J2

J3

J4

J1

PW3

J18

J19

J20

J21

J22

J23

J8B1

JPL1

LAN1Enable

JPL2

LAN2Enable

P

C

IX

#

5

(P

C

IX

-1

0

)

JPR1

Alarm Reset

J9B1

J15 J13

JPA1

(*SCSI Enable)

PCIX slots/ SMB Connect

JF2

PWLED/ SPKR

P

C

I-E

#

4

J14

Battery

Fan6

Fan5

JPG1

J17

VGA Enable

3

2

- b

it P

C

I #

1

J5

Printer

J10

Floppy

J24

SCSI

J28

JL1

IDE 2

J38

Fan4

SATA0

SATA1

JS0

Cha. Intru

JS1

JB

T1

Clr CMOS

J41

IPMI

JWD

WD

IDE 1

J44

JF1

Fan3

E7320 (Lindenhurst

-VS)

MCH

PXH

(PCI-E/ PCIX Interface)

SI/O

VGA CTLR

SCSI (LSI

53C20)

64- bit

USB2,3

J

A

1

JSLED

SATA LED

D

S9

Fan2

P

W

2

JWOL

D

S

7

D

S8

P

O

S

T

LE

D

System LED

SCSI ChannelTerm. Enable

JPF

PWR Force On

BIOS

DS1

DS4

DS2

DS3

CPU PW LED

CPU1 VRM OHLED

CPU2 VRM OH LED

DS5

PWR LED

WOL

SCSI LED

COM2

GLAN2

GLAN1

COM1

2-16

X6DVA-4G/X6DVA-EG User's Manual

ATX PS/2 Keyboard and PS/2 Mouse Ports

The ATX PS/2 keyboard and PS/2 mouse are located on J2. See the table at right for pin definitions. (See Figure 2-3 for the locations of each.)

PS/2 Keyboard

and Mouse Port

Pin Definiti ons

(J2)

Number

1 2 3 4 5 6

Definition

Data

NC

Ground

VCC

Clock

NC

Fan Headers

There are six fan headers (Fan 1 to Fan

6) on the X6DVA-4G/X6DVA-EG. See the table on the right for pin definitions. (*Note: These fan headers are 4-pin fans. Pins 1-3 of the fan headers are backward compatible with the traditional 3-pin fans.) Please refer to the Advanced Setting in the AMIBIOS for fan speed control settings.

4-pin Fan Hea d er Pin Definitions

(CPU and Chassis Fans )

Pin#

1

2 3

Definition

Ground (black)

+12V (red)

Tachometer

Caution: These fan headers use DC power.

4 PWR_Control

GLAN1

®

S

UPER X6DVA-4G

GLAN2

DIMM 2B

DIMM 2A

DIMM 3B

DIMM 3A

DIMM 1A

DIMM 1B

8-pin PWR2

SMB PWR

F

P

C

T

R

L

Speaker

WOR

GLAN CTLR

X4 PCI-Epxess

PCIX #6 (PCIX-133)

North Bridge

VGA

COM1

USB0/1

KB/ Mouse

PW4

ATX PWR1

24-Pin

Fan1

PW1

CPU 1

CPU 2

COM2

6300ESB ICH

GLAN CTLR

PWR

Fault

J2

J3

J4

J1

PW3

J18

J19

J20

J21

J22

J23

J8B1

JPL1

LAN1Enable

JPL2

LAN2Enable

PCIX #5 (PCIX-100)

JPR1

Alarm

Reset

J9B1

J15 J13

JPA1

(*SCSI Enable)

PCIX slots/ SMB Connect

JF2

PWLED/ SPKR

PCI-E#4

J14

Battery

Fan6

Fan5

JPG1

J17

VGA Enable

32- bit PCI #1

J5

Printer

J10

Floppy

J24

SCSI

J28

JL1

IDE 2

J38

Fan4

SATA0

SATA1

JS0

Cha. Intru

JS1

JBT1

Clr CMOS

J41

IPMI

JWD

WD

IDE 1

J44

JF1

F

a

n

3

E7320 (Lindenhurst

-VS)

MCH

PXH (PCI-E/

PCIX Interface)

SI/O

VGA CTLR

SCSI (LSI 53C20)

64- bit

USB2,3

JA1

JSLED

SATA LED

DS9

F

a

n

2

PW

2

JWOL

DS7

DS8

POST

LED

System LED

SCSI ChannelTerm. Enable

JPF

PWR Force On

BIOS

DS1

DS4

DS2

DS3

CPU PW LED

CPU1 VRM OHLED

CPU2 VRM OH LED

DS5

PWR LED

WOL

SCSI LED

KB/Mouse

Fan1

Fan2 Fan3

Fan4

Fan5

Fan6

Chapter 2: Installation

2-17

Power Fault

Connect a cable from your power supply to the PW4 header to provide warning of power supply failure. This warning signal is passed through the PWR_LED pin to indicate of a power failure on the chassis. See the table on the right for pin definitions.

Power Fail

Pin Definitions (PW4)

Number

1 2 3 4

Definition P/S 1 Fail Signal P/S 2 Fail Signal P/S 3 Fail Signal Reset (from MB)

Note: This feature is only available when using redundant Supermicro power supplies.

VGA Connector

A VGA connector (J1) is located next to the GLAN1 on the IO backplane. Refer to the board layout below for the

location.

PWR FaultVGA

GLAN1

®

S

UPER X6DVA-4G

GLAN2

DIMM 2B

DIMM 2A

DIMM 3B

DIMM 3A

DIMM 1A

DIMM 1B

8-pin PWR2

SMB PWR

F

P

C

T

R

L

Speaker

WOR

GLAN CTLR

X

4 PC

I-Epxess

PC

IX #6 (PC

IX-133)

North Bridge

VGA

COM1

USB0/1

KB/ Mouse

PW4

ATX PWR1

24-Pin

Fan1

PW1

CPU 1

CPU 2

COM2

6300ESB ICH

GLAN CTLR

PWR Fault

J2

J3

J4

J1

PW3

J18

J19

J20

J21

J22

J23

J8B1

JPL1

LAN1Enable

JPL2

LAN2Enable

PC

IX

#5 (PC

IX-100)

JPR1

Alarm Reset

J9B1

J15 J13

JPA1

(*SCSI Enable)

PCIX slots/ SMB Connect

JF2

PWLED/ SPKR

P

C

I-E#4

J14

Battery

Fan6

Fan5

JPG1

J17

VGA Enable

32- bit P

C

I #1

J5

Printer

J10

Floppy

J24

SCSI

J28

JL1

IDE 2

J38

Fan4

SATA0

SATA1

JS0

Cha. Intru

JS1

JBT1

Clr CMOS

J41

IPMI

JWD

WD

IDE 1

J44

JF1

F

a

n

3

E7320 (Lindenhurst

-VS)

MCH

PXH

(PCI-E/ PCIX Interface)

SI/O

VGA CTLR

SCSI (LSI 53C20)

64- bit

USB2,3

JA1

JSLED

SATA LED

DS9

F

a

n

2

PW

2

JWOL

DS7

DS8

POST

LED

System LED

SCSI ChannelTerm. Enable

JPF

PWR Force On

BIOS

DS1

DS4

DS2

DS3

CPU PW LED

CPU1 VRM OHLED

CPU2 VRM OH LED

DS5

PWR LED

WOL

SCSI LED

2-18

X6DVA-4G/X6DVA-EG User's Manual

SMB Power (I

2

C)

Connector

I2 C Connector (PW3), located

next to the ATX 24-pin PWR Connector, monitors the status of PWR Supply, Fan and system temperature.

SMB PWR

Pin Definitions (PW3)

Pin #

1 2 3 4 5

Definition

Clock

Data

N/A N/A N/A

Speaker/Power LED/ Keylock

On the JF2 header, pins 1/3/5/7 are for the Speaker, and Pins 2/4/ 6 are for the Power LED and pins 8/10 are for Keylock. See the table on the right for speaker pin definitions. Note: The speaker connector pins are for use with an external speaker. (*Default: Close Pins 5 and 7 to enable onboard buzzer.)

Speaker Connector Pin

Definiti ons (JF2)

Number

1 3 5 7

Definition

Red wire, Speaker data

No connection

Buzzer Signal

Speaker data

PWR LED/Keylock Connector Pin

Definiti ons (JF2)

Number

2 4 6 8

10

Definition

+Vcc

-Vcc

-Vcc Keylock Keylock

GLAN1

®

S

UPER X6DVA-4G

GLAN2

DIMM 2B

DIMM 2A

DIMM 3B

DIMM 3A

DIMM 1A

DIMM 1B

8-pin PWR2

SMB PWR

F

P

C

T

R

L

Speaker

W

O

R

G

LAN

CTLR

X

4

P

C

I-E

p

xes

s

P

C

IX

#

6 (P

C

IX

-133)

North Bridge

VG

A

COM

1

USB0/1

KB/

M

ouse

PW

4

ATX PW

R1

24-Pin

Fan1

PW1

CPU 1

CPU 2

C

O

M

2

6300ESB ICH

G

LAN

CTLR

PW

R

Fault

J2

J3

J4

J1

PW3

J18

J19

J20

J21

J22

J23

J8B1

JPL1

LAN1Enable

JPL2

LAN2Enable

P

C

IX

#5 (P

C

IX

-10

0

)

JPR1

Alarm Reset

J9B1

J15 J13

JPA1

(*SCSI Enable)

PCIX slots/ SM

B Connect

JF2

PW

LED/

SPKR

P

C

I-E

#4

J14

Battery

Fan6

Fan5

JPG

1

J17

VG

A Enable

3

2- b

it P

C

I #1

J5

Printer

J10

Floppy

J24

SCSI

J28

JL1

IDE 2

J38

Fan4

SATA0

SATA1

JS0

Cha. Intru

JS1

JBT1

Clr CMOS

J41

IPM

I

JW

D

W

D

IDE 1

J44

JF1

F

an

3

E7320 (Lindenhurst

-VS)

M

CH

PXH

(PCI-E/ PCIX Interface)

SI/O

VG

A

CTLR

SCSI (LSI 53C20)

64- bit

USB2,3

JA1

JSLED

SATA LED

DS9

F

an

2

P

W

2

JW

O

L

DS7

DS8

POST

LED

System

LED

SCSI ChannelTerm

.

Enable

JPF

PW

R Force On

BIOS

DS1

DS4

DS2

DS3

CPU PW

LED

CPU1 VRM O

HLED

CPU2 VRM OH LED

DS5

PW

R LED

WOL

SCSI LED

SPKR/PWLED/Keylock

6 8

10

2 4

Pin Location

s

1 3

5 7 9

SMB PWR

Chapter 2: Installation

2-19

2-6 Jumper Settings

Explanation of Jumpers

To modify the operation of the motherboard, jumpers can be used to choose between optional settings. Jumpers create shorts between two pins to change the function of the connector. Pin 1 is identified with a square solder pad on the printed circuit board. See the motherboard layout pages for jumper locations. Note: On two pin jumpers, "Closed" means the jumper is on and "Open" means the jumper is off the pins.

Connector

Pins

Jumper

Cap

Setting

Pin 1-2 short

3 2 1

LAN1/LAN2 Enable/Disable

JPL1 and JPL2 enable or disable the GLAN ports: LAN1 (JPL1), and LAN2 (JPL2) on the motherboard. See the table on the right for jumper settings. The default setting is enabled.

Jumper Position Pins 1-2 Pins 2-3

Definition

Enabled

Disabled

GLAN

Enable/Disable

Jumper Settings

(JPL1, JPL2)

GLAN1

®

S

UPER X6DVA-4G

GLAN2

D

IM

M

2B

D

IM

M

2A

D

IM

M

3B

D

IM

M

3A

D

IM

M

1A

D

IM

M

1B

8-pin PWR2

SMB PWR

FP CTRL

S

p

e

a

k

e

r

W

O

R

G

L

A

N

C

T

L

R

X4 PCI-Epxess

PCIX #6 (PCIX-133)

N

o

r

th

B

r

id

g

e

V

G

A

C

O

M

1

U

S

B

0

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K

B

/

M

o

u

s

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P

W

4

A

T

X

P

W

R

1

2

4

-P

in

F

a

n

1

PW1

C

P

U

1

C

P

U

2

C

O

M

2

6

3

0

E

S

B

IC

H

G

L

A

N

C

T

L

R

P

W

R

F

a

u

lt

J

2

J

3

J

4

J

1

PW3

J

1

8

J

1

9

J

2

0

J

2

1

J

2

J

2

3

J

8

B

1

J

P

L

1

L

A

N

1

E

n

a

b

le

J

P

L

2

L

A

N

2

E

n

a

b

le

PCIX #5 (PCIX-100)

J

P

R

1

A

la

r

m

R

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s

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t

J

9

B

1

J

1

5

J

1

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A

1

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2

P

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P

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PCI-E#4

J

1

4

Battery

F

a

n

6

F

a

n

5

J

P

G

1

J

1

7

V

G

A

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n

a

b

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J

5

P

r

in

te

r

J

1

0

F

lo

p

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J

2

4

S

C

S

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J

2

8

J

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1

ID

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2

J

3

8

F

a

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S

A

T

A

1

J

S

0

C

h

a

. In

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J

S

1

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Clr CMOS

J

4

1

IP

M

I

J

W

D

W

D

ID

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1

J

4

J

F

1

F

a

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3

E

7

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L

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S

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L

S

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5

3

C

2

0

)

64- bit

U

S

B

2

,3

J

A

1

J

S

L

E

D

S

A

T

A

L

E

D

DS9

F

a

n

2

P

W

2

J

W

O

L

DS7

DS8

POST

LED

S

y

s

t

e

m

L

E

D

S

C

S

I

C

h

a

n

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lT

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r

m

.

E

n

a

b

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J

P

F

P

W

R

F

o

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c

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O

n

B

IO

S

D

S

1

D

S

4

D

S

2

D

S

3

C

P

U

P

W

L

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D

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P

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1

V

R

M

O

H

L

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D

C

P

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2

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O

H

L

E

D

S

5

P

W

R

L

E

D

WOL

S

C

S

I L

E

D

LAN1 Enable

LAN2 Enable

2-20

X6DVA-4G/X6DVA-EG User's Manual

Watch Dog

JWD controls Watch Dog, a system monitor that takes action when a software application freezes the system. Pins 1-2 will have WD reset the system if a program freezes. Pins 2-3 will generate a non-maskable interrupt for the program that has frozen (requires software implementation). Watch Dog must also be enabled in BIOS.

Jumper

Position Pins 1-2 Pins 2-3

Open

Definition

WD to Reset

WD to NMI

Disabled

Watch Dog

Jumper Settings (JWD)

CMOS Clear

JBT1 is used to clear CMOS. Instead of pins, this "jumper" consists of contact pads to prevent the accidental clearing of CMOS. To clear CMOS, use a metal object such as a small screwdriver to touch both pads at the same time to short the connection. Always remove the AC power cord from the system before clearing CMOS. Note: For an ATX power supply, you must completely shut down the system, remove the AC power cord and then short JBT1 to clear CMOS.

GLAN1

®

S

UPER X6DVA-4G

GLAN2

DIM

M

2B

D

IM

M

2A

DIM

M

3B

D

IM

M

3A

DIM

M

1A

D

IM

M

1B

8-pin PWR2

SMB PWR

FP CTRL

S

p

e

a

k

e

r

W

O

R

G

L

A

N

C

T

L

R

X

4

P

C

I-E

p

x

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s

P

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IX

#

6

(P

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IX

-1

3

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F

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2

J

3

J

4

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1

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J

1

8

J

1

9

J

2

0

J

2

1

J

2

J

2

3

J

8

B

1

J

P

L

1

L

A

N

1

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n

a

b

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P

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L

A

N

2

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C

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P

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1

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larm

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9

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1

5

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1

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P

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4

J

1

4

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F

a

n

6

F

a

n

5

J

P

G

1

J

1

7

V

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A

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n

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3

2

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C

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J

5

P

rin

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J

10

F

lo

p

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2

4

S

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I

J

28

J

L

1

ID

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2

J

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F

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S

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T

A

0

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A

1

J

S

0

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h

a

. In

tru

J

S

1

J

B

T

1

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J

4

1

IP

M

I

J

W

D

W

D

ID

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J

44

J

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1

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7

3

2

0

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in

d

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h

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rs

t

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U

S

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2,3

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J

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L

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A

T

A

L

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D

S

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Fan2

PW

2

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W

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D

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D

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P

W

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D

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P

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L

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D

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5

P

W

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L

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D

WOL

S

C

S

I L

E

D

WD

Clear CMOS

Chapter 2: Installation

2-21

VGA Enable/Disable

JPG1 enables or disables the VGA Connector on the motherboard. See the table on the right for jumper settings. The default setting is enabled.

Jumper Position Pins 1-2 Pins 2-3

Definition

Enabled

Disabled

VGA

Enable/Disable

Jumper Settings

(JPG1)

SMB Data/SMB CLK to PCI

Jumpers J13, J15 allow you to connect or disconnect PCI Slot1/PCI-X Slot5/PCI -X Slot6 to the System Management Bus. The default setting is to close pins 1-2 to enable the connection. See the table on the right for jumper settings. (*Note: both jumpers are used in tandem, and have to be set to the same setting in order to work properly since one is for the clock and another one for the data.)

Jumper

Position

Closed

Open

Definition

Enabled

Disabled

PCI/PCIX slots to SMB

Connection

Jumper Settings

(J13, J15)

GLAN1

®

S

UPER X6DVA-4G

GLAN2

DIMM 2B

DIMM 2A

DIMM 3B

DIMM 3A

DIMM 1A

DIMM 1B

8-pin PWR2

SMB PWR

F

P

C

T

R

L

S

p

e

a

k

e

r

W

O

R

G

L

A

N

C

T

L

R

X

4

P

C

I-E

p

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P

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IX

#

6

(P

C

IX

-1

3

)

N

o

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1

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2

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2

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J

2

J

2

3

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J

1

4

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F

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7

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h

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4

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M

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D

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D

I

D

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J

4

J

F

1

F

a

n

3

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d

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)

64- bit

U

S

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JA

1

J

S

L

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D

S

A

T

A

L

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D

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F

a

n

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J

W

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DS8

POST

LED

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s

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D

PCI slots to SMB

VGA Enable

2-22

X6DVA-4G/X6DVA-EG User's Manual

SCSI Controller Enable/ Disable (*ForX6DVA-4G

only)

Jumper JPA1 allows you to enable or disable the SCSI Controller. The default setting is pins 1-2 to enable all four headers. See the table on the right for jumper settings.

Jumper

Position Pins 1-2 Pins 2-3

Definition

Enabled

Disabled

SCSI Enable/Disable

Jumper Settings

(JPA1)

SCSI Termination Enable/ Disable (*ForX6DVA-4G

only)

Jumper JA1 allows you to enable or disable termination for the SCSI connector. The default setting is open to enable (terminate) the SCSI Controller. (*Note: In order for the SCSI drives to function properly, please do not change the default setting set by the manufacturer.) See the table on the right for jumper settings.

Jumper

Position

Open

Closed

Definition

Enabled

Disabled

SCSI Channel Terminatio

n

Enable/Disable

Jumper Settings

(JA1)

GLAN1

®

S

UPER X6DVA-4G

GLAN2

DIMM 2B

DIMM 2A

DIMM 3B

DIMM 3A

DIMM 1A

DIMM 1B

8-pin PWR2

SMB PWR

F

P

C

T

R

L

S

p

e

a

k

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r

W

O

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G

L

A

N

C

T

L

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4

P

C

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p

x

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#

6

(

P

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1

3

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in

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3

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8

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2

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3

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4

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U

S

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2

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1

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I

C

h

a

n

e

lT

e

r

m

.

E

n

a

b

le

J

P

F

P

W

R

F

o

r

c

e

O

n

B

IO

S

D

S

1

D

S

4

D

S

2

D

S

3

C

P

U

P

W

L

E

D

C

P

U

1

V

R

M

O

H

L

E

D

C

P

U

2

V

R

M

O

H

L

E

D

S

5

P

W

R

L

E

D

WOL

S

C

S

I L

E

D

SCSI Enable

SCSI Term. Enable

Chapter 2: Installation

2-23

Alarm Reset

The system will notify you in the event of a power supply failure. This feature assumes that Supermicro redundant power supply units are installed in the chassis. If you only have a single power supply installed, you should not connect anything to this header (JPR1) to prevent false alarms. See the table on the right for jumper settings.

Jumper

Position

Open

Closed

Definition

Enabled

Disabled

Alarm Reset Jumper

Settings

(JPR1)

Alarm Reset

Power Force-On

Jumper JPF allows you to enable or disable the function of Power ForceOn. If enabled, the power will always stay on automatically. If this function disabled, the user needs to press the power button to power on the system.

Jumper

Position

Off On

Definition

Normal

Force On

Power Force-On

(JPF)

GLAN1

®

S

UPER X6DVA-4G

GLAN2

D

IM

M

2B

D

IM

M

2A

D

IM

M

3B

D

IM

M

3A

D

IM

M

1A

D

IM

M

1B

8-pin PWR2

SMB PWR

FP CTRL

S

p

e

a

k

e

r

W

O

R

G

L

A

N

C

T

L

R

X4 PCI-Epxess

PCIX #6 (PCIX-133)

N

o

r

th

B

r

id

g

e

V

G

A

C

O

M

1

U

S

B

0

/1

K

B

/

M

o

u

s

e

P

W

4

A

T

X

P

W

R

1

2

4

-

P

in

F

a

n

1

PW1

C

P

U

1

C

P

U

2

C

O

M

2

6

3

0

E

S

B

IC

H

G

L

A

N

C

T

L

R

P

W

R

F

a

u

lt

J

2

J

3

J

4

J

1

PW3

J

1

8

J

1

9

J

2

0

J

2

1

J

2

J

2

3

J

8

B

1

J

P

L

1

L

A

N

1

E

n

a

b

le

J

P

L

2

L

A

N

2

E

n

a

b

le

PCIX #5 (PCIX-100)

J

P

R

1

A

la

r

m

R

e

s

e

t

J

9

B

1

J

1

5

J

1

3

J

P

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S

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)

P

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t

J

F

2

P

W

L

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D

/

S

P

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PCI-E#4

J

1

4

Battery

F

a

n

6

F

a

n

5

J

P

G

1

J

1

7

V

G

A

E

n

a

b

le

32- bit PCI #1

J

5

P

r

in

te

r

J

1

0

F

lo

p

y

J

2

4

S

C

S

I

J

2

8

J

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1

ID

E

2

J

3

8

F

a

n

4

S

A

T

A

0

S

A

T

A

1

J

S

0

C

h

a

. In

t

r

u

J

S

1

JB

T1

Clr CMOS

J

4

1

IP

M

I

J

W

D

W

D

ID

E

1

J

4

J

F

1

F

a

n

3

E

7

3

2

0

(

L

in

d

e

n

h

u

r

s

t

-

V

S

)

M

C

H

P

X

H

(

P

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/

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C

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In

t

e

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)

S

I/O

V

G

A

C

T

L

R

S

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S

I (

L

S

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5

3

C

2

0

)

64- bit

U

S

B

2

,3

J

A

1

J

S

L

E

D

S

A

T

A

L

E

D

S9

F

a

n

2

PW2

J

W

O

L

D

S7

D

S8

PO

S

T

LED

S

y

s

t

e

m

L

E

D

S

C

S

I

C

h

a

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e

lT

e

r

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a

b

le

J

P

F

P

W

R

F

o

r

c

e

O

n

B

IO

S

D

S

1

D

S

4

D

S

2

D

S

3

C

P

U

P

W

L

E

D

C

P

U

1

V

R

M

O

H

L

E

D

C

P

U

2

V

R

M

O

H

L

E

D

S

5

P

W

R

L

E

D

WOL

S

C

S

I L

E

D

PWR Force-On

2-24

X6DVA-4G/X6DVA-EG User's Manual

GLAN1

®

S

UPER X6DVA-4G

GLAN2

DIMM 2B

DIMM 2A

DIMM 3B

DIMM 3A

DIMM 1A

DIMM 1B

8-pin PWR2

SMB PWR

F

P

C

T

R

L

Speaker

WOR

GLAN CTLR

X4 PCI-Epxess

PCIX #6 (PCIX-133)

North Bridge

VGA

COM1

USB0/1

KB/ Mouse

PW4

ATX PWR1

24-Pin

Fan1

PW1

CPU 1

CPU 2

COM2

6300ESB ICH

GLAN CTLR

PWR Fault

J2

J3

J4

J1

PW3

J18

J19

J20

J21

J22

J23

J8B1

JPL1

LAN1Enable

JPL2

LAN2Enable

PCIX #5 (PCIX-100)

JPR1

Alarm Reset

J9B1

J15 J13

JPA1

(*SCSI Enable)

PCIX slots/ SMB Connect

JF2

PWLED/ SPKR

PCI-E#4

J14

Battery

Fan6

Fan5

JPG1

J17

VGA Enable

32- bit PCI #1

J5

Printer

J10

Floppy

J24

SCSI

J28

JL1

IDE 2

J38

Fan4

SATA0

SATA1

JS0

Cha. Intru

JS1

JB

T1

Clr CMOS

J41

IPMI

JWD

WD

IDE 1

J44

JF1

F

a

n

3

E7320 (Lindenhurst

-VS)

MCH

PXH

(PCI-E/ PCIX Interface)

SI/O

VGA CTLR

SCSI (LSI 53C20)

64- bit

USB2,3

JA1

JSLED

SATA LED

D

S

9

F

a

n

2

PW2

JWOL

D

S

7

D

S

8

P

O

S

T

LE

D

System LED

SCSI ChannelTerm.

Enable

JPF

PWR Force On

BIOS

DS1

DS4

DS2

DS3

CPU PW LED

CPU1 VRM OHLED

CPU2 VRM

OH LED

DS5

PWR LED

WOL

SCSI LED

GLAN LEDs

The Gigabit Ethernet LAN ports (located beside the Video port) has two LEDs. The yellow LED indicates activity while the other LED may be green, orange or off to indicate the speed of the connection. See the table at right for the functions associated with the second LED.

2-7 Onboard Indicators

LED

Color

Off Green Amber

Definition

10 MHz

100 MHz

1 GHz

1 Gb LAN Left LED

Indicator (Speed LED)

RightLeft

LED

Color

Amber

Definition

Blinking

10/100MHz/

1GHz

1 Gb LAN Right LED

Indicator(Activity LED)

SATA LED

SATA LED Header

A Serial ATA LED header is located at JSLED. See the table on the right for SATA LED pin definitions.

SATA LED Pin Definitions (JS L ED)

Pin#

1 2 3 4 5

Definition 6300ESB SATA HD0 Active LED 6300ESB SATA HD1 Active LED

N/C N/C N/C

Back View

Chapter 2: Installation

2-25

System LED (DS9)

There is is a system LED (DS9) on the motherboard. DS9 (System LED) indicates the status of the system. Refer to table on the right for information. Please refer to Appendix A for information.

DS7

DS8

DS9

Onboard LED Indicators (DS1-DS5, DS7-DS8)

In addition to the LAN LEDs and SATA LED, there are other LED indicators (DS1-DS5, DS7-DS8) on the X6DVA-4G/EG. DS7 and DS8 are POST Codes LEDs. See the table on the right for speaker pin definitions. (*Note: Please refer to Appendix A for DS7 and DS8 LED POST Codes.)

On board LED Definitions

DS# DS1

DS2 DS3 DS4 DS5

DS7-8

Definition

CPU PWR good or CPU +12V PWR

Cable must be connected.

CPU2 VRM Overheat

SCSI LED

CPU1 VRM Overheat

PW R LED

POST LED

System Alert LED (DS9) Defini tion

DS9

Green

Amber

Red

Definition

System: On & OK System: Off, PWR Cable Connected PWR or CPU Failure, CPU Overheat

GLAN1

®

S

UPER X6DVA-4G

GLAN2

D

IM

M

2

B

D

IM

M

2

A

D

IM

M

3

B

D

IM

M

3

A

D

IM

M

1

A

D

IM

M

1

B

8-pin PWR2

SMB PWR

FP CTRL

Speaker

W

O

R

GLAN CTLR

X4 PCI-Epxess

PCIX #6 (PCIX-133)

North Bridge

VGA

COM

1

USB0/1

KB/ M

ouse

PW

4

ATX PW

R1

24-Pin

Fan1

PW1

CPU 1

CPU 2

CO

M

2

6300ESB ICH

GLAN CTLR

PW

R

Fault

J2

J3

J4

J1

PW3

J18

J19

J20

J21

J22

J23

J8B1

JPL1

LAN1Enable

JPL2

LAN2Enable

PCIX #5 (PCIX-100)

JPR1

Alarm Reset

J9B1

J15 J13

JPA1

(*SCSI Enable)

PCIX slots/ SM

B Connect

JF2

PW

LED/

SPKR

PCI-E#4

J14

Battery

Fan6

Fan5

JPG

1

J17

VGA Enable

32- bit PCI #1

J5

Printer

J10

Floppy

J24

SCSI

J28

JL1

IDE 2

J38

Fan4

SATA0

SATA1

JS0

Cha. Intru

JS1

JBT1

Clr CMOS

J41

IPM

I

JW

D

W

D

IDE 1

J44

JF1

Fan3

E7320 (Lindenhurst

-VS)

M

CH

PXH

(PCI-E/ PCIX Interface)

SI/O

VGA CTLR

SCSI (LSI 53C20)

64- bit

USB2,3

J

A

1

JSLED

SATA LED

DS9

Fan2

PW2

JW

OL

DS7

DS8

PO

ST

LED

System

LED

SCSI ChannelTerm

.

Enable

JPF

PW

R Force On

BIOS

DS1

DS4

DS2

DS3

CPU PW

LED

CPU1 VRM O

HLED

CPU2 VRM OH LED

DS5

PW

R LED

WOL

SCSI LED

DS1 DS4

DS2

DS5

DS3

2-26

X6DVA-4G/X6DVA-EG User's Manual

2-8 Parallel Port, Floppy/Hard Disk Drive and SCSI Connections

Note the following when connecting the floppy and hard disk drive cables:

• The floppy disk drive cable has seven twisted wires.

• A red mark on a wire typically designates the location of pin 1.

• A single floppy disk drive ribbon cable has 34 wires and two connectors to provide for two floppy disk drives. The connector with twisted wires always connects to drive A, and the connector that does not have twisted wires always connects to drive B.

Parallel (Printer) Port Connector

The parallel (printer) port is located on J10. See the table on the right for pin definitions. (*Cable CBL-081 is required.)

Pin Number Function 1 Strobe 3 Data Bit 0 5 Data Bit 1 7 Data Bit 2 9 Data Bit 3 11 Data Bit 4 13 Data Bit 5 15 Data Bit 6 17 Data Bit 7 19 ACK 21 BUSY 23 PE 25 SLCT

Pin Number Function 2 Auto Feed

-

4 Error 6 Init 8 SLCT IN 10 GND 12 GND 14 GND 16 GND 18 GND 20 GND 22 GND 24 GND 26 NC

Par allel (Printer) Port Pin Definitions

(J10)

GLAN1

®

S

UPER X6DVA-4G

GLAN2

D

IM

M

2B

D

IM

M

2A

DIM

M

3B

D

IM

M

3A

DIM

M

1A

DIM

M

1B

8-pin PWR2

SMB PWR

F

P

C

T

R

L

Speaker

W

O

R

G

LA

N

CTLR

X

4

P

C

I-E

p

x

e

s

P

C

IX

#

6

(P

C

IX

-1

3

)

N

orth

B

ridge

VG

A

C

O

M

1

USB0/1

KB

/

M

ouse

PW

4

A

TX

PW

R1

24-Pin

Fan1

PW1

C

PU

1

CPU 2

C

O

M

2

6300ESB IC

H

G

LAN

C

TLR

PW

R

Fault

J2

J3

J4

J1

PW3

J18

J19

J20

J21

J22

J23

J8B1

JPL1

LA

N1Enable

JPL2

LAN

2Enable

P

C

IX

#

5

(P

C

IX

-1

0

)

JPR1

Alarm Reset

J9B

1

J15 J13

JPA1

(*SC

SI Enable)

PC

IX slots/

SM

B

C

onnect

JF2

PW

LED/

SPKR

P

C

I-E

#

4

J14

Battery

Fan6

Fan5

JPG

1

J17

VG

A

Enable

3

2

- b

it P

C

I #

1

J5

Printer

J10

Floppy

J24

SCSI

J28

JL1

ID

E 2

J38

Fan4

SATA

0

SATA

1

JS0

Cha. Intru

JS1

J

B

T

1

Clr CMOS

J41

IPM

I

JW

D

W

D

ID

E

1

J44

JF1

Fan3

E7320 (Lindenhurst

-VS)

M

C

H

PXH

(PCI-E/ PC

IX

Interface)

SI/O

VG

A

C

TLR

SCSI (LSI 53C20)

64- bit

USB2,3

JA1

JSLED

SATA LED

D

S

9

Fan2

PW2

JW

O

L

D

S

7

D

S

8

P

O

S

T

L

E

D

System

LED

SCSI C

hannelTerm

.

Enable

JPF

PW

R Force O

n

B

IO

S

DS1

D

S4

D

S2

DS3

CPU PW

LED

CPU

1 VRM

O

H

LED

CPU2 VR

M

O

H LED

DS5

PW

R

LED

WOL

SC

SI LED

Parallel Port

Chapter 2: Installation

2-27

IDE Connectors

There are no jumpers to configure the onboard IDE#1 and #2 connectors (at J44 and J38, respectively). See the table on the right for pin definitions.

Pin Number Function 1 Reset IDE 3 Host Data 7 5 Host Data 6 7 Host Data 5 9 Host Data 4 11 Host Data 3 13 Host Data 2 15 Host Data 1 17 Host Data 0 19 GND 21 DRQ3 23 I/O Write 25 I/O Read 27 IOCHRDY 29 DACK3 31 IRQ14 33 Addr 1 35 Addr 0 37 Chip Select 0 39 Activity

Pin Number Function 2 GND 4 Host Data 8 6 Host Data 9 8 Host Data 10 10 Host Data 11 12 Host Data 12 14 Host Data 13 16 Host Data 14 18 Host Data 15 20 Key 22 GND 24 GND 26 GND 28 BALE 30 GND 32 IOCS16 34 GND 36 Addr 2 38 Chip Select 1 40 GND

IDE Connector Pin Definitions

(J44, J38)

Floppy Connector

The floppy connector is located on J24. See the table below for pin definitions.

Pin Number Function 1 GND 3 GND 5 Key 7 GND 9 GND 11 GND 13 GND 15 GND 17 GND 19 GND 21 GND 23 GND 25 GND 27 GND 29 GND 31 GND 33 GND

Pin Number Function 2 FDHDIN 4 Reserved 6 FDEDIN 8 Index 10 Motor Enable 12 Drive Select B 14 Drive Select A 16 Motor Enable 18 DIR 20 STEP 22 Write Data 24 Write Gate 26 Track 00 28 Write Protec t 30 Read Data 32 Side 1 Select 34 Diskette

Floppy Connector Pin Definitions (J24)

GLAN1

®

S

UPER X6DVA-4G

GLAN2

DIMM 2B

DIMM 2A

DIMM 3B

DIMM 3A

DIMM 1A

DIMM 1B

8-pin PWR2

SMB PWR

FP

C

TR

L

Speaker

WOR

GLAN CTLR

X

4

P

C

I-E

p

x

e

s

P

C

IX

#

6

(P

C

IX

-1

3

)

North Bridge

VGA

COM1

USB0/1

KB/ Mouse

PW4

ATX PWR1

24-Pin

Fan1

PW1

CPU 1

CPU 2

COM2

6300ESB ICH

GLAN CTLR

PWR Fault

J2

J3

J4

J1

PW3

J18

J19

J20

J21

J22

J23

J8B1

JPL1

LAN1Enable

JPL2

LAN2Enable

P

C

IX

#

5

(P

C

IX

-1

0

)

JPR1

Alarm Reset

J9B1

J15 J13

JPA1

(*SCSI Enable)

PCIX slots/ SMB Connect

JF2

PWLED/ SPKR

P

C

I-E

#

4

J14

Battery

Fan6

Fan5

JPG1

J17

VGA Enable

3

2

- b

it P

C

I #

1

J5

Printer

J10

Floppy

J24

SCSI

J28

JL1

IDE 2

J38

Fan4

SATA0

SATA1

JS0

Cha. Intru

JS1

J

B

T

1

Clr CMOS

J41

IPMI

JWD

WD

IDE 1

J44

JF1

Fan3

E7320 (Lindenhurst

-VS)

MCH

PXH

(PCI-E/ PCIX Interface)

SI/O

VGA CTLR

SCSI (LSI 53C20)

64- bit

USB2,3

J

A

1

JSLED

SATA LED

D

S

9

Fan2

PW2

JWOL

D

S

7

D

S

8

P

O

S

T

L

E

D

System LED

SCSI ChannelTerm. Enable

JPF

PWR Force On

BIOS

DS1

DS4

DS2

DS3

CPU PW LED

CPU1 VRM OHLED

CPU2 VRM OH LED

DS5

PWR LED

WOL

SCSI LED

IDE 1

IDE 2

Floppy

2-28

X6DVA-4G/X6DVA-EG User's Manual

Ultra320 SCSI Connector (*X6DVA-4G Only)

Refer to the table below for the pin definitions of the Ultra320 SCSI connector located at J28.

Signal Names

+DB(12) +DB(13) +DB(14) +DB(15)

+DB(P1)

+DB(0) +DB(1) +DB(2) +DB(3) +DB(4) +DB(5) +DB(6) +DB(7)

+DB(P)

GROUND

DIFFSENS TERMPWR TERMPWR

RESERVED

GROUND

+ATN

GROUND

+BSY

+ACK

+RST

+MSG

+SEL

+C/D

+REQ

+I/O +DB(8) +DB(9)

+DB(10) +DB(11)

Connector

Contact Number

1 2 3 4 5 6 7 8

9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34

Signal Names

-DB(12)

-DB(13)

-DB(14)

-DB(15)

-DB(P1)

-DB(0)

-DB(1)

-DB(2)

-DB(3)

-DB(4)

-DB(5)

-DB(6)

-DB(7)

-DB(P) GROUND GROUND

TERMPWR TERMPWR

RESERVED

GROUND

-ATN

GROUND

-BSY

-ACK

-RST

-MSG

-SEL

-C/D

-REQ

-I/O

-DB(8)

-DB(9)

-DB(10)

-DB(11)

Connector

Contact Number

35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68

68-pin Ultra320 SCSI Connector

GLAN1

®

S

UPER X6DVA-4G

GLAN2

D

IM

M

2

B

D

IM

M

2

A

D

IM

M

3

B

D

IM

M

3

A

D

IM

M

1

A

D

IM

M

1

B

8-pin PWR2

SMB PWR

F

P

C

T

R

L

Speaker

WOR

GLAN CTLR

X

4

P

C

I

-

E

p

x

e

s

P

C

I

X

#

6

(

P

C

I

X

-

1

3

)

North Bridge

VGA

COM1

USB0/1

KB/

Mouse

PW4

ATX PWR1

24-Pin

Fan1

PW1

CPU 1

CPU 2

COM2

6300ESB ICH

GLAN CTLR

PWR Fault

J2

J3

J4

J1

PW3

J18

J19

J20

J21

J22

J23

J8B1

JPL1

LAN1Enable

JPL2

LAN2Enable

P

C

I

X

#

5

(

P

C

I

X

-

1

0

)

JPR1

Alarm Reset

J9B1

J15 J13

JPA1

(*SCSI Enable)

PCIX slots/ SMB Connect

JF2

PWLED/ SPKR

P

C

I

-

E

#

4

J14

Battery

Fan6

Fan5

JPG1

J17

VGA Enable

3

2

-

b

i

t

P

C

I

#

1

J5

Printer

J10

Floppy

J24

SCSI

J28

JL1

IDE 2

J38

Fan4

SATA0

SATA1

JS0

Cha. Intru

JS1

JB

T1

Clr CMOS

J41

IPMI

JWD

WD

ID

E

1

J44

JF1

F

a

n

3

E7320 (Lindenhurst

-VS)

MCH

PXH

(PCI-E/ PCIX Interface)

SI/O

VGA CTLR

SCSI (LSI 53C20)

64- bit

USB2,3

J

A

1

JSLED

SATA LED

D

S9

F

a

n

2

PW2

JWOL

D

S

7

D

S

8

P

O

S

T

LED

System LED

SCSI ChannelTerm. Enable

JPF

PWR Force On

BIOS

DS1

DS4

DS2

DS3

CPU PW LED

CPU1 VRM OHLED

CPU2 VRM OH LED

DS5

PWR LED

WOL

SCSI LED

SCSI

(*Note: Please refer to Appendix C for software, SATA Host RAID Utility, and the Operating System Installation Instructions.)

3-1

Chapter 3: Troubleshooting

Chapter 3

Troubleshooting

3-1 Troubleshooting Procedures

Use the following procedures to troubleshoot your system. If you have followed all of the procedures below and still need assistance, refer to the ‘Technical Support Procedures’ and/or ‘Returning Merchandise for Service’ section(s) in this chapter.

Note: Always disconnect the power cord before adding, changing or installing any hardware components.

Before Power On

1. Make sure no short circuits exist between the motherboard and chassis.

2. Disconnect all ribbon/wire cables from the motherboard, including those for the keyboard and mouse.

3. Remove all add-on cards.

4. Install one CPU (making sure it is fully seated) and connect the chassis speaker and the power LED to the motherboard. (Check all jumper settings as well.)

5. Use only the correct type of onboard CMOS battery as recommended by the Manufacturer. Do not install the onboard battery upside down to avoid possible explosion.

No Power

1. Make sure no short circuits exist between the motherboard and the chassis.

2. Verify that all jumpers are set to their default positions.

3. Check that the 115V/230V switch on the power supply is properly set.

4. Turn the power switch on and off to test the system.

5. The battery on your motherboard may be old. Check to verify that it still supplies ~3VDC. If it does not, replace it with a new one.

No Video

1. If the power is on but you have no video, remove all the add-on cards and cables.

2. Use the speaker to determine if any beep codes exist. Refer to the Appendix for details on beep codes.

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X6DVA-4G/X6DVA-EG User's Manual

Losing the System’s Setup Configuration

1. Ensure that you are using a high quality power supply. A poor quality power supply may cause the system to lose the CMOS setup information. Refer to Section 1-6 for details on recommended power supplies.

2. The battery on your motherboard may be old. Check to verify that it still supplies ~3VDC. If it does not, replace it with a new one.

3. If the above steps do not fix the Setup Configuration problem, contact your vendor for repairs.

3-2 Technical Support Procedures

Before contacting Technical Support, please take the following steps. Also, note that as a motherboard manufacturer, Super Micro does not sell directly to end-users, so it is best to first check with your distributor or reseller for troubleshooting services. They should know of any possible problem(s) with the specific system configuration that was sold to you.

NOTE

If you are a system integrator, VAR or OEM, a POST diagnos-

tics card is recommended. For I/O port 80h codes, refer to

App. B.

Memory Errors

1. Make sure the DIMM modules are properly and fully installed.

2. Determine if different speeds of DIMMs have been installed and verify that the BIOS setup is configured for the fastest speed of RAM used. It is recommended to use the same RAM speed for all DIMMs in the system.

3. Make sure you are using the correct type of Registered, ECC DDR 266/ 333 (PC2700/PC2100) SDRAM (*recommended by the manufacturer.)

4. Check for bad DIMM modules or slots by swapping a single module between two slots and noting the results.

5. Make sure all memory modules are fully seated in their slots. As an interleaved memory scheme is used, you must install two modules at a time, beginning with DIMM #1A, then DIMM #1B, and so on (see Section 2-3).

6. Check the position of the 115V/230V switch on the power supply.

3-3

Chapter 3: Troubleshooting

1. Please go through the ‘Troubleshooting Procedures’ and 'Frequently Asked Question' (FAQ) sections in this chapter or see the FAQs on our web site (http://www.supermicro.com/support/faqs/) before contacting Technical Support.

2. BIOS upgrades can be downloaded from our web site at

(http://www.supermicro.com/support/bios/).

Note: Not all BIOS can be flashed depending on the modifications to the boot block code.

3. If you still cannot resolve the problem, include the following information

when contacting Super Micro for technical support:

• Motherboard model and PCB revision number

• BIOS release date/version (this can be seen on the initial display when your system first boots up)

•System configuration An example of a Technical Support form is on our web site at

(http://www.supermicro.com/support/contact.cfm).

4. Distributors: For immediate assistance, please have your account number ready when placing a call to our technical support department. We can be reached by e-mail at [email protected], by phone at: (408) 503-8000, option 2, or by fax at (408)503-8019.

3-3 Frequently Asked Questions

Question: What are the various types of memory that my motherboard can support?

Answer: The X6DVA-4G/X6DVA-EG has six 184-pin DIMM slots that sup-

port registered ECC DDR 266/333 (PC2700/PC2100) SDRAM modules. It is strongly recommended that you do not mix memory modules of different speeds and sizes.

Question: How do I update my BIOS?

Answer: It is recommended that you do not upgrade your BIOS if you are

experiencing no problems with your system. Updated BIOS files are located on our web site at http://www.supermicro.com. Please check our BIOS warning message and the information on how to update your BIOS on our web site. Also, check the current BIOS revision and make sure it is newer than your BIOS before downloading. (*Note: There is no BIOS Recovery

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X6DVA-4G/X6DVA-EG User's Manual

function available for the motherboard. Should a problem occur after you flash the BIOS, you will need to change all six BIOS chips.)

Question: What's on the CD that came with my motherboard?

Answer: The supplied compact disc has quite a few drivers and programs

that will greatly enhance your system. We recommend that you review the CD and install the applications you need. Applications on the CD include chipset drivers for Windows and security and audio drivers.

3-4 Returning Merchandise for Service

A receipt or copy of your invoice marked with the date of purchase is required before any warranty service will be rendered. You can obtain service by calling your vendor for a Returned Merchandise Authorization (RMA) number. When returning to the manufacturer, the RMA number should be prominently displayed on the outside of the shipping carton, and mailed prepaid or hand-carried. Shipping and handling charges will be applied for all orders that must be mailed when service is complete.

This warranty only covers normal consumer use and does not cover damages incurred in shipping or from failure due to the alternation, misuse, abuse or improper maintenance of products.

During the warranty period, contact your distributor first for any product problems.

Chapter 4: AMI BIOS

4-1

Chapter 4

AMIBIOS

4-1 Introduction

This chapter describes the AMIBIOS for the X6DVA-4G/X6DVA-EG. The AMI ROM BIOS is stored in a Flash EEPROM and can be easily upgraded using a floppy disk-based program. This chapter describes the basic navigation of the AMI BIOS Setup Utility setup screens.

Starting BIOS Setup Utility

To enter the AMI BIOS Setup Utility screens, hit the <Delete> key while the system is booting-up.

(*Note: In most cases, the <Delete> key is used to invoke AMI BIOS setup screen. There are a few cases when other keys are used, such as <F1>, <F2>, and so on.)

Each main BIOS menu option is described in this user’s guide. The Main BIOS setup menu screen has two main frames. The left frame displays all the options that can be configured. “Grayed-out” options cannot be configured. Options in blue can be configured by the user. The right frame displays the key legend. Above the key legend is an area reserved for a text message. When an option is selected in the left frame, it is highlighted in white. Often a text message will accompany it.

(*Note: AMIBIOS has default text messages built in. Supermicro retains the option to include, omit, or change any of these text messages.)

The AMI BIOS setup/utility uses a key-based navigation system called hot keys. Most of AMI BIOS setup utility hot keys can be used at any time during the setup navigation process. These keys include <F1>, <F10>, <Enter>, <ESC>, <Arrow> keys, and so on.

(*Note: Options printed in Bold are default settings. )

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X6DVA-4G/X6DVA-EG User’s Manual

Processors

When you select this option, AMI BIOS will automatically display the status of processors as shown in the screen below:

Type Speed Counts

Processors

4-2 Main Setup

When you first enter AMI BIOS Setup Utility, you will enter the Main setup screen. You can always return to the Main setup screen by selecting the Main tab on the top of the screen. The Main BIOS Setup screen is shown below.

AMI BIOS Version Built Date ID

When you select the Main Setup, the following items will be automatically displayed:

System Overview: The following BIOS information will be displayed:

MainMain AdvancedAdvancedBootBoot

SecuritySecurity ExitExit

BIOS SETUP UTILITY

System Overview

AMI BIOS

Version : 08.00.10 Build Date: 08/06/04 ID : 0ABDI007

Processor

Type : Intel(R) Xeon(TM) CPU 3.40GHz Speed : 3400MHz Count : 2

System Memory

Size : 1024MB

System Time [10:52:21]

System Date [Tue 10/12/2004]

Use [ENTER], [TAB] or [SHIFT-TAB] to select a field.

Use [+] or [-] to configure system time.

Select Screen Select Item +- Change Field Tab Select Field F1 General Help F10 Save and Exit ESC Exit

Chapter 4: AMI BIOS

4-3

System Time/System Date

Use this option to change the system time and date. Highlight System Time or System Date using the <Arrow> keys. Enter new values through the

keyboard. Press the <Tab> key or the <Arrow> keys to move between fields. The date must be entered in DAY/MM/DD/YY format. The time is

entered in HH:MM:SS format.(*Note: The time is in 24-hour format. For example, 5:30 A.M. appears as 05:30:00, and 5:30P.M. as 17:30:00.)

System Memory

This option allows AMI BIOS to display the status of memory installed in the system.

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X6DVA-4G/X6DVA-EG User’s Manual

4-3 Advanced Settings

The Advanced Settings screen and sub menus are listed below:

Warning

When you first enter the Advanced Setup screen, the Setup Warning will be displayed. Please follow the instruction and set the correct value for each item to prevent the system from malfunctioning.

XX

XCPU Configuration Sub-Menu

Configure Advanced CPU Settings

This option allows the user to configure Advanced CPU settings for the processor(s) installed in the system.

Ratio CMOS Setting

This option allows the user to set the ratio between the CPU Core Clock and the FSB Frequency. (*Note: if an invalid ratio is entered, AMIBIOS will restore the setting to the previous state.)

Max CPUID Value Limit

This feature allows the user to set the maximum CPU ID value. Enable this function to boot legacy OS that cannot support processors with extended CPUID functions. The options are Enabled, and Disabled.

MainMain AdvancedAdvanced Boot Boot

Security Security Exit Exit

BIOS SETUP UTILITY

Advanced Settings Warning: Setting wrong values in below sections may cause system to malfunction.

Select Screen Select Item +- Change Field Tab Select Field F1 General Help F10 Save and Exit ESC Exit

Configure CPU

CPU Configuration IDE Configuration Floppy Configuration PCI PnP Configuration Super IO Configuration Advanced Chipset Configuration ACPI Configuration Power Configuration Event Log Configuration MPS Configuration PCI Express Configuration Remote Access Configuration USB Configuration System Health Monitor

Chapter 4: AMI BIOS

4-5

Hardware Prefetcher

This feature allows the user to enable the Hardware Prefetcher function. If "Disabled", the CPU will prefetch data at 64-bit per cache line. If "Enabled", it will fetch data at 128-bit per cache line.

Adjacent Cache Line Prefetch

This feature allows the user to enable the function of Adjacent Cache Line Prefetch. The options are Enabled and Disabled.

Hyper-Threading Function

This setting allows you to Enable or Disable the function of hyperthreading. Enabling hyper-threading results in increased CPU performance.

Intel(R) Speed Step(tm) Tech

This setting allows you enable the function of Intel Speedstep Tech to set the CPU speeds. The options are: Maximum Speed, Minimum speed,

Automatic (controlled by OS), and Disabled.

CPU Force PR#

If Enabled, the FORCEP# will function as an input pin. If disabled, the state of FORCEPR# will be ignored by the CPU. The options are: Enabled and Disabled.

VRM Protection Temperature

This setting allows you to set the VRM Protection Temperature The options are: 720C, 880C, 980C, and 1080C.

Select TM2 VID

This setting allows you to set the TM2 VID value. Enter a number from 14 to 35 to select the desired voltage value (from 1.000V to 1.2625V.)

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X6DVA-4G/X6DVA-EG User’s Manual

LBA/Large Mode

LBA (Logical Block Addressing) is a method of addressing data on a disk drive. In the LBA mode, the maximum drive capacity is 137 GB. For drive capacities over 137 GB, your system must be equipped with 48-bit LBA mode addressing. If not, contact your manufacturer or install an ATA/133 IDE controller card that supports 48-bit LBA mode. The options are Disabled or Auto.

Type

Select the type of device connected to the system. The options are Not Installed, Auto, CDROM and ARMD.

Primary IDE Master/Slave, Secondary IDE Master/Slave, Third IDE Master/Slave, Fourth IDE Master/Slave Sub-Menu

From the Advanced Setup screen, press <Enter> to access this sub menu for the primary, secondary, third and fourth IDE master and slave drives. Use this screen to select options for the Primary and Secondary IDE drives. Use the up and down <Arrow> keys to select an item. Use the <Plus> and <Minus> keys to change the value of the selected option.

Combined Mode Operation

This feature allows the user to select the IDE Combined Mode. The options are: P-ATA 1st Channel and S-ATA 1st Channel.

XX

XIDE Configuration Sub-Menu

When you select this Sub-menu, AMI BIOS automatically displays the following items:

S-ATA Ports Definition

This feature allows the user to configure Serial ATA Ports. The options are: P0-Master/P1-Slave, P0-Slave/P1-Master.

IDE Configuration

This feature allows the user to configure the IDE mode. The options are: Disabled, P-ATA (Parallel ATA) only, S-ATA (Serial ATA) only, P-ATA &

S-ATA.

Chapter 4: AMI BIOS

4-7

Block (Multi-Sector Transfer)

Block mode boosts IDE drive performance by increasing the amount of data transferred. Only 512 bytes of data can be transferred per interrupt if block mode is not used. Block mode allows transfers of up to 64 KB per interrupt. Select "Disabled" to allow the data to be transferred from and to the device one sector at a time. Select "Auto" to allows the data transfer from and to the device occur multiple sectors at a time if the device supports it. The options are Auto and Disabled.

PIO Mode

IDE PIO (Programmable I/O) mode programs timing cycles between the IDE drive and the programmable IDE controller. As the PIO mode increases, the cycle time decreases. The options are Auto, 0, 1, 2, 3, and 4. Select Auto to allow AMI BIOS to auto detect the PIO mode. Use this value if the IDE disk drive support cannot be determined. Select 0 to allow AMI BIOS to use PIO mode 0. It has a data transfer rate of 3.3 MBs. Select 1 to allow AMI BIOS to use PIO mode 1. It has a data transfer rate of 5.2 MBs. Select 2 to allow AMI BIOS to use PIO mode 2. It has a data transfer rate of 8.3 MBs. Select 3 to allow AMI BIOS to use PIO mode 3. It has a data transfer rate of 11.1 MBs. Select 4 to allow AMI BIOS to use PIO mode 4. It has a data transfer rate of 16.6 MBs. This setting generally works with all hard disk drives manufactured after 1999. For other disk drives, such as IDE CD-ROM drives, check the specifications of the drive.

S.M.A.R.T. For Hard disk drives

Self-Monitoring Analysis and Reporting Technology (SMART) can help predict impending drive failures. Select "Auto" to allow BIOS to auto detect hard disk drive support. Select "Disabled" to prevent AMI BIOS from using the S.M.A.R.T. Select "Enabled" to allow AMI BIOS to use the S.M.A.R.T. to support hard drive disk. The options are Disabled, Enabled, and Auto.

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X6DVA-4G/X6DVA-EG User’s Manual

This feature allows AMI BIOS to auto-detect 80Pin ATA(PI) Cable. The options are:"Host & Device", "Host" and "Device."

ATA(PI) 80Pin Cable Detection

XX

XFloppy Configuration

This option allows the user to configure the settings for the Floppy Drives installed in the system.

Floppy A

Move the cursor to these fields via up and down <arrow> keys to select the floppy type. The options are Disabled, 360 KB 5 1/4", 1.2 MB 5 1/4", 720 KB 3½", 1.44 MB 3½”, and 2.88 MB 3½".

OnBoard Floppy Controller

Select "Enabled" to enable the Onboard Floppy Controller. The options are "Disabled", and "Enabled."

Select "Enabled" to activate the function of 32-Bit data transfer. Select "Disabled" to deactivate the function. The options are Enabled and Dis-

abled.

Hard Disk Write Protect

Select Enabled to enable the function of Hard Disk Write Protect to prevent data from being written to HDD. The options are Enabled or Disabled.

IDE Detect Time Out

This feature allows the user to set the time-out value for detecting ATA, ATA PI devices installed in the system. The options are 0 (sec), 5, Mode 1.0, 15, 20, 25, 30, and 35.

32Bit Data Transfer

Chapter 4: AMI BIOS

4-9

XPCI/PnP Configuration

PCI Latency Timer

This option sets the latency of all PCI devices on the PCI bus. The default setting is "64." Select "32" to set the PCI latency to 32 PCI clock cycles. Select "64" to set the PCI latency to 64 PCI clock cycles. Select "96" to set the PCI latency to 96 PCI clock cycles. Select "128" to set the PCI latency to 128 PCI clock cycles. Select "160" to set the PCI latency to 160 PCI clock cycles. Select "192" to set the PCI latency to 192 PCI clock cycles. Select "224" to set the PCI latency to 224 PCI clock cycles. Select "248" to set the PCI latency to 248 PCI clock cycles.

Allocate IRQ to PCI VGA

Set this value to allow or restrict the system from giving the VGA adapter card an interrupt address. The options are Yes and No.

PCI IDE BusMaster

Set this value to allow or prevent the use of PCI IDE busmastering. Select "Enabled" to allow AMI BIOS to use PCI busmaster for reading and writing to IDE drives. The options are "Disabled" and "Enabled".

Offboard PCI/ISA IDE Card

This option allows the user to assign a PCI slot number to an Off-board PCI/ ISA IDE card in order for it to function properly. The options are: Auto, PCI Slot1, PCI Slot2, PCI Slot3, PCI Slot4, PCI Slot5, and PCI Slot6.

This feature allows the user to set PCI/PnP configurations for the following items:

Plug & Play OS

Select Yes to allow the OS to configure Plug & Play devices. (*This is not required for system boot if you system has an OS that supports Plug & Play.) Select No to allow AMIBIOS to configure all devices in the system.

Palette Snooping

Select Enabled to inform the PCI devices that an ISA graphics device is installed in the system in order for the graphics card to function properly. The options are Enabled and Disabled.

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X6DVA-4G/X6DVA-EG User’s Manual

IRQ3/IRQ4/IRQ5/IRQ7/IRQ9/IRQ10/IRQ11/IRQ14/IRQ15

This feature specifies the availability of an IRQ to be used by a PCI, PnP device. Select Reserved for the IRQ to be used by a Legacy ISA device. The options are: Available, Reserved.

DMA Channel 0/Channel 1/Channel 3/Channel 5/ Channel 6/Channel 7

Select Available to indicate that a specific DMA channel is available to be used by a PCI/PnP device. Select Reserved, if the DMA channel specified is reserved for a Legacy ISA device.

Reserved Memory Size

This feature specifies the size of memory block to be reserved for Legacy ISA devices. The options are: Disabled, 16K, 32K, 64K.

Chapter 4: AMI BIOS

4-11

Serial Port1 Address

This option specifies the base I/O port address and Interrupt Request address of serial port 1. Select "Disabled" to prevent the serial port from accessing any system resources. When this option is set to Disabled, the serial port physically becomes unavailable. Select "3F8/IRQ4" to allow the serial port to use 3F8 as its I/O port address and IRQ 4 for the interrupt address. The options are Disabled, 3F8/IRQ4, 3E8/IRQ4, 2E8/IRQ3.

Serial Port2 Address

This option specifies the base I/O port address and Interrupt Request address of serial port 2. Select "Disabled" to prevent the serial port from accessing any system resources. When this option is set to "Disabled", the serial port physically becomes unavailable. Select "2F8/IRQ3" to allow the serial port to use 2F8 as its I/O port address and IRQ 3 for the interrupt address. The options are Disabled, 2F8/IRQ3, 3E8/IRQ4, 2E8/IRQ3.

Parallel Port Address

This option specifies the I/O address used by the parallel port. Select Disabled to prevent the parallel port from accessing any system resources. When the value of this option is set to Disabled, the printer port becomes unavailable. Select 378 to allow the parallel port to use 378 as its I/O port address. The majority of parallel ports on computer systems use IRQ7 and I/O Port 378H as the standard setting. Select 278 to allow the parallel port to use 278 as its I/O port address. Select 3BC to allow the parallel port to use 3BC as its I/O port address.

Parallel Port Mode

Specify the parallel port mode. The options are Normal, Bi-directional, EPP and ECP.

Parellel Port IRQ

Select the IRQ (interrupt request) for the parallel port. The options are IRQ5 and IRQ7.

XX

XSuper IO Configuration Sub-Menu

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X6DVA-4G/X6DVA-EG User’s Manual

XX

XAdvanced Chipset Settings

This item allows the user to configure the Advanced Chipset settings for the system.

XNorthBridge Configuration

This feature allows the user to configure the settings for Intel Lindenhurst NorthBridge chipset.

Memory Remap Feature

Select Enabled to allow remapping of overlapped PCI memory above the total physical memory. The options are Enabled and Disabled.

Memory Mirroring/Sparing

This feature allows the user to enable the function of Memory Mirroring and Sparing if memory configuration supports this function The options are Disabled and Sparing.

XSouthBridge Configuration

This feature allows the user to configure the settings for Intel ICH SouthBridge chipset.

CPU B.I.S.T. Enable

Select Enabled to enable the function of CPU Built In Self Test. The options are Enabled and Disabled.

ICH Delayed Transaction

Select Enabled to enable the function of ICH Delayed Transaction. The options are Enabled and Disabled.

ICH DCB

Select Enabled to enable the function of ICH DCB. The options are Enabled and Disabled.

Onboard AC97

Select Auto to allow the Onboard AC97 Audio to be automatically activated. The options are Auto and Disabled.

Chapter 4: AMI BIOS

4-13

XIntel PCI-X Hub Configuration

This feature allows the user to configure the settings for Intel PCI-X Hub chipset.

PXH Channel A/Channel B Bus Frequency

This feature allows the user to set the maximum PCI bus speed to be programmed. The options are Auto, 33MHz PCI, 66MHz PCI, 66MHz PCI-X M1, 100MHz PCI-X M1, and 133MHz PCI-X M1. The default setting for PCI-X CHA is 100MHz PCI-X M1. The default setting for PCI-X CHB is 133MHz PCI-X M1.

I/O Port decode

Select the decode range for IO. The options are 4K Decode and 1K Decode.

RAS Sticky Error Handling

Select the method for AMI BIOS to handle Sticky RAS Errors. The options are Clear Errors and Leave Errors.

VGA 16-bit Decode

Select Enabled to enable the function of decoding of VGA for the devices installed behind PHX. The options are Enabled and Disabled.

PCI-X Slot5/Slot6 Option ROM

Select Enabled to enable the function of Option ROM for PCI-X Slot5/Slot6. The options are Enabled and Disabled.

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X6DVA-4G/X6DVA-EG User’s Manual

XX

XAPCI Configuration

This item allows the user to enable or disable ACPI support for the operating system.

ACPI Configuration

Use this feature to configure additional ACPI options. Select "Yes" if the operating system supports ACPI. Select No if the operating system does not support ACPI. The options are No and Yes.

ACPI 2.0 Features

Select Yes to allow RSDP pointers to point to the 64-bit Fixed System Description Tables. Select No to deactivate this function. The options are Yes and No.

ACPI APIC Support

Select Enabled to allow the ACPI APIC Table Pointer to be included in the RSDP pointer list. The options are Enable, and Disabled.

AMI OEMB Table

Select Enabled to allow the OEMB Table Pointer to be included in the R(x)SDT pointer lists. The options are Enabled, and Disabled".

Headless Mode

Select Enabled to activate the Headless Operation Mode through ACPI. The options are Enabled, and Disabled.

XPower Configuration

This feature allows the user to configure PnP settings.

Restore on AC Power Loss

This setting allows you to choose how the system will react when power returns after an unexpected loss of power. The options are Stay Off, Power On and Last State.

Watch Dog Timer

This setting is used to enable or disabled the Watch Dog Timer function. It must be used in conjunction with the WD jumper (see Chapter 2 for details). The options are Disabled and Enabled.

Chapter 4: AMI BIOS

4-15

XEvent Log Configuration

Highlight this item and press <Enter> to view the contents of the event log.

View Event Log

This feature allows the user to view all unread events.

Mark All Events as Read

Highlight this item and press <Enter> to mark the DMI events as read.

Clear Event Log

This setting will clear all event logs when set to "OK". The options are "OK" and "Cancel".

ECC Event Logging

This setting allows you to enable or disable ECC Event logging. The options are Enabled or Disabled.

Hub Interface Event Logging

This setting allows you to enable or disable Hub Interface Event logging. The options are Enabled or Disabled.

System Bus Event Logging

This setting allows you to enable or disable System Bus Error Event logging. The options are Enabled or Disabled.

Memory Buffer Event Logging

This setting allows you to enable or disable Memory Buffer Event logging. The options are Enabled or Disabled.

PCI/PCI Express Error Logging

This setting allows you to enable or disable PCI or PCI Express Error logging. The options are Enabled or Disabled.

XMPS Configuration

This section allows the user to configure the multiprocessors table. MPS Revision This feature allows the user to select MPS Revision. Please follow the

instructions given on the screen to select the MPS Revision Number. The options are 1.1 and 1.4.

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X6DVA-4G/X6DVA-EG User’s Manual

XRemote Access Configuration

You can use this screen to select options for the Remote Access Configuration. Use the up and down <Arrow> keys to select an item. Use the <Plus> and <Minus> keys to change the value of the selected option.

Remote Access

This feature allows the user to disable the function of Remote Access. If Disabled is not select, then you can select a Remote Access type. The options are Enabled and Disabled.

XPCI Express Configuration

This section allows the user to configure PCI Express slots.

Active State Power Management

Select Enabled to activate the function of power management for signal transactions between PCI Express L0 and L1 Link. The options are Enabled and Disabled.

I/O Expander Mode

This feature allows the user to set the IO Expand Mode for Hot Plug support. The options are PCA9555, Two PCA9554, One PCA9554 (Low), One PCA9554 (High), Two PCA9554A, One PCA9554A (Low), and Two PCA9554.

PCI Express Port2 (PXH)

This feature allows the user to configure the PCI Express slot. The options are Auto, Enabled, and Disabled.

PCI Express Port3 (Slot 4)

This feature allows the user to configure the PCI Express slot. The options are Auto, Enabled, and Disabled.

PCI Express Compliance Mode

Select Enabled to enable MCH to activate PCI Express Compliance Mode. The options are Disabled and Enabled.

Spread Spectrum

Select Enabled to enable Spread Spectrum. The options are Disabled and Enabled.

Chapter 4: AMI BIOS

4-17

X

USB Configuration

This feature allows the user to configure USB settings.

USB Function

This feature allows you to enable 2 USB Ports or 4 USB Ports. The options are Disabled, 2 USB Ports, and 4 USB Ports.

Legacy USB Support

Select "Enabled" to enable the support for USB Legacy. Disable legacy support if there are no USB devices installed in the system. The options are Disabled, Enabled and Auto.

USB 2.0 Controller

This setting allows you to enable or disable USB 2.0 Controller. The options are Disabled and Enabled.

USB 2.0 Controller Mode

This setting allows you to configure USB 2.0 Controller Mode. The options are Hi-Speed (480 Mbps) and Full Speed-(12Mbps).

XSystem Health Monitor

This feature allows AMI BIOS to automatically display the status of the following items:

System Health Function

Select "Enabled" to enable the function of Hardware Health Monitoring Device. The Options are "Enabled" and "Disabled".

CPU Temperature

The feature allows the user to set the CPU temperature threshold. The options range from 65oC to 90oC. The default setting is "78oC.

If System Health Function is enabled, BIOS will automatically display the status of the following items:

CPU1 Temperature, CPU2 Temperature, System Temperature

Note: In the Windows OS environment, the Supero Doctor III settings take precedence over the BIOS settings. When first installed, the SD III adopts the temperature threshold settings previously set in the BIOS. Any subsequent changes to these thresholds must be made within Supero Doctor, since the SDIII settings override the BIOS settings. For the Windows OS to adopt the BIOS temperature threshold settings, please change the SDIII settings to be the same as those set in the BIOS.

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X6DVA-4G/X6DVA-EG User’s Manual

AMI BIOS will automatically display the following information:

CPU1 VCORE/CPU2 VCORE (*for 2U systems),

3.3V Vcc(V), +5 Vin, 12V Vcc(V), -12V Vcc (V), DRAM VTT, 1.2V Vcc, 2.5V for DIMM,

1.5V Standby Power, 5V Standby, 3.3V Standby.

Fan Speed Control Modules:

This feature allows the user to decide how the system controls the speeds of the onboard fans. If the option is set to "3-pin fan", the fan speed is controlled based upon the CPU die temperature. When the CPU die temperature is higher, the fan speed will be higher as well. If the option is set to "4pin", the fan speed will be controlled by the Thermal Management Settings pre-configured by the user at this feature. Select "3-pin" if your chassis came with 3-pin fan headers. Select "4-pin" if your chassis came with 4-pin fan headers. Select "Workstation" if your system is used as a Workstation. Select "Server" if your system is used as a Server. Select "Disable" to disable the fan speed control function to allow the onboard fans to run at the full speed (12V) at all time. The Options are: 1. Disable, 2. 3-pin (Server), 3. 3-pin (Workstation), 4. 4-pin (Server), 5. 4-pin (Workstation).

Fan1 Speed to Fan6 Speed

This feature allows the user to configure the following items:

4-4 Boot Settings

MainMain Advanced Advanced Boot Boot

Security Security Exit Exit

BIOS SETUP UTILITY

Boot Settings

.

Select Screen Select Item +- Change Field Tab Select Field F1 General Help F10 Save and Exit ESC Exit

Configure settings during System Boot

Boot Settings Configuration

Boot Device Priority Removable Drives CD/DVD Drives

Chapter 4: AMI BIOS

4-19

Quiet Boot

Set this value to allow the boot up screen options to be modified between POST messages or OEM logo. The default setting is Enabled. Select Disabled to allow the computer system to display the POST messages. Select Enabled to allow the computer system to display the OEM logo.

Add-On ROM Display Mode

Set this option to display add-on ROM (read-only memory) messages. The default setting is Force BIOS. Select "Force BIOS" to allow the computer system to force a third party BIOS to display during system boot. Select "Keep Current" to allow the computer system to display the BIOS information during system boot. The options are Force BIOS and Keep Current.

Boot up Num-Lock

Set this value to allow the Number Lock setting to be modified during boot up. The default setting is On. The options are On and Off.

PS/2 Mouse Support

Set this value to allow the PS/2 mouse support to be modified. The options are Auto, Enabled and Disabled.

Wait for ‘F1’ If Error

Select Enable to activate the function of Wait for F1 if Error. The options are

Enabled and Disabled.

Hit ‘DEL’ Message Display

Select Enabled to display Setup Message when the user hits the DEL key. The options are Enabled and Disabled.

Interrupt 19 Capture

Select Enabled to allow ROMs to trap Interrupt 19. The options are Enabled and Disabled.

Quick Boot

If Enabled, this option will skip certain tests during POST to reduce the time needed for the system to boot up. The options are Enabled, and Disabled.

XX

XBIOS Settings Configuration

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X6DVA-4G/X6DVA-EG User’s Manual

XBoot Device Priority

This feature allows the user to specify the sequence of priority for the Boot Device.

The settings are "1st Floppy Drive", "CD ROM", "ATAPI CDROM", and "Disabled." The default settings are:

· 1st boot device – Floppy Drive

· 2nd boot device – S1 MPI Boot Support

· 3rd boot device – SATA0-#0 Mirror

· 4th boot device – IBA GE Slot 0508V

· 5th boot device – IBA GE Slot 0510V

X

Hard Disk Drives

This feature allows the user to specify the Boot sequence from available Hard Drives.

1st Drive

Specify the boot sequence for 1st Removable Drive. The Options are 1st Floppy Drive and Disabled.

XCD/DVD Drives

This feature allows the user to specify the boot sequence from available CDROM Drives.

1st Drive

Specify the boot sequence for 1st Hard Drive. The options are CD ROM and Disabled.

1st Drive/2nd Drive/3rd Drive

Specify the boot sequence for 1st Hard Drive, 2nd Hard Drive, and 3rd Hard Drive. The options are HDD and Disabled.

XRemovable Drives

This feature allows the user to specify the Boot sequence from available Removable Drives.

Chapter 4: AMI BIOS

4-21

Change Supervisor Password

Select this option and press <Enter> to access the sub menu, and then, type in the password.

Change User Password

Select this option and press <Enter> to access the sub menu, and then, type in the password.

Clear User Password

Select this option and press <Enter> to access the sub menu. You can use the sub menu to clear the user password.

Boot Sector Virus Protection

This option is near the bottom of the Security Setup screen. Select "Disabled" to deactivate the Boot Sector Virus Protection. Select "Enabled" to enable boot sector protection. When "Enabled", AMI BOIS displays a warning when any program (or virus) issues a Disk Format command or attempts to write to the boot sector of the hard disk drive. The options are "Enabled" and "Disabled".

4-5 Security Settings

AMI BIOS provides a Supervisor and a User password. If you use both passwords, the Supervisor password must be set first.

MainMain AdvancedAdvanced Boot Boot

Security Security Exit Exit

BIOS SETUP UTILITY

Security Settings

Select Screen Select Item +- Change Field Tab Select Field F1 General Help F10 Save and Exit ESC Exit

Install or Change the Password.

Supervisor Password: Not Installed User Password: Not Installed

Change Supervisor Password Change User Password Boot Sector Virus Protection [Disabled]

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X6DVA-4G/X6DVA-EG User’s Manual

Discarding Changes

Select this option and press <Enter> to discard all the changes and return to AMI BIOS Utility Program.

4-6 Exit Options

Select the Exit tab from AMI BIOS Setup Utility screen to enter the Exit BIOS Setup screen.

Saving Changes and Exit

When you have completed the system configuration changes, select this option to leave BIOS Setup and reboot the computer, so the new system configuration parameters can take effect. Select Save Changes and Exit from the Exit menu and press <Enter>.

Discarding Changes and Exit

Select this option to quit BIOS Setup without making any permanent changes to the system configuration and reboot the computer. Select Discard Changes and Exit from the Exit menu and press <Enter>.

MainMain AdvancedAdvanced Boot Boot

Security Security Exit Exit

BIOS SETUP UTILITY

Exit Options

Select Screen Select Item +- Change Field Tab Select Field F1 General Help F10 Save and Exit ESC Exit

Exit System Setup after saving the changes.

F10 key can be used for this operation

Save Changes and Exit Discard Changes and Exit Discard Changes

Load Optimal Defaults Load Failsafe Defaults

Chapter 4: AMI BIOS

4-23

Load Fail-Safe Defaults

To set this feature, select Load Fail-Safe Defaults from the Exit menu and press <Enter>. The Fail-Safe settings are designed for maximum system stability, but not maximum performance.

Load Optimal Defaults

To set this feature, select Load Optimal Defaults from the Exit menu and press <Enter>. Then, Select "OK" to allow BIOS to automatically load Optimal Defaults to BIOS Settings. The Optimal settings are designed for maximum system performance, but may not work best for all computer applications.

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X6DVA-4G/X6DVA-EG User’s Manual

Notes

Appendix A

BIOS Error Beep Codes

During the POST (Power-On Self-Test) routines, which are performed each time the system is powered on, errors may occur.

Non-fatal errors are those which, in most cases, allow the system to continue the boot-up process. The error messages normally appear on the screen.

Fatal errors are those which will not allow the system to continue the boot-up procedure. If a fatal error occurs, you should consult with your system manufacturer for possible repairs.

These fatal errors are usually communicated through a series of audible beeps. The numbers on the fatal error list, on the following page, correspond to the number of beeps for the corresponding error. All errors listed, with the exception of Beep Code 8, are fatal errors.

POST codes may be read on the debug LEDs located beside the LAN port on the motherboard backplane. See the description of the Debug LEDs (LED1 and LED2) in Section 2-6.

Appendix A: AMIBIOS Error Beep Codes

A-1

A-1 AMIBIOS Error Beep Codes

Beep Code Error Message Description

1 beep Refresh Circuits have been reset.

(Ready to power up.)

5 short, 1 long Memory error No memory detected in

system

8 beeps Display memory read/write error Video adapter missing or

with faulty memory

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X6DVA-4G/X6DVA-EG User’s Manual

A-2 DS7/DS8 LED Post Codes

LED Indicators Description/Message

DS7 DS8

On On PWR On On Off SPD Read OK Of f On Memory Size-OK Off Off Starting Bus Initialization

B-1

Appendix B: BIOS POST Checkpoint Codes

Appendix B

BIOS POST Checkpoint Codes

When AMIBIOS performs the Power On Self Test, it writes checkpoint codes to I/O port 0080h. If the computer cannot complete the boot process, diagnostic equipment can be attached to the computer to read I/O port 0080h.

B-1 Uncompressed Initialization Codes

The uncompressed initialization checkpoint codes are listed in order of execution:

Checkpoint Code Description

D0h The NMI is disabled. Power on delay is starting. Next, the initialization

code checksum will be verified.

D1h Initializing the DMA controller, performing the keyboard controller

BAT test, starting memory refresh, and entering 4 GB flat mode next.

D3h Starting memory sizing next.

D4h Returning to real mode. Executing any OEM patches and setting the

Stack next.

D5h Passing control to the uncompressed code in shadow RAM at

E000:0000h. The initialization code is copied to segment 0 and control will be transferred to segment 0.

D6h Control is in segment 0. Next, checking if <Ctrl> <Home> was pressed

and verifying the system BIOS checksum. If either <Ctrl> <Home> was pressed or the system BIOS checksum is bad, next will go to checkpoint code E0h. Otherwise, going to checkpoint code D7h.

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X6DVA-4G/X6DVA-EG User’s Manual

B-2 Bootblock Recovery Codes

The bootblock recovery checkpoint codes are listed in order of execution:

Checkpoint Code Description

E0h The onboard floppy controller if available is initialized. Next,

beginning the base 512 KB memory test. E1h Initializing the interrupt vector table next. E2h Initializing the DMA and Interrupt controllers next.

E6h Enabling the floppy drive controller and Timer IRQs. Enabling internal

cache memory. Edh Initializing the floppy drive.

Eeh Looking for a floppy diskette in drive A:. Reading the first sector of

the diskette. Efh A read error occurred while reading the floppy drive in drive A:. F0h Next, searching for the AMIBOOT.ROM file in the root directory. F1h The AMIBOOT.ROM file is not in the root directory. F2h Next, reading and analyzing the floppy diskette FAT to find the

clusters occupied by the AMIBOOT.ROM file. F3h Next, reading the AMIBOOT.ROM file, cluster by cluster. F4h The AMIBOOT.ROM file is not the correct size. F5h Next, disabling internal cache memory. FBh Next, detecting the type of flash ROM. FCh Next, erasing the flash ROM. FDh Next, programming the flash ROM.

FFh Flash ROM programming was successful. Next, restarting the

system BIOS.

B-3 Uncompressed Initialization Codes

The following runtime checkpoint codes are listed in order of execution. These codes are uncompressed in F0000h shadow RAM.

Checkpoint Code Description

03h The NMI is disabled. Next, checking for a soft reset or a power on

condition. 05h The BIOS stack has been built. Next, disabling cache memory. 06h Uncompressing the POST code next. 07h Next, initializing the CPU and the CPU data area. 08h The CMOS checksum calculation is done next. 0Ah The CMOS checksum calculation is done. Initializing the CMOS status

register for date and time next. 0Bh The CMOS status register is initialized. Next, performing any required

B-3

Appendix B: BIOS POST Checkpoint Codes

initialization before the keyboard BAT command is issued.

0Ch The keyboard controller input buffer is free. Next, issuing the BAT

command to the keyboard controller.

0Eh The keyboard controller BAT command result has been verified.

Next, performing any necessary initialization after the keyboard controller BAT command test.

0Fh The initialization after the keyboard controller BAT command test is

done. The keyboard command byte is written next.

10h The keyboard controller command byte is written. Next, issuing the

Pin 23 and 24 blocking and unblocking command.

11h Next, checking if <End or <Ins> keys were pressed during power on.

Initializing CMOS RAM if the Initialize CMOS RAM in every boot AMIBIOS POST option was set in AMIBCP or the <End> key was pressed.

12h Next, disabling DMA controllers 1 and 2 and interrupt controllers 1 and

2.

13h The video display has been disabled. Port B has been initialized. Next,

initializing the chipset. 14h The 8254 timer test will begin next. 19h The 8254 timer test is over. Starting the memory refresh test next.

1Ah The memory refresh line is toggling. Checking the 15 second on/off

time next.

2Bh Passing control to the video ROM to perform any required configu-

ration before the video ROM test.

2Ch All necessary processing before passing control to the video ROM

is done. Looking for the video ROM next and passing control to it. 2Dh The video ROM has returned control to BIOS POST. Performing any

required processing after the video ROM had control. 23h Reading the 8042 input port and disabling the MEGAKEY Green

PC feature next. Making the BIOS code segment writable and

performing any necessary configuration before initializing the

interrupt vectors. 24h The configuration required before interrupt vector initialization

has completed. Interrupt vector initialization is about to begin.

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X6DVA-4G/X6DVA-EG User’s Manual

Checkpoint Code Description

25h Interrupt vector initialization is done. Clearing the password if the

POST DIAG switch is on. 27h Any initialization before setting video mode will be done next. 28h Initialization before setting the video mode is complete. Configuring

the monochrome mode and color mode settings next. 2A h Bus initialization system, static, output devices will be done next, if

present. See the last page for additional information. 2Eh Completed post-video ROM test processing. If the EGA/VGA

controller is not found, performing the display memory read/write

test next.

2Fh The EGA/VGA controller was not found. The display memory read/

write test is about to begin.

30h The display memory read/write test passed. Look for retrace

checking next.

31h The display memory read/write test or retrace checking failed.

Performing the alternate display memory read/write test next.

32h The alternate display memory read/write test passed. Looking for

alternate display retrace checking next. 34h Video display checking is over. Setting the display mode next. 37h The display mode is set. Displaying the power on message next.

38h Initializing the bus input, IPL, general devices next, if present. See the

last page of this chapter for additional information.

39h Displaying bus initialization error messages. See the last page of this

chapter for additional information.

3Ah The new cursor position has been read and saved. Displaying the

Hit <DEL> message next.

3Bh The Hit <DEL> message is displayed. The protected mode memory

test is about to start. 40h Preparing the descriptor tables next.

42h The descriptor tables are prepared. Entering protected mode for the

memory test next.

43h Entered protected mode. Enabling interrupts for diagnostics mode

next.

44h Interrupts enabled if the diagnostics switch is on. Initializing data to

check memory wraparound at 0:0 next.

45h Data initialized. Checking for memory wraparound at 0:0 and finding

the total system memory size next.

46h The memory wraparound test is done. Memory size calculation has

been done. Writing patterns to test memory next.

47h The memory pattern has been written to extended memory. Writing

patterns to the base 640 KB memory next.

B-5

Appendix B: BIOS POST Checkpoint Codes

Checkpoint Code Description

48h Patterns written in base memory. Determining the amount of memory

below 1 MB next.

49h The amount of memory below 1 MB has been found and verified.

Determining the amount of memory above 1 MB memory next.

4Bh The amount of memory above 1 MB has been found and verified.

Checking for a soft reset and clearing the memory below 1 MB for the soft reset next. If this is a power on situation, going to checkpoint 4Eh next.

4Ch The memory below 1 MB has been cleared via a soft reset. Clearing

the memory above 1 MB next.

4Dh The memory above 1 MB has been cleared via a soft reset. Saving

the memory size next. Going to checkpoint 52h next.

4Eh The memory test started, but not as the result of a soft reset.

Displaying the first 64 KB memory size next.

4Fh The memory size display has started. The display is updated during

the memory test. Performing the sequential and random memory test next.

50h The memory below 1 MB has been tested and initialized. Adjusting

the displayed memory size for relocation and shadowing next.

51h The memory size display was adjusted for relocation and shadow-

ing. Testing the memory above 1 MB next.

52h The memory above 1 MB has been tested and initialized. Saving

the memory size information next.

53h The memory size information and the CPU registers are saved.

Entering real mode next.

54h Shutdown was successful. The CPU is in real mode. Disabling the

Gate A20 line, parity, and the NMI next.

57h The A20 address line, parity, and the NMI are disabled. Adjusting

the memory size depending on relocation and shadowing next.

58h The memory size was adjusted for relocation and shadowing.

Clearing the Hit <DEL> message next.

59h The Hit <DEL> message is cleared. The <WAIT...> message is

displayed. Starting the DMA and interrupt controller test next.

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X6DVA-4G/X6DVA-EG User’s Manual

Checkpoint Code Description

60h The DMA page register test passed. Performing the DMA Controller

1 base register test next. 62h The DMA controller 1 base register test passed. Performing the DMA

controller 2 base register test next. 65h The DMA controller 2 base register test passed. Programming DMA

controllers 1 and 2 next. 66h Completed programming DMA controllers 1 and 2. Initializing the 8259

interrupt controller next. 67h Completed 8259 interrupt controller initialization. 7Fh Extended NMI source enabling is in progress. 80h The keyboard test has started. Clearing the output buffer and

checking for stuck keys. Issuing the keyboard reset command next. 81h A keyboard reset error or stuck key was found. Issuing the keyboard

controller interface test command next. 82h The keyboard controller interface test completed. Writing the com-

mand byte and initializing the circular buffer next. 83h The command byte was written and global data initialization has

completed. Checking for a locked key next. 84h Locked key checking is over. Checking for a memory size mismatch

with CMOS RAM data next. 85h The memory size check is done. Displaying a soft error and checking

for a password or bypassing WINBIOS Setup next. 86h The password was checked. Performing any required programming

before WINBIOS Setup next. 87h The programming before WINBIOS Setup has completed.

Uncompressing the WINBIOS Setup code and executing the

AMIBIOS Setup or WINBIOS Setup utility next.

88h Returned from WINBIOS Setup and cleared the screen. Performing

any necessary programming after WINBIOS Setup next. 89h The programming after WINBIOS Setup has completed. Displaying the

power on screen message next.

8Bh The first screen message has been displayed. The <WAIT...>

message is displayed. Performing the PS/2 mouse check and

extended BIOS data area allocation check next. 8Ch Programming the WINBIOS Setup options next. 8Dh The WINBIOS Setup options are programmed. Resetting the hard disk

controller next. 8Fh The hard disk controller has been reset. Configuring the floppy drive

controller next.

91h The floppy drive controller has been configured. Configuring the hard

disk drive controller next.

B-7

Appendix B: BIOS POST Checkpoint Codes

Checkpoint Code Description

95h Initializing the bus option ROMs from C800 next. See the last page of

this chapter for additional information.

96h Initializing before passing control to the adaptor ROM at C800.

97h Initialization before the C800 adaptor ROM gains control has com-

pleted. The adaptor ROM check is next.

98h The adaptor ROM had control and has now returned control to BIOS

POST. Performing any required processing after the option ROM returned control.

99h Any initialization required after the option ROM test has completed.

Configuring the timer data area and printer base address next.

9Ah Set the timer and printer base addresses. Setting the RS-232 base

address next.

9Bh Returned after setting the RS-232 base address. Performing any

required initialization before the Coprocessor test next.

9Ch Required initialization before the Coprocessor test is over. Initializing

the Coprocessor next.

9Dh Coprocessor initialized. Performing any required initialization after

the Coprocessor test next.

9Eh Initialization after the Coprocessor test is complete. Checking the

extended keyboard, keyboard ID, and Num Lock key next. Issuing the keyboard ID command next.

A2 h Displaying any soft errors next.

A3h The soft error display has completed. Setting the keyboard typematic

rate next.

A4h The keyboard typematic rate is set. Programming the memory wait

states next.

A5h Memory wait state programming is over. Clearing the screen and

enabling parity and the NMI next.

A7h NMI and parity enabled. Performing any initialization required before

passing control to the adaptor ROM at E000 next.

A8h Initialization before passing control to the adaptor ROM at E000h

completed. Passing control to the adaptor ROM at E000h next.

A9h Returned from adaptor ROM at E000h control. Performing any

initialization required after the E000 option ROM had control next.

Aah Initialization after E000 option ROM control has completed. Displaying

the system configuration next.

Abh Uncompressing the DMI data and executing DMI POST initialization

next. B0h The system configuration is displayed. B1h Copying any code to specific areas.

00h Code copying to specific areas is done. Passing control to INT 19h

boot loader next.

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X6DVA-4G/X6DVA-EG User’s Manual

Notes

Appendix C: Software Installation Instructions

C-1

Appendix C

Installing Software Drivers and Windows

Operating System

After all the hardware has been installed, you must first configure the Adaptec Embedded Serial ATA RAID Driver before you install the Windows operating system. The necessary drivers are all included on the Supermicro bootable CDs that came packaged with your motherboard. (*The following

section provides information on Adaptec's SATA RAID Driver based on the Intel 6300 ESB Controller. For LSI's SCSI HostRAID, please refer to the CDs that came with your motherboard.)

C-1 Introduction to the Adaptec Embedded Serial ATA RAID Controller Driver

Serial ATA (SATA)

Serial ATA(SATA) is a physical storage interface. It uses a single cable with a minimum of four wires to create a point-to-point connection between devices. It is a serial link which supports SATA Transfer rates from 150MBps. Because the serial cables used in SATA are thinner than the traditional cables used in Parallel ATA(PATA), SATA systems have better airflow and can be installed in smaller chassis than Parallel ATA. In addition, the cables used in PATA can only extend to 40cm long, while Serial ATA cables can extend up to one meter. Overall, Serial ATA provides better functionality than Parallel ATA.

Introduction to the Intel 6300 ESB I/O Controller Hub

Located in the South Bridge of the Intel E7320 (Lindenhurst VS)Chipset, the 6300 ESB I/O Controller Hub provides the I/O subsystem with access to the rest of the system. It supports 2-channel Ultra ATA/100 Bus Master IDE controller (PATA) and two Serial ATA (SATA) Host Controllers, which support up to two Serial ATA ports and up to two RAID drives. The 6300 ESB I/O Controller Hub supports the following Parallel ATA (PATA) and Serial (SATA) device configurations:

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X6DVA-4G/X6DVA-EG User's Manual

To configure SATA RAID for Operating Systems that support RAID functions(--Windows, Red Hat & SuSe, Linux)

1. Select "Advanced Setting" from the AMI BIOS menu.

2. Select the IDE Configuration menu.

3. Change the IDE Configuration to "P-ATA Only."

4. Under the item-"Configure S-ATA as RAID", select "Yes".

5. Tap the <Esc> key and scroll down to "Exit". Select "Save and Exit" from the "Exit" menu. Press the <Enter> key to save the changes and exit the BIOS.

6. Once you've exited the BIOS Utility, the system will re-boot.

7. During the system startup, press the <Ctrl> and the <A> keys simultaneously to run the Adaptec RAID Configuration Utility when prompted by the following message:

Press <Ctrl><A> for Adaptec RAID Configuration Utility

Appendix C: Software Installation Instructions

C-3

Using the Adaptec RAID Configuration Utility (ARC)

The Adaptec RAID Configuration Utility is an embedded BIOS Utility, including:

*Array Configuration Utility: Use this utility when you want to create, configure and manage arrays.

* Disk Utilities: Use this option to format or verify disks. To run the Adaptec RAID Configuration Utility, you will need to enable the

RAID function in the system BIOS (refer to Chapter 4 for System BIOS Configurations), and then, press the <Ctrl> and <A> keys simultaneously when prompted to do so during the system startup. (Refer to the previous page for detailed instructions.)

(*Note: To select an option, use the arrow keys to highlight the item and then press the <Enter> key to select it. To return to the previous menu, press the <ESC> key.)

A. Using the Array Configuration Utility (ACU)

The Array Configuration Utility (ACU) enables you to create, manage, and delete arrays from the controller’s BIOS, add and delete spare drives, and initialize drives. During the system startup, press <Ctrl> and <A> key

simultaneously, and the main menu will appear.

The Adaptec Embedded Serial ATA with HostRAID Controller Driver

Adaptec's Embedded Serial ATA RAID with HostRAID controller adds RAID functionality to the Serial ATA I/O controller by supporting RAID 0 (Striping) or RAID 1 (Mirroring) to enhance the industry's pioneer PCI-to-e host controller products. RAID striping (RAID 0) can greatly improve hard disk I/O performance because of its capability in striping data across multiple drives. RAID mirroring (RAID 1) allows the data to be simultaneously written to two drives, so critical data is always available even if a single hard disk fails. Due to the built-in functionality, the X6DVA-4G/ X6DVA-EG is specially designed to keep pace with the increasing performance demands of computer systems by improving disk I/O throughput and providing data accessibility regardless of a single disk failure. By incorporating the Adaptec Embedded Serial ATA into the motherboard design, Supermicro's X6DVA-4G/X6DVA-EG offers the user with the benefits of SATARAID without the high costs associated with hardware RAID applications.

(*Note: For Adaptec's RAID Driver Installation Instructions, please refer to the Adaptec RAID Controller User's Guide: "Emb_SA_RAID_UG.pdf" in the CD that came with this motherboard. You can also download a copy of Adaptec's User's Guide from our web site at www.supermicro.com.)

C-4

X6DVA-4G/X6DVA-EG User's Manual

Managing Arrays

Select this option to view array properties, and delete arrays. The following sections describe the operations Of "Managing Arrays".

To select this option, use the arrow keys and the <enter> key to select "Managing Arrays" from the main menu (as shown above).

Appendix C: Software Installation Instructions

C-5

Viewing Array Properties

To view the properties of an existing array:

1. At the BIOS prompt, press Ctrl+A.

2. From the ARC menu, select Array Configuration Utility (ACU).

3. From the ACU menu, select Manage Arrays (as shown on the

previous screen.)

4. From the List of Arrays dialog box, select the array you want to view and press Enter.

The Array Properties dialog box appears, showing detailed information on the array. The physical disks associated with the array are

displayed here.

5. Press Esc to return to the previous menu.

Deleting Arrays

*Warning: Back up the data on an array before you delete it to prevent the loss of data. Deleted arrays cannot be restored.

To delete an existing array:

1. Turn on your computer and press Ctrl+A when prompted to access the ARC utility.

2. From the ARC main menu, select Array Configuration Utility (ACU).

3. From the ACU menu, select Manage Arrays.

4. Select the array you wish to delete and press Delete.

5. In the Array Properties dialog box, select Delete and press Enter. The following prompt is displayed:

*Warning!! Deleting the array will render array unusable. Do you want to delete the array?(Yes/No):

RAID 1 only—the following prompt is also displayed:

Deleting the partition will result in data loss! Do you also want to delete the partition? (Yes/No):

6. Press Yes to delete the array or partition or No to return to the previous menu.

7. Press Esc to return to the previous menu.

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X6DVA-4G/X6DVA-EG User's Manual

Creating Arrays

Before creating arrays, make sure the disks for the array are connected and installed in your system. Note that disks with no usable space, or disks that are un-initialized are shown in gray and cannot be used. See Initializing Disk Drives.

To create an array: 1 Turn on your computer and press Ctrl+A when prompted to

access the ARC utility.

2 From the ARC menu, select Array Configuration Utility Main Menu (ACU) (as shown on the first screen on page C-5).

3 From the ACU menu, select Create Array. 4 Select the disks for the new array and press Insert (as the screen

shown below).

(*Note: To deselect any disk, highlight the disk and press Delete.)

5 Press Enter when both disks for the new array are selected. The

Array Properties menu displays (as the screen shown on the next page).

Appendix C: Software Installation Instructions

C-7

Assigning Array Properties

Once you've create a new array, you are ready to assign the properties to the array.

*Caution: Once the array is created and its properties are assigned, you cannot change the array properties using the ACU. You will need to use the Adaptec Storage Manager - Browser Edition. (Refer to Adaptec's User's Guide in the enclosed CD.)

To assign properties to the new array:

1. In the Array Properties menu (as shown in the following screen), select an array type and press Enter.

Note that only the available array types: RAID 0, and RAID1, are displayed on the screen. (*RAID 0 or RAID 1 requires two drives.)

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2. Under the item "Arrays Label", type in an label and press Enter. (*Note: The label shall not be more than 15 characters.)

3. For RAID 0, select the desired stripe size. (*Note: Available stripe sizes are 16, 32, and 64 KB-default. It is recommended that you do not change the default setting.)

4. The item: "Create RAID via" allows you to select between the different creating methods for RAID 0 and RAID 1.

The following table gives examples of when each is appropriate.

(*Note: If you select Migrate for RAID 0, or Build for RAID 1, you will be

asked to select the source drive. The contents of the source drive will be preserved. However, the data on the new drive will be lost.)

Raid Level Create Via When Appropriate

RAID 0 No Init Creating a RAID 0 on new drives RAID 0 Migrate

(*Note)

Creating a RAID 0 from one new drive and one drive with data you wish to preserve

RAID 1 Build1 Any time you wish to create a RAID 1, but especially if

you have data on one drive that you wish to preserve

RAID 1 Clear Creating a RAID 1 on new drives, or when you want to

ensure that the array contains no data after creation.

RAID 1 Quick

RAID 1 Init

Fastest way to create a RAID 1. Appropriate when using new drives

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Notes:

1. Before adding a new drive to an array, back up any data contained on the new drive. Otherwise, all data will be lost.

2. If you stop the Build or Clear process on a RAID 1 from ACU, you can restart it by pressing Ctrl+R.

3. A RAID 1 created using the Quick Init option may return some data miscompares if you later run a consistency check. This is normal and is not a cause for concern.

4. The ACU allows you to use drives of different sizes in a RAID . However, during a build operation, only the smaller drive can be selected as the source or first drive.

5. When migrating from single volume to RAID 0, migrating from a larger drive to a smaller drive is allowed. However, the destination drive must be at least half the capacity of the source drive.

6. Adaptec does not recommend that you migrate or build an array on Windows dynamic disks (volumes), as it will result in data loss.

Warning: Do not interrupt the creation of a RAID 0 using the Migrate option. If you do, you will not be able to restart, or to recover the data

that was on the source drive.

5. When you are finished, press Done (as the screen shown below).

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Adding a Bootable Array

To make an array bootable:

1. From the Main menu, select Manage Arrays.

2. From the List of Arrays, select the array you want to make bootable, and press Ctrl+B.

3. Enter Y to create a bootable array when the following message is

displayed: "This will make all other existing bootable array non-bootable. Do you want to make this array bootable? (Yes/No):" Then, a bootable array will be created. An asterisk will appear next to the bootable array (as

shown in the picture below:)

Deleting a Bootable Array

To delete a bootable array:

1. From the Main menu, select Manage Arrays.

2. From the List of Arrays, select the bootable array (*) you want to delete,

and press Ctrl+B. (* a bootable array is the array marked with an asterisk (as shown in the picture above.)

3. Enter Y to delete a bootable array when the following message is displayed: "The array is already marked bootable. Do you want to make this array as not bootable? (Yes/No):" Then, the bootable array will be deleted and the asterisk will disappear.

(*Note: do not use the delete key to delete the bootable array.)

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Adding/Deleting Hotspares

(*Note: In order to rebuild a RAID (RAID 0 or RAID 1), you would need to add a new HDD as a hotspare.)

1. Turn on your computer and press Ctrl+A as prompted to access the ARC Utility.

2. From the ARC menu, select Array Configuration Utility (ACU).

3. From the ACU menu, select Add/Delete Hotspares.

4. Use the up and down arrow keys to highlight and select the disk you want to designate as a hotspare, and press <Insert>, and then, press <Enter>.

5. Press yes when the following prompt is displayed: "Do you want to create spare?" (Yes/No?)

The spare you have selected will appear in the Select Drive Menu.

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Initializing Disk Drives

If an installed disk does not appear in the disk selection list for creating a new array, or if it appears grayed out, you may have to initialize it before you can use it as part of an array. Drives attached to the controller must be initialized before they can be used in an array.

Caution: Initializing a disk overwrites the partition table on the disk and makes any data on the disk inaccessible. If the drive is used in an array, you may not be able to use the array again. Do not initialize a disk that is part of a boot array. To determine which disks are associated with a particular array, please refer to Viewing Array Properties.

To initialize drives:

1. Turn on your computer and press Ctrl+A when prompted to

access the ARC utility.

2. From the ARC menu, select Array Configuration Utility (ACU) (as shown in the screen below).

3. Select Initialize Drives (as shown in the screen below).

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4. Use the up and down arrow keys to highlight the disk you wish to initialize and press Insert (as shown in the screen below).

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5. Repeat Step 4 so that both drives to be initialized are selected (as shown in the screen below).

6. Press Enter.

7. Read the warning message as shown in the screen.

8. Make sure that you have selected the correct disk drives to initialize.

If correct, type Y to continue.