The information in this User’s Manual has been carefully reviewed and is believed to be accurate. The
vendor assumes no responsibility for any inaccuracies that may be contained in this document, makes
no commitment to update or to keep current the information in this manual, or to notify any person
or organization of the updates. Please Note: For the most up-to-date version of this manual,
please see our web site at www.supermicro.com.
Super Micro Computer, Inc. ("Supermicro") reserves the right to make changes to the product described in this manual at any time and without notice. This product, including software and documentation, is the property of Supermicro and/or its licensors, and is supplied only under a license. Any use or
reproduction of this product is not allowed, except as expressly permitted by the terms of said license.
IN NO EVENT WILL SUPERMICRO BE LIABLE FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, SPECULATIVE OR CONSEQUENTIAL DAMAGES ARISING FROM THE USE OR INABILITY
TO USE THIS PRODUCT OR DOCUMENTATION, EVEN IF ADVISED OF THE POSSIBILITY OF
SUCH DAMAGES. IN PARTICULAR, SUPERMICRO SHALL NOT HAVE LIABILITY FOR ANY
HARDWARE, SOFTWARE, OR DATA STORED OR USED WITH THE PRODUCT, INCLUDING THE
COSTS OF REPAIRING, REPLACING, INTEGRATING, INSTALLING OR RECOVERING SUCH
HARDWARE, SOFTWARE, OR DATA.
Any disputes arising between manufacturer and customer shall be governed by the laws of Santa
Clara County in the State of California, USA. The State of California, County of Santa Clara shall be
the exclusive venue for the resolution of any such disputes. Super Micro's total liability for all claims
will not exceed the price paid for the hardware product.
FCC Statement: This equipment has been tested and found to comply with the limits for a class B
digital device, pursuant to Part 15 of the FCC Rules. These limits are designed to provide reasonable
protection against harmful interference in a residential installation. This equipment generates, uses,
and can radiate radio frequency energy and, if not installed and used in accordance with the instructions, may cause harmful interference to radio communications. However, there is no guarantee that
interference will not occur in a particular installation. If this equipment does cause harmful interference to radio or television reception, which can be determined by turning the equipment off and on,
the user is encouraged to try to correct the interference by one or more of the following measures:
• Reorient or relocate the receiving antenna.
• Increase the separation between the equipment and receiver.
• Connect the equipment to an outlet on a circuit different from that to which the
receiver is connected.
• Consult the authorized dealer or an experienced radio/TV technician for help.
California Best Management Practices Regulations for Perchlorate Materials: This Perchlorate warning
applies only to products containing CR (Manganese Dioxide) Lithium coin cells. “Perchlorate Materialspecial handling may apply. See www.dtsc.ca.gov/hazardouswaste/perchlorate”
WARNING: Handling of lead solder materials used
in this product may expose you to lead, a chemical known to the State of California to cause birth
defects and other reproductive harm.
Manual Revision 1.0
Release Date: January 5, 2017
Unless you request and receive written permission from Super Micro Computer, Inc., you may not
copy any part of this document.
Information in this document is subject to change without notice. Other products and companies
referred to herein are trademarks or registered trademarks of their respective companies or mark
holders.
This manual is written for system integrators, PC technicians and
knowledgeable PC users. It provides information for the installation and
use of the C7Z270-CG-L motherboard.
Manual Organization
Chapter 1 describes the features, specications and performance of
the motherboard, and provides detailed information on the Intel Z270
Express chipset.
Chapter 2 provides hardware installation instructions. Read this chapter when installing the processor, memory modules and other hardware
components into the system.
If you encounter any problems, see Chapter 3, which describes troubleshooting procedures for video, memory and system setup stored in the
CMOS.
Chapter 4 includes an introduction to the BIOS, and provides detailed
information on running the CMOS Setup utility.
Appendix A provides BIOS Error Beep Codes.
Appendix B lists software program installation instructions.
Appendix C contains UEFI BIOS Recovery instructions.
Appendix D contains an introduction and instructions regarding the Dual
Boot Block feature of this motherboard.
iii
Page 4
Supermicro C7Z270-CG-L Motherboard User’s Manual
Checklist
Congratulations on purchasing your computer motherboard from an acknowledged leader in the industry. Supermicro boards are designed with
the utmost attention to detail to provide you with the highest standards
in quality and performance.
Please check that the following items have all been included with your
motherboard. If anything listed here is damaged or missing, contact
your retailer.
The following items are included in the retail box:
• One (1) Supermicro Motherboard
• SATA cables
• One (1) I/O shield
• One (1) Quick Reference Guide
• One (1) Driver CD
Conventions Used in the Manual
Special attention should be given to the following symbols for proper
installation and to prevent damage done to the components or injury
to yourself:
Attention! Critical information to prevent damage to the components or injury to yourself.
Important: Important information given to ensure proper system installation or to relay safety precautions.
Note: Additional Information given to differentiate various models or provides information for correct system setup.
iv
Page 5
Standardized Warning Statements
Standardized Warning Statements
The following statements are industry-standard warnings, provided to
warn the user of situations which have the potential for bodily injury.
Should you have questions or experience difculty, contact Supermicro's
Technical Support department for assistance. Only certied technicians
should attempt to install or congure components.
Read this section in its entirety before installing or conguring compo-
nents in the Supermicro chassis.
Battery Handling
Warning!
There is a danger of explosion if the battery is replaced incorrectly. Replace the battery only with the same or equivalent type recommended
by the manufacturer. Dispose of used batteries according to the manufacturer's instructions
Bei Einsetzen einer falschen Batterie besteht Explosionsgefahr. Ersetzen
Sie die Batterie nur durch den gleichen oder vom Hersteller empfohlenen
Batterietyp. Entsorgen Sie die benutzten Batterien nach den Anweisungen
des Herstellers.
Attention
Danger d'explosion si la pile n'est pas remplacée correctement. Ne la
remplacer que par une pile de type semblable ou équivalent, recom-
mandée par le fabricant. Jeter les piles usagées conformément aux
instructions du fabricant.
v
Page 6
Supermicro C7Z270-CG-L Motherboard User’s Manual
¡Advertencia!
Existe peligro de explosión si la batería se reemplaza de manera incorrecta. Reemplazar la batería exclusivamente con el mismo tipo o el
equivalente recomendado por el fabricante. Desechar las baterías gastadas según las instrucciones del fabricante.
배터리가 올바르게 교체되지 않으면 폭발의 위험이 있습니다. 기존 배터리와 동일
하거나 제조사에서 권장하는 동등한 종류의 배터리로만 교체해야 합니다. 제조사
의 안내에 따라 사용된 배터리를 처리하여 주십시오.
Waarschuwing
Er is ontplofngsgevaar indien de batterij verkeerd vervangen wordt. Vervang de batterij slechts met hetzelfde of een equivalent type die door de
fabrikant aanbevolen wordt. Gebruikte batterijen dienen overeenkomstig
fabrieksvoorschriften afgevoerd te worden.
Product Disposal
Warning!
Ultimate disposal of this product should be handled according to all national laws and regulations.
vi
Page 7
Standardized Warning Statements
製品の廃棄
この製品を廃棄処分する場合、国の関係する全ての法律・条例に従い処理する必要が
ありま す。
警告
本产品的废弃处理应根据所有国家的法律和规章进行。
警告
本產品的廢棄處理應根據所有國家的法律和規章進行。
Warnung
Die Entsorgung dieses Produkts sollte gemäß allen Bestimmungen und
Gesetzen des Landes erfolgen.
¡Advertencia!
Al deshacerse por completo de este producto debe seguir todas las leyes
y reglamentos nacionales.
Attention
La mise au rebut ou le recyclage de ce produit sont généralement soumis
à des lois et/ou directives de respect de l'environnement. Renseignezvous auprès de l'organisme compétent.
Drivers and software for Intel® Z270 Express chipset
tilities
ROHS 6/6 (Full Compliance, Lead Free)
ATX form factor (12.0" x 9.6") (304.8 mm x 243.84
mm)
1-3
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Supermicro C7Z270-CG-L Motherboard User’s Manual
1-4 Special Features
Recovery from AC Power Loss
Basic I/O System (BIOS) provides a setting for you to determine how
the system will respond when AC power is lost and then restored to
the system. You can choose for the system to remain powered off, (in
which case you must press the power switch to turn it back on), or for
it to automatically return to a power-on state. See the Advanced BIOS
Setup section to change this setting. The default setting is Last State.
1-5 PC Health Monitoring
This section describes the PC health monitoring features of the board.
All have an onboard System Hardware Monitoring chip that supports PC
health monitoring. An onboard voltage monitor will scan these onboard
voltages continuously: CPU core, +3.3V, +5V, +/- 12V, +3.3V Stby, +5V
Stby, VBAT, HT, Memory PCH Temperature, System Temperature, and CPU
Temperature. Once a voltage becomes unstable, a warning is given, or
an error message is sent to the screen. The user can adjust the voltage
thresholds to dene the sensitivity of the voltage monitor.
Fan Status Monitor and Control
PC health monitoring in the BIOS can check the RPM status of the cooling fans. The onboard CPU and chassis fans are controlled by Thermal
Management via SIO.
Environmental Temperature Control
The thermal control sensor monitors the CPU temperature in real time
and will turn on the thermal control fan whenever the CPU temperature
exceeds a user-dened threshold. The overheat circuitry runs independently from the CPU. Once the thermal sensor detects that the CPU
temperature is too high, it will automatically turn on the thermal fans to
prevent the CPU from overheating. The onboard chassis thermal circuitry
can monitor the overall system temperature and alert the user when the
chassis temperature is too high.
Note: To avoid possible system overheating, please be sure to
provide adequate airow to your system.
1-4
Page 23
Chapter 1: Introduction
System Resource Alert
This feature is available when the system is used with SuperDoctor ® 5
in the Windows OS environment or used with SuperDoctor II in Linux.
SuperDoctor is used to notify the user of cer tain system events. For
example, you can also congure SuperDoctor to provide you with
warnings when the system temperature, CPU temperatures, voltages
and fan speeds go beyond predened thresholds.
1-6 ACPI Features
ACPI stands for Advanced Conguration and Power Interface. The ACPI
specication denes a exible and abstract hardware interface that
provides a standard way to integrate power management features
throughout a PC system, including its hardware, operating system and
application software. This enables the system to automatically turn on
and off peripherals such as CD-ROMs, network cards, hard disk drives
and printers.
In addition to enabling operating system-directed power management,
ACPI also provides a generic system event mechanism for Plug and Play,
and an operating system-independent interface for conguration control.
ACPI leverages the Plug and Play BIOS data structures, while providing
a processor architecture-independent implementation that is compatible
with Windows 7, Windows 8, and Windows 2008 Operating Systems.
Slow Blinking LED for Suspend-State Indicator
When the CPU goes into a suspend state, the chassis power LED will
start to blink to indicate that the CPU is in suspend mode. When the user
presses any key, the CPU will "wake up", and the LED will automatically
stop blinking and remain on.
1-5
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Supermicro C7Z270-CG-L Motherboard User’s Manual
1-7 Power Supply
As with all computer products, a stable power source is necessary for
proper and reliable operation. It is even more important for processors
that have high CPU clock rates.
This motherboard accommodates 24-pin ATX power supplies. Although
most power supplies generally meet the specications required by the
CPU, some are inadequate. In addition, the 12V 8-pin power connector
located at JPW2 is also required to ensure adequate power supply to the
system. Also your power supply must supply 1.5A for the Ethernet ports.
Attention! To prevent damage to the power supply or motherboard, please use a power supply that contains a 24-pin and a
8-pin power connectors. Be sure to connect these connectors to
the 24-pin (JPW1) and the 8-pin (JPW2) power connectors on the
motherboard.
It is strongly recommended that you use a high quality power supply
that meets ATX power supply Specication 2.02 or above. It must also
be SSI compliant. (For more information, please refer to the web site
at http://www.ssiforum.org/). Additionally, in areas where noisy power
transmission is present, you may choose to install a line lter to shield
the computer from noise. It is recommended that you also install a power
surge protector to help avoid problems caused by power surges.
1-8 Super I/O
The Super I/O supports two high-speed, 16550 compatible serial communication ports (UARTs). Each UART includes a 16-byte send/receive FIFO,
a programmable baud rate generator, complete modem control capability
and a processor interrupt system. Both UARTs provide legacy speed with
baud rate of up to 115.2 Kbps as well as an advanced speed with baud
rates of 250 K, 500 K, or 1 Mb/s, which support higher speed modems.
The Super I/O provides functions that comply with ACPI (Advanced Con-
guration and Power Interface), which includes support of legacy and
ACPI power management through an SMI or SCI function pin. It also
features auto power management to reduce power consumption.
1-6
Page 25
C7Z270-CG-L Motherboard Image
Chapter 1: Introduction
Note: All graphics shown in this manual were based upon the latest
PCB Revision available at the time of publishing of the manual. The
motherboard you've received may or may not look exactly the same
as the graphics shown in this manual.
1-7
Page 26
Supermicro C7Z270-CG-L Motherboard User’s Manual
JTPM1JL1
USB 12/13(3.0)
USB 4/5USB 2/3JBR1
AUDIO FP
C7Z270-CG-L Motherboard Layout
JI2C1/JI2C2
ON :ENABLE
OFF:DISABLE
J9702
JI2C2
JI2C1
J9701
1-2:NORMAL
JBR1
2-3:BIOS RECOVERY
JSTBY1:
5V STBY POWER
TH1
JTPM1:
JWD1:
WATCH DOG
1-2:RST
2-3:NMI
TPM/PORT80
C
PWR
LED
HDD
LED
LED1
A
NIC
1
JF1
JWD1
X
OH/FF X
RST
PWR
ON
PCIE M.2 CONNECTOR 2
COM1
PCH SLOT1 PCI-E 3.0 X4
PCH SLOT2 PCI-E 3.0 X1
CPU SLOT3 PCI-E 3.0 X8 (IN X16)
+
22110
2280
JPME2:
1-2:NORMAL
2-3:ME MANUFACTURING MODE
2260
JL1:
CHASSIS
INTRUSION
JPME2
JD1
JD1:SPEAKER:1-4
RESET
BUTTON
POWER
JSD1
CLEAR
CMOS
LED4
BAR CODE
MAC CODE
JBT1
JSD1:SATA DOM PWR
BUTTON
I-SATA4
I-SATA5
JSPDIF_OUT
JBT1:CMOS CLEAR
BIOS LICENSE
SYS_FAN3
PCH SLOT5 PCI-E 3.0 X1
PCH SLOT4 PCI-E 3.0 X1
C7Z270-CG-L
DESIGNED IN USA
REV: 1.01
I-SATA0
I-SATA2
I-SATA1
I-SATA3
HD AUDIO
22110
CPU SLOT6 PCI-E 3.0 X16
2280
2260
PCIE M.2 CONNECTOR 1
SYS_FAN2
LAN
USB 10(3.1)
USB 11(3.1)
DVI
USB 6/7/8/9(3.0)
CPU
JPW1
Important Notes to the User
• See Chapter 2 for detailed information on jumpers, I/O ports and
JF1 front panel connections.
HDMI/DP
KB/MOUSE USB 0/1
JVR1
JPUSB1:USB0/1 WAKE UP
1-2 ENABLE
2-3 DISABLE
CPU_FAN2
CPU_FAN1
JPW2
DIMMA1
DIMMA2
DIMMB1
DIMMB2
SYS_FAN1
JPUSB1
• " " indicates the location of "Pin 1".
• Jumpers not indicated are for testing only.
• When LED1 (Onboard Power LED Indicator) is on, system power
is on. Unplug the power cable before installing or removing any
components.
1-8
Page 27
P34
PCIe x8(in x16) SLOT #4
or
PCIe x4(in x16) SLOT #4
PCIe3.0_x4
Chapter 1: Introduction
C7Z270-CG-L Block Diagram
SVID
IMVP8
DDR4 (CHA)
2133/2400MHz
DDR4 (CHB)
2133/2400MHz
PCIe3.0_x1 GLAN1
8GT/s
PCIe3.0_x2
8GT/s
PCIe3.0_x4
8GT/s
LPC
SATA-III
6Gb/s
IMVP8
I219V
ASM1142 USB3.1
2 X M.2 SOCKET SSD
TPM2.0 Header
NCT6792D-B
LPC I/O
DIMMA0
DIMMA1
DIMMB0
DIMMB1
RJ45
1 X USB Type-A
ASM1543 USB3.1
1 X USB Type-C
6X SATA-III
COM1 Header
PS2 KB/MS
P33
PCIe x16 SLOT #6
PCIe3.0_x8
or
ASMedia Switch
ASM1480
PCIe3.0_x8
8.0GT/s
8.0GT/s
113P
2
3
4
PCIe3.0_x8
8.0GT/s
PCIe x8(in x16) SLOT #6
8.0GT/s
PCIe3.0_x16
PCIe x1 SLOT Rear
PCIe x1 SLOT Rear
PCIe x1 SLOT Rear
PCIe x4 SLOT Rear
2 X USB 3.0 Header
4 X USB 3.0 Rear
2 X USB 2.0 Rear
4 X USB 2.0 Header
Audio Jack/ Aduio Pin Header
8.0GT/s
DDI1
HDMI
DDI2
Display Port
DDI3
DVI
PCIe3.0_x1
8GT/s
PCIe3.0_x1
8GT/s
PCIe3.0_x1
8GT/s
PCIe3.0_x4
8GT/s
USB3.0
5Gbps
USB3.0
5Gbps
USB2.0
480Mbps
USB2.0
480Mbps
Realtek ALC1150
7th Generation
aaf=N
Processor
aaf=O
(Socket-H4)
aaf=P
PCH-H
Z270
AZALIA
Intel
LGA1151
x4 DMI
8GT/s
Intel
PCH
SPI
FLASH
SPI 128Mb
1-9
Page 28
Supermicro C7Z270-CG-L Motherboard User’s Manual
LED4
C7Z270-CG-L Quick Reference
AUDIO FP
JI2C1/JI2C2
ON :ENABLE
OFF:DISABLE
J9702
JI2C2
JI2C1
J9701
1-2:NORMAL
JBR1
2-3:BIOS RECOVERY
USB 4/5USB 2/3JBR1
JSTBY1:
5V STBY POWER
USB 12/13(3.0)
TH1
JTPM1JL1
JTPM1:
JWD1:
WATCH DOG
1-2:RST
2-3:NMI
TPM/PORT80
C
PWR
LED
HDD
LED
LED1
A
NIC
1
JF1
JWD1
X
OH/FF X
RST
PWR
ON
PCIE M.2 CONNECTOR 2
COM1
PCH SLOT1 PCI-E 3.0 X4
PCH SLOT2 PCI-E 3.0 X1
CPU SLOT3 PCI-E 3.0 X8 (IN X16)
+
22110
2280
JPME2:
1-2:NORMAL
2-3:ME MANUFACTURING MODE
2260
JL1:
CHASSIS
INTRUSION
JPME2
JD1
JD1:SPEAKER:1-4
RESET
BUTTON
POWER
JSD1
CLEAR
CMOS
BAR CODE
MAC CODE
JBT1
JSD1:SATA DOM PWR
BUTTON
I-SATA4
I-SATA5
JSPDIF_OUT
JBT1:CMOS CLEAR
BIOS LICENSE
SYS_FAN3
PCH SLOT5 PCI-E 3.0 X1
PCH SLOT4 PCI-E 3.0 X1
C7Z270-CG-L
DESIGNED IN USA
REV: 1.01
I-SATA0
I-SATA2
I-SATA1
I-SATA3
22110
CPU SLOT6 PCI-E 3.0 X16
2280
2260
PCIE M.2 CONNECTOR 1
SYS_FAN2
HD AUDIO
LAN
USB 10(3.1)
USB 11(3.1)
USB 6/7/8/9(3.0)
CPU
DVI
HDMI/DP
KB/MOUSE USB 0/1
JVR1
JPUSB1:USB0/1 WAKE UP
1-2 ENABLE
2-3 DISABLE
CPU_FAN2
JPW1
JumperDescriptionDefault
CLEAR CMOSClear CMOS SwitchPush Button Switch
JBR1BIOS Recovery JumperPins 1-2: Normal
JBT1Clear CMOS (on board)Short pads to clear CMOS
JI2C1/JI2C2SMB to PCI-E SlotsOn: Enable
JPME2
Intel® Manufacturing Mode
JPUSB1USB Wake Up Enable (Back Panel USB 0/1) Pins 1-2: Enable
JWD1Watch Dog Function EnablePins 1-2: RST
POWER BUTTONInternal Power ButtonPush Button Switch
RESET BUTTONReset the SystemPush Button Switch
Pins 1-2: Normal
JPW2
CPU_FAN1
DIMMA1
DIMMA2
DIMMB1
DIMMB2
SYS_FAN1
JPUSB1
1-10
Page 29
Chapter 1: Introduction
ConnectorDescription
AUDIO FPFront Panel Audio Header
BT1Onboard Battery
COM1COM1 Port Header
CPU_FAN1/FAN2CPU Fan Headers
I-SATA0~5
JD1Pins 1~4: External Speaker
JF1Front Panel Control Header
JL1Chassis Intrusion Header
TH1Header for a thermistor type sensor
JPW124-pin ATX Main Power Connector (Required)
JPW28-pin CPU power Connector (Required)
JSD1SATA DOM (Disk On Module) Power Connector
JSPDIF_OUTSony/Philips Digital Interface (S/PDIF) Out Header
USB 2/3, USB 4/5Front Panel Accessible USB 2.0 Headers
USB 12/13 (3.0)Front Panel Accessible USB 3.0 Header
SYS_FAN1/FAN2/FAN3System Fan Headers
(Intel® Z270) Serial ATA (SATA) 3.0 Ports 0~5 (6Gb/sec)
(PCIe3.0 x4) storage device only
LEDDescriptionColor/StateStatus
Power OnPower On: Green OnSystem On
LED1
S3 (Suspend to RAM) LEDS3: Green BlinkingSystem Standy (S3)
LED4Diagnostic LEDDigital ReadoutSee below*
*Download the AMI status codes at http://www.ami.com/support/doc/ami_aptio_4.x_status_codes_pub.pdf
1-11
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Supermicro C7Z270-CG-L Motherboard User’s Manual
Notes
1-12
Page 31
Chapter 2: Installation
Chapter 2
Installation
2-1 Installation Components and Tools Needed
Screws
Intel LGA 1151 Processor
PC Chassis
Power Supply
Phillips-Head Screwdriver
DDR4 DIMMs
Heatsink with Fan
Video Card (Optional)
SATA/USB Optical Drive (Optional)
SATA Hard Disk Drive
2-1
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Supermicro C7Z270-CG-L Motherboard User’s Manual
2-2 Static-Sensitive Devices
Electrostatic-Discharge (ESD) can damage electronic com ponents. To
avoid damaging your system board, it is important to handle it very
carefully. The following measures are generally sufcient to protect your
equipment from ESD.
Precautions
• Use a grounded wrist strap designed to prevent static discharge.
• Touch a grounded metal object before removing the board from the
antistatic bag.
• Handle the board by its edges only; do not touch its components,
peripheral chips, memory modules or gold contacts.
• When handling chips or modules, avoid touching their pins.
• Put the motherboard and peripherals back into their antistatic bags
when not in use.
• For grounding purposes, make sure your computer chassis provides
excellent conductivity between the power supply, the case, the mounting fasteners and the motherboard.
• Use only the correct type of onboard CMOS battery. Do not install the
onboard battery upside down to avoid possible explosion.
Unpacking
The motherboard is shipped in antistatic packaging to avoid static damage. When unpacking the board, make sure that the person handling it
is static protected.
2-2
Page 33
Chapter 2: Installation
2-3 Processor and Heatsink Installation
Attention! When handling the processor package, avoid placing
direct pressure on the label area of the fan.
Important:
Always connect the power cord last, and always remove it before
adding, removing or changing any hardware components. Make
sure that you install the processor into the CPU socket before
you install the CPU heatsink.
If you buy a CPU separately, make sure that you use an Intel-
certied multi-directional heatsink only.
Make sure to install the system board into the chassis before
you install the CPU heatsink.
When receiving a server board without a processor pre-installed,
make sure that the plastic CPU socket cap is in place and none
of the socket pins are bent; otherwise, contact your retailer
immediately.
Refer to the Supermicro website for updates on CPU support.
Installing the LGA1151 Processor
1. Press the load lever to release the load plate, which covers the CPU
socket, from its locking position.
Load Plate
Load Lever
2-3
Page 34
Supermicro C7Z270-CG-L Motherboard User’s Manual
2. Gently lift the load lever to open the load plate. Remove the plastic cap.
3. Use your thumb and your index nger to hold the CPU at the North
center edge and the South center edge of the CPU.
North Center Edge
South Center Edge
4. Align the CPU key that is the semi-circle cutouts against the socket
keys. Once it is aligned, carefully lower the CPU straight down into
the socket. (Do not drop the CPU on the socket. Do not move the
CPU horizontally or vertically.
2-4
Page 35
Chapter 2: Installation
5. Do not rub the CPU against the surface or against any pins of the
socket to avoid damaging the CPU or the socket.)
6. With the CPU inside the socket, inspect the four corners of the CPU
to make sure that the CPU is properly installed.
7. Use your thumb to gently push the load lever down to the lever
lock.
CPU properly
installed
Load lever locked
into place
Attention! You can only install the CPU inside the socket only in one
direction. Make sure that it is properly inserted into the CPU socket
before closing the load plate. If it doesn't close properly, do not force
it as it may damage your CPU. Instead, open the load plate again and
double-check that the CPU is aligned properly.
2-5
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Supermicro C7Z270-CG-L Motherboard User’s Manual
Installing an Active CPU
Heatsink with Fan
1. Locate the CPU Fan power connector on the motherboard.
(Refer to the layout on the
right for the CPU Fan location.)
2. Position the heatsink so that
the heatsink fan wires are closest to the CPU fan power connector and are not interfered
with other components.
3. Inspect the CPU Fan wires to
make sure that the wires are
routed through the bottom of
the heatsink.
4. Remove the thin layer of the
protective lm from the heatsink.
Attention! CPU overheating may
occur if the protective lm is not
removed from the heatsink.
Thermal Grease
Heatsink
Fins
5. Apply the proper amount of
thermal grease on the CPU.
Note: If your heatsink came with
a thermal pad, please ignore this
step.
6. If necessary, rearrange the
wires to make sure that the
wires are not pinched between
the heatsink and the CPU. Also
make sure to keep clearance
between the fan wires and the
ns of the heatsink.
Recommended Supermicro
heatsink:
SNK-P0046A4 active heatsink
2-6
Page 37
7. Align the four heatsink
fasteners with the mounting
holes on the motherboard.
Gently push the pairs of
diagonal fasteners (#1 &
#2, and #3 & #4) into the
mounting holes until you
hear a click. Also, make sure
to orient each fastener so
that the narrow end of the
groove is pointing outward.
8. Repeat Step 7 to insert all
four heatsink fasteners into
the mounting holes.
9. Once all four fasteners are
securely inserted into the
mounting holes, and the
heatsink is properly installed
on the motherboard, connect
the heatsink fan wires to the
CPU Fan connector.
Chapter 2: Installation
2-7
Page 38
Supermicro C7Z270-CG-L Motherboard User’s Manual
Removing the Heatsink
Attention! We do not recommend
that the CPU or the heatsink be
removed. However, if you do need
to remove the heatsink, please
follow the instructions below to remove the heatsink and to prevent
damage done to the CPU or other
components.
Active Heatsink Removal
1. Unplug the power cord from the
power supply.
2. Disconnect the heatsink fan wires
from the CPU fan header.
3. Use your nger tips to gently
press on the fastener cap and
turn it counterclockwise to make
a 1/4 (900) turn, and pull the
fastener upward to loosen it.
Unplug the
PWR cord
4. Repeat Step 3 to loosen all fasteners from the mounting holes.
5. With all fasteners loosened, remove the heatsink from the CPU.
2-8
Pull Up
Page 39
Chapter 2: Installation
JTPM1JL1
USB 12/13(3.0)
USB 4/5USB 2/3JBR1
AUDIO FP
2-4 Installing DDR4 Memory
Note: Check the Supermicro website for recommended memory
modules.
Attention! Exercise extreme care when installing or removing
DIMM modules to prevent any possible damage.
DIMM Installation
PCH SLOT2 PCI-E 3.0 X1
CPU SLOT3 PCI-E 3.0 X8 (IN X16)
+
22110
2280
JPME2:
1-2:NORMAL
2-3:ME MANUFACTURING MODE
2260
JL1:
CHASSIS
INTRUSION
JD1:SPEAKER:1-4
RESET
BUTTON
CLEAR
CMOS
BIOS LICENSE
JSPDIF_OUT
PCH SLOT5 PCI-E 3.0 X1
PCH SLOT4 PCI-E 3.0 X1
BAR CODE
C7Z270-CG-L
DESIGNED IN USA
MAC CODE
REV: 1.01
JBT1
JBT1:CMOS CLEAR
JPME2
JD1
JSD1:SATA DOM PWR
BUTTON
POWER
I-SATA0
I-SATA2
I-SATA4
JSD1
I-SATA5
I-SATA1
I-SATA3
SYS_FAN3
CPU SLOT6 PCI-E 3.0 X16
PCIE M.2 CONNECTOR 1
SYS_FAN2
LAN
USB 10(3.1)
HD AUDIO
USB 11(3.1)
22110
2280
2260
1. Insert the desired number of
DIMMs into the memory slots,
starting with DIMMA1 (see the
next page for the location). For
the system to work properly,
please use the memory modules
of the same type and speed in
the same motherboard.
2. Push the release tabs outwards
on both ends of the DIMM slot
to unlock it.
3. Align the key of the DIMM mod-
ule with the receptive point on the
memory slot.
JI2C1/JI2C2
ON :ENABLE
OFF:DISABLE
J9702
JI2C2
JI2C1
J9701
2-3:BIOS RECOVERY
JSTBY1:
5V STBY POWER
TH1
JTPM1:
TPM/PORT80
PWR
LED
HDD
LED
NIC
1
JF1
X
OH/FFX
RST
PWR
ON
COM1
PCH SLOT1 PCI-E 3.0 X4
JBR1
1-2:NORMAL
JWD1:
WATCH DOG
1-2:RST
2-3:NMI
C
LED1
A
JWD1
PCIE M.2 CONNECTOR 2
LED4
USB 6/7/8/9(3.0)
DVI
HDMI/DP
KB/MOUSE USB 0/1
JPUSB1
JVR1
JPUSB1:USB0/1 WAKE UP
1-2 ENABLE
2-3 DISABLE
JPW2
CPU
CPU_FAN2
CPU_FAN1
DIMMA1
DIMMA2
DIMMB1
DIMMB2
SYS_FAN1
JPW1
4. Align the notches on both ends of
the module against the receptive
points on the ends of the slot.
5. Use two thumbs together to press
the notches on both ends of the
module straight down into the slot
until the module snaps into place.
6. Press the release tabs to the lock
positions to secure the DIMM module into the slot.
Removing Memory Modules
Reverse the steps above to remove the
DIMM modules from the motherboard.
2-9
Notches
Release Tabs
Press both notches
straight down into
the memory slot.
Page 40
Supermicro C7Z270-CG-L Motherboard User’s Manual
Memory Support
Towards the CPU
DIMMA1 (Black Slot)
DIMMA2 (Red Slot)
DIMMB1 (Black Slot)
DIMMB2 (Red Slot)
Towards the edge of the motherboard
The C7Z270 -CG-L supports up to 64GB of Un bu ffe red (U DIMM) non-ECC
DDR4 memory, up to 2133MHz-2800+MHz in four 288-pin memory slots.
Populating these DIMM modules with a pair of memory modules of the
same type and same size will result in interleaved memory, which will
improve memory performance.
Notes
Be sure to use memory modules of the same type, same speed,
same frequency on the same motherboard. Mixing of memory
modules of different types and speeds is not allowed.
Due to memory allocation to system devices, the amount of
memory that remains available for operational use will be reduced when 4 GB of RAM is used. The reduction in memory
availability is disproportional. See the following table for details.
2-10
Page 41
Chapter 2: Installation
Possible System Memory Allocation & Availability
System DeviceSizePhysical Memory
Firmware Hub ash memory (System BIOS)1 MB3.99
Local APIC4 KB3.99
Area Reserved for the chipset2 MB3.99
I/O APIC (4 Kbytes)4 KB3.99
PCI Enumeration Area 1256 MB3.76
PCI Express (256 MB)256 MB3.51
PCI Enumeration Area 2 (if needed) -Aligned on 256-MB
boundary-
VGA Memory16 MB2.85
TSEG1 MB2.84
Memory available to OS and other applications 2.84
512 MB3.01
Remaining (-Available)
(4 GB Total System
Memory)
Memory Population Guidelines
When installing memory modules, the DIMM slots should be populated in
the following order: DIMMA2, DIMMB2, then DIMMA1, DIMMB1.
• Always use DDR4 DIMM modules of the same size, type and speed.
• Mixed DIMM speeds can be installed. However, all DIMMs will run at the
speed of the slowest DIMM.
Recommended Population (Balanced)
DIMMB2DIMMA2DIMMB1DIMMA1Total System Memory
4GB4GB8GB
4GB4GB4GB4GB16GB
8GB8GB16GB
8GB8GB8GB8GB32GB
16GB16GB32GB
16GB16GB16GB16GB64GB
2-11
Page 42
Supermicro C7Z270-CG-L Motherboard User’s Manual
2-5 Motherboard Installation
All motherboards have standard mounting holes to t different types of
chassis. Make sure that the locations of all the mounting holes for both
motherboard and chassis match. Although a chassis may have both plastic and metal mounting fasteners, metal ones are highly recommended
because they ground the motherboard to the chassis. Make sure that the
metal standoffs click in or are screwed in tightly. Then use a screwdriver
to secure the motherboard onto the motherboard tray.
Philips Screwdriver
(1)
Tools Needed
AUDIO FP
JI2C1/JI2C2
ON :ENABLE
OFF:DISABLE
PCH SLOT1 PCI-E 3.0 X4
PCH SLOT2 PCI-E 3.0 X1
LED4
+
22110
2280
JPME2:
1-2:NORMAL
2-3:ME MANUFACTURING MODE
2260
JL1:
CHASSIS
INTRUSION
RESET
CLEAR
JD1:SPEAKER:1-4
BUTTON
CMOS
CPU SLOT3 PCI-E 3.0 X8 (IN X16)
BAR CODE
MAC CODE
JBT1
JPME2
JD1
JSD1:SATA DOM PWR
BUTTON
POWER
I-SATA4
JSD1
I-SATA5
J9702
JI2C2
JI2C1
J9701
JBR1
1-2:NORMAL
2-3:BIOS RECOVERY
USB 4/5USB 2/3JBR1
JSTBY1:
5V STBY POWER
USB 12/13(3.0)
TH1
JTPM1JL1
JTPM1:
JWD1:
WATCH DOG
1-2:RST
2-3:NMI
TPM/PORT80
C
PWR
LED
HDD
LED
LED1
A
NIC
1
JF1
JWD1
X
OH/FF X
RST
PWR
ON
PCIE M.2 CONNECTOR 2
COM1
BIOS LICENSE
JSPDIF_OUT
PCH SLOT5 PCI-E 3.0 X1
PCH SLOT4 PCI-E 3.0 X1
DESIGNED IN USA
JBT1:CMOS CLEAR
I-SATA2
I-SATA3
Philips Screws (9)
SYS_FAN3
C7Z270-CG-L
REV: 1.01
I-SATA0
I-SATA1
HD AUDIO
22110
CPU SLOT6 PCI-E 3.0 X16
2280
2260
PCIE M.2 CONNECTOR 1
SYS_FAN2
LAN
USB 10(3.1)
USB 11(3.1)
Standoffs (9)
Only if Needed
USB 6/7/8/9(3.0)
CPU
DVI
HDMI/DP
KB/MOUSE USB 0/1
JPUSB1:USB0/1 WAKE UP
1-2 ENABLE
2-3 DISABLE
JVR1
JPUSB1
JPW2
CPU_FAN2
CPU_FAN1
DIMMA1
DIMMA2
DIMMB1
DIMMB2
SYS_FAN1
JPW1
Location of Mounting Holes
Attention! 1) To avoid damaging the motherboard and its components, please do not use a force greater than 8 lb/inch on each
mounting screw during motherboard installation. 2) Some components are very close to the mounting holes. Please take precautionary
measures to avoid damaging these components when installing the
motherboard to the chassis.
2-12
Page 43
Chapter 2: Installation
Installing the Motherboard
1. Install the I/O shield into the back of the chassis.
2. Locate the mounting holes on the motherboard. (See the previous
page.)
3. Locate the matching mounting holes on the chassis. Align the
mounting holes on the motherboard against the mounting holes on
the chassis.
4. Install standoffs in the chassis as needed.
5. Install the motherboard into the chassis carefully to avoid damaging
other motherboard components.
6. Using the Phillips screwdriver, insert a Phillips head #6 screw into a
mounting hole on the motherboard and its matching mounting hole
on the chassis.
7. Repeat Step 5 to insert #6 screws into all mounting holes.
8. Make sure that the motherboard is securely placed in the chassis.
Note: Images displayed are for illustration only. Your chassis
or components might look different from those shown in this
manual.
2-13
Page 44
Supermicro C7Z270-CG-L Motherboard User’s Manual
JTPM1JL1
USB 12/13(3.0)
USB 4/5USB 2/3JBR1
AUDIO FP
JPUSB1
2-6 Connectors/IO Ports
The I/O ports are color coded in conformance with the industry standards.
See the gure below for the colors and locations of the various I/O ports.
Back I/O Panel
JI2C1/JI2C2
ON :ENABLE
OFF:DISABLE
J9702
JI2C2
JI2C1
J9701
1-2:NORMAL
JBR1
2-3:BIOS RECOVERY
JSTBY1:
5V STBY POWER
TH1
JTPM1:
JWD1:
WATCH DOG
1-2:RST
2-3:NMI
TPM/PORT80
C
PWR
LED
HDD
LED
LED1
A
NIC
1
JF1
JWD1
X
OH/FF X
RST
PWR
ON
PCIE M.2 CONNECTOR 2
COM1
PCH SLOT1 PCI-E 3.0 X4
PCH SLOT2 PCI-E 3.0 X1
CPU SLOT3 PCI-E 3.0 X8 (IN X16)
+
22110
2280
JPME2:
1-2:NORMAL
2-3:ME MANUFACTURING MODE
2260
JL1:
CHASSIS
INTRUSION
JPME2
JD1
JD1:SPEAKER:1-4
RESET
BUTTON
POWER
JSD1
CLEAR
CMOS
LED4
BAR CODE
MAC CODE
JBT1
JSD1:SATA DOM PWR
BUTTON
I-SATA4
I-SATA5
JBT1:CMOS CLEAR
BIOS LICENSE
JSPDIF_OUT
PCH SLOT5 PCI-E 3.0 X1
PCH SLOT4 PCI-E 3.0 X1
C7Z270-CG-L
DESIGNED IN USA
REV: 1.01
I-SATA0
I-SATA2
I-SATA1
I-SATA3
SYS_FAN3
22110
CPU SLOT6 PCI-E 3.0 X16
2280
2260
PCIE M.2 CONNECTOR 1
SYS_FAN2
HD AUDIO
LAN
USB 10(3.1)
USB 11(3.1)
USB 6/7/8/9(3.0)
CPU
DVI
HDMI/DP
KB/MOUSE USB 0/1
JPUSB1:USB0/1 WAKE UP
1-2 ENABLE
2-3 DISABLE
CPU_FAN2
JPW1
JVR1
CPU_FAN1
JPW2
DIMMA1
DIMMA2
DIMMB1
DIMMB2
SYS_FAN1
A. PS/2 Keyboard/Mouse Port F. DVI PortK. Gb LAN Port #1P. S/PDIF Out
B. USB 2.0 Port 0G. USB 3.0 Port 6L. USB 3.1 Port 10Q. Line In
C. USB 2.0 Port 1H. USB 3.0 Port 7M. USB 3.1 Port 11R. Line Out
D. VESA Display PortI. USB 3.0 Port 8N. Center/LFE OutS. Mic In
E. HDMI PortJ. USB 3.0 Port 9O. Surround Out
O
A
D
B
H
I
F
G
N
Q
R
C
E
JKLSM
P
C7Z270-CG-L
2-14
Page 45
Chapter 2: Installation
Universal Serial Bus (USB)
Four Universal Serial Bus 3.0 ports (#6,7,8,9) and two USB 3.1 'type
C' port (#10/11) and two (2) USB 2.0 ports (#0, 1) are located on the
I/O back panel. In addition, one USB 3.0 header (two ports: #12/13),
and two USB 2.0 headers (four ports: #2/3, 4/5) are also located on
the motherboard to provide front chassis access using USB cables (not
included). See the tables below for pin denitions.
Front Panel USB (2.0) Header
Pin Denitions
Pin # DenitionPin # Denition
1+5V2+5V
3USB_PN24USB_PN3
5USB_PP26USB_PP3
7Ground8Ground
9Key10Ground
Front Panel USB (3.0/2..0)
Pin Denitions
Pin# Denition Pin# Denition
1VBUS11IntA_P2_D+
2IntA_P1_SSRX-12IntA_P2_D-
3IntA_P1_SSRX+13GND
4GND14IntA_P2_SSTX-
5IntA_P1_SSTX-15IntA_P2_SSTX+
6IntA_P1_SSTX+16GND
7GND17IntA_P2_SSRX+
8IntA_P1_D-18IntA_P2_SSRX+
9IntA_P1_D-19USB_PP0
10Ground20Ground
Back Panel USB (2.0) , USB (3.0) Pin
Denitions
Pin# Denition Pin# Denition
1+5V5+5V
2USB_PN16USB_PN0
3USB_PP17USB_PP0
4Ground8Ground
A. Back panel USB 2.0 #0
B. Back panel USB 2.0 #1
C. Back panel USB 3.0 #6
D. Back panel USB 3.0 #7
E. Back panel USB 3.0 #8
F. Back panel USB 3.0 #9
G. Back panel USB 3.1 #10
H. Back panel USB 3.1 #11
I. USB 2.0 Header #2/3
J. USB 2.0 Header #4/5
K. USB 3.0 Header #12/13
PCH SLOT2 PCI-E 3.0 X1
CPU SLOT3 PCI-E 3.0 X8 (IN X16)
BAR CODE
MAC CODE
JBT1
JPME2
JD1
JD1:SPEAKER:1-4
JSD1:SATA DOM PWR
BUTTON
RESET
BUTTON
POWER
I-SATA4
JSD1
I-SATA5
CMOS
BIOS LICENSE
JSPDIF_OUT
PCH SLOT5 PCI-E 3.0 X1
PCH SLOT4 PCI-E 3.0 X1
JBT1:CMOS CLEAR
I-SATA2
I-SATA3
C7Z270-CG-L
DESIGNED IN USA
REV: 1.01
I-SATA0
I-SATA1
SYS_FAN3
A
B
C
D
G
H
E
F
K
AUDIO FP
JI2C1/JI2C2
ON :ENABLE
OFF:DISABLE
PCH SLOT1 PCI-E 3.0 X4
J9702
JI2C2
JI2C1
J9701
JBR1
1-2:NORMAL
2-3:BIOS RECOVERY
I
J
USB 4/5USB 2/3JBR1
JSTBY1:
5V STBY POWER
USB 12/13(3.0)
TH1
JTPM1JL1
JTPM1:
JWD1:
1-2:RST
2-3:NMI
TPM/PORT80
C
PWR
LED
HDD
LED
A
NIC
1
JF1
X
OH/FFX
RST
PWR
ON
COM1
LED1
+
22110
2280
JPME2:
1-2:NORMAL
2-3:ME MANUFACTURING MODE
2260
JL1:
CHASSIS
INTRUSION
WATCH DOG
JWD1
PCIE M.2 CONNECTOR 2
CLEAR
LED4
HD AUDIO
22110
CPU SLOT6 PCI-E 3.0 X16
2280
2260
PCIE M.2 CONNECTOR 1
SYS_FAN2
USB 10(3.1)
USB 11(3.1)
LAN
DVI
HDMI/DP
USB 6/7/8/9(3.0)
KB/MOUSE USB 0/1
JPUSB1
JVR1
JPUSB1:USB0/1 WAKE UP
1-2 ENABLE
2-3 DISABLE
JPW2
CPU
CPU_FAN2
CPU_FAN1
DIMMA1
DIMMA2
DIMMB1
DIMMB2
SYS_FAN1
JPW1
2-15
Page 46
Supermicro C7Z270-CG-L Motherboard User’s Manual
Ethernet Port
One Gigabit Ethernet port (LAN) is located next to the USB 3.0 ports on the
I/O Backpanel to provide network connections. This port will accept RJ45 type
cables.
Note: Please refer to the LED Indica-
tor Section for LAN LED information.
Back Panel High Denition Audio
(HD Audio)
This motherboard supports multiple
channel sound playback, from the two
Pin# Denition
1P2V5SB 10 SGND
2TD0+11Act LED
3TD0-12 P3V3SB
4TD1+13 Link 100 LED
5TD1-14 Link 1000 LED
6TD2+15 Ground
7TD2-16 Ground
8TD3+17 Ground
9TD3-88 Ground
(NC: No Connection)
LAN Ports
Pin Definition
(Green, +3V3SB)
(Yellow, +3V3SB)
channel headset audio, 4.1, 5.1 and
7.1 surround audio. The appropriate
speakers and subwoofer hardware are
required .
A. LAN1
B. Center/LFE Out
C. Surround Out
D. S/PDIF Out
E. Line In
F. Line Out
G. Mic In
PortHeadset,
Light BlueLine InLine InLine InLine In
LimeLine OutFront Speaker OutFront Speaker OutFront Speaker Out
BlackRear Speaker OutRear Speaker OutRear Speaker Out
2 Channels
Audio 2, 4.1, 5.1 or 7.1 channel conguration chart
4.1 Channels5.1 Channels7.1 Channels
2-16
B
A
E
C
F
D
G
Page 47
Chapter 2: Installation
ATX PS/2 Keyboard/Mouse Ports
The ATX PS/2 keyboard and PS/2 mouse are located above Back Panel
USB Ports 0/1 on the motherboard.
VESA® DisplayPort™
DisplayPort, develped by the VESA consortium, delivers digital display at
a fast refresh rate. It can connect to virtually any display device using a
DisplayPort adapter for devices such as VGA, DVI or HDMI.
HDMI Port
One HDMI (High-Denition Multimedia Interface) is located on the I/O
backpanel. This connector is used to display both high denition video
and digital sound through an HDMI capable display, using a single HDMI
cable (not included).
DVI Port
A DVI port is located on the I/O backpanel. Use this port to connect to
a compatible DVI (Digital Visual Interface) display.
A. PS/2 Keyboard/Mouse Port
B. VESA Display Port
C. HDMI Port
D. DVI Port
A
B
D
C
2-17
Page 48
Supermicro C7Z270-CG-L Motherboard User’s Manual
on
on
POWER
1516
Front Control Panel
JF1 contains header pins for various buttons and indicators that are
normally located on a control panel at the front of the chassis. These
connectors are designed specically for use with Supermicro chassis. See
the gure below for the descriptions of the front control panel buttons
and LED indicators. Refer to the following section for descriptions and
pin denitions.
AUDIO FP
JI2C1/JI2C2
ON :ENABLE
OFF:DISABLE
J9702
JI2C2
JI2C1
J9701
JBR1
1-2:NORMAL
2-3:BIOS RECOVERY
USB 4/5USB 2/3JBR1
JSTBY1:
5V STBY POWER
USB 12/13(3.0)
TH1
JTPM1JL1
JTPM1:
JWD1:
WATCH DOG
1-2:RST
2-3:NMI
TPM/PORT80
C
PWR
LED
HDD
LED
LED1
A
NIC
1
JF1
JWD1
X
OH/FF X
RST
PWR
ON
PCIE M.2 CONNECTOR 2
COM1
PCH SLOT1 PCI-E 3.0 X4
PCH SLOT2 PCI-E 3.0 X1
CPU SLOT3 PCI-E 3.0 X8 (IN X16)
+
22110
2280
JPME2:
1-2:NORMAL
2-3:ME MANUFACTURING MODE
2260
JL1:
CHASSIS
INTRUSION
JPME2
JD1
JD1:SPEAKER:1-4
RESET
BUTTON
CLEAR
CMOS
LED4
LED (-)
HDD LED (-)
NIC1 LED (-)
Overheat/
Fan Fail LED (-)
Ground
Ground
JSD1
X
X
POWER
JSD1:SATA DOM PWR
I-SATA4
I-SATA5
JSPDIF_OUT
PCH SLOT4 PCI-E 3.0 X1
BAR CODE
MAC CODE
JBT1
JBT1:CMOS CLEAR
BUTTON
I-SATA2
I-SATA3
2
BIOS LICENSE
SYS_FAN3
PCH SLOT5 PCI-E 3.0 X1
C7Z270-CG-L
DESIGNED IN USA
CPU SLOT6 PCI-E 3.0 X16
REV: 1.01
SYS_FAN2
I-SATA0
I-SATA1
POWER LED (+)
HDD LED (+)
NIC1 LED (+)
X
Overheat/
Fan Fail LED (+)
X
Reset
PWR
1
JF1 Header Pins
HD AUDIO
22110
2280
2260
PCIE M.2 CONNECTOR 1
Reset Butt
Power Butt
LAN
USB 10(3.1)
USB 11(3.1)
USB 6/7/8/9(3.0)
CPU
Pin 2
DVI
HDMI/DP
KB/MOUSE USB 0/1
JPUSB1:USB0/1 WAKE UP
1-2 ENABLE
2-3 DISABLE
JVR1
JPUSB1
JPW2
CPU_FAN2
CPU_FAN1
DIMMA1
DIMMA2
DIMMB1
DIMMB2
SYS_FAN1
JPW1
Pin 15Pin 16
Pin 1
2-18
Page 49
1
2
POWER
1516
Front Control Panel Pin Definitions
Chapter 2: Installation
Power LED
The Power LED connection is located on
pins 15 and 16 of JF1. Refer to the table
on the right for pin denitions.
HDD LED
The HDD LED connection is located on
pins 13 and 14 of JF1. Attach a cable
here to indicate the status of HDDrelated activities, including IDE, SATA
activities. See the table on the right for
pin denitions.
NIC1 (LAN)
The NIC (Network Interface Controller)
LED connection for LAN port 1 is located
on pins 11 and 12 of JF1. Attach an
LED indicator to this header to display
network activity. Refer to the table on
the right for pin denitions.
Overheat (OH)/Fan Fail
Connect an LED cable to OH/Fan Fail
connections on pins 7 and 8 of JF1 to
provide warnings for chassis overheat/
fan failure. Refer to the table on the right
for pin denitions.
Power LED
Pin Denitions (JF1)
Pin# Denition
15+5V
16Ground
HDD LED
Pin Denitions (JF1)
Pin# Denition
13+5V
14HD Active
LAN LED
Pin Denitions (JF1)
Pin# Denition
9/11Vcc
10/12 Ground
OH/Fan Fail LED
Pin Denitions (JF1)
Pin# Denition
7Vcc/Blue UID LED
8OH/Fan Fail LED
OH/Fan Fail Indicator
Status
State Denition
OffNormal
OnOverheat
Flash-
Fan Fail
ing
A
LED (-)
HDD LED (-)
B
NIC1 LED (-)
C
D
Overheat/
Fan Fail LED (-)
Ground
Ground
X
X
2-19
POWER LED (+)
HDD LED (+)
NIC1 LED (+)
X
Overheat/
Fan Fail LED (+)
X
Reset
Reset Button
PWR
Power Button
A. PWR LED
B. HDD LED
C. NIC1 LED
D. OH/Fan Fail
Page 50
Supermicro C7Z270-CG-L Motherboard User’s Manual
1516
Reset Button
The Reset Button connection is located
on pins 3 and 4 of JF1. Attach it to a
hardware reset switch on the computer
case to reset the system. Refer to the
table on the right for pin denitions.
Reset Button
Pin Denitions (JF1)
Pin# Denition
3Reset
4Ground
Power Button
The Power Button connection is located
on pins1 and 2 of JF1. Momentarily
contacting both pins will power on/off
the system. This button can also be con-
gured to function as a suspend button
(with a setting in the BIOS - see Chapter
4). To turn off the power in the suspend
mode, press the button for at least 4
seconds. Refer to the table on the right
for pin denitions.
POWER LED (-)
HDD LED (-)
NIC1 LED (-)
X
Overheat/
Fan Fail LED (-)
X
Ground
Ground
Reset
PWR
1
2
POWER LED (+)
HDD LED (+)
NIC1 LED (+)
X
Overheat/
Fan Fail LED (+)
X
Reset Button
Power Button
Power Button
Pin Denitions (JF1)
Pin# Denition
1Signal
2+3V Standby
A. Reset Button
B. PWR Button
A
B
2-20
Page 51
Chapter 2: Installation
JTPM1JL1
USB 12/13(3.0)
USB 4/5USB 2/3JBR1
AUDIO FP
2-7 Connecting Cables
This section provides brief descriptions and pin-out denitions for onboard headers and connectors. Be sure to use the correct cable for each
header or connector.
ATX Main PWR & CPU PWR
Connectors (JPW1 & JPW2)
The 24-pin main power connector (JPW1)
is used to provide power to the motherboard. The 8-pin CPU PWR connector
(JPW2) is also required for the processor.
These power connectors meet the SSI
EPS 12V specication. See the table on
the right for pin denitions.
12V 8-pin Power Connec-
tor Pin Denitions
Pins Denition
1 through 4Ground
5 through 8+12V
(Required)
JI2C1/JI2C2
ON :ENABLE
OFF:DISABLE
J9702
JI2C2
JI2C1
J9701
JBR1
1-2:NORMAL
2-3:BIOS RECOVERY
JSTBY1:
5V STBY POWER
TH1
JTPM1:
JWD1:
WATCH DOG
1-2:RST
2-3:NMI
TPM/PORT80
C
PWR
LED
HDD
LED
LED1
A
NIC
1
JF1
JWD1
X
OH/FFX
RST
PWR
ON
PCIE M.2 CONNECTOR 2
COM1
PCH SLOT1 PCI-E 3.0 X4
PCH SLOT2 PCI-E 3.0 X1
CPU SLOT3 PCI-E 3.0 X8 (IN X16)
+
22110
2280
JPME2:
1-2:NORMAL
2-3:ME MANUFACTURING MODE
2260
JL1:
CHASSIS
INTRUSION
JPME2
JD1
JD1:SPEAKER:1-4
RESET
BUTTON
JSD1
CLEAR
CMOS
LED4
POWER
BAR CODE
MAC CODE
JBT1
JSD1:SATA DOM PWR
BUTTON
I-SATA4
I-SATA5
JBT1:CMOS CLEAR
BIOS LICENSE
JSPDIF_OUT
PCH SLOT5 PCI-E 3.0 X1
PCH SLOT4 PCI-E 3.0 X1
DESIGNED IN USA
I-SATA2
I-SATA3
SYS_FAN3
C7Z270-CG-L
REV: 1.01
I-SATA0
I-SATA1
22110
CPU SLOT6 PCI-E 3.0 X16
2280
2260
PCIE M.2 CONNECTOR 1
SYS_FAN2
HD AUDIO
LAN
USB 10(3.1)
USB 11(3.1)
ATX Power 24-pin Connector
Pin Denitions (JPW1)
Pin# Denition Pin # Denition
13+3.3V1+3.3V
14-12V2+3.3V
15COM3COM
16PS_ON4+5V
17COM5COM
18COM6+5V
19COM7COM
20Res (NC)8PWR_OK
21+5V95VSB
22+5V10+12V
23+5V11+12V
24COM12+3.3V
A. 24-Pin ATX Main PWR
B. 8-Pin PWR
DVI
HDMI/DP
USB 6/7/8/9(3.0)
CPU
A
JPUSB1:USB0/1 WAKE UP
1-2 ENABLE
2-3 DISABLE
JPW1
KB/MOUSE USB 0/1
JVR1
JPW2
CPU_FAN2
CPU_FAN1
DIMMA1
DIMMA2
DIMMB1
DIMMB2
SYS_FAN1
JPUSB1
B
2-21
Page 52
Supermicro C7Z270-CG-L Motherboard User’s Manual
JTPM1JL1
USB 12/13(3.0)
USB 4/5USB 2/3JBR1
AUDIO FP
LED4
I-SATA3
I-SATA1
F
Fan Headers (Fan 1 ~ Fan 5)
Your motherboard has ve fan headers
(Fan 1~Fan 5). These fans are 4-pin fan
headers. Although pins 1-3 of the fan
headers are backward compatible with
the traditional 3-pin fans, we recommend
the use 4-pin fans to take advantage of
the fan speed control. This allows the
fan speeds to be automatically adjusted
based on the motherboard temperature.
Refer to the table on the right for pin
denitions.
Chassis Intrusion (JL1)
A Chassis Intrusion header is located at
JL1 on the motherboard. Attach the appropriate cable from the chassis to inform
you of a chassis intrusion when the chassis
is opened.
Fan Header
Pin Denitions
Pin# Denition
1Ground (Black)
22.5A/+12V
(Red)
3Tachometer
4PWM_Control
Chassis Intrusion
Pin Denitions (JL1)
Pin# Denition
1Intrusion Input
2Ground
A. Fan 1 (CPU Fan)
B. Fan 2 (CPU Fan)
C. System Fan 1
D. System Fan 2
E. System Fan 3
F. Chassis Intrusion
E
JI2C1/JI2C2
ON :ENABLE
OFF:DISABLE
J9702
JI2C2
JI2C1
J9701
JBR1
1-2:NORMAL
2-3:BIOS RECOVERY
JSTBY1:
5V STBY POWER
TH1
JTPM1:
JWD1:
1-2:RST
2-3:NMI
TPM/PORT80
C
PWR
LED
HDD
LED
LED1
A
NIC
1
JF1
X
OH/FFX
RST
PWR
ON
COM1
PCH SLOT1 PCI-E 3.0 X4
PCH SLOT2 PCI-E 3.0 X1
+
22110
2280
JPME2:
1-2:NORMAL
2-3:ME MANUFACTURING MODE
2260
JL1:
CHASSIS
INTRUSION
WATCH DOG
JWD1
JD1:SPEAKER:1-4
PCIE M.2 CONNECTOR 2
RESET
BUTTON
CLEAR
CMOS
BIOS LICENSE
JSPDIF_OUT
PCH SLOT5 PCI-E 3.0 X1
PCH SLOT4 PCI-E 3.0 X1
CPU SLOT3 PCI-E 3.0 X8 (IN X16)
BAR CODE
DESIGNED IN USA
MAC CODE
JBT1
JBT1:CMOS CLEAR
JPME2
JD1
JSD1:SATA DOM PWR
BUTTON
POWER
I-SATA2
I-SATA4
JSD1
I-SATA5
SYS_FAN3
C7Z270-CG-L
REV: 1.01
I-SATA0
22110
CPU SLOT6 PCI-E 3.0 X16
2280
2260
PCIE M.2 CONNECTOR 1
SYS_FAN2
HD AUDIO
LAN
USB 10(3.1)
USB 11(3.1)
USB 6/7/8/9(3.0)
CPU
DVI
HDMI/DP
KB/MOUSE USB 0/1
JPUSB1
JVR1
JPUSB1:USB0/1 WAKE UP
1-2 ENABLE
2-3 DISABLE
JPW2
CPU_FAN2
CPU_FAN1
A
B
DIMMA1
DIMMA2
DIMMB1
DIMMB2
SYS_FAN1
JPW1
C
D
2-22
Page 53
Speaker (JD1)
LED4
If you wish to use an external speaker,
attach the speaker cable to Pins 1~4 of
this header. See the table on the right
for pin denitions.
Thermistor Header (TH1)
If you wish to use an external thermistortype sensor witht he motherboard, attach
the 2-pin sensor cable to this header.
Chapter 2: Installation
Speaker Connector
Pin Denitions
Pin Setting Denition
Pins1~4External Speaker
A. Speaker Header
B. Thermistor Header
AUDIO FP
JI2C1/JI2C2
ON :ENABLE
OFF:DISABLE
J9702
JI2C2
JI2C1
J9701
JBR1
1-2:NORMAL
2-3:BIOS RECOVERY
USB 4/5USB 2/3JBR1
JSTBY1:
5V STBY POWER
USB 12/13(3.0)
B
TH1
JTPM1JL1
JTPM1:
JWD1:
WATCH DOG
1-2:RST
2-3:NMI
TPM/PORT80
C
PWR
LED
HDD
LED
LED1
A
NIC
1
JF1
JWD1
X
OH/FF X
RST
PWR
ON
PCIE M.2 CONNECTOR 2
COM1
PCH SLOT1 PCI-E 3.0 X4
PCH SLOT2 PCI-E 3.0 X1
CPU SLOT3 PCI-E 3.0 X8 (IN X16)
+
22110
2280
JPME2:
1-2:NORMAL
2-3:ME MANUFACTURING MODE
2260
JL1:
CHASSIS
INTRUSION
JPME2
JD1
JD1:SPEAKER:1-4
RESET
BUTTON
POWER
JSD1
CLEAR
CMOS
BAR CODE
MAC CODE
JBT1
A
JSD1:SATA DOM PWR
BUTTON
I-SATA4
I-SATA5
JBT1:CMOS CLEAR
BIOS LICENSE
JSPDIF_OUT
PCH SLOT5 PCI-E 3.0 X1
PCH SLOT4 PCI-E 3.0 X1
C7Z270-CG-L
DESIGNED IN USA
REV: 1.01
I-SATA0
I-SATA2
I-SATA1
I-SATA3
SYS_FAN3
22110
CPU SLOT6 PCI-E 3.0 X16
2280
2260
PCIE M.2 CONNECTOR 1
SYS_FAN2
2-23
HD AUDIO
LAN
USB 10(3.1)
USB 11(3.1)
USB 6/7/8/9(3.0)
CPU
DVI
HDMI/DP
KB/MOUSE USB 0/1
JPUSB1:USB0/1 WAKE UP
1-2 ENABLE
2-3 DISABLE
JVR1
JPUSB1
JPW2
CPU_FAN2
CPU_FAN1
DIMMA1
DIMMA2
DIMMB1
DIMMB2
SYS_FAN1
JPW1
Page 54
Supermicro C7Z270-CG-L Motherboard User’s Manual
Serial Port (COM1)
There is one serial (COM) port header on
the motherboard. See the table on the
right for pin denitions.
BAR CODE
MAC CODE
JBT1
JSD1:SATA DOM PWR
BUTTON
I-SATA4
I-SATA5
JSPDIF_OUT
JBT1:CMOS CLEAR
BIOS LICENSE
SYS_FAN3
PCH SLOT5 PCI-E 3.0 X1
PCH SLOT4 PCI-E 3.0 X1
C7Z270-CG-L
DESIGNED IN USA
REV: 1.01
I-SATA0
I-SATA2
I-SATA1
I-SATA3
HD AUDIO
22110
CPU SLOT6 PCI-E 3.0 X16
2280
2260
PCIE M.2 CONNECTOR 1
SYS_FAN2
AUDIO FP
JI2C1/JI2C2
ON :ENABLE
OFF:DISABLE
J9702
JI2C2
JI2C1
J9701
JBR1
1-2:NORMAL
2-3:BIOS RECOVERY
USB 4/5USB 2/3JBR1
JSTBY1:
5V STBY POWER
USB 12/13(3.0)
TH1
JTPM1JL1
JTPM1:
JWD1:
WATCH DOG
1-2:RST
2-3:NMI
TPM/PORT80
C
PWR
LED
HDD
LED
LED1
A
NIC
1
JF1
JWD1
X
OH/FF X
RST
PWR
ON
PCIE M.2 CONNECTOR 2
COM1
A
PCH SLOT1 PCI-E 3.0 X4
PCH SLOT2 PCI-E 3.0 X1
CPU SLOT3 PCI-E 3.0 X8 (IN X16)
+
22110
2280
JPME2:
1-2:NORMAL
2-3:ME MANUFACTURING MODE
2260
JL1:
CHASSIS
INTRUSION
JPME2
JD1
JD1:SPEAKER:1-4
RESET
BUTTON
POWER
JSD1
CLEAR
CMOS
LED4
Serial/COM Ports
Pin Denitions
Pin # DenitionPin # Denition
1DCD6DSR
2RXD7RTS
3TXD8CTS
4DTR9RI
5Ground10N/A
A. COM1
LAN
USB 10(3.1)
USB 11(3.1)
USB 6/7/8/9(3.0)
DVI
HDMI/DP
KB/MOUSE USB 0/1
JPUSB1:USB0/1 WAKE UP
1-2 ENABLE
2-3 DISABLE
CPU
JPW1
JVR1
CPU_FAN2
CPU_FAN1
JPW2
DIMMA1
DIMMA2
DIMMB1
DIMMB2
SYS_FAN1
JPUSB1
2-24
Page 55
Chapter 2: Installation
DOM PWR Connector (JSD1)
The Disk-On-Module (DOM) power connector, located at JSD1, provides 5V
(Gen1/Gen) power to a solid state DOM
storage device connected to one of the
SATA ports. See the table on the right
for pin denitions.
SPDIF OUT (JSPDIF_OUT)
The SPDIF Out (JSPDIF_OUT) is used for
digital audio output. You will also need
the appropriate cable to use this feature.
BIOS LICENSE
AUDIO FP
JI2C1/JI2C2
ON :ENABLE
OFF:DISABLE
J9702
JI2C2
JI2C1
J9701
JBR1
1-2:NORMAL
2-3:BIOS RECOVERY
USB 4/5USB 2/3JBR1
JSTBY1:
5V STBY POWER
USB 12/13(3.0)
TH1
JTPM1JL1
JTPM1:
JWD1:
WATCH DOG
1-2:RST
2-3:NMI
TPM/PORT80
C
PWR
LED
HDD
LED
LED1
A
NIC
1
JF1
JWD1
X
OH/FF X
RST
PWR
ON
PCIE M.2 CONNECTOR 2
COM1
PCH SLOT1 PCI-E 3.0 X4
PCH SLOT2 PCI-E 3.0 X1
+
22110
2280
JPME2:
1-2:NORMAL
2-3:ME MANUFACTURING MODE
2260
JL1:
CHASSIS
INTRUSION
JD1:SPEAKER:1-4
RESET
BUTTON
CLEAR
CMOS
LED4
A
B
JSPDIF_OUT
PCH SLOT5 PCI-E 3.0 X1
POWER
JSD1
BAR CODE
MAC CODE
JBT1
JSD1:SATA DOM PWR
BUTTON
I-SATA4
I-SATA5
JBT1:CMOS CLEAR
PCH SLOT4 PCI-E 3.0 X1
DESIGNED IN USA
I-SATA2
I-SATA3
CPU SLOT3 PCI-E 3.0 X8 (IN X16)
JPME2
JD1
SYS_FAN3
CPU SLOT6 PCI-E 3.0 X16
C7Z270-CG-L
REV: 1.01
SYS_FAN2
I-SATA0
I-SATA1
HD AUDIO
22110
2280
2260
PCIE M.2 CONNECTOR 1
LAN
USB 10(3.1)
USB 11(3.1)
Pin# Denition
15V
2Ground
3Ground
USB 6/7/8/9(3.0)
DOM PWR
Pin Denitions
SPDIF_OUT
Pin Denitions
Pin# Denition
1S/PDIF_Out
2Ground
A.DOM PWR
B. S/PDIF OUT
DVI
HDMI/DP
JPUSB1:USB0/1 WAKE UP
1-2 ENABLE
2-3 DISABLE
CPU
JPW1
KB/MOUSE USB 0/1
JVR1
JPW2
CPU_FAN2
CPU_FAN1
DIMMA1
DIMMA2
DIMMB1
DIMMB2
SYS_FAN1
JPUSB1
2-25
Page 56
Supermicro C7Z270-CG-L Motherboard User’s Manual
LED4
Standby Power Header (STBY1)
The Standby Power header is located
at STBY1 on the motherboard. See the
table on the right for pin denitions.
PCI-E M.2 Connector (PCI-E M.2)
The PCI-E M.2 connector is for PCI-E
memory devices. These devices must
conform to the PCIE M.2 specications
(fromerly known as NGFF).
BAR CODE
MAC CODE
JBT1
BUTTON
I-SATA4
I-SATA5
JSPDIF_OUT
JBT1:CMOS CLEAR
BIOS LICENSE
SYS_FAN3
PCH SLOT5 PCI-E 3.0 X1
PCH SLOT4 PCI-E 3.0 X1
C7Z270-CG-L
DESIGNED IN USA
REV: 1.01
I-SATA0
I-SATA2
I-SATA1
I-SATA3
22110
CPU SLOT6 PCI-E 3.0 X16
2280
2260
PCIE M.2 CONNECTOR 1
SYS_FAN2
A
AUDIO FP
JI2C1/JI2C2
ON :ENABLE
OFF:DISABLE
J9702
JI2C2
JI2C1
J9701
JBR1
1-2:NORMAL
2-3:BIOS RECOVERY
USB 4/5USB 2/3JBR1
JSTBY1:
5V STBY POWER
USB 12/13(3.0)
TH1
JTPM1JL1
JTPM1:
JWD1:
WATCH DOG
1-2:RST
2-3:NMI
TPM/PORT80
C
PWR
LED
HDD
LED
LED1
A
NIC
1
JF1
JWD1
X
OH/FF X
RST
PWR
ON
PCIE M.2 CONNECTOR 2
COM1
PCH SLOT1 PCI-E 3.0 X4
PCH SLOT2 PCI-E 3.0 X1
CPU SLOT3 PCI-E 3.0 X8 (IN X16)
+
22110
2280
JPME2:
1-2:NORMAL
2-3:ME MANUFACTURING MODE
2260
JL1:
CHASSIS
INTRUSION
JPME2
B
JD1
JD1:SPEAKER:1-4
RESET
BUTTON
POWER
JSD1
CLEAR
CMOS
JSD1:SATA DOM PWR
Standby Power
Pin Denitions
Pin# Denition
1+5V Standby
2Ground
3Wake-up
A. STBY PWR
B. PCI-E M.2 Connector 1
C. PCI-E M.2 Connector 1
LAN
USB 10(3.1)
HD AUDIO
USB 11(3.1)
USB 6/7/8/9(3.0)
CPU
C
DVI
HDMI/DP
KB/MOUSE USB 0/1
JPUSB1:USB0/1 WAKE UP
1-2 ENABLE
2-3 DISABLE
JVR1
JPUSB1
JPW2
CPU_FAN2
CPU_FAN1
DIMMA1
DIMMA2
DIMMB1
DIMMB2
SYS_FAN1
JPW1
2-26
Page 57
Chapter 2: Installation
Front Panel Audio Header (AUDIO
FP)
A 10-pin Audio header is supported on
the motherboard. This header allows you
to connect the motherboard to a front
panel audio control panet, if needed.
Connect an audio cable to the audio
header to use this feature (not supplied).
See the table at right for pin denitions
for the header.
TPM Header/Port 80
A Trusted Platform Module/Port 80 header is located at JTPM1 to provide TPM
support and Port 80 connection. Use this
header to enhance system performance
and data security. See the table on the
right for pin denitions.
A. AUDIO FP
B.TPM Header
10-in Audio
Pin Denitions
Pin# Signal
1Microphone_Left
2Audio_Ground
3Microphone_Right
4Audio_Detect
5Line_2_Right
6Ground
7Jack_Detect
8Key
9Line_2_Left
10Ground
TPM/Port 80 Header
Pin Denitions
Pin # DenitionPin # Denition
1LCLK2GND
3LFRAME#4<(KEY)>
5LRESET#6+5V (X)
7LAD 38LAD 2
9+3.3V10LAD1
11LAD012GND
13SMB_CLK4 14SMB_DAT4
15+3V_DUAL 16SERIRQ
17GND18CLKRUN# (X)
19LPCPD#20LDRQ# (X)
POWER
JSD1:SATA DOM PWR
I-SATA4
I-SATA5
BAR CODE
MAC CODE
JBT1
JBT1:CMOS CLEAR
BUTTON
JSPDIF_OUT
BIOS LICENSE
PCH SLOT5 PCI-E 3.0 X1
PCH SLOT4 PCI-E 3.0 X1
C7Z270-CG-L
DESIGNED IN USA
REV: 1.01
I-SATA0
I-SATA2
I-SATA1
I-SATA3
SYS_FAN3
22110
CPU SLOT6 PCI-E 3.0 X16
2280
2260
PCIE M.2 CONNECTOR 1
SYS_FAN2
AUDIO FP
A
JI2C1/JI2C2
ON :ENABLEOFF:DISABLE
PCH SLOT1 PCI-E 3.0 X4
PCH SLOT2 PCI-E 3.0 X1
JBR1
1-2:NORMAL
2-3:BIOS RECOVERY
+
22110
2280
JPME2:
1-2:NORMAL
2-3:ME MANUFACTURING MODE
2260
JL1:
CHASSIS
INTRUSION
JWD1:
WATCH DOG
1-2:RST
2-3:NMI
C
LED1
A
JF1
JWD1
PCIE M.2 CONNECTOR 2
COM1
CLEAR
LED4
CPU SLOT3 PCI-E 3.0 X8 (IN X16)
JPME2
JD1
JD1:SPEAKER:1-4
RESET
BUTTON
JSD1
CMOS
J9702
JI2C2
JI2C1
J9701
USB 4/5USB 2/3JBR1
JSTBY1:
5V STBY POWER
USB 12/13(3.0)
TH1
JTPM1JL1
JTPM1:
TPM/PORT80
B
PWR
LED
HDD
LED
NIC
1
X
OH/FFX
RST
PWR
ON
HD AUDIO
LAN
USB 10(3.1)
USB 11(3.1)
USB 6/7/8/9(3.0)
CPU
DVI
HDMI/DP
KB/MOUSE USB 0/1
JPUSB1
JVR1
JPUSB1:USB0/1 WAKE UP
1-2 ENABLE
2-3 DISABLE
JPW2
CPU_FAN2
CPU_FAN1
DIMMA1
DIMMA2
DIMMB1
DIMMB2
SYS_FAN1
JPW1
2-27
Page 58
Supermicro C7Z270-CG-L Motherboard User’s Manual
2-8 Jumper Settings
Explanation of Jumpers
To modify the operation of the motherboard, jumpers can be used to choose
between optional settings. Jumpers
create shorts between two pins to
change the function of the connector.
Pin 1 is identied with a square solder
pad on the printed circuit board.
Note: On two pin jumpers, "Closed"
means the jumper is on, and "Open"
means the jumper is off the pins.
Manufacturing Mode (JPME2)
Close Pin 2 and Pin 3 of Jumper JPME2
to bypass SPI flash security and force
the system to operate in Manufactur-
ing Mode, allowing the user to flash the
system rmware from a host server for
system setting modications. See the
table on the right for jumper settings.
POWER
JSD1:SATA DOM PWR
I-SATA4
I-SATA5
JSPDIF_OUT
BAR CODE
MAC CODE
JBT1
JBT1:CMOS CLEAR
BUTTON
BIOS LICENSE
PCH SLOT5 PCI-E 3.0 X1
PCH SLOT4 PCI-E 3.0 X1
C7Z270-CG-L
DESIGNED IN USA
REV: 1.01
I-SATA0
I-SATA2
I-SATA1
I-SATA3
SYS_FAN3
22110
CPU SLOT6 PCI-E 3.0 X16
2280
2260
PCIE M.2 CONNECTOR 1
SYS_FAN2
HD AUDIO
USB 10(3.1)
USB 11(3.1)
AUDIO FP
JI2C1/JI2C2
ON :ENABLE
OFF:DISABLE
J9702
JI2C2
JI2C1
J9701
JBR1
1-2:NORMAL
2-3:BIOS RECOVERY
USB 4/5USB 2/3JBR1
JSTBY1:
5V STBY POWER
USB 12/13(3.0)
TH1
JTPM1JL1
JTPM1:
JWD1:
WATCH DOG
1-2:RST
2-3:NMI
TPM/PORT80
C
PWR
LED
HDD
LED
LED1
A
NIC
1
JF1
X
OH/FFX
RST
PWR
ON
COM1
PCH SLOT1 PCI-E 3.0 X4
PCH SLOT2 PCI-E 3.0 X1
+
22110
2280
JPME2:
1-2:NORMAL
2-3:ME MANUFACTURING MODE
2260
JL1:
CHASSIS
INTRUSION
A
JWD1
JD1:SPEAKER:1-4
PCIE M.2 CONNECTOR 2
RESET
BUTTON
CLEAR
CMOS
LED4
CPU SLOT3 PCI-E 3.0 X8 (IN X16)
JPME2
JD1
JSD1
Manufacture Mode (JPME2)
Jumper Settings
Pin# Denition
1-2Normal (Default)
2-3Manufacture Mode
A. Manufacturing Mode
LAN
USB 6/7/8/9(3.0)
CPU
DVI
HDMI/DP
KB/MOUSE USB 0/1
JPUSB1:USB0/1 WAKE UP
1-2 ENABLE
2-3 DISABLE
CPU_FAN2
JPW1
JVR1
CPU_FAN1
JPW2
DIMMA1
DIMMA2
DIMMB1
DIMMB2
SYS_FAN1
JPUSB1
2-28
Page 59
Chapter 2: Installation
LED4
Clear CMOS & JBT1
Clear CMOS and JBT1 are used to clear the saved system setup con-
guration stored in the CMOS chip. To clear the contents of the CMOS
usng JBT1, short the two pads of JBT1 with metallic conductor such as
a flathead screwdriver. Clear BIOS works the same way but is a push
button switch. This will erase all user settings and revert everything to
their factory-set defaults.
PCI Slot_SMB Enable
Jumper Settings
PCI-E Slot SMB Enable (I2C1/I2C2)
Use Jumpers I2C1/I2C2 to enable PCI-E
SMB (System Management Bus) support
Jumper Setting Denition
ShortEnabled
Open (Default)Disabled
to improve system management for the
PCI slots. See the table on the right for
jumper settings.
A. JBT1
B. Clear CMOS
C. JI2C1
D. JI2C2
C
D
AUDIO FP
JI2C1/JI2C2
ON :ENABLE
OFF:DISABLE
J9702
JI2C2
JI2C1
J9701
JBR1
1-2:NORMAL
2-3:BIOS RECOVERY
USB 4/5USB 2/3JBR1
JSTBY1:
5V STBY POWER
USB 12/13(3.0)
TH1
JTPM1JL1
JTPM1:
JWD1:
WATCH DOG
1-2:RST
2-3:NMI
TPM/PORT80
C
PWR
LED
HDD
LED
LED1
A
NIC
1
JF1
JWD1
X
OH/FF X
RST
PWR
ON
PCIE M.2 CONNECTOR 2
COM1
PCH SLOT1 PCI-E 3.0 X4
PCH SLOT2 PCI-E 3.0 X1
CPU SLOT3 PCI-E 3.0 X8 (IN X16)
+
22110
2280
JPME2:
1-2:NORMAL
2-3:ME MANUFACTURING MODE
A
2260
JL1:
CHASSIS
INTRUSION
JPME2
JD1
JD1:SPEAKER:1-4
RESET
BUTTON
POWER
JSD1
CLEAR
CMOS
B
BAR CODE
MAC CODE
JBT1
JSD1:SATA DOM PWR
BUTTON
I-SATA4
I-SATA5
JBT1:CMOS CLEAR
BIOS LICENSE
JSPDIF_OUT
PCH SLOT5 PCI-E 3.0 X1
PCH SLOT4 PCI-E 3.0 X1
C7Z270-CG-L
DESIGNED IN USA
REV: 1.01
I-SATA0
I-SATA2
I-SATA1
I-SATA3
SYS_FAN3
22110
CPU SLOT6 PCI-E 3.0 X16
2280
2260
PCIE M.2 CONNECTOR 1
SYS_FAN2
2-29
HD AUDIO
LAN
USB 10(3.1)
USB 11(3.1)
USB 6/7/8/9(3.0)
CPU
DVI
HDMI/DP
KB/MOUSE USB 0/1
JPUSB1
JVR1
JPUSB1:USB0/1 WAKE UP
1-2 ENABLE
2-3 DISABLE
JPW2
CPU_FAN2
CPU_FAN1
DIMMA1
DIMMA2
DIMMB1
DIMMB2
SYS_FAN1
JPW1
Page 60
Supermicro C7Z270-CG-L Motherboard User’s Manual
Watch Dog Timer Enable/Disable
Watch Dog (JWD1) is a system monitor
that can reboot the system when a software application hangs. Close Pins 1-2 to
reset the system if an application hangs.
Close Pins 2-3 to generate a non-maskable
interrupt signal for the application that
hangs. See the table on the right for
jumper settings.
BIOS Recovery Jumper (JBR1)
The BIOS Recovery Jumper (JBR1) is
a slide switch that is used to enable or
disable the BIOS Recovery feature of the
motherboard. See Appendix D for details.
Watch Dog
Jumper Settings
Jumper Setting Denition
Pins 1-2Reset (default)
Pins 2-3NMI
OpenDisabled
BIOS Recovery (JBR1)
Switch Settings
State Denition
Pin 1-2Normal (Default)
Pin 2-3BIOS Recovery
A. Watch Dog Timer
B. BIOS Recovery Switch
POWER
JSD1:SATA DOM PWR
I-SATA4
I-SATA5
JSPDIF_OUT
BAR CODE
MAC CODE
JBT1
JBT1:CMOS CLEAR
BUTTON
BIOS LICENSE
PCH SLOT5 PCI-E 3.0 X1
PCH SLOT4 PCI-E 3.0 X1
C7Z270-CG-L
DESIGNED IN USA
REV: 1.01
I-SATA0
I-SATA2
I-SATA1
I-SATA3
SYS_FAN3
22110
CPU SLOT6 PCI-E 3.0 X16
2280
2260
PCIE M.2 CONNECTOR 1
SYS_FAN2
AUDIO FP
JI2C1/JI2C2
ON :ENABLE
OFF:DISABLE
PCH SLOT1 PCI-E 3.0 X4
PCH SLOT2 PCI-E 3.0 X1
JBR1
1-2:NORMAL
+
22110
2280
JPME2:
1-2:NORMAL
2-3:ME MANUFACTURING MODE
2260
JL1:
CHASSIS
INTRUSION
JWD1:
WATCH DOG
1-2:RST
2-3:NMI
A
C
LED1
JWD1
PCIE M.2 CONNECTOR 2
RESET
CLEAR
LED4
CPU SLOT3 PCI-E 3.0 X8 (IN X16)
JPME2
JD1
JD1:SPEAKER:1-4
BUTTON
JSD1
CMOS
J9702
JI2C2
JI2C1
J9701
2-3:BIOS RECOVERY
B
USB 4/5USB 2/3JBR1
JSTBY1:
5V STBY POWER
USB 12/13(3.0)
TH1
JTPM1JL1
JTPM1:
TPM/PORT80
PWR
LED
HDD
LED
A
NIC
1
JF1
X
OH/FFX
RST
PWR
ON
COM1
HD AUDIO
LAN
USB 10(3.1)
USB 11(3.1)
USB 6/7/8/9(3.0)
CPU
DVI
HDMI/DP
KB/MOUSE USB 0/1
JPUSB1
JVR1
JPUSB1:USB0/1 WAKE UP
1-2 ENABLE
2-3 DISABLE
JPW2
CPU_FAN2
CPU_FAN1
DIMMA1
DIMMA2
DIMMB1
DIMMB2
SYS_FAN1
JPW1
2-30
Page 61
Chapter 2: Installation
Power Button (POWER BUTTON)
In addition to the soft power switch provided in JF1, your motherboard
is equipped with a 'soft' power button on the motherboard. This switch
works the same way as the soft power switch on JF1.
Reset Button
When pressed, the Reset Button will reset the system and reboot. This
action will erase everything in memory and restart the system.
USB Wake Up (JPUSB1)
Use jumper JPUSB to activate the "wakeup" function of the USB ports by pressing
a key on a USB keyboard or clicking the
USB mouse connected. This jumper is
Jumper Setting Denition
Pins 1-2Enabled
Pins 2-3 Disabled (Default)
USB Wake-Up
Jumper Settings
used together with a USB Wake-Up feature in the BIOS. Enable this jumper and
the USB support in the BIOS to wake up
your system via USB devices.
A. Power Button
B. Reset Button
C. USB Wake Up
AUDIO FP
JI2C1/JI2C2
ON :ENABLE
OFF:DISABLE
J9702
JI2C2
JI2C1
J9701
JBR1
1-2:NORMAL
2-3:BIOS RECOVERY
USB 4/5USB 2/3JBR1
JSTBY1:
5V STBY POWER
USB 12/13(3.0)
TH1
JTPM1JL1
JTPM1:
JWD1:
WATCH DOG
1-2:RST
2-3:NMI
TPM/PORT80
C
PWR
LED
HDD
LED
LED1
A
NIC
1
JF1
JWD1
X
OH/FF X
RST
PWR
ON
PCIE M.2 CONNECTOR 2
COM1
PCH SLOT1 PCI-E 3.0 X4
PCH SLOT2 PCI-E 3.0 X1
CPU SLOT3 PCI-E 3.0 X8 (IN X16)
+
22110
2280
JPME2:
1-2:NORMAL
2-3:ME MANUFACTURING MODE
2260
JL1:
CHASSIS
INTRUSION
JPME2
JD1
JD1:SPEAKER:1-4
A
B
RESET
BUTTON
POWER
JSD1
CLEAR
CMOS
LED4
BAR CODE
MAC CODE
JBT1
JSD1:SATA DOM PWR
BUTTON
I-SATA4
I-SATA5
JBT1:CMOS CLEAR
BIOS LICENSE
JSPDIF_OUT
PCH SLOT5 PCI-E 3.0 X1
PCH SLOT4 PCI-E 3.0 X1
C7Z270-CG-L
DESIGNED IN USA
REV: 1.01
I-SATA0
I-SATA2
I-SATA1
I-SATA3
SYS_FAN3
22110
CPU SLOT6 PCI-E 3.0 X16
2280
2260
PCIE M.2 CONNECTOR 1
SYS_FAN2
2-31
HD AUDIO
LAN
USB 10(3.1)
USB 11(3.1)
USB 6/7/8/9(3.0)
CPU
DVI
HDMI/DP
KB/MOUSE USB 0/1
JPUSB1
JVR1
JPUSB1:USB0/1 WAKE UP
1-2 ENABLE
2-3 DISABLE
C
JPW2
CPU_FAN2
CPU_FAN1
DIMMA1
DIMMA2
DIMMB1
DIMMB2
SYS_FAN1
JPW1
Page 62
Supermicro C7Z270-CG-L Motherboard User’s Manual
JTPM1JL1
USB 12/13(3.0)
USB 4/5USB 2/3JBR1
AUDIO FP
2-9 Onboard Indicators
LAN LEDs
One LAN port is located on the I/O
backpanel of the motherboard. This
Ethernet LAN port has two LEDs (Light
Emitting Diode). The yellow LED indicates activity, while the Link LED may
be green, amber, or off to indicate
the speed of the connections. See the
tables at right for more information.
LAN
Link LED
Activity LED
Onboard Power LED (LED1)
An Onboard Power LED is located at LED1
on the motherboard. When LED1 is on,
the AC power cable is connected and the
system is on. When LED1 is blinking, it
is in Stand By (S3, Suspend to RAM).
B
JI2C1/JI2C2
ON :ENABLE
OFF:DISABLE
J9702
JI2C2
JI2C1
J9701
JBR1
1-2:NORMAL
2-3:BIOS RECOVERY
JSTBY1:
5V STBY POWER
TH1
JTPM1:
JWD1:
WATCH DOG
1-2:RST
2-3:NMI
TPM/PORT80
C
PWR
LED
HDD
LED
LED1
A
NIC
1
JF1
JWD1
X
OH/FFX
RST
PWR
ON
PCIE M.2 CONNECTOR 2
COM1
PCH SLOT1 PCI-E 3.0 X4
PCH SLOT2 PCI-E 3.0 X1
CPU SLOT3 PCI-E 3.0 X8 (IN X16)
+
22110
2280
JPME2:
1-2:NORMAL
2-3:ME MANUFACTURING MODE
2260
JL1:
CHASSIS
INTRUSION
JPME2
JD1
JD1:SPEAKER:1-4
RESET
BUTTON
JSD1
CLEAR
CMOS
LED4
POWER
BAR CODE
MAC CODE
JBT1
JSD1:SATA DOM PWR
BUTTON
I-SATA4
I-SATA5
JBT1:CMOS CLEAR
BIOS LICENSE
JSPDIF_OUT
PCH SLOT5 PCI-E 3.0 X1
PCH SLOT4 PCI-E 3.0 X1
C7Z270-CG-L
DESIGNED IN USA
REV: 1.01
I-SATA2
I-SATA3
I-SATA0
I-SATA1
SYS_FAN3
22110
CPU SLOT6 PCI-E 3.0 X16
2280
2260
PCIE M.2 CONNECTOR 1
SYS_FAN2
HD AUDIO
LAN
USB 10(3.1)
USB 11(3.1)
GLAN Activity Indicator
LED Settings
Color Status Denition
YellowFlashingActive
GLAN Link Indicator
LED Settings
LED Color Denition
OffNo Connection/10 Mbps/100
Mbps
Amber1 Gbps
Green 10 Gbps.
Onboard PWR LED Indicator
LED Status
Status Denition
OffSystem Off
OnSystem On
BlinkingS3, Suspend to RAM
A. LAN LEDs
B. PWR LED
A
DVI
HDMI/DP
USB 6/7/8/9(3.0)
CPU
JPUSB1:USB0/1 WAKE UP
1-2 ENABLE
2-3 DISABLE
JPW1
KB/MOUSE USB 0/1
JVR1
JPW2
CPU_FAN2
CPU_FAN1
DIMMA1
DIMMA2
DIMMB1
DIMMB2
SYS_FAN1
JPUSB1
2-32
Page 63
Status Display (LED4)
JL1:CHASSIS
INTRUSION
LED4
PCH SLOT1 PCI-E 3.0 X4
JD1:SPEAKER:1-4
RESET
1-2:NORMAL2-3:ME MANUFACTURING MODE
JPME2:
CLEAR
BUTTON
CMOS
JSD1:SATA DOM PWR
JSD1
POWER
PCH SLOT2 PCI-E 3.0 X1
JPME2
CPU SLOT3 PCI-E 3.0 X8 (IN X16)
BUTTON
JD1
JBT1
JBT1:CMOS CLEAR
I-SATA4
I-SATA5
PCH SLOT4 PCI-E 3.0 X1
I-SATA2
I-SATA3
JSPDIF_OUT
PCH SLOT5 PCI-E 3.0 X1
I-SATA1
I-SATA0
CPU SLOT6 PCI-E 3.0 X16
PCIE M.2 CONNECTOR 1
SYS_FAN3
SYS_FAN2
HD AUDIO
USB 10(3.1)
LAN
USB 11(3.1)
USB 6/7/8/9(3.0)
C7Z270-CG-L
DESIGNED IN USA
BIOS LICENSE
REV: 1.01
BAR CODE
MAC CODE
+
22110
2280
2260
22110
2280
2260
LED4 is made up of two alpha-numeric displays that will display a status
or POST code, when the motherboard
is powered on. Please download the
following Supermicro publication for a
complete list of POST codes:
Six Serial ATA (SATA) 3.0 connectors (I-SATA
0~5) are supported on the board. These ISATA 3.0 ports are supported by the Intel
Z270 PCH chip (supports RAID 0,1,5,10). See
the table below for pin denitions.
AUDIO FP
JI2C1/JI2C2
ON :ENABLE
OFF:DISABLE
J9702
JI2C2
JI2C1
J9701
JBR1
1-2:NORMAL
2-3:BIOS RECOVERY
USB 4/5USB 2/3JBR1
JSTBY1:
5V STBY POWER
USB 12/13(3.0)
TH1
JTPM1JL1
JTPM1:
JWD1:
WATCH DOG
1-2:RST
2-3:NMI
TPM/PORT80
C
PWR
LED
HDD
LED
LED1
A
NIC
1
JF1
X
OH/FFX
RST
PWR
ON
COM1
PCH SLOT1 PCI-E 3.0 X4
PCH SLOT2 PCI-E 3.0 X1
+
22110
2280
JPME2:
1-2:NORMAL
2-3:ME MANUFACTURING MODE
2260
JL1:
CHASSIS
INTRUSION
JWD1
JD1:SPEAKER:1-4
PCIE M.2 CONNECTOR 2
RESET
BUTTON
CLEAR
CMOS
LED4
BIOS LICENSE
JSPDIF_OUT
PCH SLOT5 PCI-E 3.0 X1
PCH SLOT4 PCI-E 3.0 X1
CPU SLOT3 PCI-E 3.0 X8 (IN X16)
BAR CODE
DESIGNED IN USA
MAC CODE
JBT1
JBT1:CMOS CLEAR
JPME2
JD1
JSD1:SATA DOM PWR
A
B
BUTTON
POWER
I-SATA2
I-SATA4
JSD1
I-SATA5
I-SATA3
E
D
SYS_FAN3
C7Z270-CG-L
REV: 1.01
C
I-SATA0
I-SATA1
CPU SLOT6 PCI-E 3.0 X16
PCIE M.2 CONNECTOR 1
(Top)
SYS_FAN2
(Bottom)
LAN
USB 10(3.1)
HD AUDIO
USB 11(3.1)
22110
2280
2260
DVI
USB 6/7/8/9(3.0)
CPU
SATA 2.0/3.0 Connectors
Pin Denitions
Pin# Signal
1Ground
2SATA_TXP
3SATA_TXN
4Ground
5SATA_RXN
6SATA_RXP
7Ground
Top
A. I-SATA 3.0 #4
B. I-SATA 3.0 #2
C. I-SATA 3.0 #0
Bottom
D. I-SATA 3.0 #5
E. I-SATA 3.0 #3
F. I-SATA 3.0 #1
HDMI/DP
KB/MOUSE USB 0/1
JPUSB1
JVR1
JPUSB1:USB0/1 WAKE UP
1-2 ENABLE
2-3 DISABLE
JPW2
CPU_FAN2
CPU_FAN1
DIMMA1
DIMMA2
DIMMB1
DIMMB2
SYS_FAN1
JPW1
2-34
Page 65
Chapter 3: Troubleshooting
Chapter 3
Troubleshooting
3-1 Troubleshooting Procedures
Use the following procedures to troubleshoot your system. If you have
followed all of the procedures below and still need assistance, refer to the
‘Technical Support Procedures’ and/or ‘Returning Merchandise for Service’
section(s) in this chapter. Always disconnect the AC power cord before
adding, changing or installing any hardware components.
Before Power On
1. Make sure that the Standby PWR LED is not on. (Note: If it is on,
the onboard power is on. Be sure to unplug the power cable before
installing or removing the components.)
2. Make sure that there are no short circuits between the motherboard
and chassis.
3. Disconnect all ribbon/wire cables from the motherboard, including
those for the keyboard and mouse. Also, be sure to remove all addon cards.
4. Install a CPU and heatsink (-be sure that it is fully seated) and
then connect the chassis speaker and the power LED to the motherboard. Check all jumper settings as well.
No Power
1. Make sure that there are no short circuits between the motherboard
and chassis.
2. Make sure that all jumpers are set to their default positions.
3. Check if the 115V/230V switch on the power supply is properly set.
4. Turn the power switch on and off to test the system.
5. The battery on your motherboard may be old. Check to make sure
that it still supplies ~3VDC. If it does not, replace it with a new
one.
3-1
Page 66
Supermicro C7Z270-CG-L Motherboard User’s Manual
No Video
1. If the power is on, but you have no video--in this case, you will
need to remove all the add-on cards and cables rst.
2. Use the speaker to determine if any beep codes exist. (Refer to Appendix A for details on beep codes.)
3. Remove all memory modules and turn on the system. (If the
alarm is on, check the specications of memory modules, reset the
memory or try a different one.)
Memory Errors
1. Make sure that the DIMM modules are properly installed and fully
seated in the slots.
2. You should be using unbuffered Non-ECC DDR4 (up t0 3000) MHz
memory recommended by the manufacturer. Also, it is recommended that you use the memory modules of the same type and
speed for all DIMMs in the system. Do not use memory modules
of different sizes, different speeds and different types on the same
motherboard.
3. Check for bad DIMM modules or slots by swapping modules between slots to see if you can locate the faulty ones.
4. Check the switch of 115V/230V power supply.
When the System is Losing the Setup Configuration
1. Please be sure to use a high quality power supply. A poor quality
power supply may cause the system to lose CMOS setup information. Refer to Section 1-5 for details on recommended power supplies.
2. The battery on your motherboard may be old. Check to verify that
it still supplies ~3VDC. If it does not, replace it with a new one.
3. If the above steps do not x the Setup Conguration problem,
contact your vendor for repairs.
3-2
Page 67
Chapter 3: Troubleshooting
3-2 Technical Support Procedures
Before contacting Technical Support, please make sure that you have
followed all the steps listed below. Also, Note that as a motherboard
manufacturer, Supermicro does not sell directly to end users, so it is
best to rst check with your distributor or reseller for troubleshooting
services. They should know of any possible problem(s) with the specic
system conguration that was sold to you.
1. Please go through the ‘Troubleshooting Procedures’ and 'Frequently
Asked Question' (FAQ) sections in this chapter or see the FAQs on
our website (http://www.supermicro.com/support/faqs/) before
contacting Technical Support.
2. BIOS upgrades can be downloaded from our website at (http://
www.supermicro.com/support/bios/).
Note: Not all BIOS can be ashed. Some cannot be ashed; it
depends on the boot block code of the BIOS.
3. If you've followed the instructions above to troubleshoot your
system, and still cannot resolve the problem, then contact Supermicro's technical support and provide them with the following information:
• Motherboard model and PCB revision number
• BIOS release date/version (this can be seen on the initial display
when your system rst boots up)
• System conguration
• An example of a Technical Support form is on our website at (http://
www.supermicro.com/support/contact.cfm).
4. Distributors: For immediate assistance, please have your account
number ready when placing a call to our technical support depart-
ment. We can be reached by e-mail at support@supermicro.com,
by phone at: (408) 503-8000, option 2, or by fax at (408)503-
8019.
3-3
Page 68
Supermicro C7Z270-CG-L Motherboard User’s Manual
3-3 Frequently Asked Questions
Question: What type of memory does my motherboard support?
Answer: The C7Z270-CG-L supports up to 64GB of unbuffered Non-ECC
DDR4. See Section 2-4 for details on installing memory.
Question: How do I update my BIOS?
Answer: We do NOT recommend that you upgrade your BIOS if you are
not experiencing any problems with your system. Updated BIOS les are
located on our website at http://www.supermicro.com/support/bios/.
Please check our BIOS warning message and the information on how
to update your BIOS on our web site. Select your motherboard model
and download the BIOS ROM le to your computer. Also, check the current BIOS revision to make sure that it is newer than your BIOS before
downloading. You may choose the zip le or the .exe le. If you choose
the zipped BIOS le, please unzip the BIOS le onto a bootable device
or a USB pen/thumb drive. To ash the BIOS, run the batch le named
"ami.bat" with the new BIOS ROM le from your bootable device or USB
pen/thumb drive. Use the following format:
F:\> ami.bat BIOS-ROM-lename.xxx <Enter>
Note: Always use the le named “ami.bat” to update the
BIOS, and insert a space between "ami.bat" and the lename.
The BIOS-ROM-lename will bear the motherboard name (i.e.,
C7Z270) and build version as the extension. For example,
"C7Z270.115". When completed, your system will automatically
reboot.
If you choose the .exe le, please run the .exe le under Windows to create the BIOS ash oppy disk. Insert the oppy disk
into the system you wish to ash the BIOS. Then, boot the system to the oppy disk. The BIOS utility will automatically ash
the BIOS without any prompts. Please note that this process
may take a few minutes to complete. Do not be concerned if
the screen is paused for a few minutes.
When the BIOS ashing screen is completed, the system will
reboot and will show “Press F1 or F2”. At this point, you will
need to load the BIOS defaults. Press <F1> to go to the BIOS
setup screen, and press <F9> to load the default settings. Next,
press <F10> to save and exit. The system will then reboot.
Attention! Do not shut down or reset the system while updating
the BIOS to prevent possible system boot failure!
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Chapter 3: Troubleshooting
Question: I think my BIOS is corrupted. How can I recover my BIOS?
Answer: Please see Appendix C-BIOS Recovery for detailed instructions.
3-4 Battery Removal and Installation
Battery Removal
To remove the onboard battery, follow the steps below:
1. Power off your system and unplug your power cable.
2. Locate the onboard battery as shown below.
3. Using a tool such as a pen or a small screwdriver, push the battery lock out-
wards to unlock it. Once unlocked, the battery will pop out from the holder.
4. Remove the battery.
Proper Battery Disposal
Battery
Lock
Attention! Please handle used batteries carefully. Do not damage
the battery in any way; a damaged battery may release hazardous
materials into the environment. Do not discard a used battery in the
garbage or a public landll. Please comply with the regulations set
up by your local hazardous waste management agency to dispose of
your used battery properly.
Battery
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Battery Installation
1. To install an onboard battery, follow the steps 1& 2 above and continue below:
2. Identify the battery's polarity. The positive (+) side should be facing up.
3. Insert the battery into the battery holder and push it down until
you hear a click to ensure that the battery is securely locked.
Attention! When replacing a battery, be sure to only replace it with
the same type.
Battery Holder
1
This side up
2
Press down until
you hear a click.
3-5 Returning Motherboard for Service
A receipt or copy of your invoice marked with the date of purchase is
required before any warranty service will be rendered. You can obtain
service by calling your vendor for a Returned Merchandise Authorization
(RMA) number. For faster service, you may also obtain RMA authorizations online (http://www.supermicro.com/support/rma/). When you return the motherboard to the manufacturer, the RMA number should be
prominently displayed on the outside of the shipping carton, and mailed
prepaid or hand-carried. Shipping and handling charges will be applied
for all orders that must be mailed when service is complete.
This warranty only covers normal consumer use and does not cover
damages incurred in shipping or from failure due to the alteration,
misuse, abuse or improper maintenance of products.
During the warranty period, contact your distributor rst for any product problems.
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Chapter 4
BIOS
4-1 Introduction
This chapter describes the AMI BIOS Setup Utility for the C7Z270-CG-L.
The ROM BIOS is stored in a Flash EEPROM and can be easily updated.
This chapter describes the basic navigation of the AMI BIOS Setup Utility setup screens.
Note: For AMI BIOS Recovery, please refer to the UEFI BIOS Recovery Instructions in Appendix C.
Starting BIOS GUI Setup Utility
To enter the AMI BIOS GUI Setup Utility screens, press the <Delete>
key while the system is booting up.
Note: In most cases, the <Delete> key is used to invoke the AMI
BIOS setup screen.
Each BIOS menu option is described in this manual. The Main BIOS Setup
screen has two main areas. The left area is the Main Navigation, and the
main area is for the Information Section. Icons that do not respond when
the mouse pointer is hovering on top are not congurable.
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The AMI BIOS GUI Setup Utility uses a mouse pointer navigation system
similar to standard graphical user interfaces. Hover and click an icon to
select a section, click a down arrow to select from an options list.
You may press the <F1> on any screen under the Setup Section to see
a list of Hot Keys that are available. Press <F12> to print the screen.
The keyboard's Escape key <ESC> cancels the current screen and will
you back to the previous screen.
How To Change the Configuration Data
The conguration data that determines the system parameters may be
changed by entering the AMI BIOS GUI Setup utility. This Setup utility can be accessed by pressing <Del> at the appropriate time during
system boot.
Note: For the purposes of this manual, options that are printed in
Bold are default settings.
How to Start the Setup Utility
Normally, the only visible Power-On Self-Test (POST) routine is the
memory test. As the memory is being tested, press the <Delete> key to
enter the main menu of the AMI BIOS GUI Setup Utility. From the Setup
Home screen, you can access the other Setup Sections.
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4-2 System Information
The System Information Panel displays the motherboard's conguration.
The following information among others are displayed in this section:
• Motherboard Model Name - C7Z270-CG-L.
• BIOS Version - this item displays the BIOS version number.
• Build Date and Time - displays the BIOS build date and Time.
• CPU - displays the CPU type speed, stepping, etc
• CPU Fan Data - displays sensor type, temperature, speed
System Date
Click on the date to open the setup elds. This item sets and displays the
system date. Click the up and down arrows to adjust the date.
System Time
Click on the time to open the setup elds. This item sets and displays the
system time. Click the up and down arrows to adjust the system time.
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4-3 CPU
The following information are be displayed in this section:
• Name - indicates the model name of the CPU.
• Type - indicates the brand, model name, model number of the
CPU and it's rated clock speed.
• Speed - this item shows the detectedf CPU speed.
• ID - diplays the unique CPU ID.
• Stepping - displays the processor stepping.
• Number of Processors - displays the number of cores detected.
• Microcode Revision - displays the CPU's microcode patch ver-
sion.
• GT Info - this item shows the processor's GT Information.
• IGFX VBIOS Version - this item shows the Integrateg Graphics
VBIOS version.
• IGFX GOP Version - this item shows the Integrateg Graphics
VOP version.
• Memory RC Version - this item shows the memory RC version.
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CPU Configuration
The following CPU information will be displayed:
• CPU Type - displays the CPU type.
Chapter 4: AMI BIOS
• Type - indicates the brand, model name, model number of the
CPU and it's rated clock speed.
• ID - diplays the unique CPU ID.
• Speed - this item shows the detectedf CPU speed.
• L1 Data Cache - indicates if Level 1 cache is supported.
• L1 Instruction Cache - displays if Level 1 instruction cache is
supported.
• L2 Cache - indicates if Level 2 cache is supported.
• L3 Cache - displays whether Level 3 cache is supported or not.
• L4 Cache - indicates if Level 4 cache is supported.
• VMX - indicates if VMX is supported.
• SMX/TXT - indicates if SMX/TXT is supported.
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SW Guard Extension (SGX)
Select Enabled to activate the Software Guard Extensions (SGX). The
options are Enabled, Disabled, and Software Controlled. Please enable
this option for SGX support.
Select Owner EPOCH Input Type
There are three Owner EPOCH modes (Each EPOCH is 64 bit). The options are No Change in Owner EPOCHs, Change to New Random Owner
EPOCH and Manual User Dened Owner EPOCHs.
PRMRR Size
The BIOS must reserve a contiguous region of Processor Reserved Memory (PRM) in the Processor Reserved Memory Range Register (PRMRR).
This item appears if SW Guard Extensions is enabled. The options are
Auto, 32MB, 64MB, and 128MB.
Hardware Prefetcher
(Available when supported by the CPU)
If set to Enabled, the hardware prefetcher will prefetch streams of data
and instructions from the main memory to the L2 cache to improve CPU
performance. The options are Disabled and Enabled.
Adjacent Cache Line Prefetch
(Available when supported by the CPU)
Select Enabled for the CPU to prefetch both cache lines for 128 bytes as
comprised. Select Disabled for the CPU to prefetch both cache lines for
64 bytes. The options are Disabled and Enabled.
Intel (VMX) Virtualization Technology
(Available when supported by the CPU)
Select Enabled to use the Intel Virtualization Technology to allow one
platform to run multiple operating systems and applications in independent partitions, creating multiple "virtual" systems in one physical
computer. The options are Enabled and Disabled.
Note: If there is any change to this setting, you will need to
power off and reboot the system for the change to take effect.
Please refer to Intel’s web site for detailed information.
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Active Processor Cores
Use this feature to select the number of active processor cores. The
options are All, 1, 2, 3 and 4 (These options depend on how many cores
are supported by the CPU.)
Hyper-Threading
Select Enabled to support Intel Hyper-threading Technology to enhance
CPU performance. The options are Enabled and Disabled.
BIST
Select Enabled to activate the Built-In Self Test (BIST) on reset. The
options are Enabled and Disabled.
AES
Select Enable for Intel CPU Advanced Encryption Standard (AES) Instructions support to enhance data integrity. The options are Enabled and
Disabled.
Machine Check
Select Enable to activate Machine Check. The options are Enabled and
Disabled.
MonitorMWait
Select Enable to activate MonitorMWait. The options are Enabled and
Disabled.
Intel Trusted Executed Technology
Intel TXT (Trusted Execution Technology) helps protect against software-
based attacks and ensures protection, condentiality and integrity of data
stored or created on the system. The options are Enabled and Disabled.
*If Intel Trusted Execution Technology is Enabled, the features Alias
Check Request and DPR Memory Size are available for conugration.
Alias Check Request
Use this feature to set up Alias Check Request. The options are Enabled
and Disabled.
Reset AUX Content
Use this feature to reset the TPM Auxiliary content. The options are yes
or no.
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CPU SMM Enhancement
SMM Code Access Check
SMM Code Access is a special operating mode that is used by the BIOS
to handle power and hardware management functions. The options
are Disabled and Enabled.
SMM Use Delay Indication
Enable SMM Use Delay Indication to check whether a thread will be
delayed while entering SMM. The options are Disabled and Enabled.
SMM Use Block Indication
Enable SMM Use Block Indication to check whether a thread is blocked
from entering SMM. The options are Disabled and Enabled.
FCLK Frequency for Early Power On
Select the FCLK frequency for early power on. The options are Normal
(800MHz), 1GHz and 400MHz.
Power and Performance
CPU - Power Management Control
Race to Halt (RTH)
Race to Halt (RTH) is an energy-saving feature that will increase the CPU
frequency in order to enter the C-State faster to reduce power usage.
The options are Disabled and Enabled.
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Intel(R) SpeedStep(tm)
Intel SpeedStep Technology allows the system to automatically adjust
processor voltage and core frequency in an effort to reduce power consumption and heat dissipation. Please refer to Intel’s web site for
detailed information. The options are Disabled and Enabled.
HDC Control
Enable this feature for the processor to access and modify data on the
hard disk drive. The options are Disabled and Enabled.
C states
C-States architecture, a processor power management platform developed by Intel, can further reduce power consumption from the basic C1
(Halt State) state that blocks clock cycles to the CPU. Select Enabled
for CPU C Sates support. The options are Enabled and Disabled. If this
feature is set to Enabled, the following items will display:
Enhanced C-states
(Available when "CPU C States" is set to Enabled)
Select Enabled to enable Enhanced C1 Power State to boost system
performance. The options are Enabled and Disabled.
C-State Auto Demotion
When this item is enabled, the CPU will conditionally demote C State
based on un-cored auto-demote information. The options are Disabled,
C1, C3, and C1 and C3.
C-State Un-demotion
When this item is enabled, the CPU will conditionally undemote from
demoted C3 or C1. The options are Disabled, C1, C3, and C1 and C3.
Package C-State Demotion
This item enables the Package C-State demotion. The options are Disabled and Enabled.
Package C-State Un-Demotion
When this item is enabled, the CPU will conditionally undemote from
demoted Packaged Package C-State Un-Demotion. The options are Dis-
abled and Enabled.
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CState Pre-Wake
Use this option to enable or disable the C-State pre wake. The options
are Enabled and Disabled.
IO MWAIT Redirection
When enabled, this feature will map and send the IO read instructions
to the IO registers. The options are Disabled and Enabled.
Package C State Limit
Select Auto for the AMI BIOS to automatically set the limit on the C-State
package register. The options are C0, C2, C3, C6, C7, C7s, and Auto.
Package C State Workaround
Enable this feature to x old HDDs that have problems entering the
Package C State. The options are Disabled and Enabled.
GT-Power Management
RC6 (Render Standby)
Use this feature enable Render Standby support. The options are
Enabled and Disabled.
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Maximum GT Frequency
This option is the Maximum GT Frequency as dened by the user.
Choose between 300MHz (RPN) and 1200MHz (RP0). Any value beyond
this range will be clipped to its min/max supported by the CPU. The
options are Default Max Frequency, 100MHz through 1200MHz in
increments of 50MHz.
CPU OverClocking
BCLK Clock Frequency (1/100 MHz)
Use this item to set the CPU clock override value for the host system.
The default setting is 10000.
FCLK Frequency for Early Power On
Select the FCLK frequency for early power on. The options are Normal
(800MHz), 1GHz and 400MHz.
Active Processor Cores
Use this feature to select the number of active processor cores. The
options are All, 1, 2, 3 and 4 (these options depend on how many cores
are supported by the CPU).
Load SMC CPU OC Setting
This item has optimized pre-congured overclock settings. Select one
to activate. The options are Manual, 4.0GHz~5.5GHz (in 100MHz increments).
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1-Core Ratio Limit Override
This increases (multiplies) 1 clock speed in the CPU core in relation to
the bus speed when one CPU core is active. Enter 0 to use the manufacturer's default setting.
2-Core Ratio Limit Override
This increases (multiplies) 2 clock speeds in the CPU core in relation
to the bus speed when two CPU cores are active. Enter 0 to use the
manufacturer's default setting.
RSR
This item enables or disables the Reliability Stress Restrictor (RSR) feature. Use this feature to lower the CPU turbo ratio if the temperature is
too high. The options are Disabled and Enabled.
Boot performance mode
This option enables the selection of the default CPU performance during
system boot. The options are Max Non-Turbo Performance, Max Battery, and Turbo Performance.
Intel(R) SpeedStep(tm)
Enhanced Intel SpeedStep Technology (EIST) allows the system to
automatically adjust processor voltage and core frequency in an effort
to reduce power consumption and heat dissipation. Please refer to Intel’s web site for detailed information. The options are Disabled
and Enabled.
Package Power Limit MSR Lock
This feature enables or disables the locking of Package Power Limit
settings. When enabled Package Power Limit MSR will be locked and a
reset will be required to unlock the register. The options are Disabled
and Enabled.
Congurable TDP Boot Mode
This feature sets the TDP Boot Mode to either Nominal, Up, Down or Deactivated. When deactivated, it will set MSR to Nominal and MMIO to zero.
Congurable TDP Lock
This option sets the lock bits on TURBO_ACTIVATION_RATIO and CON-
FIG_TDP_CONTROL. When lock is enabled, Custom Cong TDP Count
will be forced to 1 and Custom Cong TDP Boot Index will be forced to
0. The options are Disabled and Enabled.
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CTDP BIOS control
This feature enables CTDP control via runtime ACPI BIOS methods. The
options are Disabled and Enabled.
Power Limit 1 Override
This feature disables or enables the Power Limit 1 Override. If this option is disabled, the BIOS will program the default values for Power Limit
and Power Limit 1 Time Window. The options are Disabled and Enabled.
Power Limit 1
This feature congures Package Power Limit 1, in milliwatts. When the
limit is exceeded, the CPU ratio is lowered after a period of time (see
item below). A lower limit can save power and protect the CPU, while
a higher limit improves performance. This value must be between Min
Power Limit TDP limit. If value is '0' the BIOS will program the TDP value.
Use the number keys on your keyboard to enter the value. The default
setting is dependent on the CPU.
Power Limit 1 Time Window
This item determines how long the time window over which the TDP value
is maintained. Use the number keys on your keyboard to enter the value.
The default setting is 8. This value may vary between 0~128.
Power Limit 2 Override
This feature disables or enables the Power Limit 2 Override. If this option is disabled, the BIOS will program the default values for Power Limit
and Power Limit 2 Time Window. The options are Disabled and Enabled.
Power Limit 2
This feature congures Package Power Limit 2, in milliwatts. When the
limit is exceeded, the CPU ratio is lowered after a period of time (see
item below). A lower limit can save power and protect the CPU, while
a higher limit improves performance. This value must be between Min
Power Limit TDP limit. If value is '0' the BIOS will program the TDP value.
Use the number keys on your keyboard to enter the value. The default
setting is dependent on the CPU.
Platform PL1 Enable
This option disables or enables the Platform Power Limit 1 programming.
If this option is enabled, it activates the PL1 value to be used by the
processor to limit the average power of the given time window. The options are Disabled and Enabled.
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Platform PL2 Enable
This option disables or enables the Platform Power Limit 2 programming.
If this option is enabled, it activates the PL1 value to be used by the
processor to limit the average power of the given time window. The options are Disabled and Enabled.
Power Limit 3 Override
This feature disables or enables the Power Limit 3 Override. If this option is disabled, the BIOS will program the default values for Power Limit
and Power Limit 3 Time Window. The options are Disabled and Enabled.
Power Limit 4 Override
This feature disables or enables the Power Limit 4 Override. If this option is disabled, the BIOS will program the default values for Power Limit
and Power Limit 4 Time Window. The options are Disabled and Enabled.
CPU Flex Ratio Override
Select Enabled to activate CPU Flex Ratio programming. The options are
Enabled and Disabled.
CPU Flex Ratio Settings
When CPU Flex Ratio Override is enabled, this sets the value for the
CPU Flex Ratio. The default is 16.
Core Max OC Ratio
This option sets the maximum overclocking ratio for the CPU core. The
allowable range is from 0~80.
SA Voltage Override
Use this option to set the System Agent Voltage in mV. The options are
1.05 Volts to 1.95 volts in increments of .05.
Core Voltage Mode
Use this feature to select the Core voltage mode. The options are Override and Adaptive.
If the feature above is set to Override, SVID and Core Voltage Override
are available for conugration.
Core Extra Turbo Voltage
Use this feature to select the Core Turbo voltage mode. Select a value.
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Core Voltage Offset
Use this feature to set the CPU Voltage Offset value from -500mV to
+500mV. Enter 0 to use the manufacturer default value.
Offset Prex
Use this feature to set the Core Voltage Offset value as a positive (+)
number or a negative (-) number. The default setting is "+".
Core PLL Voltage Offset
Use this feature to set the CPU PLL Voltage Offset value from 0-63
with each unit at 15mV. This is used to increase the range of the core
frequency in extreme overclocking conditions. Enter 0 to use the manufacturer default value.
Ring Max OC Ratio
Use this feature to set the maximum overclocking ratio for the RING
Domain. Select a value.
Ring Min OC Ratio
Use this feature to set the minimum overclocking ratio for the RING
Domain. Select a value.
Uncore Voltage Offset
Use this feature to specify the Offset Voltage applied to the Uncore domain. Select a value.
Offset Prex
Use this feature to set the offset value as positive or negative. The options are + or -.
PCH Voltage
Use this feature to trim the PCH Voltage. Select from these values:
1.00V, 1.05V, 1.10V, 1.15V, 1.20V, 1.25V, and 1.30V.
CPU_IO Voltage
Use this feature to calibrate the CPU I/O Voltage. Select from these
values: 0.975V, 1.15V, 1.30V, and 1.50V.
PSYS Slope
PSYS Slope is dened in 1/100 increments and uses the BIOS VR mailbox command 0x9. Range is 0-200. For example, enter 125 for a 1.25
slope. Enter 0 for AUTO.
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PSYS Offset
PSYS Offset is dened in 1/4 increments and uses the BIOS VR mailbox
command 0x9. For example, enter 100 for a 25 offset. Range is 0-255.
PSYS PMax Power
The value is dened in 1/8 Watt increments and uses the BIOS VR mailbox command 0xB. For example, enter 1000 for a 125 Watt PMax value.
Range is 0-8192. Enter 0 for AUTO.
Acoustic Noise Settings
Acoustic Noise Mitigation
Select Enable to help mitigate acoustic noise on certain SKUs when the
CPU is in deeper C-State. The options are Enabled and Disabled.
When the above is set to Enabled, the following can be congured:
IA VR Domain
Disable Fast PKG C State Ramp for IA Domain
Select False to leave Fast ramp enabled during deeper C-States. Selecting True will disable Fast ramp during deeper C-States. The options
are True and False.
Slow Slew Rate for IA Domain
This feature sets the VR IA Slew Rate for Deep Package C-State ramp
time. Slow slew rate equals Fast divided by the number 2, 4, 8, or
16. This feature is used to help reduce acoustic noise. The options are
Fast/2, Fast/4, Fast/8 and Fast/16.
GT VR Domain
Disable Fast PKG C State Ramp for GT Domain
Select False to leave Fast ramp enabled during deeper C-States. Selecting True will disable Fast ramp during deeper C-States. The options
are True and False.
Slow Slew Rate for GT Domain
This feature sets the VR GT Slew Rate for Deep Package C-State ramp
time. Slow slew rate equals Fast divided by the number 2, 4, 8, or
16. This feature is used to help reduce acoustic noise. The options are
Fast/2, Fast/4, Fast/8 and Fast/16.
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SA VR Domain
Disable Fast PKG C State Ramp for SA Domain
Select False to leave Fast ramp enabled during deeper C-States. Selecting True will disable Fast ramp during deeper C-States. The options
are True and False.
Slow Slew Rate for SA Domain
This feature sets the VR SA Slew Rate for Deep Package C-State ramp
time. Slow slew rate equals Fast divided by the number 2, 4, 8, or
16. This feature is used to help reduce acoustic noise. The options are
Fast/2, Fast/4, Fast/8 and Fast/16.
Core/IA VR Settings
VR Cong Enable
Select Enable to activate VR conguration options. The options are
Enabled and Disabled.
AC Loadline
AC Loadline is dened in 1/100 mOhms and uses the BIOS mailbox
command 0x2. A value of 100 equals 1.0 mOhm, and 1255 is 12.55
mOhms. Range is 0-6249 (0-62.49 mOhms). Enter 0 for AUTO.
DC Loadline
DC Loadline is dened in 1/100 mOhms and uses the BIOS mailbox
command 0x2. A value of 100 equals 1.0 mOhm, and 1255 is 12.55
mOhms. Range is 0-6249 (0-62.49 mOhms). Enter 0 for AUTO.
PS Current Threshold1
The PS Current Threshold1 is dened in 1/4A (Amperes) increments
and uses the BIOS mailbox command 0x3. A value of 400 equals
100A. Range is 0-512 which translates to 0-128A. Enter 0 for AUTO.
Default is 80 for 20A.
PS Current Threshold2
The PS Current Threshold2 is dened in 1/4A (Amperes) increments
and uses the BIOS mailbox command 0x3. A value of 400 equals
100A. Range is 0-512 which translates to 0-128A. Enter 0 for AUTO.
Default is 20 for 5A.
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PS Current Threshold3
The PS Current Threshold2 is dened in 1/4A (Amperes) increments
and uses the BIOS mailbox command 0x3. A value of 400 equals
100A. Range is 0-512 which translates to 0-128A. Enter 0 for AUTO.
Default is 20 for 5A.
PS3 Enable
Use this feature to enable or disable PS3. Use BIOS VR mailbox command line 0x3. The options are Enabled and Disabled.
PS4 Enable
Use this feature to enable or disable PS4. Use BIOS VR mailbox command line 0x3. The options are Enabled and Disabled.
IMON Slope
IMON (Load Current Monitor) Slope is dened in 1/100 increments
and uses the BIOS VR mailbox command 0x4. Range is 0-200. For
example, enter 125 for a 1.25 slope. Enter 0 for AUTO.
IMON Offset
IMON Offset is dened in 1/1000 increments and uses the BIOS VR
mailbox command 0x4. For example, enter 25,348 for a 25.348 offset.
Range is 0-63999.
IMON Prex
This feature sets the IMON offset value to a positive or negative number. The options are + and -.
VR Current Limit
This feature sets the Voltage Regulator current limit. The value represents the maximum instantaneous current allowed at any given time.
The value is represented in 1/4A (Ampere) increments. A value of 400
equals 100A. Set this number to 0 for Auto. This uses the BIOS VR
mailbox command 0x6.
VR Voltage Limit
This feature sets the Voltage Regulator voltage limit. The value is
represented in mV. A value of 1250 equals 1.25V. Set this number to
0 for Auto. This uses the BIOS VR mailbox command 0x6.
TDC Enable
Enable or Disables TDC (Thermal Design Current). The options are
Enabled and Disabled.
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TDC Current Limit
The TDC Current Limit is dened in 1/8A (Amperes) increments and
uses the BIOS mailbox command 0x1A. A value of 1000 equals 125A.
Range is 0-32767. Enter 0 for 0 Amps.
TDC Time Window
The TDC Time Window is dened in milliseconds. Range is 1-8ms and
10ms. Note that 9ms has no valid encoding in the MSR denition. The
options are 1ms, 2ms, 3ms, 4ms, 5ms, 6ms, 7ms, 8ms and 10ms.
TDC Lock
Use this feature to enable or disable TDC Lock. The options are Enabled and Disabled.
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4-4 Memory
The following information are be displayed in this section:
• Memory RC Version
• Memory Frequency
• Memory Timings (tCL-tRCD-tRP-tRAS)
• DIMM#A1 ~ DIMM#B2
Maximum Memory Frequency
This option selects the type/speed of the memory installed. The options
are 1333, 1600, 1867, 2133, 2400, 2667, 2933, and 3200. All values
are in MHz. Default speed is auto detected.
Memory Scrambler
This feature enables or disables memory scrambler support for memory
error correction. The settings are Enabled and Disabled.
Force ColdReset
Use this feature when ColdBoot is required during MRC execution. The
settings are Enabled and Disabled.
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Channel A DIMM Control
This feature enables or disables the selected Channel A DIMM slot(s).
The settings are Enable Both DIMMs, Disable DIMM0, Disable DIMM1
and Disable Both DIMMs.
Channel B DIMM Control
This feature enables or disables the selected Channel B DIMM slot(s).
The settings are Enable Both DIMMs, Disable DIMM0, Disable DIMM1
and Disable Both DIMMs.
Force Single Rank
When enabled, only Rank0 will be use in each DIMM. The settings are
Disabled andEnabled.
Memory Remap
PCI memory resources will overlap with the total physical memory if 4GB
of memory or above is installed on the motherboard. When this occurs,
Enable this function to reallocate the overlapped physical memory to a
location above the total physical memory to resolve the memory overlapping situation. The options are Enabled and Disabled.
Mrc Fast Boot
This feature enables or disables fast path through MRC. The settings are
Enabled and Disabled.
Memory OverClocking
The stored values for Default, Custom, XMP1 and XMP2 memory proles
in that particular order will be displayed in these elds.
• tCK (MHz)
• tCL
• tRCD/tRP
• tRAS
• tCWL
• tFAW
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Supermicro C7Z270-CG-L Motherboard User’s Manual
• tREF1
• tRFC
• tRRD
• tRTP
• tWR
• tWTR
• NMode
• VDD [mV]
Memory Prole
Use this feature to set Performance Memory Proles which may cause
impact on memory behavior. The options are Default Prole, Custom
Prole, XMP Prole 1 and XMP Prole 2.
If Default is selected, the installed memory will run at 2200MHz if the
detected memory is rated at 2400MHz or above, and run at 1867MHz if
the memory detected is rated at 1867MHz.
Memory Reference Clock
This option selects the Memory Clock ratio. The options are 133MHz,
100MHz, and Auto.
QCLK Odd Ratio
This option enables or disables the quadrature clock odd ratio. The
options are Disabled, and Enabled.
Memory Frequency
This option selects the type/speed of the memory installed. The options are Auto, DDR4-1067MHz, DDR4-1333MHz, DDR4-1600MHz,
DDR4-1867MHz, DDR4-2133MHz, DDR4-2400MHz, DDR4-2667MHz,
DDR4-2933 and DDR4-3200MHz. Default speed is auto detected.
Memory Voltage
This option selects the Memory Voltage The options are Default, 1.20V,
If Custom Prole is selected for the "Memory Prole" feature, the
following options appear:
tCL
This option congures the Cas Latency Range. Enter a number
between 4-18. The default is 15.
tRCD/tRP
This option selects the Ras Precharge Range and Row to Col Delay
Range. Enter a number between 1-38. The default is 15.
tRAS
This option selects the Ras Active Time. Enter a number between
1-586. The default is 36.
Minimum CAS Write Latency Time (tCWL)
This option selects the Minimum CAS Write Latency Time. Enter a
numeric value. The default is 8.
tFAW
This option selects the Minimum Four Activate Window Delay Time.
Enter a numeric value between 1-586. The default is 23.
Maximum tREFI Time (tREFI)
This option congures the Maximum tREFI Time (Average Periodic
Refrech Interval). Enter a numeric value. The default is 6240.
tRFC
This option selects the Minimum Refresh Recovery Delay Time. Enter
a number between 1-9363. The default is 278.
tRRD
This option selects the Minimum Row Active To Row Active Delay
Time. Enter a number between 1-38. The default is 4.
tRTP
This option congures the Internal Read to Precharge Command
Delay Time. Enter a number between 1-38. The default is 8.
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Supermicro C7Z270-CG-L Motherboard User’s Manual
tWR
This option congures the Minimum Write Recovery Time. Enter a
number between 1-38. The default is 16.
tWTR
This option congures the Minimum Internal Write to Read Command Delay Time. Enter a number between 1-38. The default is 0.
NMode
Use this feature to congure the system command rate. The range
is 0-2. Enter 0 for auto, 1 for 1N, and 2 for 2N.
3rd Timing:
tRPab_ext
This option congures the tRPab_ext. Enter a numeric value. The
default is 0.
tRDPRE
This option congures the tRDPRE. Enter a numeric value. The
default is 8.
tWRPRE
This option congures the tWRPRE. Enter a numeric value. The
default is 34.
tRRD_sg
This option congures the tRRD_sg. Enter a numeric value. The
default is 6.
tRRD_dg
This option congures the tRRD_dg. Enter a numeric value. The
default is 4.
derating ext
This option congures the derating_ext. Enter a numeric value.
The default is 2.
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Chapter 4: AMI BIOS
ODT_read_duration
This option congures the ODT Read Duration. Enter a numeric
value. The default is 0.
ODT_Read_Delay
This option congures the ODT Read Delay. Enter a numeric value.
The default is 1.
ODT_write_duration
This option congures the ODT Write Duration. Enter a numeric
value. The default is 0.
ODT_Write_Delay
This option congures the ODT Write Delay. Enter a numeric value.
The default is 0.
Write_Early_ODT
This option congures the Write Early ODT. Enter a numeric value.
The default is 0.
tAONPD
This option congures the tAONPD. The default is 10.
ODT_Always_Rank0
This option congures the ODT Always Rank0. Enter a numeric
value. The default is 0.
tRDRD_sg
This option congures the between module read to read delay
(tRDRD_sg). Enter a numeric value. The default is 6.
tRDRD_dg
This option congures the between module read to read delay
(tRDRD_dg). Enter a numeric value. The default is 4.
tRDRD_dr
This option congures the between module read to read delay
(tRDRD_dr). Enter a numeric value. The default is 6.
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Supermicro C7Z270-CG-L Motherboard User’s Manual
tRDRD_dd
This option congures the between module read to read delay
(tRDRD_dd). Enter a numeric value. The default is 7.
tRDWR_sg
This option congures the between module read to write delay
(tRDWR_sg). Enter a numeric value. The default is 6.
tRDWR_dg
This option congures the between module read to write delay
(tRDWR_dg). Enter a numeric value. The default is 4.
tRDWR_dr
This option congures the between module read to write delay
(tRDWR_dr). Enter a numeric value. The default is 7.
tRDWR_dd
This option congures the between module read to write delay
(tRDWR_dd). Enter a numeric value. The default is 7.
tWRRD_sg
This option congures the between module read to write delay
(tWRRD_sg). Enter a numeric value. The default is 28.
tWRRD_dg
This option congures the between module read to write delay
(tWRRD_dg). Enter a numeric value. The default is 23.
tWRRD_dr
This option congures the between module read to write delay
(tWRRD_dr). Enter a numeric value. The default is 6.
tWRRD_dd
This option congures the between module read to write delay
(tWRRD_dd). Enter a numeric value. The default is 6.
tRWRW_sg
This option congures the between module read to write delay
(tWRWR_sg). Enter a numeric value. The default is 6.
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Chapter 4: AMI BIOS
tRWRW_dg
This option congures the between module read to write delay
(tWRWR_dg). Enter a numeric value. The default is 4.
tRWRW_dr
This option congures the between module read to write delay
(tWRWR_dr). Enter a numeric value. The default is 7.
tRWRW_dd
This option congures the between module read to write delay
(tWRWR_dd). Enter a numeric value. The default is 7.
tXP
This option congures tXP. Enter a numeric value. The default is 7.
tXPDLL
This option congures tXPDLL. Enter a numeric value. The default
is 26.
tPRPDEN
This option congures tPRPDEN. Enter a numeric value. The default
is 2.
tRDPDEN
This option congures tRDPDEN. Enter a numeric value. The default
is 20.
tWRPDEN
This option congures tWRPDEN. Enter a numeric value. The default is 34.
DIIBwEn[0]
This option congures DIIBwEn[0]. Enter a numeric value. The
default is 0.
DIIBwEn[1]
This option congures DIIBwEn[1]. Enter a numeric value. The
default is 1.
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Supermicro C7Z270-CG-L Motherboard User’s Manual
DIIBwEn[2]
This option congures DIIBwEn[2]. Enter a numeric value. The
default is 2.
DIIBwEn[3]
This option congures DIIBwEn[3]. Enter a numeric value. The
default is 2.
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Chapter 4: AMI BIOS
4-5 Advanced
Boot Feature
Quiet Boot
Use this feature to select the screen display between the POST messages
and the OEM logo upon bootup. Uncheck the box to display the POST
messages. Check the box to display the OEM logo instead of the normal
POST messages.
Bootup Num-Lock
Use this feature to set the Power-on state for the <Numlock> key. The
options are Off and On.
Wait for "F1" If Error
Use this feature to force the system to wait until the 'F1' key is pressed
if an error occurs. The options are Disabled and Enabled.
Re-try Boot
If this item is enabled, the BIOS will automatically reboot the system
from a specied boot device after its initial boot failure. The options are
Disabled, Legacy Boot, and EFI Boot.
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Supermicro C7Z270-CG-L Motherboard User’s Manual
Watch Dog Function
If enabled, the Watch Dog Timer will allow the system to reset or generate NMI based on jumper settings when it is expired for more than
5 minutes. The options are Disabled and Enabled.
Power Button Function
This feature controls how the system shuts down when the power button is pressed. Select 4 Seconds Override for the user to power off the
system after pressing and holding the power button for 4 seconds or
longer. Select Instant Off to instantly power off the system as soon as
the user presses the power button. The options are Instant Off and 4
Seconds Override.
AC Loss Policy Depend On
Use this feature to set the power state after a power outage. Select
Stay Off for the system power to remain off after a power loss. Select Power On for the system power to be turned on after a power
loss. Select Last State to allow the system to resume its last power
state before a power loss. The options are Stay Off, Power On,
and Last State.
EuP Support
EuP, or Energy Using Product, is a European energy-saving specication that sets a standard on the maximum total power consumption on
electrical products. Check the box to activate EUP support. The default
is Unchecked (Disabled).
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