The information in this User’s Manual has been carefully reviewed and is believed to be accurate. The
vendor assumes no responsibility for any inaccuracies that may be contained in this document, makes
no commitment to update or to keep current the information in this manual, or to notify any person
or organization of the updates. Please Note: For the most up-to-date version of this manual,
please see our web site at www.supermicro.com.
Super Micro Computer, Inc. ("Supermicro") reserves the right to make changes to the product described in this manual at any time and without notice. This product, including software and documentation, is the property of Supermicro and/or its licensors, and is supplied only under a license. Any use or
reproduction of this product is not allowed, except as expressly permitted by the terms of said license.
IN NO EVENT WILL SUPERMICRO BE LIABLE FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, SPECULATIVE OR CONSEQUENTIAL DAMAGES ARISING FROM THE USE OR INABILITY
TO USE THIS PRODUCT OR DOCUMENTATION, EVEN IF ADVISED OF THE POSSIBILITY OF
SUCH DAMAGES. IN PARTICULAR, SUPERMICRO SHALL NOT HAVE LIABILITY FOR ANY
HARDWARE, SOFTWARE, OR DATA STORED OR USED WITH THE PRODUCT, INCLUDING THE
COSTS OF REPAIRING, REPLACING, INTEGRATING, INSTALLING OR RECOVERING SUCH
HARDWARE, SOFTWARE, OR DATA.
Any disputes arising between manufacturer and customer shall be governed by the laws of Santa
Clara County in the State of California, USA. The State of California, County of Santa Clara shall be
the exclusive venue for the resolution of any such disputes. Super Micro's total liability for all claims
will not exceed the price paid for the hardware product.
FCC Statement: This equipment has been tested and found to comply with the limits for a class B
digital device, pursuant to Part 15 of the FCC Rules. These limits are designed to provide reasonable
protection against harmful interference in a residential installation. This equipment generates, uses,
and can radiate radio frequency energy and, if not installed and used in accordance with the instructions, may cause harmful interference to radio communications. However, there is no guarantee that
interference will not occur in a particular installation. If this equipment does cause harmful interference to radio or television reception, which can be determined by turning the equipment off and on,
the user is encouraged to try to correct the interference by one or more of the following measures:
• Reorient or relocate the receiving antenna.
• Increase the separation between the equipment and receiver.
• Connect the equipment to an outlet on a circuit different from that to which the
receiver is connected.
• Consult the authorized dealer or an experienced radio/TV technician for help.
California Best Management Practices Regulations for Perchlorate Materials: This Perchlorate warning
applies only to products containing CR (Manganese Dioxide) Lithium coin cells. “Perchlorate Materialspecial handling may apply. See www.dtsc.ca.gov/hazardouswaste/perchlorate”
WARNING: Handling of lead solder materials used
in this product may expose you to lead, a chemical known to the State of California to cause birth
defects and other reproductive harm.
Manual Revision 1.0c
Release Date: May 26, 2017
Unless you request and receive written permission from Super Micro Computer, Inc., you may not
copy any part of this document.
Information in this document is subject to change without notice. Other products and companies
referred to herein are trademarks or registered trademarks of their respective companies or mark
holders.
This manual is written for system integrators, PC technicians and
knowledgeable PC users. It provides information for the installation and
use of the C7Z170-M/C7H170-M motherboard.
Manual Organization
Chapter 1 describes the features, specications and performance of the
motherboard, and provides detailed information on the Intel Z170/H170
Express chipset.
Chapter 2 provides hardware installation instructions. Read this chapter when installing the processor, memory modules and other hardware
components into the system.
If you encounter any problems, see Chapter 3, which describes troubleshooting procedures for video, memory and system setup stored in the
CMOS.
Chapter 4 includes an introduction to the BIOS, and provides detailed
information on running the CMOS Setup utility.
Appendix A provides BIOS Error Beep Codes.
Appendix B lists software program installation instructions.
Appendix C contains UEFI BIOS Recovery instructions.
Appendix D contains an introduction and instructions regarding the Dual
Congratulations on purchasing your computer motherboard from an acknowledged leader in the industry. Supermicro boards are designed with
the utmost attention to detail to provide you with the highest standards
in quality and performance.
Please check that the following items have all been included with your
motherboard. If anything listed here is damaged or missing, contact
your retailer.
The following items are included in the retail box.
• One (1) Supermicro Motherboard
• Four (4) SATA cables
• One (1) I/O shield
• One (1) Quick Reference Guide
• One (1) Driver CD
Conventions Used in the Manual
Special attention should be given to the following symbols for proper
installation and to prevent damage done to the components or injury
to yourself:
Attention! Critical information to prevent damage to the components or injury to yourself.
Important: Important information given to ensure proper system installation or to relay safety precautions.
Note: Additional Information given to differentiate various models or provides information for correct system setup.
iv
Standardized Warning Statements
Standardized Warning Statements
The following statements are industry-standard warnings, provided to
warn the user of situations which have the potential for bodily injury.
Should you have questions or experience difculty, contact Supermicro's
Technical Support department for assistance. Only certied technicians
should attempt to install or congure components.
Read this section in its entirety before installing or conguring compo-
nents in the Supermicro chassis.
Battery Handling
Warning!
There is a danger of explosion if the battery is replaced incorrectly. Replace the battery only with the same or equivalent type recommended
by the manufacturer. Dispose of used batteries according to the manufacturer's instructions
Existe peligro de explosión si la batería se reemplaza de manera incorrecta. Reemplazar la batería exclusivamente con el mismo tipo o el
equivalente recomendado por el fabricante. Desechar las baterías gastadas según las instrucciones del fabricante.
배터리가 올바르게 교체되지 않으면 폭발의 위험이 있습니다. 기존 배터리와 동일
하거나 제조사에서 권장하는 동등한 종류의 배터리로만 교체해야 합니다. 제조사
의 안내에 따라 사용된 배터리를 처리하여 주십시오.
Waarschuwing
Er is ontplofngsgevaar indien de batterij verkeerd vervangen wordt. Vervang de batterij slechts met hetzelfde of een equivalent type die door de
fabrikant aanbevolen wordt. Gebruikte batterijen dienen overeenkomstig
fabrieksvoorschriften afgevoerd te worden.
Product Disposal
Warning!
Ultimate disposal of this product should be handled according to all national laws and regulations.
vi
Standardized Warning Statements
製品の廃棄
この製品を廃棄処分する場合、国の関係する全ての法律・条例に従い処理する必要が
ありま す。
警告
本产品的废弃处理应根据所有国家的法律和规章进行。
警告
本產品的廢棄處理應根據所有國家的法律和規章進行。
Warnung
Die Entsorgung dieses Produkts sollte gemäß allen Bestimmungen und
Gesetzen des Landes erfolgen.
¡Advertencia!
Al deshacerse por completo de este producto debe seguir todas las leyes
y reglamentos nacionales.
Attention
La mise au rebut ou le recyclage de ce produit sont généralement soumis
à des lois et/ou directives de respect de l'environnement. Renseignezvous auprès de l'organisme compétent.
Single Intel® Core i3/i5/i7 6th/7th generation processor in an LGA1151 type socket.
Memory
C7Z170-M: Four (4) slots support up to 64GB of
unbuffered, non-ECC, 3300MHz(OC) DDR4 memory
C7H170-M: Four (4) slots support up to 64GB of
unbuffered, non-ECC, 2133MHz DDR4 memory
Dual-channel memory
DIMM sizes
UDIMM4GB, 8GB, 16GB
Chipset
Expansion Slots
Intel® Z170/H170 Express
One (1) PCI-E 3.0 X16 slot
One (1) PCI-E 3.0 X4 (in X4) slot
One (1) PCI-E 3.0 X1 slot
One () PCI-E 3.0 M.2 X4 slot/connector
Network
One (1) Gigabit Ethernet Controller
Connections
One (1) RJ-45 rear I/O panel connectors with Link
and Activity LEDs
I/O DevicesSATA Connections
SATA 3.0 (6Gb/s)Six (6) I-SATA 0~5, via Intel® Z170/
H170 Express chipset
RAID 0, 1, 5, 10
USB Devices
Two (2) USB 2.0, Four (4) USB 3.0 ports on the
rear I/O panel
Two (2) front-accessible USB 2.0 ports on one
header, two (2) front accessible USB 3.0 ports on
one header and two (2) front accessible USB 3.1
ports on one header.
Keyboard/Mouse
One shared PS/2 Keyboard/Mouse port on the I/O
backpanel
Other I/O Ports
One (1) DisplayPort, One (1) DVI-D Port, One (1)
HDMI Port
One (1) Serial Port header (COM1)
1-2
Audio
One (1) High Denition Audio 7.1 channel connector
supported by Realtek ALC1150 on the back panel
One (1) Front Panel Audio Header
One (1) S/PDIF Out on the rear side of the chassis
Basic I/O System (BIOS) provides a setting for you to determine how
the system will respond when AC power is lost and then restored to
the system. You can choose for the system to remain powered off, (in
which case you must press the power switch to turn it back on), or for
it to automatically return to a power-on state. See the Advanced BIOS
Setup section to change this setting. The default setting is Last State.
1-5 PC Health Monitoring
This section describes the PC health monitoring features of the board.
All have an onboard System Hardware Monitoring chip that supports PC
health monitoring. An onboard voltage monitor will scan these onboard
voltages continuously: VCPU, 12V, VCPU_SA, 5VCC, VDIMM, VCPU_IO,
VCPU_GT, VDIMM_2.5, PCH 1.0V, 3.3V_DL, AVCC, VSB3, 3.3VCC, VBAT,
VCPU_STPLL. Once a voltage becomes unstable, a warning is given, or
an error message is sent to the screen. The user can adjust the voltage
thresholds to dene the sensitivity of the voltage monitor.
Fan Status Monitor with Firmware Control
PC health monitoring in the BIOS can check the RPM status of the cooling fans. The onboard CPU and chassis fans are controlled by Thermal
Management via SIO.
Environmental Temperature Control
The thermal control sensor monitors the CPU temperature in real time
and will turn on the thermal control fan whenever the CPU temperature
exceeds a user-dened threshold. The overheat circuitry runs independently from the CPU. Once the thermal sensor detects that the CPU
temperature is too high, it will automatically turn on the thermal fans to
prevent the CPU from overheating. The onboard chassis thermal circuitry
can monitor the overall system temperature and alert the user when the
chassis temperature is too high.
Note: To avoid possible system overheating, please be sure to
provide adequate airow to your system.
1-4
Chapter 1: Introduction
System Resource Alert
This feature is available when the system is used with SuperDoctor III in the
Windows OS environment or used with SuperDoctor II in Linux. SuperDoctor
is used to notify the user of certain system events. For example, you can also
congure SuperDoctor to provide you with warnings when the system temperature,
CPU temperatures, voltages and fan speeds go beyond predened thresholds.
1-6 ACPI Features
ACPI stands for Advanced Conguration and Power Interface. The ACPI
specication denes a exible and abstract hardware interface that
provides a standard way to integrate power management features
throughout a PC system, including its hardware, operating system and
application software. This enables the system to automatically turn on
and off peripherals such as CD-ROMs, network cards, hard disk drives
and printers.
In addition to enabling operating system-directed power management,
ACPI also provides a generic system event mechanism for Plug and Play,
and an operating system-independent interface for conguration control.
ACPI leverages the Plug and Play BIOS data structures, while providing
a processor architecture-independent implementation that is compatible
with Windows 7, Windows 8, and Windows 2008 Operating Systems.
Slow Blinking LED for Suspend-State Indicator
When the CPU goes into a suspend state, the chassis power LED will
start to blink to indicate that the CPU is in suspend mode. When the user
presses any key, the CPU will "wake up", and the LED will automatically
As with all computer products, a stable power source is necessary for
proper and reliable operation. It is even more important for processors
that have high CPU clock rates.
This motherboard accommodates 24-pin ATX power supplies. Although
most power supplies generally meet the specications required by the
CPU, some are inadequate. In addition, a 12V 4-pin power connector at
JPW3, and a 12V 8-pin power connector located at JPW2 are also required
to ensure adequate power supply to the system. Also your power supply
must supply 1.5A for the Ethernet ports.
Attention! To prevent damage to the power supply or motherboard,
please use a power supply that contains a 24-pin, 8-pin and a 4-pin
power connector. Be sure to attach these connectors to the 24-pin
(JPW1), 8-pin (JPW2), and 4-pin (JPW3) power headers on the
motherboard.
It is strongly recommended that you use a high quality power supply
that meets ATX power supply Specication 2.02 or above. It must also
be SSI compliant. (For more information, please refer to the web site
at http://www.ssiforum.org/.) Additionally, in areas where noisy power
transmission is present, you may choose to install a line lter to shield
the computer from noise. It is recommended that you also install a power
surge protector to help avoid problems caused by power surges.
1-8 Super I/O
The Super I/O supports two high-speed, 16550 compatible serial communication ports (UARTs). Each UART includes a 16-byte send/receive FIFO,
a programmable baud rate generator, complete modem control capability
and a processor interrupt system. Both UARTs provide legacy speed with
baud rate of up to 115.2 Kbps as well as an advanced speed with baud
rates of 250 K, 500 K, or 1 Mb/s, which support higher speed modems.
The Super I/O provides functions that comply with ACPI (Advanced Con-
guration and Power Interface), which includes support of legacy and
ACPI power management through an SMI or SCI function pin. It also
features auto power management to reduce power consumption.
1-6
Chapter 1: Introduction
C7Z170-M/C7H170-M Motherboard Image
Note: All graphics shown in this manual were based upon the latest
PCB Revision available at the time of publishing of the manual. The
motherboard you've received may or may not look exactly the same
as the graphics shown in this manual.
Electrostatic-Discharge (ESD) can damage electronic com ponents. To
avoid damaging your system board, it is important to handle it very
carefully. The following measures are generally sufcient to protect your
equipment from ESD.
Precautions
• Use a grounded wrist strap designed to prevent static discharge.
• Touch a grounded metal object before removing the board from the
antistatic bag.
• Handle the board by its edges only; do not touch its components,
peripheral chips, memory modules or gold contacts.
• When handling chips or modules, avoid touching their pins.
• Put the motherboard and peripherals back into their antistatic bags
when not in use.
• For grounding purposes, make sure your computer chassis provides
excellent conductivity between the power supply, the case, the mounting fasteners and the motherboard.
• Use only the correct type of onboard CMOS battery. Do not install the
onboard battery upside down to avoid possible explosion.
Unpacking
The motherboard is shipped in antistatic packaging to avoid static damage. When unpacking the board, make sure that the person handling it
is static protected.
2-2
Chapter 2: Installation
2-3 Processor and Heatsink Installation
Attention! When handling the processor package, avoid placing
direct pressure on the label area of the fan.
Important:
Always connect the power cord last, and always remove it before
adding, removing or changing any hardware components. Make
sure that you install the processor into the CPU socket before
you install the CPU heatsink.
If you buy a CPU separately, make sure that you use an Intel-
certied multi-directional heatsink only.
Make sure to install the system board into the chassis before
you install the CPU heatsink.
When receiving a server board without a processor pre-installed,
make sure that the plastic CPU socket cap is in place and none
of the socket pins are bent; otherwise, contact your retailer
immediately.
Refer to the Supermicro website for updates on CPU support.
Installing the LGA1151 Processor
1. Press the load lever to release the load plate, which covers the CPU
socket, from its locking position.
2. Gently lift the load lever to open the load plate. Remove the plastic cap.
3. Use your thumb and your index nger to hold the CPU at the North
center edge and the South center edge of the CPU.
North Center Edge
South Center Edge
4. Align the CPU key that is the semi-circle cutouts against the socket
keys. Once it is aligned, carefully lower the CPU straight down into
the socket. Do not drop the CPU on the socket. Do not move the
CPU horizontally or vertically.
2-4
Chapter 2: Installation
5. Do not rub the CPU against the surface or against any pins of the
socket to avoid damaging the CPU or the socket.
6. With the CPU inside the socket, inspect the four corners of the CPU
to make sure that the CPU is properly installed.
7. Use your thumb to gently push the load lever down to the lever
lock.
CPU properly
installed
Load lever locked
into place
Attention! You can only install the CPU inside the socket only in one
direction. Make sure that it is properly inserted into the CPU socket
before closing the load plate. If it doesn't close properly, do not force
it as it may damage your CPU. Instead, open the load plate again and
double-check that the CPU is aligned properly.
1. Locate the CPU Fan power connector on the motherboard.
(Refer to the layout on the
right for the CPU Fan location.)
2. Position the heatsink so that
the heatsink fan wires are closest to the CPU fan power connector and are not interfered
with other components.
3. Inspect the CPU Fan wires to
make sure that the wires are
routed through the bottom of
the heatsink.
4. Remove the thin layer of the
protective lm from the heatsink.
Attention! CPU overheating may
occur if the protective lm is not
removed from the heatsink.
Thermal Grease
Heatsink
Fins
5. Apply the proper amount of
thermal grease on the CPU.
Note: if your heatsink came with
a thermal pad, please ignore this
step.
6. If necessary, rearrange the
wires to make sure that the
wires are not pinched between
the heatsink and the CPU. Also
make sure to keep clearance
Recommended Supermicro
heatsink:
SNK-P0046A4 active heatsink
2-6
between the fan wires and
the ns of the heatsink.
7. Align the four heatsink
fasteners with the mounting
holes on the motherboard.
Gently push the pairs of
diagonal fasteners (#1 &
#2, and #3 & #4) into the
mounting holes until you
hear a click. Also, make sure
to orient each fastener so
that the narrow end of the
groove is pointing outward.
8. Repeat Step 7 to insert all
four heatsink fasteners into
the mounting holes.
9. Once all four fasteners are
securely inserted into the
mounting holes, and the
heatsink is properly installed
on the motherboard, connect
the heatsink fan wires to the
CPU Fan connector.
Attention! We do not recommend
that the CPU or the heatsink be
removed. However, if you do need
to remove the heatsink, please
follow the instructions below to remove the heatsink and to prevent
damage done to the CPU or other
components.
Active Heatsink Removal
1. Unplug the power cord from the
power supply.
2. Disconnect the heatsink fan wires
from the CPU fan header.
3. Use your nger tips to gently
press on the fastener cap and
turn it counterclockwise to make
a 1/4 (900) turn, and pull the
fastener upward to loosen it.
Unplug the
PWR cord
4. Repeat Step 3 to loosen all fasteners from the mounting holes.
5. With all fasteners loosened, remove the heatsink from the CPU.
2-8
Pull Up
Chapter 2: Installation
JTPM1
+
1
JPUSB1
JHD_AC1:Audio AC97 and HD audio jumper
3 PIN POWER LED
JLED1:
LEDLED
LED
X
JF1
ON
2-4 Installing DDR4 Memory
Note: Check the Supermicro website for recommended memory
modules.
Attention! Exercise extreme care when installing or removing
DIMM modules to prevent any possible damage.
DIMM Installation
1. Insert the desired number of
DIMMs into the memory slots,
starting with DIMMA2 (see the
next page for the location). For
the system to work properly,
please use the memory modules
of the same type and speed in
the same motherboard.
2. Push the release tabs outwards
on both ends of the DIMM slot
to unlock it.
3. Align the key of the DIMM mod-
ule with the receptive point on the
memory slot.
4. Align the notches on both ends of
the module against the receptive
points on the ends of the slot.
5. Use two thumbs together to press
the notches on both ends of the
module straight down into the slot
until the module snaps into place.
JAUDIO1
DESIGNED IN USA
REV:1.00
C7Z170-M
MH2
USB 6/7(3.0)
AUDIO FP
JHD_AC1
SPEAKER:1-4
JD1:
BUZZER:3-4
JD1
JPCIE1
PCH SLOT1 PCI-E 3.0 X1
USB 8/9(3.1)
19
1
JPUSB2
USB 2/3
7
COM1
2-3:ME MANUFACTURING MODE
1-2:NORMAL
JPME2:
JPME2
1
JWD1
JWD1:
2-3:NMI
1-2:RST
WATCH DOG
3
PWR
RST
CMOS CLEAR
JBT1
OH/FF
NIC2
2-3:BIOS RECOVERY
1-2:NORMAL
JBR1:
NIC1
HDDPWR
5V STBY POWER
JSTBY1
JLED1
LED1
JBR1
S1
JI2C2
JI2C1
JF1
JI2C1/JI2C2
ON:ENABLE
OFF:DISABLE
JTBT1
JTPM1:TPM/PORT80
SATA DOM PWR
JSD1:
I-SATA4
I-SATA2
I-SATA3
I-SATA5
HD AUDIO
MH1
JPAC1
JSPDIF_OUT
JPAC1:AUDIO
1-2:ENABLE
JUSBLAN1
2-3:DISABLE
MH12
JPCIE2
PCH SLOT2 PCI-E 3.0 X4
JPW3
CPU SLOT3 PCI-E 3.0 X16
FAN5
JL1:
JPUSB2:USB 8/9 WAKE UP
CHASSIS INTRUSION
1-2 ENABLE
2-3 DISABLE
JL1
LED2
C
A
M.2 PCI-E X4
BT1
+
USB 10/11(3.0)
JUSB30_I4
JPW1
1
I-SATA0
FAN3
I-SATA1
LAN
USB 4/5(3.0)
ALWAYS POPULATE RED SOCKET FIRST
UNB NON-ECC DDR4 DIMM REQUIRED
DVI
S/PDIF OUT
KB/MOUSE
USB 0/1
HDMI/DP
FAN4
JPL1
JPL1
LAN
1-2
ENABLE
2-3
DISABLE
JPW2
JPUSB1:USB0/1 WAKE UP
1-2 ENABLE
2-3 DISABLE
MAC CODE
CPU
BAR CODE
FAN1
/CPU FAN
TP104
TP103
TP100
DIMMA1
DIMMA2
DIMMB1
DIMMB2
CLEAR CMOS
S8
BIOS Restore
S11
Power Button
JSMB2
FAN2
S4
JSMB1
Notches
6. Press the release tabs to the lock
Release Tabs
positions to secure the DIMM module into the slot.
Removing Memory Modules
Press both notches
straight down into
the memory slot.
Reverse the steps above to remove the
DIMM modules from the motherboard.
The C7Z170-M/C7H170-M supports up to 64GB of Unbuffered (UDIMM)
non-ECC DDR4 memory, in four 288-pin memory slots. Populating these
DIMM modules with a pair of memory modules of the same type and
same size will result in interleaved memory, which will improve memory
performance. The C7Z170-M supports memory speeds of up to 3300MHz
(OC) while the C7H170-M supports up to 2133MHz.
Notes
Be sure to use memory modules of the same type, same speed,
same frequency on the same motherboard. Mixing of memory
modules of different types and speeds is not allowed.
Due to memory allocation to system devices, the amount of
memory that remains available for operational use will be reduced when 4 GB of RAM is used. The reduction in memory
availability is disproportional. See the following table for details.
For Microsoft Windows users: Microsoft implemented a design
change in the Windows XP with Service Pack 2 (SP2) and Win-
dows Vista. This change is specic to the behavior of Physical
Address Extension (PAE) mode which improves driver compatibility. For more information, please read the following article at
Microsoft’s Knowledge Base website at: http://support.microsoft.
com/kb/888137.
2-10
Chapter 2: Installation
Possible System Memory Allocation & Availability
System DeviceSizePhysical Memory
Firmware Hub ash memory (System BIOS)1 MB3.99
Local APIC4 KB3.99
Area Reserved for the chipset2 MB3.99
I/O APIC (4 Kbytes)4 KB3.99
PCI Enumeration Area 1256 MB3.76
PCI Express (256 MB)256 MB3.51
PCI Enumeration Area 2 (if needed) -Aligned on 256-MB
boundary-
VGA Memory16 MB2.85
TSEG1 MB2.84
Memory available to OS and other applications 2.84
512 MB3.01
Remaining (-Available)
(4 GB Total System
Memory)
Memory Population Guidelines
When installing memory modules, the DIMM slots should be populated in
the following order: DIMMA2, DIMMB2, then DIMMA1, DIMMB1.
• Always use DDR4 DIMM modules of the same size, type and speed.
• Mixed DIMM speeds may be installed. However, all DIMMs will run at
the speed of the slowest DIMM.
All motherboards have standard mounting holes to t different types of
chassis. Make sure that the locations of all the mounting holes for both
motherboard and chassis match. Although a chassis may have both plastic and metal mounting fasteners, metal ones are highly recommended
because they ground the motherboard to the chassis. Make sure that
the metal standoffs click in or are screwed in tightly. Use a screwdriver
to secure the motherboard onto the motherboard tray.
Tools Needed
Philips Screwdriver
(1)
Philips Screws (8)
Location of Mounting Holes
JAUDIO1
DESIGNED IN USA
REV:1.00
C7Z170-M
AUDIO FP
MH1
JHD_AC1
SPEAKER:1-4
JD1:
BUZZER:3-4
JD1
JPCIE2
JPCIE1
PCH SLOT2 PCI-E 3.0 X4
PCH SLOT1 PCI-E 3.0 X1
USB 8/9(3.1)
19
1
JPUSB2
USB 2/3
7
COM1
2-3:ME MANUFACTURING MODE
1-2:NORMAL
JPME2:
JPME2
1
JWD1
JWD1:
2-3:NMI
1-2:RST
WATCH DOG
3
JF1
PWR
ON
RST
CMOS CLEAR
JBT1
X
OH/FF
LED
NIC2
2-3:BIOS RECOVERY
1-2:NORMAL
JBR1:
NIC1
HDD PWR
5V STBY POWER
LEDLED
JSTBY1
JLED1
LED1
JBR1
S1
JI2C2
JI2C1
JF1
JTPM1
JI2C1/JI2C2
ON:ENABLE
OFF:DISABLE
JTBT1
JTPM1:TPM/PORT80
SATA DOM PWR
JSD1:
I-SATA4
I-SATA0
I-SATA2
I-SATA3
I-SATA5
MH2
JPAC1
JSPDIF_OUT
JPAC1:AUDIO
1-2:ENABLE
2-3:DISABLE
MH12
CPU SLOT3 PCI-E 3.0 X16
JL1:
JPUSB2:USB 8/9 WAKE UP
CHASSIS INTRUSION
1-2 ENABLE
2-3 DISABLE
JL1
LED2
C
A
M.2 PCI-E X4
BT1
+
USB 10/11(3.0)
JUSB30_I4
1
FAN3
I-SATA1
HD AUDIO
FAN5
Standoffs (8)
Only if Needed
LAN
USB 4/5(3.0)
JUSBLAN1
ALWAYS POPULATE RED SOCKET FIRST
UNB NON-ECC DDR4 DIMM REQUIRED
S/PDIF OUT
HDMI/DP
CPU
USB 6/7(3.0)
JPW3
JPW1
DVI
KB/MOUSE
USB 0/1
JPUSB1
JPL1
JPL1
LAN
1-2
ENABLE
2-3
DISABLE
FAN4
JPW2
JPUSB1:USB0/1 WAKE UP
1-2 ENABLE
2-3 DISABLE
MAC CODE
BAR CODE
FAN1
/CPU FAN
TP104
TP103
TP100
DIMMA1
DIMMA2
DIMMB1
DIMMB2
CLEAR CMOS
S8
BIOS Restore
S11
Power Button
JSMB2
FAN2
S4
JSMB1
Attention! 1) To avoid damaging the motherboard and its components, please do not use a force greater than 8 lb/inch on each mounting screw during motherboard installation. 2) Some components are
very close to the mounting holes. Please take precautionary measures
to avoid damaging these components when installing the motherboard
to the chassis.
2-12
Chapter 2: Installation
Installing the Motherboard
1. Install the I/O shield into the back of the chassis.
2. Locate the mounting holes on the motherboard. (See the previous
page.)
3. Locate the matching mounting holes on the chassis. Align the
mounting holes on the motherboard against the mounting holes on
the chassis.
4. Install standoffs in the chassis as needed.
5. Install the motherboard into the chassis carefully to avoid damaging
other motherboard components.
6. Using the Phillips screwdriver, insert a Phillips head #6 screw into a
mounting hole on the motherboard and its matching mounting hole
on the chassis.
7. Repeat Step 5 to insert #6 screws into all mounting holes.
8. Make sure that the motherboard is securely placed in the chassis.
Note: Images displayed are for illustration only. Your chassis
or components might look different from those shown in this
manual.
ALWAYS POPULATE RED SOCKET FIRST
UNB NON-ECC DDR4 DIMM REQUIRED
E
S/PDIF OUT
HDMI/DP
CPU
DVI
KB/MOUSE
USB 0/1
JPL1
JPL1
LAN
1-2
ENABLE
2-3
DISABLE
FAN4
JPW2
JPUSB1:USB0/1 WAKE UP
1-2 ENABLE
2-3 DISABLE
MAC CODE
BAR CODE
FAN1
/CPU FAN
TP104
TP103
TP100
DIMMA1
DIMMA2
DIMMB1
DIMMB2
CLEAR CMOS
S8
BIOS Restore
S11
Power Button
JSMB2
FAN2
S4
JSMB1
A
B
DESIGNED IN USA
REV:1.00
C7Z170-M
AUDIO FP
JHD_AC1:Audio AC97 and HD audio jumper
MH1
JHD_AC1
SPEAKER:1-4
JD1:
BUZZER:3-4
JD1
+
1
G
1
7
H
1
3
JF1
PWR
ON
RST
X
OH/FF
LED
NIC2
NIC1
HDD PWR
LEDLED
JF1
JTPM1
I
JLED1:
JTPM1:TPM/PORT80
3 PIN POWER LED
JPCIE2
JPCIE1
PCH SLOT2 PCI-E 3.0 X4
PCH SLOT1 PCI-E 3.0 X1
USB 8/9(3.1)
19
JPUSB2
USB 2/3
COM1
2-3:ME MANUFACTURING MODE
1-2:NORMAL
JPME2:
JPME2
JWD1
JWD1:
2-3:NMI
1-2:RST
WATCH DOG
CMOS CLEAR
JBT1
2-3:BIOS RECOVERY
1-2:NORMAL
JBR1:
5V STBY POWER
JSTBY1
JLED1
LED1
JBR1
S1
JI2C2
JI2C1
JI2C1/JI2C2
ON:ENABLE
OFF:DISABLE
JTBT1
SATA DOM PWR
JSD1:
I-SATA4
I-SATA2
I-SATA3
I-SATA5
MH2
JPAC1
JSPDIF_OUT
JPAC1:AUDIO
1-2:ENABLE
2-3:DISABLE
MH12
CPU SLOT3 PCI-E 3.0 X16
JL1:
JPUSB2:USB 8/9 WAKE UP
CHASSIS INTRUSION
1-2 ENABLE
2-3 DISABLE
JL1
M.2 PCI-E X4
USB 10/11(3.0)
JUSB30_I4
I-SATA0
FAN3
I-SATA1
C
D
JAUDIO1
USB 6/7(3.0)
HD AUDIO
JPW3
FAN5
LED2
C
A
BT1
+
JPW1
1
2-16
Chapter 2: Installation
F
Ethernet Port
One Gigabit Ethernet port (LAN) is located next to the S/PDIF port on the
I/O Backpanel to provide network connections. This port will accept RJ45 type
cables.
Note: Please refer to the LED Indica-
tor Section for LAN LED information.
Back Panel High Denition Audio
(HD Audio)
This motherboard features a 7.1+2
Channel High Denition Audio (HDA) codec that provides 10 DAC channels. The
HD Audio connections simultaneously
supports multiple-streaming 7.1 sound
playback with 2 channels of independent
stereo output through the front panel
stereo out for front, rear, center and
subwoofer speakers. Use the Advanced
software included in the CD-ROM with
your motherboard to enable this function.
A S/PDIF port is located next to the DVI-D port on the I/O backpanel.
Use this port to connect to a compatible S/PDIF optical audio device.
VESA® DisplayPort™
DisplayPort, developed by the VESA consortium, delivers digital display
at a fast refresh rate. It can connect to virtually any display device using
a DisplayPort adapter for devices such as VGA, DVI, or HDMI.
HDMI Port
One HDMI (High-Denition Multimedia Interface) is located on the I/O
backpanel. This connector is used to display both high denition video
and digital sound through an HDMI capable display, using a single HDMI
cable (not included).
DVI-D Port
A DVI-D port is located on the I/O backpanel. Use this port to connect
to a compatible DVI (Digital Visual Interface) display.
A. S/PDIF Port
B. HDMI Port
C. VESA Display Port
D. DVI-D
A
D
B
C
2-18
+
1
JPUSB1
JHD_AC1:Audio AC97 and HD audio jumper
3 PIN POWER LED
JLED1:
X
OH/Fan Fail
1516
Chapter 2: Installation
Front Control Panel
JF1 contains header pins for various buttons and indicators that are
normally located on a control panel at the front of the chassis. These
connectors are designed specically for use with Supermicro chassis. See
the gure below for the descriptions of the front control panel buttons
and LED indicators. Refer to the following section for descriptions and
pins 15 and 16 of JF1. Refer to the table
on the right for pin denitions.
HDD LED
The HDD LED connection is located on
pins 13 and 14 of JF1. Attach a cable
here to indicate the status of HDDrelated activities, including IDE, SATA
activities. See the table on the right for
pin denitions.
NIC1 (LAN)
The NIC (Network Interface Controller)
LED connection for LAN port 1 is located
on pins 11 and 12 of JF1. Attach an LED
indicator to this header to display network activity. Refer to the table on the
right for pin denitions.
Overheat (OH)/Fan Fail
Connect an LED cable to OH/Fan Fail
connections on pins 7 and 8 of JF1 to
provide warnings for chassis overheat/
fan failure. Refer to the table on the right
for pin denitions.
Power LED
Pin Denitions (JF1)
Pin# Denition
15VCC
16Ground
HDD LED
Pin Denitions (JF1)
Pin# Denition
13VCC
14HD Active
LAN LED
Pin Denitions (JF1)
Pin# Denition
11Vcc
12Ground
OH/Fan Fail LED
Pin Denitions (JF1)
Pin# Denition
7VCC
8OH/Fan Fail LED
OH/Fan Fail Indicator
Status
State Denition
OffNormal
OnOverheat
Flash-
Fan Fail
ing
A
Power LED
B
HDD LED
NIC1 LED
C
X
D
LED
X
Ground
Ground
2-20
Reset
PWR
Vcc
Vcc
Vcc
X
Vcc
X
Reset Button
Power Button
A. PWR LED
B. HDD LED
C. NIC1 LED
D. OH/Fan Fail
Reset Button
OH/Fan Fail
1
2
1516
The Reset Button connection is located
on pins 3 and 4 of JF1. Attach it to a
hardware reset switch on the computer
case to reset the system. Refer to the
table on the right for pin denitions.
Chapter 2: Installation
Reset Button
Pin Denitions (JF1)
Pin# Denition
3Reset
4Ground
Power Button
The Power Button connection is located
on pins1 and 2 of JF1. Momentarily
contacting both pins will power on/off
the system. This button can also be con-
gured to function as a suspend button
(with a setting in the BIOS - see Chapter
4). To turn off the power in the suspend
mode, press the button for at least 4
seconds. Refer to the table on the right
This section provides brief descriptions and pin-out denitions for onboard headers and connectors. Be sure to use the correct cable for each
header or connector.
ATX Main PWR, CPU, AUX PWR
Connectors (JPW1, JPW2, JPW3)
The 24-pin main power connector (JPW1)
is used to provide power to the motherboard. The 8-pin CPU PWR connector
(JPW2) is also required for the processor.
JPW3 is a 4-pin connector that provides
auxiliary power to peripheral cards and
devices. These power connectors meet
the SSI EPS 12V specication. See the
tables on the right and below for pin
denitions.
12V 8-pin Power Connec-
tor Pin Denitions
Pins Denition
1 through 4Ground
5 through 8+12V
C7Z170-M
AUDIO FP
JHD_AC1:Audio AC97 and HD audio jumper
MH1
JHD_AC1
SPEAKER:1-4
JD1:
BUZZER:3-4
JD1
JPCIE1
+
PCH SLOT2 PCI-E 3.0 X4
PCH SLOT1 PCI-E 3.0 X1
USB 8/9(3.1)
19
1
1
JPUSB2
USB 2/3
7
COM1
2-3:ME MANUFACTURING MODE
1-2:NORMAL
JPME2:
JPME2
1
JWD1
JWD1:
2-3:NMI
1-2:RST
WATCH DOG
3
JF1
PWR
ON
RST
CMOS CLEAR
JBT1
X
OH/FF
LED
NIC2
2-3:BIOS RECOVERY
1-2:NORMAL
JBR1:
NIC1
HDD PWR
5V STBY POWER
LEDLED
JSTBY1
JLED1
LED1
JBR1
S1
JI2C2
JI2C1
JF1
JTPM1
JI2C1/JI2C2
ON:ENABLE
OFF:DISABLE
JTBT1
JLED1:
JTPM1:TPM/PORT80
3 PIN POWER LED
SATA DOM PWR
JSD1:
I-SATA4
I-SATA2
I-SATA3
I-SATA5
12V 4-pin Power Connec-
Pins Denition
1 through 2Ground
3 through 4+12V
DESIGNED IN USA
REV:1.00
MH2
JPAC1
JSPDIF_OUT
JPAC1:AUDIO
1-2:ENABLE
2-3:DISABLE
MH12
JPCIE2
CPU SLOT3 PCI-E 3.0 X16
JL1:
JPUSB2:USB 8/9 WAKE UP
CHASSIS INTRUSION
1-2 ENABLE
2-3 DISABLE
JL1
M.2 PCI-E X4
USB 10/11(3.0)
JUSB30_I4
I-SATA0
FAN3
I-SATA1
tor Pin Denitions
JAUDIO1
USB 6/7(3.0)
HD AUDIO
JPW3
FAN5
C
LED2
C
A
BT1
+
A
JPW1
1
LAN
USB 4/5(3.0)
JUSBLAN1
ALWAYS POPULATE RED SOCKET FIRST
UNB NON-ECC DDR4 DIMM REQUIRED
S/PDIF OUT
HDMI/DP
CPU
ATX Power 24-pin Connector
Pin Denitions (JPW1)
Pin# Denition Pin # Denition
13+3.3V1+3.3V
14-12V2+3.3V
15Ground3Ground
16PS_ON4+5V
17Ground5Ground
18Ground6+5V
19Ground7Ground
20Res (NC)8PWR_OK
21+5V95VSB
22+5V10+12V
23+5V11+12V
24Ground12+3.3V
A. 24-Pin ATX Main PWR
B. 8-Pin PWR
C. 4-Pin Auxiliary PWR
DVI
KB/MOUSE
USB 0/1
FAN4
JPL1
JPL1
LAN
1-2
ENABLE
2-3
DISABLE
JPW2
B
1-2 ENABLE
2-3 DISABLE
MAC CODE
BAR CODE
FAN1
/CPU FAN
TP104
TP103
TP100
DIMMA1
DIMMA2
DIMMB1
DIMMB2
CLEAR CMOS
S8
BIOS Restore
S11
Power Button
JSMB2
FAN2
S4
JSMB1
2-22
Chapter 2: Installation
+
1
JHD_AC1:Audio AC97 and HD audio jumper
3 PIN POWER LED
JLED1:
X
F
Fan Headers (Fan 1 ~ Fan 5)
The C7Z170-M/C7H170-M has ve fan
headers (Fan 1~Fan 5). These fans are
4-pin fan headers. Although pins 1-3 of
the fan headers are backward compatible with the traditional 3-pin fans, we
recommend the use 4-pin fans to take
advantage of the fan speed control. This
allows the fan speeds to be automatically
adjusted based on the motherboard temperature. Refer to the table on the right
for pin denitions.
Chassis Intrusion (JL1)
A Chassis Intrusion header is located at
JL1 on the motherboard. Attach the appropriate cable from the chassis to inform
you of a chassis intrusion when the chassis
is opened.
C7Z170-M
AUDIO FP
MH1
JHD_AC1
SPEAKER:1-4
JD1:
BUZZER:3-4
JD1
1
7
1
3
JF1
PWR
ON
RST
OH/FF
LED
NIC2
NIC1
HDD PWR
LEDLED
JF1
JTPM1
JTPM1:TPM/PORT80
19
JPUSB2
CMOS CLEAR
2-3:BIOS RECOVERY
1-2:NORMAL
JBR1:
USB 8/9(3.1)
USB 2/3
COM1
JWD1
2-3:NMI
1-2:RST
WATCH DOG
JBT1
5V STBY POWER
JSTBY1
JLED1
I-SATA4
I-SATA5
JPCIE2
JPCIE1
PCH SLOT2 PCI-E 3.0 X4
PCH SLOT1 PCI-E 3.0 X1
2-3:ME MANUFACTURING MODE
1-2:NORMAL
JPME2:
JPME2
JWD1:
LED1
JBR1
S1
JI2C2
JI2C1
JI2C1/JI2C2
ON:ENABLE
OFF:DISABLE
JTBT1
SATA DOM PWR
JSD1:
I-SATA0
I-SATA2
I-SATA1
I-SATA3
MH2
HD AUDIO
JPAC1
JSPDIF_OUT
JPAC1:AUDIO
1-2:ENABLE
2-3:DISABLE
MH12
M.2 PCI-E X4
JPW3
FAN5
E
LED2
C
A
BT1
+
1
CPU SLOT3 PCI-E 3.0 X16
JL1:
JPUSB2:USB 8/9 WAKE UP
CHASSIS INTRUSION
1-2 ENABLE
2-3 DISABLE
JL1
USB 10/11(3.0)
JUSB30_I4
FAN3
LAN
USB 6/7(3.0)
USB 4/5(3.0)
JUSBLAN1
ALWAYS POPULATE RED SOCKET FIRST
UNB NON-ECC DDR4 DIMM REQUIRED
The internal Buzzer (SP1) can be used
to provide audible indications for various
beep codes. See the table on the right
for pin denitions.
Speaker (JD1)
On the JD1 header, Pins 3~4 are used
for internal speaker. Close Pins 3~4 with
a cap to use the onboard speaker. If you
wish to use an external speaker, close
Pins 1~4 with a cable. See the table on
the right for pin denitions.
JAUDIO1
DESIGNED IN USA
REV:1.00
C7Z170-M
AUDIO FP
MH1
JHD_AC1
SPEAKER:1-4
JD1:
BUZZER:3-4
JD1
B
A
19
1
JPUSB2
7
1
3
JF1
PWR
ON
RST
CMOS CLEAR
OH/FF
LED
NIC2
2-3:BIOS RECOVERY
1-2:NORMAL
NIC1
HDD PWR
LEDLED
JF1
JTPM1
JTPM1:TPM/PORT80
USB 8/9(3.1)
USB 2/3
COM1
JWD1
2-3:NMI
1-2:RST
JBT1
JBR1:
5V STBY POWER
JSTBY1
JLED1
I-SATA4
I-SATA5
JPCIE2
JPCIE1
PCH SLOT2 PCI-E 3.0 X4
PCH SLOT1 PCI-E 3.0 X1
JPUSB2:USB 8/9 WAKE UP
1-2 ENABLE
2-3 DISABLE
2-3:ME MANUFACTURING MODE
1-2:NORMAL
JPME2:
JPME2
JWD1:
WATCH DOG
LED1
JBR1
S1
JI2C2
JI2C1
JI2C1/JI2C2
ON:ENABLE
OFF:DISABLE
JTBT1
SATA DOM PWR
JSD1:
I-SATA0
I-SATA2
I-SATA1
I-SATA3
JL1
JL1:
CHASSIS INTRUSION
JSPDIF_OUT
CPU SLOT3 PCI-E 3.0 X16
USB 10/11(3.0)
FAN3
MH2
JPAC1
JPAC1:AUDIO
1-2:ENABLE
2-3:DISABLE
MH12
M.2 PCI-E X4
USB 6/7(3.0)
HD AUDIO
JPW3
FAN5
LED2
C
A
BT1
+
JUSB30_I4
JPW1
1
Internal Buzzer
Pin Denition
Pin# Denitions
Pin 1Pos. (+) Beep In
Pin 2Neg. (-)Alarm
Speaker Connector
Pin Denitions
Pin Setting Denition
Pins 3~4Internal Speaker
Pins1~4External Speaker
A. Internal Buzzer
B. Speaker Header
LAN
USB 4/5(3.0)
JUSBLAN1
CPU
ALWAYS POPULATE RED SOCKET FIRST
UNB NON-ECC DDR4 DIMM REQUIRED
S/PDIF OUT
HDMI/DP
DVI
JPL1
JPL1
LAN
1-2
ENABLE
2-3
DISABLE
TP104
TP103
TP100
DIMMA1
DIMMA2
DIMMB1
DIMMB2
Power Button
JSMB2
JSMB1
Speaker
JPW2
FAN1
/CPU FAN
CLEAR CMOS
BIOS Restore
FAN2
S4
S8
S11
KB/MOUSE
USB 0/1
FAN4
JPUSB1:USB0/1 WAKE UP
1-2 ENABLE
2-3 DISABLE
MAC CODE
BAR CODE
2-24
Chapter 2: Installation
+
1
JPUSB1
JHD_AC1:Audio AC97 and HD audio jumper
3 PIN POWER LED
JLED1:
X
Onboard Power LED (JLED1)
An onboard Power LED header is located
at JLED1. This Power LED header is connected to Front Control Panel located
at JF1 to indicate the status of system
power. See the table on the right for pin
denitions.
Serial Port (COM1)
There is one serial (COM) port header on
the motherboard. COM1is located next to
the USB 2/3 header. See the table on the
right for pin denitions.
JAUDIO1
DESIGNED IN USA
REV:1.00
C7Z170-M
AUDIO FP
MH1
JHD_AC1
SPEAKER:1-4
JD1:
BUZZER:3-4
JD1
19
1
JPUSB2
7
B
1
3
JF1
PWR
ON
RST
CMOS CLEAR
OH/FF
LED
NIC2
2-3:BIOS RECOVERY
1-2:NORMAL
NIC1
HDD PWR
LEDLED
JF1
JTPM1
JTPM1:TPM/PORT80
USB 8/9(3.1)
USB 2/3
COM1
JWD1
2-3:NMI
1-2:RST
WATCH DOG
JBT1
JBR1:
5V STBY POWER
JSTBY1
JLED1
A
I-SATA4
I-SATA5
JPCIE2
JPCIE1
PCH SLOT2 PCI-E 3.0 X4
PCH SLOT1 PCI-E 3.0 X1
1-2 ENABLE
2-3 DISABLE
2-3:ME MANUFACTURING MODE
1-2:NORMAL
JPME2:
JPME2
JWD1:
LED1
JBR1
S1
JI2C2
JI2C1
JI2C1/JI2C2
ON:ENABLE
OFF:DISABLE
JTBT1
SATA DOM PWR
JSD1:
I-SATA0
I-SATA2
I-SATA1
I-SATA3
MH2
HD AUDIO
JPAC1
JSPDIF_OUT
JPAC1:AUDIO
1-2:ENABLE
2-3:DISABLE
MH12
M.2 PCI-E X4
JPW3
FAN5
LED2
C
A
BT1
+
JPW1
1
CPU SLOT3 PCI-E 3.0 X16
JL1:
JPUSB2:USB 8/9 WAKE UP
CHASSIS INTRUSION
JL1
USB 10/11(3.0)
JUSB30_I4
FAN3
USB 6/7(3.0)
LAN
USB 4/5(3.0)
JUSBLAN1
ALWAYS POPULATE RED SOCKET FIRST
UNB NON-ECC DDR4 DIMM REQUIRED
The Disk-On-Module (DOM) power connector, located at JSD1, provides 5V
(Gen1/Gen) power to a solid state DOM
storage device connected to one of the
SATA ports. See the table on the right
for pin denitions.
SPDIF OUT (JSPDIF_OUT)
The SPDIF Out (JSPDIF_OUT) is used for
digital audio output. You will also need
the appropriate cable to use this feature.
JAUDIO1
DESIGNED IN USA
REV:1.00
JHD_AC1:Audio AC97 and HD audio jumper
JD1
+
1
1
7
1
3
JF1
PWR
ON
RST
X
OH/FF
LED
NIC2
NIC1
HDD PWR
LEDLED
JF1
JTPM1
JLED1:
JTPM1:TPM/PORT80
3 PIN POWER LED
19
JPUSB2
CMOS CLEAR
2-3:BIOS RECOVERY
AUDIO FP
JHD_AC1
JD1:
USB 8/9(3.1)
USB 2/3
COM1
JWD1
2-3:NMI
1-2:RST
JBT1
1-2:NORMAL
JBR1:
5V STBY POWER
JSTBY1
JLED1
I-SATA4
I-SATA5
C7Z170-M
MH1
SPEAKER:1-4
BUZZER:3-4
JPCIE2
JPCIE1
PCH SLOT2 PCI-E 3.0 X4
PCH SLOT1 PCI-E 3.0 X1
JPUSB2:USB 8/9 WAKE UP
1-2 ENABLE
2-3 DISABLE
2-3:ME MANUFACTURING MODE
1-2:NORMAL
JPME2:
JPME2
JWD1:
WATCH DOG
JL1
B
JL1:
CHASSIS INTRUSION
JPAC1
JSPDIF_OUT
CPU SLOT3 PCI-E 3.0 X16
MH2
JPAC1:AUDIO
1-2:ENABLE
2-3:DISABLE
MH12
M.2 PCI-E X4
HD AUDIO
JPW3
FAN5
LED2
C
A
BT1
+
LED1
JBR1
S1
JI2C2
JI2C1
JI2C1/JI2C2
ON:ENABLE
OFF:DISABLE
JTBT1
USB 10/11(3.0)
I-SATA0
I-SATA1
JUSB30_I4
A
FAN3
JPW1
1
JSD1:
SATA DOM PWR
I-SATA2
I-SATA3
USB 6/7(3.0)
LAN
USB 4/5(3.0)
JUSBLAN1
ALWAYS POPULATE RED SOCKET FIRST
UNB NON-ECC DDR4 DIMM REQUIRED
Pin Denitions
Pin# Denition
15V
2Ground
3Ground
SPDIF_OUT
Pin Denitions
Pin# Denition
1S/PDIF_Out
2Ground
A.DOM PWR
B. S/PDIF OUt
S/PDIF OUT
HDMI/DP
JPL1
LAN
1-2
ENABLE
2-3
DISABLE
CPU
TP104
TP103
TP100
DOM PWR
DVI
JPL1
DIMMA1
DIMMA2
DIMMB1
DIMMB2
JSMB2
JSMB1
FAN1
/CPU FAN
CLEAR CMOS
BIOS Restore
Power Button
S4
JPW2
FAN2
KB/MOUSE
FAN4
S8
S11
USB 0/1
JPUSB1
JPUSB1:USB0/1 WAKE UP
1-2 ENABLE
2-3 DISABLE
MAC CODE
BAR CODE
2-26
Chapter 2: Installation
+
1
JPUSB1
JHD_AC1:Audio AC97 and HD audio jumper
3 PIN POWER LED
JLED1:
X
Standby Power Header (JSTBY1)
The Standby Power header is located at
JSTBY1 on the motherboard. See the
table on the right for pin denitions.
PCI-E M.2 Connector (PCI-E M.2)
The PCI-E M.2 connector is for devices such as memory cards, wireless
adapters, etc. These devices must
conform to the PCIE M.2 specications (formerly known as NGFF). This
particular PCIe M.2 supports M-Key
(PCIe3.0 x4) storage card only.
JAUDIO1
DESIGNED IN USA
REV:1.00
C7Z170-M
AUDIO FP
MH1
JHD_AC1
SPEAKER:1-4
JD1:
BUZZER:3-4
JD1
19
1
JPUSB2
7
1
3
JF1
PWR
ON
RST
CMOS CLEAR
OH/FF
LED
NIC2
2-3:BIOS RECOVERY
NIC1
HDD PWR
LEDLED
A
JF1
JTPM1
JTPM1:TPM/PORT80
USB 8/9(3.1)
USB 2/3
JWD1
JBT1
1-2:NORMAL
JBR1:
JLED1
JPCIE2
JPCIE1
PCH SLOT2 PCI-E 3.0 X4
PCH SLOT1 PCI-E 3.0 X1
1-2 ENABLE
2-3 DISABLE
COM1
2-3:ME MANUFACTURING MODE
1-2:NORMAL
JPME2:
JPME2
JWD1:
2-3:NMI
1-2:RST
WATCH DOG
5V STBY POWER
JSTBY1
LED1
JBR1
S1
JI2C2
JI2C1
JI2C1/JI2C2
ON:ENABLE
OFF:DISABLE
JTBT1
SATA DOM PWR
JSD1:
I-SATA4
I-SATA5
I-SATA0
I-SATA2
I-SATA1
I-SATA3
MH2
JPAC1
JSPDIF_OUT
JPAC1:AUDIO
1-2:ENABLE
2-3:DISABLE
MH12
CPU SLOT3 PCI-E 3.0 X16
JL1:
JPUSB2:USB 8/9 WAKE UP
CHASSIS INTRUSION
JL1
M.2 PCI-E X4
USB 6/7(3.0)
HD AUDIO
JPW3
FAN5
LED2
C
A
B
BT1
+
USB 10/11(3.0)
JUSB30_I4
FAN3
JPW1
1
LAN
USB 4/5(3.0)
JUSBLAN1
ALWAYS POPULATE RED SOCKET FIRST
UNB NON-ECC DDR4 DIMM REQUIRED
A 10-pin Audio header is supported on
the motherboard. This header allows you
to connect the motherboard to a front
panel audio control panel, if needed.
Connect an audio cable to the audio
header to use this feature (not supplied).
See the table at right for pin denitions
for the header.
TPM Header/Port 80 Header
A Trusted Platform Module/Port 80
header is located at JTPM1 to provide
TPM support and Port 80 connection.
Use this header to enhance system
performance and data security.
JAUDIO1
DESIGNED IN USA
REV:1.00
C7Z170-M
AUDIO FP
A
1
7
1
JF1
ON
RST
LED
NIC2
NIC1
LEDLED
JTPM1
B
MH1
JHD_AC1
SPEAKER:1-4
JD1:
BUZZER:3-4
JD1
19
JPUSB2
3
PWR
CMOS CLEAR
OH/FF
2-3:BIOS RECOVERY
1-2:NORMAL
HDD PWR
JF1
JTPM1:TPM/PORT80
USB 8/9(3.1)
USB 2/3
COM1
JWD1
2-3:NMI
1-2:RST
WATCH DOG
JBT1
JBR1:
5V STBY POWER
JSTBY1
JLED1
I-SATA4
I-SATA5
JPCIE2
JPCIE1
PCH SLOT2 PCI-E 3.0 X4
PCH SLOT1 PCI-E 3.0 X1
1-2 ENABLE
2-3 DISABLE
2-3:ME MANUFACTURING MODE
1-2:NORMAL
JPME2:
JPME2
JWD1:
LED1
JBR1
S1
JI2C2
JI2C1
JI2C1/JI2C2
ON:ENABLE
OFF:DISABLE
JTBT1
SATA DOM PWR
JSD1:
I-SATA0
I-SATA2
I-SATA1
I-SATA3
MH2
HD AUDIO
JPAC1
JSPDIF_OUT
JPAC1:AUDIO
1-2:ENABLE
2-3:DISABLE
MH12
CPU SLOT3 PCI-E 3.0 X16
JL1:
JPUSB2:USB 8/9 WAKE UP
CHASSIS INTRUSION
JL1
M.2 PCI-E X4
USB 10/11(3.0)
JUSB30_I4
FAN3
JPW3
FAN5
LED2
C
A
BT1
+
JPW1
1
USB 6/7(3.0)
LAN
USB 4/5(3.0)
JUSBLAN1
ALWAYS POPULATE RED SOCKET FIRST
UNB NON-ECC DDR4 DIMM REQUIRED
10-in Audio
Pin Denitions
Pin# Signal
1Microphone_Left
2Audio_Ground
3Microphone_Right
4Audio_Detect
5Line_2_Right
6Ground
7Jack_Detect
8Key
9Line_2_Left
10Ground
A. AUDIO FP
B. TPM/Port 80
S/PDIF OUT
HDMI/DP
CPU
DVI
KB/MOUSE
USB 0/1
JPUSB1
JPL1
JPL1
LAN
1-2
ENABLE
2-3
DISABLE
FAN4
JPW2
JPUSB1:USB0/1 WAKE UP
1-2 ENABLE
2-3 DISABLE
MAC CODE
BAR CODE
FAN1
/CPU FAN
TP104
TP103
TP100
DIMMA1
DIMMA2
DIMMB1
DIMMB2
CLEAR CMOS
S8
BIOS Restore
S11
Power Button
JSMB2
FAN2
S4
JSMB1
2-28
2-8 Jumper Settings
+
1
JHD_AC1:Audio AC97 and HD audio jumper
3 PIN POWER LED
JLED1:
Explanation of Jumpers
To modify the operation of the motherboard, jumpers can be used to choose
between optional settings. Jumpers
create shorts between two pins to
change the function of the connector.
Pin 1 is identied with a square solder
pad on the printed circuit board.
Note: On two pin jumpers, "Closed"
means the jumper is on, and "Open"
means the jumper is off the pins.
Chapter 2: Installation
LAN Enable/Disable
Jumper JPL1 will enable or disable the
LAN port on the motherboard. See the
table on the right for jumper settings.
The default setting is enabled.
JAUDIO1
DESIGNED IN USA
REV:1.00
C7Z170-M
AUDIO FP
MH1
JHD_AC1
SPEAKER:1-4
JD1:
BUZZER:3-4
JD1
JPCIE2
JPCIE1
PCH SLOT2 PCI-E 3.0 X4
PCH SLOT1 PCI-E 3.0 X1
USB 8/9(3.1)
19
1
JPUSB2
USB 2/3
7
COM1
2-3:ME MANUFACTURING MODE
1-2:NORMAL
JPME2:
JPME2
1
JWD1
JWD1:
2-3:NMI
1-2:RST
WATCH DOG
3
JF1
PWR
ON
RST
CMOS CLEAR
JBT1
X
OH/FF
LED
NIC2
2-3:BIOS RECOVERY
1-2:NORMAL
JBR1:
NIC1
HDD PWR
5V STBY POWER
LEDLED
JSTBY1
JLED1
LED1
JBR1
S1
JI2C2
JI2C1
JF1
JTPM1
JI2C1/JI2C2
ON:ENABLE
OFF:DISABLE
JTBT1
JTPM1:TPM/PORT80
SATA DOM PWR
JSD1:
I-SATA4
I-SATA2
I-SATA3
I-SATA5
MH2
HD AUDIO
JPAC1
JSPDIF_OUT
JPAC1:AUDIO
1-2:ENABLE
2-3:DISABLE
MH12
M.2 PCI-E X4
JPW3
FAN5
LED2
C
A
BT1
+
1
CPU SLOT3 PCI-E 3.0 X16
JL1:
JPUSB2:USB 8/9 WAKE UP
CHASSIS INTRUSION
1-2 ENABLE
2-3 DISABLE
JL1
USB 10/11(3.0)
JUSB30_I4
I-SATA0
FAN3
I-SATA1
LAN
USB 6/7(3.0)
USB 4/5(3.0)
JUSBLAN1
ALWAYS POPULATE RED SOCKET FIRST
UNB NON-ECC DDR4 DIMM REQUIRED
Clear CMOS and JBT1 are used to clear the saved system setup con-
guration stored in the CMOS chip. To clear the contents of the CMOS
using JBT1, short the two pads of JBT1 with metallic conductor such as
a athead screwdriver. Clear CMOS works the same way but is a push
button switch. This will erase all user settings and revert everything to
their factory-set defaults.
PCI Slot SMB Enable (I2C1/I2C2)
Use Jumpers I2C1/I2C2 to enable PCI
SMB (System Management Bus) support
to improve system management for the
PCI slots. See the table on the right for
jumper settings.
JAUDIO1
DESIGNED IN USA
REV:1.00
C7Z170-M
AUDIO FP
MH1
JHD_AC1
SPEAKER:1-4
JD1:
BUZZER:3-4
JD1
USB 8/9(3.1)
19
1
JPUSB2
USB 2/3
7
1
3
JF1
PWR
ON
RST
CMOS CLEAR
X
OH/FF
LED
NIC2
2-3:BIOS RECOVERY
1-2:NORMAL
JBR1:
NIC1
HDD PWR
LEDLED
JF1
JTPM1
C
JTPM1:TPM/PORT80
JWD1
2-3:NMI
JBT1
JLED1
I-SATA5
COM1
1-2:RST
5V STBY POWER
JSTBY1
I-SATA4
JPCIE2
JPCIE1
PCH SLOT2 PCI-E 3.0 X4
PCH SLOT1 PCI-E 3.0 X1
JPUSB2:USB 8/9 WAKE UP
1-2 ENABLE
2-3 DISABLE
2-3:ME MANUFACTURING MODE
1-2:NORMAL
JPME2:
JPME2
JWD1:
WATCH DOG
A
LED1
JBR1
S1
JI2C2
JI2C1
D
JI2C1/JI2C2
ON:ENABLE
OFF:DISABLE
JTBT1
SATA DOM PWR
JSD1:
I-SATA0
I-SATA2
I-SATA1
I-SATA3
JL1:
CHASSIS INTRUSION
JL1
JPAC1
JSPDIF_OUT
CPU SLOT3 PCI-E 3.0 X16
USB 10/11(3.0)
JUSB30_I4
FAN3
MH2
JPAC1:AUDIO
1-2:ENABLE
2-3:DISABLE
MH12
M.2 PCI-E X4
HD AUDIO
JPW3
FAN5
LED2
C
A
BT1
+
JPW1
1
USB 6/7(3.0)
LAN
USB 4/5(3.0)
JUSBLAN1
ALWAYS POPULATE RED SOCKET FIRST
UNB NON-ECC DDR4 DIMM REQUIRED
PCI Slot_SMB Enable
Jumper Settings
Jumper Setting Denition
Short (Default)Enabled
OpenDisabled
A. JBT1
B. Clear CMOS
C. JI2C1
D. JI2C2
JPL1
1-2
2-3
DVI
JPL1
LAN
ENABLE
DISABLE
TP104
TP103
TP100
JPW2
FAN1
/CPU FAN
DIMMA1
DIMMA2
DIMMB1
DIMMB2
CLEAR CMOS
BIOS Restore
Power Button
JSMB2
FAN2
S4
JSMB1
S/PDIF OUT
HDMI/DP
CPU
KB/MOUSE
S8
S11
USB 0/1
FAN4
JPUSB1:USB0/1 WAKE UP
1-2 ENABLE
2-3 DISABLE
MAC CODE
BAR CODE
B
2-30
Chapter 2: Installation
JPUSB1
Audio Enable (JPAC1)
JPAC1 allows you to enable or disable the
onboard audio support. The default position is on pins 1 and 2 to enable onboard
audio connections. See the table on the
right for jumper settings.
Manufacturing Mode (JPME2)
Close Pin 2 and Pin 3 of Jumper JPME2
to bypass SPI ash security and force
the system to operate in Manufactur-
ing Mode, allowing the user to ash the
system rmware from a host server for
system setting modications. See the
table on the right for jumper settings.
JAUDIO1
DESIGNED IN USA
REV:1.00
C7Z170-M
AUDIO FP
JHD_AC1:Audio AC97 and HD audio jumper
JD1
+
19
1
1
JPUSB2
7
1
B
3
JF1
PWR
ON
RST
CMOS CLEAR
X
OH/FF
LED
NIC2
2-3:BIOS RECOVERY
1-2:NORMAL
NIC1
HDD PWR
LEDLED
JF1
JTPM1
JLED1:
JTPM1:TPM/PORT80
3 PIN POWER LED
JHD_AC1
SPEAKER:1-4
JD1:
BUZZER:3-4
USB 8/9(3.1)
USB 2/3
COM1
JPME2
JWD1
JWD1:
2-3:NMI
1-2:RST
WATCH DOG
JBT1
JBR1:
5V STBY POWER
JSTBY1
JLED1
S1
I-SATA4
I-SATA5
LED1
2-3:ME MANUFACTURING MODE
1-2:NORMAL
JSD1:
JPCIE1
JPME2:
JBR1
JI2C2
JI2C1
JTBT1
PCH SLOT1 PCI-E 3.0 X1
JI2C1/JI2C2
ON:ENABLE
OFF:DISABLE
SATA DOM PWR
I-SATA2
I-SATA3
MH1
JPCIE2
PCH SLOT2 PCI-E 3.0 X4
I-SATA0
I-SATA1
JL1:
JPUSB2:USB 8/9 WAKE UP
CHASSIS INTRUSION
1-2 ENABLE
2-3 DISABLE
JL1
JPAC1
JSPDIF_OUT
A
CPU SLOT3 PCI-E 3.0 X16
USB 10/11(3.0)
JUSB30_I4
FAN3
MH2
JPAC1:AUDIO
1-2:ENABLE
2-3:DISABLE
MH12
M.2 PCI-E X4
USB 6/7(3.0)
HD AUDIO
JPW3
FAN5
LED2
C
A
BT1
+
JPW1
1
LAN
USB 4/5(3.0)
JUSBLAN1
CPU
ALWAYS POPULATE RED SOCKET FIRST
UNB NON-ECC DDR4 DIMM REQUIRED
Use jumper JPUSB to activate the "wakeup" function of the USB ports by pressing a key on a USB keyboard or clicking
the USB mouse connected. This jumper
is used together with a USB Wake-Up
Jumper Setting Denition
Pins 1-2Enabled (Default)
Pins 2-3 Disabled
feature in the BIOS. Enable this jumper
and the USB support in the BIOS to wake
up your system via USB devices. JPUSB1
controls USB 2.0 ports #0/1 on the back
panel, while JPUSB2 controls USB 3.1
ports #8/9 (header) on the motherboard.
Watch Dog Enable/Disable
Watch Dog (JWD1) is a system monitor that can reboot the system when a
software application hangs. Close Pins
1-2 to reset the system if an application hangs. Close Pins 2-3 to generate
a non-maskable interrupt signal for the
application that hangs. See the table on
the right for jumper settings.
JAUDIO1
DESIGNED IN USA
REV:1.00
C7Z170-M
AUDIO FP
MH1
JHD_AC1
SPEAKER:1-4
JD1:
BUZZER:3-4
JD1
19
1
JPUSB2
B
7
1
C
3
JF1
PWR
ON
RST
CMOS CLEAR
OH/FF
NIC2
2-3:BIOS RECOVERY
1-2:NORMAL
NIC1
HDD PWR
LEDLED
JF1
JTPM1
JTPM1:TPM/PORT80
USB 8/9(3.1)
USB 2/3
COM1
JWD1
2-3:NMI
1-2:RST
WATCH DOG
JBT1
JBR1:
5V STBY POWER
JSTBY1
JLED1
I-SATA4
I-SATA5
JPCIE2
JPCIE1
PCH SLOT2 PCI-E 3.0 X4
PCH SLOT1 PCI-E 3.0 X1
1-2 ENABLE
2-3 DISABLE
2-3:ME MANUFACTURING MODE
1-2:NORMAL
JPME2:
JPME2
JWD1:
LED1
JBR1
S1
JI2C2
JI2C1
JI2C1/JI2C2
ON:ENABLE
OFF:DISABLE
JTBT1
SATA DOM PWR
JSD1:
I-SATA0
I-SATA2
I-SATA1
I-SATA3
MH2
HD AUDIO
JPAC1
JSPDIF_OUT
JPAC1:AUDIO
1-2:ENABLE
2-3:DISABLE
MH12
CPU SLOT3 PCI-E 3.0 X16
JL1:
JPUSB2:USB 8/9 WAKE UP
CHASSIS INTRUSION
JL1
M.2 PCI-E X4
USB 10/11(3.0)
JUSB30_I4
FAN3
JPW3
FAN5
LED2
C
A
BT1
+
JPW1
1
USB 6/7(3.0)
2-32
LAN
USB 4/5(3.0)
JUSBLAN1
CPU
ALWAYS POPULATE RED SOCKET FIRST
UNB NON-ECC DDR4 DIMM REQUIRED
S/PDIF OUT
HDMI/DP
USB Wake-Up
Jumper Settings
Watch Dog
Jumper Settings
Jumper Setting Denition
Pins 1-2Reset (default)
Pins 2-3NMI
OpenDisabled
A. JPUSB1
B. JPUSB2
C. Watch Dog Enable
DVI
KB/MOUSE
USB 0/1
JPL1
JPL1
LAN
1-2
ENABLE
2-3
DISABLE
TP104
TP103
TP100
FAN4
A
JPW2
JPUSB1:USB0/1 WAKE UP
1-2 ENABLE
2-3 DISABLE
MAC CODE
BAR CODE
FAN1
/CPU FAN
DIMMA1
DIMMA2
DIMMB1
DIMMB2
CLEAR CMOS
S8
BIOS Restore
S11
Power Button
JSMB2
FAN2
S4
JSMB1
Chapter 2: Installation
BIOS Recovery Switch (JBR1)
The BIOS Recovery Switch (JBR1) is used
to enable or disable the BIOS Recovery
feature of the motherboard. Slide the
switch from the default position to begin
the recovery process. See Appendix D
for details.
Power Button (POWER BUTTON)
In addition to the soft power switch
provided in JF1, your motherboard is
equipped with a 'soft' power button on
the motherboard. This switch works the
same way as the soft power switch on
JF1.
BIOS Restore (BIOS RESTORE)
When pressed, the BIOS Restore Button
will look for, and load a le named 'SUPER.ROM' from an installed USB memory
device, in any of the USB ports. It will
then proceed to update the BIOS. Do
Emitting Diode). The yellow LED indicates activity, while the Link LED may
be green, amber, or off to indicate
the speed of the connections. See the
tables at right for more information.
LAN
Link LED
Activity LED
Onboard Power LED (LED1)
An Onboard Power LED is located at
LED1 on the motherboard. When LED1
is on, the AC power cable is connected.
Make sure to disconnect the power cable
before removing or installing any component. See the layout below for the LED
location.
C7Z170-M
AUDIO FP
MH1
JHD_AC1
SPEAKER:1-4
JD1:
BUZZER:3-4
JD1
JPCIE1
PCH SLOT2 PCI-E 3.0 X4
PCH SLOT1 PCI-E 3.0 X1
USB 8/9(3.1)
19
1
JPUSB2
USB 2/3
7
COM1
2-3:ME MANUFACTURING MODE
1-2:NORMAL
JPME2:
JPME2
1
JWD1
JWD1:
2-3:NMI
1-2:RST
WATCH DOG
3
JF1
PWR
ON
RST
CMOS CLEAR
JBT1
OH/FF
LED
NIC2
2-3:BIOS RECOVERY
1-2:NORMAL
JBR1:
NIC1
HDD PWR
5V STBY POWER
LEDLED
JSTBY1
JLED1
LED1
JBR1
S1
B
JI2C2
JI2C1
JF1
JTPM1
JI2C1/JI2C2
ON:ENABLE
OFF:DISABLE
JTBT1
JTPM1:TPM/PORT80
SATA DOM PWR
JSD1:
I-SATA4
I-SATA2
I-SATA3
I-SATA5
MH2
HD AUDIO
JPAC1
JSPDIF_OUT
JPAC1:AUDIO
1-2:ENABLE
2-3:DISABLE
MH12
JPCIE2
CPU SLOT3 PCI-E 3.0 X16
USB 10/11(3.0)
JUSB30_I4
FAN3
M.2 PCI-E X4
FAN5
LED2
C
A
BT1
+
1
JL1:
JPUSB2:USB 8/9 WAKE UP
CHASSIS INTRUSION
1-2 ENABLE
2-3 DISABLE
JL1
I-SATA0
I-SATA1
JAUDIO1
DESIGNED IN USA
REV:1.00
A
LAN
USB 4/5(3.0)
JUSBLAN1
ALWAYS POPULATE RED SOCKET FIRST
UNB NON-ECC DDR4 DIMM REQUIRED
S/PDIF OUT
HDMI/DP
JPL1
LAN
1-2
ENABLE
2-3
DISABLE
CPU
TP104
TP103
TP100
USB 6/7(3.0)
JPW3
JPW1
GLAN Activity Indicator
LED Settings
Color Status Denition
YellowFlashingActive
GLAN Link Indicator
LED Settings
LED Color Denition
OffNo Connection/10 Mbps/100
Mbps
Amber1 Gbps
Green 10 Gbps.
Onboard PWR LED Indicator
LED Status
Status Denition
OffSystem Off
OnSystem on, or
System off and PWR
Cable Connected
A. LAN LEDs
B. PWR LED
DVI
KB/MOUSE
USB 0/1
JPUSB1
FAN4
JPL1
JPW2
JPUSB1:USB0/1 WAKE UP
1-2 ENABLE
2-3 DISABLE
MAC CODE
BAR CODE
FAN1
/CPU FAN
DIMMA1
DIMMA2
DIMMB1
DIMMB2
CLEAR CMOS
S8
BIOS Restore
S11
Power Button
JSMB2
FAN2
S4
JSMB1
2-34
Chapter 2: Installation
JPUSB1
M.2 On Board (LED2)
The M.2 On Board LED is located
on LED2. When lit, this indicates
that an M.2 device is detected in
the M.2 slot of the motherboard,
and is working normally.
JAUDIO1
DESIGNED IN USA
REV:1.00
JHD_AC1:Audio AC97 and HD audio jumper
+
1
1
7
1
3
JF1
PWR
ON
RST
X
OH/FF
LED
NIC2
NIC1
HDD PWR
LEDLED
JF1
JTPM1
JLED1:
JTPM1:TPM/PORT80
3 PIN POWER LED
C7Z170-M
AUDIO FP
MH1
JHD_AC1
SPEAKER:1-4
JD1:
BUZZER:3-4
JD1
JPCIE2
JPCIE1
PCH SLOT2 PCI-E 3.0 X4
PCH SLOT1 PCI-E 3.0 X1
USB 8/9(3.1)
19
JPUSB2
USB 2/3
COM1
2-3:ME MANUFACTURING MODE
1-2:NORMAL
JPME2:
JPME2
JWD1
JWD1:
2-3:NMI
1-2:RST
WATCH DOG
CMOS CLEAR
JBT1
2-3:BIOS RECOVERY
1-2:NORMAL
JBR1:
5V STBY POWER
JSTBY1
JLED1
LED1
JBR1
S1
JI2C2
JI2C1
JI2C1/JI2C2
ON:ENABLE
OFF:DISABLE
JTBT1
SATA DOM PWR
JSD1:
I-SATA4
I-SATA0
I-SATA2
I-SATA1
I-SATA3
I-SATA5
MH2
HD AUDIO
JPAC1
JSPDIF_OUT
JPAC1:AUDIO
1-2:ENABLE
2-3:DISABLE
MH12
CPU SLOT3 PCI-E 3.0 X16
FAN5
JL1:
JPUSB2:USB 8/9 WAKE UP
CHASSIS INTRUSION
1-2 ENABLE
2-3 DISABLE
JL1
A
LED2
C
A
M.2 PCI-E X4
BT1
+
USB 10/11(3.0)
JUSB30_I4
1
FAN3
M.2 On Board
LED Settings
Color Status Denition
GreenSteadyM.2 Device
Detected
A. M.2 On Board
LAN
USB 6/7(3.0)
S/PDIF OUT
HDMI/DP
USB 4/5(3.0)
JUSBLAN1
JPW3
CPU
ALWAYS POPULATE RED SOCKET FIRST
UNB NON-ECC DDR4 DIMM REQUIRED
Six Serial ATA (SATA) 3.0 connectors (I-SATA 0~5) are supported on
the board. These I-SATA 3.0 ports are supported by the Intel Z170 PCH
chip (supports RAID 0,1,5,10). See the table below for pin denitions.
JHD_AC1:Audio AC97 and HD audio jumper
JD1
+
1
1
7
1
3
JF1
PWR
ON
RST
X
OH/FF
LED
NIC2
NIC1
HDD PWR
LEDLED
JF1
JTPM1
JLED1:
JTPM1:TPM/PORT80
3 PIN POWER LED
19
JPUSB2
2-3:BIOS RECOVERY
AUDIO FP
JHD_AC1
SPEAKER:1-4
JD1:
BUZZER:3-4
JPCIE1
USB 8/9(3.1)
USB 2/3
COM1
2-3:ME MANUFACTURING MODE
1-2:NORMAL
JPME2:
JPME2
JWD1
JWD1:
2-3:NMI
1-2:RST
WATCH DOG
CMOS CLEAR
JBT1
1-2:NORMAL
JBR1:
5V STBY POWER
JSTBY1
JLED1
LED1
S1
JI2C1
JSD1:
A
I-SATA4
I-SATA5
D
(Bottom)
SATA 2.0/3.0 Connectors
Pin Denitions
Pin# Signal
1Ground
2SATA_TXP
3SATA_TXN
4Ground
5SATA_RXN
6SATA_RXP
7Ground
REV:1.00
C7Z170-M
MH1
JPCIE2
PCH SLOT2 PCI-E 3.0 X4
PCH SLOT1 PCI-E 3.0 X1
JL1:
JPUSB2:USB 8/9 WAKE UP
CHASSIS INTRUSION
1-2 ENABLE
2-3 DISABLE
JL1
JBR1
JI2C2
JI2C1/JI2C2
ON:ENABLE
OFF:DISABLE
JTBT1
(Top)
SATA DOM PWR
B
C
I-SATA0
I-SATA2
I-SATA1
I-SATA3
E
DESIGNED IN USA
JPAC1
JSPDIF_OUT
CPU SLOT3 PCI-E 3.0 X16
USB 10/11(3.0)
JUSB30_I4
FAN3
MH2
JPAC1:AUDIO
1-2:ENABLE
2-3:DISABLE
MH12
M.2 PCI-E X4
Top
A. I-SATA 3.0 #4
B. I-SATA 3.0 #2
C. I-SATA 3.0 #0
Bottom
D. I-SATA 3.0 #5
E. I-SATA 3.0 #3
F. I-SATA 3.0 #1
JAUDIO1
HD AUDIO
JPW3
FAN5
LED2
C
A
BT1
+
JPW1
1
USB 6/7(3.0)
LAN
USB 4/5(3.0)
JUSBLAN1
ALWAYS POPULATE RED SOCKET FIRST
UNB NON-ECC DDR4 DIMM REQUIRED
S/PDIF OUT
HDMI/DP
CPU
DVI
KB/MOUSE
USB 0/1
JPUSB1
JPL1
JPL1
LAN
1-2
ENABLE
2-3
DISABLE
FAN4
JPW2
JPUSB1:USB0/1 WAKE UP
1-2 ENABLE
2-3 DISABLE
MAC CODE
BAR CODE
FAN1
/CPU FAN
TP104
TP103
TP100
DIMMA1
DIMMA2
DIMMB1
DIMMB2
CLEAR CMOS
S8
BIOS Restore
S11
Power Button
JSMB2
FAN2
S4
JSMB1
2-36
Chapter 3: Troubleshooting
Chapter 3
Troubleshooting
3-1 Troubleshooting Procedures
Use the following procedures to troubleshoot your system. If you have
followed all of the procedures below and still need assistance, refer to the
‘Technical Support Procedures’ and/or ‘Returning Merchandise for Service’
section(s) in this chapter. Always disconnect the AC power cord before
adding, changing or installing any hardware components.
Before Power On
1. Make sure that the Standby PWR LED is not on. (Note: If it is on, the
onboard power is on. Be sure to unplug the power cable before installing or
removing the components.)
2. Make sure that there are no short circuits between the motherboard and
chassis.
3. Disconnect all ribbon/wire cables from the motherboard, including those for
the keyboard and mouse. Also, be sure to remove all add-on cards.
4. Install a CPU and heatsink (-be sure that it is fully seated) and then connect
the chassis speaker and the power LED to the motherboard. Check all jumper
settings as well.
No Power
1. Make sure that there are no short circuits between the motherboard and
chassis.
2. Make sure that all jumpers are set to their default positions.
3. Check if the 115V/230V switch on the power supply is properly set.
4. Turn the power switch on and off to test the system.
5. The battery on your motherboard may be old. Check to make sure that it still
supplies ~3VDC. If it does not, replace it with a new one.
1. If the power is on, but you have no video--in this case, you will need to re-
move all the add-on cards and cables rst.
2. Use the speaker to determine if any beep codes exist. (Refer to Appendix A
for details on beep codes.)
3. Remove all memory modules and turn on the system. (If the alarm is on,
check the specications of memory modules, reset the memory or try a differ-
ent one.)
Memory Errors
1. Make sure that the DIMM modules are properly installed and fully seated in
the slots.
2. You should be using unbuffered Non-ECC DDR4 (up to 3000) MHz memory
recommended by the manufacturer. Also, it is recommended that you use the
memory modules of the same type and speed for all DIMMs in the system.
Do not use memory modules of different sizes, different speeds and different
types on the same motherboard.
3. Check for bad DIMM modules or slots by swapping modules between slots to
see if you can locate the faulty ones.
4. Check the switch of 115V/230V power supply.
When the System is Losing the Setup Configuration
1. Please be sure to use a high quality power supply. A poor quality power sup-
ply may cause the system to lose CMOS setup information. Refer to Section
1-5 for details on recommended power supplies.
2. The battery on your motherboard may be old. Check to verify that it still sup-
plies ~3VDC. If it does not, replace it with a new one.
3. If the above steps do not x the Setup Conguration problem, contact your
vendor for repairs.
3-2
Chapter 3: Troubleshooting
3-2 Technical Support Procedures
Before contacting Technical Support, please make sure that you have
followed all the steps listed below. Also, Note that as a motherboard
manufacturer, Supermicro does not sell directly to end users, so it is
best to rst check with your distributor or reseller for troubleshooting
services. They should know of any possible problem(s) with the specic
system conguration that was sold to you.
1. Please go through the ‘Troubleshooting Procedures’ and 'Frequently Asked
Question' (FAQ) sections in this chapter or see the FAQs on our website
(http://www.supermicro.com/support/faqs/) before contacting Technical Sup-
port.
2. BIOS upgrades can be downloaded from our website at http://www.supermi-
cro.com/support/bios/.
Note: Not all BIOS can be ashed. Some cannot be ashed; it
depends on the boot block code of the BIOS.
3. If you've followed the instructions above to troubleshoot your system, and still
cannot resolve the problem, then contact Supermicro's technical support and
provide them with the following information:
• Motherboard model and PCB revision number
• BIOS release date/version (this can be seen on the initial display when your
system rst boots up)
• System conguration
• An example of a Technical Support form is on our website at http://www.super-
micro.com/support/contact.cfm.
4. Distributors: For immediate assistance, please have your account number
ready when placing a call to our technical support department. We can be
reached by e-mail at support@supermicro.com, by phone at: (408) 503-
Question: What type of memory does my motherboard support?
Answer: The C7Z170-M/C7H170-M supports up to 64GB of unbuffered
Non-ECC DDR4. See Section 2-4 for details on installing memory.
Question: How do I update my BIOS?
Answer: We do NOT recommend that you upgrade your BIOS if you are
not experiencing any problems with your system. Updated BIOS les are
located on our website at http://www.supermicro.com/support/bios/.
Please check our BIOS warning message and the information on how
to update your BIOS on our web site. Select your motherboard model
and download the BIOS ROM le to your computer. Also, check the current BIOS revision to make sure that it is newer than your BIOS before
downloading. You may choose the zip le or the .exe le. If you choose
the zipped BIOS le, please unzip the BIOS le onto a bootable device
or a USB pen/thumb drive. To ash the BIOS, run the batch le named
"ami.bat" with the new BIOS ROM le from your bootable device or USB
pen/thumb drive. Use the following format:
F:\> ami.bat BIOS-ROM-lename.xxx <Enter>
Note: Always use the le named “ami.bat” to update the
BIOS, and insert a space between "ami.bat" and the lename.
The BIOS-ROM-lename will bear the motherboard name (i.e.,
C7Z170) and build version as the extension. For example,
"C7Z170.115". When completed, your system will automatically
reboot.
If you choose the .exe le, please run the .exe le under Windows to create the BIOS ash oppy disk. Insert the oppy disk
into the system you wish to ash the BIOS. Then, boot the system to the oppy disk. The BIOS utility will automatically ash
the BIOS without any prompts. Please note that this process
may take a few minutes to complete. Do not be concerned if
the screen is paused for a few minutes.
When the BIOS ashing screen is completed, the system will
reboot and will show “Press F1 or F2”. At this point, you will
need to load the BIOS defaults. Press <F1> to go to the BIOS
setup screen, and press <F9> to load the default settings. Next,
press <F10> to save and exit. The system will then reboot.
Attention! Do not shut down or reset the system while updating
the BIOS to prevent possible system boot failure!
3-4
Chapter 3: Troubleshooting
Question: I think my BIOS is corrupted. How can I recover my BIOS?
Answer: Please see Appendix C-BIOS Recovery for detailed instructions.
3-4 Battery Removal and Installation
Battery Removal
To remove the onboard battery, follow the steps below:
1. Power off your system and unplug your power cable.
2. Locate the onboard battery as shown below.
3. Using a tool such as a pen or a small screwdriver, push the battery lock out-
wards to unlock it. Once unlocked, the battery will pop out from the holder.
4. Remove the battery.
Proper Battery Disposal
Battery
Lock
Attention! Please handle used batteries carefully. Do not damage
the battery in any way; a damaged battery may release hazardous
materials into the environment. Do not discard a used battery in the
garbage or a public landll. Please comply with the regulations set
up by your local hazardous waste management agency to dispose of
your used battery properly.
1. To install an onboard battery, follow the steps 1& 2 above and continue below:
2. Identify the battery's polarity. The positive (+) side should be facing up.
3. Insert the battery into the battery holder and push it down until
you hear a click to ensure that the battery is securely locked.
Attention! When replacing a battery, be sure to only replace it with
the same type.
Battery Holder
1
This side up
2
Press down until
you hear a click.
3-5 Returning Motherboard for Service
A receipt or copy of your invoice marked with the date of purchase is
required before any warranty service will be rendered. You can obtain
service by calling your vendor for a Returned Merchandise Authorization
(RMA) number. For faster service, you may also obtain RMA authorizations online (http://www.supermicro.com/support/rma/). When you return the motherboard to the manufacturer, the RMA number should be
prominently displayed on the outside of the shipping carton, and mailed
prepaid or hand-carried. Shipping and handling charges will be applied
for all orders that must be mailed when service is complete.
This warranty only covers normal consumer use and does not cover
damages incurred in shipping or from failure due to the alteration,
misuse, abuse or improper maintenance of products.
During the warranty period, contact your distributor rst for any product problems.
3-6
Chapter 4: AMI BIOS
Chapter 4
BIOS
4-1 Introduction
This chapter describes the AMI BIOS setup utility for the C7Z170-M.
The ROM BIOS is stored in a Flash EEPROM and can be easily updated.
This chapter describes the basic navigation of the AMI BIOS setup utility
setup screens.
Note: For AMI BIOS Recovery, please refer to the UEFI BIOS Recovery Instructions in Appendix C.
Starting BIOS GUI Setup Utility
To enter the AMI BIOS GUI setup utility screens, press the <Delete> key
while the system is booting up.
Note: In most cases, the <Delete> key is used to invoke the AMI
BIOS setup screen.
Each BIOS menu option is described in this manual. The Main BIOS Setup
screen has two main areas. The left area is the Main Navigation, and the
main area is for the Information Section. Icons that do not respond when
the mouse pointer is hovering on top are not congurable.
The AMI BIOS GUI setup utility uses a mouse pointer navigation system
similar to standard graphical user interfaces. Hover and click an icon to
select a section, click a down arrow to select from an options list.
You may press the <F1> on any screen under the Setup Section to see
a list of Hot Keys that are available. Press <F12> to print the screen.
The keyboard's Escape key <ESC> cancels the current screen and will
allow you to return to the previous screen.
How To Change the Configuration Data
The conguration data that determines the system parameters may be
changed by entering the AMI BIOS GUI setup utility. This setup utility can be accessed by pressing <Del> at the appropriate time during
system boot.
Note: For the purposes of this manual, options that are printed in
Bold are default settings.
How to Start the Setup Utility
Normally, the only visible Power-On Self-Test (POST) routine is the
memory test. As the memory is being tested, press the <Delete> key to
enter the main menu of the AMI BIOS GUI setup utility. From the Setup
Home screen, you can access the other Setup Sections.
4-2
Chapter 4: AMI BIOS
4-2 System Information
The System Information Panel displays the motherboard's conguration.
The following information among others is displayed in this section:
• Motherboard Model Name - C7Z170-M.
• BIOS Version - this item displays the BIOS version number.
• Build Date and Time - displays the BIOS build date and time.
• CPU - displays the CPU type speed, stepping, etc.
• CPU Fan Data - displays sensor type, temperature, speed
System Date
Click on the date to open the setup elds. This item sets and displays the
system date. Click the up and down arrows to adjust the date.
System Time
Click on the time to open the setup elds. This item sets and displays the
system time. Click the up and down arrows to adjust the system time.
Select Enabled to allow moving of DRAM contents to PRM memory when
CPU is in C6 state. The options are Disabled and Enabled.
SW Guard Extension (SGX)
Select Enabled to activate the Software Guard Extensions (SGX). The
options are Software Controlled, Enabled, and Disabled.
Select Owner EPOCH input type
There are three Owner EPOCH modes (Each EPOCH is 64 bit). The options are No Change in Owner EPOCHs, Change to New Random Owner
EPOCHs, and Manual User Dened Owner EPOCHs.
PRMRR Size
The BIOS must reserve a contiguous region of Processor Reserved Memory (PRM) in the Processor Reserved Memory Range Register (PRMRR).
This item appears SW Guard Extensions is enabled. The options are
INVALID PRMRR, 32MB, 64MB, and 12MB.
Hardware Prefetcher
(Available when supported by the CPU)
If this item is set to Enabled, the hardware prefetcher will prefetch
streams of data and instructions from the main memory to the L2 cache
to improve CPU performance. The options are Disabled and Enabled.
Adjacent Cache Line Prefetch
(Available when supported by the CPU)
Select Enabled for the CPU to prefetch both cache lines for 128 bytes as
comprised. Select Disabled for the CPU to prefetch both cache lines for
64 bytes. The options are Disabled and Enabled.
Intel (VMX) Virtualization Technology
(Available when supported by the CPU)
Select Enabled to use the Intel Virtualization Technology to allow one
platform to run multiple operating systems and applications in independent partitions, creating multiple "virtual" systems in one physical
computer. The options are Disabled and Enabled.
Note: If there is any change to this setting, you will need to
power off and reboot the system for the change to take effect.
Please refer to Intel’s web site for detailed information.
4-6
Chapter 4: AMI BIOS
PECI
Select Enabled to activate the Platform Environment Control Interface
(PECI). The options are Disabled and Enabled.
Active Processor Cores
Use this feature to select the number of active processor cores. The
options are All, 1, 2, and 3. (These options depend on how many cores
are supported by the CPU.)
Hyper-Threading
Select Enabled to support Intel Hyper-threading Technology to enhance
CPU performance. The options are Disabled and Enabled.
BIST
Select Enabled to activate the Built-In Self Test (BIST) on reset. The
options are Disabled and Enabled.
JTAG C10 Power
Select Enabled to activate power JTAG in C10 and deeper power states.
The options are Enabled and Disabled.
AP Threads Idle Manner
Select Enabled to activate AP threads Idle Manner for waiting signal to
run. The options are HALT Loop, MWAIT Loop, and RUN Loop.
AP Threads Handoff Manner
Select Enabled to activate AP threads Idle Manner for waiting signal to
run. The options are HALT Loop and MWAIT Loop.
AES
Select Enable for Intel CPU Advanced Encryption Standard (AES) Instructions support to enhance data integrity. The options are Disabled and
Enabled.
Machine Check
Select Enable to activate Machine Check. The options are Disabled and
Enabled.
MonitorMWait
Select Enable to activate MonitorMWait. The options are Disabled and
Intel TXT (Trusted Execution Technology) helps protect against software-
based attacks and ensures protection, condentiality and integrity of data
stored or created on the system. The options are Disabled and Enabled.
* Intel Trusted Execution Technology is Enabled, the features Alias Check
Request and DPR Memory Size are available for conguration.
Alias Check Request
(Available when the TPM module is detected by the BIOS)
Use this feature to set up Alias Check Request. The options are Enabled
and Disabled.
Reset AUX Content
Use this feature to reset the TPM Auxiliary content. The options are yes
and no.
Flash Wear Out Protection
Select Enable to activate Flash Wear Out Protection. The options are
Disabled and Enabled.
Debug Interface
Select Enable to activate Debug Interface. The options are Disabled
and Enabled.
Debug Interface Lock
Select Enable to activate Debug Interface lock. The options are Disabled
and Enabled.
Processor trace memory allocation
Disable of select a value for Processor Trace memory region size. The
options are Disabled, 4KB, 8KB, 16KB, 32KB, 64KB, 128KB, 256KB,
512KB, and 1MB.
FCLK Frequency for Early Power On
Select the FCLK frequency for early power on. The options are Normal
(800MHz), 1GHz, and 400MHz.
Voltage Optimization
Select Enable to activate Voltage Optimization. The options are Disabled
and Enabled.
4-8
Chapter 4: AMI BIOS
Power and Performance
CPU - Power Management Control
Boot performance mode
This option enables the selection of the default CPU performance during
system boot. The options are Max Battery, Max Non-Turbo Perfor-
mance, and Turbo Performance.
Intel(R) SpeedStep(tm)
Intel SpeedStep Technology allows the system to automatically adjust
processor voltage and core frequency in an effort to reduce power consumption and heat dissipation. Please refer to Intel’s web site for
detailed information. The options are Disabled and Enabled.
The following information is displayed in this section:
• Max Turbo Power Limit
• Min Turbo Power Limit
• Package TDP Limit
• Power Limit 1
• Power Limit 2
• 1-core Turbo Ratio
• 2-core Turbo Ratio
• 3-core Turbo Ratio
• 4-core Turbo Ratio
Energy Efcient P-state
Select Enable to activate Energy Efcient P-State. When set to Disabled,
this feature will disable access to ENERGY_PERFORMANCE_BIAS MSR,
and CPUID Function 6 ECX[3] will read 0, indicating that there is no
support for Energy Efcient policy setting. The options are Disabled and
Enabled.
4-10
Chapter 4: AMI BIOS
Energy Efcient Turbo
Select Enabled to activate Energy Efcient Turbo. This feature will opportunistically lower the turbo frequency to increase efciency. We
recommend to leave this enabled and disable only in overclocking situations where the turbo frequency must remain constant. The options are
Disabled and Enabled.
CPU VR Settings
PSYS Slope
PSYS Slope is dened in 1/100 increments and uses the BIOS VR mailbox
command 0x9. Valid range is 0-200. For example, enter 125 for a 1.25
slope. Enter 0 for AUTO.
PSYS Offset
PSYS Offset is dened in 1/4 increments and uses the BIOS VR mailbox
command 0x9. For example, enter 100 for a 25 offset. Valid range is
0-255.
PSYS PMax Power
The value is dened in 1/8 Watt increments and uses the BIOS VR mailbox command 0xB. For example, enter 1000 for a 125 Watt PMax value.
Valid range is 0-8192. Enter 0 for AUTO.
Select Enable to help mitigate acoustic noise on certain SKUs when the
CPU is in deeper C-State. The options are Disabled and Enabled.
When the above is set to Enabled, the followings can be congured:
IA VR Domain
Disable Fast PKG C State Ramp for IA Domain
Select False to leave Fast ramp enabled during deeper C-States. Selecting True will disable Fast ramp during deeper C-States. The options
are FALSE and TRUE.
Slow Slew Rate for IA Domain
This feature sets the VR IA Slew Rate for Deep Package C-State ramp
time. Slow slew rate equals Fast divided by the number 2, 4, 8, or
16. This feature is used to help reduce acoustic noise. The options are
Fast/2, Fast/4, Fast/8, and Fast/16.
GT VR Domain
Disable Fast PKG C State Ramp for GT Domain
Select False to leave Fast ramp enabled during deeper C-States. Selecting True will disable Fast ramp during deeper C-States. The options
are FALSE and TRUE.
Slow Slew Rate for GT Domain
This feature sets the VR GT Slew Rate for Deep Package C-State ramp
time. Slow slew rate equals Fast divided by the number 2, 4, 8, or
16. This feature is used to help reduce acoustic noise. The options are
Fast/2, Fast/4, Fast/8, and Fast/16.
SA VR Domain
Disable Fast PKG C State Ramp for SA Domain
Select False to leave Fast ramp enabled during deeper C-States. Selecting True will disable Fast ramp during deeper C-States. The options
are FALSE and TRUE.
4-12
Chapter 4: AMI BIOS
Slow Slew Rate for SA Domain
This feature sets the VR SA Slew Rate for Deep Package C-State ramp
time. Slow slew rate equals Fast divided by the number 2, 4, 8, or
16. This feature is used to help reduce acoustic noise. The options are
Fast/2, Fast/4, Fast/8, and Fast/16.
Core/IA VR Settings
VR Cong Enable
Select Enable to activate VR conguration options. The options are
Disabled and Enabled.
AC Loadline
AC Loadline is dened in 1/100 mOhms and uses the BIOS mailbox
command 0x2. A value of 100 equals 1.0 mOhm, and 1255 is 12.55
mOhms. Valid range is 0-6249 (0-62.49 mOhms). Enter 0 for
AUTO.
DC Loadline
DC Loadline is dened in 1/100 mOhms and uses the BIOS mailbox
command 0x2. A value of 100 equals 1.0 mOhm, and 1255 is 12.55
mOhms. Valid range is 0-6249 (0-62.49 mOhms). Enter 0 for
AUTO.
PS Current Threshold1
The PS Current Threshold1 is dened in 1/4A (Amperes) increments
and uses the BIOS mailbox command 0x3. A value of 400 equals
100A. Range is 0-512 which translates to 0-128A. Enter 0 for
AUTO. Default is 80 for 20A.
PS Current Threshold2
The PS Current Threshold2 is dened in 1/4A (Amperes) increments
and uses the BIOS mailbox command 0x3. A value of 400 equals
100A. Range is 0-512 which translates to 0-128A. Enter 0 for
AUTO. Default is 20 for 5A.
PS Current Threshold3
The PS Current Threshold2 is dened in 1/4A (Amperes) increments
and uses the BIOS mailbox command 0x3. A value of 400 equals
100A. Range is 0-512 which translates to 0-128A. Enter 0 for
Enable or Disables PS3. Uses BIOS VR mailbox command line 0x3.
The options are Disabled and Enabled.
PS4 Enable
Enable or Disables PS4. Uses BIOS VR mailbox command line 0x3.
The options are Disabled and Enabled.
IMON Slope
IMON (Load Current Monitor) Slope is dened in 1/100 increments
and uses the BIOS VR mailbox command 0x4. Valid range is 0-200.
For example, enter 125 for a 1.25 slope. Enter 0 for AUTO.
IMON Offset
IMON Offset is dened in 1/1000 increments and uses the BIOS
VR mailbox command 0x4. For example, enter 25,348 for a 25.348
offset. Valid range is 0-63999.
IMON Prex
This feature sets the IMON offset value to a positive or negative
number. The options are + and -.
VR Current Limit
This feature sets the Voltage Regulator current limit. The value
represents the maximum instantaneous current allowed at any
given time. The value is represented in 1/4A (Ampere) increments.
A value of 400 equals 100A. Set this number to 1022 for Auto.
This uses the BIOS VR mailbox command 0x6.
VR Voltage Limit
This feature sets the Voltage Regulator voltage limit. The value is
represented in mV. A value of 1250 equals 1.25V. Set this number
to 7999 for Auto. This uses the BIOS VR mailbox command 0x6.
TDC Enable
Enable or Disables TDC (Thermal Design Current). The options are
Disabled and Enabled.
TDC Current Limit
The TDC Current Limit is dened in 1/8A (Amperes) increments
and uses the BIOS mailbox command 0x1A. A value of 1000 equals
125A. Valid range is 0-32767. Enter 0 for 0 Amps.
4-14
Chapter 4: AMI BIOS
TDC Time Window
The TDC Time Window is dened in milliseconds. Valid range is
1-8ms and 10ms. Note that 9ms has no valid encoding in the MSR
denition. The options are 1ms, 2ms, 3ms, 4ms, 5ms, 6ms, 7ms,
8ms, and 10ms.
TDC Lock
This feature enables or disables TDC Lock. The options are
Disabled and Enabled.
GT-Sliced VR Settings
GT-Sliced Domain
VR Cong Enable
Select Enable to activate VR conguration options. The options are
Disabled and Enabled.
AC Loadline
AC Loadline is dened in 1/100 mOhms and uses the BIOS mailbox
command 0x2. A value of 100 equals 1.0 mOhm, and 1255 is 12.55
mOhms. Valid range is 0-6249 (0-62.49 mOhms). Enter 0 for AUTO.
DC Loadline
DC Loadline is dened in 1/100 mOhms and uses the BIOS mailbox
command 0x2. A value of 100 equals 1.0 mOhm, and 1255 is 12.55
mOhms. Valid range is 0-6249 (0-62.49 mOhms). Enter 0 for AUTO.
PS Current Threshold1
The PS Current Threshold1 is dened in 1/4A (Amperes) increments
and uses the BIOS mailbox command 0x3. A value of 400 equals
100A. Range is 0-512 which translates to 0-128A. Enter 0 for AUTO.
Default is 80 for 20A.
PS Current Threshold2
The PS Current Threshold2 is dened in 1/4A (Amperes) increments
and uses the BIOS mailbox command 0x3. A value of 400 equals
100A. Range is 0-512 which translates to 0-128A. Enter 0 for AUTO.
The PS Current Threshold2 is dened in 1/4A (Amperes) increments
and uses the BIOS mailbox command 0x3. A value of 400 equals
100A. Range is 0-512 which translates to 0-128A. Enter 0 for AUTO.
Default is 4 for 5A.
PS3 Enable
Enable or Disables PS3. Uses BIOS VR mailbox command line 0x3. The
options are Disabled and Enabled.
PS4 Enable
Use this feature to enable or disable PS4. This feature uses BIOS VR
mailbox command line 0x3. The options are Disabled and Enabled.
IMON Slope
IMON (Load Current Monitor) Slope is dened in 1/100 increments and
uses the BIOS VR mailbox command 0x4. Valid range is 0-200. For
example, enter 125 for a 1.25 slope. Enter 0 for AUTO.
IMON Offset
IMON Offset is dened in 1/1000 increments and uses the BIOS VR
mailbox command 0x4. For example, enter 25,348 for a 25.348 offset.
Valid range is 0-63999.
IMON Prex
This feature sets the IMON offset value to a positive or negative number. The options are + and -.
VR Current Limit
This feature sets the Voltage Regulator current limit. The value represents the maximum instantaneous current allowed at any given time.
The value is represented in 1/4A (Ampere) increments. A value of 400
equals 100A. Set this number to 0 for Auto. This uses the BIOS VR
mailbox command 0x6.
VR Voltage Limit
This feature sets the Voltage Regulator voltage limit. The value is
represented in mV. A value of 1250 equals 1.25V. Set this number to
0 for Auto. This uses the BIOS VR mailbox command 0x6.
TDC Enable
Enable or Disables TDC (Thermal Design Current). The options are
Disabled and Enabled.
4-16
Chapter 4: AMI BIOS
TDC Current Limit
The TDC Current Limit is dened in 1/8A (Amperes) increments and
uses the BIOS mailbox command 0x1A. A value of 1000 equals 125A.
Valid range is 0-32767. Enter 0 for 0 Amps.
TDC Time Window
The TDC Time Window is dened in milliseconds. Valid range is 1-8ms
and 10ms. Note that 9ms has no valid encoding in the MSR deni-
tion. The options are 1ms, 2ms, 3ms, 4ms, 5ms, 6ms, 7ms, 8ms,
and 10ms.
TDC Lock
This feature enables or disables TDC Lock. The options are Disabled
and Enabled.
C states
C-States architecture, a processor power management platform developed by Intel, can further reduce power consumption from the basic C1
(Halt State) state that blocks clock cycles to the CPU. Select Enabled
for CPU C Sates support. The options are Disabled and Enabled. If this
feature is set to Enabled, the following items will be displayed:
Enhanced C-states
(Available when "CPU C States" is set to Enabled)
Select Enabled to enable Enhanced C1 Power State to boost system
performance. The options are Disabled and Enabled.
C-State Auto Demotion
When this item is enabled, the CPU will conditionally demote C State
based on un-cored auto-demote information. The options are Disabled,
C1, C3, and C1 and C3.
C-State Un-demotion
When this item is enabled, the CPU will conditionally undemote from
demoted C3 or C1. The options are Disabled, C1, C3, and C1 and C3.
Package C-State Demotion
This item enables the Package C-State demotion. The options are Disabled and Enabled.
Package C-State Un-Demotion
When set, the CPU will conditionally undemote from demoted Packaged
Package C-State Un-Demotion. The options are Disabled and Enabled.
When set, this option enables or disables the C-State pre wake. The options are Disabled and Enabled.
IO MWAIT Redirection
When enabled, this feature will map and send the IO read instructions
to the IO registers. The options are Disabled and Enabled.
Package C State Limit
Select Auto for the AMI BIOS to automatically set the limit on the C-State
package register. The options are Cpu Default, C10, C9, C8, C7S, C7,
C6, C3, C2, C2, and Auto.
C3 Latency Control (MSR 0x60A)
Time Unit
Use this item to set the C3 latency control time unit. The options
are 1ns, 32ns, 1024ns, 32768ns, 1048576ns, and 33554432ns.
Latency
Use this item to set the C3 latency time value. Valid range is
0-1023. The default setting is 78.
C6/C7 Short Latency Control (MSR 0x60B)
Time Unit
Use this item to set the C6/C7 short latency time unit. The options
are 1ns, 32ns, 1024ns, 32768ns, 1048576ns, and 33554432ns.
Latency
Use this item to set the C6/C7 short latency time value. Valid range
is 0-1023. The default setting is 118.
C6/C7 Long Latency Control (MSR 0x60C)
Time Unit
Use this item to set the C6/C7 long latency time unit. The options
are 1ns, 32ns, 1024ns, 32768ns, 1048576ns, and 33554432ns.
4-18
Chapter 4: AMI BIOS
Latency
Use this item to set the C6/C7 long latency time value. Valid range
is 0-1023. The default setting is 148.
Thermal Monitor
Use this feature to enable the thermal monitor support. The options
are Disabled and Enabled.
Timed MWAIT
Use this feature to enable the Timed MWAIT support. The options
are Disabled and Enabled.
Custom P-state Table
Energy Performance Gain
Use this feature to enable or disable the energy performance gain.
The options are Disabled and Enabled.
EPG DIMM Idd3N
This feature displays the memory standby current.
EPG DIMM Idd3P
This item displays the active power-down current.
CPU Lock Configuration
CFG Lock
When Enabled, this item allows for the conguration of the MSR
0xE2[15] CFG lock bit. The options are Disabled and Enabled.
Overclocking Lock
Select Enabled to prevent the CPU overclocking. The options are
Use this feature to enable Render Standby support. The options are
Enabled and Disabled.
Maximum GT Frequency
This option is the Maximum GT Frequency as dened by the user.
Choose between 300MHz (RPN) and 1200MHz (RP0). Any value beyond
this range will be clipped to its min/max supported by the CPU. The
options are Default Max Frequency, 100MHz through 1200MHz (in
increments of 50MHz).
4-20
Chapter 4: AMI BIOS
CPU OverClocking
BCLK Clock Frequency (1/100 MHz)
Use this item to set the CPU clock override value for the host system.
The default setting is 10000.
FCLK Frequency for Early Power On
Select the FCLK frequency for early power on. The options are Normal
(800MHz), 1GHz, and 400MHz.
Active Processor Cores
Use this feature to select the number of active processor cores. The
options are All, 1, 2, and 3. (These options depend on how many cores
are supported by the CPU.)
Load SMC CPU OC Setting
This item has optimized pre-congured overclock settings. Select one
to activate. The options are Manual, 4.0GHz~5.5GHz (in 100MHz increments).
1-Core Ratio Limit Override
This increases (multiplies) 1 clock speed in the CPU core in relation to
the bus speed when one CPU core is active. The default setting is based
on CPU.
This increases (multiplies) 2 clock speeds in the CPU core in relation
to the bus speed when two CPU cores are active. The default setting is
based on CPU.
3-Core Ratio Limit Override
This increases (multiplies) 3 clock speeds in the CPU core in relation to
the bus speed when three CPU cores are active. The default setting is
based on CPU.
4-Core Ratio Limit Override
This increases (multiplies) 4 clock speeds in the CPU core in relation to
the bus speed when four CPU cores are active. The default setting is
based on CPU.
AVX Ratio Offset
The AVX Ratio Offset species a negative offset from the Turbo Ratio Limit
MSR for AVX workloads. AVX is a more stressful workload. It is helpful to
lower the AVX ratio to ensure maximum possible ratio for SSE workloads.
Valid range is 0-31. Enter 0 for Auto.
BCLK Aware Adaptive Voltage
When enabled, pcode will be aware of the BCLK frequency when calculating the CPV/F curves. This is ideal for BCLK to avoid high voltage
overrides. The options are Disabled and Enabled.
RSR
This item enables or disables the RSR feature. The options are Disabled
and Enabled.
Boot Performance Mode
This option enables the selection of the default CPU performance during
system boot. The options are Max Battery, Max Non-Turbo Perfor-
mance, and Turbo Performance.
Intel(R) SpeedStep(tm)
Enhanced Intel SpeedStep Technology (EIST) allows the system to
automatically adjust processor voltage and core frequency in an effort
to reduce power consumption and heat dissipation. Please refer to Intel’s web site for detailed information. The options are Disabled
and Enabled.
4-22
Chapter 4: AMI BIOS
Turbo Mode
This feature allows processor cores to run faster than the rated operating
frequency in specic conditions. The options are Disabled and Enabled.
If this feature is set to Enabled, the following items will be displayed:
Package Power Limit MSR Lock
This feature enables or disables the locking of Package Power Limit
settings. When enabled Package Power Limit MSR will be locked and a
reset will be required to unlock the register. The options are Disabled
and Enabled.
Congurable TDP Boot Mode
This feature sets the TDP Boot Mode to either Nominal, Down, Up, or
Deactivated. When deactivated, it will set MSR to Nominal and MMIO
to zero.
Congurable TDP Lock
This option sets the lock bits on TURBO_ACTIVATION_RATIO and CON-
FIG_TDP_CONTROL. When lock is enabled, Custom Cong TDP Count
will be forced to 1 and Custom Cong TDP Boot Index will be forced to
0. The options are Enabled and Disabled.
CTDP BIOS Control
This feature enables CTDP control via runtime ACPI BIOS methods. The
options are Enabled and Disabled.
Power Limit 1 Override
This feature disables or enables the Power Limit 1 Override. If this option is disabled, the BIOS will program the default values for Power Limit
and Power Limit 1 Time Window. The options are Disabled and Enabled.
Power Limit 1
This feature congures Package Power Limit 1, in milliwatts. When the
limit is exceeded, the CPU ratio is lowered after a period of time (see
item below). A lower limit can save power and protect the CPU, while
a higher limit improves performance. This value must be between Min
Power Limit TDP limit. If value is '0' the BIOS will program the TDP value.
Use the number keys on your keyboard to enter the value. The default
setting is dependent on the CPU.
This item determines how long the time window over which the TDP value
is maintained. Use the number keys on your keyboard to enter the value.
The default setting is 8. This value may vary between 0~128.
Power Limit 2 Override
This feature disables or enables the Power Limit 2 Override. If this option is disabled, the BIOS will program the default values for Power Limit
and Power Limit 2 Time Window. The options are Disabled and Enabled.
Power Limit 2
This feature congures Package Power Limit 2, in milliwatts. When the
limit is exceeded, the CPU ratio is lowered after a period of time (see
item below). A lower limit can save power and protect the CPU, while
a higher limit improves performance. This value must be between Min
Power Limit TDP limit. If value is '0' the BIOS will program the TDP value.
Use the number keys on your keyboard to enter the value. The default
setting is dependent on the CPU.
Platform PL1 Enable
This option disables or enables the Platform Power Limit 1 programming.
If this option is enabled, it activates the PL1 value to be used by the
processor to limit the average power of the given time window. The options are Disabled and Enabled.
Platform PL2 Enable
This option disables or enables the Platform Power Limit 2 programming.
If this option is enabled, it activates the PL1 value to be used by the
processor to limit the average power of the given time window. The options are Disabled and Enabled.
Power Limit 3 Override
This feature disables or enables the Power Limit 3 Override. If this option is disabled, the BIOS will program the default values for Power Limit
and Power Limit 3 Time Window. The options are Disabled and Enabled.
Power Limit 4 Override
This feature disables or enables the Power Limit 4 Override. If this option is disabled, the BIOS will program the default values for Power Limit
and Power Limit 4 Time Window. The options are Disabled and Enabled.
4-24
Chapter 4: AMI BIOS
CPU Flex Ratio Override
Select Enabled to activate CPU Flex Ratio programming. The options are
Disabled and Enabled.
CPU Flex Ratio Settings
When CPU Flex Ratio Override is enabled, this sets the value for the
CPU Flex Ratio. The default is 25.
Core Max OC Ratio
This option sets the maximum overclocking ratio for the CPU core. The
allowable range is 0-80.
System Agent Voltage (mV)
This option sets the System Agent Voltage in mV.
Core Voltage Mode
Use this feature to select the Core voltage mode. The options are Adaptive and Override.
Core Extra Turbo Voltage
(If the feature above, Core Voltage Mode, is set to Adaptive.) Use this
feature to set the extra voltage applied while GT is operating in turbo
mode. Specify a value from 0mV to 2000mV. Enter 0 to use the manufacture default value.
Core Voltage Override
(If the feature above, Core Voltage Mode, is set to Override.) Use this
feature to set the core voltage override value.
Core Voltage Offset
Use this feature to set the CPU Voltage Offset value from -500mV to
+500mV. Enter 0 to use the manufacturer default value.
Offset Prex
Use this feature to set the Core Voltage Offset value as a positive (+)
number or a negative (-) number. The default setting is "+".
Core PLL Voltage Offset
Use this feature to set the CPU PLL Voltage Offset value from 0-63 with
each unit at 15mV. This is used to increase the range of the core frequency
in extreme overclocking conditions. Press "+" or "-" on your keyboard
to make a selection.
This option sets the maximum overclocking ratio for the RING domain.
Press "+" or "-" on your keyboard to change the value.
Ring Min OC Ratio
This option sets the minimum overclocking ratio for the RING domain.
Press "+" or "-" on your keyboard to change the value.
Uncore Voltage Offset
Use this feature to set the uncore domain Voltage Offset value from
-1000mV to +1000mV. Enter 0 to use the manufacture default value.
Press "+" or "-" on your keyboard to change the value.
Offset Prex
Use this feature to set the offset value as positive or negative. The options are + or -.
PCH Voltage
Use this feature to trim the PCH Voltage. Select from these values: 1.00V,
1.05V, 1.10V, 1.15V, 1.20V, 1.25V, and 1.30V.
CPU PLL Voltage
Use this feature to trim the CPU PLL Voltage. Select from these values:
1.20V, 1.25V, 1.30V, 1.35V, 1.40V, 1.45V, and 1.50V.
CPU_IO Voltage
Use this feature to calibrate the CPU I/O Voltage. Select from these values: 0.975V, 1.15V, 1.30V, and 1.50V.
Load Line Calibration
Load line calibration is vDroop, which is the tendency for a CPU's vCore
to drop when going from an idle state to a load state. Enable this feature
to reduce vDroop. The options are Disabled and Enabled.
VRM Total Current Limit Capability
Use this feature to set the CPU integrated voltage regulator when under
extreme high load for VRM total current limit. The options are 100%,
110%, 120%, 130%, 140%, 150%, 160%, 170%, 180%, 190%, and
200%.
4-26
Chapter 4: AMI BIOS
VRM Per-Phase Current Limit Capability
Use this feature to set the CPU integrated voltage regulator when under extreme high load for VRM per-phase current limit. The options are
100%, 110%, 120%, 130%, 140%, 150%, 160%, 170%, and 180%.
PSYS Slope
PSYS Slope is dened in 1/100 increments and uses the BIOS VR mailbox
command 0x9. Valid range is 0-200. For example, enter 125 for a 1.25
slope. Enter 0 for AUTO.
PSYS Offset
PSYS Offset is dened in 1/4 increments and uses the BIOS VR mailbox
command 0x9. For example, enter 100 for a 25 offset. Valid range is
0-255.
PSYS PMax Power
The value is dened in 1/8 Watt increments and uses the BIOS VR mailbox command 0xB. For example, enter 1000 for a 125 Watt PMax value.
Valid range is 0-8192. Enter 0 for AUTO.
Acoustic Noise Settings
Acoustic Noise Mitigation
Select Enable to help mitigate acoustic noise on certain SKUs when the
CPU is in deeper C-State. The options are Disabled and Enabled.
When the above is set to Enabled, the following can be congured:
IA VR Domain
Disable Fast PKG C State Ramp for IA Domain
Select False to leave Fast ramp enabled during deeper C-States. Selecting True will disable Fast ramp during deeper C-States. The options
are FALSE and TRUE.
Slow Slew Rate for IA Domain
This feature sets the VR IA Slew Rate for Deep Package C-State ramp
time. Slow slew rate equals Fast divided by the number 2, 4, 8, or
16. This feature is used to help reduce acoustic noise. The options are
Select False to leave Fast ramp enabled during deeper C-States. Selecting True will disable Fast ramp during deeper C-States. The options
are FALSE and TRUE.
Slow Slew Rate for GT Domain
This feature sets the VR GT Slew Rate for Deep Package C-State ramp
time. Slow slew rate equals Fast divided by the number 2, 4, 8, or
16. This feature is used to help reduce acoustic noise. The options are
Fast/2, Fast/4, Fast/8, and Fast/16.
SA VR Domain
Disable Fast PKG C State Ramp for SA Domain
Select False to leave Fast ramp enabled during deeper C-States. Selecting True will disable Fast ramp during deeper C-States. The options
are FALSE and TRUE.
Slow Slew Rate for SA Domain
This feature sets the VR SA Slew Rate for Deep Package C-State ramp
time. Slow slew rate equals Fast divided by the number 2, 4, 8, or
16. This feature is used to help reduce acoustic noise. The options are
Fast/2, Fast/4, Fast/8, and Fast/16.
Core/IA VR Settings
VR Cong Enable
Select Enable to activate VR conguration options. The options are
Disabled and Enabled.
*If the item above is set to Enabled, the following items will become
available for conguration:
AC Loadline
AC Loadline is dened in 1/100 mOhms and uses the BIOS mailbox
command 0x2. A value of 100 equals 1.0 mOhm, and 1255 is 12.55
mOhms. Valid range is 0-6249 (0-62.49 mOhms). Enter 0 for AUTO.
4-28
Loading...
+ hidden pages
You need points to download manuals.
1 point = 1 manual.
You can buy points or you can get point for every manual you upload.