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makes no commitment to update or to keep current the information in this manual, or to notify any
person or organization of the updates. Please Note: For the most up-to-date version of this
manual, please see our web site at www.supermicro.com.
SUPER MICRO COMPUTER reserves the right to make changes to the product described in this
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FCC Statement: This equipment has been tested and found to comply with the limits for a Class
A digital device pursuant to Part 15 of the FCC Rules. These limits are designed to provide
reasonable protection against harmful interference when the equipment is operated in a commercial
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Manual Revision 1.0a
Release Date: June 6, 2007
Unless you request and receive written permission from SUPER MICRO COMPUTER, you may not
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Information in this document is subject to change without notice. Other products and companies
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holders.
ture Coeffi cient) fuses on the mainboard must be replaced by trained service
technicians only. The new fuse must be the same or equivalent as the one
replaced. Contact technical support for details and support.
4-2 General Safety Precautions
!
Follow these rules to ensure general safety:
Keep the area around the 1021M-T2+ clean and free of clutter.
The 1021M-T2+ weighs approximately 38 lbs (17.2 kg) when fully loaded.
When lifting the system, two people at either end should lift slowly with their
feet spread out to distribute the weight. Always keep your back straight and
lift with your legs.
Place the chassis top cover and any system components that have been
removed away from the system or on a table so that they won't accidentally
be stepped on.
While working on the system, do not wear loose clothing such as neckties and
unbuttoned shirt sleeves, which can come into contact with electrical circuits
or be pulled into a cooling fan.
Remove any jewelry or metal objects from your body, which are excellent metal
conductors that can create short circuits and harm you if they come into
contact with printed circuit boards or areas where power is present.
4-2
Page 33
Chapter 4: System Safety
After accessing the inside of the system, close the system back up and secure
it to the rack unit with the retention screws after ensuring that all connections
have been made.
4-3 ESD Precautions
!
Electrostatic discharge (ESD) is generated by two objects with different electrical
charges coming into contact with each other. An electrical discharge is created to
neutralize this difference, which can damage electronic com ponents and printed
circuit boards. The following measures are generally suffi cient to neutralize this
difference before contact is made to protect your equipment from ESD:
Use a grounded wrist strap designed to prevent static discharge.
Keep all components and printed circuit boards (PCBs) in their antistatic
bags until ready for use.
Touch a grounded metal object before removing any board from its antistatic
bag.
Do not let components or PCBs come into contact with your clothing, which
may retain a charge even if you are wearing a wrist strap.
Handle a board by its edges only; do not touch its components, peripheral
chips, memory modules or contacts.
When handling chips or modules, avoid touching their pins.
Put the serverboard and peripherals back into their antistatic bags when
not in use.
For grounding purposes, make sure your computer chassis provides excellent
conductivity between the power supply, the case, the mounting fasteners and
the serverboard.
4-3
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AS1021M-T2+ User's Manual
4-4 Operating Precautions
!
Care must be taken to assure that the chassis cover is in place when the
1021M-T2+ is operating to ensure proper cooling. Out of warranty damage to
the 1021M-T2+ system can occur if this practice is not strictly followed.
Figure 4-1. Installing the Onboard Battery
LITHIUM BATTERY
LITHIUM BATTERY
OR
BATTERY HOLDERBATTERY HOLDER
4-4
Page 35
Chapter 5: Advanced Serverboard Setup
Chapter 5
Advanced Serverboard Setup
This chapter covers the steps required to install processors and heatsinks to the
H8DME-2 serverboard, connect the data and power cables and install add-on
cards. All serverboard jumpers and connections are described and a layout and
quick reference chart are included in this chapter. Remember to close the chas-
sis completely when you have fi nished working on the serverboard to protect and
cool the system suffi ciently.
5-1 Handling the Serverboard
Electrostatic discharge (ESD) can damage electronic com ponents. To prevent
damage to printed circuit boards, it is important to handle them very carefully
(see Chapter 4). Also note that the size and weight of the serverboard can cause
it to bend if handled improperly, which may result in damage. To prevent the
serverboard from bending, keep one hand under the center of the board to sup-
port it when handling. The following measures are generally suffi cient to protect
your equipment from static discharge.
Precautions
• Use a grounded wrist strap designed to prevent static discharge.
• Touch a grounded metal object before removing any board from its antistatic
bag.
• Handle a board by its edges only; do not touch its components, peripheral chips,
memory modules or gold contacts.
• When handling chips or modules, avoid touching their pins.
• Put the serverboard, add-on cards and peripherals back into their antistatic
bags when not in use.
Unpacking
The serverboard is shipped in antistatic packaging to avoid static damage. When
unpacking the board, make sure the person handling it is static protected.
5-1
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AS1021M-T2+ User's Manual
5-2 Processor and Heatsink Installation
Exercise extreme caution when handling and installing the proces-
!
Installing the CPU Backplates
Two CPU backplates (BKT-0011L) have been preinstalled to the serverboard to
prevent the CPU area of the serverboard from bending and to provide a base for
attaching the heatsink retention modules.
sor. Always connect the power cord last and always remove it be-
fore adding, removing or changing any hardware components.
Installing the Processor (install to the CPU#1 socket fi rst)
1. Begin by removing the cover plate
that protects the CPU. Lift the lever
on CPU socket #1 until it points straight
up. With the lever raised, lift open the
silver CPU retention plate.
Triangles
2. Use your thumb and your index
fi nger to hold the CPU. Locate and
align pin 1 of the CPU socket with pin
1 of the CPU. Both are marked with
a triangle.
5-2
Page 37
3. Align pin 1 of the CPU with pin 1
of the socket. Once aligned, carefully
place the CPU into the socket. Do not
drop the CPU on the socket, move the
CPU horizontally or vertically or rub the
CPU against the socket or against any
pins of the socket, which may damage
the CPU and/or the socket.
Chapter 5: Advanced Serverboard Setup
4. With the CPU inserted into the
socket, inspect the four corners of the
CPU to make sure that it is properly in-
stalled and fl ush with the socket. Then,
gently lower the silver CPU retention
plate into place.
5. Carefully press the CPU socket
lever down until it locks into its reten-
tion tab. For a dual-processor system,
repeat these steps to install another
CPU into the CPU#2 socket.
Note: if using a single processor, only
the CPU1 DIMM slots are addressable
and the maximum memory support is
halved.
5-3
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AS1021M-T2+ User's Manual
Installing the Heatsink Retention Modules
Two heatsink retention modules (BKT-0012L) and four screws are included in the
retail box. Once installed, these are used to help attach the heatsinks to the CPUs.
To install, align the module with the standoffs of the preinstalled CPU backplate and
with the four feet on the module contacting the serverboard. Secure the retention
module to the backplate with two of the screws provided. See Figure 2-1. Repeat
for the second CPU socket.
Note: BKT-0012L is included for use with non-proprietary heatsinks only. When
installing Super Micro heatsinks, only BKT-0011L (the CPU backplate) is needed.
The BKT-0012L retention module was designed to provide compatibility with clip-
and-cam type heatsinks from third parties.
Figure 2-1. CPU Heatsink Retention Module Installation
Installing the Heatsink
The use of active type heatsinks (except for 1U systems) are recommended. Con-
nect the heatsink fans to the appropriate fan headers on the serverboard. To install
the heatsinks, please follow the installation instructions included with your heatsink
package (not included).
5-4
Page 39
Chapter 5: Advanced Serverboard Setup
5-3 Connecting Cables
Now that the processors are installed, the next step is to connect the cables to
the serverboard. These include the data (ribbon) cables for the peripherals and
control panel and the power cables.
Connecting Data Cables
The ribbon cables used to transfer data from the peripheral devices have been
carefully routed in preconfi gured systems to prevent them from blocking the fl ow
of cooling air that moves through the system from front to back. If you need to
disconnect any of these cables, you should take care to reroute them as they
were originally after reconnecting them (make sure the red wires connect to the
pin 1 locations). If you are confi guring the system, keep the airfl ow in mind when
routing the cables. The following data cables (with their serverboard connector
locations noted) should be connected. See the serverboard layout diagram in this
chapter for connector locations.
Floppy Drive cable (JFDD1)
DVD-ROM Drive cable (IDE#1)
Control Panel cable (JF1, see next page)
SATA cables (SATA0 ~ SATA3)
Connecting Power Cables
The H8DME-2 has a 24-pin primary power supply connector designated "JPW1"
for connection to the ATX power supply. Connect the appropriate connector from
the power supply to JPW1 to supply power to the serverboard. See the Connector
Defi nitions section in this chapter for power connector pin defi nitions.
In addition, your power supply must be connected to the 4-pin Auxiliary ATX Power
connection at J32 and the 8-pin Processor Power connector at JPW2.
5-5
Page 40
AS1021M-T2+ User's Manual
Connecting the Control Panel
JF1 contains header pins for various front control panel connectors. See Figure
5-1 for the pin locations of the various front control panel buttons and LED indi-
cators. Please note that even and odd numbered pins are on opposite sides of
each header.
All JF1 wires have been bundled into single keyed ribbon cable to simplify their
connection. The red wire in the ribbon cable plugs into pin 1 of JF1. Connect
the other end of the cable to the Control Panel printed circuit board, located just
behind the system status LEDs in the chassis.
See the Connector Defi nitions section in this chapter for details and pin descrip-
tions of JF1.
Figure 5-1. Front Control Panel Header Pins (JF1)
20 19
Ground
x (key)
Power LED
HDD LED
NIC1
NIC2
OH/Fan Fail LED
Power Fail LED
Ground
Ground
2 1
NMI
x (key)
Vcc
Vcc
Vcc
Vcc
Vcc
Vcc
Reset
Power
5-6
Page 41
Chapter 5: Advanced Serverboard Setup
5-4 I/O Ports
The I/O ports are color coded in conformance with the PC 99 specifi cation. See
Figure 5-2 below for the colors and locations of the various I/O ports.
Figure 5-2. Rear Panel I/O Ports
5-5 Installing Memory
Note: Check the Super Micro web site for recommended memory modules.
CAUTION
Exercise extreme care when installing or removing DIMM modules
to prevent any possible damage.
1. Insert each memory module vertically into its slot, paying attention to the notch
along the bottom of the module to prevent inserting the module incorrectly (see
Figure 5-3). See support information below.
2. Gently press down on the memory module until it snaps into place.
Note: each processor has its own built-in memory controller, so the CPU2 DIMMs
cannot be addressed if only a single CPU is installed. 128 MB, 256 MB, 512 MB, 1
GB and 2 GB memory modules are supported. It is highly recommended that you
remove the power cord from the system before installing or changing any memory
modules.
5-7
Page 42
AS1021M-T2+ User's Manual
Memory Support
The H8DME-2 supports single or dual-channel, registered ECC DDR2-667/533/400
SDRAM.
Both interleaved and non-interleaved memory are supported, so you may populate
any number of DIMM slots (see note on previous page and charts on following page).
The CPU2 DIMM slots can only be accessed when two CPUs are installed.
Populating two adjacent slots at a time with memory modules of the same size and
type will result in interleaved (128-bit) memory, which is faster than non-interleaved
(64-bit) memory. See charts on following page.
Optimizing memory performance
If two processors are installed, it is better to stagger pairs of DIMMs across both
sets of CPU DIMM slots, e.g. fi rst populate CPU1 slots 1A and 1B, then CPU2 slots
1A, and 1B, then the next two CPU1 slots, etc. This balances the load over both
CPUs to optimize performance.
Maximum memory: 32 GB of registered ECC DDR2-667/533 or 64 GB of regis-
tered ECC DDR2-400. If only one CPU is installed, maximum supported memory
is halved.
Figure 5-3a. Installing DIMM into Slot
Notch
Release
Tab
Note: Notch
should align
with its
receptive point
on the slot
Notch
Release
Tab
To Install: Insert module vertically and press down until it snaps into place. Pay attention to
the bottom notch.
To Remove: Use your thumbs to gently push each release tab outward to free the DIMM from
the slot.
5-8
Page 43
Chapter 5: Advanced Serverboard Setup
Figure 5-3b. Top View of DDR Slot
Populating Memory Banks for 128-bit Operation
CPU1
DIMM1A
XX
XXXX
XXXX
XXXXXX
XXXX
XXXXXX
XXXXXX
XXXXXXXX
CPU1
DIMM1B
CPU1
DIMM2A
XX
XXXX
XXXX
XXXXXX
CPU1
DIMM2B
CPU2
DIMM1A
CPU2
DIMM1B
CPU2
DIMM2A
CPU2
DIMM2B
Notes: X indicates a populated DIMM slot. If adding at least four DIMMs (with two CPUs
installed), the confi gurations with DIMMs spread over both CPUs (and not like the confi guration in row 5) will result in optimized performance. Note that the fi rst two DIMMs
must be installed in the CPU1 memory slots.
Populating Memory Banks for 64-bit Operation
CPU1
DIMM1A
X
XX
XX
XX
CPU1
DIMM1B
CPU1
DIMM2A
X
XX
XX
CPU1
DIMM2B
CPU2
DIMM1A
CPU2
DIMM1B
CPU2
DIMM2A
CPU2
DIMM2B
5-9
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AS1021M-T2+ User's Manual
5-6 Adding PCI Cards
1. PCI Expansion Slots
The SC815TQ-560C chassis can accommodate one standard size (full height full
length) PCI-Express expansion card. The expansion card installs into a riser card
that has been included with the system (the CSE-RR1U-E8 riser).
2.PCI card installation
Before installing a PCI add-on card, release the locking tab that corresponds to the
slot you will be populating. Insert the expansion card into the riser card, pushing
down with your thumbs evenly on both sides of the card.
5-10
Page 45
5-7 Serverboard Details
Figure 5-4. H8DME-2 Layout
(not drawn to scale)
Chapter 5: Advanced Serverboard Setup
Kb/
Mouse
USB0/1
COM1
VGA
JLAN1
JLAN2
FAN5
FAN8/CPU2 FAN
FAN6
Slot #6: PCI-Express x8
Slot #5: PCI-Express x8
JWD
SUPER H8DME-2
JPG1
ATI
ES1000
CPU2
DIMMB 4A
DIMMB 4B
DIMMB 3A
DIMMB 3B
DIMMB 2A
DIMMB 2B
DIMMB 1A
DIMMB 1B
Slot #4: PCI-X 133/100 MHz
Slot #3: PCI-X 133/100 MHz
JPX1B
JPX1A
Slot #2: PCI-X 100/66 MHz
JWOL
Slot #1: PCI-X 100/66 MHz
SIMLC
2
JI
C1
2
C2
JI
BIOS
COM2
USB4/5 USB2/3
SMBus
JPW1
SGPIO2
SGPIO1
uPD720400
FAN7/CPU1 FAN
MCP55 Pro
NEC
SATA0
SATA1
SATA2
SATA3
SATA4
DIMMA 1B
DIMMA 1A
DIMMA 2B
DIMMA 2A
DIMMA 3B
DIMMA 3A
DIMMA 4B
DIMMA 4A
CPU1
SATA5
PWRI2C
JBT1
Battery
J32
Speaker
JWOR
JPW2
DP4
JL1
JOH1
FAN3
FAN2
JWF1
JFDD1
FAN4
JD1
JF1
FAN1
JPWF
J3P
JCF1
JAR
IDE#1
Notes:
1. Jumpers not indicated are for test purposes only.
5-11
Page 46
AS1021M-T2+ User's Manual
H8DME-2 Quick Reference
Jumpers Description Default Setting
J3P 3rd Power Fail Detect En/Dis Closed (Enabled)
JBT1 CMOS Clear See Section 2-7
JCF1 Compact Flash Master/Slave Closed (Master)
2
C1/2 I2C to PCI Enable/Disable Closed (Enabled)
JI
JPG1 VGA Enable/Disable Pins 1-2 (Enabled)
JPX1A/JPX1B PCI-X Slot #1&2/3&4 Freq. Open (Auto)
JWD Watch Dog Pins 1-2 (Reset)
ConnectorsDescription
COM1, COM2 COM1/COM2 Serial Port/Header
FAN 1-8 System Fan Headers
IDE#1 IDE Drive Connector
J32 4-pin Auxiliary Power Connector
JAR Power Fail Alarm Reset Header
JD1 Onboard Speaker/Keylock/Power LED
JF1 Front Panel Connector
JFDD1 Floppy Disk Drive Connector
JL1 Chassis Intrusion Header
JLAN1/2 Gigabit Ethernet (RJ45) Ports
JOH1 Overheat Warning Header
JPW1 24-Pin ATX Power Connector
JPW2 8-Pin Processor Power Connector
JPWF 3rd Power Supply Alarm Header
JWF1 Compact Flash Card Power Connector
JWOL Wake-On-LAN Header
JWOR Wake-On-Ring Header
2
PWRI
SATA0 ~ SATA5 Serial ATA Ports
SGPIO1/SGPIO2 SGPIO Headers
SIMLC IPMI 2.0 Card Slot
SMBus System Management Bus Header
USB0/1 Universal Serial Bus (USB) Ports 0/1
USB2/3, USB4/5 USB Headers
C Power Supply I2C Header
IndicatorsDescription
DP1 Onboard Power LED
5-12
Page 47
Chapter 5: Advanced Serverboard Setup
5-8 Connector Defi nitions
ATX Power Connector
The primary ATX power supply con-
nector (JPW1) meets the SSI (Super-
set ATX) 24-pin specifi cation. Refer to
the table on the right for the pin defi ni-
tions of the ATX 24-pin power connec-
tor. This connection supplies power to
the chipset, fans and memory.
Note: You must also connect the
JPW2 and J32 power connectors to
your power supply (see below).
Processor Power Connector
The 12v, 8-pin processor power con-
nector at JPW2 must also be con-
nected to your power supply to supply
power to the CPUs. See the table on
the right for pin defi nitions.
ATX Power 24-pin Connector
Pin Defi nitions (JPW1)
Pin# Defi nition Pin # Defi nition
13+3.3V1+3.3V
14-12V2+3.3V
15COM3COM
16PS_ON4+5V
17COM5COM
18COM6+5V
19COM7COM
20Res (NC)8PWR_OK
21+5V95VSB
22+5V10+12V
23+5V11+12V
24COM12+3.3V
Processor Power
Connector
Pin Defi nitions (JPW2)
Pins Defi nition
1 through 4Ground
5 through 8+12V
Required Connection
Auxiliary Power Connector
The auxiliary power connector at J32
must also be connected to your power
supply to supply extra power that may
be needed for high loads. See the
table on the right for pin defi nitions.
NMI Button
The non-maskable interrupt button
header is located on pins 19 and 20
of JF1.
Power LED
The Power LED connection is located
on pins 15 and 16 of JF1. Refer to the
table on the right for pin defi nitions.
Auxiliary Power
Connector
Pin Defi nitions (J32)
Pins Defi nition
1 & 2Ground
3 & 4+12V
Required Connection
NMI Button
Pin Defi nitions (JF1)
Pin# Defi nition
19Control
20Ground
Power LED
Pin Defi nitions (JF1)
Pin# Defi nition
15Vcc
16Control
5-13
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AS1021M-T2+ User's Manual
HDD LED
The HDD (IDE Hard Disk Drive) LED
connection is located on pins 13 and
14 of JF1. Attach the IDE hard drive
LED cable to display disk activity.
Refer to the table on the right for pin
defi nitions.
NIC1 LED
The NIC1 (Network Interface Control-
ler) LED connection is located on pins
11 and 12 of JF1. Attach the NIC1
LED cable to display network activity.
Refer to the table on the right for pin
defi nitions.
NIC2 LED
The NIC2 (Network Interface Control-
ler) LED connection is located on pins
9 and 10 of JF1. Attach the NIC2
LED cable to display network activity.
Refer to the table on the right for pin
defi nitions.
HDD LED
Pin Defi nitions (JF1)
Pin# Defi nition
13Vcc
14HD Active
NIC1 LED
Pin Defi nitions (JF1)
Pin# Defi nition
11Vcc
12NIC1 Active
NIC2 LED
Pin Defi nitions (JF1)
Pin# Defi nition
9Vcc
10NIC2 Active
Overheat/Fan Fail LED
Connect an LED to the OH connection
on pins 7 and 8 of JF1 to provide ad-
vanced warning of chassis overheat-
ing. Refer to the table on the right for
pin defi nitions and status indicators.
Power Fail LED
The Power Fail LED connection is
located on pins 5 and 6 of JF1. Refer
to the table on the right for pin defi ni-
tions. This feature is only available
for systems with redundant power
supplies.
OH/Fan Fail LED
Pin Defi nitions (JF1)
Pin# Defi nition
7Vcc
8Control
5-14
OH/Fan Fail
LED Status
State Indication
SolidOverheat
BlinkingFan fail
Power Fail LED
Pin Defi nitions (JF1)
Pin# Defi nition
5Vcc
6Control
Page 49
Reset Button
The Reset Button connection is lo-
cated on pins 3 and 4 of JF1. Attach
it to the hardware reset switch on the
computer case. Refer to the table on
the right for pin defi nitions.
Power Button
The Power Button connection is
located on pins 1 and 2 of JF1. Mo-
mentarily contacting both pins will
power on/off the system. This button
can also be confi gured to function
as a suspend button (see the Power
Button Mode setting in BIOS). To turn
off the power when set to suspend
mode, depress the button for at least
4 seconds. Refer to the table on the
right for pin defi nitions.
Chapter 5: Advanced Serverboard Setup
Reset Button
Pin Defi nitions (JF1)
Pin# Defi nition
3Reset
4Ground
Power Button
Pin Defi nitions (JF1)
Pin# Defi nition
1PW_ON
2Ground
Universal Serial Bus Ports
(USB0/1)
Two Universal Serial Bus ports
(USB2.0) are located beside the
JLAN1/2 ports. See the table on the
right for pin defi nitions.
USB Headers
Four USB2.0 headers (USB2/3
and USB4/5) are included on the
serverboard. These may be con-
nected to provide front side access.
A USB cable (not included) is needed
for the connection. See the table on
the right for pin defi nitions.
Universal Serial Bus Ports
Pin Defi nitions (USB0/1)
USB0
Pin # Defi nition
1+5V1+5V
2PO-2PO-
3PO+3PO+
4Ground4Ground
Universal Serial Bus Headers
Pin Defi nitions (USB2/3/4/5)
USB2
Pin # Defi nition
1+5V1+5V
2PO-2PO-
3PO+3PO+
4Ground4Ground
5Key5No connection
USB1
Pin # Defi nition
USB3/4
Pin # Defi nition
5-15
Page 50
AS1021M-T2+ User's Manual
ATX PS/2 Keyboard and
PS/2 Mouse Ports
The ATX PS/2 keyboard and the
PS/2 mouse ports are located on the
IO backplane. The mouse is the top
(green) port. See the table on the
right for pin defi nitions.
Serial Ports
The COM1 and COM2 serial ports
are located under the parallel port.
Refer to the serverboard layout for
locations and the table on the right for
pin defi nitions.
PS/2 Keyboard and
Mouse Port Pin
Defi nitions
Pin# Defi nition
1Data
2NC
3Ground
4VCC
5Clock
6NC
Serial Port Pin Defi nitions
(COM1/COM2)
Pin # Defi nitionPin # Defi nition
1DCD6DSR
2RXD7RTS
3TXD8CTS
4DTR9RI
5Ground10NC
Fan Headers
The H8DME-2 has eight fan headers,
which are designated FAN1 through
FAN8. Fans are Pulse Width Modu-
lated (PWM) and their speed is con-
trolled via Thermal Management with
a BIOS setting. See the table on the
right for pin defi nitions.
Note: when using active heatsinks
(those with fans), connect the heatsink
fan for CPU1 to the FAN7 header and
the heatsink fan for CPU2 to the FAN8
header.
JLAN1/2 (Ethernet Ports)
Note: NC indicates no connection.
Fan Header
Pin Defi nitions
(FAN1-8)
Pin# Defi nition
1Ground (Black)
2+12V (Red)
3Tachometer
4PWM Control
Two Gigabit Ethernet ports (desig-
nated JLAN1 and JLAN2) are located
beside the COM2 port. These Ether-
net ports accept RJ45 type cables.
Notes: JLAN1 is the top port and JLAN2 is the
bottom port.
5-16
Page 51
Chapter 5: Advanced Serverboard Setup
Power LED/Speaker
On JD1, pins 1, 2, and 3 are for the
power LED and pins 4 through 7 are
for the speaker. See the tables on the
right for pin defi nitions.
Note: The speaker connector pins are
for use with an external speaker. If
you wish to use the onboard speaker,
you should close pins 6 and 7 with a
jumper.
Overheat LED
Connect an LED to the JOH1 header
to provide warning of chassis over-
heating. See the table on the right for
pin defi nitions.
PWR LED Connector
Pin Defi nitions (JD1)
Pin# Defi nition
1+Vcc
2Control
3Control
Speaker Connector
Pin Defi nitions (JD1)
Pin# Defi nition
4Red wire, +5V
5No connection
6Buzzer signal
7Speaker data
Overheat LED
Pin Defi nitions (JOH1)
Pin# Defi nition
13.3V
2OH Active
Chassis Intrusion
A Chassis Intrusion header is located
at JL1. Attach the appropriate cable
to inform you of a chassis intrusion.
Wake-On-LAN
The Wake-On-LAN header is desig-
nated JWOL. See the table on the
right for pin defi nitions. You must
have a LAN card with a Wake-On-LAN
connector and cable to use the Wake-
On-LAN feature.
(Note: Wake-On-LAN from S3, S4, S5
are supported by LAN1. LAN2 sup-
ports Wake-On-LAN from S1 only.)
Chassis Intrusion
Pin Defi nitions (JL1)
Pin# Defi nition
1Battery voltage
2Intrusion signal
Wake-On-LAN
Pin Defi nitions
(JWOL)
Pin# Defi nition
1+5V Standby
2Ground
3Wake-up
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AS1021M-T2+ User's Manual
Wake-On-Ring
The Wake-On-Ring header is desig-
nated JWOR. This function allows
your computer to receive and "wake-
up" by an incoming call to the modem
when in suspend state. See the table
on the right for pin defi nitions. You
must have a Wake-On-Ring card and
cable to use this feature.
Power Supply I2C Header
The PWRI2C header is for I2C, which
may be used to monitor the status of
the power supply, fans and system
temperature. See the table on the right
for pin defi nitions.
Wake-On-Ring
Pin Defi nitions
(JWOR)
Pin# Defi nition
1Ground (Black)
2Wake-up
I2C Header
Pin Defi nitions
(PWRI2C)
Pin# Defi nition
1Clock
2Data
3PWR Fail
4Gnd
5+3.3V
SMBus Header
The header at SMBus is for the System
Management Bus. Connect the ap-
propriate cable here to utilize SMB on
the system. See the table on the right
for pin defi nitions.
3rd Power Supply Alarm
Header
Connect a cable from your power
supply to JPWF to provide you with
warning of a power supply failure.
The warning signal is passed through
the PWR_LED pin to indicate a power
failure. See the table on the right for
pin defi nitions.
SMBus Header
Pin Defi nitions (SMBus)
Pin# Defi nition
1Data
2Ground
3Clock
4No Connection
3rd Power Supply
Alarm Header
Pin Defi nitions (JPWF)
Pin# Defi nition
1P/S 1 Fail Signal
2P/S 2 Fail Signal
3P/S 3 Fail Signal
4Reset (from MB)
Note: This feature is only available when using
redundant power supplies.
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Power Fail Alarm Reset
Header
Connect JAR to the alarm reset but-
ton on your chassis (if available) or to
a microswitch to allow you to turn off
the alarm that sounds when a power
supply module fails. See the table on
the right for pin defi nitions.
Compact Flash Power
Header
A Compact Flash Card Power header
is located at JWF1. For the Compact
Flash Card to work properly, you will
fi rst need to connect the device's power
cable to JWF1 and correctly set the
Compact Flash Jumper (JCF1).
Chapter 5: Advanced Serverboard Setup
Alarm Reset Header
Pin Defi nitions (JAR)
Pin# Defi nition
1Ground
2Reset Signal
Compact Flash
Power Header
Pin Defi nitions (JWF1)
Pin# Defi nition
1+5V
2Ground
3Signal
SGPIO
SGPIO1 and SGPIO2 (Serial General
Purpose Input/Output) provide a bus
between the SATA controller and
the SATA drive backplane to provide
SATA enclosure management func-
tions. Connect the appropriate cables
from the backplane to the SGPIO1
and SGPIO2 header(s) to utilize
SATA management functions on your
system.
Pin Defi nitions (SGPIO1, SGPIO2)
SGPIO Header
Pin# Defi nition Pin # Defi nition
1NC2NC
3Ground4Data
5Load6Ground
7NC8NC
Note: NC indicates no connection.
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AS1021M-T2+ User's Manual
5-9 Jumper Settings
Explanation of
Jumpers
To modify the operation of the
serverboard, jumpers can be used to
choose between optional settings.
Jumpers create shorts between two
pins to change the function of the
connector. Pin 1 is identifi ed with
a square solder pad on the printed
circuit board. See the diagram at
right for an example of jumping pins
1 and 2. Refer to the serverboard
layout page for jumper locations.
Note: On two-pin jumpers, "Closed"
means the jumper is on and "Open"
means the jumper is off the pins.
CMOS Clear
Connector
321
Pins
Jumper
321
Setting
JBT1 is used to clear CMOS and will also clear any passwords. Instead of pins,
this jumper consists of contact pads to prevent accidentally clearing the contents
of CMOS.
To clear CMOS,
1) First power down the system and unplug the power cord(s).
2) With the power disconnected, short the CMOS pads with a metal object such as
a small screwdriver for at least four seconds.
3) Remove the screwdriver (or shorting device).
4) Reconnect the power cord(s) and power on the system.
Notes:
Do not use the PW_ON connector to clear CMOS.
The onboard battery does not need to be removed when clearing CMOS, however
you must short JBT1 for at least four seconds.
JBT1 contact pads
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3rd Power Supply Fail Detect
Enable/Disable
The system can notify you in the event
of a power supply failure. This feature
assumes that three redundant power
supply units are installed in the chas-
sis. If you only have one or two power
supplies installed, you should disable
the function with the J3P header to pre-
vent false alarms. See the table on the
right for jumper settings.
I2C to PCI Enable/Disable
Chapter 5: Advanced Serverboard Setup
3rd Power Supply Fail Detect
Jumper Settings (J3P)
Jumper Setting Defi nition
OpenDisabled
ClosedEnabled
The JI2C1/2 pair of jumpers allows
you to connect the System Manage-
ment Bus to the PCI expansion slots.
The default setting is closed (on) for
both jumpers to enable the connec-
tion. Both connectors must be set the
same (JI
2
C1 is for data and JI2C2 is for
the clock). See the table on right for
jumper settings.
Watch Dog
JWD controls Watch Dog, a system
monitor that takes action when a soft-
ware application freezes the system.
Jumping pins 1-2 will cause WD to
reset the system if an application is
hung up. Jumping pins 2-3 will gen-
erate a non-maskable interrupt signal
for the application that is hung up.
See the table on the right for jumper
settings. Watch Dog can also be
enabled via BIOS.
I2C to PCI Enable/Disable
Jumper Settings
2
C1/2)
(JI
Jumper Setting Defi nition
ClosedEnabled
OpenDisabled
Watch Dog
Jumper Settings (JWD)
Jumper Setting Defi nition
Pins 1-2Reset
Pins 2-3NMI
OpenDisabled
Note: When enabled, the user needs to
write their own application software in or-
der to disable the Watch Dog timer.
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AS1021M-T2+ User's Manual
Onboard Speaker Enable/
Disable
The JD1 header allows you to use
either an external speaker or the in-
ternal (onboard) speaker. To use the
internal onboard speaker, close pins
6 and 7 with a jumper. To use an
external speaker, remove the jumper
and connect the speaker wires to pins
4 (+5V) and 7 (control signal). See the
table on the right for settings and the
table associated with the Power LED/
Keylock/Speaker connection (previ-
ous section) for jumper settings.
PCI-X Slot Speed
Jumpers JPX1A and JPX1B on the
H8DME-2 can be used to change the
speed of PCI-X slots #1&2 and PCI-X
slots #3 & 4, respectively. See the
tables on the right for jumper settings.
Onboard Speaker Enable/Disable
Pin Defi nitions (JD1)
Pins Defi nition
6 and 7Jump for onboard speaker
4 and 7Attach external speaker wires
Note: Pins 4-7 are used only for the onboard
speaker.
PCI-X Slot Speed Jumper Settings
(JPX1A/JPX1B)
Jumper Setting Defi nition
OpenAuto
Pins 1-2PCI-X 66 MHz
Pins 2-3PCI 66 MHz
Note: JPX1A controls the speed for PCI-X slots #1
and #2. JPX1B controls the speed for PCI-X slots
#3 and #4. The default setting for both is Auto.
VGA Enable/Disable
JPG1 allows you to enable or disable
the VGA port. The default position
is on pins 1 and 2 to enable VGA.
See the table on the right for jumper
settings.
Compact Flash Master/Slave
The JCF1 jumper allows you to assign
either master or slave status a compact
fl ash card installed in IDE1. See the
table on the right for jumper settings.
VGA Enable/Disable
Jumper Settings (JPG1)
Jumper Setting Defi nition
Pins 1-2Enabled
Pins 2-3Disabled
Compact Flash
Master/Slave
Jumper Settings (JCF1)
Jumper Setting Defi nition
ClosedMaster
OpenSlave
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5-10 Onboard Indicators
JLAN1/JLAN2 LEDs
The Ethernet ports (located beside
the VGA port) have two LEDs. On
each Gb LAN port, one LED indicates
activity when blinking while the other
LED may be amber or off to indicate
the speed of the connection. See
the table on the right for the func-
tions associated with the connection
speed LED.
Chapter 5: Advanced Serverboard Setup
JLAN LED
(Connection Speed Indicator)
LED Color Defi nition
Off10/100 MHz
Amber1 GHz
+3.3V Standby LED
When illuminated, the DP4 LED indi-
cates that +3.3V standby power from
the power supply is being supplied to
the serverboard. DP4 should normally
be illuminated when the system is con-
nected to AC power, whether turned
on or not. DP4 will fl ash on and off
when the system is in an S1, S3
(Suspend to RAM) or S4 (Suspend to
Disk) state.See the table on the right
for DP4 LED states.
+3.3V Standby LED
(DP4)
State System Status
OnStandby power present on
serverboard
OffNo power connected
FlashingSystem in standby state
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AS1021M-T2+ User's Manual
5-11 Floppy, IDE and SATA Drive Connections
Use the following information to connect the fl oppy and hard disk drive cables.
The fl oppy disk drive cable has seven twisted wires.
A red mark on a wire typically designates the location of pin 1.
A single fl oppy disk drive ribbon cable has 34 wires and two connectors to provide
for two fl oppy disk drives. The connector with twisted wires always connects to
drive A, and the connector that does not have twisted wires always connects to
drive B.
The 80-wire ATA133 IDE hard disk drive cable that came with your system has
two connectors to support two drives. This special cable should be used to take
advantage of the speed this new technology offers. The blue connector connects
to the onboard IDE connector interface and the other connector(s) to your hard
drive(s). Consult the documentation that came with your disk drive for details
on actual jumper locations and settings for the hard disk drive.
Floppy Connector
The fl oppy connector is located
beside the JIDE1 connector.
See the table on the right for
pin defi nitions.
Floppy Drive Connector
Pin Defi nitions (JFDD1)
Pin# Defi nition Pin # Defi nition
1GND2FDHDIN
3GND4Reserved
5Key6FDEDIN
7GND8Index-
9GND10Motor Enable
11GND12Drive Select B-
13GND14Drive Select A-
15GND16Motor Enable
17GND18DIR-
19GND20STEP-
21GND22Write Data-
23GND24Write Gate-
25GND26Track 00-
27GND28Write Protect-
29GND30Read Data-
31GND32Side 1 Select-
33GND34Diskette
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Chapter 5: Advanced Serverboard Setup
IDE Connector
There are no jumpers to con-
fi gure the onboard IDE#1 con-
nector unless using it for a
compact flash device. See
the table on the right for pin
defi nitions.
IDE Drive Connectors
Pin Defi nitions (IDE#1)
Pin# Defi nition Pin # Defi nition
1Reset IDE2Ground
3Host Data 74Host Data 8
5Host Data 66Host Data 9
7Host Data 58Host Data 10
9Host Data 410Host Data 11
11Host Data 312Host Data 12
13Host Data 214Host Data 13
15Host Data 116Host Data 14
17Host Data 018Host Data 15
19Ground20Key
21DRQ322Ground
23I/O Write24Ground
25I/O Read26Ground
27IOCHRDY28BALE
29DACK330Ground
31IRQ1432IOCS16
33Addr134Ground
35Addr036Addr2
37Chip Select 038Chip Select 1
39Activity40Ground
SATA Ports
There are no jumpers to con-
fi gure the SATA ports, which
are designated SATA0 through
SATA5. See the table on the
right for pin defi nitions.
SATA Drive Ports
Pin Defi nitions (SATA0-SATA5)
Pin # Defi nition
1Ground
2TXP
3TXN
4Ground
5RXN
6RXP
7Ground
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AS1021M-T2+ User's Manual
5-12 Enabling SATA RAID
Now that the hardware is set up, you must now install the operating system and the
SATA RAID drivers, if you wish to use RAID with your SATA drives. The installation
procedure differs depending on whether you wish to have the operating system
installed on a RAID array or on a separate non-RAID drive. See the instructions
below for details.
Serial ATA (SATA)
Serial ATA (SATA) is a physical storage interface that employs a single cable with a
minimum of four wires to create a point-to-point connection between devices. This
connection is a serial link that supports a SATA transfer rate from 150 MBps. The
serial cables used in SATA are thinner than the traditional cables used in Parallel
ATA (PATA) and can extend up to one meter in length, compared to only 40 cm for
PATA cables. Overall, SATA provides better functionality than PATA.
Installing the OS/SATA Driver
Before installing the OS (operating system) and SATA RAID driver, you must decide
if you wish to have the operating system installed as part of a bootable RAID array
or installed to a separate non-RAID hard drive. If on a separate drive, you may
install the driver either during or after the OS installation. If you wish to have the
OS on a SATA RAID array, you must follow the procedure below and install the
driver during the OS installation.
Building a Driver Diskette
You must fi rst build a driver diskette from the Super Micro CD-ROM that was
included with the system. (You will have to create this disk on a computer that is
already running and with the OS installed.) Insert the CD into your CD-ROM drive
and start the system. A display as shown in Figure 5-5 will appear. Click on the icon
labeled "Build Driver Diskettes and Manuals" and follow the instructions to create
a fl oppy disk with the driver on it. Once it's been created, remove the fl oppy and
insert the installation CD for the Windows Operating System you wish to install into
the CD-ROM drive of the new system you are about to confi gure.
Enabling SATA RAID in the BIOS
Before installing the Windows Operating System, you must change some settings
in BIOS. Boot up the system and hit the <Del> key to enter the BIOS Setup Utlility.
After the Setup Utility loads,
1. Use the arrow keys to move to the Exit menu. Scroll down with the arrow keys
to the "Load Optimal Defaults setting and press <Enter>. Select "OK" to confi rm,
then <Enter> to load the default settings.
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Chapter 5: Advanced Serverboard Setup
2. Use the arrow keys to move to Advanced > Floppy/IDE/SATA Confi guration >
nVidia RAID Setup and press the <Enter> key. Once in the submenu, enable the
"nVidia RAID Function" setting, which will cause the SATA0/1/2 Primary/Secondary
settings to appear. Enable the SATA devices and channels you will be using.
3. Hit the <Esc> key twice and scroll to the Exit menu. Select "Save Changes and
Exit" and hit <enter>, then hit <Enter> again to verify.
4. After exiting the BIOS Setup Utility, the system will reboot. When prompted
during the startup, press the <F10> key when prompted to run the nVidia RAID
Utility program.
Using the nVidia RAID Utility
The nVidia RAID Utility program is where you can defi ne the drives you want to
include in the RAID array and the mode and type of RAID. Two main windows
are shown in the utility. The "Free Disks" window on the left will list all available
drives. Use the arrow keys to select and move drives to the window on the right,
which lists all drives that are to become part of the RAID array.
Once you have fi nished selecting the drives and type of RAID you wish to use for
your RAID array, press the <F7> key. You will be prompted to verify your choice; if
you want to continue with your choices, select "Yes". Note that selecting "Yes" will
clear all previous data from the drives you selected to be a part of the array. You
are then given the choice of making the RAID array bootable by pressing the the
<B> key. After you have fi nshed, press the <Ctrl> and <X> keys simultaneously.
Installing the OS and Drivers
With the Windows OS installation CD in the CD-ROM drive, restart the system.
When you see the prompt, hit the <F6> key to enter Windows setup. Eventually a
blue screen will appear with a message that begins "Windows could not determine
the type of one or more storage devices . . ." When you see the screen, hit the <S>
key to "Specify Additional Device", then insert the driver diskette you just created
into the fl oppy drive. Highlight "Manufuacturer Supplied Hardware Support Disk"
and hit the <Enter> key. Highlight the fi rst "nVidia RAID" driver shown and press
the <Enter> key to install it. Soon a similar blue screen will appear again. Again hit
the <S> key, then highlight the second item, "nForce Storage Controller" and press
the <Enter> key, then <Enter> again to continue with the Windows setup.
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AS1021M-T2+ User's Manual
5-13 Installing Additional Drivers
The CD that came bundled with the system contains software drivers, some of which
must be installed, such as the chipset driver. After inserting this CD into your CD-
ROM drive, the display shown in Figure 5-5 should appear. (If this display does
not appear, click on the My Computer icon and then on the icon representing your
CD-ROM drive. Finally, double click on the S "Setup" icon.)
Pressing the Enter key will open the following settings. Use the "+" and "-"
keys to navigate through the system event log.
Clear BMC System Event Log
Selecting this and pressing the Enter key will clear the BMC system event log.
Set LAN Confi guration
Use the "+" and "-" keys to choose the desired channel number.
IP Address
Use the "+" and "-" keys to select the parameter. The IP address and current
IP address in the BMC are shown.
MAC Address
Use the "+" and "-" keys to select the parameter. The MAC address and cur-
rent MAC address in the BMC are shown.
Subnet Address
Use the "+" and "-" keys to select the parameter. The subnet address and
current subnet address in the BMC are shown.
Set PEF Confi guration
PEF Support
Use this setting to Enable or Disable PEF support.
PEF Action Global Control
Options are Alert, Power Down, Reset Sysytem, Power Cycle, OEM Action
and Diagnostic Int..
Alert Startup Delay
Use this setting to Enable or Disable the alert startup delay.
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AS1021M-T2+ User’s Manual
Startup Delay
Use this setting to Enable or Disable the startup delay.
Event Message for PEF Action
Use this setting to Enable or Disable event messages for a PEF action.
BMC Watch Dog Timer Action
This setting is used to set the Watch Dog function. The options are Disabled,
Reset System, Power Down and Power Cycle.
7-4 Boot Menu
This feature allows the user to confi gure the following items:
Boot Device Priority
This feature allows the user to prioritize the boot sequence from the available
devices.
Hard Disk Drives
This feature allows the user to specify the boot sequence from available hard disk
drives.
Removable Drives
This feature allows the user to specify the Boot sequence from available remov-
able drives.
CD/DVD Drives
This feature allows the user to specify the Boot sequence from available CD/DVD
drives.
7-16
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Chapter 7: BIOS
7-5 Security Menu
AMI BIOS provides a Supervisor and a User password. If you use both passwords,
the Supervisor password must be set fi rst.
Change Supervisor Password
Select this option and press <Enter> to access the sub menu, and then type in
the password.
Change User Password
Select this option and press <Enter> to access the sub menu, and then type in
the password.
Boot Sector Virus Protection
This option is near the bottom of the Security Setup screen. Select "Disabled" to
deactivate the Boot Sector Virus Protection. Select "Enabled" to enable boot sector
protection. When "Enabled", AMI BIOS displays a warning when any program (or
virus) issues a Disk Format command or attempts to write to the boot sector of the
hard disk drive. The options are Enabled and Disabled.
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AS1021M-T2+ User’s Manual
7-6 Exit Menu
Select the Exit tab from AMI BIOS Setup Utility screen to enter the Exit BIOS Setup
screen.
Save Changes and Exit
When you have completed the system confi guration changes, select this option
to leave BIOS Setup and reboot the computer, so the new system confi guration
parameters can take effect. Select Save Changes and Exit from the Exit menu
and press <Enter>.
Discard Changes and Exit
Select this option to quit BIOS Setup without making any permanent changes to
the system confi guration and reboot the computer. Select Discard Changes and
Exit from the Exit menu and press <Enter>.
Discard Changes
Select this option and press <Enter> to discard all the changes and return to AMI
BIOS Utility Program.
Load Optimal Defaults
To set this feature, select Load Optimal Defaults from the Exit menu and press
<Enter>. Then Select "OK" to allow BIOS to automatically load the Optimal Defaults
as the BIOS Settings. The Optimal settings are designed for maximum system
performance, but may not work best for all computer applications.
Load Fail-Safe Defaults
To set this feature, select Load Fail-Safe Defaults from the Exit menu and press
<Enter>. The Fail-Safe settings are designed for maximum system stability, but
not maximum performance.
7-18
Page 93
Appendix A: BIOS Error Beep Codes
Appendix A
BIOS Error Beep Codes
During the POST (Power-On Self-Test) routines, which are performed each time
the system is powered on, errors may occur.
Non-fatal errors are those which, in most cases, allow the system to continue the
boot-up process. The error messages normally appear on the screen.
Fatal errors are those which will not allow the system to continue the boot-up pro-
cedure. If a fatal error occurs, you should consult with your system manufacturer
for possible repairs.
These fatal errors are usually communicated through a series of audible beeps.
The numbers on the fatal error list, on the following page, correspond to the number
of beeps for the corresponding error. All errors listed, with the exception of Beep
Code 8, are fatal errors.
POST codes may be read on the debug LEDs located beside the LAN port on the
serverboard backplane. See the description of the Debug LEDs (LED1 and LED2)
in Chapter 5.
A-1 AMIBIOS Error Beep Codes
Beep Code Error Message Description
1 beep Refresh Circuits have been reset.
(Ready to power up.)
5 short, 1 long Memory error No memory detected in
system
8 beeps Display memory read/write error Video adapter missing or
with faulty memory
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AS1021M-T2+ User's Manual
Notes
A-2
Page 95
Appendix B: BIOS POST Checkpoint Codes
Appendix B
BIOS POST Checkpoint Codes
When AMIBIOS performs the Power On Self Test, it writes checkpoint codes to I/O
port 0080h. If the computer cannot complete the boot process, diagnostic equipment
can be attached to the computer to read I/O port 0080h.
B-1 Uncompressed Initialization Codes
The uncompressed initialization checkpoint codes are listed in order of execution:
Checkpoint Code Description
D0hThe NMI is disabled. Power on delay is starting. Next, the initialization code check-
D1hInitializing the DMA controller, performing the keyboard controller BAT test, starting
D3hStarting memory sizing next.
D4hReturning to real mode. Executing any OEM patches and setting the Stack next.
D5hPassing control to the uncompressed code in shadow RAM at E000:0000h. The
D6hControl is in segment 0. Next, checking if <Ctrl> <Home> was pressed and veri-
sum will be verifi ed.
memory refresh and entering 4 GB fl at mode next.
initialization code is copied to segment 0 and control will be transferred to segment
0.
fying the system BIOS checksum. If either <Ctrl> <Home> was pressed or the
system BIOS checksum is bad, next will go to checkpoint code E0h. Otherwise,
going to checkpoint code D7h.
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AS1021M-T2+ User's Manual
B-2 Bootblock Recovery Codes
The bootblock recovery checkpoint codes are listed in order of execution:
Checkpoint Code Description
E0hThe onboard fl oppy controller if available is initialized. Next, beginning the base
E1hInitializing the interrupt vector table next.
E2hInitializing the DMA and Interrupt controllers next.
E6hEnabling the fl oppy drive controller and Timer IRQs. Enabling internal cache mem-
EdhInitializing the fl oppy drive.
EehLooking for a fl oppy diskette in drive A:. Reading the fi rst sector of the diskette.
EfhA read error occurred while reading the fl oppy drive in drive A:.
F0hNext, searching for the AMIBOOT.ROM fi le in the root directory.
F1hThe AMIBOOT.ROM fi le is not in the root directory.
F2hNext, reading and analyzing the fl oppy diskette FAT to fi nd the clusters occupied
F3hNext, reading the AMIBOOT.ROM fi le, cluster by cluster.
F4hThe AMIBOOT.ROM fi le is not the correct size.
F5hNext, disabling internal cache memory.
FBhNext, detecting the type of fl ash ROM.
FChNext, erasing the fl ash ROM.
512 KB memory test.
ory.
by the AMIBOOT.ROM fi le.
FDhNext, programming the fl ash ROM.
FFhFlash ROM programming was successful. Next, restarting the system BIOS.
B-2
Page 97
Appendix B: BIOS POST Checkpoint Codes
B-3 Uncompressed Initialization Codes
The following runtime checkpoint codes are listed in order of execution.
These codes are uncompressed in F0000h shadow RAM.
Checkpoint Code Description
03hThe NMI is disabled. Next, checking for a soft reset or a power on condition.
05hThe BIOS stack has been built. Next, disabling cache memory.
06hUncompressing the POST code next.
07hNext, initializing the CPU and the CPU data area.
08hThe CMOS checksum calculation is done next.
0AhThe CMOS checksum calculation is done. Initializing the CMOS status register for
0BhThe CMOS status register is initialized. Next, performing any required initialization
0ChThe keyboard controller input buffer is free. Next, issuing the BAT command to the
0EhThe keyboard controller BAT command result has been verifi ed. Next, performing
0FhThe initialization after the keyboard controller BAT command test is done. The key-
10hThe keyboard controller command byte is written. Next, issuing the Pin 23 and 24
11hNext, checking if <End or <Ins> keys were pressed during power on. Initializing
12hNext, disabling DMA controllers 1 and 2 and interrupt controllers 1 and 2.
13hThe video display has been disabled. Port B has been initialized. Next, initializing
14hThe 8254 timer test will begin next.
19hNext, programming the fl ash ROM.
1AhThe memory refresh line is toggling. Checking the 15 second on/off time next.
date and time next.
before the keyboard BAT command is issued.
keyboard controller.
any necessary initialization after the keyboard controller BAT command test.
board command byte is written next.
blocking and unblocking command.
CMOS RAM if the Initialize CMOS RAM in every boot AMIBIOS POST option was
set in AMIBCP or the <End> key was pressed.
the chipset.
2BhPassing control to the video ROM to perform any required confi guration before the
video ROM test.
2ChAll necessary processing before passing control to the video ROM is done. Look-
ing for the video ROM next and passing control to it.
2DhThe video ROM has returned control to BIOS POST. Performing any required pro-
cessing after the video ROM had control
23hReading the 8042 input port and disabling the MEGAKEY Green PC feature next.
Making the BIOS code segment writable and performing any necessary confi guration before initializing the interrupt vectors.
24hThe confi guration required before interrupt vector initialization has completed. In-
terrupt vector initialization is about to begin.
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Checkpoint Code Description
25hInterrupt vector initialization is done. Clearing the password if the POST DIAG
27hAny initialization before setting video mode will be done next.
28hInitialization before setting the video mode is complete. Confi guring the mono-
2AhBus initialization system, static, output devices will be done next, if present. See the
2EhCompleted post-video ROM test processing. If the EGA/VGA controller is not
2FhThe EGA/VGA controller was not found. The display memory read/write test is
30hThe display memory read/write test passed. Look for retrace checking next.
31hThe display memory read/write test or retrace checking failed. Performing the alter-
32hThe alternate display memory read/write test passed. Looking for alternate display
34hVideo display checking is over. Setting the display mode next.
37hThe display mode is set. Displaying the power on message next.
38hInitializing the bus input, IPL, general devices next, if present. See the last page of
39hDisplaying bus initialization error messages. See the last page of this chapter for
switch is on.
chrome mode and color mode settings next.
last page for additional information.
found, performing the display memory read/write test next.
about to begin.
nate display memory read/write test next.
retrace checking next.
this chapter for additional information.
additional information.
3AhThe new cursor position has been read and saved. Displaying the Hit <DEL> mes-
3BhThe Hit <DEL> message is displayed. The protected mode memory test is about
40hPreparing the descriptor tables next.
42hThe descriptor tables are prepared. Entering protected mode for the memory test
43hEntered protected mode. Enabling interrupts for diagnostics mode next.
44hInterrupts enabled if the diagnostics switch is on. Initializing data to check memory
45hData initialized. Checking for memory wraparound at 0:0 and fi nding the total sys-
46hThe memory wraparound test is done. Memory size calculation has been done.
47hThe memory pattern has been written to extended memory. Writing patterns to the
48hPatterns written in base memory. Determining the amount of memory below 1 MB
49hThe amount of memory below 1 MB has been found and verifi ed.
4BhThe amount of memory above 1 MB has been found and verifi ed. Checking for a
sage next.
to start.
next.
wraparound at 0:0 next.
tem memory size next.
Writing patterns to test memory next.
base 640 KB memory next.
next.
soft reset and clearing the memory below 1 MB for the soft reset next. If this is a
power on situation, going to checkpoint 4Eh next.
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Checkpoint Code Description
Appendix B: BIOS POST Checkpoint Codes
4ChThe memory below 1 MB has been cleared via a soft reset. Clearing the memory
4DhThe memory above 1 MB has been cleared via a soft reset. Saving the memory size
4EhThe memory test started, but not as the result of a soft reset. Displaying the fi rst
4FhThe memory size display has started. The display is updated during the memory
50hThe memory below 1 MB has been tested and initialized. Adjusting the displayed
51hThe memory size display was adjusted for relocation and shadowing.
52hThe memory above 1 MB has been tested and initialized. Saving the memory size
53hThe memory size information and the CPU registers are saved. Entering real mode
54hShutdown was successful. The CPU is in real mode. Disabling the Gate A20 line,
57hThe A20 address line, parity, and the NMI are disabled. Adjusting the memory size
58hThe memory size was adjusted for relocation and shadowing. Clearing the Hit
59hThe Hit <DEL> message is cleared. The <WAIT...> message is displayed. Starting
above 1 MB next.
next. Going to checkpoint 52h next.
64 KB memory size next.
test. Performing the sequential and random memory test next.
memory size for relocation and shadowing next.
information next.
next.
parity, and the NMI next.
depending on relocation and shadowing next.
<DEL> message next.
the DMA and interrupt controller test next.
60hThe DMA page register test passed. Performing the DMA Controller 1 base register
62hThe DMA controller 1 base register test passed. Performing the DMA controller 2
65hThe DMA controller 2 base register test passed. Programming DMA controllers 1
66hCompleted programming DMA controllers 1 and 2. Initializing the 8259 interrupt