The information in this User’s Manual has been carefully reviewed and is believed to be accurate.
The vendor assumes no responsibility for any inaccuracies that may be contained in this document,
makes no commitment to update or to keep current the information in this manual, or to notify any
person or organization of the updates. Please Note: For the most up-to-date version of this
manual, please see our web site at www.supermicro.com.
Super Micro Computer, Inc. ("Supermicro") reserves the right to make changes to the product
described in this manual at any time and without notice. This product, including software, if any,
and documentation may not, in whole or in part, be copied, photocopied, reproduced, translated or
reduced to any medium or machine without prior written consent.
IN NO EVENT WILL SUPERMICRO BE LIABLE FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL,
SPECULATIVE OR CONSEQUENTIAL DAMAGES ARISING FROM THE USE OR INABILITY TO
USE THIS PRODUCT OR DOCUMENTATION, EVEN IF ADVISED OF THE POSSIBILITY OF
SUCH DAMAGES. IN PARTICULAR, SUPERMICRO SHALL NOT HAVE LIABILITY FOR ANY
HARDWARE, SOFTWARE, OR DATA STORED OR USED WITH THE PRODUCT, INCLUDING THE
COSTS OF REPAIRING, REPLACING, INTEGRATING, INSTALLING OR RECOVERING SUCH
HARDWARE, SOFTWARE, OR DATA.
Any disputes arising between manufacturer and customer shall be governed by the laws of Santa
Clara County in the State of California, USA. The State of California, County of Santa Clara shall
be the exclusive venue for the resolution of any such disputes. Supermicro's total liability for
all claims will not exceed the price paid for the hardware product.
FCC Statement: This equipment has been tested and found to comply with the limits for a Class
A digital device pursuant to Part 15 of the FCC Rules. These limits are designed to provide
reasonable protection against harmful interference when the equipment is operated in a commercial
environment. This equipment generates, uses, and can radiate radio frequency energy and, if not
installed and used in accordance with the manufacturer’s instruction manual, may cause harmful
interference with radio communications. Operation of this equipment in a residential area is likely
to cause harmful interference, in which case you will be required to correct the interference at your
own expense.
California Best Management Practices Regulations for Perchlorate Materials: This Perchlorate
warning applies only to products containing CR (Manganese Dioxide) Lithium coin cells. “Perchlorate
Material-special handling may apply. See www.dtsc.ca.gov/hazardouswaste/perchlorate”
WARNING: Handling of lead solder materials used in this
product may expose you to lead, a chemical known to
the State of California to cause birth defects and other
reproductive harm.
Manual Revision 1.0
Release Date: Nov. 27, 2007
Unless you request and receive written permission from SUPER MICRO COMPUTER, INC., you
may not copy any part of this document.
Information in this document is subject to change without notice. Other products and companies
referred to herein are trademarks or registered trademarks of their respective companies or mark
holders.
(*Notes: i. DIMM slot# specified: DIMM slot to be populated; “---“: DIMM
slot not to be populated. ii. Both FBD 533 MHz and 667MHz DIMMs are
supported; however, you need to use the memory modules of the same
speed and of the same type on a motherboard. iii. Interleaved memory is
supported when pairs of DIMM modules are installed. To optimize memory
performance, please populate pairs of memory modules in both Branch 0
and Branch 1. iv. For memory to work properly, you need to follow the
restrictions listed above. )
Bank 1
(Channel 0)
---
1A
---
Bank 2
(Channel 1)
2A
2A
---------------
---
Bank 3
(Channel 2)
3A
---
Bank 4
(Channel 3)
4A
---
Note 2: Both 1.5V and 1.8V memor y modules are supported. However, do not
use different memory modules with different speeds, voltages, sizes or types on
the same motherboard.
Note 3: Due to memory allocation to system devices, memory remaining avail-
2-6
Page 25
Chapter 2: Installation
able for operational use will be reduced when 4 GB of RAM is used. The reduction
in memory availability is disproportional. (Refer to the Memory Availability Table
below for details.
Possible System Memory Allocation & Availability
System DeviceSizePhysical Memory
Firmware Hub
fl ash memory
(System BIOS)
Local APIC4 KB3.003.99
Area Reserved
for the chipset
I/O APIC (4
Kbytes)
PCI Enumeration
Area 1
PCI Express (256
MB)
PCI Enumeration
Area 2 (if needed)
-Aligned on 256MB boundary-
VGA Memory16 MB2.852.85
TSEG1 MB2.842.84
Memory available
to OS & other
applications
1 MB3.003.99
2 MB3.003.99
4 KB3.003.99
256 MB3.003.76
256 MB3.003.51
512 MB3.003.01
Remaining (-Available)
(3 GB Total System Memory)
2.842.84
Physical Memory
Remaining (-Available)
(4 GB Total System Memory)
To I n stall: Insert module
vertically and press down
until it snaps into place.
Pay attention to the alignment notch at the bottom.
To Remov e :
Use your thumbs to
gently push the release
tabs near both ends of
the module. This should
release it from the slot.
Installing and Removing DIMMs
X7DWT-INF
2 FBD
2 FBD
2-7
Page 26
X7DWT/X7DWT-INF User's Manual
2-4 Control Panel Connectors/IO Ports
The I/O ports are color coded in conformance with the PC 99 specifi cation. See
Figure 2-3 below for the colors and locations of the various I/O ports.
Back Panel Connectors/IO Ports
X7DWT-INF
2
1
3
4
Back Panel I/O Port Locations and Defi nitions
Back Panel Connectors
1. Back Panel USB Port 0
2. Back Panel USB Port 1
3. Gigabit LAN 1
4. Gigabit LAN 2
5. COM Port 2
6. VGA Port (Blue)
7. Infi niBand Connector (for
X7DWT-INF only)
(See Section 2-5 for details.)
5
67
2-8
Page 27
Chapter 2: Installation
Front Control Panel
JF1 contains header pins for various buttons and indicators that are normally
located on a control panel at the front of the chassis. These connectors are de-
signed specifi cally for use with Supermicro server chassis. See Figure 2-4 for
the descriptions of the various control panel buttons and LED indicators. Refer
to the following section for descriptions and pin defi nitions.
X7DWT-INF
1920
Ground
NMI
X
Power LED
HDD LED
NIC1 LED
NIC2 LED
OH/Fan Fail LED
PWR Fail LED
Ground
Ground
JF1 Header Pins
X
Vcc
Vcc
Vcc
Vcc
Vcc
Vcc
Reset
PWR
2
1
Reset Button
Power Button
2-9
Page 28
X7DWT/X7DWT-INF User's Manual
Front Control Panel Pin Defi nitions
NMI Button
The non-maskable interrupt button
header is located on pins 19 and 20
of JF1. Refer to the table on the right
for pin defi nitions.
Power LED
The Power LED connection is located
on pins 15 and 16 of JF1. Refer to the
table on the right for pin defi nitions.
NMI Button
Pin Defi nitions (JF1)
Pin# Defi nition
19Control
20Ground
Power LED
Pin Defi nitions (JF1)
Pin# Defi nition
15+5V
16Ground
A. NMI
B. PWR LED
X7DWT-INF
2-10
Ground
X
B
Power LED
HDD LED
NIC1 LED
NIC2 LED
OH/Fan Fail LED
PWR Fail LED
Ground
Ground
1920
NMI
A
X
Vcc
Vcc
Vcc
Vcc
Vcc
Vcc
Reset
Reset Button
Power Button
PWR
2
1
Page 29
HDD LED
The HDD LED connection is located
on pins 13 and 14 of JF1. Attach a
hard drive LED cable here to display
disk activity (for any hard drives on
the system, including Serial ATA).
See the table on the right for pin
defi nitions.
NIC1/NIC2 LED Indicators
Chapter 2: Installation
HDD LED
Pin Defi nitions (JF1)
Pin# Defi nition
13+5V
14HD Active
The NIC (Network Interface Control-
ler) LED connection for GLAN port1
is located on pins 11 and 12 of JF1
and the LED connection for GLAN
Port2 is on Pins 9 and 10. Attach the
NIC LED cables to display network
activity. Refer to the table on the right
for pin defi nitions.
A. HDD LED
B. NIC1 LED
C. NIC2 LED
Pin Defi nitions (JF1)
Pin# Defi nition
9/11Vcc
10/12Ground
Ground
X
Power LED
GLAN1/2 LED
1920
NMI
X
Vcc
X7DWT-INF
2-11
HDD LED
A
B
NIC1 LED
NIC2 LED
C
OH/Fan Fail LED
PWR Fail LED
Ground
Ground
Vcc
Vcc
Vcc
Vcc
Vcc
Reset
Reset Button
Power Button
PWR
2
1
Page 30
X7DWT/X7DWT-INF User's Manual
Overheat/Fan Fail LED (OH)
Connect an LED to the OH/Fan Fail
connection on pins 7 and 8 of JF1
to provide advanced warnings of
chassis overheating or fan failure.
Refer to the table on the right for pin
defi nitions.
Power Fail LED
The Power Fail LED connection is
located on pins 5 and 6 of JF1. Re-
fer to the table on the right for pin
defi nitions.
OH/Fan Fail LED
Pin Defi nitions (JF1)
Pin# Defi nition
7Vcc
8Ground
OH/Fan Fail Indicator
Status
State Defi nition
OffNormal
OnOverheat
Flashing
Fan Fail
PWR Fail LED
Pin Defi nitions (JF1)
Pin# Defi nition
5Vcc
6Ground
A. OH/Fan Fail LED
B. PWR Supply Fail
X7DWT-INF
2-12
Ground
X
Power LED
HDD LED
NIC1 LED
NIC2 LED
OH/Fan Fail LED
A
B
PWR Fail LED
Ground
Ground
1920
NMI
X
Vcc
Vcc
Vcc
Vcc
Vcc
Vcc
Reset
Reset Button
Power Button
PWR
1
2
Page 31
Reset Button
The Reset Button connection is located
on pins 3 and 4 of JF1. Attach it to the
hardware reset switch on the computer
case. Refer to the table on the right for
pin defi nitions.
Power Button
The Power Button connection is located
on pins 1 and 2 of JF1. Momentarily
contacting both pins will power on/off
the system. This button can also be
confi gured to function as a suspend but-
ton (with a setting in BIOS - see Chapter
4). To turn off the power when set to
suspend mode, press the button for at
least 4 seconds. Refer to the table on
the right for pin defi nitions.
Chapter 2: Installation
Reset Button
Pin Defi nitions (JF1)
Pin# Defi nition
3Reset
4Ground
Power Button
Pin Defi nitions (JF1)
Pin# Defi nition
1Signal
2+3V Standby
A. Reset Button
B. PWR Button
X7DWT-INF
2-13
Ground
Power LED
HDD LED
NIC1 LED
NIC2 LED
OH/Fan Fail LED
PWR Fail LED
Ground
Ground
1920
NMI
X
2
X
Vcc
Vcc
Vcc
Vcc
Vcc
Vcc
Reset
Reset Button
A
Power Button
PWR
1
B
Page 32
X7DWT/X7DWT-INF User's Manual
2-5 Connecting Cables
20-pin Proprietary Power
Connectors
ATX Power 20-pin Connector
Pin Defi nitions
Pin# Defi nition Pin # Defi nition
There are two 20-pin main power supply
connectors (JWR1, JWR2) and a 4-pin
auxiliary power connector (JP10) on the
motherboard. These power connectors
meet the SSI EPS 12V specifi cation. For
power supply to work properly, please
follow the instructions given below. See
the table on the right for pin defi nitions.
Also refer to the layout below for the
PWR connector locations.
11PS On1Ground
125VSB2Ground
13Ground3Ground
14Ground4Ground
15Ground5Ground
16NC26NC1
1712V712V
1812V812V
1912V912V
2012V1012V
Note 1: You cannot use both 20-pin power connectors located at JWR1 (the right
side connector) and JWR2 (the left side connector) as input power supply connec-
tors at the same time. Only one connector can be used for input power supply to
the motherboard at a time. For proper use of these proprietary PWR Connectors,
please customize your PWR cables based on the SMC PWR Connector Pin-Out
Defi nitions listed above.
Note 2: The black square (dot) on a power connector indicates the location of Pin
1. (See the pictures below for the power cable connections.)
C
A
20-Pin PWR
20-Pin PWR
PWSMB
FAN1/2
FAN3/4
FAN5/6
FAN7/8
4-Pin Aux. PWR
5400
Intel
North Bridge
CPLD
LE1
FP CTRL
JWD
CPU 1
X7DWT-INF
CPU 2
USB0/1
SIMSO IPMI
LAN1
LAN
LAN2
CTRL
COM1
J4
LE3
LE2
VGA
Infini- Band
JBT1
Battery
InfiniBand
CTRL
CTRL
JPG1
VGA
JSPK
S I/O
SMB
JWOL
PCI-Express x16
BANK4
BANK3
BANK2BANK1
JPL1
Intel ESB2
South Bridge
J_VMEM
BIOS
SATA3
SGPIO
SATA2
DIMM4B
DIMM4A
DIMM3B
DIMM3A
DIMM2B
DIMM2A
DIMM1B
DIMM1A
JPL2
SATA1
FPUSB2/3
SATA0
JL1
A. The right side 20-pin
PWR connector: (JWR1)
B. The left side 20-pin
PWR connector: (JWR2)
C. 20-pin PWR Cable
B
2-14
Page 33
4-pin Auxiliary Power
Connector
In addition to two 20-pin power con-
nectors, a 4-pin 12V PWR supply is
located at JP10 on the motherboard.
This power connector is used to
provide power supply to hard drive
disks. Refer to the layout below for
the location.
Note1: The 4-pin Auxiliary Power
Connector is used for power supply
output to the HDDs only.
Note 2: The black square (dot) on the
power connector indicates the loca-
tion of Pin 1. (See the pictures below
for the power cable connections.)
Chapter 2: Installation
4-Pin Power
Pin Defi nitions
Pin # Defi nition
1+12V
2Ground
3Ground
5+5V
Required Connection
D
C
A
B
B
20-Pin PWR
20-Pin PWR
FAN1/2
FAN3/4
FAN5/6
FAN7/8
A
4-Pin Aux. PWR
PWSMB
5400
Intel
North Bridge
CPLD
LE1
FP CTRL
JWD
CPU 1
X7DWT-INF
CPU 2
USB0/1
SIMSO IPMI
LAN1
LAN
LAN2
CTRL
COM1
J4
LE3
LE2
VGA
Infini- Band
JBT1
Battery
InfiniBand
CTRL
CTRL
JSPK
JPG1
VGA
S I/O
SMB
JWOL
PCI-Express x16
BANK4
BANK3
BANK2BANK1
JPL1
Intel ESB2
South Bridge
J_VMEM
BIOS
SATA3
SGPIO
SATA2
DIMM4B
DIMM4A
DIMM3B
DIMM3A
DIMM2B
DIMM2A
DIMM1B
DIMM1A
JPL2
SATA1
FPUSB2/3
SATA0
JL1
A. 4-pin Aux. PWR
B. One Male (Receptacle)
PWR Connector
C.& D. Two Female PWR
Connectors
2-15
Page 34
X7DWT/X7DWT-INF User's Manual
Universal Serial Bus (USB)
There are four USB 2.0 (Universal
Serial Bus) ports on the motherboard.
Two of them are Back Panel USB
ports (JUSB1: USB#0/1), and the
other two are front panel accessible
USB headers (JUSB2: USB#2/3).
See the tables on the right for pin
defi nitions.
Chassis Intrusion
A Chassis Intrusion header (JL1) is
located on the motherboard. Attach
an appropriate cable from the chassis
to inform you of a chassis intrusion
when the chassis is opened.
Back Panel USB
(USB0/1)
Pin# Defi nitions
1+5V
2PO-
3PO+
4Ground
5N/A
Chassis Intrusion
Pin Defi nitions (JL1)
Pin# Defi nition
1Intrusion Input
2Ground
Front Panel USB
(USB2/3)
Pin# Defi nition
1Vcc
2Data-
3Data+
4Ground
5NA
A. Backpanel USB 0-1
B. Front Panel USB 2-3
C. Chassis Intrusion
A
20-Pin PWR
4-Pin Aux. PWR
PWSMB
FAN1/2
FAN3/4
FAN5/6
FAN7/8
5400
LE1
FP CTRL
JWD
CPU 1
X7DWT-INF
CPU 2
20-Pin PWR
SIMSO IPMI
LAN
CTRL
VGA
CTRL
JSPK
JPG1
J_VMEM
S I/O
SMB
JWOL
PCI-Express x16
BANK4
BANK3
BANK2BANK1
JPL1
Intel ESB2
South Bridge
SATA3
SGPIO
SATA2
BIOS
USB0/1
LAN1
LAN2
COM1
JBT1
Battery
VGA
InfiniBand
J4
Infini- Band
CTRL
LE3
LE2
JPL2
SATA1
SATA0
DIMM4B
DIMM4A
DIMM3B
DIMM3A
DIMM2B
DIMM2A
DIMM1B
DIMM1A
B
FPUSB2/3
Intel
North Bridge
CPLD
C
JL1
2-16
Page 35
Fan Headers
The X7DWT/X7DWT-INF has four 6-pin
proprietary fan headers. Each fan header
supports two 3-pin fans. See the table on
the right for pin defi nitions.
Note 1: The onboard fan speed is controlled
by the CPU die temperature.
Note 2: The white dot on each fan header
indicates the location of Pin 1.
Serial Port
A serial port connector (COM 1) is located
on the Backpanel. See the table on the right
for pin defi nitions.
Chapter 2: Installation
Fan Header
Pin Defi nitions
Pin # Defi nitionPin # Defi nition
1PWR (DC
Speed CTRL)
2Tachometer for
Fan 1,3 or 5
3Ground6PWR (DC
Pin # Defi nitionPin # Defi nition
1CD6DSR
2RD7 RTS
3TD8CTS
4DTR9RI
5Ground10NC
4Ground
5Tachometer for
Fan 2,4 or 6
Speed CTRL)
Serial Port
Pin Defi nitions
A. Fans 12
B. Fan 3/4
C. Fan 5/6
D. Fan 7/8
E. COM 2 Port
20-Pin PWR
4-Pin Aux. PWR
PWSMB
FAN1/2
FAN3/4
FAN5/6
FAN7/8
A
B
C
D
5400
LE1
FP CTRL
JWD
CPU 1
X7DWT-INF
CPU 2
20-Pin PWR
SIMSO IPMI
LAN
CTRL
VGA
CTRL
JSPK
JPG1
J_VMEM
S I/O
SMB
JWOL
PCI-Express x16
BANK4
BANK3
BANK2BANK1
JPL1
Intel ESB2
South Bridge
SATA3
SGPIO
SATA2
BIOS
USB0/1
LAN1
LAN2
E
COM1
JBT1
Battery
VGA
InfiniBand
J4
Infini- Band
CTRL
LE3
LE2
JPL2
SATA1
SATA0
DIMM4B
DIMM4A
DIMM3B
DIMM3A
DIMM2B
DIMM2A
DIMM1B
DIMM1A
FPUSB2/3
Intel
North Bridge
CPLD
JL1
2-17
Page 36
X7DWT/X7DWT-INF User's Manual
VGA Connector
A VGA connector is located at JVGA1
on the I/O Backplane. Refer to the board
layout below for the location.
SMB
A System Management Bus header
is located at J18. Connect the ap-
propriate cable here to utilize SMB
on your system.
SMB Header
Pin Defi nitions
Pin# Defi nition
1Data
2Ground
3Clock
4No Connection
A. VGA
B. SMB
20-Pin PWR
4-Pin Aux. PWR
PWSMB
FAN1/2
FAN3/4
FAN5/6
FAN7/8
5400
LE1
FP CTRL
JWD
CPU 1
X7DWT-INF
CPU 2
20-Pin PWR
SIMSO IPMI
LAN
CTRL
VGA
CTRL
JSPK
JPG1
J_VMEM
S I/O
B
SMB
JWOL
PCI-Express x16
BANK4
BANK3
BANK2BANK1
JPL1
Intel ESB2
South Bridge
SATA3
SGPIO
SATA2
BIOS
USB0/1
LAN1
LAN2
COM1
JBT1
A
Battery
VGA
InfiniBand
J4
Infini- Band
CTRL
LE3
LE2
JPL2
SATA1
SATA0
DIMM4B
DIMM4A
DIMM3B
DIMM3A
DIMM2B
DIMM2A
DIMM1B
DIMM1A
FPUSB2/3
Intel
North Bridge
CPLD
JL1
2-18
Page 37
Chapter 2: Installation
Power SMB (I2 C) Connector
Power SMB (I2 C) Connector (J17)
monitors the status of the power
supply, fan speed, and system tem-
perature. See the table on the right
for pin defi nitions.
Wake-On-LAN
The Wake-On-LAN header is located
at JWOL on the motherboard. See
the table on the right for pin defi ni-
tions. (You must also have a LAN
card with a Wake-On-LAN connector
and cable to use this feature.)
PWR SMB
Pin Defi nitions
Pin# Defi nition
1Clock
2Data
3PWR Fail
4Ground
5+3.3V
Wake-On-LAN
Pin Defi nitions
Pin# Defi nition
1+5V Standby
2Ground
3Wake-up
A. PWR SMB
B. Wake-on-LAN
20-Pin PWR
4-Pin Aux. PWR
PWSMB
FAN1/2
FAN3/4
FAN5/6
FAN7/8
A
5400
LE1
FP CTRL
JWD
CPU 1
X7DWT-INF
CPU 2
20-Pin PWR
SIMSO IPMI
LAN
CTRL
VGA
CTRL
JSPK
JPG1
J_VMEM
S I/O
SMB
JWOL
B
PCI-Express x16
BANK4
BANK3
BANK2BANK1
JPL1
Intel ESB2
South Bridge
SATA3
SGPIO
SATA2
BIOS
USB0/1
LAN1
LAN2
COM1
JBT1
Battery
VGA
InfiniBand
J4
Infini- Band
CTRL
LE3
LE2
JPL2
SATA1
SATA0
DIMM4B
DIMM4A
DIMM3B
DIMM3A
DIMM2B
DIMM2A
DIMM1B
DIMM1A
FPUSB2/3
Intel
North Bridge
CPLD
JL1
2-19
Page 38
X7DWT/X7DWT-INF User's Manual
GLAN 1/2 (Giga-bit
Ethernet) Ports
Two G-bit Ethernet ports are located
on the IO backplane. These ports
accept RJ45 type cables.
SGPIO Header
A SGPIO (Serial General Purpose
Input/Output) header is located at
J29 on the motherboard. This header
supports serial link interfaces for the
onboard SATA connectors. See the
table on the right for pin defi nitions.
Refer to the board layout below for
the location.
GLAN1
GLAN2
SGPIO
Pin Defi nitions
Pin# Defi nition Pin Defi nition
2NC1 NC
4SATA_SB_
3GND
SDATAOUT0
6GND5SATA_SB_
SLOAD
8NC7SATA_SB_
Clock
Note: NC= No Connections
A. GLAN 1
B. GLAN 2
C. SGPIO
20-Pin PWR
4-Pin Aux. PWR
PWSMB
FAN1/2
FAN3/4
FAN5/6
FAN7/8
5400
LE1
FP CTRL
JWD
CPU 1
X7DWT-INF
CPU 2
20-Pin PWR
SIMSO IPMI
LAN
CTRL
VGA
CTRL
JSPK
JPG1
J_VMEM
S I/O
SMB
JWOL
PCI-Express x16
BANK4
BANK3
BANK2BANK1
JPL1
Intel ESB2
South Bridge
C
SATA3
SGPIO
SATA2
BIOS
USB0/1
A
LAN1
B
LAN2
COM1
JBT1
Battery
VGA
InfiniBand
J4
Infini- Band
CTRL
LE3
LE2
JPL2
SATA1
SATA0
DIMM4B
DIMM4A
DIMM3B
DIMM3A
DIMM2B
DIMM2A
DIMM1B
DIMM1A
FPUSB2/3
Intel
North Bridge
CPLD
JL1
2-20
Page 39
Chapter 2: Installation
Speaker
The Speaker header is located at
JSPK on the motherboard. See the
table on the right for pin defi nitions.
Speaker
Pin Defi nitions
Pin# Defi nition
1-
2+
A. Speaker
20-Pin PWR
4-Pin Aux. PWR
PWSMB
FAN1/2
FAN3/4
FAN5/6
FAN7/8
5400
LE1
FP CTRL
JWD
CPU 1
X7DWT-INF
CPU 2
20-Pin PWR
SIMSO IPMI
LAN
CTRL
VGA
CTRL
JSPK
JPG1
J_VMEM
S I/O
A
JWOL
PCI-Express x16
SMB
BANK4
BANK3
BANK2BANK1
JPL1
Intel ESB2
South Bridge
SATA3
SGPIO
SATA2
BIOS
USB0/1
LAN1
LAN2
COM1
JBT1
Battery
VGA
InfiniBand
J4
Infini- Band
CTRL
LE3
LE2
JPL2
SATA1
SATA0
DIMM4B
DIMM4A
DIMM3B
DIMM3A
DIMM2B
DIMM2A
DIMM1B
DIMM1A
FPUSB2/3
Intel
North Bridge
CPLD
JL1
2-21
Page 40
X7DWT/X7DWT-INF User's Manual
2-6 Jumper Settings
Explanation of
Jumpers
To modify the operation of the
motherboard, jumpers can be used
to choose between optional settings.
Jumpers create shorts between two
pins to change the function of the
connector. Pin 1 is identifi ed with a
square solder pad on the printed circuit
board. See the motherboard layout
pages for jumper locations.
Note: On two pin jumpers, "Closed"
means the jumper is on and "Open"
Connector
Pins
Jumper
Cap
Setting
3 2 1
3 2 1
Pin 1-2 short
means the jumper is off the pins.
GLAN Enable/Disable
JPL1/JPL2 enable or disable GLAN
Port1/GLAN Port2 on the mother-
board. See the table on the right for
jumper settings. The default setting
is Enabled.
LE2
J4
COM1
VGA
LE3
USB0/1
JBT1
InfiniBand
Infini- Band
LAN1
LAN2
Battery
CTRL
BIOS
SIMSO IPMI
LAN
CTRL
VGA
CTRL
JSPK
JPG1
J_VMEM
S I/O
SMB
JWOL
PCI-Express x16
BANK4
BANK3
BANK2BANK1
A
JPL1
Intel ESB2
South Bridge
SATA3
SGPIO
SATA2
DIMM4B
DIMM4A
DIMM3B
DIMM3A
DIMM2B
DIMM2A
DIMM1B
B
DIMM1A
JPL2
SATA1
FPUSB2/3
SATA0
GLAN Enable
Jumper Settings
Pin# Defi nition
OpenEnabled (default)
2-3Disabled
A. GLAN Port1 Enable
B. GLAN Port2 Enable
LE1
FP CTRL
JWD
5400
Intel
North Bridge
CPLD
JL1
CPU 1
X7DWT-INF
CPU 2
20-Pin PWR
20-Pin PWR
4-Pin Aux. PWR
PWSMB
FAN1/2
FAN3/4
FAN5/6
FAN7/8
2-22
Page 41
Chapter 2: Installation
CMOS Clear
JBT1 is used to clear CMOS. Instead of pins, this "jumper" consists of contact
pads to prevent the accidental clearing of CMOS. To clear CMOS, use a metal
object such as a small screwdriver to touch both pads at the same time to short the
connection. Always remove the AC power cord from the system before clearing
CMOS. Note: You must completely shut down the system, remove the AC power
cord and then short JBT1 to clear CMOS.
Watch Dog Enable/Disable
Watch Dog is a system monitor that can reboot
the system when a software application hangs.
Close pins 1-2 to reset the system if an applica-
tion hangs. Close pins 2-3 to generate a non-
maskable interrupt signal for the application that
hangs. See the table on the right for jumper set-
tings. Watch Dog must also be enabled in the
BIOS.
SIMSO IPMI
LAN
CTRL
VGA
CTRL
JSPK
JPG1
J_VMEM
S I/O
SMB
JWOL
PCI-Express x16
BANK4
BANK3
BANK2BANK1
JPL1
Intel ESB2
South Bridge
SATA3
SGPIO
SATA2
BIOS
USB0/1
LAN1
LAN2
COM1
JBT1
A
Battery
VGA
InfiniBand
J4
Infini- Band
CTRL
LE3
LE2
JPL2
SATA1
SATA0
DIMM4B
DIMM4A
DIMM3B
DIMM3A
DIMM2B
DIMM2A
DIMM1B
DIMM1A
FPUSB2/3
5400
Intel
North Bridge
CPLD
JL1
LE1
FP CTRL
B
JWD
Watch Dog
Jumper Settings (JWD)
Jumper Setting Defi nition
Pins 1-2Reset
(default)
Pins 2-3NMI
OpenDisabled
A. Clear CMOS
B. Watch Dog Enable
PWSMB
20-Pin PWR
FAN1/2
CPU 1
FAN3/4
X7DWT-INF
CPU 2
FAN5/6
FAN7/8
4-Pin Aux. PWR
20-Pin PWR
2-23
Page 42
X7DWT/X7DWT-INF User's Manual
VGA Enable/Disable
JPG1 allows you to enable or disable the
VGA port. The default position is on pins
1 and 2 to enable VGA. See the table on
the right for jumper settings.
VGA Enable/Disable
Jumper Settings
Both Jumpers Defi nition
Pins 1-2Enabled
Pins 2-3Disabled
LE2
J4
COM1
VGA
LE3
USB0/1
JBT1
InfiniBand
Infini- Band
CTRL
LAN1
LAN2
Battery
BIOS
SIMSO IPMI
LAN
CTRL
VGA
CTRL
JSPK
JPG1
J_VMEM
S I/O
SMB
A
JWOL
PCI-Express x16
BANK4
BANK3
BANK2BANK1
JPL1
Intel ESB2
South Bridge
SATA3
SGPIO
SATA2
JPL2
SATA1
SATA0
DIMM4B
DIMM4A
DIMM3B
DIMM3A
DIMM2B
DIMM2A
DIMM1B
DIMM1A
FPUSB2/3
A. VGA Enabled
LE1
FP CTRL
JWD
5400
Intel
North Bridge
CPLD
JL1
CPU 1
X7DWT-INF
CPU 2
20-Pin PWR
20-Pin PWR
4-Pin Aux. PWR
PWSMB
FAN1/2
FAN3/4
FAN5/6
FAN7/8
2-24
Page 43
2-7 Onboard Indicators
GLAN LEDs
There are two GLAN ports on the moth-
erboard. Each Gigabit Ethernet LAN port
has two LEDs. The yellow LED indicates
activity, while Link LED may be green,
amber or off to indicate the speed of the
connection. See the tables at right for more
information.
Chapter 2: Installation
Link
LED
Rear View: (When viewing it from the
rear side of the system)
GLAN Activity Indicator
Settings
Color Status Defi nition
YellowFlashingActive
GLAN Link LED Indicator
Settings
LED Color Defi nition
OffNo Connection or 10 Mbps
Green100 Mbps
Amber1 Gbps
Activity
LED
Onboard Power LED (LE1)
There is an Onboard Power LED (LE1)
located on the motherboard. When the
green light is on or fl ashing, the power
is connected. Unplug the power cable
before removing and changing any com-
ponents. See the layout below for the
LED location.
SIMSO IPMI
LAN
CTRL
VGA
CTRL
JSPK
JPG1
J_VMEM
S I/O
SMB
JWOL
PCI-Express x16
BANK4
BANK3
BANK2BANK1
JPL1
Intel ESB2
South Bridge
SATA3
SGPIO
SATA2
BIOS
USB0/1
LAN1
A
B
LAN2
COM1
JBT1
Battery
VGA
InfiniBand
J4
Infini- Band
CTRL
LE3
LE2
JPL2
SATA1
SATA0
DIMM4B
DIMM4A
DIMM3B
DIMM3A
DIMM2B
DIMM2A
DIMM1B
DIMM1A
FPUSB2/3
JL1
5400
Intel
North Bridge
CPLD
Onboard PWR LED Indicator (LE1)
Settings
LED Color Defi nition
Green (Solid)Power On, System
On
Green (Flashing)Power Standby:
power cable connected, System: Off
Off Power: Off, power
cable: not connected
A. GLAN Port1 LEDs
B. GLAN Port2 LEDs
C. Onboard PWR LED
C
LE1
FP CTRL
JWD
CPU 1
X7DWT-INF
CPU 2
20-Pin PWR
20-Pin PWR
4-Pin Aux. PWR
PWSMB
FAN1/2
FAN3/4
FAN5/6
FAN7/8
2-25
Page 44
X7DWT/X7DWT-INF User's Manual
Infi niBand LED Indicators (LE2/
LE3)
Two Infi niBand LED Indicators (LE2/LE3)
are located on the motherboard. The
green LED (LE2) is the Infi niBand Link
LED; while the yellow LED (LE3) indicates
activity. Refer to the table on the right for
details. Also see the layout below for the
LED locations.
Infi niBand Link LED (LE2)
Settings
Color Status Defi nition
GreenSolidInfi niBand
Connected
OffOffNo connection
Infi niBand Activity LED (LE3)
Settings
Color Status Defi nition
YellowSolidInfi niBand:
Active
YellowDimInfi niBand:
Connected,
Activity: Idle
OffOffNo connection
LE2
J4
COM1
VGA
Infini- Band
LE3
USB0/1
LAN1
LAN2
JBT1
Battery
InfiniBand
B
CTRL
A
BIOS
SIMSO IPMI
LAN
CTRL
VGA
CTRL
JSPK
JPG1
J_VMEM
S I/O
SMB
JWOL
PCI-Express x16
BANK4
BANK3
BANK2BANK1
JPL1
Intel ESB2
South Bridge
SATA3
SGPIO
SATA2
JPL2
SATA1
SATA0
DIMM4B
DIMM4A
DIMM3B
DIMM3A
DIMM2B
DIMM2A
DIMM1B
DIMM1A
FPUSB2/3
A. LE2 (IB Link LED)
B. LE3 (IB Activity LED)
LE1
FP CTRL
JWD
5400
Intel
North Bridge
CPLD
JL1
CPU 1
X7DWT-INF
CPU 2
20-Pin PWR
20-Pin PWR
4-Pin Aux. PWR
PWSMB
FAN1/2
FAN3/4
FAN5/6
FAN7/8
2-26
Page 45
Chapter 2: Installation
2-8 SIMSO IPMI and Infi niBand Connections
SIMSO IPMI Slot
There is a SIMSO IPMI (Intelligent
Power Management Interfacing) Slot
on the motherboard. Refer to the lay-
out below for the IPMI Slot location.
Infi niBand Connector
An Infi niBand Connector is located at
J4 on the motherboard. Refer to the
layout below for the Infi niBand Con-
nector location.
SIMSO IPMI
LAN
CTRL
VGA
CTRL
JSPK
JPG1
J_VMEM
A
S I/O
SMB
JWOL
PCI-Express x16
BANK4
BANK3
BANK2BANK1
JPL1
Intel ESB2
South Bridge
SATA3
SGPIO
SATA2
BIOS
USB0/1
LAN1
LAN2
COM1
JBT1
Battery
VGA
InfiniBand
J4
B
Infini- Band
CTRL
LE3
LE2
JPL2
SATA1
SATA0
DIMM4B
DIMM4A
DIMM3B
DIMM3A
DIMM2B
DIMM2A
DIMM1B
DIMM1A
FPUSB2/3
A. SIMSO IPMI
B. Infi niBand Connector
LE1
FP CTRL
JWD
5400
Intel
North Bridge
CPLD
JL1
CPU 1
X7DWT-INF
CPU 2
20-Pin PWR
20-Pin PWR
4-Pin Aux. PWR
PWSMB
FAN1/2
FAN3/4
FAN5/6
FAN7/8
2-27
Page 46
X7DWT/X7DWT-INF User's Manual
Notes
2-28
Page 47
Chapter 3: Troubleshooting
Chapter 3
Troubleshooting
3-1 Troubleshooting Procedures
Use the following procedures to troubleshoot your system. If you have followed
all of the procedures below and still need assistance, refer to the ‘Technical Sup-
port Procedures’ and/or ‘Returning Merchandise for Service’ section(s) in this
chapter.
Note: Always disconnect the power cord before adding, changing or installing any
hardware components.
Before Power On
1. Make sure that there are no short circuits between the motherboard and chas-
sis.
2. Disconnect all ribbon/wire cables from the motherboard, including those for the
keyboard and mouse.
3. Remove all add-on cards.
4. Install one CPU at a time (making sure it is fully seated) and connect the
chassis speaker and the power LED to the motherboard. (Check all jumper
settings as well.)
No Power
1. Make sure that there are no short circuits between the motherboard and the
chassis.
2. Make sure that all jumpers are set to their default positions.
3. Make sure that the 115V/230V switch on the power supply is properly set.
4. Turn the power switch on and off to test the system.
5. The battery on your motherboard may be old. Check to verify that it still sup-
plies ~3VDC. If it does not, replace it with a new one.
No Video
1. If the power is on but you have no video, remove all the add-on cards and
cables.
2. Use the speaker to determine if any beep codes exist. Refer to Appendix A and
Appendix B for details on beep codes.
Losing the System’s Setup Confi guration
1. Make sure that you are using a high quality power supply. A poor quality power
supply may cause the system to lose the CMOS setup information. Refer to
Section 1-6 for details on recommended power supplies.
3-1
Page 48
X7DWT/X7DWT-INF User's Manual
2. The battery on your motherboard may be old. Check to make sure that it still
supplies ~3VDC. If it does not, replace it with a new one.
3. If the above steps do not fi x the Setup Confi guration problem, contact your
vendor for repairs.
NOTE
If you are a system integrator, VAR or OEM, a POST diagnostics
card is recommended. For I/O port 80h codes, refer to App. B.
Memory Errors
1. Make sure that the DIMM modules are properly and fully installed.
2. Check if different speeds of DIMMs have been installed and verify that the BIOS
setup is confi gured for the fastest speed of RAM used. It is recommended to
use the same RAM speed for all DIMMs in the system.
3. Make sure you are using the correct type of DDR2 FBD (Fully Buffered) ECC
800/667/533 SDRAM (recommended by the manufacturer.)
4. Check for bad DIMM modules or slots by swapping a single module between
four slots and noting the results.
5. Make sure all memory modules are fully seated in their slots. As the interleaved
memory scheme is used, you must install two modules at a time, beginning
with Bank 1, then Bank 2, and so on (see Section 2-3).
6. Check the position of the 115V/230V switch on the power supply.
3-2 Technical Support Procedures
Before contacting Technical Support, please take the following steps. Also, please
note that as a motherboard manufacturer, Super Micro does not sell directly to end-
users, so it is best to fi rst check with your distributor or reseller for troubleshooting
services. They should know of any possible problem(s) with the specifi c system
confi guration that was sold to you.
1. Please go through the ‘Troubleshooting Procedures’ and 'Frequently Asked
Question' (FAQ) sections in this chapter or see the FAQs on our web site
(
http://www.supermicro.com/support/faqs/) before contacting Technical
Support.
2. BIOS upgrades can be downloaded from our web site at
com/support/bios/
Note: Not all BIOS can be fl ashed; it depends on the modifi cations to the
boot block code.
).
(http://www.supermicro.
3-2
Page 49
Chapter 3: Troubleshooting
3. If you still cannot resolve the problem, include the following information when
contacting Supermicro for technical support:
• Motherboard model and PCB revision number
• BIOS release date/version (this can be seen on the initial display when your
system fi rst boots up)
•System confi guration
An example of a Technical Support form is on our web site at http://www.
supermicro.com/support/contact.cfm/.
4. Distributors: For immediate assistance, please have your account number
ready when placing a call to our technical support department. We can be
reached by e-mail at support@supermicro.com or by fax at:(408)503-8000,
option 2.
3-3 Frequently Asked Questions
Question: What are the various types of memory that my motherboard can
support?
Answer: The X7DWT/X7DWT-INF has eight 240-pin DIMM slots that support
DDR2 FBD ECC 800/667/533 SDRAM modules. Both 1.5V and 1.8V memory
modules are supported. However, do not use different memory modules with dif-
ferent speeds, voltages, sizes or types on the same motherboard. (See Page 2-6
for detailed Information.)
Question: How do I update my BIOS?
Answer: It is recommended that you do not upgrade your BIOS if you are ex-
periencing no problems with your system. Updated BIOS fi les are located in our
web site at http://wwwwww.supermicro.com/support/bios/. Please check our BIOS
warning message and the information on how to update your BIOS on our web site.
Also, check the current BIOS revision and make sure it is newer than your BIOS
before downloading. Select your motherboard model and download the BIOS fi le
to your computer. Unzip the BIOS fi les onto a bootable fl oppy and reboot your
system. Follow the Readme.txt to continue fl ashing the BIOS.
(
to prevent possible system boot failure!)
Question: What's on the CD that came with my motherboard?
Warning: Do not shut down or reset the system while updating BIOS
Answer: The supplied compact disc has quite a few drivers and programs that
will greatly enhance your system. We recommend that you review the CD and
install the applications you need. Applications on the CD include chipset drivers,
security and audio drivers.
3-3
Page 50
X7DWT/X7DWT-INF User's Manual
3-4 Returning Merchandise for Service
A receipt or copy of your invoice marked with the date of purchase is required
before any warranty service will be rendered. You can obtain service by calling
your vendor for a Returned Merchandise Authorization (RMA) number. When
returning to the manufacturer, the RMA number should be prominently displayed
on the outside of the shipping carton, and mailed prepaid or hand-carried. Ship-
ping and handling charges will be applied for all orders that must be mailed when
service is complete.
This warranty only covers normal consumer use and does not cover damages in-
curred in shipping or from failure due to the alternation, misuse, abuse or improper
maintenance of products.
During the warranty period, contact your distributor fi rst for any product prob-
lems.
3-4
Page 51
Chapter 4: BIOS
Chapter 4
BIOS
4-1 Introduction
This chapter describes the Phoenix BIOS™ Setup utility for the X7DWT-INF. The
Phoenix ROM BIOS is stored in a fl ash chip and can be easily upgraded using a
fl o p p y d i s k - b a s e d p r o g r a m .
Note: Due to periodic changes to the BIOS, some settings may have been added
or deleted and might not yet be recorded in this manual. Please refer to the Manual
Download area of the Supermicro web site <http://www.supermicro.com> for any
changes to the BIOS that may not be refl ected in this manual.
System BIOS
The BIOS is the Basic Input Output System used in all IBM® PC, XT™, AT®, and
®
PS/2
compatible computers. The Phoenix BIOS stores the system parameters,
types of disk drives, video displays, etc. in the CMOS. The CMOS memory requires
very little electrical power. When the computer is turned off, a backup battery
provides power to the CMOS Logic, enabling it to retain system parameters. When
the computer is powered on, the computer is confi gured with the values stored in
the CMOS Logic by the system BIOS, which gains control at boot up.
How To Change the Confi guration Data
The CMOS information that determines the system parameters may be changed
by entering the BIOS Setup utility. This Setup utility can be accessed by pressing
the <Delete> key at the appropriate time during system boot.
Starting the Setup Utility
Normally, the only visible POST (Power On Self Test) routine is the memory test.
As the memory is being tested, press the <Delete> key to enter the main menu
of the BIOS Setup utility. From the main menu, you can access the other setup
screens, such as the Security and Power menus. Beginning with Section 4-3,
detailed descriptions are given for each parameter setting in the Setup utility.
Warning: Do not shut down or reset the system while updating BIOS
to prevent possible boot failure.
4-1
Page 52
X7DWT-INF User's Manual
4-2 Running Setup
Default settings are in bold text unless otherwise Noted.
The BIOS setup options described in this section are selected by choosing the
appropriate text from the main BIOS Setup screen. All displayed text is described
in this section, although the screen display is often all you need to understand how
to set the options as shown on the following page.
When you fi rst power on the computer, the Phoenix BIOS™ is immediately acti-
vated.
While the BIOS is in control, the Setup program can be activated in one of two
ways:
1. By pressing <Delete> immediately after turning the system on, or
2. When the message shown below appears briefl y at the bottom of the screen
during the POST (Power On Self-Test), press the <Delete> key to activate the main
Setup menu:
Press the <Delete> key to enter Setup
4-3 Main BIOS Setupʳ
All main Setup options are described in this section. The main BIOS Setup screen
is displayed below.
Use the Up/Down arrow keys to move among the different settings in each menu.
Use the Left/Right arrow keys to change the options for each setting.
Press the <Esc> key to exit the CMOS Setup Menu. The next section describes in
detail how to navigate through the menus.
Items that use submenus are indicated with the
press the <Enter> key to access the submenu.
icon. With the item highlighted,
4-2
Page 53
Main BIOS Setup Menu
Chapter 4: BIOS
Main Setup Features
System Time
To set the system date and time, key in the correct information in the appropriate
fi elds. Then press the <Enter> key to save the data.
System Date
Using the arrow keys, highlight the month, day and year fi elds, and enter the
correct data. Press the <Enter> key to save the data.
BIOS Date
This fi eld displays the date when this version of BIOS was built.
SATA Port 1, SATA Port 2, SATA Port 3 and SATA Port 4
These settings allow the user to set the parameters of IDE Channel 0 Master/Slave,
IDE Channel 1 Master/Slave, SATA Port 3 , SATA Port 4 slots. Hit <Enter> to
activate the following sub-menu screen for detailed options of these items. Set
the correct confi gurations accordingly. The items included in the sub-menu are:
Type
This option allows the user to select the type of IDE hard drive. The option
Auto will allow the BIOS to automatically confi gure the parameters of the
HDD installed at the connection. Enter a number between 1 to 39 to select a
predetermined HDD type. Select User to allow the user to enter the parameters
of the HDD installed. Select CDROM if a CDROM drive is installed. Select
ATAPI if a removable disk drive is installed.
4-3
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X7DWT-INF User's Manual
Multi-Sector Transfers
This item allows the user to specify the number of sectors per block to be
used in multi-sector transfer. The options are Disabled, 4 Sectors, 8 Sectors,
and 16 Sectors.
LBA Mode Control
This item determines whether the Phoenix BIOS will access the IDE Channel 0
Master Device via the LBA mode. The options are Enabled and Disabled.
32 Bit I/O
This option allows the user to enable or disable the function of 32-bit data
transfer. The options are Enabled and Disabled.
Transfer Mo d e
This option allows the user to set the transfer mode. The options are Standard, Fast
PIO1, Fast PIO2, Fast PIO3, Fast PIO4, FPIO3/DMA1 and FPIO4/DMA2.
Ultra DMA Mode
This option allows the user to select Ultra DMA Mode. The options are Disabled,
This setting allows the user to enable or disable the function of Serial ATA. The
options are Disabled and Enabled.
SATA Controller Mode Option
Select Compatible to allow the SATA and PATA drives to be automatically-detected
and be placed in the Legacy Mode by the BIOS. Select Enhanced to allow the
SATA and PATA drives to be to be automatically-detected and be placed in the
Native IDE Mode. (Note: The Enhanced mode is supported by the Windows
2000 OS or a later version.)
When the SATA Controller Mode is set to "Enhanced", the following items will
display:
Serial ATA (SATA) RAID Enable
Select Enable to enable Serial ATA RAID Functions. (For the Windows OS
environment, use the RAID driver if this feature is set to Enabled. When this item
is set to Enabled, the item: "ICH RAID Code Base" will be available for you to
select either Intel or Adaptec Host RAID fi rmware to be activated. If SATA RAID
is set to Disabled, the item-SATA AHCI Enable will be available.) The options
are Enabled and Disabled.
4-4
Page 55
Chapter 4: BIOS
ICH RAID Code Base
Select Intel to enable Intel's SATA RAID fi rmware. Select Adaptec to use Adaptec's
HostRAID fi rmware. The options are Intel and Adaptec.
SATA AHCI Enable
Selec t Enable to enable the function of Serial ATA Advanced H ost Interfac e. ( Take
caution when using this function. This feature is for advanced programmers only.
The options are Enabled and Disabled.)
System Memory
This display informs you how much system memory is recognized as being present
in the system.
Extended Memory
This display informs you how much extended memory is recognized as being
present in the system.
4-5
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X7DWT-INF User's Manual
4-4 Advanced Setup
Choose Advanced from the Phoenix BIOS Setup Utility main menu with the arrow keys.
You should see the following display. The items with a triangle beside them have sub
menus that can be accessed by highlighting the item and pressing <Enter>.
Boot Features
Access the submenu to make changes to the following settings.
QuickBoot Mode
If enabled, this feature will speed up the POST (Power On Self Test) routine by
skipping certain tests after the computer is turned on. The settings are Enabled
and Disabled. If Disabled, the POST routine will run at normal speed.
QuietBoot Mode
This setting allows you to Enable or Disable the graphic logo screen during
boot-up.
POST Errors
Set to Enabled to display POST Error Messages if an error occurs during bootup.
If set to Disabled, the system will continue to boot without displaying any error
message even when a boot error occurs.
ACPI Mode
Use the setting to determine if you want to employ ACPI (Advanced Confi guration
and Power Interface) power management on your system. The options are Yes
and No.
4-6
Page 57
Chapter 4: BIOS
Power Button Behavior
If set to Instant-Off, the system will power off immediately as soon as the user
hits the power button. If set to 4-sec., the system will power off when the user
presses the power button for 4 seconds or longer. The options are instant-off
and 4-sec override.
Resume On Modem Ring
Select On to “wake your system up” when an incoming call is received by your
modem. The options are On and Off.
EFI OS Boot
If enabled, this feature provides support for EFI OS booting. The options are
Enabled and Disabled.
Keyboard On Now Function
This feature allows the user to determine how to use the keyboard to power
on the system from S3~S5 States. Select Space to allow the user to power
on the system by pressing the space bar. Select Password to allow the user
to enter the password to power on the system. Select Disabled to disable
this function.
Power Loss Control
This setting allows you to choose how the system will react when power returns
after an unexpected loss of power. The options are Stay Off, Power On, and
Last State.
Watch Dog
If enabled, this option will automatically reset the system if the system is not
active for more than a predefi ned time period. The options are Enabled and
Disabled.
Summary Screen
This setting allows you to Enable or Disable the summary screen which displays
the system confi guration during bootup.
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Memory Cache
Cache System BIOS Area
This setting allows you to designate a reserve area in the system memory to be
used as a System BIOS buffer to allow the BIOS to write (cache) data into this
reserved memory area. Select Write Protect to enable the function and reserve
this area for the Video BIOS ROM access only. Select Uncached to disable this
function and make this area available for other devices.
Cache Video BIOS Area
This setting allows you to designate a reserve area in the system memory to be
used as a Video BIOS buffer to allow the BIOS to write (cache) data into this
reserved memory area. Select Write Protect to enable the function and reserve
this area for the Video BIOS ROM access only. Select Uncached to disable this
function and make this area available for other devices.
Cache Base 0-512K
If enabled, this feature will allow the data stored in the base memory area: block
0-512K to be cached (written) into a buffer, a storage area in the Static DROM
(SDROM) or to be written into L1, L2 cache inside the CPU to speed up CPU
operations. Select Uncached to disable this function. Select Write Through to allow
data to be cached into the buffer and written into the system memory at the
same time. Select Write Protect to prevent data from being written into the base
memory area of Block 0-512K. Select Write Back to allow the CPU to write data
back directly from the buffer without writing data to the System Memory for fast
CPU data processing and operation. The options are Uncached, Write Through,
Write Protect, and Write Back.
Cache Base 512K-640K
If enabled, this feature will allow the data stored in the memory area: 512K-640K
to be cached (written) into a buffer, a storage area in the Static DROM (SDROM)
or written into L1, L2 or L3 cache inside the CPU to speed up CPU operations.
Select Uncached to disable this function. Select Write Through to allow data to
be cached into the buffer and written into the system memory at the same time.
Select Write Protect to prevent data from being written into the base memory
area of Block 512-640K. Select Write Back to allow the CPU to write data back
directly from the buffer without writing data to the system memory to speed up
CPU's operation. The options are Uncached, Write Through, Write Protect, and
Write Back.
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Cache Extended Memory
If enabled, this feature will allow the data stored in the extended memory area to
be cached (written) into a buffer, a storage area in the Static DROM (SDROM) or
written into L1, L2, L3 cache inside the CPU to speed up CPU operations. Select
Uncached to disable this function. Select Write Through to allow data to be cached
into the buffer and written into the system memory at the same time. Select Write
Protect to prevent data from being written into the extended memory area above
1 MB. Select Write Back to allow the CPU to write data back directly from the
buffer without writing data to the System Memory for fast CPU data processing
and operation. The options are Uncached, Write Through, Write Protect, and Write
Back.
Discrete MTRR Allocation
If enabled, MTRRs (-Memory Type Range Registers) are confi gured as distinct,
separate units and cannot be overlapped. If enabled, the user can achieve better
graphic effects when using a Linux graphic driver that requires the write-combining
confi guration with 4GB or more memory. The options are Enabled and Disabled.
PCI Confi guration
Access the submenu to make changes to the following settings for PCI devices.
Onboard GLAN1/Onboard GLAN2 (Gigabit- LAN) OPROM Confi gure
Select Enabled to allow the system to boot from the GLAN1 connection or the
GLAN 2 connection. The options are Enabled and Disabled.
Onboard Storage OPROM Confi gure
Select Enabled to allow the system to boot from the IPMI 3rd-LAN connection.
The options are Disabled and Enabled.
Default Primary Video Adapter
This feature allows the user to specify which video adapter to be used as the
default primary video adapter--the onboard video adapter or others. The default
setting is Onboard.
PCI Fast Delayed Transaction
Enable this function to improve the DMA data transfer rate for a PCI 32-bit
multimedia card. The options are Enable and Disabled.
Reset Confi guration Data
If set to Yes, this setting clears the Extended System Confi guration Data- (ESCD)
area. The options are Yes and No.
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Slot1 PCI-Exp x16
Access the submenu for each of the settings above to make changes to the
following:
Option ROM Scan
When enabled, this setting will initialize the device expansion ROM. The options
are Enabled and Disabled.
Enable Master
This setting allows you to enable the selected device as the PCI bus master.
The options are Enabled and Disabled.
Latency Timer
This setting allows you to set the clock rate for Bus Master. A high-priority,
high-throughout device may benefi t from a greater clock rate. The options are
Default, 0020h, 0040h, 0060h, 0080h, 00A0h, 00C0h, and 00E0h. For Unix,
Novell and other Operating Systems, please select the option: other. If a drive
fails after the installation of a new software, you might want to change this setting
and try again. A different OS requires a different Bus Master clock rate.
Large Disk Access Mode
This setting determines how large hard drives are to be accessed. The options are
DOS or Other (for Unix, Novelle NetWare and other operating systems).
Advanced Chipset Control
Access the submenu to make changes to the following settings.
Warning: Take caution when changing the Advanced settings. An Incor-
rect value, a very high DRAM frequency or an incorrect DRAM timing may
cause system to become unstable. When this occurs, reset the setting to
the default setting.
SERR Signal Condition
This setting specifi es the ECC Error conditions that an SERR# is to be asserted.
The options are None, Single Bit, Multiple Bit, and Both.
Clock Spectrum Feature
If Enabled, the BIOS will monitor the level of Electromagnetic Interference caused
by the components and will attempt to decrease the interference whenever needed.
The options are Enabled and Disabled.
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Intel VT for Directed I/O <VT-d>
Select Enabled to bring up the following Intel VT for Directed I/ O (VT-d) Confi guration
submenu. The options are Enabled and Disabled.
VT-d for Port 0 (ESI)/VT-d for Port 1/VT-d for Port 5/VT-d for Port
9/VT-d for DMI Port
Select Enabled to enable VT-d support for the port specifi ed through DRHD
Structures in the ACPI Tables. The options are Disabled and Enabled.
4GB PCI Hole Granularity
This feature allows you to select the granularity of PCI hole for PCI slots. If MTRRs
are not enough, this option may be used to reduce MTRR occupation. The options
are: 256 MB, 512 MB, 1GB and 2GB.
Memory Branch Mode
This option determines how the two memory branches operate. System address
space can either be interleaved between the two branches or Sequential from
one branch to another. Mirror mode allows data correction by maintaining two
copies of data in two branches. Single Channel 0 allows a single DIMM population
during system manufacturing. The options are Interleave, Sequential, Mirroring,