Supermicro X7DWN Plus User Manual

®

SUPER

X7DWN+

USER’S MANUAL

Revision 1.0b

The information in this User’s Manual has been carefully reviewed and is believed to be accurate.
The vendor assumes no responsibility for any inaccuracies that may be contained in this document,
makes no commitment to update or to keep current the information in this manual, or to notify any

person or organization of the updates. Please Note: For the most up-to-date version of this

manual, please see our web site at www.supermicro.com.

Super Micro Computer, Inc. ("Supermicro") reserves the right to make changes to the product
described in this manual at any time and without notice. This product, including software, if any,
and documentation may not, in whole or in part, be copied, photocopied, reproduced, translated or
reduced to any medium or machine without prior written consent.

IN NO EVENT WILL SUPERMICRO BE LIABLE FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL,
SPECULATIVE OR CONSEQUENTIAL DAMAGES ARISING FROM THE USE OR INABILITY TO
USE THIS PRODUCT OR DOCUMENTATION, EVEN IF ADVISED OF THE POSSIBILITY OF
SUCH DAMAGES. IN PARTICULAR, SUPERMICRO SHALL NOT HAVE LIABILITY FOR ANY
HARDWARE, SOFTWARE, OR DATA STORED OR USED WITH THE PRODUCT, INCLUDING THE
COSTS OF REPAIRING, REPLACING, INTEGRATING, INSTALLING OR RECOVERING SUCH
HARDWARE, SOFTWARE, OR DATA.

Any disputes arising between manufacturer and customer shall be governed by the laws of Santa
Clara County in the State of California, USA. The State of California, County of Santa Clara shall
be the exclusive venue for the resolution of any such disputes. Super Micro's total liability for
all claims will not exceed the price paid for the hardware product.

FCC Statement: This equipment has been tested and found to comply with the limits for a Class
A digital device pursuant to Part 15 of the FCC Rules. These limits are designed to provide
reasonable protection against harmful interference when the equipment is operated in a commercial
environment. This equipment generates, uses, and can radiate radio frequency energy and, if not
installed and used in accordance with the manufacturer’s instruction manual, may cause harmful
interference with radio communications. Operation of this equipment in a residential area is likely
to cause harmful interference, in which case you will be required to correct the interference at your
own expense.

California Best Management Practices Regulations for Perchlorate Materials: This Perchlorate
warning applies only to products containing CR (Manganese Dioxide) Lithium coin cells. “Perchlorate
Material-special handling may apply. See www.dtsc.ca.gov/hazardouswaste/perchlorate”

WARNING: Handling of lead solder materials used in this
product may expose you to lead, a chemical known to
the State of California to cause birth defects and other
reproductive harm.

Manual Revision 1.0b
Release Date: Dec. 12, 2008

Unless you request and receive written permission from Super Micro Computer, Inc., you may not
copy any part of this document.

Information in this document is subject to change without notice. Other products and companies
referred to herein are trademarks or registered trademarks of their respective companies or mark
holders.

Copyright © 2008 by Super Micro Computer, Inc.
All rights reserved.

Printed in the United States of America

Preface

This manual is written for system integrators, PC technicians and knowledge-

able PC users. It provides information for the installation and use of the

X7DWN+ motherboard.

About This Motherboard

The X7DWN+ supports dual Intel® Quad-Core and Dual-Core Xeon™

5400 Series/5300LV Series/5200 Series/5100LV Series processors with a front

side bus speed of up to 1.6 GHz. With two 64-bit Quad-Core and Dual-Core

processors built-in, the X7DWN+ offers substantial functionality enhancements to

the motherboards based on the Intel Core Microarchitecture core while remaining

compatible with the IA-32 software. The features include Intel Virtualization Tech-

nology, Enhanced Intel SpeedStep technology, Advanced Transfer Cache, and

Streaming SIMD Extensions 4.1 (SSE4.1). These features allow the motherboard

to operate at much higher speeds with better power management in much safer

thermal environments than the traditional motherboards. The X7DWN+ is ideal for

high performance quad-processor or dual-processor (DP) workstation and enter-

prise server environments. Please refer to our web site (http://www.supermicro.

com/products/) for updates on supported processors. This product is intended to

Preface

be professionally installed.

Manual Organization

Chapter 1 describes the features, specifi cations and performance of the main

board and provides detailed information about the chipset.

Chapter 2 provides hardware installation instructions. Read this chapter when

installing the processor, memory modules and other hardware components into

the system. If you encounter any problems, see Chapter 3, which describes

troubleshooting procedures for the video, the memory and the system setup

stored in the CMOS.

Chapt er 4 includes an introduction to BIOS and provides detailed information on

running the CMOS Setup utility.

Appendix A provides BIOS POST Codes. Appendix B and Appendix C list

Windows OS and other software Installation Instructions.

Conventions Used in the Manual

Special attention should be given to the following symbols for proper installation
and to prevent damage done to the components or injury to yourself:

iii

X7DWN+ User's Manual

Warni ng: Important information given to ensure proper system installation or

to prevent damage to the components.

Note: Additional Information given to differentiate various models or to ensure cor-

rect system setup.

iv

Notes

Preface

v

X7DWN+ User's Manual

Table of Contents

Preface

About This Manual ........................................................................................... iii

Manual Organization ........................................................................................ iii

Conventions Used in the Manual ....................................................................... iii

Chapter 1: Introduction

1-1 Overview ................................................................................................. 1-1

Checklist ................................................................................................... 1-1

Contacting Supermicro ............................................................................. 1-2

X7DWN+ Image ........................................................................ 1-3

X7DWN+ Layout ........................................................................ 1-4

Quick Reference ...................................................................................... 1-5

Motherboard Features ................................................................................ 1-6

Intel 5400 Chipset: System Block Diagram ............................................. 1-8

1-2 Chipset Overview ................................................................................... 1-9

1-3 Special Features ................................................................................... 1-10

1-4 PC Health Monitoring ............................................................................ 1-10

1-5 ACPI Features ...................................................................................... 1-11

1-6 Power Supply ....................................................................................... 1-12

1-7 Super I/O ................................................................................................ 1-12

Chapter 2: Installation

2-1 Static-Sensitive Devices ......................................................................... 2-1

Precautions ................................................................................................ 2-1

Unpacking ................................................................................................ 2-1

2-2 Processor and Heatsink Installation ....................................................... 2-2

2-3 Installing DIMMs ..................................................................................... 2-6

2-4 Control Panel Connectors and IO Ports ................................................. 2-8

A. Back Panel Connectors/IO Ports .............................................................. 2-8

B. Front Control Panel ................................................................................... 2-9

C. Front Control Panel Pin Defi nitions ........................................................ 2-10

NMI Button ............................................................................................. 2-10

Power LED ............................................................................................. 2-10

HDD LED .............................................................................................. 2-11

NIC1/NIC2 LED ..................................................................................... 2-11

Overheat/Fan Fail LED ......................................................................... 2-12

Power Fail LED ........................................................................................ 2-12

Reset Button ......................................................................................... 2-13

vi

Preface

Power Button .......................................................................................... 2-13

2-5 Connecting Cables ............................................................................... 2-14

ATX Power Connector .......................................................................... 2-14

Processor Power Connector ................................................................. 2-14

Universal Serial Bus (USB0/1) ................................................................ 2-15

Chassis Intrusion .................................................................................... 2-15

Fan Headers .......................................................................................... 2-16

Keylock ..................................................................................................... 2-16

ATX PS/2 Keyboard and Mouse Ports ..................................................... 2-17

Serial Ports ............................................................................................. 2-17

Wake-On-Ring .......................................................................................... 2-18

Wake-On-LAN .......................................................................................... 2-18

GLAN (Ethernet Ports) ............................................................................. 2-19

Speaker/Power LED/Keylock Header .................................................... 2-19

Power Supply Failure ............................................................................... 2-20

Alarm Reset .............................................................................................. 2-20

Overheat LED/Fan Fail ............................................................................ 2-21

SMB Connector ........................................................................................ 2-21

Power SMB Connector ............................................................................. 2-22

VGA Connector ........................................................................................ 2-22

Compact Flash Card PWR Connector ..................................................... 2-23

T-SGPIO Headers .................................................................................... 2-23

2-6 Jumper Settings .................................................................................... 2-24

Explanation of Jumpers ......................................................................... 2-24

GLAN Enable/Disable ............................................................................ 2-24

Clear CMOS ............................................................................................. 2-25

Watch Dog ................................................................................................ 2-25

VGA Enabled/Disabled ............................................................................. 2-26

Memory Voltage Select ............................................................................ 2-26

3rd PWR Supply PWR Fault .................................................................... 2-27

I2C Bus to PCI-X/PCI-Exp. Slots Enable/Disable .................................... 2-27

Compact Flash Master/Slave Enable/Disable .......................................... 2-28

2-7 Onboard Indicators ............................................................................... 2-29

GLAN LEDs .............................................................................................. 2-29

Onboard Power LED ................................................................................ 2-29

2-8 Floppy, SIMSO, Serial ATA and Hard Disk Drive Connections ........... 2-30

Floppy Connector .................................................................................... 2-30

Serial ATA Ports........................................................................................ 2-31

SIMSO IPMI Slot ..................................................................................... 2-31

vii

X7DWN+ User's Manual

IDE Connectors ....................................................................................... 2-32

Chapter 3: Troubleshooting

3-1 Troubleshooting Procedures ................................................................... 3-1

Before Power On ....................................................................................... 3-1

No Power ................................................................................................... 3-1

No Video .................................................................................................. 3-1

Losing the System’s Setup Confi guration ................................................ 3-2

Memory Errors ........................................................................................... 3-2

3-2 Technical Support Procedures ................................................................ 3-2

3-3 Frequently Asked Questions ................................................................... 3-3

3-4 Returning Merchandise for Service ......................................................... 3-4

Chapter 4: BIOS

4-1 Introduction ............................................................................................... 4-1

4-2 Running Setup ......................................................................................... 4-2

4-3 Main BIOS Setup ..................................................................................... 4-2

4-4 Advanced Setup ........................................................................................ 4-6

4-5 Security Setup ....................................................................................... 4-25

4-6 Boot Setup .............................................................................................. 4-26

4-7 Exit .......................................................................................................... 4-27

Appendices:

Appendix A: BIOS POST Codes ..................................................................... A-1

Appendix B: Installing the Windows OS .........................................................B-1

Appendix C: Installing Other Software Programs and Drivers .......................C-1

viii

Chapter 1: Introduction

Chapter 1

Introduction

1-1 Overview

Checklist

Congratulations on purchasing your computer motherboard from an acknowledged

leader in the industry. Supermicro boards are designed with the utmost attention

to detail to provide you with the highest standards in quality and performance.

Check that the following items have all been included with your motherboard. If

anything listed here is damaged or missing, contact your retailer.

The following items are included in the retail box.

One (1) Supermicro Mainboard

One (1) ribbon cable for IDE devices (CBL-0036L-03)

One (1) fl oppy ribbon cable (CBL-0022L)

Six (6) Serial ATA cables (CBL-0044Lx6)

One (1) I/O backpanel shield (CSE-PT07L)

One (1) Supermicro CD containing drivers and utilities

One (1) User's/BIOS Manual

1-1

X7DWN+ User's Manual

Contacting Supermicro

Headquarters

Address: Super Micro Computer, Inc.

980 Rock Ave.

San Jose, CA 95131 U.S.A.

Tel: [phone]

Fax: [phone]

Email: [e-mail] (General Information)

[e-mail] (Technical Support)

Web Site: www.supermicro.com

Europe

Address: Super Micro Computer B.V.

Het Sterrenbeeld 28, 5215 ML

's-Hertogenbosch, The Netherlands

Tel: [phone]

Fax: [phone]

Email: [e-mail] (General Information)

[e-mail] (Technical Support)

[e-mail] (Customer Support)

Asia-Pacifi c

Address: Super Micro, Inc.

4F, No. 232-1 Liancheng Road

Chung-Ho 235, Taipei Hsien, Taiwan, R.O.C.

Tel: [phone]

Fax: [phone]

Web Site: www.supermicro.com.tw

Technical Support:

Email: [e-mail]

Tel: [phone], ext.132 or 139

1-2

X7DWN+ Image

Chapter 1: Introduction

Note: The drawings and pictures shown in this manual were based on the latest

PCB Revision available at the time of publishing of the manual. The motherboard

you’ve received may or may not look exactly the same as the graphics shown

in the manual.

1-3

X7DWN+ User's Manual

X7DWN+ Motherboard Layout

(not drawn to scale)

Fan5

Fan6

6

10

12

78

9

JKM1

34

5

85

JUSB1

96

COM1

JCOM1

5

15

10

J15

VGA

1

11

6

12

11

14

13

JLAN1

12

11

14

13

JLAN2

X7DWN+

LAN

CTRL

JPL1

12

11

KB/Mouse

41

USB0/1

1

2

LAN1

9

10

1

2

LAN2

S I/O

JP2

J34

J4J9B2

BANK4

J9B1

J33

J3

BANK3

J8B3

J8B2

J8B1

BANK2

J7B2

BANK1

A1

B1

J13

J12

J7B3

J2

J32

J7B1

J1

J31

J5

J6

J9

J14

B2 A2

A1

B1

J8

JWOR

A2

B2

Slot6 PCI-E2 x8

Slot5 PCI-E2 x8

Slot4 PCI-E x4

Slot3 PCI-E x8

J27

JI2C1

J28

1 1

JI2C2

Slot2 PCI-X 100/133MHz

Slot1 PCI-X 100/133MHz

Slot0 PCI-U

DIMM 4D

DIMM 4C

DIMM 4B

DIMM 4A

DIMM 3D

DIMM 3C

DIMM 3B

DIMM 3A

DIMM 2D

DIMM 2C

DIMM 2B

DIMM 2A

DIMM 1A

DIMM 1B

DIMM 1C

DIMM 1D

SEPC

BIOS

Intel 5400

(North Bridge)

J11

USB 4
JUSB 3

CPU FAN1

FAN7

JAR

JP3

SMBUS_PS

PSF

Intel ESB 2

(South Bridge)

COM2

JWOL

JCOM2

J3P

J17

3rd PWR Fail Detect

JWD

J7

JK1

JL1

1

J18

SMB

24-Pin PWR

JPW1

CPU1

CPU2

CMOS Clear

JPG1

VGA CTRL

USB 2/3

JUSB2

I-SATA0

JS1

4-Pin PWR

3

JPW2

I-SATA2

I-SATA1

JS2 JS3 JS4

JBT1

154

8-Pin PWR

2

4

JPW3

I-SATA3

JS5

Battery

BT1

I-SATA5

I-SATA4

JS6

T-SGPIO2

J30

J29

T-SGPIO1

JWF1
JCF1

J16

SP1

FAN2

FAN3

FAN8

JIDE2

SIMSO

Buzzer

+

FAN1

JF1

19

20

FP Ctrl Panel

2

1

JD1

7

1

PWRLED/SPK

1

JP1

1

LE1

JOH1

4

4

CPUFAN2

JIDE1

IDE#1

Compact Flash

1

J22

Floppy

1

1

FAN4

Notes:

1. Jumpers not indicated are for test purposes only.

2. See Chapter 2 for detailed information on jumpers, I/O ports and JF1 front

panel connections.

3. " " indicates the location of Pin 1.

4. SEPC: Supermicro Enhanced Power Connector is specially designed to support

the Supermicro 2U Riser Card only.

5. For the system to function properly, make sure to unplug the power cables before

removing or installing components.

6 JIDE2 is for Compact Card Use only. For Compact Card to work properly,

please enable JCF1 by putting a jumper on it, and connect JWF1 to a power

supply connector.

1-4

Chapter 1: Introduction

Quick Reference ( X7DWN+)

Jumper Description Default Setting

J3P 3rd PWR Failure Detection Off (Disabled)

JBT1 CMOS Clear (See Chapter 2)

JCF1 Compact Card Master/Slave Select On (Master)

2

JI

C1/JI2C2 I2C Bus to PCI-X/PCI-E Slots Open (Disabled)

JP2 Memory Voltage Select Pins 1-2 (Auto)

JPG1 VGA Enable Pins 1-2 (Enabled)

JPL1 GLAN1/2 Enable Pins 1-2 (Enabled)

JWD Watch Dog Pins 1-2 (Reset)

Connector Description

COM1/COM2 COM1/COM2 Serial Port/Connector (JCOM1/JCOM2)

FAN 1-8 Fans 1-8 (Fans1-6, System Fans, Fans7/8: CPU Fans)

Floppy Floppy Disk Drive Connector (J22)

IDE1/IDE2 IDE1 Hard Drive (JIDE1)/Compact Flash Card (JIDE2)

I-SATA 0~5 Intel SATA 0-5 Connectors (JS1~JS6)

JAR Alarm Buzzer Reset

JD1 PWR LED(pins1-3)/SpeakerHeader (pins 4-7)

JF1 Front Control Panel Connector

JL1 Chassis Intrusion Header

JOH1 Overheat LED

JP3 Power Fault (Power Supply Failure) (PSF)

JPW1 Primary 24-Pin ATX PWR Connector

JPW2/JPW3 +12V 4-pin PWR (JWP2)/+12V 8-pin PWR (JPW3)

JWF1 Compact Card PWR Connector (Used if JFC1 is on.)

JWOL Wake-on-LAN Header

JWOR Wake-on-Ring Header

LAN1/LAN2 G-bit Ethernet Ports 1/2 (JLAN1/JLAN2)

LE1 PWR LED Indicator

SIMSO IPMI SIM (Supermicro Intelligent MGMT) Slot(J16)

SMB System Management Bus Header (J18)

SMB_PS Power System Management (I

2

C) Header (J17)

SP1 Internal Buzzer

T-SGPIO1/T-SGPIO2 Serial-Link General Purpose I/O Headers (J29/J30)

Keylock Keylock Header (JK1)

USB 0/1 Back Panel USB 0/1 (JPUSB1)

USB 2/3, USB4 Front Panel USB 2/3 (JPUSB2), USB 4 (JPUSB3)

VGA VGA Connector (J15)

1-5

X7DWN+ User's Manual

Motherboard Features

CPU

• Dual Intel® 64-bit LGA 771 Quad-Core/Dual-Core Xeon 5400 Series/5300LV

Series/5200 Series/5100LV Series processors at a front side bus speed of up

to 1.6 GHz

Memory

• 16 240-pin DIMM sockets support up to 128 GB DDR2 FBD (Fully Buffered)

ECC 800/667/533 Memory (See Section 2-3 in Chapter 2 for DIMM Slot

Population.)

Chipset

• Intel 5400 chipset, including: the 5400 Memory Control Hub (MCH) and the

Enterprise South Bridge 2 (ESB2).

Expansion Slots

• Two PCI-E2 x8 slots (Slot5/slot6) (Gen. 2.0)

• One PCI-E x8 slot (Slot3)

• One PCI-E x4 slot (Slot4)

• Two 64-bit PCI-X 133/100MHz slots (Slot1/Slot2)

• One PCI-U (Universal) slot (Slot0) (Gen. 2.0)

• SIMSO Slot (J16)

BIOS

• 8 Mb Phoenix

®

Flash ROM

• PCI 2.2, ACPI 1.0, Plug and Play (PnP), USB Keyboard support and SMBIOS

2.3

PC Health Monitor ing

• Onboard voltage monitors for CPU cores, chipset voltage, Memory voltage,

+1. 8V, +3. 3 V, +3.3V St a n db y, + 5V, +5V Stan d by, +12V, −12V and Vbatt

• Fan status monitor with fi rmware control

• CPU/chassis temperature monitors

• Platform Environment Control Interface (PECI) ready

• CPU fan auto-off in sleep mode

• CPU slow-down on temperature overheat

• CPU thermal trip support for processor protection, power LED

• Power-up mode control for recovery from AC power loss

• Auto-switching voltage regulator for CPU cores

• System overheat/Fan Fail LED Indicator and control

• Chassis intrusion detection

• System resource alert via Supero Doctor III

1-6

Chapter 1: Introduction

ACPI Fe at ur es

• Slow blinking LED for suspend state indicator

• Main switch override mechanism

• ACPI Power Management

• Keyboard Wakeup from Soft-off

Onboard I/O

• Intel ESB2 supports Six SATA2 ports (with RAID0, RAID1, RAID10, RAID5

supported in the Windows OS Environment)

• One SIMSO IPMI socket

• Intel 82575 Gigabit Ethernet controller supports two Giga-bit LAN ports

• One EIDE Ultra DMA /100 bus master interface

• One fl oppy port interface

• Two COM ports(1 header, 1 port)

• PS/2 mouse and PS/2 keyboard ports

• Up to fi ve USB 2.0 (Universal Serial Bus) (2 ports, 3 Headers)

• ES1000 (32 MB) Graphic Controller supports one VGA connector

• Super I/O: Winbond W83627HF w/Hardware Monitor support: W83793,

HECETA

Other

• External modem ring-on

• Wake-on-LAN (WOL)

• Wake-on-Ring (WOR)

• Console redirection

• Onboard Fan Speed Control by Thermal Management via BIOS

CD/Diskette Utilities

• BIOS fl ash upgrade utility and device drivers

Dimensions

• Ext. ATX 13.05" (L) x 13.68" (W) (331.5 mm x 347.47 mm)

1-7

X7DWN+ User's Manual

#1

VGA

CONN

#2

J12J13

PCI-X SLOT

PCI-X SLOT

ES1000

VRM

J5

J6

PCI-EXP X8 SLOT

J11

#3
J9

#4

J14

PCI-EXP X8 SLOT

PCI-EXPx8

PCI-E x8 SLOT

VGA

PROCESSOR#2

1666/1333/1067

MT/S

PCI-EXPx8

PCI-EXPx8

J8

PCI-E

PCI-EXP X8 SLOT

x8

SEPC

PCI-EXP X8 SLOT

PCI-EXPx4

PCI-X 133

PCI32/33MMZ

PORT

PORT

PORT
#0

PORT
#1,2

PORT
#5,6

#1,2

#3,4

PORT

MCH

Seaburg

PORT

#0#7,8

PCIEx8

PORTESI

#4

ESB2

PROCESSOR#1

1666/1333/1067

MT/S

FBD CHNL0

FBD CHNL1

FBD CHNL2

FBD CHNL3

PORT

PCI-E x4

#9

PCIEx4

VRM

#3

#2

#1 #1 #1

#0 #0 #0

FBD DIMM

IDE CONN

#5

#4

SATA

#4

USB

RJ45

RJ45

GB LAN

ATA 100

3.0 Gb/S

USB 2.0

ZOAR

RMII

#1

#0

#1

#0

#3

#2

#3

#2

#3

#2

FBD DIMM

#3

#2

FBD DIMM

#2

#1

#0

FBD DIMM

#3

FWH

LPC

TPM

DDR2

FDD

SIO

W83627

HF

MS

KB

COM1

COM2

Bloc k Diag ram o f the 5 40 0 Chips et

Note: This is a general block diagram. Please see the previous Motherboard Features

pages for details on the features of each motherboard.

1-8

Chapter 1: Introduction

1-2 Chipset Overview

Built upon the functionality and the capability of the 5400 chipset, the X7DWN+

motherboard provides the performance and feature set required for quad-pro-

cessor or dual-processor-based high-end systems with confi guration options

optimized for complex storage platforms. The 5400 chipset supports single or

dual Intel Quad-Core/Dual-Core Xeon 5400 Series/5300LV Series/5200 Series/

5100LV Series processor with front side bus speeds of up to 1.6 GHz. The chipset

consists of the 5400 Memory Controller Hub (MCH) for the host bridge and the

631xESB/632xESB I/O Controller Hub (Enterprise South Bridge 2-ESB2) for the

I/O subsystem.

The In tel 5 40 0 MCH (No r th Br idg e)

The 5400 MCH (North Bridge) provides two FSB processing interfaces, four fully

buffered (FBD) DIMM memory channels, PCI-Express bus interfaces confi gurable

to form x8 or x16 ports, an EB2 South Bridge Interface (ESI) and SMBus Interfaces

for system management, and DIMM Serial Presence Detect (SPD). The peak

bandwidth for each FBD channel is 8 GB/s for DDR2 800/667 FBD memory, giving

a total memory size of 128 MB for 4 FBD channels. The PCI-Express interfaces

can be confi gured to form x8 or x16 ports that can operate up to Gen-2 speeds

in x16 confi guration for enhanced graphics applications.

The In tel 6 31xESB/632 x ESB I /O Con trol ler H ub- ES B2 (Sout h Bri dge)

The 631xESB/632xESB I/O Controller Hub (Enterprise South Bridge 2) integrates

an Ultra ATA 100 Controller, six Serial ATA host controller ports, one EHCI host

controller, six external USB 2.0 ports, an LPC interface controller, and a fl ash

BIOS interface controller. Additionally, the ESB 2 chip also contains a PCI interface

controller, Azalia/'97 digital controller, integrated LAN controller, an ASF control-

ler and an ESI for communication with the MCH. The Intel ESB2 offers the data

buffering and interface arbitration capabilities required for a high-end system to

constantly operate effi ciently and maintain peak performance.

Compliant with the ACPI platform, the ESB2 supports the Full-On, Stop-Grant,

Suspend-to-RAM, Suspend-to-Disk, and Soft-Off power management states.

Combined with the functionality offered by the onboard LAN controller, the ESB2

also supports alert systems for remote management.

With the 5400 chipset built in, the X7DWN+ offers a superb solution for intense

computing and complex I/O environments, and is ideal for high-end server sys-

tems.

1-9

X7DWN+ User's Manual

1-3 Special Features

Recovery from AC Power Loss

BIOS provides a setting for you to determine how the system will respond when

AC power is lost and then restored to the system. You can choose for the system

to remain powered off (in which case you must hit the power switch to turn it back

on) or for it to automatically return to a power- on state. See the Advanced BIOS

Setup section to change this setting. The default setting is Last State.

1-4 PC Health Monitoring

This section describes the PC health monitoring features of the X7DWN+. All

have an onboard System Hardware Monitor chip that supports PC health moni-

toring.

Onboard Voltage Monitors for CPU Core, Chipset Voltage, Memory Voltage, +1.8V,

+5V, +3.3V, +3.3V Standby, +5V Standby, +12V, −12V and VBatt. Once a voltage

becomes unstable, a warning is given or an error message is sent to the screen.

Users can adjust the voltage thresholds to defi ne the sensitivity of the voltage

monitor.

An onboard voltage monitor will scan the following voltages continuously:

Fan Statu s Moni tor wi th Firmw are Con trol

The PC health monitor can check the RPM status of the cooling fans. The onboard

CPU and chassis fans are controlled by Thermal Management via BIOS (under

Hardware Monitoring in the Advanced Setting).

Environ ment al Te mper ature Co ntro l

The thermal control sensor monitors the CPU temperature in real time and will

turn on the thermal control fan whenever the CPU temperature exceeds a user-

defi ned threshold. The overheat circuitry runs independently from the CPU. Once

it detects that the CPU temperature is too high, it will automatically turn on the

thermal fan control to prevent any overheat damage to the CPU. The onboard

chassis thermal circuitry can monitor the overall system temperature and alert

users when the chassis temperature is too high.

CPU Fan Auto -O f f in Slee p Mode

The CPU fan becomes active when the power is turned on. It continues to operate

when the system enters the Standby mode. When in the sleep mode, the CPU will

not run at full power, thereby generating less heat.

System Resource Aler t

This feature is available when used with Supero Doctor III in the Windows OS

environment or used with Supero Doctor II in Linux. Supero Doctor is used to

notify the user of certain system events. For example, you can also confi gure

1-10

Chapter 1: Introduction

Supero Doctor to provide you with warnings when the system temperature, CPU

temperatures, voltages and fan speeds go beyond a pre-defi ned range.

1-5 ACPI Features

ACPI stands for Advanced Confi guration and Power Interface. The ACPI specifi -

cation defi nes a fl exible and abstract hardware interface that provides a standard

way to integrate power management features throughout a PC system, including

its hardware, operating system and application software. This enables the system

to automatically turn on and off peripherals such as CD-ROMs, network cards,

hard disk drives and printers.

In addition to enabling operating system-directed power management, ACPI

provides a generic system event mechanism for Plug and Play and an operating

system-independent interface for confi guration control. ACPI leverages the Plug

and Play BIOS data structures while providing a processor architecture-indepen-

dent implementation that is compatible with both Windows 2000 and Windows

2003 Operating Systems.

Sl ow Blinkin g LED for Sus pend -S tate I ndica tor

When the CPU goes into a suspend state, the chassis power LED will start blinking

to indicate that the CPU is in suspend mode. When the user presses any key, the

CPU will wake-up and the LED will automatically stop blinking and remain on.

Main Switch Override Mechanism

When an ATX power supply is used, the power button can function as a system

suspend button to make the system enter a SoftOff state. The monitor will be

suspended and the hard drive will spin down. Pressing the power button again

will cause the whole system to wake-up. During the SoftOff state, the ATX power

supply provides power to keep the required circuitry in the system "alive." In case

the system malfunctions and you want to turn off the power, just press and hold

the power button for 4 seconds. This option can be set in the Power section of

the BIOS Setup routine.

External Modem Ring- On

Wake-up events can be triggered by a device such as the external modem ringing

when the system is in the SoftOff state. Note that external modem ring-on can

only be used with an ATX 2.01 (or above) compliant power supply.

Wake - On- L AN ( WOL)

Wake-On-LAN is defi ned as the ability of a management application to remotely

power up a computer that is powered off. Remote PC setup, up-dates and asset

tracking can occur after hours and on weekends so that daily LAN traffi c is kept

to a minimum and users are not interrupted. The motherboard has a 3-pin header

(WOL) to connect to the 3-pin header on a Network Interface Card (NIC) that has

1-11

X7DWN+ User's Manual

WOL capability. In addition, an onboard LAN controller can also support WOL

without any connection to the WOL header. The 3-pin WOL header is to be used

with a LAN add-on card only.

Note: Wake-On-LAN requires an ATX 2.01 (or above) compliant power supply.

1-6 Power Supply

As with all computer products, a stable power source is necessary for proper and

reliable operation. It is even more important for processors that have high CPU

clock rates.

The X7DWN+ can accommodate 24-pin ATX power supplies. Although most

power supplies generally meet the specifi cations required by the CPU, some are

inadequate. In addition, the 12V 4-pin and the 12V 8-pin power connections are

also required to ensure adequate power supply to the system. Also your power

supply must supply 1.5A for the Ethernet ports.

Note: The + 12V 8-pin CPU Power Connector (JPW3) is also required to support

Intel 64-bit CPUs. Failure to provide this extra power will result in CPU PWR Failure.

See Section 2-5 for details on connecting the power supply.

It is strongly recommended that you use a high quality power supply that meets

ATX power supply Specifi cation 2.02 or above. It must also be SSI compliant

(For more information, please refer to the web site at http://www.ssiforum.org/).

Additionally, in areas where noisy power transmission is present, you may choose

to install a line fi lter to shield the computer from noise. It is recommended that

you also install a power surge protector to help avoid problems caused by power

surges.

1-7 Super I/O

The disk drive adapter functions of the Super I/O chip include a fl oppy disk drive

controller that is compatible with industry standard 82077/765, a data separator,

write p r e -compensation circuitry, dec o d e logic, data rat e selection, a clock genera-

tor, drive interface control logic and interrupt and DMA logic. The wide range of

functions integrated onto the Super I/O greatly reduces the number of components

required for interfacing with fl oppy disk drives. The Super I/O supports 360 K, 720

K, 1.2 M, 1.44 M or 2.88 M disk drives and data transfer rates of 250 Kb/s, 500

Kb/s or 1 Mb/s. It also provides two high-speed, 16550 compatible serial com-

munication ports (UARTs). Each UART includes a 16-byte send/receive FIFO,

a programmable baud rate generator, complete modem control capability and a

processor interrupt system. Both UARTs provide legacy speed with baud rate of

up to 115.2 Kbps as well as an advanced speed with baud rates of 250 K, 500 K,

or 1 Mb/s, which support higher speed modems.

1-12

Chapter 1: Introduction

The Super I/O supports one PC-compatible printer port (SPP), Bidirectional Printer

Port (BPP), Enhanced Parallel Port (EPP) or Extended Capabilities Port (ECP).

The Super I/O provides functions that comply with ACPI (Advanced Confi guration

and Power Interface), which includes support of legacy and ACPI power manage-

ment through an SMI or SCI function pin. It also features auto power management

to reduce power consumption.

1-13

X7DWN+ User's Manual

Notes

1-14

Chapter 2: Installation

Chapter 2

Installation

2-1 Static-Sensitive Devices

Electrostatic Discharge (ESD) can damage electronic com ponents. To prevent

damage to your system board, it is important to handle it very carefully. The fol-

lowing measures are generally suffi cient to protect your equipment from ESD.

Precautions

• Use a grounded wrist strap designed to prevent static discharge.

• Touch a grounded metal object before removing the board from the antistatic

bag.

• Handle the board by its edges only; do not touch its components, peripheral

chips, memory modules or gold contacts.

• When handling chips or modules, avoid touching their pins.

• Put the motherboard and peripherals back into their antistatic bags when not

in use.

• For grounding purposes, make sure your computer chassis provides excellent

conductivity between the power supply, the case, the mounting fasteners and

the motherboard.

• Use only the correct type of onboard CMOS battery as specifi ed by the

manufacturer. Do not install the onboard battery upside down to avoid possible

explosion.

Unpacking

The motherboard is shipped in antistatic packaging to avoid static damage. When

unpacking the board, make sure the person handling it is static protected.

2-1

X7DWN+ User's Manual

!

2-2 Processor and Heatsink Installation

When handling the processor package, avoid placing
dire ct pre ssu re on t he labe l are a of the f an.

Notes: 1. Always connect the power cord last and always remove it before adding,

removing or changing any hardware components. Make sure that you install the

processor into the CPU socket before you install the CPU heatsink.

2. Intel's boxed Xeon CPU package contains the CPU fan and heatsink assembly.

If you buy a CPU separately, make sure that you use only Intel-certifi ed multi-

directional heatsink and fan.

3. The Intel Xeon LGA 771 heatsink and fan comes with a push-pin design and

no tool is needed for installation.

4. Make sure to install the motherboard into the chassis before you install the

CPU heatsink and fan.)

5. When purchasing an LGA 771 CPU or when receiving a motherboard with an

LGA 771 CPU pre-installed, make sure that the CPU plastic cap is in place and

none of the CPU pins are bent; otherwise, contact the retailer immediately.

6. Refer to the MB Features Section for more details on CPU support.

Installation of the LGA771 Processor

Socket Clip

Load Plate

1. Press the socket clip to release

the load plate, which covers the CPU

socket, from its locking position.

2. Gently lift the socket clip to open

the load plate.

Load Plate

2-2

3. Use your thumb and your index fi nger

!

to hold the CPU at the North Center

Edge and the South Center Edge of

the CPU.

4. Align CPU Pin1 (the CPU corner

marked with a triangle) against the

socket corner marked with a triangle

cutout.

Chapter 2: Installation

North Center Edge

5. Align the CPU key, the semi-circle

cutout below a gold dot, against the

socket key, which is the notch on the

same side of the triangle cutout on the

socket.

6. Once aligned, carefully lower the

CPU straight down into the socket. (Do

not drop the CPU on the socket. Do not

move the CPU horizontally or vertically.

Do not rub the CPU against the surface

or against any pins of the socket to avoid

damaging the CPU or the socket.)

7. With the CPU inside the socket,

inspect the four corners of the CPU

to make sure that the CPU is properly

installed.

8. Use your thumb to gently push the

socket clip down to the clip lock.

Socket Key

(Socket Notch)

CPU Key (semi-

circle cutout)

below the circle.

Corner with a

triangle cutout

Socket clip

South Center Edge

gold dot

CPU Pin1

9. If the CPU is properly installed

into the socket, the plastic cap will be

automatically released from the load

plate when the clip is pushed in the clip

lock. Remove the plastic cap from the

motherboard.

(Warni ng: Please save the

plastic cap. The motherboard must be

shipped with the plastic cap properly

installed to protect the CPU socket pins.

Shipment without the plastic cap prop-

erly installed will cause damage to the

socket pins.)

CPU in the CPU socket

Plastic cap

is released

from the

load plate

if the CPU

is properly

installed.

2-3

X7DWN+ User's Manual

!

Installation of the Heatsink

CEK Heatsink Installation

1. Do not apply any thermal grease to the

heatsink or the CPU die because the re-

quired amount has already been applied.

2. Place the heatsink on top of the CPU so

that the four mounting holes are aligned

with those on the retention mechanism.

3. Screw in two diagonal screws (ie the #1

and the #2 screws) until just snug (-do not

fully tighten the screws to avoid possible

damage to the CPU.)

4. Finish the installation by fully tightening

all four screws.

CEK Passive Heatsink

Screw#1 Screw#2

Screw#1

To Un-install the Heatsink

Warni ng: We do not recommend

that the CPU or the heatsink be

removed. However, if you do need

to uninstall the heatsink, please

follow the instructions below to

uninstall the heatsink to prevent

damage done to the CPU or the

CPU socket.

Screw#2

2-4

Chapter 2: Installation

1. Unscrew and remove the heatsink screws

from the motherboard in the sequence as show

in the picture on the right.

2. Hold the heatsink as shown in the picture

on the right and gently wriggle the heatsink to

loosen it from the CPU. (Do not use excessive

force when wriggling the heatsink.)

3. Once the CPU is loosened, remove the

heatsink from the CPU socket.

4. Clean the surface of the CPU and the

heatsink to get rid of the old thermal grease.

Reapply the proper amount of thermal grease

on the surface before you re-install the CPU

and the heatsink.

Screw#1

Screw#2

Mounting the Motherboard in the Chassis

All motherboards have standard mounting holes to fi t different types of chassis.

Make sure that the locations of all the mounting holes for both motherboard and

chassis match. Make sure that the metal standoffs click in or are screwed in

tightly. Then, use a screwdriver to secure the motherboard onto the motherboard
tray. Note: some components are very close to the mounting holes. Please take

precautionary measures to avoid damaging these components when you install

the motherboard to the chassis.

2-5

X7DWN+ User's Manual

2-3 Installing DIMMs

Note: Check the Supermicro web site for recommended memory modules.

CAUTION

Exercise extreme care when installing or removing DIMM

modules to prevent any possible damage. Also note that the

memory is interleaved to improve performance (see step 1).

DIMM Installation

1. Insert the desired number of DIMMs into the memory slots, starting with DIMM

#1A. The memory scheme is interleaved, so you must install (a) pair(s) of

modules of the same type and same speed at a time, beginning with Bank

1, Bank 2 and so on. For optimal memory performance, please install four

modules at a time with the maximum of 16 modules. (See the Memory Instal-

lation Table Below.)

2. Insert each DIMM module vertically into its slot. Pay attention to the notch along

the bottom of the module to prevent inserting the DIMM module incorrectly.

3. Gently press down on the DIMM module until it snaps into place in the slot.

Repeat for all modules (see step 1 above).

Memory Support

The X7DWN+ supports up to 128 GB fully buffered (FBD) ECC DDR 2 800/667/533

in 16 DIMMs.

Note 1: Due to OS limitations, some operating systems may not show more than

4 GB of memory.

DIMM Module Population Confi guration

To optimize memory support, follow the table below for memory installation:

Optimized DIMM Population Configurations

Branch 0 Branch 1
Number of
DIMMs
2 DIMMs 1A
4 DIMMs 1A
8 DIMMs 1A 1B
12 DIMMs 1A 1B 1C
16 DIMMs 1A 1B 1C 1D 2A 2B 2C 2D 3A 3B 3C 3D 4A 4B 4C 4D

(*Notes: i. DIMM slot# specified: DIMM slot to be populated; “---“: DIMM slot not to
be populated. ii. Both FBD 533 MHz, 667MHz and 800MHz DIMMs are supported;

however, you need to use the memory modules of the same speed and of the same

type on a motherboard. iii. Interleaved memory is supported when pairs of DIMM

modules are installed. For optimal memory performance, please install pairs of

memory modules in both

you need to follow the restrictions listed above. )

Bank 1

(Channel 0)

--- --- ---

--- --- ---

--- ---

Bank 2
(Channel 1)
2A
2A
2A 2B

---

2A 2B 2C

--- --- --- --- --- --- --- --- --- --- ---

--- --- ---

--- ---

Bank 3
(Channel 2)

3A
3A 3B

---

3A 3B 3C

--- --- ---

--- ---

---

Bank 4
(Channel 3)

--- --- ---

4A
4A 4B
4A 4B 4C

--- ---

---

Branch 0 and Branch 1. iv. For memory to work properly,

2-6

Chapter 2: Installation

Note 2: Due to memory allocation to system devices, memory remaining avail-

able for operational use will be reduced when 4 GB of RAM is used. The reduc-

tion in memory availability is disproportional. (See the Memory Availability Table

below.)

Possible System Memory Allocation & Availability

System Device Size Physical Memory

Firmware Hub fl ash memory (System
BIOS)

Local APIC 4 KB 3.99GB

Area Reserved for the chipset 2 MB 3.99GB

I/O APIC (4 Kbytes) 4 KB 3.99GB

PCI Enumeration Area 1 256 MB 3.76GB

PCI Express (256 MB) 256 MB 3.51GB

PCI Enumeration Area 2 (if needed)

-Aligned on 256-MB boundary-

VGA Memory 16 MB 2.85GB

TSEG 1 MB 2.84GB

Memory available for the OS & other
applications

1 MB 3.99GB

512 MB 3.01GB

Remaining (-Available)
(4 GB Total System Memory)

2.84GB

Installing and Removing DIMMs

Notch

DIMM2 FBD

Notch

X7DWN+

To Remove:

Use your thumbs
to gently push
the release tabs
near both ends of
the module. This
should release it
from the slot.

Release

Tab

Note: Notch

should align

with the

receptive point

on the slot

Release

Tab

To Ins tall : Insert module vertically and press down until it

snaps into place. Pay attention to the alignment notch at
the bottom.

2 FBD

2-7

X7DWN+ User's Manual

123

4

5

678

2-4 Control Panel Connectors/IO Ports

The I/O ports are color coded in conformance with the PC 99 specifi cation. See

Figure 2-3 below for the colors and locations of the various I/O ports.

A. Back Panel Connectors/IO Ports

X7DWN+

Back Panel I/O Port Locations and Defi nitions

Back Panel Connectors

1. Keyboard (Purple)

2. PS/2 Mouse (Green)

3. Back Panel USB Port 0

4. Back Panel USB Port 1

5. COM Port 1 (Turquoise)

6. VGA Port (Blue)

7. Gigabit LAN 1

8. Gigabit LAN 2

(See Section 2-5 for details.)

2-8

Chapter 2: Installation

B. Front Control Panel

JF1 contains header pins for various buttons and indicators that are normally

located on a control panel at the front of the chassis. These connectors are de-

signed specifi cally for use with Supermicro server chassis. See Figure 2-4 for

the descriptions of the various control panel buttons and LED indicators. Refer to

the following section for descriptions and pin defi nitions.

JF1 Header Pins

1920

Ground

NMI

X7DW3+

X

Power LED

HDD LED

NIC1 LED

NIC2 LED

OH/Fan Fail LED

PWR Fail LED

Ground

Ground

X

Vcc

Vcc

Vcc

Vcc

Vcc

Vcc

Reset

PWR

2

1

Reset Button

Power Button

2-9

X7DWN+ User's Manual

C. Front Control Panel Pin Defi nitions

NMI Button

The non-maskable interrupt button

header is located on pins 19 and 20

of JF1. Refer to the table on the right

for pin defi nitions.

Power L ED

The Power LED connection is located

on pins 15 and 16 of JF1. Refer to the

table on the right for pin defi nitions.

NMI Button

Pin Defi nitions (JF1)

Pin# Defi nition

19 Control

20 Ground

Power LED

Pin Defi nitions (JF1)

Pin# Defi nition

15 +5V

16 Ground

Slot6 PCI-E2 x8

Slot5 PCI-E2 x8

Slot4 PCI-E x4

Slot3 PCI-E x8

Slot2 PCI-X 100/133MHz

JWOR

Slot1 PCI-X 100/133MHz

Slot0 PCI-U

DIMM 4D

DIMM 4C

DIMM 4B

DIMM 4A

DIMM 3D

DIMM 3C

DIMM 3B

DIMM 3A

DIMM 2D

DIMM 2C

DIMM 2B

DIMM 2A

Intel 5400

(North Bridge)

DIMM 1A

DIMM 1B

DIMM 1C

DIMM 1D

SEPC

USB 4

BIOS

JI2C1

1 1

JI2C2

Fan5

Fan6

6

12

34

5

85

96

5

15

10

VGA

1

11

6

12

11

14

13

12

11

14

13

X7DWN+

JPL1

BANK4

12

10

78

9

11

KB/Mouse

BANK3

41

USB0/1

JP2

COM1

BANK2

1

2

LAN1

9

10

1

2

LAN2

BANK1

LAN

CTRL

S I/O

A1

B1

B2 A2

A2

A1

B1

B2

JAR

SMBUS_PS

PSF

Intel ESB 2

(South Bridge)

COM2

CPU FAN1

FAN7

3rd PWR Fail Detect

JL1

JWOL

SMB

A. NMI

B. PWR LED

1

4-Pin PWR

CPU1

CPU2

JPG1

CMOS Clear

VGA CTRL

USB 2/3

I-SATA0

I-SATA1

I-SATA2

2

I-SATA3

8-Pin PWR

Battery



I-SATA4

I-SATA5

T-SGPIO2

T-SGPIO1

JWF1
JCF1

SIMSO

Buzzer

+

FAN1

FAN2

FAN3

FAN8

CPUFAN2

Compact Flash

1

FAN4

19

20

FP Ctrl Panel

2

1

7

1

PWRLED/SPK

1

JP1

1

LE1

JOH1

4

4

IDE#1

Floppy

1

1

Ground

B

Power LED

HDD LED

NIC1 LED

NIC2 LED

OH/Fan Fail LED

PWR Fail LED

Ground

Ground

1920

NMI

A

X

X

Vcc

Vcc

Vcc

Vcc

Vcc

Vcc

Reset

Reset Button

Power Button

PWR

2

1

24-Pin PWR

JWD

J7

JK1

1

2-10

HDD LED

Chapter 2: Installation

The HDD LED connection is located

on pins 13 and 14 of JF1. Attach the

hard drive LED cable here to display

disk activity (for any hard drive ac-

tivities on the system, including SAS,

Serial ATA and IDE). See the table on

the right for pin defi nitions.

NIC1/NIC2 LED I ndica tors

The NIC (Network Interface Control-

ler) LED connection for GLAN port1

is located on pins 11 and 12 of JF1,

and the LED connection for GLAN

Port2 is on Pins 9 and 10. Attach the

NIC LED cables to display network

activity. Refer to the table on the right

for pin defi nitions.

HDD LED

Pin Defi nitions (JF1)

Pin# Defi nition

13 +5V

14 HD Active

GLAN1/2 LED

Pin Defi nitions (JF1)

Pin# Defi nition

9/11 Vcc

10/12 Ground

Fan5

Fan6

34

96

5

15

10

1

11

6

12

11

14

13

12

11

14

13

X7DWN+

JPL1

12

6

5

85

VGA

A. HDD LED

B. NIC1 LED

19

2

1

7

1

PWRLED/SPK

1

JP1

1

JOH1

B

4

4

C

OH/Fan Fail LED

1

1

C. NIC2 LED

Ground

X

Power LED

HDD LED

A

NIC1 LED

NIC2 LED

PWR Fail LED

Ground

Ground

1920

NMI

X

Vcc

Vcc

Vcc

Vcc

Vcc

Vcc

Reset

Reset Button

Power Button

PWR

2

1

CPU FAN1

JAR

SMBUS_PS

PSF

Intel ESB 2

COM2

FAN7

3rd PWR Fail Detect

JWD

JK1

JL1

JWOL

SMB

24-Pin PWR

J7

1

DIMM 4D

Slot6 PCI-E2 x8

Slot5 PCI-E2 x8

Slot4 PCI-E x4

Slot3 PCI-E x8

Slot2 PCI-X 100/133MHz

JWOR

Slot1 PCI-X 100/133MHz

Slot0 PCI-U

DIMM 4C

DIMM 4B

DIMM 4A

DIMM 3D

DIMM 3C

DIMM 3B

DIMM 3A

DIMM 2D

DIMM 2C

DIMM 2B

DIMM 2A

Intel 5400

(North Bridge)

DIMM 1A

DIMM 1B

DIMM 1C

DIMM 1D

SEPC

USB 4

BIOS

JI2C1

1 1

JI2C2

(South Bridge)

BANK4

12

10

78

9

11

KB/Mouse

BANK3

41

USB0/1

JP2

COM1

BANK2

1

2

LAN1

9

10

1

2

LAN2

BANK1

LAN

CTRL

S I/O

A1

B1

B2 A2

A2

A1

B1

B2

CPU1

CPU2

JPG1

I-SATA0

CMOS Clear

VGA CTRL

USB 2/3

I-SATA1

4-Pin PWR

I-SATA2

2

I-SATA3

1

8-Pin PWR

I-SATA4

Battery



I-SATA5

T-SGPIO2

T-SGPIO1

JWF1
JCF1

SIMSO

Buzzer

+

FAN2

FAN3

FAN8

CPUFAN2

Compact Flash

1

FAN4

FAN1

20

FP Ctrl Panel

LE1

IDE#1

Floppy

2-11

X7DWN+ User's Manual

Overheat/Fan Fail LED (OH)

Connect an LED Cable to the OH/Fan

Fail connection on pins 7 and 8 of

JF1 to provide advanced warnings

of chassis overheating or fan failure.

Refer to the table on the right for pin

defi nitions.

Power Fa il LE D

The Power Fail LED connection is

located on pins 5 and 6 of JF1. Re-

fer to the table on the right for pin

defi nitions.

OH/Fan Fail LED

Pin Defi nitions (JF1)

Pin# Defi nition

7 Vcc

8 Ground

OH/Fan Fail Indicator

Status

State Defi nition

Off Normal

On Overheat

Flash-

Fan Fail

ing

PWR Fail LED

Pin Defi nitions (JF1)

Pin# Defi nition

5 Vcc

6 Ground

Slot6 PCI-E2 x8

Slot5 PCI-E2 x8

Slot4 PCI-E x4

Slot3 PCI-E x8

Slot2 PCI-X 100/133MHz

JWOR

Slot1 PCI-X 100/133MHz

Slot0 PCI-U

DIMM 4D

DIMM 4C

DIMM 4B

DIMM 4A

DIMM 3D

DIMM 3C

DIMM 3B

DIMM 3A

DIMM 2D

DIMM 2C

DIMM 2B

DIMM 2A

Intel 5400

(North Bridge)

DIMM 1A

DIMM 1B

DIMM 1C

DIMM 1D

SEPC

USB 4

BIOS

JI2C1

1 1

JI2C2

Fan5

Fan6

6

12

34

5

85

96

5

15

10

VGA

1

11

6

12

11

14

13

12

11

14

13

X7DWN+

JPL1

BANK4

12

10

78

9

11

KB/Mouse

BANK3

41

USB0/1

JP2

COM1

BANK2

1

2

LAN1

9

10

1

2

LAN2

BANK1

LAN

CTRL

S I/O

A1

B1

B2 A2

A2

A1

B1

B2

JAR

SMBUS_PS

PSF

Intel ESB 2

(South Bridge)

COM2

CPU FAN1

FAN7

3rd PWR Fail Detect

JL1

JWOL

SMB

A. OH/Fan Fail LED

B. PWR Supply Fail

1

4-Pin PWR

CPU1

CPU2

JPG1

CMOS Clear

VGA CTRL

USB 2/3

I-SATA0

I-SATA1

I-SATA2

2

I-SATA3

8-Pin PWR

Battery



I-SATA4

I-SATA5

T-SGPIO2

T-SGPIO1

JWF1
JCF1

SIMSO

Buzzer

+

FAN1

FAN2

FAN3

FAN8

CPUFAN2

Compact Flash

1

FAN4

19

20

FP Ctrl Panel

2

1

7

1

PWRLED/SPK

1

JP1

1

LE1

JOH1

4

4

IDE#1

Floppy

1

1

Ground

X

Power LED

HDD LED

NIC1 LED

NIC2 LED

OH/Fan Fail LED

A

PWR Fail LED

B

Ground

Ground

1920

NMI

X

Vcc

Vcc

Vcc

Vcc

Vcc

Vcc

Reset

Reset Button

Power Button

PWR

2

1

24-Pin PWR

JWD

J7

JK1

1

2-12

Reset Butt on

Chapter 2: Installation

The Reset Button connection is located

on pins 3 and 4 of JF1. Attach it to a

hardware reset switch on the computer

case. Refer to the table on the right for

pin defi nitions.

Power But to n

The Power Button connection is located

on pins 1 and 2 of JF1. Momentarily

contacting both pins will power on/off

the system. This button can also be

configured to function as a suspend

button (with a setting in the BIOS - see

Chapter 4). To turn off the power when

set to suspend mode, press the button

for at least 4 seconds. Refer to the table

on the right for pin defi nitions.

Reset Button

Pin Defi nitions (JF1)

Pin# Defi nition

3 Reset

4 Ground

Power Button

Pin Defi nitions (JF1)

Pin# Defi nition

1 Signal

2 +3V Standby

Slot6 PCI-E2 x8

Slot5 PCI-E2 x8

Slot4 PCI-E x4

Slot3 PCI-E x8

Slot2 PCI-X 100/133MHz

JWOR

Slot1 PCI-X 100/133MHz

Slot0 PCI-U

DIMM 4D

DIMM 4C

DIMM 4B

DIMM 4A

DIMM 3D

DIMM 3C

DIMM 3B

DIMM 3A

DIMM 2D

DIMM 2C

DIMM 2B

DIMM 2A

Intel 5400

(North Bridge)

DIMM 1A

DIMM 1B

DIMM 1C

DIMM 1D

SEPC

USB 4

BIOS

JI2C1

1 1

JI2C2

Fan5

Fan6

6

12

34

5

85

96

5

15

10

VGA

1

11

6

12

11

14

13

12

11

14

13

X7DWN+

JPL1

BANK4

12

10

78

9

11

KB/Mouse

BANK3

41

USB0/1

JP2

COM1

BANK2

1

2

LAN1

9

10

1

2

LAN2

BANK1

LAN

CTRL

S I/O

A1

B1

B2 A2

A2

A1

B1

B2

JAR

SMBUS_PS

PSF

Intel ESB 2

(South Bridge)

COM2

CPU FAN1

FAN7

3rd PWR Fail Detect

JWD

JL1

JWOL

SMB

A. Reset Button

B. PWR Button

1

4-Pin PWR

CPU1

CPU2

JPG1

CMOS Clear

VGA CTRL

USB 2/3

I-SATA0

I-SATA1

I-SATA2

2

I-SATA3

Battery

8-Pin PWR

I-SATA4



I-SATA5

T-SGPIO2

T-SGPIO1

JWF1
JCF1

SIMSO

Buzzer

+

FAN1

FAN2

FAN3

FAN8

CPUFAN2

Compact Flash

1

FAN4

19

20

FP Ctrl Panel

2

1

7

1

PWRLED/SPK

1

JP1

1

LE1

JOH1

4

4

IDE#1

Floppy

1

1

Ground

X

Power LED

HDD LED

NIC1 LED

NIC2 LED

OH/Fan Fail LED

PWR Fail LED

Ground

Ground

1920

NMI

X

Vcc

Vcc

Vcc

Vcc

Vcc

Vcc

Reset

Reset Button

A

Power Button

PWR

2

1

B

24-Pin PWR

J7

JK1

1

2-13

X7DWN+ User's Manual

2-5 Connecting Cables

AT X Power Conn ecto r

There are a 24-pin main power sup-

ply connector(JPW1) and an 8-pin

CPU PWR connector (JPW3) on the

motherboard. These power connec-

tors meet the SSI EPS 12V specifi -

cation. The 4-pin 12V PWR supply

is also required to provide adequate

power to the system. See the table

on the right for pin defi nitions. For

the 8-pin PWR (JPW3), please refer

to the item listed below.

Proce ssor Powe r
Connector

In addition to the Primary ATX power

connector (above), the 12V 8-pin

CPU PWR connector at JPW3 must

also be connected to your power

supply. See the table on the right for

pin defi nitions.

A

CPU FAN1

Fan5

Fan6

6

10

12

78

9

34

5

85

96

5

15

10

VGA

1

11

6

12

11

14

13

12

11

14

13

X7DWN+

CTRL

JPL1

12

11

41

COM1

1

2

9

10

1

2

LAN

S I/O

KB/Mouse

USB0/1

JP2

LAN1

LAN2

BANK4

BANK3

BANK2

BANK1

A1

B1

B2 A2

A2

A1

B1

B2

Slot6 PCI-E2 x8

Slot5 PCI-E2 x8

Slot4 PCI-E x4

Slot3 PCI-E x8

Slot2 PCI-X 100/133MHz

JWOR

Slot1 PCI-X 100/133MHz

Slot0 PCI-U

DIMM 4D

DIMM 4C

DIMM 4B

DIMM 4A

DIMM 3D

DIMM 3C

DIMM 3B

DIMM 3A

DIMM 2D

DIMM 2C

DIMM 2B

DIMM 2A

PSF

Intel 5400

(North Bridge)

DIMM 1A

DIMM 1B

DIMM 1C

DIMM 1D

SEPC

USB 4

BIOS

JI2C1

1 1

JI2C2

Intel ESB 2

(South Bridge)

COM2

FAN7

JAR

SMBUS_PS

JWOL

24-Pin PWR

3rd PWR Fail Detect

JWD

J7

JK1

JL1

1

SMB

CPU1

CPU2

JPG1

I-SATA0

CMOS Clear

VGA CTRL

USB 2/3

C

4-Pin PWR

I-SATA1

I-SATA2

ATX Power 24-pin Connector

Pin Defi nitions

Pin# Defi nition Pin # Defi nition

13 +3.3V 1 +3.3V

14 -12V 2 +3.3V

15 COM 3 COM

16 PS_ON 4 +5V

17 COM 5 COM

18 COM 6 +5V

19 COM 7 COM

20 Res (NC) 8 PWR_OK

21 +5V 9 5VSB

22 +5V 10 +12V

23 +5V 11 +12V

24 COM 12 +3.3V

12V 4-pin Power Con-

nector

Pin Defi nitions

Pins Defi nition

1 and 2 Ground

3 and 4 +12V

12V 8-pin Power Con-

nector

Pin Defi nitions

Pins Defi nition

1 through 4 Ground

2

I-SATA3

Battery

B

1

8-Pin PWR

I-SATA5

I-SATA4



T-SGPIO2

T-SGPIO1

JWF1
JCF1

SIMSO

Buzzer

+

FAN1

FAN2

FAN3

FAN8

CPUFAN2

Compact Flash

1

FAN4

5 through 8 +12V

19

20

FP Ctrl Panel

2

1

7

1

PWRLED/SPK

1

JP1

1

LE1

JOH1

4

4

IDE#1

Floppy

1

1

A. 24-pin ATX PWR

B. 8-pin Processor PWR

C. 4-pin PWR

2-14

Chapter 2: Installation

D

Univers al Seri al Bus (USB)

There are fi ve USB 2.0 (Universal

Serial Bus) ports/headers on the

motherboard. Back Panel USB Ports

0 and 1 are located at JUSB1. The

other three are Front Panel USB

headers. USB Headers 2 and 3 are

located at JUSB2, and USB Header

4 is located at JUSB3 to provide front

panel access. See the tables on the

right for pin defi nitions.

Chass is Int rus ion

A Chassis Intrusion header is located

at JL1 on the motherboard. Attach an

appropriate cable from the chassis

to inform you of a chassis intrusion

when the chassis is opened.

Back Panel USB

(USB0/1)

Pin# Defi nitions

1 +5V

2 PO-

3 PO+

4 Ground

5 N/A

Front Panel USB

Pin Defi nitions (USB 2/3/4)

USB2/4
Pin # Defi nition

USB3
Pin # Defi nition

1 +5V 1 +5V

2 PO- 2 PO-

3 PO+ 3 PO+

4 Ground 4 Ground

5 Key 5 No connection

Chassis Intrusion

Pin Defi nitions (JL1)

Pin# Defi nition

1 Intrusion Input

2 Ground

Fan5

Fan6

6

12

34

5

85

96

5

15

10

VGA

1

11

6

12

11

14

13

12

11

14

13

X7DWN+

JPL1

CPU FAN1

JAR

SMBUS_PS

JWOL

FAN7

3rd PWR Fail Detect

JWD

J7

JK1

JL1

1

SMB

24-Pin PWR

CPU1

CPU2

JPG1

DIMM 4D

BANK4

12

10

78

9

11

KB/Mouse

BANK3

41

USB0/1

A

JP2

COM1

BANK2

1

2

LAN1

9

10

1

2

LAN2

BANK1

Slot6 PCI-E2 x8

LAN

CTRL

S I/O

Slot5 PCI-E2 x8

Slot4 PCI-E x4

Slot3 PCI-E x8

A1

B1

B2 A2

Slot2 PCI-X 100/133MHz

JWOR

Slot1 PCI-X 100/133MHz

A2

A1

B1

B2

Slot0 PCI-U

DIMM 4C

DIMM 4B

DIMM 4A

DIMM 3D

DIMM 3C

DIMM 3B

DIMM 3A

DIMM 2D

DIMM 2C

DIMM 2B

DIMM 2A

PSF

Intel 5400

(North Bridge)

DIMM 1A

DIMM 1B

DIMM 1C

DIMM 1D

SEPC

C

USB 4

BIOS

JI2C1

1 1

JI2C2

Intel ESB 2

(South Bridge)

COM2

I-SATA0

CMOS Clear

VGA CTRL

B

USB 2/3

4-Pin PWR

I-SATA1

I-SATA2

2

I-SATA3

Battery

1

8-Pin PWR

I-SATA5

I-SATA4



T-SGPIO2

T-SGPIO1

JWF1

JCF1

SIMSO

Buzzer

+

FAN1

FAN2

FAN3

FAN8

CPUFAN2

Compact Flash

1

FAN4

19

20

FP Ctrl Panel

2

1

7

1

PWRLED/SPK

1

JP1

1

LE1

JOH1

4

4

IDE#1

Floppy

1

1

B. Front Panel USB 2/3

C. Front Panel USB 4

D. Chassis Intrusion

2-15

A. Backpanel USB 0/1

X7DWN+ User's Manual

G

F

E

D

H

I

Fan H ea d er s

The X7DWN+ has six chassis/system fan

headers (Fan1 to Fan6) and two CPU Fans

(Fans 7/8). (Note: All 4-pin fans headers

are backward compatible with the traditional

3-pin fans.) See the table on the right for

pin defi nitions. The onboard fan speeds are

controlled by Thermal Management via Hard-

ware Monitoring in the Advanced Setting in

BIOS. The Default setting is Disabled.

Keylock

The keyboard lock connection is designated

JK1. Utilizing this header allows you to inhibit

any actions made on the keyboard, effectively

"locking" it.

Fan Header

Pin Defi nitions (Fan1-8)

Pin# Defi nition

1 Ground

2 +12V

3 Tachometer

4 PWR Modulation

Keylock

Pin Defi nitions

Pin# Defi nition

1 Ground

2 Keylock R-N

Fan5

Fan6

6

10

12

78

9

34

5

85

96

5

15

10

VGA

1

11

6

12

11

14

13

12

11

14

13

X7DWN+

CTRL

JPL1

12

11

41

COM1

1

2

9

10

1

2

LAN

S I/O

KB/Mouse

USB0/1

JP2

LAN1

LAN2

BANK4

BANK3

BANK2

BANK1

A1

B1

B2 A2

A2

A1

B1

B2

Slot6 PCI-E2 x8

Slot5 PCI-E2 x8

Slot4 PCI-E x4

Slot3 PCI-E x8

Slot2 PCI-X 100/133MHz

JWOR

Slot1 PCI-X 100/133MHz

Slot0 PCI-U

A. Fan 1

CPU FAN1

DIMM 4D

DIMM 4C

DIMM 4B

DIMM 4A

DIMM 3D

DIMM 3C

DIMM 3B

DIMM 3A

DIMM 2D

DIMM 2C

DIMM 2B

DIMM 2A

PSF

FAN7

JAR

SMBUS_PS

24-Pin PWR

3rd PWR Fail Detect

CPU1

Intel 5400

(North Bridge)

CPU2

DIMM 1A

DIMM 1B

DIMM 1C

DIMM 1D

SEPC

USB 4

BIOS

JI2C1

1 1

JI2C2

Intel ESB 2

(South Bridge)

COM2

JWOL

JWD

JPG1

J7

JK1

JL1

1

SMB

I-SATA0

CMOS Clear

VGA CTRL

USB 2/3

4-Pin PWR

I-SATA1

I-SATA2

2

I-SATA3

Battery

1

8-Pin PWR

I-SATA5

I-SATA4



T-SGPIO2

T-SGPIO1

JWF1
JCF1

SIMSO

Buzzer

+

FAN1

FAN2

FAN3

FAN8

CPUFAN2

Compact Flash

1

FAN4

A

19

20

FP Ctrl Panel

2

1

B

7

1

PWRLED/SPK

1

JP1

1

LE1

JOH1

4

4

IDE#1

Floppy

1

1

B. Fan 2

C. Fan 3

D. Fan 4

E. Fan 5

F. Fan 6

G. Fan 7 (CPU Fan 1)

H. Fan 8 (CPU Fan 2)

I. Keylock

C

2-16

Chapter 2: Installation

ATX PS/2 Keyboard and
PS/2 Mou se Port s

The ATX PS/2 keyboard and the PS/2

mouse are located at JKM1. See the

table on the right for pin defi nitions.

(The mouse port is above the key-

board port. See the table on the right

for pin defi nitions.)

Serial Ports

COM1 is a connector located on the I/

O Backpanel, and COM2 is a header

located at JCOM2. See the table on

the right for pin defi nitions.

PS/2 Keyboard and

Mouse Port Pin

Defi nitions

Pin# Defi nition

1 Data

2NC

3 Ground

4 VCC

5 Clock

6NC

Serial Port Pin Defi nitions

(COM1/COM2)

Pin # Defi nition Pin # Defi nition

1 CDC 6 DSR

2 RXD 7 RTS

3 TXD 8 CTS

4 DTR 9 RI

5 Ground 10 NC

Fan5

Fan6

6

10

12

78

9

34

5

85

96

5

15

10

VGA

1

11

6

12

11

14

13

12

11

14

13

X7DWN+

CTRL

JPL1

41

COM1

2

10

2

LAN

12

11

1

9

1

S I/O

USB0/1

A

KB/Mouse

JP2

B

LAN1

LAN2

BANK4

BANK3

BANK2

BANK1

A1

B1

B2 A2

A2

A1

B1

B2

Slot6 PCI-E2 x8

Slot5 PCI-E2 x8

Slot4 PCI-E x4

Slot3 PCI-E x8

Slot2 PCI-X 100/133MHz

JWOR

Slot1 PCI-X 100/133MHz

Slot0 PCI-U

(Pin 10 is available on COM2
only. NC: No Connection.)

CPU FAN1

JAR

SMBUS_PS

FAN7

3rd PWR Fail Detect

24-Pin PWR

CPU1

DIMM 4D

DIMM 4C

DIMM 4B

DIMM 4A

DIMM 3D

DIMM 3C

DIMM 3B

DIMM 3A

DIMM 2D

DIMM 2C

DIMM 2B

DIMM 2A

PSF

Intel 5400

(North Bridge)

CPU2

DIMM 1A

DIMM 1B

DIMM 1C

DIMM 1D

SEPC

USB 4

BIOS

JI2C1

1 1

JI2C2

Intel ESB 2

(South Bridge)

C

COM2

JWOL

JWD

JPG1

J7

JK1

JL1

1

SMB

I-SATA0

CMOS Clear

VGA CTRL

USB 2/3

4-Pin PWR

I-SATA1

I-SATA2

2

I-SATA3

Battery

1

8-Pin PWR

I-SATA4



I-SATA5

T-SGPIO2

T-SGPIO1

JWF1
JCF1

SIMSO

Buzzer

+

FAN1

FAN2

FAN3

FAN8

CPUFAN2

Compact Flash

1

FAN4

19

20

FP Ctrl Panel

2

1

7

1

PWRLED/SPK

1

JP1

1

LE1

JOH1

4

4

IDE#1

Floppy

1

1

A. Keyboard/Mouse

B. COM1

C. COM2

2-17

X7DWN+ User's Manual

Wake-On-Ring

The Wake-On-Ring header is des-

ignated JWOR. This function allows

your computer to receive and be

"awakened" by an incoming call to

the modem when the system is in

the suspend state. See the table on

the right for pin defi nitions. You must

have a Wake-On-Ring card and cable

to use this feature.

Wake-On-LAN

The Wake-On-LAN header is located

at JWOL on the motherboard. See

the table on the right for pin defi ni-

tions. (You must also have a LAN

card with a Wake-On-LAN connector

and cable to use this feature.)

Wake-On-Ring

Pin Defi nitions

(JWOR)

Pin# Defi nition

1 Ground

2 Wake-up

Wake-On-LAN

Pin Defi nitions

(JWOL)

Pin# Defi nition

1 +5V Standby

2 Ground

3 Wake-up

Fan5

Fan6

6

12

34

5

85

96

5

15

10

VGA

1

11

6

12

11

14

13

12

11

14

13

X7DWN+

JPL1

10

78

9

CTRL

12

11

41

COM1

2

10

2

LAN

S I/O

USB0/1

1

9

1

KB/Mouse

JP2

LAN1

LAN2

BANK4

BANK3

BANK2

BANK1

A1

B1

B2 A2

A2

A1

B1

B2

Slot6 PCI-E2 x8

Slot5 PCI-E2 x8

Slot4 PCI-E x4

Slot3 PCI-E x8

A

Slot2 PCI-X 100/133MHz

JWOR

Slot1 PCI-X 100/133MHz

Slot0 PCI-U

CPU FAN1

DIMM 4D

DIMM 4C

DIMM 4B

DIMM 4A

DIMM 3D

DIMM 3C

DIMM 3B

DIMM 3A

DIMM 2D

DIMM 2C

DIMM 2B

DIMM 2A

PSF

FAN7

JAR

SMBUS_PS

24-Pin PWR

3rd PWR Fail Detect

CPU1

Intel 5400

(North Bridge)

CPU2

DIMM 1A

DIMM 1B

DIMM 1C

DIMM 1D

SEPC

USB 4

BIOS

JI2C1

1 1

JI2C2

Intel ESB 2

(South Bridge)

B

COM2

JWOL

JWD

JPG1

J7

JK1

JL1

1

SMB

I-SATA0

CMOS Clear

VGA CTRL

USB 2/3

4-Pin PWR

I-SATA1

I-SATA2

2

I-SATA3

1

8-Pin PWR

I-SATA4

Battery



I-SATA5

JWF1

T-SGPIO2

T-SGPIO1

JCF1

SIMSO

Buzzer

+

FAN1

FAN2

FAN3

FAN8

CPUFAN2

Compact Flash

1

FAN4

19

20

FP Ctrl Panel

2

1

7

1

PWRLED/SPK

1

JP1

1

LE1

JOH1

4

4

IDE#1

Floppy

1

1

A. WOR

B. WOL

2-18

GLAN 1/2 (Giga-bit
Ethernet Por ts)

Chapter 2: Installation

Two G-bit Ethernet ports are located

at JLAN1 and JLAN2 on the I/O

backplane. These ports accept RJ45

type cables.

Power L ED/Sp eake r

On the JD1 header, pins 1-3 are

used for power LED indication, and

pins 4-7 are for the speaker. See

the table on the right for speaker

pin defi nitions. Note: The speaker

connector pins (4-7) are for use with

an external speaker. If you wish to

use the onboard speaker, you should

close pins 6-7 with a jumper.

GLAN1 GLAN2

Speaker Connector

Pin Defi ntions

Pin Setting Defi nition

Pins 6-7 Internal Speaker

Pins 4-7 External Speaker

Fan5

Fan6

6

10

12

78

9

34

5

85

96

5

15

10

VGA

1

11

6

12

11

14

13

12

11

14

13

X7DWN+

CTRL

JPL1

41

COM1

2

10

2

LAN

12

11

1

9

1

S I/O

USB0/1

KB/Mouse

JP2

A

LAN1

LAN2

B

BANK4

BANK3

BANK2

BANK1

A1

B1

B2 A2

A2

A1

B1

B2

Slot6 PCI-E2 x8

Slot5 PCI-E2 x8

Slot4 PCI-E x4

Slot3 PCI-E x8

Slot2 PCI-X 100/133MHz

JWOR

Slot1 PCI-X 100/133MHz

Slot0 PCI-U

A. GLAN1

CPU FAN1

JAR

SMBUS_PS

FAN7

3rd PWR Fail Detect

24-Pin PWR

CPU1

DIMM 4D

DIMM 4C

DIMM 4B

DIMM 4A

DIMM 3D

DIMM 3C

DIMM 3B

DIMM 3A

DIMM 2D

DIMM 2C

DIMM 2B

DIMM 2A

PSF

Intel 5400

(North Bridge)

CPU2

DIMM 1A

DIMM 1B

DIMM 1C

DIMM 1D

SEPC

USB 4

BIOS

JI2C1

1 1

JI2C2

Intel ESB 2

(South Bridge)

COM2

JWOL

JWD

JPG1

J7

JK1

JL1

1

SMB

I-SATA0

CMOS Clear

VGA CTRL

USB 2/3

4-Pin PWR

I-SATA1

I-SATA2

2

I-SATA3

Battery

1

8-Pin PWR

I-SATA4



I-SATA5

T-SGPIO2

T-SGPIO1

JWF1
JCF1

SIMSO

Buzzer

+

FAN1

FAN2

FAN3

FAN8

CPUFAN2

Compact Flash

1

FAN4

19

20

FP Ctrl Panel

2

1

7

C

1

PWRLED/SPK

1

JP1

1

LE1

JOH1

4

4

IDE#1

Floppy

1

1

B. GLAN2

C. PWR LED/Speaker

2-19

X7DWN+ User's Manual

Power Sup ply Failu re

Connect a cable from your power

supply to the Power Supply Fail

header (PSF/JP3) to provide warnings

of power supply failure. This warning

signal is passed through the PWR_ LED

pin to indicate a power failure on the

chassis. See the table on the right for

pin defi nitions.

Alarm Reset

If three power supplies are installed

and Alarm Reset (JAR) is enabled,

the system will notify you when any

of the three power modules fails.

Connect JAR to a micro-switch to

enable you to turn off the alarm that

is activated when a power module

fails. See the table on the right for

pin defi nitions.

PWR Supply Failure

Pin Defi nitions

Pin# Defi nition

1 PWR 1: Fail

2 PWR 2: Fail

3 PWR 3: Fail

4 Signal: Alarm Reset

Note: This feature is only available when using

Supermicro redundant power supplies.

Alarm Reset

Pin Defi nitions

Pin Setting Defi nition

Pin 1 Ground

Pin 2 +5V

Fan5

Fan6

6

10

12

78

9

34

5

85

96

5

15

10

VGA

1

11

6

12

11

14

13

12

11

14

13

X7DWN+

CTRL

JPL1

12

11

41

COM1

2

10

2

LAN

S I/O

USB0/1

1

9

1

KB/Mouse

JP2

LAN1

LAN2

BANK4

BANK3

BANK2

BANK1

A1

B1

B2 A2

A2

A1

B1

B2

Slot6 PCI-E2 x8

Slot5 PCI-E2 x8

Slot4 PCI-E x4

Slot3 PCI-E x8

Slot2 PCI-X 100/133MHz

JWOR

Slot1 PCI-X 100/133MHz

Slot0 PCI-U

CPU FAN1

B

JAR

SMBUS_PS

FAN7

3rd PWR Fail Detect

24-Pin PWR

CPU1

DIMM 4D

DIMM 4C

DIMM 4B

DIMM 4A

DIMM 3D

DIMM 3C

DIMM 3B

DIMM 3A

DIMM 2D

DIMM 2C

DIMM 2B

DIMM 2A

A

PSF

Intel 5400

(North Bridge)

CPU2

DIMM 1A

DIMM 1B

DIMM 1C

DIMM 1D

SEPC

USB 4

BIOS

JI2C1

1 1

JI2C2

Intel ESB 2

(South Bridge)

COM2

JWOL

JWD

JPG1

J7

JK1

JL1

1

SMB

CMOS Clear

VGA CTRL

USB 2/3

I-SATA0

4-Pin PWR

I-SATA1

I-SATA2

2

I-SATA3

Battery

1

8-Pin PWR

I-SATA4



I-SATA5

T-SGPIO2

T-SGPIO1

JWF1
JCF1

SIMSO

Buzzer

+

FAN1

FAN2

FAN3

FAN8

CPUFAN2

Compact Flash

1

FAN4

19

20

FP Ctrl Panel

2

1

7

1

PWRLED/SPK

1

JP1

1

LE1

JOH1

4

4

IDE#1

Floppy

1

1

B. Alarm Reset

2-20

A. Power Supply Failure

Chapter 2: Installation

Ove r he at L ED/ Fa n Fai l
(JOH1)

The JOH1 header is used to connect

an LED indicator to provide warnings

of chassis overheating or fan failure.

This LED will blink when a fan failure

occurs. Refer to the table on right for

pin defi nitions.

SMB

A System Management Bus header

is located at J18. Connect the ap-

propriate cable here to utilize SMB

on your system.

Overheat LED

Pin Defi nitions

Pin# Defi nition

1 5vDC

2 OH Active

OH/Fan Fail LED

State Message

Solid Overheat

Blinking Fan Fail

SMB Header

Pin Defi nitions

Pin# Defi nition

1 Data

2 Ground

3 Clock

4 No Connection

Fan5

Fan6

6

10

12

78

9

34

5

85

96

5

15

10

VGA

1

11

6

12

11

14

13

12

11

14

13

X7DWN+

CTRL

JPL1

41

COM1

2

10

2

LAN

12

11

1

9

1

S I/O

USB0/1

KB/Mouse

JP2

LAN1

LAN2

BANK4

BANK3

BANK2

BANK1

A1

B1

B2 A2

A2

A1

B1

B2

Slot6 PCI-E2 x8

Slot5 PCI-E2 x8

Slot4 PCI-E x4

Slot3 PCI-E x8

Slot2 PCI-X 100/133MHz

JWOR

Slot1 PCI-X 100/133MHz

Slot0 PCI-U

CPU FAN1

JAR

SMBUS_PS

FAN7

3rd PWR Fail Detect

24-Pin PWR

CPU1

DIMM 4D

DIMM 4C

DIMM 4B

DIMM 4A

DIMM 3D

DIMM 3C

DIMM 3B

DIMM 3A

DIMM 2D

DIMM 2C

DIMM 2B

DIMM 2A

PSF

Intel 5400

(North Bridge)

CPU2

DIMM 1A

DIMM 1B

DIMM 1C

DIMM 1D

SEPC

USB 4

BIOS

JI2C1

1 1

JI2C2

Intel ESB 2

(South Bridge)

COM2

JWOL

JWD

JPG1

J7

JK1

JL1

1

B

SMB

I-SATA0

CMOS Clear

VGA CTRL

USB 2/3

4-Pin PWR

I-SATA1

I-SATA2

2

I-SATA3

Battery

1

8-Pin PWR

I-SATA4



I-SATA5

T-SGPIO2

T-SGPIO1

JWF1
JCF1

SIMSO

Buzzer

+

FAN1

FAN2

FAN3

FAN8

CPUFAN2

Compact Flash

1

FAN4

19

20

FP Ctrl Panel

2

1

7

1

PWRLED/SPK

1

JP1

1

LE1

JOH1

4

4

IDE#1

Floppy

1

1

A. OH/Fan Fail LED

B. SMB

A

2-21

X7DWN+ User's Manual

Power SMB (I2C) Co nn ec t or

Power SMB (I2C) Connector (J17)

monitors power supply, fan and sys-

tem temperatures. See the table on

the right for pin defi nitions.

VGA C onn ec to r

A VGA connector is located at J15 on

the I/O backplane. Refer to the board

layout below for the location.

PWR SMB

Pin Defi nitions

Pin# Defi nition

1 Clock

2 Data

3 PWR Fail

4 Ground

5 +3.3V

Fan5

Fan6

6

10

12

78

9

34

5

85

96

5

15

10

VGA

1

11

6

12

11

14

13

12

11

14

13

X7DWN+

CTRL

JPL1

12

11

41

COM1

2

10

2

LAN

S I/O

USB0/1

B

1

9

1

KB/Mouse

JP2

LAN1

LAN2

BANK4

BANK3

BANK2

BANK1

A1

B1

B2 A2

A2

A1

B1

B2

Slot6 PCI-E2 x8

Slot5 PCI-E2 x8

Slot4 PCI-E x4

Slot3 PCI-E x8

Slot2 PCI-X 100/133MHz

JWOR

Slot1 PCI-X 100/133MHz

Slot0 PCI-U

CPU FAN1

A

JAR

SMBUS_PS

FAN7

3rd PWR Fail Detect

24-Pin PWR

CPU1

DIMM 4D

DIMM 4C

DIMM 4B

DIMM 4A

DIMM 3D

DIMM 3C

DIMM 3B

DIMM 3A

DIMM 2D

DIMM 2C

DIMM 2B

DIMM 2A

PSF

Intel 5400

(North Bridge)

CPU2

DIMM 1A

DIMM 1B

DIMM 1C

DIMM 1D

SEPC

USB 4

BIOS

JI2C1

1 1

JI2C2

Intel ESB 2

(South Bridge)

COM2

JWOL

JWD

JPG1

J7

JK1

JL1

1

SMB

CMOS Clear

VGA CTRL

USB 2/3

I-SATA0

4-Pin PWR

I-SATA1

I-SATA2

2

I-SATA3

Battery

1

8-Pin PWR

I-SATA4



I-SATA5

T-SGPIO2

T-SGPIO1

JWF1
JCF1

SIMSO

Buzzer

+

FAN1

FAN2

FAN3

FAN8

CPUFAN2

Compact Flash

1

FAN4

19

20

FP Ctrl Panel

2

1

7

1

PWRLED/SPK

1

JP1

1

LE1

JOH1

4

4

IDE#1

Floppy

1

1

A. PWR SMB

B. VGA

2-22

Compac t Flash Car d PWR
Connector

A Compact Flash Card Power

Connector is located at JWF1. For the

Compact Flash Card or the Compact

Fl as h J um pe r (J CF1) t o w or k p ro pe rl y,

you will need to first connect the

Compact Flash Card power cable to

JWF1. Refer to the board layout below

for the location.

T- S G P I O H e a de r s

Chapter 2: Installation

Compact Flash Card PWR

Connector

Setting Defi nition

On Compact Flash

Power On (Default)

Off Compact Flash

Power Off

Two SGPIO (Serial-Link General

Purpose Input/Output) headers

are located at J29 and J30 on the

motherboard. These headers support

serial link interfaces for the onboard

SATA and SAS connectors. See the

table on the right for pin defi nitions.

Refer to the board layout below for

the location.

JAR

SMBUS_PS

PSF

Intel ESB 2

(South Bridge)

COM2

CPU FAN1

FAN7

3rd PWR Fail Detect

JWD

JK1

JL1

JWOL

SMB

Fan5

Fan6

6

10

12

78

9

34

5

85

96

5

15

10

VGA

1

11

6

12

11

14

13

12

11

14

13

X7DWN+

CTRL

JPL1

41

COM1

2

10

2

LAN

12

11

1

9

1

S I/O

USB0/1

KB/Mouse

JP2

LAN1

LAN2

BANK4

BANK3

BANK2

BANK1

A1

B1

B2 A2

A2

A1

B1

B2

Slot6 PCI-E2 x8

Slot5 PCI-E2 x8

Slot4 PCI-E x4

Slot3 PCI-E x8

Slot2 PCI-X 100/133MHz

JWOR

Slot1 PCI-X 100/133MHz

Slot0 PCI-U

DIMM 4D

DIMM 4C

DIMM 4B

DIMM 4A

DIMM 3D

DIMM 3C

DIMM 3B

DIMM 3A

DIMM 2D

DIMM 2C

DIMM 2B

DIMM 2A

Intel 5400

(North Bridge)

DIMM 1A

DIMM 1B

DIMM 1C

DIMM 1D

SEPC

USB 4

BIOS

JI2C1

1 1

JI2C2

J7

1

24-Pin PWR

CPU1

CPU2

JPG1

I-SATA0

CMOS Clear

VGA CTRL

USB 2/3

T-SGPIO

Pin Defi nitions

Pin# Defi nition Pin Defi nition

1NC 2 NC

3 Ground 4 Data

5 Load 6 Ground

7NC 8 NC

Note: NC= No Connections

4-Pin PWR

I-SATA1

I-SATA2

2

I-SATA3

Battery

1

8-Pin PWR

I-SATA4



I-SATA5

C

T-SGPIO2

T-SGPIO1

JWF1
JCF1

A

SIMSO

Buzzer

+

FAN1

FAN2

FAN3

FAN8

CPUFAN2

Compact Flash

B

1

FAN4

19

20

FP Ctrl Panel

2

1

7

1

PWRLED/SPK

1

JP1

1

LE1

JOH1

4

4

IDE#1

Floppy

1

1

A. Compact Flash PWR

B. SGPIO Header#1

C. SGPIO Header#2

2-23

X7DWN+ User's Manual

Connector

Pins

Jumper

Cap

Setting

2-6 Jumper Settings

Explanation of
Jumpers

To modify the operation of the

motherboard, jumpers can be used

to choose between optional settings.

Jumpers create shorts between two

pins to change the function of the

connector. Pin 1 is identifi ed with a

square solder pad on the printed circuit

board. See the motherboard layout

pages for jumper locations.

Note: On two pin jumpers, "Closed"

means the jumper is on and "Open"

means the jumper is off the pins.

3 2 1

3 2 1

Pin 1-2 short

GLAN Enable/Disable

JPL1 enables or disables the GLAN

Port1/GLAN Port2 on the mother-

board. See the table on the right for

jumper settings. The default setting

is Enabled.

JAR

SMBUS_PS

PSF

Intel ESB 2

(South Bridge)

COM2

CPU FAN1

FAN7

3rd PWR Fail Detect

JL1

JWOL

SMB

Fan5

Fan6

15

10

11

6

X7DWN+

A

JPL1

6

12

34

5

85

96

5

VGA

1

12

11

14

13

12

11

14

13

10

78

9

CTRL

COM1

12

11

41

1

2

9

10

1

2

LAN

S I/O

KB/Mouse

USB0/1

JP2

LAN1

LAN2

BANK4

BANK3

BANK2

BANK1

A1

B1

B2 A2

A2

A1

B1

B2

Slot6 PCI-E2 x8

Slot5 PCI-E2 x8

Slot4 PCI-E x4

Slot3 PCI-E x8

Slot2 PCI-X 100/133MHz

JWOR

Slot1 PCI-X 100/133MHz

Slot0 PCI-U

DIMM 4D

DIMM 4C

DIMM 4B

DIMM 4A

DIMM 3D

DIMM 3C

DIMM 3B

DIMM 3A

DIMM 2D

DIMM 2C

DIMM 2B

DIMM 2A

Intel 5400

(North Bridge)

DIMM 1A

DIMM 1B

DIMM 1C

DIMM 1D

SEPC

USB 4

BIOS

JI2C1

1 1

JI2C2

GLAN Enable

Jumper Settings

Pin# Defi nition

1-2 Enabled (default)

2-3 Disabled

1

4-Pin PWR

I-SATA0

CMOS Clear

VGA CTRL

USB 2/3

I-SATA1

I-SATA2

2

I-SATA3

Battery

8-Pin PWR

I-SATA5

I-SATA4



T-SGPIO2

T-SGPIO1

JWF1
JCF1

SIMSO

Buzzer

+

FAN1

FAN2

FAN3

FAN8

CPUFAN2

Compact Flash

1

FAN4

19

20

FP Ctrl Panel

2

1

7

1

PWRLED/SPK

1

JP1

1

LE1

JOH1

4

4

IDE#1

Floppy

1

1

24-Pin PWR

CPU1

CPU2

JWD

JPG1

J7

JK1

1

A. GLAN Ports1/2 Enable

2-24

Chapter 2: Installation

CMOS Clear

JBT1 is used to clear CMOS. Instead of pins, this "jumper" consists of contact

pads to prevent the accidental clearing of CMOS. To clear CMOS, use a metal

object such as a small screwdriver to touch both pads at the same time to short

the connection. Always remove the AC power cord from the system before clear-

ing CMOS. Note: For an ATX power supply, you must completely shut down the

system, remove the AC power cord and then short JBT1 to clear CMOS.

Watch Do g Enab le/D isab le

Watch Dog (JWD) is a system monitor that can

reboot the system when a software application

hangs. Close Pins 1-2 to reset the system if an

application hangs. Close Pins 2-3 to generate a

non-maskable interrupt signal for the application

that hangs. See the table on the right for jumper

settings. Watch Dog must also be enabled in the

BIOS.

Fan5

Fan6

6

10

12

78

9

34

5

85

96

5

15

10

VGA

1

11

6

12

11

14

13

12

11

14

13

X7DWN+

CTRL

JPL1

41

COM1

2

10

2

LAN

12

11

1

9

1

S I/O

USB0/1

KB/Mouse

JP2

LAN1

LAN2

BANK4

BANK3

BANK2

BANK1

A1

B1

B2 A2

A2

A1

B1

B2

Slot6 PCI-E2 x8

Slot5 PCI-E2 x8

Slot4 PCI-E x4

Slot3 PCI-E x8

Slot2 PCI-X 100/133MHz

JWOR

Slot1 PCI-X 100/133MHz

Slot0 PCI-U

CPU FAN1

JAR

SMBUS_PS

FAN7

3rd PWR Fail Detect

24-Pin PWR

CPU1

DIMM 4D

DIMM 4C

DIMM 4B

DIMM 4A

DIMM 3D

DIMM 3C

DIMM 3B

DIMM 3A

DIMM 2D

DIMM 2C

DIMM 2B

DIMM 2A

PSF

Intel 5400

(North Bridge)

CPU2

DIMM 1A

DIMM 1B

DIMM 1C

DIMM 1D

SEPC

USB 4

BIOS

JI2C1

1 1

JI2C2

Intel ESB 2

(South Bridge)

COM2

JWOL

JWD

B

JPG1

J7

JK1

JL1

1

SMB

I-SATA0

CMOS Clear

VGA CTRL

USB 2/3

4-Pin PWR

I-SATA1

I-SATA2

A

2

I-SATA3

Battery

1

8-Pin PWR

I-SATA4



I-SATA5

T-SGPIO2

T-SGPIO1

JWF1
JCF1

SIMSO

Buzzer

+

FAN1

FAN2

FAN3

FAN8

CPUFAN2

Compact Flash

1

FAN4

19

20

FP Ctrl Panel

2

1

7

1

PWRLED/SPK

1

JP1

1

LE1

JOH1

4

4

IDE#1

Floppy

1

1

Watch Dog

Jumper Settings (JWD)

Jumper Setting Defi nition

Pins 1-2 Reset

(default)

Pins 2-3 NMI

Open Disabled

A. Clear CMOS

B. Watch Dog Enable

2-25

X7DWN+ User's Manual

VGA Enable/Disable

JPG1 allows you to enable or disable

the VGA Controller. The default position

is on pins 1 and 2 to use this feature.

See the table on the right for jumper

settings.

Memory Voltage Select

Jumper JP2 allows the user to select

memory voltage for the motherboard.

See the table on the right for jumper

settings.

VGA Enable/Disable

Jumper Settings (JPG1)

Jumper Setting Defi nition

Pins 1-2 Enabled

Pins 2-3 Disabled

Memory Voltage Select

Jumper Settings

Setting Defi nition

1-2 Auto (default)

2-3 1.5V

Off 1.8V

Fan5

Fan6

6

10

12

78

9

34

5

85

96

5

15

10

VGA

1

11

6

12

11

14

13

12

11

14

13

X7DWN+

CTRL

JPL1

12

11

41

COM1

2

10

2

LAN

B

1

9

1

S I/O

USB0/1

KB/Mouse

JP2

LAN1

LAN2

BANK4

BANK3

BANK2

BANK1

A1

B1

B2 A2

A2

A1

B1

B2

Slot6 PCI-E2 x8

Slot5 PCI-E2 x8

Slot4 PCI-E x4

Slot3 PCI-E x8

Slot2 PCI-X 100/133MHz

JWOR

Slot1 PCI-X 100/133MHz

Slot0 PCI-U

CPU FAN1

DIMM 4D

DIMM 4C

DIMM 4B

DIMM 4A

DIMM 3D

DIMM 3C

DIMM 3B

DIMM 3A

DIMM 2D

DIMM 2C

DIMM 2B

DIMM 2A

PSF

FAN7

JAR

SMBUS_PS

24-Pin PWR

3rd PWR Fail Detect

CPU1

Intel 5400

(North Bridge)

CPU2

DIMM 1A

DIMM 1B

DIMM 1C

DIMM 1D

SEPC

JWD

A

JPG1

COM2

JWOL

J7

JK1

JL1

1

SMB

USB 4

BIOS

JI2C1

1 1

JI2C2

Intel ESB 2

(South Bridge)

I-SATA0

CMOS Clear

VGA CTRL

USB 2/3

4-Pin PWR

I-SATA1

I-SATA2

2

I-SATA3

Battery

1

8-Pin PWR

I-SATA5

I-SATA4



T-SGPIO2

T-SGPIO1

JWF1
JCF1

SIMSO

Buzzer

+

FAN1

FAN2

FAN3

FAN8

CPUFAN2

Compact Flash

1

FAN4

19

20

FP Ctrl Panel

2

1

7

1

PWRLED/SPK

1

JP1

1

LE1

JOH1

4

4

IDE#1

Floppy

1

1

A. VGA Enable

B. Memory Voltage Se-

lect

2-26

Chapter 2: Installation

3rd PWR S upply P WR Fault
Detection (J3P)

The system can notify you in the event

of a power supply failure. This feature is

available when three power supply units

are installed in the chassis with one act-

ing as a backup. If you only have one

or two power supply units installed, you

should disable this (the default setting)

with J3P to prevent the false alarm.

I2C Bus to PCI-X /PCI - Exp.
Slots

Jumpers I

J28, allow you to connect the System

Management Bus (I

E slots

disable the connection. See the table on

the right for jumper settings.

2

C1 and I2C2, located at J27 &

2

C) to PCI-X/PCI-

. The default setting is Open to

3rd PWR Supply PWR Fault

Jumper Settings

Jumper Setting Defi nition

Closed Enabled

Open Disabled (Default)

I2C to PCI-S/PCI/Exp

Jumper Settings

Jumper Setting Defi nition

Closed Enabled

Open Disabled (Default)

Fan5

Fan6

6

10

78

12

9

34

5

85

96

5

15

10

VGA

1

11

6

12

11

14

13

12

11

14

13

X7DWN+

CTRL

JPL1

41

COM1

2

10

2

LAN

12

11

1

9

1

S I/O

USB0/1

KB/Mouse

JP2

LAN1

LAN2

BANK4

BANK3

BANK2

BANK1

A1

B1

B2 A2

A2

A1

B1

B2

Slot6 PCI-E2 x8

Slot5 PCI-E2 x8

Slot4 PCI-E x4

Slot3 PCI-E x8

Slot2 PCI-X 100/133MHz

JWOR

Slot1 PCI-X 100/133MHz

Slot0 PCI-U

A. 3rd PWR Failure Detection

CPU FAN1

JAR

SMBUS_PS

FAN7

A

3rd PWR Fail Detect

24-Pin PWR

CPU1

DIMM 4D

DIMM 4C

DIMM 4B

DIMM 4A

DIMM 3D

DIMM 3C

DIMM 3B

DIMM 3A

DIMM 2D

DIMM 2C

DIMM 2B

DIMM 2A

PSF

Intel 5400

(North Bridge)

CPU2

DIMM 1A

DIMM 1B

DIMM 1C

DIMM 1D

SEPC

B

JI2C1

1 1

JI2C2

USB 4

BIOS

Intel ESB 2

(South Bridge)

JWD

JPG1

J7

C

COM2

JK1

JL1

JWOL

1

SMB

I-SATA0

CMOS Clear

VGA CTRL

USB 2/3

4-Pin PWR

I-SATA1

I-SATA2

2

I-SATA3

Battery

1

8-Pin PWR

I-SATA4



I-SATA5

T-SGPIO2

T-SGPIO1

JWF1
JCF1

SIMSO

Buzzer

+

FAN1

FAN2

FAN3

FAN8

CPUFAN2

Compact Flash

1

FAN4

19

20

FP Ctrl Panel

2

1

7

1

PWRLED/SPK

1

JP1

1

LE1

JOH1

4

4

IDE#1

Floppy

1

1

B. I

C. I

2

C1

2

C2

2-27

X7DWN+ User's Manual

Compa ct Fla sh Mast er/Sl ave
Select

A Compac t Flash Master (Primary)/Slave

(Secondary) Selection Jumper is located

at JCF1. Close this jumper to enable

Compact Flash Card. For the Compact

Flash Card or the Compact Flash Jumper

(JCF1) to work properly, you will need

to fi rst connect the Compact Flash Card

power cable to JWF1. Refer to the board

layout below for the location.

Compact Flash Card Master/

Slave Select

Jumper Defi nition

Open Slave (Secondary)

Closed Master (Primary)

Fan5

Fan6

6

10

12

78

9

34

5

85

96

5

15

10

VGA

1

11

6

12

11

14

13

12

11

14

13

X7DWN+

CTRL

JPL1

12

11

B

41

COM1

2

10

2

LAN

S I/O

USB0/1

1

9

1

KB/Mouse

JP2

LAN1

LAN2

BANK4

BANK3

BANK2

BANK1

A1

B1

B2 A2

A2

A1

B1

B2

Slot6 PCI-E2 x8

Slot5 PCI-E2 x8

Slot4 PCI-E x4

Slot3 PCI-E x8

Slot2 PCI-X 100/133MHz

JWOR

Slot1 PCI-X 100/133MHz

Slot0 PCI-U

CPU FAN1

JAR

SMBUS_PS

PSF

FAN7

3rd PWR Fail Detect

24-Pin PWR

CPU1

DIMM 4D

DIMM 4C

DIMM 4B

DIMM 4A

DIMM 3D

DIMM 3C

DIMM 3B

DIMM 3A

DIMM 2D

DIMM 2C

DIMM 2B

DIMM 2A

Intel 5400

(North Bridge)

CPU2

DIMM 1A

DIMM 1B

DIMM 1C

DIMM 1D

SEPC

USB 4

BIOS

JI2C1

1 1

JI2C2

Intel ESB 2

(South Bridge)

COM2

JWOL

JWD

JPG1

J7

JK1

JL1

1

SMB

CMOS Clear

VGA CTRL

USB 2/3

I-SATA0

4-Pin PWR

I-SATA1

I-SATA2

2

I-SATA3

1

8-Pin PWR

I-SATA4

Battery



A

I-SATA5

JWF1

T-SGPIO2

T-SGPIO1

JCF1

SIMSO

Buzzer

+

FAN1

FAN2

FAN3

FAN8

CPUFAN2

Compact Flash

1

FAN4

19

20

FP Ctrl Panel

2

1

7

1

PWRLED/SPK

1

JP1

1

LE1

JOH1

4

4

IDE#1

Floppy

1

1

A. Compact Flash Master/

Slave Select

B. Memory Select

2-28

Chapter 2: Installation

2-7 Onboard Indicators

GLAN LEDs

There are two GLAN ports on the moth-

erboard. Each Gigabit Ethernet LAN port

has two LEDs. The yellow LED indicates

activity, while the Link LED may be

green, amber or off to indicate the speed

of the connection. See the tables at right

for more information.

Onboa rd Power LED

An Onboard Power LED is located at LE1

on the motherboard. When this LED is lit,

the system is on. Be sure to turn off the

system and unplug the power cord before

removing or installing components. See

the tables at right for more information.

Link

LED

Activity

LED

Rear View (when facing the

rear side of the chassis)

GLAN Activity Indicator

LED Settings

Color Status Defi nition

Yellow Flashing Active

GLAN Link Indicator

LED Settings

LED Color Defi nition

Off No Connection or 10 Mbps

Green 100 Mbps

Amber 1 Gbps

Onboard PWR LED Indicator (LE1)

LED Color Defi nition

Off System Off (PWR cable

Green System On

Green:
Flashing
Quickly

Green:
Flashing
Slowly

LED Settings

not connected)

ACPI S1 State

ACPI S3 (STR) State

Fan5

Fan6

6

12

34

5

85

96

5

15

10

VGA

1

11

6

12

11

14

13

12

11

14

13

X7DWN+

JPL1

10

78

9

CTRL

COM1

LAN

12

11

41

1

2

9

10

1

2

S I/O

KB/Mouse

USB0/1

LAN1

LAN2

JP2

BANK4

BANK3

BANK2

A

B

BANK1

A1

B1

B2 A2

A2

A1

B1

B2

Slot6 PCI-E2 x8

Slot5 PCI-E2 x8

Slot4 PCI-E x4

Slot3 PCI-E x8

Slot2 PCI-X 100/133MHz

JWOR

Slot1 PCI-X 100/133MHz

Slot0 PCI-U

CPU FAN1

JAR

SMBUS_PS

FAN7

3rd PWR Fail Detect

24-Pin PWR

CPU1

DIMM 4D

DIMM 4C

DIMM 4B

DIMM 4A

DIMM 3D

DIMM 3C

DIMM 3B

DIMM 3A

DIMM 2D

DIMM 2C

DIMM 2B

DIMM 2A

PSF

Intel 5400

(North Bridge)

CPU2

DIMM 1A

DIMM 1B

DIMM 1C

DIMM 1D

SEPC

USB 4

BIOS

JI2C1

1 1

JI2C2

Intel ESB 2

(South Bridge)

COM2

JWOL

JWD

JPG1

J7

JK1

JL1

1

SMB

I-SATA0

CMOS Clear

VGA CTRL

USB 2/3

4-Pin PWR

I-SATA1

I-SATA2

2

I-SATA3

Battery

1

8-Pin PWR

I-SATA5

I-SATA4



C

T-SGPIO2

T-SGPIO1

JWF1
JCF1

SIMSO

Buzzer

+

FAN1

FAN2

FAN3

FAN8

CPUFAN2

Compact Flash

1

FAN4

19

20

FP Ctrl Panel

2

1

7

1

PWRLED/SPK

1

JP1

1

LE1

JOH1

4

4

IDE#1

Floppy

1

1

A. GLAN Port1 LEDs

B. GLAN Port2 LEDs

C. Onboard Power LED

2-29

X7DWN+ User's Manual

2-8 Floppy Drive, SIMSO, Serial ATA and Hard Disk
Drive Connections

Note the following when connecting the fl oppy and hard disk drive cables:

• The fl oppy disk drive cable has seven twisted wires.

• A red mark on a wire typically designates the location of pin 1.

• A single fl oppy disk drive ribbon cable has 34 wires and two connectors to

provide for two fl oppy disk drives. The connector with twisted wires always

connects to drive A, and the connector that does not have twisted wires always

Floppy Drive Connector

Pin Defi nitions

Pin# Defi nition Pin # Defi nition

Floppy C onne cto r

The fl oppy connector is located at

J22 on the motherboard. See the

table on the right for pin defi nitions.

CPU FAN1

PSF

Intel ESB 2

COM2

JAR

SMBUS_PS

JWOL

FAN7

3rd PWR Fail Detect

JWD

JK1

JL1

SMB

J7

1

24-Pin PWR

CPU1

CPU2

JPG1

CMOS Clear

VGA CTRL

USB 2/3

I-SATA0

I-SATA1

Fan5

Fan6

6

12

34

5

85

96

5

15

10

VGA

1

11

6

12

11

14

13

12

11

14

13

X7DWN+

JPL1

DIMM 4D

Slot6 PCI-E2 x8

Slot5 PCI-E2 x8

Slot4 PCI-E x4

Slot3 PCI-E x8

Slot2 PCI-X 100/133MHz

JWOR

Slot1 PCI-X 100/133MHz

Slot0 PCI-U

DIMM 4C

DIMM 4B

DIMM 4A

DIMM 3D

DIMM 3C

DIMM 3B

DIMM 3A

DIMM 2D

DIMM 2C

DIMM 2B

DIMM 2A

Intel 5400

(North Bridge)

DIMM 1A

DIMM 1B

DIMM 1C

DIMM 1D

SEPC

USB 4

BIOS

JI2C1

1 1

JI2C2

(South Bridge)

BANK4

12

10

78

9

11

KB/Mouse

BANK3

41

USB0/1

JP2

COM1

BANK2

1

2

LAN1

9

10

1

2

LAN2

BANK1

LAN

CTRL

S I/O

A1

B1

B2 A2

A2

A1

B1

B2

4-Pin PWR

I-SATA2

2

I-SATA3

Battery

1

8-Pin PWR

I-SATA4



1 Ground 2 FDHDIN

3 Ground 4 Reserved

5 Key 6 FDEDIN

7 Ground 8 Index

9 Ground 10 Motor Enable

11 Ground 12 Drive Select B

13 Ground 14 Drive Select B

15 Ground 16 Motor Enable

17 Ground 18 DIR

19 Ground 20 STEP

21 Ground 22 Write Data

23 Ground 24 Write Gate

25 Ground 26 Track 00

27 Ground 28 Write Protect

29 Ground 30 Read Data

31 Ground 32 Side 1 Select

33 Ground 34 Diskette

A. Floppy

Buzzer

+

FAN1

19

20

FP Ctrl Panel

2

1

FAN2

7

1

PWRLED/SPK

1

JP1

1

LE1

JOH1

4

FAN3

4

FAN8

CPUFAN2

I-SATA5

T-SGPIO2

IDE#1

T-SGPIO1

Compact Flash

JWF1
JCF1

1

Floppy

A

SIMSO

1

1

FAN4

2-30

Chapter 2: Installation

G

F

E

D

Serial ATA Port s

Six Serial ATA Ports (I-SATA0~I-

SATA 5) are located at JS1~JS6

on the motherboard. These ports

provide serial-link signal transmis-

sion, which is faster than that of the

traditional Parallel ATA. See the table

on the right for pin defi nitions.

SIMSO Slot

The SIMSO (Supermicro Intelligent

Management) Slot is located at J16

on the motherboard. Refer to the

layout below for the SIMSO Slot

location.

Serial ATA

Pin Defi nitions

Pin# Defi nition

1 Ground

2 TX_P

3 TX_N

4 Ground

5 RX_N

6 RX_P

7 Ground

Slot6 PCI-E2 x8

Slot5 PCI-E2 x8

Slot4 PCI-E x4

Slot3 PCI-E x8

Slot2 PCI-X 100/133MHz

JWOR

Slot1 PCI-X 100/133MHz

Slot0 PCI-U

DIMM 4D

DIMM 4C

DIMM 4B

DIMM 4A

DIMM 3D

DIMM 3C

DIMM 3B

DIMM 3A

DIMM 2D

DIMM 2C

DIMM 2B

DIMM 2A

Intel 5400

(North Bridge)

DIMM 1A

DIMM 1B

DIMM 1C

DIMM 1D

SEPC

USB 4

BIOS

JI2C1

1 1

JI2C2

Fan5

BANK4

Fan6

12

6

10

12

78

9

34

5

11

KB/Mouse

BANK3

85

41

USB0/1

JP2

96

COM1

BANK2

5

15

10

VGA

1

11

6

1

2

12

11

14

13

LAN1

9

10

1

2

12

11

LAN2

14

13

BANK1

X7DWN+

LAN

CTRL

JPL1

S I/O

A1

B1

B2 A2

A2

A1

B1

B2

JAR

SMBUS_PS

PSF

Intel ESB 2

(South Bridge)

COM2

CPU FAN1

FAN7

3rd PWR Fail Detect

JWD

JK1

JL1

JWOL

SMB

J7

1

24-Pin PWR

CPU1

CPU2

JPG1

I-SATA0

CMOS Clear

VGA CTRL

USB 2/3

I-SATA1

4-Pin PWR

I-SATA2

2

I-SATA3

Battery

1

8-Pin PWR

I-SATA4



I-SATA5

T-SGPIO2

T-SGPIO1

JWF1
JCF1

Buzzer

+

FAN1

20

FP Ctrl Panel

2

FAN2

PWRLED/SPK
JP1

LE1

FAN3

FAN8

CPUFAN2

IDE#1

Compact Flash

1

Floppy

SIMSO

FAN4

2-31

19

1

7

1

1

1

JOH1

4

4

1

1

A. I-SATA0

B. I-SATA1

C. I-SATA2

D. I-SATA3

E. I-SATA4

F. I-SATA5

G. SIMSO

B

A

C

X7DWN+ User's Manual

IDE Connectors

There are two IDE Connectors (JIDE1:

Blue, JIDE2: White) on the mother-

board. The blue IDE connector (JIDE1)

is designated the Primary IDE Drive.

The white IDE connector (JIDE2) is

designated the Secondary IDE Drive,

specially reserved for Compact Flash

Card use only. (See the note below.)

See the table on the right for pin defi -

nitions.

Note: JIDE2 (the white slot) is reserved

for Compact Flash Card use only. Do

not use it for other devices. If JIDE2 is

populated with a Compact Flash Card,

JIDE1 (the blue slot) will be available

for one device only. For the Compact

Flash Card to work properly, you will

need to connect a power cable to

JWF1 fi rst.

IDE Drive Connectors

Pin Defi nitions

Pin# Defi nition Pin # Defi nition

1 Reset IDE 2 Ground

3 Host Data 7 4 Host Data 8

5 Host Data 6 6 Host Data 9

7 Host Data 5 8 Host Data 10

9 Host Data 4 10 Host Data 11

11 Host Data 3 12 Host Data 12

13 Host Data 2 14 Host Data 13

15 Host Data 1 16 Host Data 14

17 Host Data 0 18 Host Data 15

19 Ground 20 Key

21 DRQ3 22 Ground

23 I/O Write 24 Ground

25 I/O Read 26 Ground

27 IOCHRDY 28 BALE

29 DACK3 30 Ground

31 IRQ14 32 IOCS16

33 Addr1 34 Ground

35 Addr0 36 Addr2

37 Chip Select 0 38 Chip Select 1

39 Activity 40 Ground

Fan5

Fan6

6

10

12

78

9

34

5

85

96

5

15

10

VGA

1

11

6

12

11

14

13

12

11

14

13

X7DWN+

CTRL

JPL1

41

COM1

2

10

2

LAN

12

11

KB/Mouse

USB0/1

1

9

1

S I/O

JP2

LAN1

LAN2

BANK4

BANK3

BANK2

BANK1

A1

B1

B2 A2

A2

A1

B1

B2

Slot6 PCI-E2 x8

Slot5 PCI-E2 x8

Slot4 PCI-E x4

Slot3 PCI-E x8

Slot2 PCI-X 100/133MHz

JWOR

Slot1 PCI-X 100/133MHz

Slot0 PCI-U

CPU FAN1

JAR

SMBUS_PS

24-Pin PWR

FAN7

3rd PWR Fail Detect

CPU1

DIMM 4D

DIMM 4C

DIMM 4B

DIMM 4A

DIMM 3D

DIMM 3C

DIMM 3B

DIMM 3A

DIMM 2D

DIMM 2C

DIMM 2B

DIMM 2A

PSF

Intel 5400

(North Bridge)

CPU2

DIMM 1A

DIMM 1B

DIMM 1C

DIMM 1D

SEPC

USB 4

BIOS

JI2C1

1 1

JI2C2

Intel ESB 2

(South Bridge)

COM2

JWOL

JWD

JPG1

J7

JK1

JL1

1

SMB

I-SATA0

CMOS Clear

VGA CTRL

USB 2/3

4-Pin PWR

I-SATA1

I-SATA2

2

I-SATA3

Battery

1

8-Pin PWR

I-SATA4



I-SATA5

JWF1
JCF1

T-SGPIO2

T-SGPIO1

SIMSO

B

FAN2

FAN3

FAN8

CPUFAN2

Buzzer

+

FAN1

19

20

FP Ctrl Panel

2

1

7

1

PWRLED/SPK

1

JP1

1

LE1

JOH1

4

4

A

IDE#1

Compact Flash

1

Floppy

1

1

FAN4

A. IDE#1

B. IDE#2 (Compact Flash)

2-32

Chapter 3: Troubleshooting

Chapter 3

Troubleshooting

3-1 Troubleshooting Procedures

Use the following procedures to troubleshoot your system. If you have followed all

of the procedures below and still need assistance, refer to the ‘Technical Support

Procedures’ and/or ‘Returning Merchandise for Service’ section(s) in this chapter.

Note: Always disconnect the power cord before adding, changing or install­ing any h ardw are c omp onen ts.

Before Power On

1. Make sure that there are no short circuits between the motherboard and chas-

sis.

2. Disconnect all ribbon/wire cables from the motherboard, including those for the

keyboard and mouse.

3. Remove all add-on cards.

4. Install one CPU (making sure it is fully seated) and connect the chassis

speaker and the power LED to the motherboard. (Check all jumper settings

as well.)

5. Use the correct type of CMOS onboard battery as recommended by the Manu-

facturer. Do not install the onboard battery upside down to avoid possible

explosion.

No Power

1. Make sure that no short circuits between the motherboard and the chassis.

2. Make sure that all jumpers are set to their default positions.

3. Check that the 115V/230V switch on the power supply is properly set.

4. Turn the power switch on and off to test the system.

5. The battery on your motherboard may be old. Check to verify that it still sup-

plies ~3VDC. If it does not, replace it with a new one.

No Video

1. If the power is on but you have no video, remove all the add-on cards and

cables.

2. Use the speaker to determine if any beep codes exist. Refer to the Appendix

3-1

X7DWN+ User's Manual

for details on beep codes.

Losing the System’s Setup Confi guration

1. Make sure that you are using a high quality power supply. A poor quality power

supply may cause the system to lose the CMOS setup information. Refer to

Section 1-6 for details on recommended power supplies.

2. The battery on your motherboard may be old. Check to verify that it still sup-

plies ~3VDC. If it does not, replace it with a new one.

3. If the above steps do not fi x the Setup Confi guration problem, contact your

vendor for repairs.

NOTE

If you are a system integrator, VAR or OEM, a POST diagnostics

card is recommended. For I/O port 80h codes, refer to App. B.

Memory Errors

1. Make sure that the DIMM modules are properly and fully installed.

2. Check if different speeds of DIMMs have been installed and check if the BIOS

setup is confi gured for the fastest speed of RAM used. (It is recommended

to use the same RAM speed for all DIMMs in the system.)

3. Make sure you are using the correct type of DDR2 FBD (Fully Buffered) ECC

800/667/533 SDRAM (recommended by the manufacturer.)

4. Check for bad DIMM modules or slots by swapping a single module between

all memory slots and check the results.

5. Make sure that all memory modules are fully seated in their slots. As an inter-

leaved memory scheme is used, you must install pair(s) modules at a time,

beginning with Bank 1, then Bank 2, and so on (see Page 2-6).

6. Check the position of the 115V/230V switch on the power supply.

3-2 Technical Support Procedures

Before contacting Technical Support, please take the following steps. Also, please

note that as a motherboard manufacturer, Supermicro does not sell directly to end-

users, so it is best to fi rst check with your distributor or reseller for troubleshooting

services. They should know of any possible problem(s) with the specifi c system

confi guration that was sold to you.

1. Please go through the ‘Troubleshooting Procedures’ and 'Frequently Asked

Question' (FAQ) sections in this chapter or see the FAQs on our web site

3-2

Chapter 3: Troubleshooting

(http://www.supermicro.com/support/faqs/) before contacting Technical

Support.

2. B I O S upgrades can be dow n l o a ded from our we b site at

com/support/bios/

Note: Not a ll BIOS c an be fl ashed , it depen ds on the mod ifi cations to the
boot block code.

3. If you still cannot resolve the problem, include the following information when

contacting Supermicro for technical support:

• Motherboard model and PCB revision number

• BIOS release date/version (this can be seen on the initial display when your

system fi rst boots up)

•System confi guration

An example of a Technical Support form is on our web site at

supermicro.com/support/contact.cfm).

4. Distributors: For immediate assistance, please have your account number

ready when placing a call to our technical support department. We can be

reached by e-mail at [e-mail] or by fax at: [phone],

option 2.

).

(http://www.supermicro.

(http://www.

3-3 Frequently Asked Questions

Que sti on: Wh at a re th e var iou s t ype s of m emo r y th at my mo th er boa rd c an
support?

Answer: The X7DWN+ has 16 240-pin DIMM slots that support DDR2 FBD ECC

800/667/533 SDRAM modules. It is strongly recommended that you do not mix

memory modules of different speeds and sizes.

Que stio n: How do I u pda te my BI OS?
Answer: It is recommended that you do not upgrade your BIOS if you are not

experiencing any problems with your system. Updated BIOS fi les are located on

our web site at

warning message and the information on how to update your BIOS on our web

site. Select your motherboard model and download the BIOS fi le to your computer.

Also, check the current BIOS revision and make sure that it is newer than your

BIOS before downloading. You can choose from the zip fi le and the .exe fi le. If

you choose the zip BIOS fi le, please unzip the BIOS fi le onto a bootable device or

a USB pen. Run the batch fi le using the format fl ash.bat fi lename.rom from your

bootable device or USB pen to fl ash the BIOS. Then, your system will automati-

cally reboot. If you choose the .exe fi le, please run the .exe fi le under Windows to

http://www.supermicro.com/support/bios/. Please check our BIOS

3-3

X7DWN+ User's Manual

create the BIOS fl ash fl oppy disk. Insert the fl oppy disk into the system you wish

to fl ash the BIOS. Then, bootup the system to the fl oppy disk. The BIOS utility will

automatically fl ash the BIOS without any prompts. Please note that this process

may take a few minutes to complete. Do not be concerned if the screen is paused

for a few minutes.

Warning

to prevent possible system boot failure!)

Question: What's on the CD that came with my motherboard?

Answer: The supplied compact disc has quite a few drivers and programs that

will greatly enhance your system. We recommend that you review the CD and

install the applications you need. Applications on the CD include chipset drivers

for the Windows OS, security and audio drivers.

: Do not shut down or reset the system while updating the BIOS

3-4 Returning Merchandise for Service

A receipt or copy of your invoice marked with the date of purchase is required

before any warranty service will be rendered. You can obtain service by calling

your vendor for a Returned Merchandise Authorization (RMA) number. When

returning to the manufacturer, the RMA number should be prominently displayed

on the outside of the shipping carton, and mailed prepaid or hand-carried. Ship-

ping and handling charges will be applied for all orders that must be mailed when

service is complete.

This warranty only covers normal consumer use and does not cover damages in-

curred in shipping or from failure due to the alternation, misuse, abuse or improper

maintenance of products.

During the warranty period, contact your distributor fi rst for any product prob-

lems.

3-4

Chapter 4

Chapter 4: BIOS

BIOS

4-1 Introduction

This chapter describes the Phoenix BIOS™ Setup utility for the X7DWN+. The

Phoenix ROM BIOS is stored in a fl ash chip and can be easily upgraded using a

fl oppy disk-based program.

Note: Due to periodic changes to the BIOS, some settings may have been added

or deleted and might not yet be recorded in this manual. Please refer to the Manual

Download area of the Supermicro web site <http://www.supermicro.com> for any

changes to the BIOS that may not be refl ected in this manual.

System BIOS

The BIOS is the Basic Input Output System used in all IBM® PC, XT™, AT®, and

PS/2® compatible computers. The Phoenix BIOS stores the system parameters,

types of disk drives, video displays, etc. in the CMOS. The CMOS memory requires

very little electrical power. When the computer is turned off, a backup battery

provides power to the CMOS Logic, enabling it to retain system parameters. When

the computer is powered on, the computer is confi gured with the values stored in

the CMOS Logic by the system BIOS, which gains control at boot up.

How To Change the Co nfi guration Dat a

The CMOS information that determines the system parameters may be changed

by entering the BIOS Setup utility. This Setup utility can be accessed by pressing

the <Delete> key at the appropriate time during system boot.

Star ti ng the S etup Ut ilit y

Normally, the only visible POST (Power On Self Test) routine is the memory test.

As the memory is being tested, press the <Delete> key to enter the main menu

of the BIOS Setup utility. From the main menu, you can access the other setup

screens, such as the Security and Power menus. Beginning with Section 4-3,

detailed descriptions are given for each parameter setting in the Setup utility.

Warning: Do not shut down or reset the system while updating BIOS

to prevent possible boot failure.

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X7DWN+ User's Manual

4-2 Running Setup

Default settings are in bold tex t unless otherwise noted.

The BIOS setup options described in this section are selected by choosing the

appropriate text from the main BIOS Setup screen. All displayed text is described

in this section, although the screen display is often all you need to understand how

to set the options as shown on the following page.

When you fi rst power on the computer, the Phoenix BIOS™ is immediately acti-

vated.

While the BIOS is in control, the Setup program can be activated in one of two

ways:

1. By pressing <Delete> immediately after turning the system on, or

2. When the message shown below appears briefl y at the bottom of the screen

during the POST (Power On Self-Test), press the <Delete> key to activate the main

Setup menu:

Press the <Delete> key to enter Setup

4-3 Main BIOS Setup

All main Setup options are described in this section. The main BIOS Setup screen

is displayed below.

Use the Up/Down arrow keys to move among the different settings in each menu.

Use the Left/Right arrow keys to change the options for each setting.

Press the <Esc> key to exit the CMOS Setup Menu. The next section describes in

detail how to navigate through the menus.

Items that use submenus are indicated with the

press the <Enter> key to access the submenu.

Xicon. With the item highlighted,

4-2

Main BIOS Setup Menu

Chapter 4: BIOS

Main Setup Features

System Time

To set the system date and time, key in the correct information in the appropriate

fi elds. Then press the <Enter> key to save the data.

System Date

Using the arrow keys, highlight the month, day and year fi elds, and enter the

correct data. Press the <Enter> key to save the data.

BIOS Date

This fi eld displays the date when this version of BIOS was built.

Legacy Diskette A

This setting allows the user to set the type of fl oppy disk drive installed as

diskette A. The options are Disabled, 360Kb 5.25 in, 1.2MB 5.25 in, 720Kb 3.5

in, 1.44/1.25MB, 3.5 in and 2.88MB 3.5 in.

XIDE Channel 0 Master/Slave, SATA Port 0, SATA Port 1,
SATA Port 2 and SATA Port 3

These settings allow the user to set the parameters of IDE Channel 0 Master/Slave,

SATA Port 0, SATA Por t 1, SATA Por t 2, SATA Port 3 slots. Hit <Enter> to activate

the following sub-menu screen for detailed options of these items. Set the correct

confi gurations accordingly. The items included in the sub-menu are:

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X7DWN+ User's Manual

Type

This option allows the user to select the type of IDE hard drive. Select Auto to

allow the BIOS to automatically confi gure the parameters of the HDD installed

at the connection. Enter a number between 1 to 39 to select a predetermined

HDD type. Select User to allow the user to enter the parameters of the HDD

installed. Select CDROM if a CDROM drive is installed. Select ATAPI if a

removable disk drive is installed.

Multi-Sector Transfers

This item allows the user to specify the number of sectors per block to be

used in multi-sector transfer. The options are Disabled, 4 Sectors, 8 Sectors,

and 16 Sectors.

LBA Mode Control

This item determines whether the Phoenix BIOS will access the IDE Channel 0

Master Device via the LBA mode. The options are Enabled and Disabled.

32 Bit I/O

This option allows the user to enable or disable the function of 32-bit data

transfer. The options are Enabled and Disabled.

Transfer Mode

This option allows the user to set the tr ansfer mode. The options are Standard, Fast

PIO1, Fast PIO2, Fast PIO3, Fast PIO4, FPIO3/DMA1 and FPIO4/DMA2.

Ultra DMA Mode

This option allows the user to select Ultra DMA Mode. The options are Disabled,

Mode 0, Mode 1, Mode 2, Mode 3, Mode 4, and Mode 5.

Parallel ATA

This setting allows the user to enable or disable the function of Parallel ATA. The

options are Disabled, Cha nnel 0, Channel 1, and Both.

Serial ATA

This setting allows the user to enable or disable the function of Serial ATA. The

options are Disabled and Enabled.

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Chapter 4: BIOS

SATA Controller Mode Option

Sele ct Co m patib le to all o w the S ATA and PATA d r ives to b e autom a t ic a l ly- detec ted

and be placed in the Legacy Mode by the BIOS. Select Enhanced to allow the

SATA and PATA drives to be to be automatically-detected and be placed in the

Native IDE Mode. (Note: The Enhanced mode is supported by the Windows 2000

OS or a later version.)

When the SATA Controller Mode is set to "Enhanced", the following items will

display:

Serial ATA (SATA) RAID Enable

Select Enable to enable Serial ATA RAID Functions. (For the Windows OS

environment, use the RAID driver if this feature is set to Enabled. When this

item is set to Enabled, the item: "ICH RAID Code Base" will be available for you

to select either Intel or Adaptec Host RAID fi rmware to be activated. If this item

is set to Disabled, the item-SATA AHCI Enable will be available.) The options
are Enabled and Disabled.

ICH RAID Code Base

Select Intel to enable Intel's SATA RAID fi rmware. Select Adaptec to use Adaptec's

HostRAID fi rmware. The options are Intel and Adaptec.

SATA AHCI Enable

Select Enable to enable the function of Serial ATA Advanced Host Interface. (Take

caution when using this function. This feature is for advanced programmers only.

The options are Enabled and Disabled.)

System Memory

This display informs you how much system memory is recognized as being present

in the system.

Extended Memory

This display informs you how much extended memory is recognized as being

present in the system.

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X7DWN+ User's Manual

4-4 Advanced Setup

Choose Advanced from the Phoenix BIOS Setup Utility main menu with the arrow

keys. You should see the following display. The items with a triangle beside them have

sub menus that can be accessed by highlighting the item and pressing <Enter>.

XBoot Features

Access the submenu to make changes to the following settings.

QuickBoot Mode

If enabled, this feature will speed up the POST (Power On Self Test) routine by

skipping certain tests after the computer is turned on. The settings are Enabled

and Disabled. If Disabled, the POST routine will run at normal speed.

QuietBoot Mode

This setting allows you to Enable or Disable the graphic logo screen during boot-

up.

POST Errors

Select Enable to stop the POST routine and allow the system to display error

messages when an error occurs during bootup. The options are Enabled and

Disabled.

ACPI Mode

Use the setting to determine if you want to employ ACPI (Advanced Confi guration

and Power Interface) power management on your system. The options are Yes

and No.

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Chapter 4: BIOS

Power Button Behavior

If set to Instant-Off, the system will power off immediately as soon as the user

hits the power button. If set to 4-sec., the system will power off when the user

presses the power button for 4 seconds or longer. The options are instant-off

and 4-sec override.

Resume On Modem Ring

Select On to “wake your system up” when an incoming call is received by your

modem. The options are On and Off.

EFI OS Boot

If enabled, this feature provides support for EFI OS booting. The options are

Enabled and Disabled.

OS Booting

Set this feature to Enabled to allow the OS to boot up the system. The options are

Enabled and Disabled.

Power Loss Control

This setting allows you to choose how the system will react when power returns

after an unexpected loss of power. The options are Stay Off, Power On, and

Last State.

Watch Dog

If enabled, this option will automatically reset the system if the system is not active

for more than a predefi ned time period. The options are Enabled and Disabled.

Summary Screen

This setting allows you to Enable or Disable the summary screen which displays

the system confi guration during bootup.

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X7DWN+ User's Manual

XMemory Cache

Cache System BIOS Area

This setting allows you to designate a reserve area in the system memory to be

used as a System BIOS buffer to allow the BIOS to write (cache) its data into this

reserved memory area. Select Wri te Pr ote ct to enable the function and reserve

this area for the Video BIOS ROM access only. Select Uncached to disable this

function and make this area available for other devices.

Cache Video BIOS Area

This setting allows you to designate a reserve area in the system memory to be

used as a Video BIOS buffer to allow the BIOS to write (cache) its data into this

reserved memory area. Select Wri te Pr ote ct to enable the function and reserve

this area for the Video BIOS ROM access only. Select Uncached to disable this

function and make this area available for other devices.

Cache Base 0-512K

If enabled, this feature will allow the data stored in the base memory area: block

0-512K to be cached (written) into a buffer, a storage area in the Static DROM

(SDROM) or to be written into L1, L2 cache inside the CPU to speed up CPU

operations. Select Uncached to disable this function. Select Write Through to

allow data to be cached into the buffer and written into the system memory at the

same time. Select Write Protect to prevent data from being written into the base

memory area of Block 0-512K. Select Write Back to allow the CPU to write data

back directly from the buffer without writing data to the System Memory for fast

CPU data processing and operation. The options are Uncached, Write Through,

Write Protect, and Wr ite B ack.

Cache Base 512K-640K

If enabled, this feature will allow the data stored in the memory area: 512K-640K

to be cached (written) into a buffer, a storage area in the Static DROM (SDROM)

or written into L1, L2 or L3 cache inside the CPU to speed up CPU operations.

Select Uncached to disable this function. Select Write Through to allow data to

be cached into the buffer and written into the system memory at the same time.

Select Write Protect to prevent data from being written into the base memory

area of Block 512-640K. Select Write Back to allow the CPU to write data back

directly from the buffer without writing data to the system memory to speed up

CPU's operation. The options are Uncached, Write Through, Write Protect, and

Write B ack.

Cache Extended Memory

If enabled, this feature will allow the data stored in the extended memory area to

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Chapter 4: BIOS

be cached (written) into a buffer, a storage area in the Static DROM (SDROM)

or written into L1, L2, L3 cache inside the CPU to speed up CPU operations.

Select Uncached to disable this function. Select Write Through to allow data

to be cached into the buffer and written into the system memory at the same

time. Select Write Protect to prevent data from being written into the extended

memory area above 1 MB. Select Write Back to allow the CPU to write data back

directly from the buffer without writing data to the System Memory for fast CPU

data processing and operation. The options are Uncached, Write Through, Write

Protect, and Wri te Bac k.

Discrete MTRR Allocation

If enabled, MTRRs (-Memory Type Range Registers) are confi gured as distinct,

separate units and cannot be overlapped. If enabled, the user can achieve

better graphic effects when using a Linux graphic driver that requires the write-

combining confi guration with 4GB or more memory. The options are Enabled

and Disabled.

XPCI Confi guration

Access the submenu to make changes to the following settings for PCI devices.

Onboard GLAN1/Onboard GLAN2 (Gigabit- LAN) OPROM Confi gure

Select Enabled to allow the system to boot from the GLAN1 connection or the
GLAN 2 connection. The options are Enabled and Disabled.

IPMI 3rd-LAN OPROM Confi gure

Select Enabled to allow the system to boot from the IPMI 3rd-LAN connection.

The options are Disabled and Enabled.

Onboard Storage OPROM Confi gure

Select Enabled to allow the system to boot from the onboard storage device. The

options are Disabled and Enabled.

Option ROM Replacement

Select Enabled to enable to use the feature of Option ROM Chip Replacement. If

the system hangs due to this feature, reboot the system and change the setting.

The options are Enabled and Disabled.

ROM Scan Ordering

This feature allows the user to decide which Option ROM to be activated fi rst. The

options are Onboard fi rst and Add-On fi rst.

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X7DWN+ User's Manual

PCI Parity Error Forwarding

Enable this item to forward the PCI errors occurring behind P2P bridges to the South

Bridge, so NMI can be asserted. The options are Enabled and Disabled.

PCI Fast Delayed Transaction

Enable this function to improve the DMA data transfer rate for a PCI 32-bit

multimedia card. The options are Enable and Disabled.

Reset Confi guration Data

If set to Yes, this setting clears the Extended System Confi guration Data- (ESCD)

area. The options are Yes and No.

Frequency for PCI-X#1~PCI-X#2

This option allows the user to change the bus frequency for the devices installed

in the slot indicated. The options are Aut o, PCI 33 MHz, PCI 66 MHz, PCI-X 66

MHz, PCI-X 100 MHz, and PCI-X 133 MHz.

XSlot0 PCI-U x8, Slot1 PCI-X 133 MHz, Slot2 PCI-X 133MHz,
Slot3 PCI-Exp x8, Slot4 PCI-Exp x4, Slot5 PCI-Exp x8, and
Slot6 PCI-Exp x8

Access the submenu for each of the settings above to make changes to the

following:

Option ROM Scan

When enabled, this setting will initialize the device expansion ROM. The options

are Enabled and Disabled.

Enable Master

This setting allows you to enable the selected device as the PCI bus master.

The options are Enabled and Disabled.

Latency Timer

This setting allows you to set the clock rate for Bus Master. A high-priority, high-

throughout device may benefi t from a greater clock rate. The options are Default,

0020h, 0040h, 0060h, 0080h, 00A0h, 00C0h, and 00E0h. For Unix, Novell and

other Operating Systems, please select the option: other. If a drive fails after

the installation of a new software, you might want to change this setting and try

again. A different OS requires a different Bus Master clock rate.

Large Disk Access Mode

This setting determines how large hard drives are to be accessed. The options are

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Chapter 4: BIOS

DOS or Other (for Unix, Novelle NetWare and other operating systems).

XAdvanced Chipset Control

Access the submenu to make changes to the following settings.

Warning: Take caution when changing the Advanced settings. An Incor-

rect value, a very high DRAM frequency or an incorrect DRAM timing may

cause system to become unstable. When this occurs, reset the setting to

the default setting.

SERR Signal Condition

This setting specifi es the ECC Error conditions that an SERR# is to be asserted.

The options are None, Single Bit, Multiple Bit, and Both.

Clock Spectrum Feature

If Enabled, the BIOS will monitor the level of Electromagnetic Interference caused

by the components and will attempt to decrease the interference whenever needed.

The options are Enabled and Disabled.

XIntel VT for Direct I/O (VT-d)

Select Enable to enable the functionality of the Intel Virtualization Technology for

Direct I/O VT-d

DMAR ACPI Tables. This feature offers fully-protected I/O resource-sharing across

the Intel platforms, providing the user with greater reliability, security and availability

in networking and data-sharing. The settings are Enabled and Disabled. Press the

<Enter> key to enter the submenu. The following items will appear:

VT-d for Port 0 (ESI)

VT-d for Port 1

VT-d for Port 3

VT-d for Port 5

VT-d for Port 7

VT-d for Port 9

Select Enable to enable Intel VT-d support for Port 0(ESI), Port 3, Port 5, Port

7, Port 9 through using DRHD structures located in the ACPI Tables.

support by reporting the I/O device assignment to VMM through the

4GB PCI Hole Granularity

This feature allows you to select the granularity of PCI hole for PCI slots. If MTRRs

are not enough, this option may be used to reduce MTRR occupation. The options

are: 256 MB, 512 MB, 1GB and 2GB.

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X7DWN+ User's Manual

Memory Voltage

Select Auto to allow the BIOS to automatically detect memory voltage based on

the SPD table. Select 1.5V to force the system to use 1.5V for lower power fully-

buffered DIMM modules. Select 1.8V to use 1.8V power for onboard memory

modules. Note: Using 1.8V might cause damage to the memory modules that only

support 1.5V power. The options are: Auto, 1.5V and 1.8V.

Memory Branch Mode

This option determines how the two memory branches operate. System address

space can either be interleaved between the two branches or Sequential from

one branch to another. Mirror mode allows data correction by maintaining two

copies of data in two branches. Single Channel 0 allows a single DIM M population

during system manufacturing. The options are Interleave, Sequential, Mirroring,

and Single Channel 0.

Branch 0 Rank Sparing/Branch 1 Rank Sparing

Select Enable to enable the function of memory sparing for Memory Bus Branch
0 or Branch 1. The options are Enabled and Disabled.

Branch 0 Rank Interleaving/Branch 1 Rank Interleaving

Select enable to enable Interleaved Memory for Memory Bus Branch 0 Rank or

Branch 1 Rank. The options for Memory Interleaving are 1:1, 2:1 and 4:1.

Enhanced x8 Detection

Select Enabled to enable Enhanced x8 DRAM UC Error Detection. The options
are Disabled and Enabled.

Demand Scrub

Scrubbing is a process that allows the North Bridge to correct correctable memory

errors found on an FBD memory module. When the CPU or I/O issues a demand-

read command, and the read data from memory turns out to be a correctable ECC,

it is corrected and sent to the original source. Memory is updated as well. Select

Enabled to use Demand Scrubbing for ECC memory correction. The options are

Enabled and Disabled.

High Temperature DRAM Operation

When set to Enabled, the BIOS will refer to the SPD table to set the maximum

DRAM temperature. If disabled, the BIOS will set the maximum DRAM temperature

based on a predefi ned value. The options are Enabled and Disabled.

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Chapter 4: BIOS

AMB Thermal Sensor

Select Enabled to enable the thermal sensor embedded in the Advanced Memory

Buffer on a fully buffered memory module for thermal monitoring. The options are

Disabled and Enabled.

Thermal Throttle

Select Enabled to enable closed-loop thermal throttling on a fully buffered (FBD)

memory module. In the closed-loop thermal environment, thermal throttling will be

activated when the temperature of the FBD DIMM module exceeds a predefi ned

threshold. The options are Enabled and Disabled.

Global Activation Throttle

Select Enabled to enable the function of open-loop global thermal throttling on

the fully buffered (FBD) memory modules and allow global thermal throttling to

become active when the number of activate control exceeds a predefi ned number.

The options are Enabled and Disabled.

Force ITK Confi guration Clocking

Select Enabled to confi gure FBD clock settings to support ITK testing. The options
are Disabled and Enabled.

Reserved Branch for ITK Test

This feature allows the user to specify the memory branch number to be reserved
for ITK testing. The default setting is Branch 1.

Snoop Filter

Select Enabled to eliminate snoop traffi c to the graphics port to greatly improve

system performance when running graphics intensive applications. The options

are Enabled and Disabled.

Crystal Beach Features

Select Enabled to use the Intel I/O AT (Acceleration Technology) to accelerate

the performance of TOE devices. (Note: A TOE device is a specialized, dedicated

processor that is installed on an add-on card or a network card to handle some

or all packet processing of this add-on card. For this motherboard, the TOE

device is built inside the ESB 2 South Bridge chip.) The options are Enabled

and Disabled.

Route Port 80h Cycles to

This feature allows the user to decide which bus to send debug information to. The

options are Disabled, PCI and LPC.

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X7DWN+ User's Manual

High Precision Event Time

Select Yes to activate the High Precision Event Timer (HPET), which is capable

of producing periodic interrupts at a much higher frequency than a Real-time

Clock (RTC) can in synchronizing multimedia streams, providing smooth playback

and reducing the dependency on other timestamp calculation devices, such as

an x86 RDTSC Instruction embedded in a CPU. The High Precision Event Timer

is used to replace the 8254 Programmable Interval Timer. The options for this

feature are Yes and No.

USB Function

Select Enabled to enable the function of USB devices specifi ed. The settings are

Enabled and Disabled.

Legacy USB Support

This setting allows you to enable support for Legacy USB devices. The settings

are Enabled and Disabled.

XAdvanced Processor Options

Access the submenu to make changes to the following settings.

CPU Speed

This is a display that indicates the speed of the installed processor.

Frequency Ratio (Available when supported by the CPU.)

The feature allows the user to set the internal frequency multiplier for the CPU.

The options are: Defaul t, x12, x13, x14, x15, x16, x17 and x18.

Core-Multi-Processing (Available when supported by the CPU.)

Set to Enabled to use a processor's Second Core and beyond. (Please refer to

Intel's web site for more information.) The options are Disabled and Enabled.

Machine Checking (Available when supported by the CPU.)

Set to Enabled to activate the function of Machine Checking and allow the CPU to

detect and report hardware (machine) errors via a set of model-specifi c registers

(MSRs). The options are Enabled and Disabled.

Fast String Operations (Available if supported by the CPU.)

Set to Enabled to enable the fast string operations for special CPU instructions.
The options are Disabled and Enabled.

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Chapter 4: BIOS

C1/C2 Enhanced Mode (Available when supported by the CPU.)

Set to Enabled to enable Enhanced Halt State to lower CPU voltage/frequency to

prevent overheat. The options are Enabled and Disabled. (Note: please refer to

Intel’s web site for detailed information.)

Execute Disable Bit (Available when supported by the CPU and the OS.)

Set to Enabled to enable Execute Disable Bit and allow the processor to classify

areas in memory where an application code can execute and where it cannot, and

thus preventing a worm or a virus from inserting and creating a fl ood of codes

to overwhelm the processor or damage the system during an attack. Note: this

feature is available when your OS and your CPU support the function of Execute

Disable Bit. The options are Disabled and Enabled. For more information, please

refer to Intel's and Microsoft's web sites.

Adjacent Cache Line Prefetch (Available when supported by the CPU.)

The CPU fetches the cache line for 64 bytes if this option is set to Disabled. The

CPU fetches both cache lines for 128 bytes as comprised if Enabled. The options

are Disabled and Enabled.

Hardware Prefetch (Available if supported by the CPU.)

Set to this option to Enabled to enable the hardware components that are used

in conjunction with software programs to prefetch data in order to speed up data

processing. The options are Disabled and Enabled.

Set Maximum Ext. CPUID=3

When set to Enabled, the Maximum Extended CPUID will be set to 3. The options

are Disabled and Enabled.

Direct Cache Access (Available when supported by the CPU.)

Set to Enable to route inbound network IO traffi c directly into processor caches

to reduce memory latency and improve network performance. The options are

Disabled and Enabled.

DCA Delay Clocks (Available when supported by the CPU.)

This feature allows the user to set the clock delay setting from snoop to prefetch

for Direct Cache Access. Select a setting from 8 (bus cycles) to 120 (bus cycles)

(in 8-cycle increment). The default setting is 32 (bus cycl es).

Intel <R> Virtualization Technology (Available when supported by the CPU.)

Select Enabled to use the feature of Virtualization Technology to allow one platform

to run multiple operating systems and applications in independent partitions, creating

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X7DWN+ User's Manual

multiple "virtual" systems in one physical computer. The options are Enabled and

Disabled. (Note: If there is any change to this setting, you will need to power off

and restart the system for the change to take effect.) Please refer to Intel’s web

site for detailed information.

Intel EIST Support (Available when supported by the CPU.)

Select Enabled to use the Enhanced Intel SpeedStep Technology and allows the

system to automatically adjust processor voltage and core frequency in an effort

to reduce power consumption and heat dissipation. The options are Enabled and

Disabled. Please refer to Intel’s web site for detailed information.

SMRR Support (Available when supported by the CPU.)

Select Enabled to use a new CPU security feature to prevent viruses accessing

the System Management Module (SMM). When set to Enabled, the SM Memory

Region will become uncacheable, effectively preventing viruses from modifying

or corrupting critical system parameters. The options are Enabled and Disabled.

Please refer to Intel’s web site for detailed information.

XI/O Device Confi guration

Access the submenu to make changes to the following settings.

KBC Clock Input

This setting allows you to select clock frequency for KBC. The options are 6MHz,

8MHz, 12MHz, and 16MHz.

Serial Port A

This setting allows you to assign control of serial port A. The options are Ena bled

(user defi ned), Disabled, and Auto (BIOS- or OS- controlled).

Base I/O Address

This setting allows you to select the base I/O address for serial port A. The options

are 3F8, 2F8, 3E8, and 2E8.

Interrupt

This setting allows you to select the IRQ (interrupt request) for serial port A. The

options are IRQ3 and IRQ4.

Serial Port B

This setting allows you to assign control of serial port B. The options are Enabled

(user defi ned), Disabled, Auto (BIOS controlled) and OS Controlled.

4-16

Mode

This setting allows you to set the type of device that will be connected to serial

port B. The options are Normal and IR (for an infrared device).

Base I/O Address

This setting allows you to select the base I/O address for serial port B. The options

are 3F8, 2F8, 3E8 and 2E8.

Interrupt

This setting allows you to select the IRQ (interrupt request) for serial port B. The

options are IRQ3 and IRQ4.

Parallel Port

This setting allows you to assign control of the parallel port. The options are

Enabled (user defi ned), Disabled and Auto (BIOS-or OS- controlled).

Chapter 4: BIOS

Base I/O Address

Select the base I/O address for the parallel port. The options are 378, 278 and

3BC.

Interrupt

This setting allows you to select the IRQ (interrupt request) for the parallel port.

The options are IRQ5 and IRQ7.

Mode

This feature allows you to specify the parallel port mode. The options are Output

only, Bi-Directional, EPP and ECP.

DMA Channel

This item allows you to specify the DMA channel for the parallel port. The options

are DMA1 and DMA3.

Floppy Disk Controller

This setting allows you to assign control of the fl oppy disk controller. The options

are Enabled (user defi ned), Disabled, and Auto (BIOS and OS controlled).

Base I/O Address

This setting allows you to select the base I/O address for the Floppy port. The

options are Primary and Secondary.

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X7DWN+ User's Manual

XDMI Event Logging

Access the submenu to make changes to the following settings.

Event Log Validity

This is a display to inform you of the event log validity. It is not a setting.

Event Log Capacity

This is a display to inform you of the event log capacity. It is not a setting.

View DMI Event Log

Highlight this item and press <Enter> to view the contents of the event log.

Event Logging
This setting allows you to Enable or Disable event logging.

ECC Event Logging
This setting allows you to Enable or Disable ECC event logging.

Mark DMI Events as Read

Highlight this item and press <Enter> to mark the DMI events as read.

Clear All DMI Event Logs

Select Yes and press <Enter> to clear all DMI event logs. The options are Yes

and No.

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Chapter 4: BIOS

XConsole Redirection

Access the submenu to make changes to the following settings.

COM Port Address

This item allows you to specify which COM port to direct the remote console to:

Onboard COM A or Onboard COM B. This setting can also be Disabled.

BAUD Rate

This item allows you to set the BAUD rate for console redirection. The options are

300, 1200, 2400, 9600, 19.2K, 38.4K, 57.6K, and 115.2K.

Console Type

This item allows you to set console redirection type. The options are VT100,

VT100/8bit, PC-ANSI/7bit, PC ANSI, VT100+,

Flow Control

VT-UTF8 and ASCII.

This item allows you to select the fl ow control option for the console. The options

are: None, XON/XOFF, and CTS/RTS.

Console Connection

This item allows you to decide how console redirection is to be connected: either

Direct or Via Modem.

Continue CR after POST

Select on to continue with console redirection after the POST routine. The options

are On and Off.

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X7DWN+ User's Manual

XHardware Monitor Logic

Highlight this and hit <Enter> to see the status for the following items:

CPU1 Te mpe ratu re/C PU2 Temperat ure /System Temperature

Fan1-Fan8 Speeds:

If the feature of Auto Fan Control is enabled, the BIOS will automatically display

the status of the fans indicated in this item.

Fan Speed Control Modes

This feature allows the user to decide how the system controls the speeds of the

onboard fans. The CPU temperature and the fan speed are correlative. When the

CPU on-die temperature increases, the fan speed will also increase, and vice

versa. Select Workstation if your system is used as a Workstation. Select Server

if your system is used as a Server. Select 3-pin if your chassis uses 3-pin fans.

Select 4-pin if your chassis uses 4-pin fans. Select “Disable” to disable the fan

speed control function and allow the onboard fans to constantly run at the full

speed (12V). The Options are: 1. Running at the Full Speed, 2. Optimized Server

w/3-pin, 3. Optimized Workstation w/3-pin, 4. Optimized Server w/4-pin, and 5.

Optimized Workstation w/4-pin.

Voltage Monitoring

The following items will be monitored and displayed:

VcoreA /VcoreB

+12V/-12V

+5Vsb/+5VDD

+3.3V

P1V5/P_VTT/Vbat

Note: In the Windows OS environment, the Supero Doctor III settings take pre-

cedence over the BIOS settings. When fi rst installed, Supero Doctor III adopts

the temperature threshold settings previously set in the BIOS. Any subsequent

changes to these thresholds must be made within Supero Doctor, since the SD

III settings override the BIOS settings. For the Windows OS to adopt the BIOS

temperature threshold settings, please change the SDIII settings to be the same

as those set in the BIOS.

4-20

Chapter 4: BIOS

XIPMI (The option is available only when an IPMI card is
installed in the system.)

IPMI Specifi cation Version: This item displays the current IPMI Version.
Firmw are Ver sion: This item displays the current Firmware Version.

System Event Logging

Se lec t E nab led to en ab l e IP MI Ev en t L og g ing . W he n thi s f unc ti o n is se t t o Di sab le d,

the system will continue to log events received via system interface. The options

are Enabled and Disabled.

Clear System Event Logging

Enabling this function to force the BIOS to clear the system event logs during the

next cold boot. The options are Enabled and Disabled.

Existing Event Log Number

This item displays the number of the existing event log.

Event Log Control

System Firmware Progress

Enabling this function to log POST progress. The options are Enabled and

Disabled.

BIOS POST Errors

Enabling this function to log POST errors. The options are Enabled and

Disabled.

4-21

X7DWN+ User's Manual

BIOS POST Watch Dog
Set to Enabled to enable POST Watch Dog. The options are Enabled and Dis-

abled.

OS Boot Watch Dog
Set to Enabled to enable OS Boot Watch Dog. The options are Enabled and Dis-

abled.

Timer for Loading OS (Minutes)

This feature allows the user to set the time value (in minutes) for the previous

item: OS Boot Watch Dog by keying-in a desired number in the blank. The

default setting is 10 (minutes.) (Please ignore this option when OS Boot Watch

Dog is set to "Disabled".)

Time Out Option

This feature allows the user to determine what action to take in an event of a

system boot failure. The options are No Action, Reset, Power Off and Power

Cycles.

XSystem Event Log/System Event Log (List Mode)

These options display the System Event (SEL) Log and System Event (SEL) Log in

List Mode. Items include: SEL (System Event Log) Entry Number, SEL Record ID,

SEL Record Type, Time Stamp, Generator ID, SEL Message Revision, Sensor Type,

Sensor Number, SEL Event Type, Event Description, and SEL Event Data.

4-22

Chapter 4: BIOS

XRealtime Sensor Data

This feature display information from motherboard sensors, such as temperatures,

fan speeds and voltages of various components.

The following items will also appear:

IP Address,

IP Subnet Mask,

Default Gateway,

MAC Address Byte0,

MAC Address Byte1,

MAC Address Byte2,

MAC Address Byte3,

MAC Address Byte4,

MAC Address Byte5,

4-23

X7DWN+ User's Manual

XIPMI LAN Confi guration

The following features allow the user to confi gure and monitor IPMI LAN settings.

VLAN Tagging

Select Enabled to enable Virtual LAN(s) for IPMI connections and allow the user to

confi gure VLAN settings. The options are Enabled and Disabled.

VLAN ID

If VLAN Tagging above is set to Enabled, this item allows the user to change the

VLAN ID. If VLAN Tagging is disabled, this item will be ignored by the fi rmware.

IP Address

This item displays the IP address for the IPMI connection detected.

IP Subnet Mask

This item displays the IP Subnet Mask for the IPMI connection detected.

Default Gateway

This item displays the Default Gateway for the IPMI connection detected.

MAC Address

This item displays the MAC Address for the IPMI connection detected.

4-24

Chapter 4: BIOS

4-5 Security

Choose Security from the Phoenix BIOS Setup Utility main menu with the arrow

keys. You should see the following display. Security setting options are displayed

by highlighting the setting using the arrow keys and pressing <Enter>. All Security

BIOS settings are described in this section.

Supervisor Password Is:

This feature indicates if a supervisor password has been entered to the system.

Clear means such a password has not been used, and Set means a supervisor

password has been entered.

User Password Is:

This feature indicates if a user password has been entered to the system. Clear

means such a password has not been used, and Set means a user password

has been entered.

Set Supervisor Password

When the item Set "Supervisor Password" is highlighted, hit the <Enter> key.

When prompted, type the Supervisor's password in the dialogue box to set or to

change supervisor's password, which allows access to the BIOS.

Set User Password

When the item "Set User Password" is highlighted, hit the <Enter> key. When

prompted, type the user's password in the dialogue box to set or to change the

user's password, which allows access to the system at boot-up.

Password on Boot

This setting allows you to determine if a password is required for a user to enter the

system at bootup. The options are Enabled (password required) and Disabled.

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X7DWN+ User's Manual

4-6 Boot

Choose Boot from the Phoenix BIOS Setup Utility main menu with the arrow keys.

You should see the following display. See details on how to change the order and

specs of boot devices in the Item Specifi c Help window. All Boot BIOS settings

are described in this section.

Boot List

Candidate
List

Boot Priority Order/Excluded from Boot Orders

The devices included in the boot list section (above) are bootable devices listed

in the sequence of boot order as specifi ed. The boot functions for the devices

included in the candidate list (above) are currently disabled. Use a <+> key or a

<-> key to move the device up or down. Use the <f> key or the <r> key to specify

the type of an USB device, either fi xed or removable. You can select one item from

the boot list and hit the <x> key to remove it from the list of bootable devices (to

make its resource available for other bootable devices). Subsequently, you can

select an item from the candidate list and hit the <x> key to remove it from the

candidate list and put it in the boot list. This item will then become a bootable

device. See details on how to change the priority of boot order of devices in the

"Item Specifi c Help" window.

4-26

Chapter 4: BIOS

4-7 Exit

Choose Exit from the Phoenix BIOS Setup Utility main menu with the arrow keys.

You should see the following display. All Exit BIOS settings are described in this

section.

Exit Saving Changes

Highlight this item and hit <Enter> to save any changes you made and to exit the

BIOS Setup utility.

Exit Discarding Changes

Highlight this item and hit <Enter> to exit the BIOS Setup utility without saving

any changes you may have made.

Load Setup Defaults

Highlight this item and hit <Enter> to load the default settings for all items in the

BIOS Setup. These are the safest settings to use.

Discard Changes

Highlight this item and hit <Enter> to discard (cancel) any changes you've made.

You will remain in the Setup utility.

Save Changes

Highlight this item and hit <Enter> to save any changes you made. You will remain

in the Setup utility.

4-27

X7DWN+ User's Manual

Notes

4-28

Appendix A: POST Error Beep Codes

Appendix A

POST Error Beep Codes

This section lists POST (Power On Self Test) error beep codes for the Phoenix BIOS.

POST error beep codes are divided into two categories: recoverable and terminal.

This section lists Beep Codes for recoverable POST errors.

Recoverable POST Error Beep Codes

When a recoverable type of error occurs during POST, BIOS will display a POST

code that describes the problem. BIOS may also issue one of the following beep

codes:

1 long and two short beeps - video confi guration error

1 repetitive long beep - no memory detected

1 continuous beep with Front Panel Overheat LED on - system overheat

A-1

X7DWN+ User's Manual

Notes

A-2

Appendix B: BIOS POST Codes

Appendix B

BIOS POST Codes

This section lists the POST (Power On Self Test) codes for the Phoenix BIOS. POST

codes are divided into two categories: recoverable and terminal.

Recoverable PO ST Errors

When a recoverable type of error occurs during POST, the BIOS will display an

POST code that describes the problem. BIOS may also issue one of the following

beep codes:

1 long and two short beeps - video confi guration error

1 repetitive long beep - no memory detected

Terminal POST Errors

If a terminal type of error occurs, BIOS will shut down the system. Before doing

so, BIOS will write the error to port 80h, attempt to initialize video and write the

error in the top left corner of the screen. The following is a list of codes that may

be written to port 80h.

POST Code Description

01h IPMI Initialization

02h Verify Real Mode

03h Disable Non-Maskable Interrupt (NMI)

04h Get CPU type

06h Initialize system hardware

07h Disable shadow and execute code from the ROM.

08h Initialize chipset with initial POST values

09h Set IN POST fl ag

0Ah Initialize CPU registers

0Bh Enable CPU cache

0Ch Initialize caches to initial POST values

0Eh Initialize I/O component

0Fh Initialize the local bus IDE

10h Initialize Power Management

11h Load alternate registers with initial POST values

12h Restore CPU control word during warm boot

13h Reset PCI Bus Mastering devices

14h Initialize keyboard controller

16h 1-2-2-3 BIOS ROM checksum

17h Initialize cache before memory Auto size

B-1

X7DWN+ User's Manual

POST Code Description

18h 8254 timer initialization

1Ah 8237 DMA controller initialization

1Ch Reset Programmable Interrupt Controller

20h 1-3-1-1 Test DRAM refresh

22h 1-3-1-3 Test 8742 Keyboard Controller

24h Set ES segment register to 4 GB

28h Auto size DRAM

29h Initialize POST Memory Manager

2Ah Clear 512 kB base RAM

2Ch 1-3-4-1 RAM failure on address line xxxx*
2Eh 1-3-4-3 RAM failure on data bits xxxx* of low byte of memory

bus

2Fh Enable cache before system BIOS shadow

32h Test CPU bus-clock frequency

33h Initialize Phoenix Dispatch Manager

36h Warm start shut down

38h Shadow system BIOS ROM

3Ah Auto size cache

3Ch Advanced confi guration of chipset registers

3Dh Load alternate registers with CMOS values

41h Initialize extended memory for RomPilot (optional)

42h Initialize interrupt vectors

45h POST device initialization

46h 2-1-2-3 Check ROM copyright notice

48h Check video confi guration against CMOS

49h Initialize PCI bus and devices

4Ah Initialize all video adapters in system

4Bh QuietBoot start (optional)

4Ch Shadow video BIOS ROM

4Eh Display BIOS copyright notice

4Fh Initialize MultiBoot

50h Display CPU type and speed

51h Initialize EISA board (optional)

52h Test keyboard

54h Set key click if enabled

55h Enable USB devices

58h 2-2-3-1 Test for unexpected interrupts

59h Initialize POST display service

5Ah Display prompt “Press <ESC> to enter SETUP”

5Bh Disable CPU cache

B-2

Appendix B: BIOS POST Codes

POST Code Description

5Ch Test RAM between 512 and 640 kB

60h Test extended memory

62h Test extended memory address lines

64h Jump to UserPatch1

66h Confi gure advanced cache registers

67h Initialize Multi Processor APIC

68h Enable external and CPU caches

69h Setup System Management Mode (SMM) area

6Ah Display external L2 cache size

6Bh Load custom defaults (optional)

6Ch Display shadow-area message

70h Display error messages

72h Check for confi guration errors

76h Check for keyboard errors

7Ch Set up hardware interrupt vectors

7Dh Initialize Intelligent System Monitoring (optional)

7Eh Initialize coprocessor if present

80h Disable onboard Super I/O ports and IRQs (optional)

81h Late POST device initialization

82h Detect and install external RS232 ports

83h Confi gure non-MCD IDE controllers

84h Detect and install external parallel ports

85h Initialize PC-compatible PnP ISA devices

86h Re-initialize onboard I/O ports.

87h Confi gure Motherboard Confi gurable Devices

(optional)

88h Initialize BIOS Data Area

89h Enable Non-Maskable Interrupts (NMIs)

8Ah Initialize Extended BIOS Data Area

8Bh Test and initialize PS/2 mouse

8Ch Initialize fl oppy controller

8Fh Determine number of ATA drives (optional)

90h Initialize hard-disk controllers

91h Initialize local-bus hard-disk controllers

92h Jump to UserPatch2

93h Build MPTABLE for multi-processor boards

95h Install CD ROM for boot

96h Clear huge ES segment register

97h Fix up Multi Processor table

98h 1-2 Search for option ROMs and shadow if successful. One long,

two short beeps on checksum failure

B-3

X7DWN+ User's Manual

POST Code Description

99h Check for SMART Drive (optional)

9Ch Set up Power Management

9Dh Initialize security engine (optional)

9Eh Enable hardware interrupts

9Fh Determine number of ATA and SCSI drives

A0h Set time of day

A2h Check key lock

A4h Initialize typematic rate

A8h Erase <ESC> prompt

AAh Scan for <ESC> key stroke

ACh Enter SETUP

AEh Clear Boot fl ag

B0h Check for errors

B1h Inform RomPilot about the end of POST (optional)

B2h POST done - prepare to boot operating system

B4h 1 One short beep before boot

B5h Terminate QuietBoot (optional)

B6h Check password (optional)

B7h Initialize ACPI BIOS and PPM Structures

B9h Prepare Boot

BAh Initialize SMBIOS

BCh Clear parity checkers

BDh Display MultiBoot menu

BEh Clear screen (optional)

BFh Check virus and backup reminders

C0h Try to boot with INT 19

C1h Initialize POST Error Manager (PEM)

C2h Initialize error logging

C3h Initialize error display function

C4h Initialize system error fl ags

C6h Console redirection init.

C7h Unhook INT 10h if console redirection enabled

C8h Force check (optional)

C9h Extended ROM checksum (optional)

CDh Reclaim console redirection vector

B-4

Appendix B: BIOS POST Codes

POST Code Description

D2h Unknown interrupt

D4h Check Intel Branding string

D8h Alert Standard Format initialization

D9h Late init for IPMI

DEh Log error if micro-code not updated properly

The following are for boot block in Flash ROM

POST Code Description

E0h Initialize the chipset

E1h Initialize the bridge

E2h Initialize the CPU

E3h Initialize system timer

E4h Initialize system I/O

E5h Check force recovery boot

E6h Checksum BIOS ROM

E7h Go to BIOS

E8h Set Huge Segment

E9h Initialize Multi Processor

EAh Initialize OEM special code

EBh Initialize PIC and DMA

ECh Initialize Memory type

EDh Initialize Memory size

EEh Shadow Boot Block

EFh System memory test

F0h Initialize interrupt vectors

F1h Initialize Run Time Clock

F2h Initialize video

F3h Initialize System Management Manager

F4h Output one beep

F5h Clear Huge Segment

F6h Boot to Mini DOS

F7h Boot to Full DOS

* If the BIOS detects errors on 2C, 2E, or 30 (base 512K RAM error), it displays an

additional word-bitmap (xxxx) indicating the address line or bits that have failed. For

example, “2C 0002” means address line 1 (bit one set) has failed. “2E 1020" means

data bits 12 and 5 (bits 12 and 5 set) have failed in the lower 16 bits. The BIOS also

sends the bitmap to the port-80 LED display. It fi rst displays the checkpoint code,

followed by a delay, the high-order byte, another delay, and then the loworder byte

of the error. It repeats this sequence continuously.

B-5

X7DWN+ User's Manual

Notes

B-6

Appendix C: Installing Other Software Programs and Drivers

Appendix C

Installing Other Software Programs and Drivers

C-1 Installing Drivers other than the Adaptec Embedded
Serial ATA RAID Controller Driver

After you've installed the Windows Operating System, a screen as shown below

will appear. You are ready to install software programs and drivers that have not

yet been installed. To install these software programs and drivers, click the icons

to the right of these items.

Note: Click the icons showing a hand writing on the paper to view the readme fi les

for each item. Click on a computer icon to the right of an item to install an item

(from top to the bottom) one at a time. Aft er installing each item, you must re-
boot the system before proceeding with the next item on the list. The bottom

icon with a CD on it allows you to view the entire contents of the CD.

Driver/Tool Installation Display Screen

C-1

X7DWN+ User's Manual

C-2 Confi guring Supero Doctor III

The Supero Doctor III program is a Web-base management tool that supports

remote management capability. It includes Remote and Local Management tools.

The local management is called the SD III Client. The Supero Doctor III program

included on the CDROM that came with your motherboard allows you to monitor

the environment and operations of your system. Supero Doctor III displays crucial

system information such as CPU temperature, system voltages and fan status.

See the Figure below for a display of the Supero Doctor III interface.

Note: 1 The default user name and password are ADMIN.
Note 2: In the Windows OS environment, the Supero Doctor III settings take pre-

cedence over the BIOS settings. When fi rst installed, Supero Doctor III adopts the

temperature threshold settings previously set in BIOS. Any subsequent changes

to these thresholds must be made within Supero Doctor, since the SD III settings

override the BIOS settings. For the Windows OS to adopt the BIOS temperature

threshold settings, please change the SDIII settings to be the same as those set

in BIOS.

Supero Doctor III Interface Display Screen-I (Health Information)

C-2

Appendix C: Installing Other Software Programs and Drivers

Supero Doctor III Interface Display Screen-II (Remote Control)

Note: SD III Software Revision 1.0 can be downloaded from our Web site at:

ftp://ftp.supermicro.com/utility/Supero_Doctor_III/. You can also download SDIII

User's Guide at: http://www.supermicro.com/PRODUCT/Manuals/SDIII/User-

Guide.pdf. For Linux, we will still recommend that you use Supero Doctor II.

C-3

X7DWN+ User's Manual

Notes

C-4

The products sold by Supermicro are not intended for and will not be used in life support systems, medical equipment, nuclear facilities or systems, aircraft, aircraft devices,
aircraft/emergency communication devices or other critical systems whose failure to perform be reasonably expected to result in signifi cant injury or loss of life or catastrophic
property damage. Accordingly, Supermicro disclaims any and all liability, and should buyer use or sell such products for use in such ultra-hazardous applications, it does so
entirely at its own risk. Furthermore, buyer agrees to fully indemnify, defend and hold Supermicro harmless for and against any and all claims, demands, actions, litigation, and
proceedings of any kind arising out of or related to such ultra-hazardous use or sale.

(Disclaimer Continued)