Supermicro X7DBR-3, X7DBR-E User Manual

SUPER

X7DBR-3
X7DBR-E

®

USER’S MANUAL

Revision 1.1

The information in this User’s Manual has been carefully reviewed and is believed to be accurate.
The vendor assumes no responsibility for any inaccuracies that may be contained in this document,
makes no commitment to update or to keep current the information in this manual, or to notify any
person or organization of the updates. Please Note: For the most up-to-date version of this

manual, please see our web site at www.supermicro.com.

Super Micro Computer, Inc. ("Supermicro") reserves the right to make changes to the product
described in this manual at any time and without notice. This product, including software, if any,
and documentation may not, in whole or in part, be copied, photocopied, reproduced, translated or
reduced to any medium or machine without prior written consent.

IN NO EVENT WILL SUPER MICRO COMPUTER, INC. BE LIABLE FOR DIRECT, INDIRECT,
SPECIAL, INCIDENTAL, SPECULATIVE OR CONSEQUENTIAL DAMAGES ARISING FROM THE
USE OR INABILITY TO USE THIS PRODUCT OR DOCUMENTATION, EVEN IF ADVISED OF
THE POSSIBILITY OF SUCH DAMAGES. IN PARTICULAR, SUPER MICRO COMPUTER, INC.
SHALL NOT HAVE LIABILITY FOR ANY HARDWARE, SOFTWARE, OR DATA ST ORED OR USED
WITH THE PRODUCT, INCLUDING THE COSTS OF REPAIRING, REPLACING, INTEGRATING,
INSTALLING OR RECOVERING SUCH HARDWARE, SOFTWARE, OR DATA.

Any disputes arising between manufacturer and customer shall be governed by the laws of Santa
Clara County in the State of California, USA. The State of California, County of Santa Clara shall be
the exclusive venue for the resolution of any such disputes. SuperMicro's total liability for all claims
will not exceed the price paid for the hardware product.

FCC Statement: This equipment has been tested and found to comply with the limits for a Class
A digital device pursuant to Part 15 of the FCC Rules. These limits are designed to provide
reasonable protection against harmful interference when the equipment is operated in a commercial
environment. This equipment generates, uses, and can radiate radio frequency energy and, if not
installed and used in accordance with the manufacturer’s instruction manual, may cause harmful
interference with radio communications. Operation of this equipment in a residential area is likely
to cause harmful interference, in which case you will be required to correct the interference at your
own expense.

California Best Management Practices Regulations for Perchlorate Materials: This Perchlorate
warning applies only to products containing CR (Manganese Dioxide) Lithium coin cells. “Perchlorate
Material-special handling may apply. See www.dtsc.ca.gov/hazardouswaste/perchlorate”

WARNING: Handling of lead solder materials used in this
product may expose you to lead, a chemical known to
the State of California to cause birth defects and other

reproductive harm.

Manual Revision 1.1
Release Date: Oct. 16, 2008
Unless you request and receive written permission from Super Micro Computer, Inc., you may not

copy any part of this document.
Information in this document is subject to change without notice. Other products and companies

referred to herein are trademarks or registered trademarks of their respective companies or mark
holders.

Copyright © 2008 by Super Micro Computer, Inc.
All rights reserved.

Printed in the United States of America

Preface

About This Manual

This manual is written for system integrators, PC technicians and
knowledgeable PC users. It provides information for the installation and use of
the
supports dual Intel XEON 64-bit dual core processors at a front side bus speed
of 667 MHz/1.066 GHz/1.333 GHz. With dual 64-bit Xeon dual core processors,
the 5000P chipset, and 8 DDR2 FBD 667/533 memory DIMM sockets built-in, the
X7DBR-3/X7DBR-E offers substantial functionality and performance enhancements
to the motherboards based on the NetBurst microarchitecture while remaining
compatible with the 32-bit based software. The features include the Intel Hyper­Threading Technology, Virtualization Technology, Hyper Pipelined Technology, Ex­ecution Trace Cache, Thermal Monitor 1/2 (TM1/TM2), Enhanced Intel SpeedStep
technology, Advanced Dynamic Execution, Advanced Transfer Cache, Streaming
SIMD Extensions 3 (SSE3) and Extended Memory 64 Technology (EM64T). These
features allow the motherboard to operate at much higher speeds, with better power
management and in much safer environments than traditional motherboards. The
X7DBR-3/X7DBR-E is ideal for high performance dual processor (DP) enterprise
server environments. This product is intended to be professionally installed.

X7DBR-3/X7DBR-E motherboard. The X7DBR-3/X7DBR-E

Preface

Manual Organization

Chapter 1 describes the features, specifi cations and performance of the mainboard

and provides detailed information about the chipset.
Chapter 2 provides hardware installation instructions. Read this chapter when

installing the processor, memory modules and other hardware components into
the system. If you encounter any problems, see Chapter 3, which describes
troubleshooting procedures for the video, the memory and the system setup stored
in CMOS.

Chapter 4 includes an introduction to BIOS and provides detailed information on
running the CMOS Setup utility.

Appendix A and Appendix B provide BIOS POST Messages and POST Codes.
Appendix C, Appendix D and Appendix E list HostRAID Setup Guidelines and

Other Software Driver and Program Installation Instructions.

Conventions Used in the Manual:

Special attention should be given to the following symbols for proper installation and
to prevent damage done to the components or injury to yourself:

Danger/Caution: Instructions to be strictly followed to prevent
catastrophic system failure or to avoid bodily injury.
Warning: Important information given to ensure proper system installation

or to prevent damage to the components.
*Note: Additional Information given to differentiate various models or to ensure
correct system setup.

iii

X7DBR-3/X7DBR-E User's Manual

Table of Contents

Preface

About This Manual ...................................................................................................... iii

Manual Organization ................................................................................................... iii

Conventions Used in the Manual ..................................................................................iii

Chapter 1: Introduction

1-1 Overview ......................................................................................................... 1-1

Checklist ................................................................................................... 1-1

Contacting Supermicro ............................................................................. 1-2

X7DBR-3/X7DBR-E Image ......................................................... 1-3

X7DBR-3/X7DBR-E Layout ........................................................ 1-4

Quick Reference ...................................................................................... 1-5

Motherboard Features ................................................................................ 1-6

Intel 5000P Chipset: System Block Diagram ........................................... 1-8

1-2 Chipset Overview ........................................................................................... 1-9

1-3 Special Features ........................................................................................... 1-10

Recovery from AC Power Loss .............................................................. 1-10

1-4 PC Health Monitoring .................................................................................... 1-10

1-5 ACPI Features .............................................................................................. 1-11

1-6 Power Supply ............................................................................................... 1-12

1-7 Super I/O ........................................................................................................1-13

Chapter 2: Installation

2-1 Static-Sensitive Devices ................................................................................. 2-1

Precautions ................................................................................................ 2-1

Unpacking ................................................................................................ 2-1

2-2 Processor and Heatsink Installation ............................................................... 2-2

2-3 Installing DIMMs ............................................................................................. 2-6

2-4 Control Panel Connectors and IO Ports ......................................................... 2-8

A. Back Panel Connectors/IO Ports .............................................................. 2-8

B. Front Control Panel ...................................................................................2-9

C. Front Control Panel Pin Defi nitions ........................................................2-10

NMI Button ............................................................................................. 2-10

Power LED ............................................................................................. 2-10

HDD LED .............................................................................................. 2-11

NIC1/NIC2 LEDs ................................................................................... 2-11

Overheat/Fan Fail LED ......................................................................... 2-12

Power Fail LED ........................................................................................2-12

iv

Table of Contents

Reset Button ......................................................................................... 2-13

Power Button .......................................................................................... 2-13

2-5 Connecting Cables ......................................................................................... 2-14

ATX Power Connector .......................................................................... 2-14

Processor Power Connector ................................................................. 2-14

Universal Serial Bus ............................................................................... 2-15

Chassis Intrusion .................................................................................... 2-15

Fan Headers .......................................................................................... 2-16

ATX PS/2 Keyboard and Mouse Ports .....................................................2-17

Serial Ports ............................................................................................. 2-17

Wake-On-Ring ..........................................................................................2-18

Wake-On-LAN ..........................................................................................2-18

GLAN (Ethernet Ports) ............................................................................. 2-19

Speaker/Power LED Header .................................................................. 2-19

Power Fault .............................................................................................. 2-20

Alarm Reset ..............................................................................................2-20

Overheat LED/Fan Fail ............................................................................ 2-21

SMB Connector ........................................................................................ 2-21

SMB Power Connector .............................................................................2-22

VGA Connector ........................................................................................2-22

Compact Flash Card PWR Connector ..................................................... 2-23

SGPIO Headers ....................................................................................... 2-23

2-6 Jumper Settings .............................................................................................. 2-24

Explanation of Jumpers ......................................................................... 2-24

GLAN Enable/Disable ............................................................................ 2-24

Clear CMOS ............................................................................................. 2-25

Watch Dog ................................................................................................2-25

SAS Controller Enabled/Disabled ............................................................ 2-26

3rd PWR Supply PWR Fault .................................................................... 2-27

VGA Enable/Disable .................................................................................2-27

I2C Bus to PCI Slots ................................................................................ 2-28

Compact Flash Master/Slave Enable/Disable .......................................... 2-28

2-7 Onboard Indicators .......................................................................................... 2-29

GLAN LEDs .............................................................................................. 2-29

Onboard SAS Activity LED .......................................................................2-30

2-8 Floppy, Hard Disk Drive, SIMSO-DIMM IPMI and SAS Connections ............. 2-31

Floppy Connector .................................................................................... 2-31

SIMSO Slot .............................................................................................. 2-32

IDE Connectors ....................................................................................... 2-33

v

X7DBR-3/X7DBR-E User's Manual

SAS Connectors ...................................................................................... 2-34

Chapter 3: Troubleshooting

3-1 Troubleshooting Procedures ........................................................................... 3-1

Before Power On ....................................................................................... 3-1

No Power ................................................................................................... 3-1

No Video .................................................................................................. 3-1

Memory Errors ........................................................................................... 3-1

Losing the System’s Setup Confi guration ................................................ 3-1

3-2 Technical Support Procedures ........................................................................ 3-2

3-3 Frequently Asked Questions ........................................................................... 3-3

3-4 Returning Merchandise for Service ................................................................. 3-4

Chapter 4: BIOS

4-1 Introduction .......................................................................................................4-1

4-2 Running Setup ................................................................................................. 4-2

4-3 Main BIOS Setup ............................................................................................. 4-2

4-4 Advanced Setup ...............................................................................................4-7

4-5 Security Setup ...............................................................................................4-24

4-6 Boot Setup ......................................................................................................4-25

4-7 Exit ..................................................................................................................4-26

Appendices:

Appendix A: BIOS POST Messages ..........................................................................A-1

Appendix B: BIOS POST Codes ................................................................................ B-1

Appendix C: The Intel HostRAID Setup Guidelines ................................................... C-1

Appendix D: The Adaptec HostRAID Setup Guidelines ............................................ D-1

Appendix E: Installing Other Software Programs and Drivers .................................. E-1

vi

Chapter 1: Introduction

Chapter 1

Introduction

1-1 Overview

Checklist

Congratulations on purchasing your computer motherboard from an acknowledged
leader in the industry. Supermicro boards are designed with the utmost attention
to detail to provide you with the highest standards in quality and performance.
Check that the following items have all been included with your motherboard. If
anything listed here is damaged or missing, contact your retailer. All are included
in the Retail Box.

One (1) Supermicro Mainboard

One (1) ribbon cable for IDE devices (CBL-036L-02)

One (1) fl oppy ribbon cable (CBL-0022L)

One (1) Supermicro CD containing drivers and utilities

One (1) User's/BIOS Manual

1-1

X7DBR-3/X7DBR-E User's Manual

Contacting Supermicro

Headquarters

Address: SuperMicro Computer, Inc.
980 Rock Ave.
San Jose, CA 95131 U.S.A.
Tel: [phone]
Fax: [phone]
Email: [e-mail] (General Information)
[e-mail] (Technical Support)
Web Site: www.supermicro.com

Europe

Address: SuperMicro Computer B.V.
Het Sterrenbeeld 28, 5215 ML
's-Hertogenbosch, The Netherlands
Tel: [phone]
Fax: [phone]
Email: [e-mail] (General Information)
[e-mail] (Technical Support)
[e-mail] (Customer Support)

Asia-Pacifi c

Address: SuperMicro, Taiwan
D5, 4F, No. 16 Chien-Ba Road
Chung-Ho 235, Taipei Hsien, Taiwan, R.O.C.
Tel: [phone]
Fax: [phone]
Web Site: www.supermicro.com.tw
Technical Support:
Email: [e-mail]
Tel: [phone], ext.132 or 139

1-2

X7DBR-3/X7DBR-E Image

Chapter 1: Introduction

(Note: The drawings and pictures shown in this manual were based on the

latest PCB Revision available at the time of publishing of the manual. The
motherboard you’ve received may or may not look exactly the same as the
graphics shown in the manual.)

1-3

X7DBR-3/X7DBR-E User's Manual

X7DBR-3/E Motherboard Layout (not drawn to scale)

KB

JKB

MS

JMS

USB0/1

JUSB1

COM1

JCOM1

GLAN1

GLAN2

VGA

JVGA1

SAS 4-7

Pres#4-7

Act#4-7

JLAN1

JLAN2

JSM2

COM2

JCOM2

Pres#4

UPER X7DBR-3/E

S

J9B2

Bank4

J9B1

J8B3

Bank3

J8B2

J8B1

Bank2

J7B3

J7B2

Bank1

J7B1

PXH-V

Slot7

PCI-X 100MHz ZCR SXB-

Slot6

PCI-X 133MHz

GLAN
CTRLR

JPL1

JPL2

VGA
CTRLR

SIMSO

Pres#5

®

DIMM 4B

DIMM 4A

DIMM 3B

DIMM 3A

DIMM 2B

DIMM 2A

DIMM 1B

DIMM 1A

C2

C1

2

2

JI

JI

JPG1

JP10

JIPMI

JP11

Pres#6Pres#7

SMB

IPMB

J18

JPS1

J10

SAS
CTRLR

Battery

3rd PWR
Fail

North Bridge

J13

SXB-

JWOR

PWLED SPK

WOR

J3P

S I/O

PWR
SMB

E2x8

LE1

JD1

E1x8

J42

JAR

J8

J4E3

J41

J17

JPWF

SXB-

South
Bridge

USB4/5

JUSB3

Pres#0

E3x8

CPU1

CPU2

J43

WOL

JWOL

USB2/3

JUSB2

JBT1

SATA1

SATA0

Pres#1

8-pin PWR

JPW2

20-pin ATX Main PWR

JWD

JCF1

JWF1

JP12

Pre#0-3

Act#0-3

Buzzer

SATA3

SATA5

JS4

JS3

JS6

SATA4

JS5

SATA2

JS2

JS1

4-pin
PWR

BIOS

Pres#2Pres#3

JPW3

JPW1

IDE1

Compact Flash

JIDE1

JIDE2

SGPIO2

J30

JOH1

SAS 1-3

JSM1

JS10

Fan1

Fan2

Fan3

Fan4

Fan5

J22

SGPIO1

J29

J7

JL1

JF1

FP Ctrl

Floppy

Act#4

Act#5

Act#6

Act#7

SAS LEDs (Act#4-#7, Pres.#4-#7) (*Note

Act=Active, Pre.=Present)

Act# Defi nition Act# Defi nition
Act#4 SAS4:Act Pre#4 SAS0:Pre.4
Act#5 SAS5:Act Pre#5 SAS1:Pre.5

Act#6 SAS6:Act Pre#6 SAS2:Pre.6
Act#7 SAS7:Act Pre#7 SAS2:Pre.7

Act#0

Act#1

Act#2

SAS LEDs (Act#0-#3, Pres.#0-#3) (*Note

Act=Active, Pre.=Present)

Act# Defi nition Act# Defi nition
Act#0 SAS0:Act Pre#0 SAS0:Pre.0
Act#1 SAS1:Act Pre#1 SAS1:Pre.1

Act#2 SAS2:Act Pre#2 SAS2:Pre.2
Act#3 SAS3:Act Pre#3 SAS2:Pre.3

Act#3

Note 1. Jumpers not indicated are for test purposes only.
Note 2. See Chapter 2 for detailed information on jumpers, I/O ports and

JF1 front panel connections.

Note 3. " " indicates the location of Pin 1.
Note 4. SAS is for the X7DBR-3 only.
Note 5. For Compact Card to work properly, please enable JCF1 by putting

jumper on it and connect JWF1 to the power input of the Compact Flash Jumper.
Note 6. When LE1 is on, make sure to remove the power cable before removing

or installing components.

1-4

Quick Reference ( X7DBR-3/X7DBR-E)

Jumper Description Default Setting

J3P 3rd PWR Failure Detect

JBT1 CMOS Clear See Chapter 2
JCF1 Compact Card Master/Slave Select On (Master)

2

JI

C1/JI2C2 SMB Bus to PCI-E Slots Off (Disabled)
JPG1 VGA Enable Pins 1-2 (Enabled)
JPL1/ JPL2 GLAN1/GLAN2 Enable Pins 1-2 (Enabled)
JPS1 (*Note1) SAS Enable Pins 1-2 (Enabled)(*Note)
JWD Watch Dog Pins 1-2 (Reset)
Connector Description
ATX PWR (JPW1) Primary 20-Pin ATX PWR Connector
Aux. PWR/CPU PWR +12V 4-pin PWR (JWP2)/+12V 8-pin PWR(JPW3)
Buzzer Internal Speaker
Chassis Intrusion (JL1) Chassis Intrusion Header
COM1/COM2 COM1(JCOM1)/COM2(JCOM2) Serial Port Connectors
Compact PWR (JWF1) Compact Card PWR Connector (*Used if JCF1 is on.)
DIMM#1A-DIMM#4B Memory DDR2 Fully Buffered (FBD) Slots
FAN 1-5 Fans 1-5 (CPU Fans/Chassis Fans)
Floppy (J22) Floppy Disk Drive Connector
FP CTRL (JF1) Front Control Panel Connector
GLAN 1/2 (JLAN1/2) G-bit Ethernet Ports
IDE1/IDE2 IDE1 Hard Drive (JIDE1)/Compact Flash Card (JIDE2)
IPMB (J10) IPMB Connector
OH LED (JOH1) Overheat LED
JAR Alarm Reset Enable
JPWF Power Supply Failure Connector (See Chapter 2)
PCI-X (Slot 6) PCI-X 133 MHz
PCI-X (Slot 7) PCI-X 100 MHz Zero Channel RAID (ZCR) Slot(*Note2)
PWR LED/SPKR (JD1) PWR LED(pins1-3)/SpeakerHeader (pins 4-7)
PWR SMB (J17) Power System Management (I
SAS#0-#3/SAS#4-#7 SAS #0-#3(JSM1), SAS #4-7(JSM2) Connectors(Note1)
SGPIO1/2 (J29, J30) Serial General Purpose Input/Output Headers
SIMSO (JIPMI) SIM SO-DIMM IPMI Slot
SMB (J18) System Management Bus Header
SXB-E1/SXB-E2/SXB-E3 PCI-Exp x8 slots (J41/J42/J43)
USB 0/1,USB 2/3,USB4/5 Back Panel USB 0/1, FP USB 2/3, FP USB4/5
VGA (JVGA1) VGA Connector
WOL (JWOL) Wake-on-LAN Header
WOR (JWOR) Wake-on-Ring Header

SAS LED Indicators (*Note1)

Act#0-3,4-7, Pre#0-3,4-7 SAS Activity LED #0-#3, #4-7, Present LED #0-#3, #4-7

Note1: For X7DBR-3 only.
Note2: For the ZCR Card to work properly, be sure to install it in the riser for Slot

7.

1-5

Chapter 1: Introduction

Off (Disabled)

2

C) Header

X7DBR-3/X7DBR-E User's Manual

Motherboard Features

CPU

• Dual Intel

®

64-bit Xeon LGA 771 dual core processors at a front side bus

speed of 667 MHz/1.066 GHz/1.333 GHz

Memory

• Eight 240-pin DIMM sockets with support up to 32 GB DDR2 Fully Buffered
(FBD) ECC 667/533 Memory (*See Section 2-3 in Chapter 2 for DIMM Slot
Population.)

Chipset

• Intel 5000P chipset, including: the 5000P Memory Control Hub (MCH), the
Enterprise South Bridge 2 (ESB2), and the I/O subsystem (PXH-V).

Expansion Slots

• Three PCI-Express slots (*three slots at x8@4GB/sec.) (*riser card required)

• One 64-bit PCI-X slot (*One PCI-X-133 MHz slot: Slot 6) (*riser card required)

• One 64-bit PCI-X ZCR slot (*One PCI-X-100 MHz Zero Channel RAID slot:
Slot 7) (*riser card required)

BIOS

• 8 Mb Phoenix

®

Flash ROM

• DMI 2.3, PCI 2.2, ACPI 1.0/2.0, Plug and Play (PnP), SMBIOS 2.3 and USB
Keyboard support

PC Health Monitoring

• Onboard voltage monitors for CPU cores, chipset voltage, +1.8V, +3.3V, +5V,
+12V, −12V, +3.3V Standby, +5V standby and VBAT

• Fan status monitor with fi rmware control

• CPU/chassis temperature monitors

• Low noise fan speed control

• Platform Environment Control Interface (PECI) ready

2

• I

C temperature sensing logic

• Thermal Monitor 2 (TM2) support

• CPU slow-down on temperature overheat

• CPU thermal trip support for processor protection

• Power-up mode control for recovery from AC power loss

• Auto-switching voltage regulator for CPU cores

• System overheat/Fan Fail LED Indicator and control

• Chassis intrusion detection

• System resource alert via Supero Doctor III

1-6

Chapter 1: Introduction

ACPI Features

• Slow blinking LED for suspend state indicator

• Main switch override mechanism

• ACPI Power Management

• Power-on mode for power recovery

Onboard I/O

• Six SATA ports (supporting Intel RAID 0, 1, 5 and 10) (*Adaptec supports
RAID 0, 1 and 10 for the X7DBR-E only)

• Eight SAS Connectors (*X7DBR-3 only)

• One SIMSO IPMI socket (AOC-SIMSO)

• Two Giga-bit LAN ports with IOAT Technology

• One EIDE Ultra DMA/100 bus master interface

• One IDE w/Compact Flash Card supported

• One fl oppy port interface

• Two COM ports(1 header, 1 port)

• Up to fi ve USB 2.0 (Universal Serial Bus) (2 ports, 3 Headers)

• ATI ES1000 16MB Graphic Controller

• Super I/O: Winbond W83627HG w/Hardware Monitor support: W83793G

Other

• External modem ring-on

• Wake-on-LAN (WOL)

• Wake-on-Ring (WOR)

• Console redirection

• Onboard Fan Speed Control by Thermal Management via BIOS

CD/Diskette Utilities

• BIOS fl ash upgrade utility and device drivers

Dimensions

• Ext. ATX 12" (L) x 13.05" (W) (304.80mm x 331.47mm)

1-7

X7DBR-3/X7DBR-E User's Manual

SAS

J5
#6

J14
#3

PCI-E_X4_SLOT(L1)

PCI-E_X4_SLOT(L2)

J12

PCI-X133

PCI-X_Slot(R)ZCR

PXH-V

VRM

ISL6307

LSB

MSB

PCI-E
Slot

J9
#4

PCI-EXP X8

PCI-EXP X8

PCI-Ex4

PCI-Ex8

PCI-X 133

PROCESSOR#2

1067/1333

MT/S

PORT

#4,5

PORT

#6,7

PORT
#2

PORT PORT

PORT
#0

PORT

#1,2

PCIX

5000P

MCH

PORT PORT

PCIE X4

PCIE X4

#4#4

ESB2

PROCESSOR#1

1067/1333
MT/S

FBD CHNL0

FBD CHNL1

FBD CHNL2

FBD CHNL3

#0#3

PCIE X4

ESI

VRM

ISL6307

#0

ATA 100

EXP. BUS

3.0 Gb/S

#1

#0 #0

FBD DIMM

FBD DIMM

IDE CONN

EBUS CONN

#5

#4

#3

#2

#1

#0

SATA

#1

#1

FBD DIMM

#1

#0

FBD DIMM

#5

#4

#0

FWH

#3

#2

#1

USB

VGA

CONN

VGA

ES1000

SIMSO

PCI-X_SLOT(L)

PCI 32/33MMZ

RJ45

RJ45

PCI-33

GB LAN

GILGAL

KUMERAN

FDD

SIO

W83627

MS

KB

28-31

HF

USB 2.0

LPC

COM1

COM2

Block Diagram of the 5000P Chipset

Note: This is a general chipset block diagram. Please see the previous Motherboard

Features pages for details on the features of each motherboard.

1-8

Chapter 1: Introduction

1-2 Chipset Overview

Built upon the functionality and the capability of the 5000P chipset, the X7DBR-3/
X7DBR-E motherboard provides the performance and feature set required for dual
processor-based servers with confi guration options optimized for communications,
presentation, storage, computation or database applications. The 5000P chipset
supports a single or dual Dempsey 64-bit dual core processor(s) with front side
bus speeds of up to 1.333 GHz. The chipset consists of the 5000P Memory Con­troller Hub (MCH), the Enterprise South Bridge 2 (ESB2), and the I/O subsystem
(PXH-V).

The 5000P MCH chipset is designed for symmetric multiprocessing across two
independent front side bus interfaces. Each front side bus uses a 64-bit wide, 1333
MHz data bus that transfers data at 10.7 GB/sec. The MCH chipset connects up to
8 Fully Buffered DIMM modules, providing up to 32 GB of DDR2 FBD ECC memory.
The MCH chipset also provides three x8 PCI-Express interface to the ESB2. In
addition, the 5000P chipset offers a wide range of RAS features, including memory
interface ECC, x4/x8 Single Device Data Correction, CRC, parity protection, memory
mirroring and memory sparing.

Xeon Dual Core Processor Features

Designed to be used with conjunction of the 5000P chipset, the Xeon Dual Core
Processor provides a feature set as follows:

The Xeon Dual Core Processor

*L1 Cache Size: Instruction Cache (32KB/16KB), Data Cache (32KB/24KB)
*L2 Cache Size: 4MB (2MB per core)
*Data Bus Transfer Rate: 8.5 GB/s
*Package: FC-LGA6/FC-LGA4, 771 Lands

1-9

X7DBR-3/X7DBR-E User's Manual

1-3 Special Features

Recovery from AC Power Loss

BIOS provides a setting for you to determine how the system will respond when
AC power is lost and then restored to the system. You can choose for the system
to remain powered off (in which case you must hit the power switch to turn it back
on) or for it to automatically return to a power- on state. See the Power Lost Con­trol setting in the Advanced section (Boot Features) to change this setting. (*Note:
Default: Last State).

1-4 PC Health Monitoring

This section describes the PC health monitoring features of the X7DBR-3/X7DBR­E. All have an onboard System Hardware Monitor chip that supports PC health
monitoring.

Onboard Voltage Monitors for CPU Cores, Memory, Chipset,
+1.8V, +3.3V, +5V, +12V, −12V, +3.3V Standby, +5V standby and
VBAT

An onboard voltage monitor will scan these voltages continuously. Once a voltage
becomes unstable, a warning is given or an error message is sent to the screen.
Users can adjust the voltage thresholds to defi ne the sensitivity of the voltage
monitor.

Fan Status Monitor with Firmware Control

The PC health monitor can check the RPM status of the cooling fans. The onboard
CPU and chassis fans are controlled by Thermal Management via BIOS (under
Hardware Monitoring in the Advanced Setting).

Environmental Temperature Control

The thermal control sensor monitors the CPU temperature in real time and will turn
on the thermal control fan whenever the CPU temperature exceeds a user-defi ned
threshold. The overheat circuitry runs independently from the CPU. Once it detects
that the CPU temperature is too high, it will automatically turn on the thermal fan
control to prevent any overheat damage to the CPU. The onboard chassis thermal
circuitry can monitor the overall system temperature and alert users when the chas­sis temperature is too high.

1-10

Chapter 1: Introduction

System Resource Alert

This feature is available when used with Supero Doctor III in the Windows OS
environment or used with Supero Doctor II in Linux. Supero Doctor is used to
notify the user of certain system events. For example, if the system is running
low on virtual memory and there is insuffi cient hard drive space for saving the
data, you can be alerted of the potential problem. You can also confi gure Supero
Doctor to provide you with warnings when the system temperature goes beyond
a pre-defi ned range.

1-5 ACPI Features

ACPI stands for Advanced Confi guration and Power Interface. The ACPI specifi -
cation defi nes a fl exible and abstract hardware interface that provides a standard
way to integrate power management features throughout a PC system, including its
hardware, operating system and application software. This enables the system to
automatically turn on and off peripherals such as CD-ROMs, network cards, hard
disk drives and printers. This also includes consumer devices connected to the PC
such as VCRs, TVs, telephones and stereos.

In addition to enabling operating system-directed power management, ACPI
provides a generic system event mechanism for Plug and Play and an operating
system-independent interface for confi guration control. ACPI leverages the Plug
and Play BIOS data structures while providing a processor architecture-independent
implementation that is compatible with Windows 2000, Windows XP and Windows
2003 Server Operating Systems.

Slow Blinking LED for Suspend-State Indicator

When the CPU goes into a suspend state, the chassis power LED will start blinking
to indicate that the CPU is in suspend mode. When the user presses any key, the
CPU will wake-up and the LED will automatically stop blinking and remain on.

1-11

X7DBR-3/X7DBR-E User's Manual

Main Switch Override Mechanism

When an ATX power supply is used, the power button can function as a system
suspend button to make the system enter a SoftOff state. The monitor will be
suspended and the hard drive will spin down. Pressing the power button again
will cause the whole system to wake-up. During the SoftOff state, the ATX power
supply provides power to keep the required circuitry in the system alive. In case
the system malfunctions and you want to turn off the power, just press and hold
the power button for 4 seconds. This option can be set in the Power section of
the BIOS Setup routine.

External Modem Ring-On

Wake-up events can be triggered by a device such as the external modem ringing
when the system is in the SoftOff state. Note that external modem ring-on can only
be used with an ATX 2.01 (or above) compliant power supply.

Wake-On-LAN (WOL)

Wake-On-LAN is defi ned as the ability of a management application to remotely
power up a computer that is powered off. Remote PC setup, up-dates and asset
tracking can occur after hours and on weekends so that daily LAN traffi c is kept to
a minimum and users are not interrupted. The motherboard has a 3-pin header
(WOL) to connect to the 3-pin header on a Network Interface Card (NIC) that has
WOL capability. In addition, an onboard LAN controller can also support WOL with­out any connection to the WOL header. The 3-pin WOL header is to be used with
a LAN add-on card only. *Note: Wake-On-LAN requires an ATX 2.01 (or above)
compliant power supply.

1-6 Power Supply

As with all computer products, a stable power source is necessary for proper and
reliable operation. It is even more important for processors that have high CPU
clock rates.

The X7DBR-3/X7DBR-E can only accommodate 20-pin ATX power supplies. Al­though most power supplies generally meet the specifi cations required by the CPU,
some are inadequate. In addition, the 12V 4-pin and the 12V 8-pin power connec­tions are also required to ensure adequate power supply to the system. Also your
power supply must supply 1.5A for the Ethernet ports.

1-12

Chapter 1: Introduction

It is strongly recommended that you use a high quality power supply that meets ATX
power supply Specifi cation 2.01 or above. It must also be SSI compliant (info at
http://www.ssiforum.org/). Additionally, in areas where noisy power transmission is
present, you may choose to install a line fi lter to shield the computer from noise. It
is recommended that you also install a power surge protector to help avoid problems
caused by power surges.

1-7 Super I/O

The disk drive adapter functions of the Super I/O chip include a fl oppy disk drive
controller that is compatible with industry standard 82077/765, a data separator,
write pre-compensation circuitry, decode logic, data rate selection, a clock genera­tor, drive interface control logic and interrupt and DMA logic. The wide range of
functions integrated onto the Super I/O greatly reduces the number of components
required for interfacing with fl oppy disk drives. The Super I/O supports 360 K, 720
K, 1.2 M, 1.44 M or 2.88 M disk drives and data transfer rates of 250 Kb/s, 500 Kb/s
or 1 Mb/s.It also provides two high-speed, 16550 compatible serial communication
ports (UARTs). Each UART includes a 16-byte send/receive FIFO, a programmable
baud rate generator, complete modem control capability and a processor interrupt
system. Both UARTs provide legacy speed with baud rate of up to 115.2 Kbps
as well as an advanced speed with baud rates of 250 K, 500 K, or 1 Mb/s, which
support higher speed modems.

The Super I/O supports one PC-compatible printer port (SPP), Bidirectional Printer
Port (BPP) , Enhanced Parallel Port (EPP) or Extended Capabilities Port (ECP).

The Super I/O provides functions that comply with ACPI (Advanced Confi guration
and Power Interface), which includes support of legacy and ACPI power manage­ment through an SMI or SCI function pin. It also features auto power management
to reduce power consumption.

1-13

X7DBR-3/X7DBR-E User's Manual

Notes

1-14

Chapter 2: Installation

Chapter 2

Installation

2-1 Static-Sensitive Devices

Electric-Static-Discharge (ESD) can damage electronic com ponents. To prevent
damage to your system board, it is important to handle it very carefully . The following
measures are generally suffi cient to protect your equipment from ESD.

Precautions

• Use a grounded wrist strap designed to prevent static discharge.

• Touch a grounded metal object before removing the board from the antistatic
bag.

• Handle the board by its edges only; do not touch its components, peripheral
chips, memory modules or gold contacts.

• When handling chips or modules, avoid touching their pins.

• Put the motherboard and peripherals back into their antistatic bags when not in
use.

• For grounding purposes, make sure your computer chassis provides excellent
conductivity between the power supply, the case, the mounting fasteners and
the motherboard.

• Use only the correct type of onboard CMOS battery as specifi ed by the manu-
facturer. Do not install the onboard battery upside down to avoid possible explo­sion.

Unpacking

The motherboard is shipped in antistatic packaging to avoid static damage. When
unpacking the board, make sure the person handling it is static protected.

2-1

X7DBR-3/X7DBR-E User's Manual

!

2-2 Processor and Heatsink Fan Installation

When handling the processor package, avoid placing
direct pressure on the label area of the fan.

(*Notes: 1. Always connect the power cord last and always remove it before adding,
removing or changing any hardware components. Make sure that you install the
processor into the CPU socket before you install the CPU heatsink.

2. Intel's boxed Xeon CPU package contains the CPU fan and heatsink assembly.
If you buy a CPU separately, make sure that you use only Intel-certifi ed multi-di-
rectional heatsink and fan.

3. Make sure to install the motherboard into the chassis before you install the CPU
heatsink and fan.)

4. When purchasing an LGA 771 CPU or when receiving a motherboard with an LGA
771 CPU pre-installed, make sure that the CPU plastic cap is in place and none of
the CPU pins are bent; otherwise, contact the retailer immediately.

5. Refer to the MB Features Section for more details on CPU support.

Installation of the LGA771 Processor

1. Press the socket clip to release
the load plate, which covers the CPU
socket, from its locking position.

2. Gently lift the socket clip to open
the load plate.

Socket Clip

Load Plate

Load Plate

2-2

Chapter 2: Installation

!

3. Use your thumb and your index

fi nger to hold the CPU at the North
Center Edge and the South Center
Edge of the CPU.

4. Align CPU Pin1 (the CPU corner

marked with a triangle) against the
socket corner that is marked with a
triangle cutout.

5. Align the CPU key that is the

semi-circle cutout below a gold dot
against the socket key, the notch on
the same side of the triangle cutout
on the socket.

6. Once aligned, carefully lower the

CPU straight down to the socket.
(**Do not drop the CPU on the
socket. Do not move the CPU hori­zontally or vertically. Do not rub the
CPU against the surface or against
any pins of the socket to avoid dam­age to the CPU or the socket.)

Socket Key
(Socket Notch)

CPU Key (semi­circle cutout)
below the circle.

Corner with a
triangle cutout

North Center Edge

South Center Edge

gold dot

CPU Pin1

7. With the CPU inside the socket,

inspect the four corners of the CPU
to make sure that the CPU is prop­erly installed.

8. Use your thumb to gently push the

socket clip down to the clip lock.

9. If the CPU is properly installed

into the socket, the plastic cap will
be automatically released from the
load plate when the clip is pushed in
the clip lock. Remove the plastic cap
from the motherboard.

(*Warning: Please keep the
plastic cap. The motherboard and the
CPU must be shipped with the plas­tic cap properly installed to protect
the CPU pins. Shipment without the
CPU plastic cap properly installed
will void the warranty.)

Socket clip

CPU in the CPU socket

Plastic cap
is released
from the
load plate
if the CPU
is properly
installed.

2-3

X7DBR-3/X7DBR-E User's Manual

!

Installation of the Heatsink

CEK Heatsink Installation

1. Do not apply any thermal grease to
the heatsink or the CPU die-the required
amount has already been applied.

2. Place the heatsink on top of the
CPU so that the four mounting holes
are aligned with those on the retention
mechanism.

3. Screw in two diagonal screws (ie the
#1 and the #2 screws) until just snug (-do
not fully tighten the screws to avoid pos­sible damage to the CPU.)

CEK Passive Heatsink

Screw#1

Screw#2

4. Finish the installation by fully tightening
all four screws.

To Un-install the Heatsink

(Warning: We do not recommend

that the CPU or the heatsink be
removed. However, if you do need
to uninstall the heatsink, please
follow the instructions below to
uninstall the heatsink to prevent
damage done to the CPU or the
CPU socket.)

Screw#1

Screw#2

2-4

1. Unscrew and remove the heatsink
screws from the motherboard in the
sequence as show in the picture on the
right.

2. Hold the heatsink as shown in the
picture on the right and gently wiggle the
heatsink to loosen it from the CPU. (Do
not use excessive force when wiggling
the heatsink!!)

3. Once the heatsink is loosened, remove
the heatsink from the CPU socket.

Chapter 2: Installation

4. Clean the surface of the CPU and
the heatsink to get rid of the old thermal
grease. Reapply the proper amount of
thermal grease on the surface before you
re-install the CPU and the heatsink.

Mounting the Motherboard in the Chassis

All motherboards have standard mounting holes to fi t different types of chas-
sis. Make sure that the locations of all the mounting holes for both motherboard
and chassis match. Make sure that the metal standoffs click in or are screwed in
tightly. Then, use a screwdriver to secure the motherboard onto the motherboard
tray. (Note: some components are very close to the mounting holes. Please take
precautionary measures to prevent damage done to these components when you
install the motherboard to the chassis.)

2-5

X7DBR-3/X7DBR-E User's Manual

2-3 Installing DIMMs

Note: Check the Supermicro web site for recommended memory modules.

CAUTION

Exercise extreme care when installing or removing DIMM

modules to prevent any possible damage. Also note that the

memory is interleaved to improve performance (see step 1).

DIMM Installation

1. Insert the desired number of DIMMs into the memory slots, starting with DIMM
#1A. The memory scheme is interleaved, so you must install two modules
at a time, beginning with DIMM #1A, then DIMM #2A and so on. For optimal
performance, please install memory modules in both Branch 0 and Branch 1
at the same time (up to 8 modules maximum.) (*See the Memory Installation
Table Below.)

(*See the Memory Installation Table Below.)

2. Insert each DIMM module vertically into its slot. Pay attention to the notch along
the bottom of the module to prevent inserting the DIMM module incorrectly.

3. Gently press down on the DIMM module until it snaps into place in the slot.
Repeat for all modules (see step 1 above).

Memory Support

The X7DBR-3/X7DBR-E supports up to 32 GB fully buffered (FBD) ECC DDR2
533/667 in 8 DIMMs. Populating DIMM modules with pairs of memory modules
of the same size and same type will result in Interleaved Memory which will

increase memory performance.

*Note 1: Due to OS limitations, some operating systems may not show more than

4 GB of memory.

Optimized DIMM Population Configurations

Branch 0 Branch 1
Number of
DIMMs
2 DIMMs 1A
4 DIMMs 1A
8 DIMMs 1A 1B

Bank 1

(Channel 0)

--- --- ---

--- --- ---

--- ---

Bank 2
(Channel 1)

--- --- --- --- --- --- --- --- --- --- ---

2A

--- --- ---

2A
2A 2B

--- ---

Bank 3
(Channel 2)

--- --- ---

3A
3A 3B

--- ---

Bank 4
(Channel 3)

--- --- ---

4A
4A 4B

--- ---

(*Notes: i. DIMM slot# specified: DIMM slot to be populated; “---“: DIMM slot not to
be populated. ii. Both FBD 533 MHz and 667MHz DIMMs are supported; however,
you need to use the memory modules of the same type and of the same speed on a
motherboard. iii. Interleaved memory is supported when pairs of DIMM modules are
installed. For best performance, please install memory modules of the same type and
of the same speed in both

Branch 0 and Branch 1. iv. For memory to work

properly, you need to follow the restrictions listed above. )

2-6

Chapter 2: Installation

2 FBD

2 FBD Slot

*Note 2: Due to memory allocation to system devices, memory remaining avail-

able for operational use will be reduced when 4 GB of RAM is used. The reduction
in memory availability is disproportional. (Refer to the Memory Availability Table
below for details.)

Possible System Memory Allocation & Availability

®

UPER X7DBR-3/E

S

System Device Size Physical Memory

Firmware Hub fl ash memory
(System BIOS)

Local APIC 4 KB 3.99
Area Reserved for the chipset 2 MB 3.99
I/O APIC (4 Kbytes) 4 KB 3.99
PCI Enumeration Area 1 256 MB 3.76
PCI Express (256 MB) 256 MB 3.51
PCI Enumeration Area 2 (if

needed) -Aligned on 256-MB
boundary-

VGA Memory 16 MB 2.85
TSEG 1 MB 2.84
Memory available to OS &

other applications

1 MB 3.99

512 MB 3.01

Remaining (-Available)
(4 GB Total System Memory)

2.84

Installing and Removing DIMMs

To Remove:

Use your thumbs to
gently push the re­lease tabs near both
ends of the module.
This should release
it from the slot.

To Install: Insert module vertically and press down until it
snaps into place. Pay attention to the alignment notch at
the bottom.

2-7

X7DBR-3/X7DBR-E User's Manual

1

2

3

4

5

6

7

8

9

2-4 Control Panel Connectors/IO Ports

The I/O ports are color coded in conformance with the PC 99 specifi cation. See
the fi gure below for the colors and locations of the various I/O ports.

A. Back Panel Connectors/IO Ports

®

UPER X7DBR-3/E

S

Figure 2-3. Back Panel I/O Port Locations and Defi nitions

Back Panel Connectors

1. Keyboard (Purple)

2. PS/2 Mouse (Green)

3. Back Panel USB Port 0

4. Back Panel USB Port 1

5. COM Port 1 (Turquoise)

6. Gigabit LAN 1

7. Gigabit LAN 2

8. VGA Port (Blue)

9. SAS#4-#7 (*X7DBR-3 only)

(*See Section 2-5 for details.)

2-8

Chapter 2: Installation

B. Front Control Panel

JF1 contains header pins for various buttons and indicators that are normally lo­cated on a control panel at the front of the chassis. These connectors are designed
specifi cally for use with Supermicro server chassis. See the graphics below for the
descriptions of the various control panel buttons and LED indicators. Refer to the
following section for descriptions and pin defi nitions.

JF1 Header Pins

®

UPER X7DBR-3/E

S

Ground

1920

NMI

X

Power LED

HDD LED

NIC1 LED

NIC2 LED

OH/Fan Fail LED

PWR Fail LED

Ground

Ground

X

Vcc

Vcc

Vcc

Vcc

Vcc

Vcc

Reset

PWR

2

1

Reset Button

Power Button

2-9

X7DBR-3/X7DBR-E User's Manual

C. Front Control Panel Pin Defi nitions

NMI Button

The non-maskable interrupt button
header is located on pins 19 and 20
of JF1. Refer to the table on the right
for pin defi nitions.

Power LED

The Power LED connection is located
on pins 15 and 16 of JF1. Refer to the
table on the right for pin defi nitions.

NMI Button

Pin Defi nitions (JF1)

Pin# Defi nition
19 Control
20 Ground

Power LED

Pin Defi nitions (JF1)

Pin# Defi nition
15 +5V
16 Ground

KB

MS

USB0/1

COM1

GLAN1

Pres#4-7

Act#4-7

GLAN2

VGA

SAS 4-7

COM2

S

Bank4

Bank3

Bank2

Bank1

GLAN
CTRLR

JPL1

JPL2

A. NMI
B. PWR LED

®

UPER X7DBR-3/E

DIMM 4B

DIMM 4A

DIMM 3B

DIMM 3A

DIMM 2B

DIMM 2A

DIMM 1B

DIMM 1A

PXH-V

C2

C1

2

2

JI

JI

PCI-X 100MHz ZCR SXB-

PCI-X 133MHz

Battery

VGA
CTRLR

SIMSO

SAS
CTRLR

JPG1

JPS1

JP10

SMB

IPMB

JP11

3rd PWR
Fail

North Bridge

PWLED SPK

WOR

PWR
SMB

JPWF

JAR

CPU1

CPU2

4-pin

8-pin PWR

PWR

20-pin ATX Main PWR

Fan1

Fan2

B

Power LED

FP Ctrl

Fan3

Fan4

NIC1 LED

X

HDD LED

Ground

NIC2 LED

E1x8

SXB-

SXB-

E2x8

E3x8

South
Bridge

S I/O

USB4/5

LE1

J8
J4E3

WOL

USB2/3

SATA1

SATA0

JBT1

BIOS

Buzzer

SATA3

SATA2

JWF1

Pre#0-3

Act#0-3

SATA5

SATA4

JWD

JCF1

JP12

Compact Flash

SGPIO2

JOH1

SAS 1-3

JS10

Fan5

OH/Fan Fail LED

IDE1

Floppy

SGPIO1

J7

JL1

PWR Fail LED

Ground

Ground

1920

NMI

A

X

Vcc

Vcc

Vcc

Vcc

Vcc

Vcc

Reset

Reset Button

Power Button

PWR

2

1

2-10

Chapter 2: Installation

HDD LED

The HDD LED connection is located
on pins 13 and 14 of JF1. Attach a
hard drive LED cable here to display
disk activity (for any hard drives on
the system, including SAS, Serial ATA
and IDE). See the table on the right
for pin defi nitions.

NIC1/NIC2 LED Indicators

The NIC (Network Interface Control­ler) LED connection for GLAN port1 is
located on pins 11 and 12 of JF1 and
the LED connection for GLAN Port2
is on Pins 9 and 10. Attach the NIC
LED cables to display network activity .
Refer to the table on the right for pin
defi nitions.

HDD LED

Pin Defi nitions (JF1)

Pin# Defi nition
13 +5V
14 HD Active

GLAN1/2 LED

Pin Defi nitions (JF1)

Pin# Defi nition
9/11 Vcc
10/12 PWR Fail

A. HDD LED
B. NIC1 LED
C. NIC2 LED

S

KB

Bank4

MS

USB0/1

Bank3

COM1

Bank2

Bank1

PXH-V

GLAN1

GLAN2

GLAN
CTRLR

VGA

JPL1

JPL2

VGA
CTRLR

SAS 4-7

Pres#4-7

Act#4-7

COM2

®

UPER X7DBR-3/E

DIMM 4B

DIMM 4A

DIMM 3B

DIMM 3A

DIMM 2B

DIMM 2A

DIMM 1B

DIMM 1A

C2

C1

2

2

JI

JI

PCI-X 100MHz ZCR SXB-

PCI-X 133MHz

JPG1

JP10

SMB

SIMSO

IPMB

JP11

3rd PWR
Fail

North Bridge

Battery

SAS
CTRLR

JPS1

WOR

PWR
SMB

SXB-

S I/O

LE1

PWLED SPK

4-pin

8-pin PWR

CPU1

CPU2

WOL

USB2/3

SATA1

SATA0

JBT1

PWR

20-pin ATX Main PWR

BIOS

Buzzer

SATA3

SATA2

JWF1

Pre#0-3

Act#0-3

SATA5

SATA4

JWD

JCF1

JP12

IDE1

Compact Flash

SGPIO1

SGPIO2

JOH1

SAS 1-3

JS10

Fan1

Fan2

FP Ctrl

Fan3

B

Fan4

C

Fan5

OH/Fan Fail LED

Floppy

J7

JL1

Ground

Power LED

HDD LED

A

NIC1 LED

NIC2 LED

PWR Fail LED

X

Ground

Ground

JPWF

JAR

E1x8

SXB-

E2x8

E3x8

South
Bridge

USB4/5

J8

J4E3

1920

NMI

X

Vcc

Vcc

Vcc

Vcc

Vcc

Vcc

Reset

Reset Button

Power Button

PWR

2

1

2-11

X7DBR-3/X7DBR-E User's Manual

Overheat/Fan Fail LED (OH)

The OH/Fan Fail connection on pins
7 and 8 of JF1 provides advanced
warning of chassis overheating or
fan failure. Refer to the table on the
right for pin defi nitions.

Power Fail LED

The Power Fail LED connection is
located on pins 5 and 6 of JF1. Re­fer to the table on the right for pin
defi nitions.

OH/Fan Fail LED

Pin Defi nitions (JF1)

Pin# Defi nition
7 Vcc
8 Ground

OH/Fan Fail Indicator

Status

State Defi nition
Off Normal
On Overheat
Flash-

Fan Fail

ing

PWR Fail LED

Pin Defi nitions (JF1)

Pin# Defi nition
5 Vcc
6 Ground

A. OH/Fan Fail LED
B. PWR Supply Fail

®

UPER X7DBR-3/E

S

KB

MS

USB0/1

COM1

GLAN1

Pres#4-7

Act#4-7

GLAN2

VGA

SAS 4-7

COM2

GLAN
CTRLR

JPL1

JPL2

DIMM 4B

DIMM 4A

Bank4

DIMM 3B

DIMM 3A

Bank3

DIMM 2B

DIMM 2A

Bank2

DIMM 1B

DIMM 1A

Bank1

PXH-V

C1

2

2

JI

PCI-X 100MHz ZCR SXB-

PCI-X 133MHz

VGA
CTRLR

JP10

SIMSO

JP11

C2
JI

JPG1

PWR

3rd PWR
Fail

SMB

JPWF

JAR

CPU1

4-pin

8-pin PWR

PWR

20-pin ATX Main PWR

Ground

Fan1

Fan2

X

Power LED

FP Ctrl

Fan3

HDD LED

North Bridge

SXB-

E2x8

Battery

SAS
CTRLR

JPS1

SMB

IPMB

S I/O

LE1

PWLED SPK

WOR

CPU2

E1x8

SXB-

E3x8

South
Bridge

WOL

SATA1

USB4/5

USB2/3

J8
J4E3

SATA0

JBT1

JWD

JCF1

JWF1

Compact Flash

SGPIO2

BIOS

JP12

JOH1

Pre#0-3

Act#0-3

Buzzer

SAS 1-3

SATA5

SATA3

SATA2

SATA4

JS10

NIC1 LED

Fan4

NIC2 LED

Fan5

OH/Fan Fail LED

IDE1

Floppy

PWR Fail LED

SGPIO1

J7

JL1

A

B

Ground

Ground

1920

NMI

X

Vcc

Vcc

Vcc

Vcc

Vcc

Vcc

Reset

Reset Button

Power Button

PWR

2

1

2-12

Reset Button

Chapter 2: Installation

The Reset Button connection is located
on pins 3 and 4 of JF1. Attach it to the
hardware reset switch on the computer
case. Refer to the table on the right for
pin defi nitions.

Power Button

The Power Button connection is located
on pins 1 and 2 of JF1. Momentarily
contacting both pins will power on/off
the system. This button can also be
confi gured to function as a suspend but-
ton (with a setting in BIOS - see Chapter

4). To turn off the power when set to
suspend mode, press the button for at
least 4 seconds. Refer to the table on
the right for pin defi nitions.)

Reset Button

Pin Defi nitions (JF1)

Pin# Defi nition
3 Reset
4 Ground

Power Button

Pin Defi nitions (JF1)

Pin# Defi nition

1 Signal
2 +3V Standby

A. Reset Button
B. PWR Button

UPER X7DBR-3/E

S

KB

Bank4

MS

USB0/1

Bank3

COM1

Bank2

Bank1

PXH-V

GLAN1

GLAN2

VGA

SAS 4-7

Pres#4-7

Act#4-7

PCI-X 100MHz ZCR SXB-

PCI-X 133MHz

GLAN
CTRLR

JPL1

JPL2

VGA
CTRLR

SIMSO

COM2

®

DIMM 4B

DIMM 4A

DIMM 3B

DIMM 3A

DIMM 2B

DIMM 2A

DIMM 1B

DIMM 1A

C1

2

JI

PWR

3rd PWR
Fail

SMB

JPWF

JAR

CPU1

4-pin

8-pin PWR

PWR

20-pin ATX Main PWR

Ground

Fan1

Fan2

X

Power LED

FP Ctrl

Fan3

North Bridge

C2

2

JI

SAS
CTRLR

JPG1

JPS1

JP10

SMB

IPMB

JP11

Battery

SXB-

E2x8

S I/O

LE1

PWLED SPK

WOR

CPU2

E1x8

SXB-

E3x8

South
Bridge

USB4/5

J8

J4E3

WOL

USB2/3

SATA1

SATA0

JBT1

BIOS

Buzzer

SATA3

SATA2

JWF1

Pre#0-3

Act#0-3

SATA5

SATA4

JWD

JCF1

JP12

IDE1

Compact Flash

SGPIO1

SGPIO2

JOH1

SAS 1-3

JS10

Fan4

Fan5

J7

JL1

HDD LED

NIC1 LED

NIC2 LED

OH/Fan Fail LED

Floppy

PWR Fail LED

Ground

Ground

1920

NMI

X

Vcc

Vcc

Vcc

Vcc

Vcc

Vcc

Reset

Reset Button

A

Power Button

PWR

2

1

B

2-13

X7DBR-3/X7DBR-E User's Manual

2-5 Connecting Cables

ATX Power Connector

There are a 20-pin main power supply
connector(JPW1) and an 8-pin CPU
PWR connector (JPW3) on the moth­erboard. These power connectors
meet the SSI EPS 12V specifi cation.
The 4-pin 12V PWR supply is required
to provide adequate power to the sys­tem. See the table on the right for pin
defi nitions for connector (JPW1). For
the 8-pin PWR (JPW3), please refer
to the item listed below.

Processor Power Connector

In addition to the Primary ATX power
connector (above), the 12V 8-pin CPU
PWR connector at JPW3 must also
be connected to your power supply.
See the table on the right for pin
defi nitions.

3rd PWR
Fail

PWR
SMB

JAR

KB

MS

USB0/1

COM1

S

Bank4

Bank3

Bank2

Bank1

DIMM 4B

DIMM 4A

DIMM 3B

DIMM 3A

DIMM 2B

DIMM 2A

DIMM 1B

DIMM 1A

®

UPER X7DBR-3/E

JPWF

CPU1

ATX Power 20-pin Connector

Pin Defi nitions

Pin# Defi nition Pin # Defi nition
11 +3.3V 1 +3.3V
12 -12V 2 +3.3V
13 COM 3 COM
14 PS_ON 4 +5V
15 COM 5 COM
16 COM 6 +5V
17 COM 7 COM
18 Res (NC) 8 PWR_OK
19 +5V 9 5VSB
20 +5V 10 +12V

Required Connection

12V 4-pin Power Con-

Pin Defi nitions

Pins Defi nition
1 and 2 Ground
3 and 4 +12V

Required Connection

12V 8-pin Power CPU

Connector

Pin Defi nitions

Pins Defi nition

4-pin
PWR

C

20-pin ATX Main PWR

A

8-pin PWR

1 through 4 Ground

B

5 through 8 +12V

Fan1

Fan2

Fan3

A. ATX Main PWR
B. 8-pin Processor PWR

FP Ctrl

C. 4-pin PWR

nector

PXH-V

C2

C1

2

2

JI

GLAN1

GLAN2

VGA

SAS 4-7

Pres#4-7

Act#4-7

COM2

JPL1

GLAN
CTRLR

JPL2

JI

PCI-X 100MHz ZCR SXB-

PCI-X 133MHz

VGA
CTRLR

SIMSO

JP10

JP11

JPG1

SMB

IPMB

JPS1

SAS
CTRLR

Battery

North Bridge

SXB-

PWLED SPK

WOR

JWD

JCF1

JWF1

Pre#0-3

Act#0-3

SATA5

SATA4

Compact Flash

SGPIO2

JP12

JOH1

SAS 1-3

JS10

Fan4

IDE1

SGPIO1

JL1

Fan5

Floppy

J7

CPU2

E1x8

SXB-

E2x8

E3x8

South
Bridge

S I/O

USB4/5

LE1

J8
J4E3

WOL

USB2/3

JBT1

SATA1

SATA0

BIOS

Buzzer

SATA3

SATA2

2-14

Chapter 2: Installation

D

Universal Serial Bus (USB)

There are six USB 2.0 (Universal
Serial Bus) ports/headers on the
motherboard. Two of them are Back
Panel USB ports (USB#0/1:JUSB1),
and the other are Front Panel USB
headers (USB#2/3:JUSB2, USB#4/5:
JUSB3). See the tables on the right
for pin defi nitions.

Chassis Intrusion

A Chassis Intrusion header is located
at JL1. Attach the appropriate cable
from the chassis to inform you of a
chassis intrusion when the chassis is
opened.

Back Panel USB

(USB0/1)

Pin# Defi nitions
1 +5V
2 PO­3 PO+
4 Ground
5 N/A

Front Panel USB

Pin Defi nitions (USB 2/3/4/5)

USB 2/4
Pin # Defi nition

USB 3/5

Pin # Defi nition
1 +5V 1 +5V
2 Data- 2 Data­3 Data+ 3 Data+
4 Ground 4 Ground
5 Key 5 No connection

Chassis Intrusion

Pin Defi nitions (JL1)

Pin# Defi nition
1 Intrusion Input
2 Ground

KB

MS

USB0/1

COM1

GLAN1

GLAN2

Pres#4-7

Act#4-7

VGA

SAS 4-7

COM2

S

Bank4

A

Bank3

Bank2

Bank1

PXH-V

GLAN
CTRLR

JPL1

JPL2

VGA
CTRLR

DIMM 4B

DIMM 4A

DIMM 3B

DIMM 3A

DIMM 2B

DIMM 2A

DIMM 1B

DIMM 1A

C2

C1

2

2

JI

JI

PCI-X 100MHz ZCR SXB-

PCI-X 133MHz

JPG1

JPS1

JP10

SIMSO

JP11

SMB

IPMB

®

UPER X7DBR-3/E

SAS
CTRLR

Battery

3rd PWR
Fail

North Bridge

SXB-

PWLED SPK

WOR

PWR
SMB

JPWF

JAR

CPU1

CPU2

E1x8

SXB-

E2x8

E3x8

South
Bridge

S I/O

WOL

B

C

USB4/5

J8
J4E3

USB2/3

LE1

JBT1

SATA1

SATA0

4-pin
PWR

20-pin ATX Main PWR

BIOS

Buzzer

SATA5

SATA3

SATA2

8-pin PWR

JWD

JCF1

JWF1

SGPIO2

JP12

Pre#0-3

Act#0-3

SATA4

Fan1

Fan2

Fan3

Fan4

Fan5

IDE1

Compact Flash

SGPIO1

JOH1

J7

JL1

SAS 1-3

JS10

A. Backpanel USB 0-1
B. Front Panel USB 2-3
C. Front Panel USB 4
D. Chassis Intrusion

FP Ctrl

Floppy

2-15

X7DBR-3/X7DBR-E User's Manual

E

D

Fan Headers

The X7DBR-3/X7DBR-E has fi ve chassis/sys-
tem fan headers (Fan1 to Fan5.) See the table
on the right for pin defi nitions. (*The onboard
fan speeds are controlled by Thermal Man­agement via BIOS Hardware Monitor in the
Advanced Setting

(*Note: all these fans are 4-pin fan connec­tors. However, currently only 3-pin control is
supported. Pins 1-3 of the fan headers are
backward compatible with the traditional 3-pin
fans.)

. Note: Default: Disabled.)

Fan Header

Pin Defi nitions

Pin# Defi nition
1 Ground
2 +12V
3 Tachometer

KB

MS

USB0/1

COM1

GLAN1

GLAN2

SAS 4-7

Pres#4-7

Act#4-7

VGA

COM2

®

UPER X7DBR-3/E

JPL1

GLAN
CTRLR

JPL2

S

Bank4

Bank3

Bank2

Bank1

PXH-V

VGA
CTRLR

DIMM 4B

DIMM 4A

DIMM 3B

DIMM 3A

DIMM 2B

DIMM 2A

DIMM 1B

DIMM 1A

C2

C1

2

2

JI

JI

PCI-X 100MHz ZCR SXB-

PCI-X 133MHz

JPG1

JPS1

JP10

SIMSO

JP11

SMB

IPMB

SAS
CTRLR

Battery

3rd PWR
Fail

North Bridge

PWLED SPK

WOR

SXB-

PWR
SMB

JPWF

JAR

CPU1

CPU2

E1x8

SXB-

E2x8

E3x8

South
Bridge

S I/O

WOL

USB4/5

J8
J4E3

USB2/3

LE1

JBT1

SATA1

SATA0

BIOS

4-pin

8-pin PWR

PWR

20-pin ATX Main PWR

JWD

JCF1

JWF1

JP12

Pre#0-3

Act#0-3

Buzzer

SATA5

SATA3

SATA4

SATA2

IDE1

Compact Flash

SGPIO1

SGPIO2

JOH1

SAS 1-3

JS10

Fan1

Fan2

Fan3

Fan4

JL1

Fan5

J7

FP Ctrl

Floppy

A

B

C

A. Fan 1
B. Fan 2
C. Fan 3
D. Fan 4
E. Fan 5

2-16

Chapter 2: Installation

D

ATX PS/2 Keyboard and
PS/2 Mouse Ports

The ATX PS/2 keyboard and the PS/2
mouse ports are located at JKM and
JMS. See the table on the right for pin
defi nitions. (The mouse port is above
the keyboard port. See the table on
the right for pin defi nitions.)

Serial Ports

COM1 is a connector located on the
IO Backpanel and COM2 is a header
located at JCOM2. See the table on
the right for pin defi nitions.

PS/2 Keyboard and

Mouse Port Pin

Defi nitions

Pin# Defi nition
1 Data
2NC
3 Ground
4 VCC
5 Clock
6NC

Serial Port Pin Defi nitions

(COM1/COM2)

Pin # Defi nition Pin # Defi nition
1 CD 6 DSR
2RD 7RTS
3 TD 8 CTS
4 DTR 9 RI
5 Ground 10 NC

KB

MS

USB0/1

COM1

GLAN1

GLAN2

Pres#4-7

Act#4-7

A

B

C

VGA

SAS 4-7

COM2

®

UPER X7DBR-3/E

JPL1

GLAN
CTRLR

JPL2

S

Bank4

Bank3

Bank2

Bank1

PXH-V

VGA
CTRLR

DIMM 4B

DIMM 4A

DIMM 3B

DIMM 3A

DIMM 2B

DIMM 2A

DIMM 1B

DIMM 1A

C2

C1

2

2

JI

JI

PCI-X 100MHz ZCR SXB-

PCI-X 133MHz

JPG1

JPS1

JP10

SIMSO

JP11

SMB

IPMB

SAS
CTRLR

Battery

3rd PWR
Fail

North Bridge

SXB-

PWLED SPK

WOR

(Pin 10 is available on COM2
only. NC: No Connection.)

A. Keyboard

PWR
SMB

JPWF

JAR

CPU1

CPU2

E1x8

SXB-

E2x8

E3x8

South
Bridge

S I/O

WOL

USB4/5

J8
J4E3

USB2/3

LE1

JBT1

SATA1

SATA0

4-pin
PWR

20-pin ATX Main PWR

BIOS

Buzzer

SATA5

SATA3

SATA2

8-pin PWR

JWD

JCF1

JWF1

SGPIO2

JP12

Pre#0-3

Act#0-3

SATA4

Fan1

Fan2

Fan3

Fan4

Fan5

IDE1

Compact Flash

SGPIO1

JOH1

J7

JL1

SAS 1-3

JS10

B. Mouse
C. COM1
D. COM2

FP Ctrl

Floppy

2-17

X7DBR-3/X7DBR-E User's Manual

Wake-On-Ring

The Wake-On-Ring header is des­ignated JWOR. This function allows
your computer to receive and be
"awakened up" by an incoming call
to the modem when the system is in
the suspend state. See the table on
the right for pin defi nitions. You must
have a Wake-On-Ring card and cable
to use this feature.

Wake-On-LAN

The Wake-On-LAN header is located
at JWOL1 on the motherboard. See
the table on the right for pin defi ni-
tions. (You must also have a LAN
card with a Wake-On-LAN connector
and cable to use this feature.)

Wake-On-Ring
Pin Defi nitions

Pin# Defi nition
1 Ground
2 Wake-up

Wake-On-LAN

Pin Defi nitions

Pin# Defi nition
1 +5V Standby
2 Ground
3 Wake-up

KB

MS

USB0/1

COM1

GLAN1

GLAN2

SAS 4-7

Pres#4-7

Act#4-7

VGA

COM2

®

UPER X7DBR-3/E

JPL1

GLAN
CTRLR

JPL2

S

Bank4

Bank3

Bank2

Bank1

PXH-V

VGA
CTRLR

DIMM 4B

DIMM 4A

DIMM 3B

DIMM 3A

DIMM 2B

DIMM 2A

DIMM 1B

DIMM 1A

C2

C1

2

2

JI

JI

PCI-X 100MHz ZCR SXB-

PCI-X 133MHz

JPG1

JPS1

JP10

SIMSO

JP11

SMB

IPMB

SAS
CTRLR

Battery

3rd PWR
Fail

North Bridge

A

PWLED SPK

WOR

SXB-

A. WOR

PWR
SMB

JPWF

JAR

CPU1

CPU2

E1x8

SXB-

E2x8

E3x8

South
Bridge

S I/O

LE1

J8
J4E3

USB4/5

B

WOL

USB2/3

JBT1

SATA1

SATA0

BIOS

4-pin

8-pin PWR

PWR

20-pin ATX Main PWR

JWD

JCF1

JWF1

JP12

Pre#0-3

Act#0-3

Buzzer

SATA5

SATA3

SATA4

SATA2

IDE1

Compact Flash

SGPIO1

SGPIO2

JOH1

SAS 1-3

JS10

Fan1

Fan2

Fan3

Fan4

JL1

FP Ctrl

Fan5

Floppy

J7

B. WOL

2-18

GLAN 1/2 (Giga-bit Ethernet
Ports)

Two G-bit Ethernet ports are desig­nated JLAN1 and JLAN2 on the IO
backplane. This port accepts RJ45
type cables.

Power LED/Speaker

Chapter 2: Installation

GLAN1 GLAN2

On the JD1 header, pins 1-3 are for
a power LED and pins 4-7 are for the
speaker. See the table on the right
for speaker pin definitions. Note:
The speaker connector pins are for
use with an external speaker. If you
wish to use the onboard speaker, you
should close pins 6-7 with a jumper.

3rd PWR
Fail

North Bridge

PWR
SMB

JAR

KB

MS

USB0/1

COM1

S

Bank4

Bank3

Bank2

Bank1

PXH-V

DIMM 4B

DIMM 4A

DIMM 3B

DIMM 3A

DIMM 2B

DIMM 2A

DIMM 1B

DIMM 1A

®

UPER X7DBR-3/E

JPWF

CPU1

CPU2

Speaker Connector

Pin Setting Defi nition
Pins 6-7 Internal Speaker
Pins 4-7 External Speaker

4-pin

8-pin PWR

PWR

20-pin ATX Main PWR

Fan1

Fan2

FP Ctrl

Fan3

Fan4

A. GLAN1/2

B. PWR LED/Speaker

C2

C1

2

2

JI

GLAN1

GLAN2

VGA

SAS 4-7

Pres#4-7

Act#4-7

COM2

JPL1

A

GLAN
CTRLR

JPL2

JI

PCI-X 100MHz ZCR SXB-

PCI-X 133MHz

VGA
CTRLR

JPG1

JPS1

JP10

SIMSO

JP11

SMB

IPMB

SAS
CTRLR

Battery

WOR

SXB-

E2x8

S I/O

B

LE1

PWLED SPK

E1x8

J8
J4E3

SXB-

South
Bridge

E3x8

USB4/5

WOL

SATA1

USB2/3

2-19

JBT1

SATA0

BIOS

Buzzer

SATA3

SATA2

JWF1

Pre#0-3

Act#0-3

SATA5

SATA4

JWD

JCF1

JP12

SGPIO2

SAS 1-3

Fan5

IDE1

Compact Flash

SGPIO1

JOH1

J7

JL1

JS10

Floppy

X7DBR-3/X7DBR-E User's Manual

Power Fault (PWR Supply
Failure)

Connect a cable from your power
supply to the Power Failure header
(JPWF) to provide warnings in the
event of power supply failure. This
warning signal is passed through the
PWR_LED pin to indicate of a power
failure on the chassis. See the table
on the right for pin defi nitions.

Alarm Reset

PWR Supply Fail LED

Pin Defi nitions

Pin# Defi nition
1 PWR 1: Fail
2 PWR 2: Fail

3 PWR 3: Fail
4 Signal: Alarm Reset

Note: This feature is only available when using
Supermicro redundant power supplies.

If three power supplies are installed
and Alarm Reset (JAR) is enabled, the
system will notify you when any of the
three power modules fails. Connect
JAR to a micro-switch to enable you
to turn off the alarm that is activated
when a power module fails. See the
table on the right for pin defi nitions.

3rd PWR
Fail

North Bridge

PWR
SMB

JAR

B

KB

MS

USB0/1

COM1

S

Bank4

Bank3

Bank2

Bank1

PXH-V

DIMM 4B

DIMM 4A

DIMM 3B

DIMM 3A

DIMM 2B

DIMM 2A

DIMM 1B

DIMM 1A

®

UPER X7DBR-3/E

JPWF

Alarm Reset

Pin Setting Defi nition
Pin 1 Ground
Pin 2 +5V

4-pin

A

CPU1

CPU2

8-pin PWR

PWR

20-pin ATX Main PWR

Fan1

Fan2

Fan3

Fan4

A. Power Fault
B. Alarm Reset

FP Ctrl

C2

C1

2

2

JI

GLAN1

GLAN2

VGA

SAS 4-7

Pres#4-7

Act#4-7

COM2

JPL1

GLAN
CTRLR

JPL2

JI

PCI-X 100MHz ZCR SXB-

PCI-X 133MHz

VGA
CTRLR

SIMSO

JP10

JP11

JPG1

SMB

IPMB

JPS1

SAS
CTRLR

Battery

WOR

SXB-

E2x8

S I/O

LE1

PWLED SPK

E1x8

J8
J4E3

SXB-

South
Bridge

E3x8

USB4/5

WOL

USB2/3

2-20

JBT1

SATA1

SATA0

BIOS

Buzzer

SATA3

SATA2

JWD

JCF1

JWF1

Pre#0-3

Act#0-3

SATA5

SATA4

Compact Flash

SGPIO2

JP12

JOH1

SAS 1-3

JS10

IDE1

SGPIO1

JL1

Fan5

Floppy

J7

Chapter 2: Installation

Overheat LED/Fan Fail
(JOH1)

The JOH1 header is used to connect
an LED to provide warning of chassis
overheating. This LED will blink to in­dicate a fan failure. Refer to the table
on right for pin defi nitions.

SMB

A System Management Bus header
is located at J18. Connect the ap­propriate cable here to utilize SMB on
your system.

Overheat LED

Pin Defi nitions

Pin# Defi nition
1 5vDC
2 OH Active

OH/Fan Fail LED

State Message
Solid Overheat
Blinking Fan Fail

SMB Header

Pin Defi nitions

Pin# Defi nition
1 Data
2 Ground
3 Clock
4 No Connection

KB

MS

USB0/1

COM1

GLAN1

GLAN2

SAS 4-7

Pres#4-7

Act#4-7

VGA

COM2

®

UPER X7DBR-3/E

JPL1

GLAN
CTRLR

JPL2

S

Bank4

Bank3

Bank2

Bank1

PXH-V

VGA
CTRLR

DIMM 4B

DIMM 4A

DIMM 3B

DIMM 3A

DIMM 2B

DIMM 2A

DIMM 1B

DIMM 1A

C2

C1

2

2

JI

JI

PCI-X 100MHz ZCR SXB-

PCI-X 133MHz

JPG1

JPS1

JP10

SIMSO

JP11

SMB

IPMB

SAS
CTRLR

B

Battery

3rd PWR
Fail

North Bridge

SXB-

PWLED SPK

WOR

PWR
SMB

JAR

JPWF

CPU1

4-pin

8-pin PWR

PWR

20-pin ATX Main PWR

Fan1

Fan2

A. OH/Fan Fail LED
B. SMB Header

FP Ctrl

Fan3

JWF1

Pre#0-3

Act#0-3

SATA5

SATA4

JWD

JCF1

JP12

SGPIO2

SAS 1-3

Fan4

Fan5

IDE1

Compact Flash

SGPIO1

JOH1

J7

JL1

JS10

Floppy

A

CPU2

E1x8

SXB-

E2x8

E3x8

South
Bridge

S I/O

USB4/5

LE1

J8

J4E3

WOL

USB2/3

JBT1

SATA1

SATA0

BIOS

Buzzer

SATA3

SATA2

2-21

X7DBR-3/X7DBR-E User's Manual

Power SMB (I2 C) Connector

Power SMB (I2 C) Connector (J17)
monitors the status of PWR Supply,
Fan and system temperature. See the
table on the right for pin defi nitions.

VGA Connector

A VGA connector (JVGA1) is located
next to the GLAN2 port on the IO
backplane. Refer to the board layout

below for the location.

PWR SMB

Pin Defi nitions

Pin# Defi nition
1 Clock
2 Data

3 PWR Fail
4 Ground
5 +3.3V

KB

MS

USB0/1

COM1

GLAN1

GLAN2

SAS 4-7

Pres#4-7

Act#4-7

VGA

COM2

®

UPER X7DBR-3/E

Bank4

Bank3

Bank2

Bank1

GLAN

CTRLR

S

PXH-V

DIMM 4B

DIMM 4A

DIMM 3B

DIMM 3A

DIMM 2B

DIMM 2A

DIMM 1B

DIMM 1A

C2

C1

2

2

JI

JI

PCI-X 100MHz ZCR SXB-

PCI-X 133MHz

B

JPL1

JPL2

VGA
CTRLR

JPG1

JPS1

JP10

SIMSO

JP11

SMB

IPMB

SAS
CTRLR

Battery

3rd PWR
Fail

North Bridge

PWLED SPK

WOR

SXB-

A

PWR
SMB

JPWF

JAR

CPU1

CPU2

E1x8

SXB-

E2x8

E3x8

South
Bridge

S I/O

WOL

USB4/5

J8

J4E3

USB2/3

LE1

JBT1

SATA1

SATA0

BIOS

4-pin

8-pin PWR

PWR

20-pin ATX Main PWR

JWD

JCF1

JWF1

JP12

Pre#0-3

Act#0-3

Buzzer

SATA5

SATA3

SATA4

SATA2

IDE1

Compact Flash

SGPIO1

SGPIO2

JOH1

SAS 1-3

JS10

Fan1

Fan2

Fan3

Fan4

JL1

Fan5

J7

A. PWR SMB
B. VGA

FP Ctrl

Floppy

2-22

Compact Flash Card PWR
Connector

A Compact Flash Card Power
Connector is located at JWF1. For the
Compact Flash Card or the Compact
Flash Jumper (JCF1) to work properly ,
you will need to connect a power cable
to JWF1 fi rst. Refer to the board layout
below for the location.

Chapter 2: Installation

SGPIO Headers

There are two SGPIO (Serial General
Purpose Input/Output) headers (J29,
J30) located on the motherboard.
These headers support serial link
interfacing for the onboard ESB2 SA TA
connectors. See the table on the right
for pin defi nitions. Refer to the board
layout below for the location.

3rd PWR
Fail

PWR
SMB

KB

MS

USB0/1

COM1

S

Bank4

Bank3

Bank2

Bank1

DIMM 4B

DIMM 4A

DIMM 3B

DIMM 3A

DIMM 2B

DIMM 2A

DIMM 1B

DIMM 1A

®

UPER X7DBR-3/E

JAR

JPWF

SGPIO

Pin Defi nitions

Pin# Defi nition Pin Defi nition
1 *NC 2 *NC
3 Ground 4 Data

5 Load 6 Ground
7 *NC 8 *NC

*Note: NC= No Connections

A. Compact Flash PWR
Connector

B. SGPIO1
C. SGPIO2

FP Ctrl

CPU1

4-pin

8-pin PWR

PWR

20-pin ATX Main PWR

Fan1

Fan2

Fan3

PXH-V

C2

C1

2

2

JI

GLAN1

GLAN2

VGA

SAS 4-7

Pres#4-7

Act#4-7

COM2

JPL1

GLAN
CTRLR

JPL2

JI

PCI-X 100MHz ZCR SXB-

PCI-X 133MHz

VGA

CTRLR

SIMSO

JP10

JP11

JPG1

SMB

IPMB

JPS1

SAS
CTRLR

Battery

North Bridge

SXB-

PWLED SPK

WOR

JWF1

Pre#0-3

Act#0-3

SATA5

SATA4

JWD

JCF1

JP12

SGPIO2

SAS 1-3

Fan4

Fan5

IDE1

Compact Flash

SGPIO1

JOH1

J7

JL1

JS10

Floppy

B

CPU2

E1x8

SXB-

E2x8

E3x8

A

South
Bridge

S I/O

USB4/5

LE1

J8
J4E3

WOL

USB2/3

JBT1

SATA1

SATA0

BIOS

Buzzer

SATA3

SATA2

C

2-23

X7DBR-3/X7DBR-E User's Manual

Connector

Pins

Jumper

Cap

Setting

2-6 Jumper Settings

Explanation of
Jumpers

To modify the operation of the
motherboard, jumpers can be used
to choose between optional settings.
Jumpers create shorts between two
pins to change the function of the
connector. Pin 1 is identifi ed with a
square solder pad on the printed circuit
board. See the motherboard layout
pages for jumper locations.
Note: On two pin jumpers, "Closed"
means the jumper is on and "Open"

means the jumper is off the pins.

3 2 1

3 2 1

Pin 1-2 short

GLAN Enable/Disable

JPL1/JPL2 enable or disable the
GLAN Port1/GLAN Port2 on the
motherboard. See the table on the
right for jumper settings. The default
setting is enabled.

3rd PWR
Fail

North Bridge

PWLED SPK

WOR

SXB-

PWR
SMB

JAR

E1x8

E2x8

S I/O

LE1

J8
J4E3

KB

MS

USB0/1

COM1

GLAN1

GLAN2

A

SAS 4-7

Pres#4-7

Act#4-7

VGA

COM2

UPER X7DBR-3/E

S

Bank4

Bank3

Bank2

Bank1

PXH-V

GLAN
CTRLR

®

DIMM 4B

DIMM 4A

DIMM 3B

DIMM 3A

DIMM 2B

DIMM 2A

DIMM 1B

DIMM 1A

C2

C1

2

2

JI

JI

PCI-X 100MHz ZCR SXB-

PCI-X 133MHz

B

JPL1

JPL2

VGA
CTRLR

JPG1

JPS1

JP10

SIMSO

JP11

SMB

IPMB

SAS
CTRLR

Battery

SXB-

South
Bridge

JPWF

USB4/5

E3x8

CPU1

CPU2

WOL

USB2/3

JBT1

SATA1

SATA0

BIOS

4-pin

8-pin PWR

PWR

20-pin ATX Main PWR

JWD

JCF1

JWF1

JP12

Pre#0-3

Act#0-3

Buzzer

SATA5

SATA3

SATA4

SATA2

GLAN Enable

Pin# Defi nition
1-2 Enabled (*default)
2-3 Disabled

A. GLAN Port1 Enable
B. GLAN Port2 Enable

Fan1

Fan2

FP Ctrl

Fan3

Fan4

Fan5

IDE1

Compact Flash

Floppy

SGPIO1

SGPIO2

JOH1

J7

JL1

SAS 1-3

JS10

2-24

Chapter 2: Installation

CMOS Clear

JBT1 is used to clear CMOS. Instead of pins, this "jumper" consists of contact
pads to prevent the accidental clearing of CMOS. To clear CMOS, use a metal
object such as a small screwdriver to touch both pads at the same time to short
the connection. Always remove the AC power cord from the system before clear­ing CMOS. Note: For an ATX power supply, you must completely shut down the
system, remove the AC power cord and then short JBT1 to clear CMOS.

Watch Dog Enable/Disable

JWD all ow s yo u to en a bl e t he Watc h D o g t i m er.
Watch Dog is used for system monitoring. It can
cause the system to reboot when a software
applic ation ha ngs. Clo se Pins 1-2 to reset t he
system if an application hangs. Close Pins 2-3 to
generate a non-maskable interrupt signal for the
application that is hung up. See the table on the
right fo r jumper set tings. Watch Do g must also
be enabled in BIOS.

Watch Dog

Jumper Settings (JWD)

Jumper Setting Defi nition
Pins 1-2 Reset

(*default)
Pins 2-3 NMI
Open Disabled

Note: When enabled, the user needs to write
his/h er ow n ap pli c ati on s oftware in ord er to di s ­able the Watch Dog Timer.

3rd PWR
Fail

North Bridge

SXB-

PWLED SPK

WOR

PWR
SMB

JPWF

JAR

CPU1

CPU2

E1x8

SXB-

E2x8

E3x8

South
Bridge

JBT1

WOL

USB2/3

A

SATA1

SATA0

S I/O

USB4/5

LE1

J8

J4E3

KB

MS

USB0/1

COM1

GLAN1

GLAN2

Pres#4-7

Act#4-7

VGA

SAS 4-7

COM2

®

UPER X7DBR-3/E

JPL1

GLAN
CTRLR

JPL2

S

Bank4

Bank3

Bank2

Bank1

PXH-V

VGA
CTRLR

DIMM 4B

DIMM 4A

DIMM 3B

DIMM 3A

DIMM 2B

DIMM 2A

DIMM 1B

DIMM 1A

C2

C1

2

2

JI

JI

PCI-X 100MHz ZCR SXB-

PCI-X 133MHz

JPG1

JPS1

JP10

SIMSO

JP11

SMB

IPMB

SAS
CTRLR

Battery

4-pin
PWR

20-pin ATX Main PWR

B

BIOS

Buzzer

SATA5

SATA3

SATA2

8-pin PWR

JWD

JCF1

JWF1

SGPIO2

JP12

Pre#0-3

Act#0-3

SATA4

Fan1

Fan2

Fan3

Fan4

Fan5

IDE1

Compact Flash

SGPIO1

JOH1

J7

JL1

SAS 1-3

JS10

A. Clear CMOS
B. Watch Dog Enable

FP Ctrl

Floppy

2-25

X7DBR-3/X7DBR-E User's Manual

SAS Controller Enable/
Disable (*X7DBR-3 only)

JPS1 enables or disables the Adaptec
9410 SAS Controller on the mother­board. See the table on the right for
jumper settings. The default setting
is enabled.

SAS Controller Enable

Jumper Settings

Jumper Setting Defi nition
Pins 1-2 Enabled

(*default)

Pins 2-3 Disabled

KB

MS

USB0/1

COM1

GLAN1

GLAN2

SAS 4-7

Pres#4-7

Act#4-7

VGA

COM2

UPER X7DBR-3/E

S

®

DIMM 4B

Bank4

DIMM 4A

DIMM 3B

Bank3

DIMM 3A

DIMM 2B

Bank2

DIMM 2A

DIMM 1B

DIMM 1A

C2

C1

2

2

JI

JI

PCI-X 100MHz ZCR SXB-

PCI-X 133MHz

A

JPG1

JPS1

JP10

SIMSO

JP11

SMB

IPMB

JPL1

GLAN
CTRLR

JPL2

Bank1

PXH-V

VGA
CTRLR

SAS
CTRLR

Battery

3rd PWR
Fail

North Bridge

PWLED SPK

WOR

SXB-

PWR
SMB

JPWF

JAR

CPU1

CPU2

E1x8

SXB-

E2x8

E3x8

South
Bridge

S I/O

WOL

USB4/5

J8
J4E3

USB2/3

LE1

JBT1

SATA1

SATA0

BIOS

4-pin

8-pin PWR

PWR

20-pin ATX Main PWR

JWD

JCF1

JWF1

JP12

Pre#0-3

Act#0-3

Buzzer

SATA5

SATA3

SATA4

SATA2

IDE1

Compact Flash

SGPIO1

SGPIO2

JOH1

SAS 1-3

JS10

Fan1

Fan2

Fan3

Fan4

JL1

Fan5

J7

A. SAS Enable

FP Ctrl

Floppy

2-26

Chapter 2: Installation

3rd PWR Supply PWR Fault
Detect (J3P)

The system can notify you in the event
of a power supply failure. This feature is
available when three power supply units
are installed in the chassis with one act­ing as a backup. If you only have one
or two power supply units installed, you
should disable this (the default setting)
with J3P to prevent false alarms.

VGA Enable/Disable

JPG1 allows you to enable or disable the
VGA port. The default position is on pins
1 and 2 to enable VGA. See the table
on the right for jumper settings.

3rd PWR Supply PWR Fault

Jumper Settings

Jumper Setting Defi nition
Closed Enabled
Open Disabled (*Default)

VGA Enable/Disable

Jumper Settings (JPG1)

Both Jumpers Defi nition
*Pins 1-2 Enabled
Pins 2-3 Disabled

KB

MS

USB0/1

COM1

GLAN1

GLAN2

Pres#4-7

Act#4-7

VGA

SAS 4-7

COM2

®

UPER X7DBR-3/E

JPL1

GLAN
CTRLR

JPL2

S

Bank4

Bank3

Bank2

Bank1

PXH-V

VGA
CTRLR

DIMM 4B

DIMM 4A

DIMM 3B

DIMM 3A

DIMM 2B

DIMM 2A

DIMM 1B

DIMM 1A

C2

C1

2

2

JI

JI

PCI-X 100MHz ZCR SXB-

PCI-X 133MHz

B

JPG1

JPS1

JP10

SIMSO

JP11

SMB

IPMB

SAS
CTRLR

Battery

3rd PWR
Fail

North Bridge

SXB-

PWLED SPK

WOR

A

PWR
SMB

JPWF

JAR

CPU1

CPU2

E1x8

SXB-

E2x8

E3x8

South
Bridge

S I/O

WOL

USB4/5

J8

J4E3

USB2/3

LE1

JBT1

SATA1

SATA0

4-pin
PWR

20-pin ATX Main PWR

BIOS

Buzzer

SATA5

SATA3

SATA2

8-pin PWR

JWD

JCF1

JWF1

SGPIO2

JP12

Pre#0-3

Act#0-3

SATA4

Fan1

Fan2

Fan3

Fan4

Fan5

IDE1

Compact Flash

SGPIO1

JOH1

J7

JL1

SAS 1-3

JS10

FP Ctrl

Floppy

A. 3rd PWR Fail
B. VGA Enabled

2-27

X7DBR-3/X7DBR-E User's Manual

I2C Bus to PCI Slots 1/2

JI2C1/JI2C2 allow you to enable I2C
Bus to PCI-X/PCI-E slots. See the table
on the right for jumper settings. The
default setting is Disabled.

Compact Flash Master/Slave
Select

A Compact Flash Master (Primary)/Slave
(Secondary) Select Jumper is located
at JCF1. Close this jumper to enable
Compact Flash Card. For the Compact
Flash Card or the Compact Flash Jumper
(JCF1) to work properly , you will need to
connect the Compact Flash Card power
cable to JWF1 fi rst. Refer to the board
layout below for the location.

I2C Bus to PCI Slots

Jumper Settings

Jumper Defi nition
1-2 Enabled

2-3 Disabled (Default)

Compact Flash Card Master/

Slave Select

Jumper Defi nition
Off Slave (Secondary)
On Master (Primary)

KB

MS

USB0/1

COM1

GLAN1

GLAN2

Pres#4-7

Act#4-7

VGA

SAS 4-7

COM2

®

UPER X7DBR-3/E

JPL1

GLAN
CTRLR

JPL2

S

Bank4

Bank3

Bank2

Bank1

PXH-V

VGA
CTRLR

DIMM 4B

DIMM 4A

DIMM 3B

DIMM 3A

DIMM 2B

DIMM 2A

DIMM 1B

DIMM 1A

C2

C1

2

2

A

B

JI

JI

PCI-X 100MHz ZCR SXB-

PCI-X 133MHz

JPG1

JPS1

JP10

SIMSO

JP11

SMB

IPMB

SAS
CTRLR

Battery

3rd PWR
Fail

North Bridge

PWLED SPK

WOR

SXB-

PWR
SMB

JAR

JPWF

4-pin

8-pin PWR

PWR

20-pin ATX Main PWR

Fan1

A. JI2C1
B. JI2C2
C. Compact Flash Master/

JWF1

Pre#0-3

Act#0-3

SATA5

SATA4

JWD

JCF1

JP12

SGPIO2

SAS 1-3

Fan2

Fan3

Fan4

Fan5

IDE1

Compact Flash

SGPIO1

JOH1

J7

JL1

JS10

Slave Select

FP Ctrl

Floppy

CPU1

CPU2

E1x8

SXB-

E2x8

E3x8

C

South
Bridge

S I/O

USB4/5

LE1

J8
J4E3

WOL

USB2/3

JBT1

SATA1

SATA0

BIOS

Buzzer

SATA3

SATA2

2-28

Chapter 2: Installation

2-7 Onboard Indicators

GLAN LEDs

There are two GLAN ports on the moth­erboard. Each Gigabit Ethernet LAN port
has two LEDs. The green LED indicates
activity, while the power LED may be
green, amber or off to indicate the speed
of the connection. See the tables at right
for more information.

Link
LED

Activity
LED

Rear View (when viewing from the rear
side of the chassis)

GLAN Activity Indicator

LED Color Defi nition
Off No Activity
Blinking Active

GLAN Link Indicator

LED Color Defi nition
Off No Connection or 10 Mbps
Green 100 Mbps
Amber 1 Gbps

KB

MS

USB0/1

COM1

GLAN1

GLAN2

Pres#4-7

Act#4-7

A

B

VGA

SAS 4-7

COM2

®

UPER X7DBR-3/E

JPL1

GLAN
CTRLR

JPL2

S

Bank4

Bank3

Bank2

Bank1

PXH-V

VGA
CTRLR

DIMM 4B

DIMM 4A

DIMM 3B

DIMM 3A

DIMM 2B

DIMM 2A

DIMM 1B

DIMM 1A

C2

C1

2

2

JI

JI

PCI-X 100MHz ZCR SXB-

PCI-X 133MHz

JPG1

JPS1

JP10

SIMSO

JP11

SMB

IPMB

SAS
CTRLR

Battery

3rd PWR
Fail

North Bridge

SXB-

PWLED SPK

WOR

PWR
SMB

JPWF

JAR

CPU1

CPU2

E1x8

SXB-

E2x8

E3x8

South
Bridge

S I/O

WOL

USB4/5

J8

J4E3

USB2/3

LE1

JBT1

SATA1

SATA0

4-pin
PWR

20-pin ATX Main PWR

BIOS

Buzzer

SATA5

SATA3

SATA2

8-pin PWR

JWD

JCF1

JWF1

SGPIO2

JP12

Pre#0-3

Act#0-3

SATA4

Fan1

Fan2

Fan3

Fan4

Fan5

IDE1

Compact Flash

SGPIO1

JOH1

J7

JL1

SAS 1-3

JS10

A. GLAN Port1 LEDs
B. GLAN Port2 LEDs

FP Ctrl

Floppy

2-29

X7DBR-3/X7DBR-E User's Manual

Onboard SAS Activity LED
Indicators (*X7DBR-3 only)

There are eight Onboard SAS Activity
LED indicators (Act#0-3, Act#4-#7) and
eight Presence LED indicators (Pres#0-3,
Pres#4-#7) on the X7DBR-3. The Activ­ity LEDs indicate the activity status of
onboard SAS connectors. An Presence
LED indicates the presence of a SAS
connector. See the table on the right for
LED settings.

Onboard SAS_Activity_LED Indica-

tors (*Note: Act=Active)

Act# Defi nition Act# Defi nition
Act#0 SAS0:Act Act#4 SAS4:Act
Act#1 SAS1:Act Act#5 SAS5:Act

Act#2 SAS2:Act Act#6 SAS6:Act
Act#3 SAS3:Act Act#7 SAS7:Act

Onboard SAS_Presence_LED Indicators

(*Note: Pre=Present)

Pres# Defi nition Pres# Defi nition
Pre#0 SAS0:Pre. Pre#4 SAS4:Pre.
Pre#1 SAS1:Pre. Pre#5 SAS5:Pre.

Pre#2 SAS2:Pre. Pre#6 SAS6:Pre.
Pre#3 SAS3:Pre. Pre#7 SAS7:Pre.

KB

GLAN2

VGA

SAS 4-7

COM2

JPL1

B

GLAN
CTRLR

JPL2

Bank4

Bank3

Bank2

Bank1

MS

USB0/1

COM1

GLAN1

Pres#4-7

Act#4-7

Pres#4

UPER X7DBR-3/E

S

PXH-V

VGA
CTRLR

®

DIMM 4B

DIMM 4A

DIMM 3B

DIMM 3A

DIMM 2B

DIMM 2A

DIMM 1B

DIMM 1A

C2

C1

2

2

JI

JI

PCI-X 100MHz ZCR SXB-

PCI-X 133MHz

Battery

SAS
CTRLR

JPG1

JPS1

JP10

SIMSO

Pres#5

SMB

IPMB

JP11

Pres#6Pres#7

3rd PWR
Fail

North Bridge

PWLED SPK

WOR

SXB-

PWR
SMB

JPWF

JAR

CPU1

CPU2

E1x8

SXB-

E2x8

E3x8

South
Bridge

S I/O

WOL

USB4/5

J8
J4E3

USB2/3

LE1

4-pin
PWR

20-pin ATX Main PWR

BIOS

JBT1

Buzzer

SATA1

SATA3

SATA2

SATA0

Pres#0

8-pin PWR

JWD

JCF1

JWF1

JP12

Pre#0-3

Act#0-3

SATA5

SATA4

Fan1

Fan2

FP Ctrl

Fan3

Fan4

Fan5

IDE1

Compact Flash

Floppy

SGPIO1

SGPIO2

JOH1

J7

JL1

A

SAS 1-3

JS10

Pres#1

A. SAS LEDs (#0-#3)
B. SAS LEDs (#4-#7)

Pres#2Pres#3

Act#4

Act#5

Act#6

Act#7

2-30

Act#0

Act#1

Act#2

Act#3

Chapter 2: Installation

2-8 Floppy Drive, Hard Disk Drive, SIMSO-DIMM IPMI,
Zero Channel RAID Card and SAS Connections

Note the following when connecting the fl oppy and hard disk drive cables:

• The fl oppy disk drive cable has seven twisted wires.

• A red mark on a wire typically designates the location of pin 1.

• A single fl oppy disk drive ribbon cable has two connectors to provide for two
fl oppy disk drives. The connector with twisted wires always connects to drive
A, and the connector that does not have twisted wires always connects to drive
B.

Floppy Connector

The fl oppy connector is located at
J22. See the table below for pin
defi nitions.

KB

MS

USB0/1

COM1

®

UPER X7DBR-3/E

S

DIMM 4B

DIMM 4A

Bank4

DIMM 3B

DIMM 3A

Bank3

DIMM 2B

DIMM 2A

Bank2

DIMM 1B

DIMM 1A

Bank1

3rd PWR
Fail

PWR
SMB

JPWF

JAR

CPU1

4-pin
PWR

8-pin PWR

20-pin ATX Main PWR

Floppy Drive Connector

Pin Defi nitions (Floppy)

Pin# Defi nition Pin # Defi nition
1 Ground 2 FDHDIN
3 Ground 4 Reserved
5 Key 6 FDEDIN
7 Ground 8 Index
9 Ground 10 Motor Enable
11 Ground 12 Drive Select B
13 Ground 14 Drive Select B
15 Ground 16 Motor Enable
17 Ground 18 DIR
19 Ground 20 STEP
21 Ground 22 Write Data
23 Ground 24 Write Gate
25 Ground 26 Track 00
27 Ground 28 Write Protect
29 Ground 30 Read Data

Fan1

Fan2

FP Ctrl

Fan3

31 Ground 32 Side 1 Select
33 Ground 34 Diskette

North Bridge

SXB-

Battery

SAS
CTRLR

JPS1

PWLED SPK

WOR

GLAN1

GLAN2

SAS 4-7

Pres#4-7

Act#4-7

PXH-V

PCI-X 100MHz ZCR SXB-

PCI-X 133MHz

GLAN
CTRLR

VGA

JPL1

JPL2

VGA
CTRLR

SIMSO

COM2

C2

C1

2

2

JI

JI

JPG1

JP10

SMB

IPMB

JP11

JWF1

Pre#0-3

Act#0-3

SATA5

SATA4

JWD

JCF1

JP12

Compact Flash

SGPIO2

JOH1

SAS 1-3

JS10

IDE1

SGPIO1

Fan4

Fan5

A

Floppy

J7

JL1

A. Floppy Port

CPU2

E1x8

SXB-

E2x8

E3x8

South
Bridge

S I/O

USB4/5

LE1

J8
J4E3

WOL

USB2/3

SATA1

SATA0

BIOS

JBT1

Buzzer

SATA3

SATA2

2-31

X7DBR-3/X7DBR-E User's Manual

SIMSO Slot

There is a SIM SO-DIMM IPMI
Slot on the motherboard. Refer
to the layout below for the
location of SIMSO slot.

KB

MS

USB0/1

COM1

GLAN1

GLAN2

SAS 4-7

Pres#4-7

Act#4-7

VGA

COM2

UPER X7DBR-3/E

S

®

DIMM 4B

Bank4

DIMM 4A

DIMM 3B

Bank3

DIMM 3A

DIMM 2B

Bank2

DIMM 2A

DIMM 1B

DIMM 1A

C2

C1

2

2

JI

JI

PCI-X 100MHz ZCR SXB-

PCI-X 133MHz

A

SIMSO

JP10

JP11

JPG1

SMB

IPMB

JPS1

JPL1

GLAN
CTRLR

JPL2

Bank1

PXH-V

VGA
CTRLR

SAS
CTRLR

Battery

3rd PWR
Fail

North Bridge

PWLED SPK

WOR

SXB-

PWR
SMB

JAR

JPWF

CPU1

4-pin

8-pin PWR

PWR

20-pin ATX Main PWR

Fan1

Fan2

A. SIMSO Slot

FP Ctrl

Fan3

JWF1

Pre#0-3

Act#0-3

SATA5

SATA4

JWD

JCF1

JP12

SGPIO2

SAS 1-3

Fan4

Fan5

IDE1

Compact Flash

Floppy

SGPIO1

JOH1

J7

JL1

JS10

CPU2

E1x8

SXB-

E2x8

E3x8

South
Bridge

S I/O

USB4/5

LE1

J8
J4E3

WOL

USB2/3

JBT1

SATA1

SATA0

BIOS

Buzzer

SATA3

SATA2

2-32

Chapter 2: Installation

IDE Connectors

There are two IDE Connectors (JIDE1:
Blue, JIDE2: White) on the mother­board. The blue IDE connector (JIDE1)
is designated as the Primary IDE Drive.
The white IDE connector (JIDE2) is des­ignated as the Secondary IDE Drive,
reserved for Compact Flash Card use
only. (See the note below.) See the
table on the right for pin defi nitions.

*Note: JIDE2 (the white slot) is reserved
for Compact Flash Card only. Do not
use it for other devices. If JIDE2 is
populated with a Compact Flash Card,
JIDE1 (the blue slot) will be available for
one device only . For the Compact Flash
Card to work properly, you will need to
connect a power cable to JWF1 fi rst.

IDE Drive Connectors

Pin Defi nitions

Pin# Defi nition Pin # Defi nition
1 Reset IDE 2 Ground
3 Host Data 7 4 Host Data 8
5 Host Data 6 6 Host Data 9
7 Host Data 5 8 Host Data 10
9 Host Data 4 10 Host Data 11
11 Host Data 3 12 Host Data 12
13 Host Data 2 14 Host Data 13
15 Host Data 1 16 Host Data 14
17 Host Data 0 18 Host Data 15
19 Ground 20 Key
21 DRQ3 22 Ground
23 I/O Write 24 Ground
25 I/O Read 26 Ground
27 IOCHRDY 28 BALE
29 DACK3 30 Ground
31 IRQ14 32 IOCS16
33 Addr1 34 Ground
35 Addr0 36 Addr2
37 Chip Select 0 38 Chip Select 1
39 Activity 40 Ground

KB

MS

USB0/1

COM1

GLAN1

GLAN2

SAS 4-7

Pres#4-7

Act#4-7

VGA

COM2

®

UPER X7DBR-3/E

JPL1

GLAN
CTRLR

JPL2

S

Bank4

Bank3

Bank2

Bank1

PXH-V

VGA
CTRLR

DIMM 4B

DIMM 4A

DIMM 3B

DIMM 3A

DIMM 2B

DIMM 2A

DIMM 1B

DIMM 1A

C2

C1

2

2

JI

JI

PCI-X 100MHz ZCR SXB-

PCI-X 133MHz

SAS
CTRLR

JPG1

JPS1

JP10

SIMSO

JP11

SMB

IPMB

Battery

3rd PWR
Fail

North Bridge

SXB-

PWLED SPK

WOR

PWR
SMB

JPWF

JAR

CPU1

CPU2

E1x8

SXB-

E2x8

E3x8

South
Bridge

S I/O

WOL

USB4/5

J8

J4E3

USB2/3

LE1

JBT1

SATA1

SATA0

BIOS

4-pin

8-pin PWR

PWR

20-pin ATX Main PWR

B

JWD

JCF1

JWF1

JP12

Pre#0-3

Act#0-3

Buzzer

SATA5

SATA3

SATA4

SATA2

A

IDE1

Compact Flash

SGPIO1

SGPIO2

JOH1

SAS 1-3

JS10

Fan1

A. IDE#1

Fan2

B. Compact Flash Card

FP Ctrl

Fan3

Fan4

Fan5

Floppy

J7

JL1

2-33

X7DBR-3/X7DBR-E User's Manual

SAS Connectors
(*X7DBR-3 only)

There are eight Serial Attached
SCSI (SAS#0-#3, SAS#4-#7)
on the motherboard. See
the tables on the right for pin
defi nitions.

SAS Connector

Pin Defi nitions

Pin# Defi nition Pin # Defi nition
A1 Ground B1 Ground
A2 RX 0+ B2 TX 0+
A3 RX 0- B3 TX 0­A4 Ground B4 Ground
A5 RX 1+ B5 TX 1+
A6 RX 1- B6 TX 1­A7 Ground B7 Ground
A8 SB7 B8 SB0
A9 SB3 B9 SB1
A10 SB4 B10 SB2
A11 SB5 B11 SB6
A12 Ground B12 Ground
A13 RX 2+ B13 TX 2+
A14 RX 2- B14 TX 2­A15 Ground B15 Ground
A16 RX 3+ B16 TX 3+
A17 RX 3- B17 TX 3­A18 Ground B18 Ground

KB

MS

USB0/1

COM1

GLAN1

GLAN2

SAS 4-7

Pres#4-7

Act#4-7

VGA

B

COM2

UPER X7DBR-3/E

S

Bank4

Bank3

Bank2

Bank1

PXH-V

GLAN
CTRLR

JPL1

JPL2

VGA
CTRLR

®

DIMM 4B

DIMM 4A

DIMM 3B

DIMM 3A

DIMM 2B

DIMM 2A

DIMM 1B

DIMM 1A

C2

C1

2

2

JI

JI

PCI-X 100MHz ZCR SXB-

PCI-X 133MHz

JPG1

JPS1

JP10

SIMSO

JP11

SMB

IPMB

SAS
CTRLR

Battery

3rd PWR
Fail

North Bridge

PWLED SPK

WOR

SXB-

PWR
SMB

JPWF

JAR

CPU1

CPU2

E1x8

SXB-

E2x8

E3x8

South
Bridge

S I/O

WOL

USB4/5

J8
J4E3

USB2/3

LE1

JBT1

SATA1

SATA0

BIOS

4-pin

8-pin PWR

PWR

20-pin ATX Main PWR

JWD

JCF1

JWF1

JP12

Pre#0-3

Act#0-3

Buzzer

A

SATA5

SATA3

SATA4

SATA2

IDE1

Compact Flash

SGPIO1

SGPIO2

JOH1

SAS 1-3

JS10

Fan1

Fan2

Fan3

Fan4

JL1

A. SAS #0-#3
B. SAS #4-#7

FP Ctrl

Fan5

Floppy

J7

2-34

Chapter 3: Troubleshooting

Chapter 3

Troubleshooting

3-1 Troubleshooting Procedures

Use the following procedures to troubleshoot your system. If you have followed all
of the procedures below and still need assistance, refer to the ‘Technical Support
Procedures’ and/or ‘Returning Merchandise for Service’ section(s) in this chapter.

Note: Always disconnect the power cord before adding, changing or installing

any hardware components.

Before Power On

1. Make sure that there are no short circuits between the motherboard and chas-

sis.

2. Disconnect all ribbon/wire cables from the motherboard, including those for the

keyboard and mouse.

3. Remove all add-on cards.

4. Install one CPU (making sure it is fully seated) and connect the chassis speaker

and the power LED to the motherboard. (Check all jumper settings as well.)

5. Use only the correct type of CMOS onboard battery as recommended by the

Manufacturer. Do not install the onboard battery upside down to avoid pos­sible explosion.

No Power

1. Make sure that there are no short circuits between the motherboard and chas-

sis.

2. Verify that all jumpers are set to their default positions.

3. Check that the 115V/230V switch on the power supply is properly set.

4. Turn the power switch on and off to test the system.

5. The battery on your motherboard may be old. Check to verify that it still supplies

~3VDC. If it does not, replace it with a new one.

No Video

1. If the power is on but you have no video, remove all the add-on cards and

memory modules.

2. Use the speaker to determine if any beep codes exist. Refer to the Appendix

for details on beep codes.

Losing the System’s Setup Confi guration

1. Ensure that you are using a high quality power supply. A poor quality power

supply may cause the system to lose the CMOS setup information. Refer to
Section 1-6 for details on recommended power supplies.

3-1

X7DBR-3/X7DBR-E User's Manual

2. The battery on your motherboard may be old. Check to verify that it still supplies
~3VDC. If it does not, replace it with a new one.

3. If the above steps do not fi x the Setup Confi guration problem, contact your
vendor for repairs.

NOTE

If you are a system integrator, VAR or OEM, a POST diagnostics

card is recommended. For I/O port 80h codes, refer to App. B.

Memory Errors

1. Make sure the DIMM modules are properly and fully installed.

2. Determine if different speeds of DIMMs have been installed and verify that the
BIOS setup is confi gured for the fastest speed of RAM used. It is recom-
mended to use the same RAM speed for all DIMMs in the system.

3. Make sure you are using the correct type of DDR2 FBD (Fully Buffered) ECC
533/667 SDRAM (*recommended by the manufacturer.)

4. Check for bad DIMM modules or slots by swapping a single module between
four slots and noting the results.

5. Make sure all memory modules are fully seated in their slots. To install memory
modules, begin with Branch 1, then Branch 2, and so on (see Page 2-6).

3-2 Technical Support Procedures

Before contacting Technical Support, please take the following steps. Also, note
that as a motherboard manufacturer, Super Micro does not sell directly to end-us­ers, so it is best to fi rst check with your distributor or reseller for troubleshooting
services. They should know of any possible problem(s) with the specifi c system
confi guration that was sold to you.

1. Please go through the ‘Troubleshooting Procedures’ and 'Frequently Asked
Question' (FAQ) sections in this chapter or see the FAQs on our web site
(http://www.supermicro.com/TECHSUPPORT/techsupport.htm) before con­tacting Technical Support.

2. BIOS upgrades can be downloaded from our web site at
http://www.supermicro.com/techsupport/download.htm.

Note: Not all BIOS can be fl ashed depending on the modifi cations to the boot
block code.

3. If you still cannot resolve the problem, include the following information when

3-2

Chapter 3: Troubleshooting

contacting Super Micro for technical support:

• Motherboard model and PCB revision number

• BIOS release date/version (this can be seen on the initial display when your
system fi rst boots up)

•System confi guration

An example of a Technical Support form is on our web site at
http://www.supermicro.com/techsupport/contact_support.htm.

4. Distributors: For immediate assistance, please have your account number ready
when placing a call to our technical support department. We can be reached
by e-mail at [e-mail] or by fax at: [phone], option

2.

3-3 Frequently Asked Questions

Question: What are the various types of memory that my motherboard can

support?

Answer: The X7DBR-3/X7DBR-E has eight 240-pin DIMM slots that support DDR2

FBD ECC 533/667 SDRAM modules. It is strongly recommended that you do not
mix memory modules of different speeds and sizes.

Question: How do I update my BIOS?

It is recommended that you do not upgrade your BIOS if you are not experiencing
any problems with your system. Updated BIOS fi les are located on our web site at
http://www.supermicro.com/support/bios/. Please check our BIOS warning message
and the information on how to update your BIOS on our web site. Select your moth­erboard model and download the BIOS fi le to your computer. Also, check the current
BIOS revision and make sure that it is newer than your BIOS before downloading.
You can choose from the zip fi le and the .exe fi le. If you choose the zip BIOS fi le,
please unzip the BIOS fi le onto a bootable device or a USB pen. Run the batch fi le
using the format fl ash.bat fi lename.rom from your bootable device or USB pen to

fl ash the BIOS. Then, your system will automatically reboot. If you choose the .exe
fi le, please run the .exe fi le under Windows to create the BIOS fl ash fl oppy disk.

Insert the fl oppy disk into the system you wish to fl ash the BIOS. Then, bootup the
system to the fl oppy disk. The BIOS utility will automatically fl ash the BIOS without
any prompts. Please note that this process may take a few minutes to complete.
Do not be concerned if the screen is paused for a few minutes.

(
prevent possible system boot failure!)

Question: What's on the CD that came with my motherboard?
Answer: The supplied compact disc has quite a few drivers and programs that will

greatly enhance your system. We recommend that you review the CD and install the

*Warning: Do not shut down or reset the system while updating BIOS to

3-3

X7DBR-3/X7DBR-E User's Manual

applications you need. Applications on the CD include chipset drivers for Windows
and security and audio drivers.

3-4 Returning Merchandise for Service

A receipt or copy of your invoice marked with the date of purchase is required be­fore any warranty service will be rendered. You can obtain service by calling your
vendor for a Returned Merchandise Authorization (RMA) number. When returning
to the manufacturer, the RMA number should be prominently displayed on the
outside of the shipping carton, and mailed prepaid or hand-carried. Shipping and
handling charges will be applied for all orders that must be mailed when service
is complete.

This warranty only covers normal consumer use and does not cover damages in­curred in shipping or from failure due to the alternation, misuse, abuse or improper
maintenance of products.

During the warranty period, contact your distributor fi rst for any product problems.

3-4

Chapter 4: BIOS

Chapter 4
BIOS

4-1 Introduction

This chapter describes the Phoenix BIOS™ Setup utility for the X7DBR-3/X7DBR-E.
The Phoenix ROM BIOS is stored in a fl ash chip and can be easily upgraded using
a fl oppy disk-based program.

Note: Due to periodic changes to the BIOS, some settings may have been added or
deleted and might not yet be recorded in this manual. Please refer to the Manual
Download area of the Supermicro web site <

bios/> for any changes to the BIOS that may not be refl ected in this manual.

System BIOS

http://www.supermicro.com/support/

The BIOS is the Basic Input Output System used in all IBM® PC, XT™, AT®, and

®

PS/2

compatible computers. The Phoenix BIOS stores the system parameters,
types of disk drives, video displays, etc. in the CMOS. The CMOS memory requires
very little electrical power. When the computer is turned off, a backup battery pro­vides power to the CMOS Logic, enabling it to retain system parameters. Each time
when the computer is powered on, the computer is confi gured with the values stored
in the CMOS Logic by the system BIOS, which gains control at boot up.

How To Change the Confi guration Data

The CMOS information that determines the system parameters may be changed by
entering the BIOS Setup utility. This Setup utility can be accessed by pressing the
<Delete> key at the appropriate time during system boot. (See below.)

Starting the Setup Utility

Normally , the only visible POST (Power On Self Test) routine is the memory test. As
the memory is being tested, press the <Delete> key to enter the main menu of the
BIOS Setup utility. From the main menu, you can access the other setup screens,
such as the Security and Power menus. Beginning with Section 4-3, detailed de­scriptions are given for each parameter setting in the Setup utility.

Warning: Do not shut down or reset the system while updating BIOS

to prevent possible boot failure.

4-1

X7DBR-3/X7DBR-E User's Manual

4-2 Running Setup

*Default settings are in bold text unless otherwise noted.

The BIOS setup options described in this section are selected by choosing
the appropriate text from the main BIOS Setup screen. All displayed text is
described in this section, although the screen display is often all you need to
understand how to set the options (see next page).

When you fi rst power on the computer, the Phoenix BIOS™ is immediately acti-
vated.

While the BIOS is in control, the Setup program can be activated in one of two
ways:

1. By pressing <Delete> immediately after turning the system on, or

2. When the message shown below appears briefl y at the bottom of the screen
during the POST (Power On Self-Test), press the <Delete> key to activate the
main Setup menu:

Press the <Delete> key to enter Setup

4-3 Main BIOS Setup

All main Setup options are described in this section. The main BIOS Setup screen
is displayed below.

Use the Up/Down arrow keys to move among the different settings in each menu.
Use the Left/Right arrow keys to change the options for each setting.

Press the <Esc> key to exit the CMOS Setup Menu. The next section describes in
detail how to navigate through the menus.

Items that use submenus are indicated with the
press the <Enter> key to access the submenu.

 icon. With the item highlighted,

4-2

Main BIOS Setup Menu

Chapter 4: BIOS

Main Setup Features

System Time

To set the system date and time, key in the correct information in the appropriate
fi elds. Then press the <Enter> key to save the data.

System Date

Using the arrow keys, highlight the month, day and year fi elds, and enter the correct
data. Press the <Enter> key to save the data.

BIOS Date

This fi eld displays the date when this version of BIOS was built.

Legacy Diskette A

This setting allows the user to set the type of fl oppy disk drive installed as diskette A.
The options are Disabled, 360Kb 5.25 in, 1.2MB 5.25 in, 720Kb 3.5 in, 1.44/1.25MB,

3.5 in and 2.88MB 3.5 in.

4-3

X7DBR-3/X7DBR-E User's Manual

IDE Channel 0 Master/Slave, IDE Channel 1 Master/Slave, SATA
Port2 and SATA Port3

These settings allow the user to set the parameters of IDE Channel 0 Master/
Slave, IDE Channel 1 Master/Slave, IDE Channel 2 Master, IDE Channel 3

Master slots. Hit <Enter> to activate the following sub-menu screen for detailed
options of these items. Set the correct confi gurations accordingly. The items
included in the sub-menu are:

Type

This option allows the user to selects the type of IDE hard drive. The option
Auto will allow the BIOS to automatically confi gure the parameters of the
HDD installed at the connection. Enter a number between 1 to 39 to select a
predetermined HDD type. Select User to allow the user to enter the parameters
of the HDD installed. Select CDROM if a CDROM drive is installed. Select ATAPI
if a removable disk drive is installed.

Multi-Sector Transfers

This item allows the user to specify the number of sectors per block to be
used in multi-sector transfer. The options are Disabled, 4 Sectors, 8 Sectors,
and 16 Sectors.

LBA Mode Control

This item determines whether the Phoenix BIOS will access the IDE Channel 0
Master Device via the LBA mode. The options are Enabled and Disabled.

32 Bit I/O

This option allows the user to enable or disable the function of 32-bit data transfer.
The options are Enabled and Disabled.

Transfer Mode

This option allows the user to set the transfer mode. The options are Standard,
Fast PIO1, Fast PIO2, Fast PIO3, Fast PIO4, FPIO3/DMA1 and FPIO4/DMA2.

Ultra DMA Mode

This option allows the user to select Ultra DMA Mode. The options are Disabled,
Mode 0, Mode 1, Mode 2, Mode 3, Mode 4, and Mode 5.

4-4

Chapter 4: BIOS

Parallel ATA

This setting allows the user to enable or disable the function of Parallel ATA. The
options are Channel 0 and Channel 1.

Serial ATA

This setting allows the user to enable or disable the function of Serial ATA. The
options are Disabled and Enabled.

Native Mode Operation

Select the native mode for ATA. The options are: Serial ATA, Both, and

Auto.

SATA Controller Mode

Select Compatible to allow the SATA and PATA drives to be automatically-detected
and be placed in the Legacy Mode by the BIOS. Select Enhanced to allow the
SATA and PATA drives to be to be automatically-detected and be placed in the
Native IDE Mode. (*Note: The Enhanced mode is supported by the Windows

2000 OS or a later version.)

When the SATA Controller Mode is set to "Enhanced", the following items will
display:

Serial ATA (SATA) RAID Enable

Select Enable to enable Serial ATA RAID Functions. (*For the Windows OS
environment, use the RAID driver if this feature is set to Enabled. When this item
is set to Enabled, the item: "ICH RAID Code Base" will be available for you to select
either Intel or Adaptec Host RAID fi rmware. If this item is set to Disabled, the item-
SATA AHCI Enable will be available.) The options are Enabled and Disabled.

ICH RAID Code Base

Select Intel to enable Intel's SATA RAID fi rmware. Select Adaptec to use Adaptec's
HostRAID fi rmware. The options are Intel and Adaptec.

SATA AHCI

Select Enable to enable the function of Serial ATA Advanced Host Interface. (*Take
caution when using this function. This feature is for advanced programmers only.
The options are Enabled and Disabled.)

4-5

X7DBR-3/X7DBR-E User's Manual

System Memory

This display informs you how much system memory is recognized as being present
in the system.

Extended Memory

This display informs you how much extended memory is recognized as being
present in the system.

4-4 Advanced Setup

Choose Advanced from the Phoenix BIOS Setup Utility main menu with the arrow keys.
Y ou should see the following display. The items with a triangle beside them have sub
menus that can be accessed by highlighting the item and pressing <Enter>.

4-6

Chapter 4: BIOS

Boot Features

Access the submenu to make changes to the following settings.

QuickBoot Mode

If enabled, this feature will speed up the POST (Power On Self Test) routine by
skipping certain tests after the computer is turned on. The settings are Enabled
and Disabled. If Disabled, the POST routine will run at normal speed.

QuietBoot Mode

This setting allows you to Enable or Disable the graphic logo screen during
boot-up.

POST Errors

Set to Enabled to display POST Error Messages if an error occurs during bootup.
If set to Disabled, the system will continue to boot without displaying any error
messages even when a boot error occurs.

ACPI Mode

Use the setting to determine if you want to employ ACPI (Advanced Confi guration
and Power Interface) power management on your system. The options are

Yes and No.

Power Button Behavior

If set to Instant-Off, the system will power off immediately as soon as the user
hits the power button. If set to 4-sec., the system will power off when the user
presses the power button for 4 seconds or longer. The options are instant-off
and 4-sec override.

Resume On Modem Ring

Select On to “wake your system up” when an incoming call is received by
your modem. The options are On and Off.

Power Loss Control

This setting allows you to choose how the system will react when power returns
after an unexpected loss of power. The options are Stay Off, Power On, and

Last State.

Watch Dog

If enabled, this option will automatically reset the system if the system is not
active for more than 5 minutes. The options are Enabled and Disabled.

Summary Screen

This setting allows you to Enable or Disable the summary screen which displays
the system confi guration during bootup.

4-7

X7DBR-3/X7DBR-E User's Manual

Memory Cache

Cache System BIOS Area

This setting allows you to designate a reserve area in the system memory to be
used as a System BIOS buffer to allow the BIOS to write (cache) data into this
reserved memory area. Select "Write Protect" to enable this function, and this
area will be reserved for BIOS ROM access only. Select "Uncached" to disable this
function and make this area available for other devices.

Cache Video BIOS Area

This setting allows you to designate a reserve area in the system memory to be
used as a Video BIOS buffer to allow the BIOS to write (cache) data into this
reserved memory area. Select Write Protect to enable the function and this area
will be reserved for Video BIOS ROM access only. Select Uncached to disable this
function and make this area available for other devices.

Cache Base 0-512K

If enabled, this feature will allow the data stored in the base memory area: block
0-512K to be cached (written) into a buffer, a storage area in the Static DROM
(SDROM) or to be written into L1, L2 cache inside the CPU to speed up CPU
operations. Select Uncached to disable this function. Select Write Through to
allow data to be cached into the buffer and written into the system memory at the
same time. Select Write Protect to prevent data from being written into the base
memory area of Block 0-512K. Select Write Back to allow the CPU to write data
back directly from the buffer without writing data to the System Memory for fast
CPU data processing and operation. The options are Uncached, Write Through,
Write Protect, and Write Back.

Cache Base 512K-640K

If enabled, this feature will allow the data stored in the memory area: 512K-640K
to be cached (written) into a buffer, a storage area in the Static DROM (SDROM)
or written into L1, L2, L3 cache inside the CPU to speed up CPU operations.
Select Uncached to disable this function. Select Write Through to allow data to
be cached into the buffer and written into the system memory at the same time.
Select Write Protect to prevent data from being written into the base memory area
of Block 512-640K. Select Write Back to allow CPU to write data back directly from
the buffer without writing data to the System Memory for fast CPU data processing
and operation. The options are Uncached, Write Through, Write Protect, and

Write Back.

Cache Extended Memory

If enabled, this feature will allow the data stored in the extended memory area to
be cached (written) into a buffer, a storage area in the Static DROM (SDROM) or
written into L1, L2, L3 cache inside the CPU to speed up CPU operations. Select

4-8

Chapter 4: BIOS

Uncached to disable this function. Select Write Through to allow data to be cached
into the buffer and written into the system memory at the same time. Select Write
Protect to prevent data from being written into the extended memory area above 1
MB. Select Write Back to allow CPU to write data back directly from the buffer without
writing data to the System Memory for fast CPU data processing and operation.
The options are Uncached, Write Through, Write Protect, and Write Back.

Discrete MTRR Allocation

If enabled, MTRRs (-Memory Type Range Registers) are confi gured as distinct,
separate units and cannot be overlapped. If enabled, the user can achieve better
graphic effects when using a Linux graphic driver that requires the write-combining
confi guration with 4GB or more memory. The options are Enabled and Disabled.

PCI Confi guration

Access the submenu to make changes to the following settings for PCI devices.

Onboard GLAN1/Onboard GLAN2 (Gigabit- LAN) OPROM Confi gure

Enabling this option provides the capability to boot from GLAN. The options are

Disabled and Enabled.

Onboard SAS OPROM Confi gure (*X7DBR-3 only)

Enabling this option provides the capitally to boot from SAS HDD. The options are
Disabled and Enabled.

PCI Parity Error Forwarding

The feature allows SERR and PERR errors detected in PCI slots to be sent
(forwarded) to the BIOS DMI Event Log for the user to review. The options are
Enabled and Disabled.

Reset Confi guration Data

If set to Yes, this setting clears the Extended System Confi guration Data- (ESCD)
area. The options are Yes and No.

Frequency for PCI-X#7, MASS (-Mass Data Storage)/ZCR (-Zero
Channel RAID)

This option allows the user to change the bus frequency for the devices installed
in the slot indicated. The options are Auto, PCI 33 MHz, PCI 66 MHz, PCI-X 66
MHz and PCI-X 100 MHz

4-9

X7DBR-3/X7DBR-E User's Manual

Slot#6 PCI-X 133MHz, Slot E1 x8, Slot E2 x4 and Slot E3 x8

Access the submenu for each of the settings above to make changes to the
following:

Option ROM Scan

When enabled, this setting will initialize the device expansion ROM. The options
are Enabled and Disabled.

Enable Master

This setting allows you to enable the selected device as the PCI bus master.
The options are Enabled and Disabled.

Latency Timer

This setting allows you to set the clock rate for Bus Master. A high-priority, high­throughout device may benefi t from a greater clock rate. The options are Default,

0020h, 0040h, 0060h, 0080h, 00A0h, 00C0h, and 00E0h. For Unix, Novell and
other Operating Systems, please select the option: other. If a drive fails after
the installation of a new software, you might want to change this setting and
try again. A different OS requires a different Bus Master clock rate.

Large Disk Access Mode

This setting determines how large hard drives are to be accessed. The options are
DOS or Other (for Unix, Novelle NetWare and other operating systems).

Advanced Chipset Control

Access the submenu to make changes to the following settings.

*Warning: Take Caution when changing the Advanced settings. Incorrect

values entered may cause system malfunction. Also, a very high DRAM
frequency or incorrect DRAM timing may cause system instability. When this
occurs, revert to the default setting.

SERR Signal Condition

This setting specifi es the ECC Error conditions that an SERR# is to be asserted.
The options are None, Single Bit, Multiple Bit, and Both.

4GB PCI Hole Granularity

This feature allows you to select the granularity of PCI hole for PCI slots. If MTRRs
are not enough, this option may be used to reduce MTRR occupation. The options
are: 256 MB, 512 MB, 1GB and 2GB.

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Chapter 4: BIOS

Memory Branch Mode

This option determines how the two memory branches operate. System address
space can either be interleaved between the two branches or Sequential from one
branch to another. Mirror mode allows data correction by maintaining two copies
of data in two branches. Single Channel 0 allows a single DIMM population during
system manufacturing. The options are Interleave, Sequential, Mirroring, and
Single Channel 0.

Branch 0 Rank Interleaving & Sparing

Select enable to enable the functions of Memory Interleaving and Memory Sparing
for Branch 0 Rank. The options for Memory Interleaving are 1:1, 2:1 and 4:1. The
options for Sparing are Enabled and Disabled.

Branch 1 Rank Interleaving & Sparing

Select enable to enable the functions of Memory Interleaving and Memory Sparing
for Branch 1 Rank. The options for Memory Interleaving are 1:1, 2:1 and 4:1. The
options for Sparing are Enabled and Disabled.

Enhanced x8 Detection

Select Enabled to enable Enhanced x8 DRAM UC Error Detection. The options
are Disabled and Enabled.

Crystal Beach Features

This feature cooperates with Intel I/O AT (Acceleration Technology) to accelerate
the performance of TOE devices. (*Note: A TOE device is a specialized,
dedicated processor that is installed on an add-on card or a network card to
handle some or all packet processing of this add-on card. For this motherboard,
the TOE device is built inside the ESB 2 South Bridge chip.) The options are

Enabled and Disabled.

Route Port 80h Cycles to

This feature allows the user to decide which bus to send debug information to.
The options are PCI and LPC.

Clock Spectrum Feature

If Enabled, the BIOS will monitor the level of Electromagnetic Interference caused
by the components and will attempt to decrease the interference whenever needed.
The options are Enabled and Disabled.

Enabling Multi-Media Timer

Select Yes to activate a set of timers that are alternative to the traditional 8254
timers for the OS use. The options are Yes and No.

USB Function

Select Enabled to enable the function of USB devices specifi ed. The settings are

Enabled and Disabled.

Legacy USB Support

This setting allows you to enable support for Legacy USB devices. The settings
are Enabled and Disabled.

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X7DBR-3/X7DBR-E User's Manual

Advanced Processor Options

Access the submenu to make changes to the following settings.

CPU Speed

This is a display that indicates the speed of the installed processor.

Frequency Ratio (*Available when supported by the CPU.)

The feature allows the user to set the internal frequency multiplier for the CPU.
The options are: Default, x12, x13, x14, x15, x16, x17 and x18.

Hyperthreading (*Available when supported by the CPU.)

Set to Enabled to use the Hyperthreading Technology, which will result in increased
CPU performance. The options are Disabled and Enabled.

Core-Multi-Processing (*Available when supported by the CPU.)

Set to Enabled to use a processor's Second Core and beyond. (Please refer to
Intel's web site for more information.) The options are Disabled and Enabled.

Machine Checking (*Available when supported by the CPU.)

Set to Enabled to activate the function of Machine Checking and allow the CPU to
detect and report hardware (machine) errors via a set of model-specifi c registers

(MSRs). The options are Disabled and Enabled.

Thermal Management 2 (*Available when supported by the CPU.)

Set to Enabled to use Thermal Management 2 (TM2) which will lower CPU voltage
and frequency when the CPU temperature reaches a predefi ned overheat threshold.
Set to Disabled to use Thermal Manager 1 (TM1), allowing CPU clocking to be
regulated via CPU Internal Clock modulation when the CPU temperature reaches

the overheat threshold.

C1 Enhanced Mode (*Available when supported by the CPU.)

Set to Enabled to enable Enhanced Halt State to lower CPU voltage/frequency to
prevent overheat. The options are Enabled and Disabled. (*Note: please refer
to Intel’s web site for detailed information.)

Execute Disable Bit (*Available when supported by the CPU.)

Set to Enabled to enable Execute Disable Bit and allow the processor to classify
areas in memory where an application code can execute and where it cannot, and
thus preventing a worm or a virus from inserting and creating a fl ood of codes to
overwhelm the processor or damage the system during an attack.

(*Note: this feature is available when your OS and your CPU support the function
of Execute Disable Bit.) The options are Disabled and Enabled. (Note: For more
information regarding hardware/software support for this function, please refer to
Intel's and Microsoft's web sites.)

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Chapter 4: BIOS

Adjacent Cache Line Prefetch (*Available when supported by the CPU.)

The CPU fetches the cache line for 64 bytes if this option is set to Disabled. The
CPU fetches both cache lines for 128 bytes as comprised if Enabled. The options
are Disabled and Enabled.

Hardware Prefetcher (*Available when supported by the CPU.)

Set to this option to enabled to enable the hardware components that are used in
conjunction with software programs to prefetch data in order to shorten execution
cycles and maximize data processing effi ciency. The options are Disabled and

Enabled.

PECI Absent Alarm (*Available when supported by the CPU.)

If set to Enabled, the PECI Absent Alarm will be activated if the function of PECI
(Platform Environment Control Interface) is not available for the onboard process(es)

or for the motherboard. The options are Disabled and Enabled.

Intel <R> Virtualization Technology (*Available when supported by
the CPU.)

Select Enabled to use the feature of Virtualization Technology to allow one platform
to run multiple operating systems and applications in independent partitions, creating
multiple "virtual" systems in one physical computer. The options are Enabled and
Disabled. (*Note: If there is any change to this setting, you will need to power off
and restart the system for the change to take effect.) Please refer to Intel’s web
site for detailed information.

Intel EIST Support (*Available when supported by the CPU.)

Select Enabled to use the Enhanced Intel SpeedStep Technology and allows the
system to automatically adjust processor voltage and core frequency in an effort
to reduce power consumption and heat dissipation. The options are Enabled and

Disabled. Please refer to Intel’s web site for detailed information.

I/O Device Confi guration

Access the submenu to make changes to the following settings.

KBC Clock Input

This setting allows you to select clock frequency for KBC. The options are 6MHz,
8MHz, 12MHz, and 16MHz.

Serial Port A

This setting allows you to assign control of serial port A. The options are Enabled
(user defi ned), Disabled, and Auto (BIOS- or OS- controlled).

Base I/O Address

This setting allows you to select the base I/O address for serial port A. The options
are 3F8, 2F8, 3E8, and 2E8.

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X7DBR-3/X7DBR-E User's Manual

Interrupt

This setting allows you to select the IRQ (interrupt request) for serial port A. The
options are IRQ3 and IRQ4.

Serial Port B

This setting allows you to assign control of serial port B. The options are Enabled
(user defi ned), Disabled, Auto (BIOS controlled) and OS Controlled.

Mode

This setting allows you to set the type of device that will be connected to serial
port B. The options are Normal and IR (for an infrared device).

Base I/O Address

This setting allows you to select the base I/O address for serial port B. The
options are 3F8, 2F8, 3E8 and 2E8.

Interrupt

This setting allows you to select the IRQ (interrupt request) for serial port B. The
options are IRQ3 and IRQ4.

Floppy Disk Controller

This setting allows you to assign control of the fl oppy disk controller. The options
are Enabled (user defi ned), Disabled, and Auto (BIOS and OS controlled).

Base I/O Address

This setting allows you to select the base I/O address for the Floppy port. The
options are Primary and Secondary.

4-14

Chapter 4: BIOS

DMI Event Logging

Access the submenu to make changes to the following settings.

Event Log Validity

This is a display to inform you of the event log validity. It is not a setting.

Event Log Capacity

This is a display to inform you of the event log capacity. It is not a setting.

View DMI Event Log

Highlight this item and press <Enter> to view the contents of the event log.

Event Logging

This setting allows you to Enable or Disable event logging.

ECC Event Logging

This setting allows you to Enable or Disable ECC event logging.

Mark DMI Events as Read

Highlight this item and press <Enter> to mark the DMI events as read.

Clear All DMI Event Logs

Select Yes and press <Enter> to clear all DMI event logs. The options are Yes
and No.

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X7DBR-3/X7DBR-E User's Manual

Console Redirection

Access the submenu to make changes to the following settings.

COM Port Address

This item allows you to specify which COM port to redirect the console to:
Onboard COM A or Onboard COM B. This setting can also be Disabled.

BAUD Rate

This item allows you to set the BAUD rate for console redirection. The options
are 300, 1200, 2400, 9600, 19.2K, 38.4K, 57.6K, and 115.2K.

Console Type

This item allows you to select the console type for console redirection. The
options are VT100, VT100,8bit, PC-ANSI, 7bit, PC ANSI, VT100+,

and ASCII.

Flow Control

VT-UTF8

This item allows you to set the fl ow control for console redirection. The options
are: None, XON/XOFF, and CTS/RTS.

Console Connection

This item allows you to decide how console redirection is to be connected: either

Direct or Via Modem.

Continue CR after POST

This item allows you to decide if you want to continue with console redirection
after POST routines. The options are On and Off.

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Chapter 4: BIOS

Hardware Monitor Logic

*Note: The Phoenix BIOS will automatically detect the type of CPU(s)
and hardware monitoring chip used on the motherboard and will display
the Hardware Monitoring Screen accordingly. Your Hardware Monitoring
Screen may look like the one shown on this page, on P. 4-19, or on P. 4-20,
depending on the type of CPU(s) and HW Monitoring chip you are using.

CPU Temperature Threshold

This option allows the user to set a CPU temperature threshold that will activate
the alarm system when the CPU temperature reaches this pre-set temperature

threshold. The options are 75
Highlight this and hit <Enter> to see monitor data for the following items:

CPU1 Temperature

CPU1 Second Core Temperature

CPU2 Temperature

CPU2 Second Core Temperature

System Temperature

o

C, 80oC, 85oC, and 90oC. (*See the note below.)

Fan1-Fan6 Speeds: If the feature of Auto Fan Control is enabled, the BIOS will
automatically display the status of the fans indicated in this item.

Fan Speed Control Modes

This feature allows the user to decide how the system controls the speeds of the
onboard fans. The CPU temperature and the fan speed are correlative. When
the CPU on-die temperature increases, the fan speed will also increase, and vice
versa. Set this option to “3-pin fan” to allow the fan speed to be controlled by
voltage. Select “Disable” to disable the fan speed control function and allow the
onboard fans to constantly run at full speed (12V). The Options are: 1. Disable,

2. 3-pin (Server), 3. 3-pin (Workstation).

Voltage Monitoring

The following items will be monitored and displayed:
P12V_VR0
P12V_VR1
FSB VTT
PXH-V Vcore
ES2B Vcore
CPU1Vcore
CPU2Vcore
P3V3

*Note: In the Windows OS environment, the Supero Doctor III settings take pre­cedence over the BIOS settings. When fi rst installed, Supero Doctor III adopts the
temperature threshold settings previously set in the BIOS. Any subsequent changes
to these thresholds must be made within Supero Doctor, since the SD III settings
override the BIOS settings. For the Windows OS to adopt the BIOS temperature
threshold settings, please change the SDIII settings to be the same as those set
in the BIOS.

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X7DBR-3/X7DBR-E User's Manual

Hardware Monitor Logic

CPU Temperature Threshold (*See the Note on Page 4-18.)

This option allows the user to set a CPU temperature threshold that will activate
the alarm system when the CPU temperature reaches this pre-set temperature

threshold. The options are 75
Highlight this and hit <Enter> to see monitor data for the following items:

CPU1 Temperature

CPU1 Second Core

CPU2 Temperature

CPU2 Second Core

System Temperature

Fan1-Fan6 Speeds: If the feature of Auto Fan Control is enabled, the BIOS will

automatically display the status of the fans indicated in this item.

Fan Speed Control Modes

o

C, 80oC, 85oC, and 90oC. (See the note below.)

This feature allows the user to decide how the system controls the speeds of the
onboard fans. The CPU temperature and the fan speed are correlative. When
the CPU on-die temperature increases, the fan speed will also increase, and vice
versa. Set this option to “3-pin fan” to allow the fan speed to be controlled by
voltage. Select “Disable” to disable the fan speed control function and allow the
onboard fans to constantly run at full speed (12V). The Options are: 1. Disable,

2. 3-pin (Server), 3. 3-pin (Workstation).

Voltage Monitoring

The following items will be monitored and displayed:
Vcore A
Vcore B

-12V
P1V5
+3.3V
+12V
5Vsb
5VDD
P_VTT
Vbat

*Note: In the Windows OS environment, the Supero Doctor III settings take pre­cedence over the BIOS settings. When fi rst installed, Supero Doctor III adopts the
temperature threshold settings previously set in the BIOS. Any subsequent changes
to these thresholds must be made within Supero Doctor, since the SD III settings
override the BIOS settings. For the Windows OS to adopt the BIOS temperature
threshold settings, please change the SDIII settings to be the same as those set
in the BIOS.

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Chapter 4: BIOS

Hardware Monitor Logic (*See the Note on Page 4-18.)

CPU Temperature Threshold

This option allows the user to set a CPU temperature threshold that will activate
the alarm system when the CPU temperature reaches this pre-set temperature
threshold. The hardcode default setting is 80

o

C. (*See the note below.)

CPU1 Temperature/CPU1 Second Core

CPU2 Temperature/CPU2 Second Core

Temperature Monitoring (*Available if supported by the CPU)

Highlight this and hit <Enter> to see monitor data for the following PECI (Platform
Environment Control Interface) items:

PECI Agent 1 Temperature/PECI Agent 2 Temperature/PECI Agent 3

Temperature/PECI Agent 4 Temperature

System Temperature

Fan1-Fan6 Speeds: If the feature of Auto Fan Control is enabled, the BIOS will

automatically display the status of the fans indicated in this item.

Fan Speed Control Modes

This feature allows the user to decide how the system controls the speeds of the
onboard fans. The CPU temperature and the fan speed are correlative. When
the CPU on-die temperature increases, the fan speed will also increase, and vice
versa. Set this option to “3-pin fan” to allow the fan speed to be controlled by
voltage. Select “Disable” to disable the fan speed control function and allow the
onboard fans to constantly run at full speed (12V). The Options are: 1. Disable,

2. 3-pin (Server), 3. 3-pin (Workstation).

Voltage Monitoring

The following items will be monitored and displayed:
Vcore A:/Vcore B:

-12V
P1V5
+3.3V
+12V
5Vsb/5VDD
P_VTT
Vbat

*Note: In the Windows OS environment, the Supero Doctor III settings take pre­cedence over the BIOS settings. When fi rst installed, Supero Doctor III adopts the
temperature threshold settings previously set in the BIOS. Any subsequent changes
to these thresholds must be made within Supero Doctor, since the SD III settings
override the BIOS settings. For the Windows OS to adopt the BIOS temperature
threshold settings, please change the SDIII settings to be the same as those set
in the BIOS.

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X7DBR-3/X7DBR-E User's Manual

IPMI (The option is available only when an IPMI card is installed

in the system.)

IPMI Specifi cation Version:

This item displays the current IPMI Version.

Firmware Version: This item displays the current Firmware Version.

System Event Logging

Select Enabled to enable IPMI Event Logging. When this function is set to
Disabled, the system will continue to log events received via system interface.
The options are Enabled and Disabled.

Clear System Event Logging

Enabling this function to force the BIOS to clear the system event logs during the
next cold boot. The options are Enabled and Disabled.

Existing Event Log Number

This item displays the number of the existing event log.

Event Log Control

System Firmware Progress

Enabling this function to log POST progress. The options are Enabled and

Disabled.

BIOS POST Errors

Enabling this function to log POST errors. The options are Enabled and

Disabled.

BIOS POST Watch Dog

Set to Enabled to enable POST Watch Dog. The options are Enabled and
Disabled.

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Chapter 4: BIOS

OS Boot Watch Dog

Set to Enabled to enable OS Boot Watch Dog. The options are Enabled and

Disabled.

Timer for Loading OS (Minutes)

This feature allows the user to set the time value (in minutes) for the previous
item: OS Boot Watch Dog by keying-in a desired number in the blank. The
default setting is 10 (minutes.) (Please ignore this option when OS Boot Watch
Dog is set to "Disabled".)

Time Out Option

This feature allows the user to determine what action to take in an event of a
system boot failure. The options are No Action, Reset, Power Off and Power
Cycles.

System Event Log/System Event Log (List Mode)

These options display the System Event (SEL) Log and System Event (SEL) Log
in List Mode. Items include: SEL (System Event Log) Entry Number, SEL Record
ID, SEL Record Type, Time Stamp, Generator ID, SEL Message Revision,
Sensor Type, Sensor Number, SEL Event Type, Event Description, and SEL
Event Data.

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X7DBR-3/X7DBR-E User's Manual

Realtime Sensor Data

This feature display information from motherboard sensors, such as
temperatures, fan speeds and voltages of various components.

4-22

Chapter 4: BIOS

4-5 Security

Choose Security from the Phoenix BIOS Setup Utility main menu with the arrow
keys. You should see the following display. Security setting options are displayed
by highlighting the setting using the arrow keys and pressing <Enter>. All Security
BIOS settings are described in this section.

Supervisor Password Is:

This item indicates if a supervisor password has been entered for the system. Clear
means such a password has not been used and Set means a supervisor password
has been entered for the system.

User Password Is:

This item indicates if a user password has been entered for the system. Clear
means such a password has not been used and Set means a user password has
been entered for the system.

Set Supervisor Password

When the item Set Supervisor Password is highlighted, hit the <Enter> key . When
prompted, type the Supervisor's password in the dialogue box to set or to change
supervisor's password, which allows access to the BIOS.

Set User Password

When the item Set User Password is highlighted, hit the <Enter> key. When
prompted, type the user's password in the dialogue box to set or to change the
user's password, which allows access to the system at boot-up.

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X7DBR-3/X7DBR-E User's Manual

Password on Boot

This item allows you to decide if a password is required for a user to enter the
system at boot-up. The options are Enabled (password required) and Disabled
(password not required).

4-6 Boot

Choose Boot from the Phoenix BIOS Setup Utility main menu with the arrow keys.
You should see the following display. See details on how to change the order and
specs of boot devices in the Item Specifi c Help window. All Boot BIOS settings are
described in this section.

Boot List

Candidate
List

Boot Priority Order/Excluded from Boot Orders

The devices included in the boot list section (above) are bootable devices listed in
the sequence of boot order as specifi ed. The boot functions for the devices included
in the candidate list (above) are currently disabled. Use a <+> key or a <-> key to
move the device up or down. Use the <f> key or the <r> key to specify the type of
an USB device, either fi xed or removable. You can select one item from the boot
list and hit the <x> key to remove it from the list of bootable devices (to make its
resource available for other bootable devices). Subsequently, you can select an
item from the candidate list and hit the <x> key to remove it from the candidate
list and put it in the boot list. This item will then become a bootable device. See
details on how to change the priority of boot order of devices in the "Item Specifi c
Help" window.

4-24

Chapter 4: BIOS

4-7 Exit

Choose Exit from the Phoenix BIOS Setup Utility main menu with the arrow keys.
You should see the following display. All Exit BIOS settings are described in this
section.

Exit Saving Changes

Highlight this item and hit <Enter> to save any changes you've made and to exit
the BIOS Setup utility.

Exit Discarding Changes

Highlight this item and hit <Enter> to exit the BIOS Setup utility without saving any
changes you may have made.

Load Setup Defaults

Highlight this item and hit <Enter> to load the default settings for all items in the
BIOS Setup. These are the safest settings to use.

Discard Changes

Highlight this item and hit <Enter> to discard (cancel) any changes you've made.
You will remain in the Setup utility.

Save Changes

Highlight this item and hit <Enter> to save any changes you've made. You will
remain in the Setup utility.

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X7DBR-3/X7DBR-E User's Manual

Notes

4-26

Appendix A: BIOS POST Messages

Appendix A

BIOS POST Messages

During the Power-On Self-Test (POST), the BIOS will check for problems. If a prob­lem is found, the BIOS will activate an alarm or display a message. The following is
a list of such BIOS messages.

Failure Fixed Disk

Fixed disk is not working or not confi gured properly. Check to see if fi xed disk is
attached properly. Run Setup. Find out if the fi xed-disk type is correctly identifi ed.

Stuck key

Stuck key on keyboard.

Keyboard error

Keyboard not working.

Keyboard Controller Failed

Keyboard controller failed test. May require replacing keyboard controller.

Keyboard locked - Unlock key switch

Unlock the system to proceed.

Monitor type does not match CMOS - Run SETUP

Monitor type not correctly identifi ed in Setup

Shadow Ram Failed at offset: nnnn

Shadow RAM failed at offset nnnn of the 64k block at which the error was de­tected.

System RAM Failed at offset: nnnn

System RAM failed at offset nnnn of in the 64k block at which the error
was detected.

Extended RAM Failed at offset: nnnn Extended memory not working or not con-

fi gured properly at offset nnnn.

System battery is dead - Replace and run SETUP

The CMOS clock battery indicator shows the battery is dead. Replace the battery
and run Setup to reconfi gure the system.

A-1

X7DBR-3/X7DBR-E User's Manual

System CMOS checksum bad - Default confi guration used

System CMOS has been corrupted or modifi ed incorrectly, perhaps by an
application program that changes data stored in CMOS. The BIOS installed Default
Setup Values. If you do not want these values, enter Setup and enter your own
values. If the error persists, check the system battery or contact your dealer.

System timer error

The timer test failed. Requires repair of system board.

Real time clock error
Real-Time Clock fails BIOS hardware test. May require board repair.

Check date and time settings

BIOS found date or time out of range and reset the Real-Time Clock. May require
setting legal date (1991-2099).

Previous boot incomplete - Default confi guration used

Previous POST did not complete successfully. POST loads default values and
offers to run Setup. If the failure was caused by incorrect values and they are not
corrected, the next boot will likely fail. On systems with control of wait states,
improper Setup settings can also terminate POST and cause this error on the next
boot. Run Setup and verify that the waitstate confi guration is correct. This error is
cleared the next time the system is booted.

Memory Size found by POST differed from CMOS

Memory size found by POST differed from CMOS.

Diskette drive A error

Diskette drive B error

Drive A: or B: is present but fails the BIOS POST diskette tests. Check to see that
the drive is defi ned with the proper diskette type in Setup and that the diskette drive
is attached correctly.

Incorrect Drive A type - run SETUP

Type of fl oppy drive A: not correctly identifi ed in Setup.

Incorrect Drive B type - run SETUP

Type of fl oppy drive B: not correctly identifi ed in Setup.

A-2

Appendix A: BIOS POST Messages

System cache error - Cache disabled

RAM cache failed and BIOS disabled the cache. On older boards, check the cache
jumpers. You may have to replace the cache. See your dealer. A disabled cache
slows system performance considerably.

CPU ID:

CPU socket number for Multi-Processor error.

EISA CMOS not writeable

ServerBIOS2 test error: Cannot write to EISA CMOS.

DMA Test Failed

ServerBIOS2 test error: Cannot write to extended DMA (Direct Memory
Access) registers.

Software NMI Failed

ServerBIOS2 test error: Cannot generate software NMI (Non-Maskable
Interrupt).

Fail-Safe Timer NMI Failed

ServerBIOS2 test error: Fail-Safe Timer takes too long.

device Address Confl ict

Address confl ict for specifi ed device.

Allocation Error for: device

Run ISA or EISA Confi guration Utility to resolve resource confl ict for the
specifi ed device.

CD ROM Drive

CD ROM Drive identifi ed.

Entering SETUP ...

Starting Setup program

Failing Bits: nnnn

The hex number nnnn is a map of the bits at the RAM address which failed
the memory test. Each 1 (one) in the map indicates a failed bit. See errors
230, 231, or 232 above for offset address of the failure in System,
Extended, or Shadow memory.

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X7DBR-3/X7DBR-E User's Manual

Fixed Disk n

Fixed disk n (0-3) identifi ed.

Invalid System Confi guration Data

Problem with NVRAM (CMOS) data.

I/O device IRQ confl ict

I/O device IRQ confl ict error.

PS/2 Mouse Boot Summary Screen:

PS/2 Mouse installed.

nnnn kB Extended RAM Passed

Where nnnn is the amount of RAM in kilobytes successfully tested.

nnnn Cache SRAM Passed

Where nnnn is the amount of system cache in kilobytes successfully tested.

nnnn kB Shadow RAM Passed

Where nnnn is the amount of shadow RAM in kilobytes successfully
tested.

nnnn kB System RAM Passed

Where nnnn is the amount of system RAM in kilobytes successfully tested.

One or more I2O Block Storage Devices were excluded from the Setup Boot

Menu

There was not enough room in the IPL table to display all installed I2O block-stor­age devices.

Operating system not found

Operating system cannot be located on either drive A: or drive C:. Enter Setup and
see if fi xed disk and drive A: are properly identifi ed.

Parity Check 1 nnnn

Parity error found in the system bus. BIOS attempts to locate the address and
display it on the screen. If it cannot locate the address, it displays ????. Parity is
a method for checking errors in binary data. A parity error indicates that some data
has been corrupted.

A-4

Appendix A: BIOS POST Messages

Parity Check 2 nnnn

Parity error found in the I/O bus. BIOS attempts to locate the address and display it
on the screen. If it cannot locate the address, it displays ????.

Press <F1> to resume, <F2> to Setup, <F3> for previous

Displayed after any recoverable error message. Press <F1> to start the boot
process or <F2> to enter Setup and change the settings. Press <F3> to display the
previous screen (usually an initialization error of an Option ROM, i.e., an add-on
card). Write down and follow the information shown on the screen.

Press <F2> to enter Setup

Optional message displayed during POST. Can be turned off in Setup.

PS/2 Mouse:

PS/2 mouse identifi ed.

Run the I2O Confi guration Utility

One or more unclaimed block storage devices have the Confi guration Request bit
set in the LCT. Run an I2O Confi guration Utility (e.g. the SAC utility).

System BIOS shadowed

System BIOS copied to shadow RAM.

UMB upper limit segment address: nnnn

Displays the address nnnn of the upper limit of Upper Memory Blocks, indicat­ing released segments of the BIOS which can be reclaimed by a virtual memory
manager.

Video BIOS shadowed

Video BIOS successfully copied to shadow RAM.

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X7DBR-3/X7DBR-E User's Manual

Notes

A-6

Appendix B: BIOS POST Codes

Appendix B

BIOS POST Codes

This section lists the POST (Power On Self Test) codes for the PhoenixBIOS. POST
codes are divided into two categories: recoverable and terminal.

Recoverable POST Errors

When a recoverable type of error occurs during POST, the BIOS will display an
POST code that describes the problem. BIOS may also issue one of the follow­ing beep codes:

1 long and two short beeps - video confi guration error
1 repetitive long beep - no memory detected
1 continuous beep w/front panel Overheat LED on - System Overheat

Terminal POST Errors

If a terminal type of error occurs, BIOS will shut down the system. Before doing
so, BIOS will write the error to port 80h, attempt to initialize video and write the
error in the top left corner of the screen. The following is a list of codes that may
be written to port 80h.

POST Code Description

01h IPMI Initialization
02h Verify Real Mode
03h Disable Non-Maskable Interrupt (NMI)
04h Get CPU type
06h Initialize system hardware
07h Disable shadow and execute code from the ROM.
08h Initialize chipset with initial POST values
09h Set IN POST fl ag
0Ah Initialize CPU registers
0Bh Enable CPU cache
0Ch Initialize caches to initial POST values
0Eh Initialize I/O component
0Fh Initialize the local bus IDE
10h Initialize Power Management
11h Load alternate registers with initial POST values
12h Restore CPU control word during warm boot
13h Reset PCI Bus Mastering devices
14h Initialize keyboard controller
16h 1-2-2-3 BIOS ROM checksum
17h Initialize cache before memory Auto size

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X7DBR-3/X7DBR-E User's Manual

POST Code Description

18h 8254 timer initialization
1Ah 8237 DMA controller initialization
1Ch Reset Programmable Interrupt Controller
20h 1-3-1-1 Test DRAM refresh
22h 1-3-1-3 Test 8742 Keyboard Controller
24h Set ES segment register to 4 GB
28h Auto size DRAM
29h Initialize POST Memory Manager
2Ah Clear 512 kB base RAM
2Ch 1-3-4-1 RAM failure on address line xxxx*
2Eh 1-3-4-3 RAM failure on data bits xxxx* of low byte of
memory bus
2Fh Enable cache before system BIOS shadow
32h Test CPU bus-clock frequency
33h Initialize Phoenix Dispatch Manager
36h Warm start shut down
38h Shadow system BIOS ROM
3Ah Auto size cache
3Ch Advanced confi guration of chipset registers
3Dh Load alternate registers with CMOS values
41h Initialize extended memory for RomPilot (optional)
42h Initialize interrupt vectors
45h POST device initialization
46h 2-1-2-3 Check ROM copyright notice
48h Check video confi guration against CMOS
49h Initialize PCI bus and devices
4Ah Initialize all video adapters in system
4Bh QuietBoot start (optional)
4Ch Shadow video BIOS ROM
4Eh Display BIOS copyright notice
4Fh Initialize MultiBoot
50h Display CPU type and speed
51h Initialize EISA board (optional)
52h Test keyboard
54h Set key click if enabled
55h Enable USB devices
58h 2-2-3-1 Test for unexpected interrupts
59h Initialize POST display service
5Ah Display prompt “Press <ESC> to enter SETUP”
5Bh Disable CPU cache

B-2

Appendix B: BIOS POST Codes

POST Code Description

5Ch Test RAM between 512 and 640 kB
60h Test extended memory
62h Test extended memory address lines
64h Jump to UserPatch1
66h Confi gure advanced cache registers
67h Initialize Multi Processor APIC
68h Enable external and CPU caches
69h Setup System Management Mode (SMM) area
6Ah Display external L2 cache size
6Bh Load custom defaults (optional)
6Ch Display shadow-area message
70h Display error messages
72h Check for confi guration errors
76h Check for keyboard errors
7Ch Set up hardware interrupt vectors
7Dh Initialize Intelligent System Monitoring (optional)
7Eh Initialize coprocessor if present
80h Disable onboard Super I/O ports and IRQs (optional)
81h Late POST device initialization
82h Detect and install external RS232 ports
83h Confi gure non-MCD IDE controllers
84h Detect and install external parallel ports
85h Initialize PC-compatible PnP ISA devices
86h Re-initialize onboard I/O ports.
87h Confi gure Motherboard Confi gurable Devices
(optional)
88h Initialize BIOS Data Area
89h Enable Non-Maskable Interrupts (NMIs)
8Ah Initialize Extended BIOS Data Area
8Bh Test and initialize PS/2 mouse
8Ch Initialize fl oppy controller
8Fh Determine number of ATA drives (optional)
90h Initialize hard-disk controllers
91h Initialize local-bus hard-disk controllers
92h Jump to UserPatch2
93h Build MPTABLE for multi-processor boards
95h Install CD ROM for boot
96h Clear huge ES segment register
97h Fix up Multi Processor table
98h 1-2 Search for option ROMs and shadow if successful. One
long, two short beeps on checksum failure

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X7DBR-3/X7DBR-E User's Manual

POST Code Description

99h Check for SMART Drive (optional)
9Ch Set up Power Management
9Dh Initialize security engine (optional)
9Eh Enable hardware interrupts
9Fh Determine number of ATA and SCSI drives
A0h Set time of day
A2h Check key lock
A4h Initialize typematic rate
A8h Erase <ESC> prompt
AAh Scan for <ESC> key stroke
ACh Enter SETUP
AEh Clear Boot fl ag
B0h Check for errors
B1h Inform RomPilot about the end of POST (optional)
B2h POST done - prepare to boot operating system
B4h 1 One short beep before boot
B5h Terminate QuietBoot (optional)
B6h Check password (optional)
B7h Initialize ACPI BIOS and PPM Structures
B9h Prepare Boot
BAh Initialize SMBIOS
BCh Clear parity checkers
BDh Display MultiBoot menu
BEh Clear screen (optional)
BFh Check virus and backup reminders
C0h Try to boot with INT 19
C1h Initialize POST Error Manager (PEM)
C2h Initialize error logging
C3h Initialize error display function
C4h Initialize system error fl ags
C6h Console redirection init.
C7h Unhook INT 10h if console redirection enabled
C8h Force check (optional)
C9h Extended ROM checksum (optional)
CDh Reclaim console redirection vector

B-4

Appendix B: BIOS POST Codes

POST Code Description

D2h Unknown interrupt
D4h Check Intel Branding string
D8h Alert Standard Format initialization
D9h Late init for IPMI
DEh Log error if micro-code not updated properl

The following are for boot block in Flash ROM

POST Code Description

E0h Initialize the chipset
E1h Initialize the bridge
E2h Initialize the CPU
E3h Initialize system timer
E4h Initialize system I/O
E5h Check force recovery boot
E6h Checksum BIOS ROM
E7h Go to BIOS
E8h Set Huge Segment
E9h Initialize Multi Processor
EAh Initialize OEM special code
EBh Initialize PIC and DMA
ECh Initialize Memory type
EDh Initialize Memory size
EEh Shadow Boot Block
EFh System memory test
F0h Initialize interrupt vectors
F1h Initialize Run Time Clock
F2h Initialize video
F3h Initialize System Management Manager
F4h Output one beep
F5h Clear Huge Segment
F6h Boot to Mini DOS
F7h Boot to Full DOS

y

* If the BIOS detects errors on 2C, 2E, or 30 (base 512K RAM error), it displays an
additional word-bitmap (xxxx) indicating the address line or bits that have failed. For
example, “2C 0002” means address line 1 (bit one set) has failed. “2E 1020" means
data bits 12 and 5 (bits 12 and 5 set) have failed in the lower 16 bits. The BIOS also
sends the bitmap to the port-80 LED display. It fi rst displays the checkpoint code,
followed by a delay , the high-order byte, another delay, and then the loworder byte of
the error. It repeats this sequence continuously.

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X7DBR-3/X7DBR-E User's Manual

Notes

B-6

Appendix C: Intel HostRAID Setup Guidelines

Appendix C

Intel HostRAID Setup Guidelines

After all the hardware has been installed, you must fi rst confi gure Intel's ESB2
SATA RAID* before you install the Windows Operating System and other software
drivers.

Important Notes to the User:

*Note 1: If you do not wish to confi gure onboard SATA RAID functions, please go

directly to Section C-2, Appendix D and Appendix E for Operating System & Other
Software Installation.

*Note 2: This chapter describes RAID Confi guration Instructions for the Intel ESB2
RAID Controller designed for the Windows OS.

C-1 Introduction to Serial ATA and Parallel ATA

To confi gure the SATA RAID functions, you must fi rst use the Intel ESB2 SATA
RAID Utility program to confi gure the RAID Level that you desire before installing
the Windows XP/2000/2003 operating system and other software drivers. (The
necessary drivers are all included on the Supermicro CD that came packaged with
your motherboard.) Note that the current version of the ESB2 SATA RAID Utility
can only support Windows XP/2000/2003 Operating Systems.

Serial ATA (SATA)

Serial ATA (SATA) is a physical storage interface that uses a single cable with a
minimum of four wires to create a point-to-point connection between devices. It
is a serial link, which supports transfer rates up to 3.0 Gbps. Because the serial
cables used in SATA are thinner than the traditional cables used in Parallel ATA
(PATA), SATA systems have better airfl ow and can be installed in smaller chassis.
In addition, the cables used in PATA are limited to a length of 40cm, while Serial
ATA cables can be up to one meter in length. Overall, SATA provides better func­tionality than PATA.

Introduction to the Intel ESB2 Serial RAID

Located in the South Bridge of the 5000P chipset, the I/O Controller Hub (ESB2)
provides the I/O subsystem with access to the rest of the system. It supports 1­channel UltraATA/100 Bus Master IDE controller (PATA) and six Serial ATA (SATA)
ports. The ESB2 supports the following PATA and SATA device confi gurations:
Legacy mode and Native mode.

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X7DBR-3/X7DBR-E User's Manual

The Intel HostRAID Confi gurations

The following types of Intel's HostRAID confi gurations are supported:
RAID 0 (Data Striping): this writes data in parallel, interleaved ("striped") sections

of two hard drives. Data transfer rate is doubled over using a single disk.
RAID1 (Data Mirroring): an identical data image from one drive is copied to another

drive. The second drive must be the same size or larger than the fi rst drive.
RAID 10 (Striping & Mirroring): RAID 0 and 1 schemes are combined (without parity

information) to get the benefi ts of both.
RAID 5: both data and parity information are striped and mirrored across three or

more hard drives.

The Intel Matrix Storage

The Intel Matrix Storage, supported by the ESB2, allows the user to create RAID
0, RAID 1, RAID 10 and RAID 5 sets by using only six identical hard disk drives.
The Intel Matrix Storage Technology creates two partitions on each hard disk
drive and generate a virtual RAID 0, RAID 1, RAID 10 and RAID 5 sets. It also
allows you the change the HDD partition size without any data.

Confi guring BIOS settings for SATA RAID Functions (Native Mode)

1. Press the <Del> key during system bootup to enter the BIOS Setup Utility.
Note: If it is the fi rst time powering on the system, we recommend you load the

Optimized Default Settings. If you have already done so, please skip to Step 3.

2. Use the arrow keys to select the "Exit" Settings. Once in the "Exit" settings,
Scroll down to select "Load Optimized Default Settings" and press the <Enter>
key. Select "OK" to confi rm the selection. Press the <Enter> key to load the default
settings for the BIOS.

3. Use the arrow keys to select the "Main" section in BIOS.

4. Scroll down to "SATA Controller Mode" and press the <Enter> key to select
"Enhanced"

5. Scroll down to "SATA RAID Enabled" and press <Enter>. Then, select "En­abled."

6. Go to "Exit." Select "Exit Saving Changes" from the "Exit" menu. Press the
<Enter> key to save the changes and exit the BIOS.

7. Once you've exited the BIOS Utility, the system will re-boot.

8. During the system boot-up, press the <Ctrl> and <I> keys simultaneously to run
the Intel RAID Confi guration Utility when prompted by the following message: Press
<Ctrl> <I> for the Intel RAID Confi guration Utility.

(*Note: The Intel RAID Confi guration Utility is only available for systems with two
or more drives installed. The Intel RAID Utility screen will not display in systems
with one drive installed.)

C-2

Appendix C: Intel HostRAID Setup Guidelines

Using the Intel ESB2 SATA RAID Utility Program

1. Creating, Deleting and Resetting RAID Volumes:

a. After the system exits from the BIOS Setup Utility, the system will automatically
reboot. The following screen appears after Power-On Self Test.

b. When you see the above screen, press the <Ctrl> and the <I> keys simultane­ously to have the main menu of the SATA RAID Utility appear:

(*Note: All graphics and screen shots shown in the manual are for reference only. The
screen shots shown in the manual do not imply Supermicro's endorsement or non-en­dorsement on any 3rd party's product. Your screens may or many not look exactly the
same as the graphics shown in this manual.)

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X7DBR-3/X7DBR-E User's Manual

Creating a RAID 0 Volume:

a. Select "Create RAID Volume" from the main menu and press the <Enter> key.
The following screen will appear:

b. Specify a name for the RAID 0 set and press the <Tab> key or the <Enter> key
to go to the next fi eld. (You can use the <Esc> key to select the previous menu.)

c. When RAID Level item is highlighted, press the <Up Arrow>, <Down Arrow> keys
to select RAID 0 (Stripe) and hit <Enter>.

d. When the Disks item is highlighted, press <Enter> to select the HDD to confi gure
as RAID. The following pop-up screen (*See the Note on Page C-3) displays:

e. Use the <Up Arrow>, <Down Arrow> keys to highlight a drive and press <Space>
to select it. A triangle appears to confi rm the selection of the drive.

f. Use the <Up Arrow>, <Down Arrow> keys to select the stripe size, ranging from
4 KB to 128 KB for the RAID 0 array, and hit <Enter>. (*Note: For a server, please
use a lower stripe size, and for a multimedia system, use a higher stripe size. The
default stripe size is 128 KB.)

g. Press <Enter> when the Create Volume item is highlighted. A warning message
displays.

h. When asked "Are you sure you want to create this volume (Y/N), press "Y" to
create the RAID volume, or type "N" to go back to the Create Volume menu.

C-4