Supermicro X7DB8 Plus, X7DBE Plus User Manual

®

SUPER

X7DB8+
X7DBE+

USER’S MANUAL

Revision 1.1a

The information in this User’s Manual has been carefully reviewed and is believed to be accurate.
The vendor assumes no responsibility for any inaccuracies that may be contained in this document,
makes no commitment to update or to keep current the information in this manual, or to notify any
person or organization of the updates. Please Note: For the most up-to-date version of this

manual, please see our web site at www.supermicro.com.

Super Micro Computer, Inc. ("Supermicro') reserves the right to make changes to the product
described in this manual at any time and without notice. This product, including software, if any,
and documentation may not, in whole or in part, be copied, photocopied, reproduced, translated or
reduced to any medium or machine without prior written consent.

IN NO EVENT WILL SUPER MICRO COMPUTER, INC. BE LIABLE FOR DIRECT, INDIRECT,
SPECIAL, INCIDENTAL, SPECULATIVE OR CONSEQUENTIAL DAMAGES ARISING FROM THE
USE OR INABILITY TO USE THIS PRODUCT OR DOCUMENTATION, EVEN IF ADVISED OF
THE POSSIBILITY OF SUCH DAMAGES. IN PARTICULAR, SUPER MICRO COMPUTER, INC.
SHALL NOT HAVE LIABILITY FOR ANY HARDWARE, SOFTWARE, OR DATA ST ORED OR USED
WITH THE PRODUCT, INCLUDING THE COSTS OF REPAIRING, REPLACING, INTEGRATING,
INSTALLING OR RECOVERING SUCH HARDWARE, SOFTWARE, OR DATA.

Any disputes arising between manufacturer and customer shall be governed by the laws of Santa
Clara County in the State of California, USA. The State of California, County of Santa Clara shall
be the exclusive venue for the resolution of any such disputes. Super Micro's total liability for
all claims will not exceed the price paid for the hardware product.

FCC Statement: This equipment has been tested and found to comply with the limits for a Class
A digital device pursuant to Part 15 of the FCC Rules. These limits are designed to provide
reasonable protection against harmful interference when the equipment is operated in a commercial
environment. This equipment generates, uses, and can radiate radio frequency energy and, if not
installed and used in accordance with the manufacturer’s instruction manual, may cause harmful
interference with radio communications. Operation of this equipment in a residential area is likely
to cause harmful interference, in which case you will be required to correct the interference at your
own expense.

California Best Management Practices Regulations for Perchlorate Materials: This Perchlorate
warning applies only to products containing CR (Manganese Dioxide) Lithium coin cells. “Perchlorate
Material-special handling may apply. See www.dtsc.ca.gov/hazardouswaste/perchlorate”

WARNING: Handling of lead solder materials used in this
product may expose you to lead, a chemical known to
the State of California to cause birth defects and other

reproductive harm.

Manual Revision 1.1a
Release Date: September 5, 2008

Unless you request and receive written permission from Super Micro Computer, Inc., you may not
copy any part of this document.
Information in this document is subject to change without notice. Other products and companies
referred to herein are trademarks or registered trademarks of their respective companies or mark
holders.

Copyright © 2006 by Super Micro Computer, Inc.
All rights reserved.

Printed in the United States of America

Preface

About This Manual

This manual is written for system integrators, PC technicians and
knowledgeable PC users. It provides information for the installation and use of the

X7DB8+/X7DBE+ motherboard. The X7DB8+/X7DBE+ supports
dual Intel
1333/1066/667 MHz. With dual Xeon 64-bit quad core/dual core processors, the
5000P chipset, and 16 DDR2 FBD 667/533 memory modules built-in, the X7DB8+/
X7DBE+ offers substantial functionality and performance enhancements to the
motherboards based on Core and NetBurst microarchitecture while remaining
compatible with the 32-bit based software. Key features supported include Intel's
Hyper-Threading Technology, Virtualization Technology, Hyper Pipelined Technol­ogy, Execution Trace Cache, Thermal Monitor 1/2 (TM1/TM2), Enhanced Intel
SpeedStep technology, Advanced Dynamic Execution, Advanced Transfer Cache,
Streaming SIMD Extensions 3 (SSE3) and Extended Memory 64 Technology
(EM64T). These features allow the motherboard to operate at much higher speeds
with better power management in much safer environments than the traditional
motherboards. The X7DB8+/X7DBE+ is ideal for high performance dual processor
(DP) enterprise server/workstation environments. This product is intended to be
professionally installed.

Xeon 64-bit quad core/dual core processors at a front side bus speed of

Preface

Manual Organization

Chapter 1 describes the features, specifi cations and performance of the main board

and provides detailed information about the chipset.
Chapter 2 provides hardware installation instructions. Read this chapter when
installing the processor, memory modules and other hardware components into
the system. If you encounter any problems, see Chapter 3, which describes
troubleshooting procedures for the video, the memory and the system setup stored
in CMOS.
Chapter 4 includes an introduction to BIOS and provides detailed information on
running the CMOS Setup utility.

Appendix A and Appendix B provide BIOS POST Messages and POST Codes.
Appendix C, Appendix D and Appendix E list HostRAID Setup Guidelines and

Other Software Program/Driver Installation Instructions.

Conventions Used in the Manual:

Special attention should be given to the following symbols for proper installation and
to prevent damage done to the components or injury to yourself:

Danger/Caution: Instructions to be strictly followed to prevent catastrophic
system failure or to avoid bodily injury.
Warning: Important information given to ensure proper system installation
or to prevent damage to the components.

*Note: Additional Information given to differentiate various models or to ensure cor-

rect system setup.

iii

X7DB8+/X7DBE+ User's Manual

Table of Contents

Preface

About This Manual ...................................................................................................... iii

Manual Organization ................................................................................................... iii

Conventions Used in the Manual ..................................................................................iii

Chapter 1: Introduction

1-1 Overview ......................................................................................................... 1-1

Checklist ................................................................................................... 1-1

Contacting Super Micro ........................................................................... 1-2

X7DB8+/X7DBE+ Image ............................................................ 1-3

X7DB8+/X7DBE+ Layout ............................................................ 1-4

Quick Reference ...................................................................................... 1-5

Motherboard Features ................................................................................ 1-6

Intel 5000P Chipset: System Block Diagram ........................................... 1-8

1-2 Chipset Overview ........................................................................................... 1-9

1-3 Special Features ........................................................................................... 1-10

Recovery from AC Power Loss .............................................................. 1-10

1-4 PC Health Monitoring .................................................................................... 1-10

1-5 ACPI Features .............................................................................................. 1-11

1-6 Power Supply ............................................................................................... 1-12

1-7 Super I/O ........................................................................................................1-13

Chapter 2: Installation

2-1 Static-Sensitive Devices ................................................................................. 2-1

Precautions ................................................................................................ 2-1

Unpacking ................................................................................................ 2-1

2-2 Installing the Processor and the Heatsink ...................................................... 2-2

2-3 Installing DIMMs ............................................................................................. 2-6

2-4 Control Panel Connectors and IO Ports ......................................................... 2-8

A. Back Panel Connectors/IO Ports .............................................................. 2-8

B. Front Control Panel ...................................................................................2-9

C. Front Control Panel Pin Defi nitions ........................................................2-10

NMI Button .............................................................................................2-10

Power LED ............................................................................................. 2-10

HDD LED .............................................................................................. 2-11

NIC1/NIC2 LED ..................................................................................... 2-11

Overheat/Fan Fail LED ......................................................................... 2-12

Power Fail LED ........................................................................................2-12

Reset Button ......................................................................................... 2-13

iv

Table of Contents

Power Button .......................................................................................... 2-13

2-5 Connecting Cables ......................................................................................... 2-14

ATX Power Connector .......................................................................... 2-14

Processor Power Connector ................................................................. 2-14

Universal Serial Bus (USB0/1) ................................................................ 2-15

Chassis Intrusion .................................................................................... 2-15

Fan Headers .......................................................................................... 2-16

Keylock .....................................................................................................2-16

ATX PS/2 Keyboard and Mouse Ports .....................................................2-17

Serial Ports ............................................................................................. 2-17

Wake-On-Ring ..........................................................................................2-18

Wake-On-LAN ..........................................................................................2-18

GLAN (Ethernet Ports) ............................................................................. 2-19

Speaker/Power LED/Keylock Header .................................................... 2-19

Power Fault .............................................................................................. 2-20

Alarm Reset .............................................................................................. 2-20

Overheat LED/Fan Fail ............................................................................ 2-21

SMB Connector ........................................................................................ 2-21

SMB Power Connector .............................................................................2-22

VGA Connector ........................................................................................2-22

Compact Flash Card PWR Connector .....................................................2-23

SGPIO Headers ....................................................................................... 2-23

2-6 Jumper Settings .............................................................................................. 2-24

Explanation of Jumpers ......................................................................... 2-24

GLAN Enable/Disable ............................................................................ 2-24

Clear CMOS ............................................................................................. 2-25

Watch Dog ................................................................................................ 2-25

SCSI Controller Enabled/Disabled ........................................................... 2-26

SCSI Termination Enabled/Dsiabled ........................................................ 2-26

3rd PWR Supply PWR Fault .................................................................... 2-27

VGA Enable/Disable .................................................................................2-27

Compact Flash Master/Slave Enable/Disable .......................................... 2-28

I2C Bus to PCI-X/PCI-Exp. Slots Enable/Disable .................................... 2-28

2-7 Onboard Indicators .......................................................................................... 2-29

GLAN LEDs .............................................................................................. 2-29

Onboard SCSI Activity LED ..................................................................... 2-30

Onboard Standby PWR LED....................................................................2-30

2-8 Parallel Port, Floppy, SIMLP IPMI, Hard Disk Drive and SCSI Connections .. 2-31

Parallel Port Connector ........................................................................... 2-31

v

X7DB8+/X7DBE+ User's Manual

Floppy Connector .................................................................................... 2-32

SIMLP IPMI Slot ...................................................................................... 2-32

IDE Connectors ....................................................................................... 2-33

Ultra 320 SCSI Connectors ..................................................................... 2-34

Chapter 3: Troubleshooting

3-1 Troubleshooting Procedures ........................................................................... 3-1

Before Power On ....................................................................................... 3-1

No Power ................................................................................................... 3-1

No Video .................................................................................................. 3-1

Memory Errors ........................................................................................... 3-1

Losing the System’s Setup Confi guration ................................................ 3-1

3-2 Technical Support Procedures ........................................................................ 3-2

3-3 Frequently Asked Questions ........................................................................... 3-3

3-4 Returning Merchandise for Service ................................................................. 3-4

Chapter 4: BIOS

4-1 Introduction .......................................................................................................4-1

4-2 Running Setup ................................................................................................. 4-2

4-3 Main BIOS Setup .............................................................................................4-2

4-4 Advanced Setup ...............................................................................................4-7

4-5 Security Setup ............................................................................................... 4-25

4-6 Boot Setup ......................................................................................................4-26

4-7 Exit ..................................................................................................................4-27

Appendices:

Appendix A: BIOS POST Messages ..........................................................................A-1

Appendix B: BIOS POST Codes ................................................................................ B-1

Appendix C: Intel HostRAID Setup Guidelines ..........................................................C-1

Appendix D: Adaptec HostRAID Setup Guidelines ....................................................D-1

Appendix E: Installing Other Software Programs and Drivers ................................... E-1

vi

Chapter 1: Introduction

Chapter 1

Introduction

1-1 Overview

Checklist

Congratulations on purchasing your computer motherboard from an acknowledged
leader in the industry . Super Micro boards are designed with the utmost attention to
detail to provide you with the highest standards in quality and performance. Check
that the following items have all been included with your motherboard. If anything
listed here is damaged or missing, contact your retailer.

All the following items are included in the Retail Box.

One (1) Super Micro Mainboard

One (1) ribbon cable for IDE devices

One (1) Serial Port cable

One (1) USB cable

One (1) fl oppy ribbon cable

One (1) Ultra 320 SCSI cable (*X7DB8+ only)

Four (4) SATA cables (*X7DB8+ only)

Six (6) SATA cables (*X7DBE+ only)

One (1) I/O backpanel shield

One (1) Super Micro CD containing drivers and utilities

One (1) User's/BIOS Manual

One (1) Ultra 320 SCSI User's Manual (*X7DB8+ only)

1-1

X7DB8+/X7DBE+ User's Manual

Contacting Supermicro

Headquarters

Address: Super Micro Computer, Inc.
980 Rock Ave.
San Jose, CA 95131 U.S.A.
Tel: [phone]
Fax: [phone]
Email: [e-mail] (General Information)
[e-mail] (Technical Support)
Web Site: www.supermicro.com

Europe

Address: Super Micro Computer B.V.
Het Sterrenbeeld 28, 5215 ML
's-Hertogenbosch, The Netherlands
Tel: [phone]
Fax: [phone]
Email: [e-mail] (General Information)
[e-mail] (Technical Support)
[e-mail] (Customer Support)

Asia-Pacifi c

Address: Super Micro Computer, Inc.
4F, No. 232-1 Liancheng Road
Chung-Ho 235, Taipei Hsien, Taiwan, R.O.C.
Tel: [phone]
Fax: [phone]
Web Site: www.supermicro.com.tw
Technical Support:
Email: [e-mail]
Tel: [phone], ext.132 or 139

1-2

X7DB8+/X7DBE+ Image

Chapter 1: Introduction

*Note: The drawings and pictures shown in this manual were based on the

latest PCB Revision available at the time of publishing of the manual. The
motherboard you’ve received may or may not look exactly the same as the
graphics shown in the manual.

1-3

X7DB8+/X7DBE+ User's Manual

u

X7DB8+/X7DBE+ Motherboard Layout

(not drawn to scale)

J34

Fan5

Fan6

KB/
Mouse

JKM1

USB0/1

JUSB1

COM1

Parrallel

VGA

J15

GLAN1

GLAN2

S

S I/O

JCOM2

Port

JLAN1

JLAN1

JLAN2

CTRL

J4

J9B2

J9B1

J33

J3

J8B3

J8B2

J32

J2

J8B1

J7B3

J31

J1

J7B2

J21

J7B1

UPER X7DB8+

Slot7

JPG1

Slot6

VGA

CTRL

Slot5

Slot4

Slot3

LAN

Slot2

Slot1

DIMM 4D (Bank 4)
DIMM 4C (Bank 4)
DIMM 4B (Bank 4)

DIMM 4A (Bank 4)

DIMM 3D (Bank 3)
DIMM 3C (Bank 3)
DIMM 3B (Bank 3)

DIMM 3A (Bank 3)

DIMM 2D (Bank 2)
DIMM 2C (Bank 2)
DIMM 2B (Bank 2)

DIMM 2A (Bank 2)

DIMM 1D (Bank 1)
DIMM 1C (Bank 1)
DIMM 1B (Bank 1)

DIMM 1A (Bank 1)

®

SIMLP IPMI

PCI-Exp x8

PCI-Exp x8

PCI-Exp x4

JWD

PCI-X 133 MHz

JPL1
JPL2

PCI-X 133 MHz

JWOR

PCI-X 100 MHz ZCR

J5

J6

J9

SEPC

Battery

J28
J27

J16

J11

BIOS

North Bridge

J14

J13

J12

JK1

SATA0

SMB

J18

PXH

JL1

SATA1

PWR
Fault
JP3

JAR

SATA4

SATA2

PWRSMB

JBT1

J7

USB2/3

J17

JWOL

JUSB2

SATA5

SATA3

Fan7

3rd PWR
Detect

J3P

USB4

JUSB3

24-Pin

Introd

CPU1

CPU2

South
Bridge

DA2

JPA1

320 SCSI Channel B

ATX PWR

JPW1

JWF1

SCSI CTRL

SGPIO2

SGPIO1

JCF1

4-Pin
PWR

JPW2

JPA3

JPA2

8-pin PWR

JPW3

JF1

Floppy

Compact Flash

J22

JA2

FP Ctrl

LE1

JIDE2

Fan1

Fan2

JD1

SPK

PW LED

JP1

JOH1

Fan3

Fan8

IDE1

JIDE1

320 SCSI Channel A

JA1

DA1

Fan4

1. Jumpers not indicated are for test purposes only.

2. See Chapter 2 for detailed information on jumpers, I/O ports and
JF1 front panel connections.

3. " " indicates the location of Pin 1.

4. SCSI is for the X7DB8+ only

5. SEPC: Super Micro Enhanced Power Connector, specially designed
to support Super Micro 2U Riser Card only.

6. When LE1 is on, make sure to turn off the computer before removing or install­ing components.

1-4

Chapter 1: Introduction

Quick Reference ( X7DB8+/X7DBE+)

Jumper Description Default Setting

J27, J28 I
J3P 3rd PWR Failure Detect Off (Disabled)

JBT1 CMOS Clear (See Chapter 2)
JCF1 Compact Card Master/Slave Select On (Master)
JPA1 (*X7DB8+) SCSI Controller Enable Pins 1-2 (Enabled)
JPA2, JPA3 SCSI CHA(JPA2),CHB(JPA3)Term.En Off (Enabled) (*X7DB8+)
JPG1 VGA Enable Pins 1-2 (Enabled)
JPL1/ JPL2 GLAN1/GLAN2 Enable Pins 1-2 (Enabled)
JWD Watch Dog Pins 1-2 (Reset)
Connector Description
ATX PWR (JPW1) Primary 24-Pin ATX PWR Connector
Aux. PWR/CPU PWR +12V 4-pin PWR (JWP2)/+12V 8-pin PWR(JPW3)
Alarm Reset (JAR) Alarm Buzzer Reset
Compact Flash PW(JWF1) Compact Card PWR Connector (*Used if JFC1 is on.)
COM1/COM2 COM1/COM2 Serial Port Connectors
Chassis Intru. (JL1) Chassis Intrusion Header
DA1/DA2 SCSI Activity LED Indicators (See Chapter 2)
DIMM#1A-DIMM#4D Memory DDRII Slots (*See Section 2-3 in Chapter 2)
FAN 1-8 Fans 1-8 (3-pin: Fans1-4, 4-pin: Fans5-8, Fans7/8:
CPU Fans)
FP CTRL (JF1) Front Control Panel Connector
Floppy (J22) Floppy Disk Drive Connector
GLAN 1/2 (JLAN1/2) G-bit Ethernet Ports
IDE1/IDE2 (*Note) IDE1 Hard Drive (JIDE1)/Compact Flash Card (JIDE2)
Keylock (JK1) Keylock Header
OH LED (JOH1) Overheat LED
Parallel Port (J21) Parallel (Printer) Port
PWR LED/Speaker (JD1) PWR LED(pins1-3)/Speaker Header (pins 4-7)
PWR LED (LE1) PWR LED Indicator (*Note6 on Pg.1-4)
PWR SMB (J17) Power System Management (I
PSF (JP3) Power Fault (Power Supply Failure: See Chapter 2)
SATA0-SATA5 Intel SATA 0-5 Connectors
SCSI Chan.A/B(JA1/JA2) SCSI Channel A & B Connectors (*X7DB8+ only)
SGPIO 1/2 Serial General Purpose Input/Output Headers
SIMLP IPMI (Slot 7) SIM Low Profi le IPMI Connector
SMB (J18) System Management Bus Header
USB 0/1,USB 2/3, USB4 Back Panel USB 0/1, Front Panel USB 2/3, FP USB4
VGA (J15) VGA Connector
WOL (JWOL) Wake-on-LAN Header
WOR (JWOR) Wake-on-Ring Header
*Note: JIDE2 is for Compact Card Use only. For Compact Card to work properly,
please enable JCF1 by putting a jumper on it and connect JWF1 to a power
supply.

2

C Bus to PCI-X/PCI-E Slots Open (Disabled)

2

C) Header

1-5

X7DB8+/X7DBE+ User's Manual

Motherboard Features

CPU

• Dual Intel

®

64-bit Xeon LGA 771 quad core/dual core processors at a front

side bus speed of 667 MHz/1.066 GHz/1.333 GHz

Memory

• 16 240-pin DIMM sockets with support up to 32 (64) GB DDR2 FBD (Fully
Buffered) ECC 667/533 Memory (*See Section 2-3 in Chapter 2 for DIMM
Slot Population.)

Chipset

• Intel 5000P chipset, including: the 5000P Memory Control Hub (MCH), the
Enterprise South Bridge 2 (ESB2), and the I/O subsystem (PXH).

Expansion Slots

• Three PCI-Express slots (*two slots at x8@4GB/sec, one slot x4@2GB/sec.)

• Three 64-bit PCI-X slots (*two PCI-X-133 slots, one PCI-X-100 slot)

BIOS

• 8 Mb Phoenix

®

Flash ROM

• DMI 2.3, PCI 2.2, ACPI 1.0, Plug and Play (PnP), RTC (Real Time Clock)
Wakeup

PC Health Monitoring

• Onboard voltage monitors for CPU cores, chipset voltage, +3.3V, +5V, +5V
Standby, +12V, and −12V

• Fan status monitor with fi rmware control

• CPU/chassis temperature monitors

• Platform Environment Control Interface (PECI) ready

• CPU fan auto-off in sleep mode

• CPU slow-down on temperature overheat

• CPU thermal trip support for processor protection, power LED

• Power-up mode control for recovery from AC power loss

• Auto-switching voltage regulator for CPU cores

• System overheat/Fan Fail LED Indicator and control

• Chassis intrusion detection

• System resource alert via Supero Doctor III

ACPI Features

• Slow blinking LED for suspend state indicator

• Main switch override mechanism

• ACPI/ACPM Power Management

1-6

Chapter 1: Introduction

• Keyboard Wakeup from Soft-off

Onboard I/O

• Adaptec 7902 dual channel Ultra 320 SCSI with ZCR option (*X7DB8+ only)

• Six SATA2 ports (supporting RAID0, RAID1, RAID10, RAID5)

• One SIMLP IPMI socket

• Intel 82563 Gigabit Ethernet controller supporting two Giga-bit LAN ports

• One EIDE Ultra DMA/100 bus master interface

• One fl oppy port interface

• Two COM ports(1 header, 1 port)

• One EPP/ECP Parallel Port

• PS/2 mouse and PS/2 keyboard ports

• Up to fi ve USB 2.0 (Universal Serial Bus) (2 ports, 3 Headers)

• ES1000 with 16 MB Graphic Controller

• Super I/O: Winbond W83627HF w/Hardware Monitor support: W83793,
HECETA

Other

• External modem ring-on

• Wake-on-LAN (WOL)

• Wake-on-Ring (WOR)

• Console redirection

• Onboard Fan Speed Control by Thermal Management via BIOS

CD/Diskette Utilities

• BIOS fl ash upgrade utility and device drivers

Dimensions

• Ext. ATX 13.5" x 13.05" (342.90 x 331.5 mm)

1-7

X7DB8+/X7DBE+ User's Manual

#2

Slot
X

PCI -

#3

#1

R
ZC

Slot

Slot

PCI -X

SCSI

7902

PC

PC

#5

I-

I-

PCI - E XP X8 SLOT

X 133

133

X

VRM

I SL 6307

#6

PCI -E XP X8 SL OT

PC
SE

#4

PCI - E XP X4

PCI-EXPX8

A

PX

H

B

PCI - X 133

PC

667/

PCI -

PCI -

I-

EXP X8

EX

EXP

1067/

MT/S

P X8

X8

PROCESSOR#2

1333

5000P

BLACKF

ESB2

PROCESSOR#1

667/

OR

D

MCH

PCI E X8

PCI E X4

1067/1333

MT/S

FBD CHNL0

FBD CHNL1

CHNL

FBD

FBD CH

2

NL 3

AT A 10 0

3.

VRM

I SL6307

#1A-1D

DIMM

D

FB

0 Gb/S

#2A-2D

#3A-3D

MM

MM

DI

DI

D
FB

FBD

IDE CONN

-#5

#0

SATA

#4A-4D

MM

DI

FBD

PCI 33

A

VGA

PCI -X

CONN

VG

Controller

RJ 45

RJ 45

MHz

PARALLEL

GB L AN

GILGAL

PORT

KU

B 2.0

US

ME

RA

N

LPC

SI O

W83627

FWH

-#4

US B

#0

HF

FDD

MS/

KB

CO M

1/2

Block Diagram of the 5000P Chipset

Note: This is a general block diagram. Please see the previous Motherboard Features

pages for details on the features of each motherboard.

1-8

Chapter 1: Introduction

1-2 Chipset Overview

Built upon the functionality and the capability of the 5000P chipset, the X7DB8+/
X7DBE+ motherboard provides the performance and feature set required for dual
processor-based servers with confi guration options optimized for communications,
presentation, storage, computation or database applications. The 5000P chipset
supports a single or dual Intel 64-bit quad core/dual core processor(s) with front
side bus speeds of up to 1.333 GHz. The chipset consists of the 5000P Memory
Controller Hub (MCH), the Enterprise South Bridge 2 (ESB2), and the I/O subsys­tem (PXH).

The 5000P MCH chipset is designed for symmetric multiprocessing across two inde­pendent front side bus interfaces. Each front side bus uses a 64-bit wide, 1333 MHz
data bus that transfers data at 10.7 GB/sec. In addition, the 5000P chipset offers a
wide range of RAS features, including memory interface ECC, x4/x8 Single Device
Data Correction, CRC, parity protection, memory mirroring and memory sparing.

Xeon Quad core/dual core Processor Features

Designed to be used with conjunction of the 5000P chipset, the Xeon Quad core/
dual core Processor provides a feature set as follows:

The Xeon Quad core/dual core Processor

*L1 Cache Size: Instruction Cache (32KB/16KB), Data Cache (32KB/24KB)
*L2 Cache Size: 4MB/2MB (per core)
*Data Bus Transfer Rate: 8.5 GB/s
*Package: FC-LGA6/FC-LGA4, 771 Lands

1-9

X7DB8+/X7DBE+ User's Manual

1-3 Special Features

Recovery from AC Power Loss

BIOS provides a setting for you to determine how the system will respond when AC
power is lost and then restored to the system. You can choose for the system to
remain powered off (in which case you must hit the power switch to turn it back on)
or for it to automatically return to a power- on state. See the Power Lost Control
setting in the Advanced BIOS Setup section to change this setting. The default
setting is Last State.

1-4 PC Health Monitoring

This section describes the PC health monitoring features of the X7DB8+/X7DBE+.
All have an onboard System Hardware Monitor chip that supports PC health moni­toring.

Onboard Voltage Monitors for CPUCore, +1.5V, Chipset Voltage,
+5V, +5V Standby, +12V, and −12V

An onboard voltage monitor will scan these voltages continuously. Once a
voltage becomes unstable, a warning is given or an error message is sent to
the screen. Users can adjust the voltage thresholds to defi ne the sensitivity
of the voltage monitor.

Fan Status Monitor with Firmware Control

The PC health monitor can check the RPM status of the cooling fans. The onboard
CPU and chassis fans are controlled by Thermal Management via BIOS (under
Hardware Monitoring in the Advanced Setting).

Environmental Temperature Control

The thermal control sensor monitors the CPU temperature in real time and will turn
on the thermal control fan whenever the CPU temperature exceeds a user-defi ned
threshold. The overheat circuitry runs independently from the CPU. Once it detects
that the CPU temperature is too high, it will automatically turn on the thermal fan
control to prevent any overheat damage to the CPU. The onboard chassis thermal
circuitry can monitor the overall system temperature and alert users when the chas­sis temperature is too high.

1-10

Chapter 1: Introduction

CPU Fan Auto-Off in Sleep Mode

The CPU fan activates when the power is turned on. It continues to operate when
the system enters Standby mode. When in sleep mode, the CPU will not run at
full power, thereby generating less heat.

CPU Overheat LED and Control

This feature is available when the user enables the CPU overheat warning function
in the BIOS. This allows the user to defi ne an overheat temperature. When the
CPU temperature reaches this threshold, both the overheat fan and the warning
LED are triggered.

System Resource Alert

This feature is available when used with Supero Doctor III in the Windows OS
environment or used with Supero Doctor II in Linux. Supero Doctor is used to
notify the user of certain system events. For example, you can also confi gure
Supero Doctor to provide you with warnings when the system temperature, CPU
temperatures, voltages and fan speeds go beyond a pre-defi ned range.

1-5 ACPI Features

ACPI stands for Advanced Confi guration and Power Interface. The ACPI specifi -
cation defi nes a fl exible and abstract hardware interface that provides a standard
way to integrate power management features throughout a PC system, including its
hardware, operating system and application software. This enables the system to
automatically turn on and off peripherals such as CD-ROMs, network cards, hard
disk drives and printers.

In addition to enabling operating system-directed power management, ACPI
provides a generic system event mechanism for Plug and Play and an operating
system-independent interface for confi guration control. ACPI leverages the Plug
and Play BIOS data structures while providing a processor architecture-independent
implementation that is compatible with both Windows 2000 and Windows 2003
Operating Systems.

Slow Blinking LED for Suspend-State Indicator

When the CPU goes into a suspend state, the chassis power LED will start blinking
to indicate that the CPU is in suspend mode. When the user presses any key, the
CPU will wake-up and the LED will automatically stop blinking and remain on.

1-11

X7DB8+/X7DBE+ User's Manual

Main Switch Override Mechanism

When an ATX power supply is used, the power button can function as a system
suspend button to make the system enter a SoftOff state. The monitor will be
suspended and the hard drive will spin down. Pressing the power button again
will cause the whole system to wake-up. During the SoftOff state, the ATX power
supply provides power to keep the required circuitry in the system alive. In case
the system malfunctions and you want to turn off the power, just press and hold
the power button for 4 seconds. This option can be set in the Power section of
the BIOS Setup routine.

External Modem Ring-On

Wake-up events can be triggered by a device such as the external modem ringing
when the system is in the SoftOff state. Note that external modem ring-on can only
be used with an ATX 2.01 (or above) compliant power supply.

Wake-On-LAN (WOL)

Wake-On-LAN is defi ned as the ability of a management application to remotely
power up a computer that is powered off. Remote PC setup, up-dates and asset
tracking can occur after hours and on weekends so that daily LAN traffi c is kept to
a minimum and users are not interrupted. The motherboard has a 3-pin header
(WOL) to connect to the 3-pin header on a Network Interface Card (NIC) that has
WOL capability. In addition, an onboard LAN controller can also support WOL
without any connection to the WOL header. The 3-pin WOL header is to be used
with a LAN add-on card only.

*Note: Wake-On-LAN requires an ATX 2.01 (or above) compliant power supply.

1-6 Power Supply

As with all computer products, a stable power source is necessary for proper and
reliable operation. It is even more important for processors that have high CPU
clock rates.

The X7DB8+/X7DBE+ can only accommodate 24-pin ATX power supplies. Al­though most power supplies generally meet the specifi cations required by the CPU,
some are inadequate. In addition, the 12V 4-pin and the 12V 8-pin power connec­tions are also required to ensure adequate power supply to the system. Also your
power supply must supply 1.5A for the Ethernet ports.

1-12

Chapter 1: Introduction

NOTE: The + 12V 8-pin CPU Power Connector (JPW3) is also required to sup-

port Intel 64-bit CPUs. Failure to provide this extra power will result in CPU

PWR Failure. See Section 2-5 for details on connecting the power supply.

It is strongly recommended that you use a high quality power supply that meets ATX
power supply Specifi cation 2.02 or above. It must also be SSI compliant (info at
http://www.ssiforum.org/). Additionally, in areas where noisy power transmission is
present, you may choose to install a line fi lter to shield the computer from noise. It
is recommended that you also install a power surge protector to help avoid problems
caused by power surges.

1-7 Super I/O

The disk drive adapter functions of the Super I/O chip include a fl oppy disk drive
controller that is compatible with industry standard 82077/765, a data separator,
write pre-compensation circuitry, decode logic, data rate selection, a clock genera­tor, drive interface control logic and interrupt and DMA logic. The wide range of
functions integrated onto the Super I/O greatly reduces the number of components
required for interfacing with fl oppy disk drives. The Super I/O supports 360 K, 720
K, 1.2 M, 1.44 M or 2.88 M disk drives and data transfer rates of 250 Kb/s, 500 Kb/s
or 1 Mb/s.It also provides two high-speed, 16550 compatible serial communication
ports (UARTs). Each UART includes a 16-byte send/receive FIFO, a programmable
baud rate generator, complete modem control capability and a processor interrupt
system. Both UARTs provide legacy speed with baud rate of up to 115.2 Kbps
as well as an advanced speed with baud rates of 250 K, 500 K, or 1 Mb/s, which
support higher speed modems.

The Super I/O supports one PC-compatible printer port (SPP), Bidirectional Printer
Port (BPP) , Enhanced Parallel Port (EPP) or Extended Capabilities Port (ECP).

The Super I/O provides functions that comply with ACPI (Advanced Confi guration
and Power Interface), which includes support of legacy and ACPI power manage­ment through an SMI or SCI function pin. It also features auto power management
to reduce power consumption.

1-13

X7DB8+/X7DBE+ User's Manual

Notes

1-14

Chapter 2: Installation

Chapter 2

Installation

2-1 Static-Sensitive Devices

Electro-Static-Discharge (ESD) can damage electronic com ponents. To prevent
damage to your system board, it is important to handle it very carefully . The following
measures are generally suffi cient to protect your equipment from ESD.

Precautions

• Use a grounded wrist strap designed to prevent static discharge.

• Touch a grounded metal object before removing the board from the antistatic
bag.

• Handle the board by its edges only; do not touch its components, peripheral
chips, memory modules or gold contacts.

• When handling chips or modules, avoid touching their pins.

• Put the motherboard and peripherals back into their antistatic bags when not in
use.

• For grounding purposes, make sure your computer chassis provides excellent
conductivity between the power supply, the case, the mounting fasteners and
the motherboard.

• Use only the correct type of onboard CMOS battery as specifi ed by the manu-
facturer. Do not install the onboard battery upside down to avoid possible explo­sion.

Unpacking

The motherboard is shipped in antistatic packaging to avoid static damage. When
unpacking the board, make sure the person handling it is static protected.

2-1

X7DB8+/X7DBE+ User's Manual

!

2-2 Installing the Processor and the Heatsink

When handling the processor package, avoid placing
direct pressure on the label area of the fan.

(*Notes: 1. Always connect the power cord last and always remove it before adding,
removing or changing any hardware components. Make sure that you install the
processor into the CPU socket before you install the CPU heatsink.

2. Intel's boxed Xeon CPU package contains the CPU fan and heatsink assembly.
If you buy a CPU separately, make sure that you use only Intel-certifi ed multi-di-
rectional heatsink and fan.

3. The Intel Xeon LGA 771 heatsink and fan comes with a push-pin design and no
tool is needed for installation.

4. Make sure to install the motherboard into the chassis before you install the CPU
heatsink and fan.)

5. When purchasing an LGA 771 CPU or when receiving a motherboard with an LGA
771 CPU pre-installed, make sure that the CPU plastic cap is in place and none of
the CPU pins are bent; otherwise, contact the retailer immediately.

6. Refer to the MB Features Section for more details on CPU support.

Installation of the LGA771 Processor

Socket Clip

Load Plate

1. Press the socket clip to release
the load plate, which covers the CPU
socket, from its locking position.

2. Gently lift the socket clip to open the
load plate.

Load Plate

2-2

Chapter 2: Installation

!

3. Use your thumb and your index

fi nger to hold the CPU at the North
Center Edge and the South Center
Edge of the CPU.

4. Align CPU Pin1 (the CPU corner

marked with a triangle) against the
socket corner that is marked with a
triangle cutout.

5. Align the CPU key that is the semi-

circle cutout below a gold dot against
the socket key, the Notch on the
same side of the triangle cutout on
the socket.

6. Once aligned, carefully lower the

CPU straight down into the socket.
(**Do not drop the CPU on the socket.
Do not move the CPU horizontally or
vertically. Do not rub the CPU against
the surface or against any pins of the
socket to avoid damage to the CPU
or the socket.)

Socket Key
(Socket Notch)

CPU Key (semi­circle cutout)
below the circle.

Corner with a
triangle cutout

North Center Edge

South Center Edge

gold dot

CPU Pin1

7. With the CPU inside the socket,

inspect the four corners of the CPU
to make sure that the CPU is properly
installed.

8. Use your thumb to gently push the

socket clip down to the clip lock.

9. If the CPU is properly installed into

the socket, the plastic cap will be
automatically released from the load
plate when the clip is pushed in the
clip lock. Remove the plastic cap from
the motherboard.

(*Warning: Please save the
plastic cap. The motherboard must be
shipped with the plastic cap properly
installed to protect the CPU socket
pins. Shipment without the plastic cap
properly installed will cause damage
to the socket pins.)

Socket clip

CPU in the CPU socket

Plastic cap
is released
from the
load plate
if the CPU
is properly
installed.

2-3

X7DB8+/X7DBE+ User's Manual

!

Installation of the Heatsink

CEK Heatsink Installation

1. Do not apply any thermal grease to the
heatsink or the CPU die because the re­quired amount has already been applied.

2. Place the heatsink on top of the CPU so
that the four mounting holes are aligned with
those on the retention mechanism.

3. Screw in two diagonal screws (ie the #1
and the #2 screws) until just snug (-do not
fully tighten the screws to avoid possible
damage to the CPU.)

CEK Passive Heatsink

Screw#1 Screw#2

Screw#1

4. Finish the installation by fully tightening
all four screws.

To Remove the Heatsink

(Warning: We do not recommend that

the CPU or the heatsink be removed.
However, if you do need to uninstall
the heatsink, please follow the instruc­tions below to uninstall the heatsink to
prevent damage done to the CPU or
the CPU socket.)

Screw#2

2-4

1. Unscrew and remove the heatsink screws
from the motherboard in the sequence as show
in the picture on the right.

2. Hold the heatsink as shown in the picture
on the right and gently wriggle the heatsink to
loosen it from the CPU. (Do not use excessive
force when wriggling the heatsink!!)

3. Once the CPU is loosened, remove the
heatsink from the CPU socket.

Chapter 2: Installation

4. Clean the surface of the CPU and the
heatsink to get rid of the old thermal grease.
Reapply the proper amount of thermal grease
on the surface before you re-install the CPU
and the heatsink.

Mounting the Motherboard in the Chassis

All motherboards have standard mounting holes to fi t different types of chas-
sis. Make sure that the locations of all the mounting holes for both motherboard
and chassis match. Make sure that the metal standoffs click in or are screwed in
tightly. Then, use a screwdriver to secure the motherboard onto the motherboard
tray. (*Note: some components are very close to the mounting holes. Please take
precautionary measures to prevent damage done to these components when you
install the motherboard to the chassis.)

2-5

X7DB8+/X7DBE+ User's Manual

2-3 Installing DIMMs

Note: Check the Super Micro web site for recommended memory modules.

CAUTION

Exercise extreme care when installing or removing DIMM

modules to prevent any possible damage. Also note that the

memory is interleaved to improve performance (see step 1).

DIMM Installation (See Figure 2-2)

1. Insert the desired number of DIMMs into the memory slots, starting with DIMM
#1A. The memory scheme is interleaved so you must install four modules at a
time, beginning with DIMM #1A, DIMM #2A, DIMM #3A, then DIMM #4A and so
on. For optimal memory performance, please install four modules at a time with
the maximum of 16 modules. (*See the Memory Installation Table Below.)

2. Insert each DIMM module vertically into its slot. Pay attention to the notch along
the bottom of the module to prevent inserting the DIMM module incorrectly.

3. Gently press down on the DIMM module until it snaps into place in the slot.
Repeat for all modules (see step 1 above).

Memory Support

The X7DB8+/X7DBE+ supports up to 32 GB (64 GB) fully buffered (FBD) ECC
DDR 2 533/667 in 16 DIMMs. Populating DIMM modules with pairs of memory
modules that are of the same size and same type in both Branch 0 and Branch

1 will result in interleaved memory. (See the table below.)
*Note 1: Due to OS limitations, some operating systems may not show more than

4 GB of memory.

DIMM Module Population Confi guration

To optimize memory support, follow the table below for memory installation:

Optimized DIMM Population Configurations
Branch 0 Branch 1
Number of
DIMMs
2 DIMMs 1A
4 DIMMs 1A
8 DIMMs 1A 1B
12 DIMMs 1A 1B 1C
16 DIMMs 1A 1B 1C 1D 2A 2B 2C 2D 3A 3B 3C 3D 4A 4B 4C 4D

(*Notes: i. DIMM slot# specified: DIMM slot to be populated; “---“: DIMM slot not to
be populated. ii. Both FBD 533 MHz and 667MHz DIMMs are supported; however,
you need to use the memory modules of the same speed and of the same type on a
motherboard. iii. Interleaved memory is supported when pairs of DIMM modules are
installed. For optimal memory performance, please install pairs of memory modules
in both
follow the restrictions listed above. )

Bank 1
(Channel 0)

--- --- ---

--- --- ---

--- ---

Bank 2
(Channel 1)
2A
2A
2A 2B

---

2A 2B 2C

Bank 3
(Channel 2)

--- --- --- --- --- --- --- --- --- --- ---

--- --- ---

--- ---

---

--- --- ---

3A
3A 3B
3A 3B 3C

--- ---

Bank 4
(Channel 3)

4A
4A 4B

---

4A 4B 4C

--- --- ---

--- ---

Branch 0 and Branch 1. iv. For memory to work properly, you need to

---

2-6

Chapter 2: Installation

u

*Note 2: Due to memory allocation to system devices, memory remaining available

for operational use will be reduced when 4 GB of RAM is used. The reduction in
memory availability is disproportional. (*See the Memory Availability Table below.)

Possible System Memory Allocation & Availability

System Device Size Physical Memory

Remaining (-Available)
(4 GB Total System Memory)

Firmware Hub fl ash memory (System

1 MB 3.99GB

BIOS)
Local APIC 4 KB 3.99GB
Area Reserved for the chipset 2 MB 3.99GB
I/O APIC (4 Kbytes) 4 KB 3.99GB
PCI Enumeration Area 1 256 MB 3.76GB
PCI Express (256 MB) 256 MB 3.51GB
PCI Enumeration Area 2 (if needed)

512 MB 3.01GB

-Aligned on 256-MB boundary­VGA Memory 16 MB 2.85GB
TSEG 1 MB 2.84GB
Memory available for the OS & other

2.84GB

applications

Introd

Notch

DIMM2 FBD

Notch

JLAN1

®

UPER X7DB8+

S

To Remove:

Use your thumbs
to gently push
the release tabs
near both ends of
the module. This
should release it
from the slot.

Release

Tab

Note: Notch

should align

with the

receptive point

on the slot

Release

Tab

To Install: Insert module vertically and press down until it

snaps into place. Pay attention to the alignment notch at
the bottom.

2 FBD

2-7

X7DB8+/X7DBE+ User's Manual

u

123

4

5

678

9

2-4 Control Panel Connectors/IO Ports

The I/O ports are color coded in conformance with the PC 99 specifi cation. See the
fi gure below for the colors and locations of the various I/O ports.

A. Back Panel Connectors/IO Ports

Introd

JLAN1

®

UPER X7DB8+

S

Back Panel I/O Port Locations and Defi nitions

Back Panel Connectors

1. Keyboard (Purple)

2. PS/2 Mouse (Green)

3. Back Panel USB Port 0

4. Back Panel USB Port 1

5. COM Port 1 (Turquoise)

6. VGA Port (Blue)

7. Parallel Port (Printer)

8. Gigabit LAN 1

9. Gigabit LAN 2

(*See Section 2-5 for details.)

2-8

Chapter 2: Installation

u

B. Front Control Panel

JF1 contains header pins for various buttons and indicators that are normally lo­cated on a control panel at the front of the chassis. These connectors are designed
specifi cally for use with Super Micro server chassis. See the fi gure below for the
descriptions of the various control panel buttons and LED indicators. Refer to the
following section for descriptions and pin defi nitions.

JF1 Header Pins

1920

Introd

Ground

NMI

JLAN1

®

UPER X7DB8+

S

X

Power LED

HDD LED

NIC1 LED

NIC2 LED

OH/Fan Fail LED

PWR Fail LED

Ground

Ground

X

Vcc

Vcc

Vcc

Vcc

Vcc

Vcc

Reset

PWR

2

1

Reset Button

Power Button

2-9

X7DB8+/X7DBE+ User's Manual

C. Front Control Panel Pin Defi nitions

NMI Button

The non-maskable interrupt button
header is located on pins 19 and 20
of JF1. Refer to the table on the right
for pin defi nitions.

Power LED

The Power LED connection is located
on pins 15 and 16 of JF1. Refer to the
table on the right for pin defi nitions.

NMI Button

Pin Defi nitions (JF1)

Pin# Defi nition
19 Control
20 Ground

Power LED

Pin Defi nitions (JF1)

Pin# Defi nition
15 +5V
16 Ground

A. NMI
B. PWR LED

Fan5

Fan6

KB/
Mouse

USB0/1

COM1

Parrallel

Port

JLAN1

VGA

GLAN1

GLAN2

®

UPER X7DB8+

S

Slot7

JPG1

Slot6

PCI-Exp x8

VGA

CTRL

Slot5

PCI-Exp x8

Slot4

PCI-Exp x4

Slot3

PCI-X 133 MHz

LAN

CTRL

Slot2

PCI-X 133 MHz

S I/O

Slot1

PCI-X 100 MHz ZCR

JCOM2

DIMM 4D (Bank 4)
DIMM 4C (Bank 4)
DIMM 4B (Bank 4)

DIMM 4A (Bank 4)

DIMM 3D (Bank 3)
DIMM 3C (Bank 3)
DIMM 3B (Bank 3)

DIMM 3A (Bank 3)

DIMM 2D (Bank 2)
DIMM 2C (Bank 2)
DIMM 2B (Bank 2)

DIMM 2A (Bank 2)

DIMM 1D (Bank 1)
DIMM 1C (Bank 1)
DIMM 1B (Bank 1)

DIMM 1A (Bank 1)

SIMLP IPMI

JWD

JPL1
JPL2

JWOR

J28
J27

SEPC

Battery

BIOS

North Bridge

JK1

SATA0

Fan7

3rd PWR

PWR

Detect

Fault

PWRSMB

JAR

CPU1

CPU2

JBT1

South

Bridge

J7

USB4

PXH

JUSB3

JWOL

DA2

USB2/3

SMB

SATA5

SATA4

SATA1

JL1

SATA2

SATA3

JPA1

Introdu

SCSI CTRL

320 SCSI Channel B

PWR

FP Ctrl

Ground

Fan1

X

B

Fan2

SPK

PW LED

JP1

LE1

JOH1

Fan3

Fan8

SGPIO2

SGPIO1

JCF1

JWF1

IDE1

Floppy

Compact Flash

JPA2

JPA3

Power LED

HDD LED

NIC1 LED

NIC2 LED

OH/Fan Fail LED

PWR Fail LED

Ground

320 SCSI Channel A

DA1

Fan4

Ground

1920

NMI

A

X

Vcc

Vcc

Vcc

Vcc

Vcc

Vcc

Reset

Reset Button

Power Button

PWR

2

1

8-pin PWR

4-Pin

24-Pin

ATX PWR

2-10

Chapter 2: Installation

HDD LED

The HDD LED connection is located
on pins 13 and 14 of JF1. Attach the
hard drive LED cable here to display
disk activity (for any hard drives on the
system, including SAS, Serial ATA and
IDE). See the table on the right for pin
defi nitions.

NIC1/NIC2 LED Indicators

The NIC (Network Interface Control­ler) LED connection for GLAN port1 is
located on pins 11 and 12 of JF1 and
the LED connection for GLAN Port2
is on Pins 9 and 10. Attach the NIC
LED cables to display network activity .
Refer to the table on the right for pin
defi nitions.

HDD LED

Pin Defi nitions (JF1)

Pin# Defi nition
13 +5V
14 HD Active

GLAN1/2 LED

Pin Defi nitions (JF1)

Pin# Defi nition
9/11 Vcc
10/12 Ground

A. HDD LED
B. NIC1 LED
C. NIC2 LED

Fan5

Fan6

KB/
Mouse

USB0/1

COM1

Parrallel

Port

JLAN1

VGA

GLAN1

GLAN2

UPER X7DB8+

S

Slot7

JPG1

Slot6

VGA

CTRL

Slot5

Slot4

Slot3

PCI-X 133 MHz

LAN

CTRL

Slot2

PCI-X 133 MHz

S I/O

Slot1

PCI-X 100 MHz ZCR

JCOM2

®

SIMLP IPMI

PCI-Exp x8

PCI-Exp x8

PCI-Exp x4

JWD

JPL1
JPL2

JWOR

DIMM 4D (Bank 4)
DIMM 4C (Bank 4)
DIMM 4B (Bank 4)

DIMM 4A (Bank 4)

DIMM 3D (Bank 3)
DIMM 3C (Bank 3)
DIMM 3B (Bank 3)

DIMM 3A (Bank 3)

DIMM 2D (Bank 2)
DIMM 2C (Bank 2)
DIMM 2B (Bank 2)

DIMM 2A (Bank 2)

DIMM 1D (Bank 1)
DIMM 1C (Bank 1)
DIMM 1B (Bank 1)

DIMM 1A (Bank 1)

SEPC

Battery

J28
J27

BIOS

North Bridge

JK1

SATA0

Fan7

3rd PWR

PWR

Detect

Fault

PWRSMB

JAR

CPU1

CPU2

JBT1

South
Bridge

J7

USB4

PXH

JUSB3

JWOL

DA2

USB2/3

SMB

SATA5

SATA4

SATA1

JL1

SATA2

SATA3

JPA1

Introdu

SCSI CTRL

320 SCSI Channel B

JWF1

SGPIO2

SGPIO1

PWR

FP Ctrl

Fan1

Ground

X

Fan2

SPK

PW LED

JP1

LE1

JOH1

Fan3

Fan8

JCF1

IDE1

Floppy

Compact Flash

JPA3

JPA2

Power LED

HDD LED

A

B

NIC1 LED

NIC2 LED

C

OH/Fan Fail LED

PWR Fail LED

Ground

320 SCSI Channel A

DA1

Fan4

Ground

1920

NMI

X

Vcc

Vcc

Vcc

Vcc

Vcc

Vcc

Reset

Reset Button

Power Button

PWR

2

1

8-pin PWR

4-Pin

24-Pin

ATX PWR

2-11

X7DB8+/X7DBE+ User's Manual

Overheat/Fan Fail LED (OH)

Connect an LED to the OH/Fan Fail
connection on pins 7 and 8 of JF1 to
provide advanced warning of chassis
overheating or fan failure. Refer to the
table on the right for pin defi nitions.

Power Fail LED

The Power Fail LED connection is
located on pins 5 and 6 of JF1. Refer
to the table on the right for pin defi ni-
tions.

OH/Fan Fail LED

Pin Defi nitions (JF1)

Pin# Defi nition
7 Vcc
8 Ground

OH/Fan Fail Indicator

Status

State Defi nition
Off Normal
On Overheat
Flash-

Fan Fail

ing

PWR Fail LED

Pin Defi nitions (JF1)

Pin# Defi nition
5 Vcc
6 Ground

A. OH/Fan Fail LED
B. PWR Supply Fail

DIMM 4D (Bank 4)

Slot7

Slot6

Slot5

Slot4

Slot3

Slot2

Slot1

DIMM 4C (Bank 4)
DIMM 4B (Bank 4)

DIMM 4A (Bank 4)

DIMM 3D (Bank 3)
DIMM 3C (Bank 3)
DIMM 3B (Bank 3)

DIMM 3A (Bank 3)

DIMM 2D (Bank 2)
DIMM 2C (Bank 2)
DIMM 2B (Bank 2)

DIMM 2A (Bank 2)

DIMM 1D (Bank 1)
DIMM 1C (Bank 1)
DIMM 1B (Bank 1)

DIMM 1A (Bank 1)

®

SIMLP IPMI

JPG1

PCI-Exp x8

PCI-Exp x8

PCI-Exp x4

JWD

PCI-X 133 MHz

JPL1
JPL2

PCI-X 133 MHz

JWOR

PCI-X 100 MHz ZCR

J28
J27

SEPC

Battery

Fan5

Fan6

KB/
Mouse

USB0/1

COM1

Parrallel

Port

JLAN1

VGA

GLAN1

GLAN2

UPER X7DB8+

S

VGA

CTRL

LAN

CTRL

S I/O

JCOM2

BIOS

North Bridge

JK1

SATA0

Fan7

3rd PWR

PWR

Detect

Fault

PWRSMB

JAR

CPU1

CPU2

JBT1

South

Bridge

J7

USB4

PXH

JUSB3

JWOL

DA2

USB2/3

SMB

SATA5

SATA4

JL1

SATA3

SATA2

SATA1

Introdu

SCSI CTRL

JPA1

320 SCSI Channel B

JWF1

SGPIO2

SGPIO1

PWR

FP Ctrl

Ground

Fan1

X

Fan2

SPK

PW LED

JP1

LE1

JOH1

Fan3

Fan8

JCF1

IDE1

Floppy

Compact Flash

JPA2

JPA3

Power LED

HDD LED

NIC1 LED

NIC2 LED

OH/Fan Fail LED

A

PWR Fail LED

B

Ground

320 SCSI Channel A

DA1

Fan4

Ground

1920

NMI

X

Vcc

Vcc

Vcc

Vcc

Vcc

Vcc

Reset

Reset Button

Power Button

PWR

2

1

8-pin PWR

4-Pin

24-Pin

ATX PWR

2-12

Chapter 2: Installation

Reset Button

The Reset Button connection is located
on pins 3 and 4 of JF1. Attach it to the
hardware reset switch on the computer
case. Refer to the table on the right for
pin defi nitions.

Power Button

The Power Button connection is located
on pins 1 and 2 of JF1. Momentarily
contacting both pins will power on/off
the system. This button can also be con­fi gured to function as a suspend button
(with a setting in the BIOS - see Chapter

4). To turn off the power when set to
suspend mode, press the button for at
least 4 seconds. Refer to the table on
the right for pin defi nitions.

Reset Button

Pin Defi nitions (JF1)

Pin# Defi nition
3 Reset
4 Ground

Power Button

Pin Defi nitions (JF1)

Pin# Defi nition

1 Signal
2 +3V Standby

A. Reset Button
B. PWR Button

Fan5

Fan6

KB/
Mouse

USB0/1

COM1

Parrallel

Port

JLAN1

VGA

GLAN1

GLAN2

®

UPER X7DB8+

S

Slot7

SIMLP IPMI

JPG1

Slot6

PCI-Exp x8

VGA

CTRL

Slot5

PCI-Exp x8

Slot4

PCI-Exp x4

JWD

Slot3

PCI-X 133 MHz

LAN

JPL1
JPL2

CTRL

Slot2

PCI-X 133 MHz

Slot1

JWOR

PCI-X 100 MHz ZCR

S I/O

JCOM2

DIMM 4D (Bank 4)
DIMM 4C (Bank 4)
DIMM 4B (Bank 4)

DIMM 4A (Bank 4)

DIMM 3D (Bank 3)
DIMM 3C (Bank 3)
DIMM 3B (Bank 3)

DIMM 3A (Bank 3)

DIMM 2D (Bank 2)
DIMM 2C (Bank 2)
DIMM 2B (Bank 2)

DIMM 2A (Bank 2)

DIMM 1D (Bank 1)
DIMM 1C (Bank 1)
DIMM 1B (Bank 1)

DIMM 1A (Bank 1)

SEPC

Battery

J28
J27

BIOS

North Bridge

JK1

SATA0

Fan7

3rd PWR

PWR

Detect

Fault

PWRSMB

JAR

CPU1

CPU2

JBT1

South
Bridge

J7

USB4

PXH

JUSB3

JWOL

DA2

USB2/3

SMB

SATA5

SATA4

SATA1

JL1

SATA2

SATA3

JPA1

Introdu

SCSI CTRL

320 SCSI Channel B

JWF1

SGPIO2

SGPIO1

PWR

FP Ctrl

Ground

Fan1

X

Fan2

SPK

PW LED

JP1

LE1

JOH1

Fan3

Fan8

JCF1

IDE1

Floppy

Compact Flash

JPA2

JPA3

Power LED

HDD LED

NIC1 LED

NIC2 LED

OH/Fan Fail LED

PWR Fail LED

Ground

1920

NMI

X

Vcc

Vcc

Vcc

Vcc

Vcc

Vcc

Reset

Reset Button

A

320 SCSI Channel A

DA1

Fan4

Ground

2

1

PWR

Power Button

B

8-pin PWR

4-Pin

24-Pin

ATX PWR

2-13

X7DB8+/X7DBE+ User's Manual

2-5 Connecting Cables

ATX Power Connector

There are a 24-pin main power sup­ply connector(JPW1) and an 8-pin
CPU PWR connector (JPW3) on the
motherboard. These power connec­tors meet the SSI EPS 12V specifi ca-
tion. The 4-pin 12V PWR supply is
required to provide adequate power
to the system. See the table on the
right for pin defi nitions. For the 8-pin
PWR (JPW3), please refer to the item
listed below.

Processor Power Connector

In addition to the Primary ATX power
connector (above), the 12V 8-pin CPU
PWR connector at JPW3 must also
be connected to your power supply.
See the table on the right for pin
defi nitions.

DIMM 4D (Bank 4)

®

SIMLP IPMI

JPG1

Slot6

PCI-Exp x8

Slot5

PCI-Exp x8

Slot4

PCI-Exp x4

JWD

PCI-X 133 MHz

JPL1

JPL2

PCI-X 133 MHz

JWOR

PCI-X 100 MHz ZCR

DIMM 4C (Bank 4)
DIMM 4B (Bank 4)

DIMM 4A (Bank 4)

DIMM 3D (Bank 3)
DIMM 3C (Bank 3)
DIMM 3B (Bank 3)

DIMM 3A (Bank 3)

DIMM 2D (Bank 2)
DIMM 2C (Bank 2)
DIMM 2B (Bank 2)

DIMM 2A (Bank 2)

DIMM 1D (Bank 1)
DIMM 1C (Bank 1)
DIMM 1B (Bank 1)

DIMM 1A (Bank 1)

SEPC

Battery

BIOS

J28
J27

North Bridge

JK1

SATA0

3rd PWR

PWR

Detect

Fault

PWRSMB

JAR

JBT1

J7

USB4

PXH

JUSB3

JWOL

USB2/3

SMB

SATA1

SATA5

SATA4

JL1

SATA3

SATA2

Fan5

Fan6

KB/
Mouse

USB0/1

COM1

Parrallel

Port

JLAN1

VGA

GLAN1

GLAN2

UPER X7DB8+

S

Slot7

VGA
CTRL

Slot3

LAN

CTRL

Slot2

S I/O

Slot1

JCOM2

Fan7

CPU1

CPU2

South
Bridge

DA2

JPA1

A

24-Pin

ATX PWR

Introdu

SCSI CTRL

320 SCSI Channel B

SGPIO2

SGPIO1

JWF1

ATX Power 20-pin Connector

Pin Defi nitions

Pin# Defi nition Pin # Defi nition
13 +3.3V 1 +3.3V
14 -12V 2 +3.3V
15 COM 3 COM
16 PS_ON 4 +5V
17 COM 5 COM
18 COM 6 +5V
19 COM 7 COM
20 Res (NC) 8 PWR_OK
21 +5V 9 5VSB
22 +5V 10 +12V
23 +5V 11 +12V
24 COM 12 +3.3V

Required Connection

12V 4-pin Power Con-

nector

Pin Defi nitions

Pins Defi nition
1 and 2 Ground
3 and 4 +12V

Required Connection

12V 8-pin Power Con-

nector

Pin Defi nitions

C

4-Pin
PWR

B

8-pin PWR

FP Ctrl

Pins Defi nition
1 through 4 Ground
5 through 8 +12V

Fan1

A. 24-pin ATX PWR
B. 8-pin Processor PWR
C. 4-pin PWR

JCF1

JPA3

JPA2

Floppy

Compact Flash

Fan2

SPK

PW LED

JP1

LE1

JOH1

Fan3

Fan8

IDE1

320 SCSI Channel A

DA1

Fan4

2-14

Chapter 2: Installation

D

Universal Serial Bus (USB)

There are fi ve USB 2.0 (Universal Se-
rial Bus) ports/headers on the moth­erboard. Two of them are Back Panel
USB ports (USB#0/1:JUSB1), and
the other three are Front Panel USB
headers (USB#2/3:JUSB2, USB#4:
JUSB3). See the tables on the right
for pin defi nitions.

Chassis Intrusion

A Chassis Intrusion header is located
at JL1 on the motherboard. Attach the
appropriate cable from the chassis to
inform you of a chassis intrusion when
the chassis is opened.

Back Panel USB

(USB0/1)

Pin# Defi nitions
1 +5V
2 PO­3 PO+
4 Ground
5 N/A

Front Panel USB

Pin Defi nitions (USB4)

USB2/4
Pin # Defi nition

USB3

Pin # Defi nition
1 +5V 1 +5V
2 PO- 2 PO­3 PO+ 3 PO+
4 Ground 4 Ground
5 Key 5 No connection

Chassis Intrusion

Pin Defi nitions (JL1)

Pin# Defi nition
1 Intrusion Input
2 Ground

Fan5

Fan6

KB/
Mouse

USB0/1

COM1

A

Parrallel

Port

JLAN1

VGA

GLAN1

GLAN2

UPER X7DB8+

S

Slot7

JPG1

Slot6

VGA

CTRL

Slot5

Slot4

Slot3

LAN

CTRL

Slot2

S I/O

Slot1

JCOM2

DIMM 4D (Bank 4)
DIMM 4C (Bank 4)
DIMM 4B (Bank 4)

DIMM 4A (Bank 4)

DIMM 3D (Bank 3)
DIMM 3C (Bank 3)
DIMM 3B (Bank 3)

DIMM 3A (Bank 3)

DIMM 2D (Bank 2)
DIMM 2C (Bank 2)
DIMM 2B (Bank 2)

DIMM 2A (Bank 2)

DIMM 1D (Bank 1)
DIMM 1C (Bank 1)
DIMM 1B (Bank 1)

DIMM 1A (Bank 1)

®

SIMLP IPMI

PCI-Exp x8

PCI-Exp x8

PCI-Exp x4

JWD

PCI-X 133 MHz

JPL1
JPL2

PCI-X 133 MHz

JWOR

PCI-X 100 MHz ZCR

SEPC

Battery

J28
J27

BIOS

North Bridge

JK1

SATA0

8-pin PWR

ATX PWR

4-Pin
PWR

FP Ctrl

Fan1

24-Pin

Fan7

3rd PWR

PWRSMB

Detect

Introdu

PWR
Fault

JAR

A. Backpanel USB 0-1

JBT1

CPU1

CPU2

SGPIO2

SGPIO1

JWF1

South
Bridge

J7

JCF1

JPA3

JPA2

Floppy

Fan2

SPK

PW LED

JP1

LE1

JOH1

Fan3

Fan8

IDE1

Compact Flash

B. Front Panel USB 2-3
C. Front Panel USB 4
D. Chassis Intrusion

C

USB4

PXH

JUSB3

JWOL

SCSI CTRL

DA2

B

USB2/3

SMB

SATA1

SATA5

SATA4

JL1

SATA2

SATA3

JPA1

320 SCSI Channel B

320 SCSI Channel A

DA1

Fan4

2-15

X7DB8+/X7DBE+ User's Manual

G

F

E

D

H

I

Fan Headers

The X7DB8+/X7DBE+ has six chassis/system
fan headers (Fan1 to Fan6) and two CPU Fans
(Fans 7/8). (*Note: Fans 5/6/7/8 are 4-pin fans.
However, Pins 1-3 of these fan headers are
backward compatible with the traditional 3-pin
fans.) See the table on the right for pin defi ni-
tions. (*The onboard fan speeds are controlled
by Thermal Management via BIOS Hardware
Monitor in the Advanced Setting. Note: Default:
Disabled, When using Thermal Management
setting, please use all 3-pin fans or all 4-pin
fans on the motherboard.)

Keylock

The keyboard lock connection is located at
JK1. Utilizing this header allows you to inhibit
any actions made on the keyboard, effectively
"locking" it.

Fan Header

Pin Defi nitions (Fan1-8)

Pin# Defi nition
1 Ground
2 +12V
3 Tachometer
4 PWR Modulation

Keylock

Pin Defi nitions

Pin# Defi nition
1 Ground
2 Keylock R-N

Fan5

Fan6

KB/
Mouse

USB0/1

COM1

Parrallel

Port

JLAN1

VGA

GLAN1

GLAN2

®

UPER X7DB8+

S

Slot7

JPG1

Slot6

VGA
CTRL

Slot5

Slot4

Slot3

PCI-X 133 MHz

LAN

CTRL

Slot2

Slot1

PCI-X 133 MHz

PCI-X 100 MHz ZCR

S I/O

JCOM2

DIMM 4D (Bank 4)
DIMM 4C (Bank 4)
DIMM 4B (Bank 4)

DIMM 4A (Bank 4)

DIMM 3D (Bank 3)
DIMM 3C (Bank 3)
DIMM 3B (Bank 3)

DIMM 3A (Bank 3)

DIMM 2D (Bank 2)
DIMM 2C (Bank 2)
DIMM 2B (Bank 2)

DIMM 2A (Bank 2)

DIMM 1D (Bank 1)
DIMM 1C (Bank 1)
DIMM 1B (Bank 1)

DIMM 1A (Bank 1)

SIMLP IPMI

PCI-Exp x8

PCI-Exp x8

PCI-Exp x4

JWD

JPL1

JPL2

JWOR

J28
J27

SEPC

Battery

BIOS

North Bridge

JK1

SATA0

8-pin PWR

ATX PWR

4-Pin
PWR

FP Ctrl

Fan1

24-Pin

Fan7

3rd PWR

PWRSMB

Detect

Introdu

PWR
Fault

JAR

A

CPU1

CPU2

SGPIO2

SGPIO1

SCSI CTRL

JPA1

320 SCSI Channel B

JCF1

JWF1

JBT1

South
Bridge

J7

USB4

PXH

JUSB3

JWOL

DA2

USB2/3

SMB

SATA1

SATA5

SATA4

JL1

SATA3

SATA2

JPA3

JPA2

Floppy

Compact Flash

Fan2

B

SPK

PW LED

JP1

LE1

JOH1

C

Fan3

Fan8

IDE1

320 SCSI Channel A

DA1

Fan4

A. Fan 1
B. Fan 2
C. Fan 3
D. Fan 4
E. Fan 5
F. Fan 6
G. Fan 7 (CPU Fan 1)
H. Fan 8 (CPU Fan 2)
I. Keylock

2-16

Chapter 2: Installation

ATX PS/2 Keyboard and
PS/2 Mouse Ports

The ATX PS/2 keyboard and the PS/2
mouse are located at JKM1. See the
table on the right for pin defi nitions.
(The mouse port is above the key­board port. See the table on the right
for pin defi nitions.)

Serial Ports

COM1 is a connector located on the
IO Backpanel and COM2 is a header
located at JCOM2. See the table on
the right for pin defi nitions.

PS/2 Keyboard and

Mouse Port Pin

Defi nitions

Pin# Defi nition
1 Data
2NC
3 Ground
4 VCC
5 Clock
6NC

Serial Port Pin Defi nitions

(COM1/COM2)

Pin # Defi nition Pin # Defi nition
1 CD 6 DSR
2RD 7RTS
3 TD 8 CTS
4 DTR 9 RI
5 Ground 10 NC

Fan5

Fan6

KB/
Mouse

A

USB0/1

COM1

B

Parrallel

Port

JLAN1

VGA

GLAN1

GLAN2

UPER X7DB8+

S

Slot7

JPG1

Slot6

VGA

CTRL

Slot5

Slot4

Slot3

LAN

CTRL

Slot2

S I/O

Slot1

C

JCOM2

DIMM 4D (Bank 4)
DIMM 4C (Bank 4)
DIMM 4B (Bank 4)

DIMM 4A (Bank 4)

DIMM 3D (Bank 3)
DIMM 3C (Bank 3)
DIMM 3B (Bank 3)

DIMM 3A (Bank 3)

DIMM 2D (Bank 2)
DIMM 2C (Bank 2)
DIMM 2B (Bank 2)

DIMM 2A (Bank 2)

DIMM 1D (Bank 1)
DIMM 1C (Bank 1)
DIMM 1B (Bank 1)

DIMM 1A (Bank 1)

®

SIMLP IPMI

PCI-Exp x8

PCI-Exp x8

PCI-Exp x4

JWD

PCI-X 133 MHz

JPL1
JPL2

PCI-X 133 MHz

JWOR

PCI-X 100 MHz ZCR

SEPC

Battery

J28
J27

BIOS

North Bridge

JK1

SATA0

(Pin 10 is available on COM2
only. NC: No Connection.)

8-pin PWR

24-Pin

Fan7

3rd PWR

PWRSMB

JBT1

J7

USB2/3

Detect

USB4

JWOL

SATA5

SATA3

JUSB3

Introdu

CPU1

CPU2

South
Bridge

DA2

JPA1

PWR
Fault

JAR

PXH

SMB

SATA4

JL1

SATA2

SATA1

4-Pin

ATX PWR

PWR

SGPIO2

SGPIO1

JCF1

JWF1

JPA2

JPA3

SCSI CTRL

320 SCSI Channel B

Floppy

FP Ctrl

Compact Flash

Fan1

Fan2

SPK

PW LED

JP1

LE1

JOH1

Fan3

Fan8

IDE1

320 SCSI Channel A

DA1

Fan4

A. Keyboard/Mouse
B. COM1
C. COM2

2-17

X7DB8+/X7DBE+ User's Manual

Wake-On-Ring

The Wake-On-Ring header is des­ignated JWOR. This function allows
your computer to receive and be
awakened by an incoming call to the
modem when the system is in the
suspend state. See the table on the
right for pin defi nitions. Y ou must have
a Wake-On-Ring card and cable to
use this feature.

Wake-On-LAN

The Wake-On-LAN header is located
at JWOL on the motherboard. See the
table on the right for pin defi nitions.
(You must also have a LAN card with
a Wake-On-LAN connector and cable
to use this feature.)

Wake-On-Ring
Pin Defi nitions

(JWOR)

Pin# Defi nition
1 Ground
2 Wake-up

Wake-On-LAN

Pin Defi nitions

(JWOL)

Pin# Defi nition
1 +5V Standby
2 Ground
3 Wake-up

Fan5

Fan6

KB/
Mouse

USB0/1

COM1

Parrallel

Port

JLAN1

VGA

GLAN1

GLAN2

®

UPER X7DB8+

S

Slot7

JPG1

Slot6

VGA
CTRL

Slot5

Slot4

Slot3

PCI-X 133 MHz

LAN

CTRL

Slot2

Slot1

PCI-X 133 MHz

PCI-X 100 MHz ZCR

S I/O

JCOM2

DIMM 4D (Bank 4)
DIMM 4C (Bank 4)
DIMM 4B (Bank 4)

DIMM 4A (Bank 4)

DIMM 3D (Bank 3)
DIMM 3C (Bank 3)
DIMM 3B (Bank 3)

DIMM 3A (Bank 3)

DIMM 2D (Bank 2)
DIMM 2C (Bank 2)
DIMM 2B (Bank 2)

DIMM 2A (Bank 2)

DIMM 1D (Bank 1)
DIMM 1C (Bank 1)
DIMM 1B (Bank 1)

DIMM 1A (Bank 1)

SIMLP IPMI

PCI-Exp x8

PCI-Exp x8

PCI-Exp x4

JWD

JPL1

JPL2

JWOR

8-pin PWR

ATX PWR

4-Pin
PWR

FP Ctrl

Fan1

24-Pin

Fan7

3rd PWR

PWRSMB

Detect

Introdu

PWR
Fault

JAR

A. WOR

CPU1

CPU2

North Bridge

SGPIO2

SGPIO1

B

SCSI CTRL

JPA1

320 SCSI Channel B

JCF1

JWF1

SEPC

Battery

BIOS

J28
J27

A

JK1

SATA0

JBT1

South
Bridge

J7

USB4

PXH

JUSB3

JWOL

DA2

USB2/3

SMB

SATA1

SATA5

SATA4

JL1

SATA3

SATA2

JPA3

JPA2

Floppy

Compact Flash

Fan2

SPK

PW LED

JP1

LE1

JOH1

Fan3

Fan8

IDE1

320 SCSI Channel A

DA1

Fan4

B. WOL

2-18

GLAN 1/2 (Giga-bit Ethernet
Ports)

Chapter 2: Installation

Two G-bit Ethernet ports are desig­nated JLAN1 and JLAN2 on the IO
backplane. This port accepts RJ45
type cables.

Power LED/Speaker

On the JD1 header, pins 1-3 are for
a power LED and pins 4-7 are for the
speaker. See the table on the right
for speaker pin definitions. *Note:
The speaker connector pins are for
use with an external speaker. If you
wish to use the onboard speaker, you
should close pins 6-7 with a jumper.

GLAN1

GLAN2

Speaker Connector

Pin Setting Defi nition
Pins 6-7 Internal Speaker
Pins 4-7 External Speaker

Fan5

Fan6

KB/
Mouse

USB0/1

COM1

Parrallel

Port

JLAN1

VGA

GLAN1

A

GLAN2

UPER X7DB8+

S

Slot7

JPG1

Slot6

VGA

CTRL

Slot5

Slot4

Slot3

LAN

CTRL

Slot2

S I/O

Slot1

JCOM2

DIMM 4D (Bank 4)
DIMM 4C (Bank 4)
DIMM 4B (Bank 4)

DIMM 4A (Bank 4)

DIMM 3D (Bank 3)
DIMM 3C (Bank 3)
DIMM 3B (Bank 3)

DIMM 3A (Bank 3)

DIMM 2D (Bank 2)
DIMM 2C (Bank 2)
DIMM 2B (Bank 2)

DIMM 2A (Bank 2)

DIMM 1D (Bank 1)
DIMM 1C (Bank 1)
DIMM 1B (Bank 1)

DIMM 1A (Bank 1)

®

SIMLP IPMI

PCI-Exp x8

PCI-Exp x8

PCI-Exp x4

JWD

PCI-X 133 MHz

JPL1
JPL2

PCI-X 133 MHz

JWOR

PCI-X 100 MHz ZCR

SEPC

Battery

J28
J27

BIOS

North Bridge

JK1

SATA0

8-pin PWR

ATX PWR

4-Pin
PWR

FP Ctrl

Fan1

24-Pin

Fan7

3rd PWR

PWRSMB

Detect

Introdu

PWR
Fault

JAR

A. GLAN1/2

CPU1

CPU2

SGPIO2

SGPIO1

JBT1

J7

USB4

PXH

JUSB3

JWOL

USB2/3

SMB

SATA1

SATA5

SATA4

JL1

SATA3

SATA2

South
Bridge

DA2

JPA1

JWF1

SCSI CTRL

320 SCSI Channel B

JCF1

JPA3

JPA2

Floppy

Compact Flash

Fan2

SPK

B

PW LED

JP1

LE1

JOH1

Fan3

Fan8

IDE1

320 SCSI Channel A

DA1

Fan4

B. PWR LED/Speaker

2-19

X7DB8+/X7DBE+ User's Manual

Power Fault (PWR Supply
Failure)

Connect a cable from your power sup­ply to the Power Fail header to provide
warnings of power supply failure. This
warning signal is passed through the
PWR_LED pin to indicate of a power
failure on the chassis. See the table
on the right for pin defi nitions.

Alarm Reset

If three power supplies are installed
and Alarm Reset (JAR) is enabled, the
system will notify you when any of the
three power modules fails. Connect
JAR to a micro-switch to enable you
to turn off the alarm that is activated
when a power module fails. See the
table on the right for pin defi nitions.

PWR Supply Fail LED

Pin Defi nitions

Pin# Defi nition
1 PWR 1: Fail
2 PWR 2: Fail

3 PWR 3: Fail
4 Signal: Alarm Reset

Note: This feature is only available when using
Super Micro redundant power supplies.

Alarm Reset

Pin Setting Defi nition
Pin 1 Ground
Pin 2 +5V

Fan5

Fan6

KB/
Mouse

USB0/1

COM1

Parrallel

Port

JLAN1

VGA

GLAN1

GLAN2

®

UPER X7DB8+

S

Slot7

JPG1

Slot6

VGA
CTRL

Slot5

Slot4

Slot3

PCI-X 133 MHz

LAN

CTRL

Slot2

Slot1

PCI-X 133 MHz

PCI-X 100 MHz ZCR

S I/O

JCOM2

DIMM 4D (Bank 4)
DIMM 4C (Bank 4)
DIMM 4B (Bank 4)

DIMM 4A (Bank 4)

DIMM 3D (Bank 3)
DIMM 3C (Bank 3)
DIMM 3B (Bank 3)

DIMM 3A (Bank 3)

DIMM 2D (Bank 2)
DIMM 2C (Bank 2)
DIMM 2B (Bank 2)

DIMM 2A (Bank 2)

DIMM 1D (Bank 1)
DIMM 1C (Bank 1)
DIMM 1B (Bank 1)

DIMM 1A (Bank 1)

SIMLP IPMI

PCI-Exp x8

PCI-Exp x8

PCI-Exp x4

JWD

JPL1

JPL2

JWOR

J28
J27

SEPC

Battery

BIOS

North Bridge

JK1

SATA0

8-pin PWR

ATX PWR

4-Pin
PWR

FP Ctrl

Fan1

24-Pin

Fan7

3rd PWR

A

PWRSMB

B

Detect

Introdu

PWR
Fault

JAR

A. Power Fault

CPU1

CPU2

SGPIO2

SGPIO1

SCSI CTRL

JPA1

320 SCSI Channel B

JCF1

JWF1

JBT1

South
Bridge

J7

USB4

PXH

JUSB3

JWOL

DA2

USB2/3

SMB

SATA1

SATA5

SATA4

JL1

SATA3

SATA2

JPA3

JPA2

Floppy

Compact Flash

Fan2

SPK

PW LED

JP1

LE1

JOH1

Fan3

Fan8

IDE1

320 SCSI Channel A

DA1

Fan4

B. Alarm Reset

2-20

Chapter 2: Installation

Overheat LED/Fan Fail
(JOH1)

The JOH1 header is used to connect
an LED to provide warning of chassis
overheating. This LED will blink to in­dicate a fan failure. Refer to the table
on right for pin defi nitions.

SMB

A System Management Bus header is
located at J18. Connect the appropri­ate cable here to utilize SMB on your
system.

Overheat LED

Pin Defi nitions

Pin# Defi nition
1 5vDC
2 OH Active

OH/Fan Fail LED

State Message
Solid Overheat
Blinking Fan Fail

SMB Header

Pin Defi nitions

Pin# Defi nition
1 Data
2 Ground
3 Clock
4 No Connection

Fan5

Fan6

KB/
Mouse

USB0/1

COM1

Parrallel

Port

JLAN1

VGA

GLAN1

GLAN2

UPER X7DB8+

S

Slot7

JPG1

Slot6

VGA

CTRL

Slot5

Slot4

Slot3

LAN

CTRL

Slot2

S I/O

Slot1

JCOM2

DIMM 4D (Bank 4)
DIMM 4C (Bank 4)
DIMM 4B (Bank 4)

DIMM 4A (Bank 4)

DIMM 3D (Bank 3)
DIMM 3C (Bank 3)
DIMM 3B (Bank 3)

DIMM 3A (Bank 3)

DIMM 2D (Bank 2)
DIMM 2C (Bank 2)
DIMM 2B (Bank 2)

DIMM 2A (Bank 2)

DIMM 1D (Bank 1)
DIMM 1C (Bank 1)
DIMM 1B (Bank 1)

DIMM 1A (Bank 1)

®

SIMLP IPMI

PCI-Exp x8

PCI-Exp x8

PCI-Exp x4

JWD

PCI-X 133 MHz

JPL1
JPL2

PCI-X 133 MHz

JWOR

PCI-X 100 MHz ZCR

SEPC

Battery

J28
J27

BIOS

North Bridge

JK1

SATA0

8-pin PWR

ATX PWR

4-Pin
PWR

FP Ctrl

Fan1

24-Pin

Fan7

3rd PWR

PWRSMB

Detect

Introdu

PWR
Fault

JAR

A. OH/Fan Fail LED

CPU1

CPU2

SGPIO2

SGPIO1

JBT1

J7

USB4

PXH

JUSB3

B

SMB

SATA1

JWOL

USB2/3

SATA5

SATA4

JL1

SATA3

SATA2

South
Bridge

DA2

JPA1

JWF1

SCSI CTRL

320 SCSI Channel B

JCF1

JPA3

JPA2

Floppy

Compact Flash

Fan2

SPK

PW LED

JP1

A

LE1

JOH1

Fan3

Fan8

IDE1

320 SCSI Channel A

DA1

Fan4

B. SMB

2-21

X7DB8+/X7DBE+ User's Manual

Power SMB (I2C) Connector

Power SMB (I2C) Connector (J17)
monitors the status of power supply,
fan and system temperatures. See the
table on the right for pin defi nitions.

VGA Connector

A VGA connector (JG1) is located next
to the COM1 port on the IO backplane.
Refer to the board layout below for
the location.

PWR SMB

Pin Defi nitions

Pin# Defi nition
1 Clock
2 Data

3 PWR Fail
4 Ground
5 +3.3V

Fan5

Fan6

KB/
Mouse

USB0/1

COM1

Parrallel

Port

JLAN1

VGA

B

GLAN1

GLAN2

®

UPER X7DB8+

S

Slot7

JPG1

Slot6

VGA
CTRL

Slot5

Slot4

Slot3

PCI-X 133 MHz

LAN

CTRL

Slot2

Slot1

PCI-X 133 MHz

PCI-X 100 MHz ZCR

S I/O

JCOM2

DIMM 4D (Bank 4)
DIMM 4C (Bank 4)
DIMM 4B (Bank 4)

DIMM 4A (Bank 4)

DIMM 3D (Bank 3)
DIMM 3C (Bank 3)
DIMM 3B (Bank 3)

DIMM 3A (Bank 3)

DIMM 2D (Bank 2)
DIMM 2C (Bank 2)
DIMM 2B (Bank 2)

DIMM 2A (Bank 2)

DIMM 1D (Bank 1)
DIMM 1C (Bank 1)
DIMM 1B (Bank 1)

DIMM 1A (Bank 1)

SIMLP IPMI

PCI-Exp x8

PCI-Exp x8

PCI-Exp x4

JWD

JPL1

JPL2

JWOR

J28
J27

SEPC

Battery

BIOS

North Bridge

JK1

SATA0

8-pin PWR

ATX PWR

4-Pin
PWR

FP Ctrl

Fan1

24-Pin

Fan7

3rd PWR

PWRSMB

Detect

A

Introdu

PWR
Fault

JAR

A. PWR SMB

CPU1

CPU2

SGPIO2

SGPIO1

SCSI CTRL

JPA1

320 SCSI Channel B

JCF1

JWF1

JBT1

South
Bridge

J7

USB4

PXH

JUSB3

JWOL

DA2

USB2/3

SMB

SATA1

SATA5

SATA4

JL1

SATA3

SATA2

JPA3

JPA2

Floppy

Compact Flash

Fan2

SPK

PW LED

JP1

LE1

JOH1

Fan3

Fan8

IDE1

320 SCSI Channel A

DA1

Fan4

B. VGA

2-22

Chapter 2: Installation

Compact Flash Card PWR
Connector

A Compact Flash Card Power
Connector is located at JWF1. For the
Compact Flash Card or the Compact
Flash Jumper (JCF1) to work properly ,
you will need to connect the Compact
Flash Card power cable to JWF1 fi rst.
Refer to the board layout below for
the location.

SGPIO Headers

There are two SGPIO (Serial General
Purpose Input/Output) headers located
on the motherboard. These headers
support serial link interfaces for the
onboard SATA and SAS connectors.
See the table on the right for pin
defi nitions. Refer to the board layout
below for the location.

Compact Flash Card PWR

Connector

Jumper Defi nition
On Compact Flash

Power On

Off Compact Flash

Power Off

SGPIO

Pin Defi nitions

Pin# Defi nition Pin Defi nition
1 *NC 2 *NC
3 Ground 4 Data

5 Load 6 Ground
7 *NC 8 *NC

*Note: NC= No Connections

Fan5

Fan6

KB/
Mouse

USB0/1

COM1

Parrallel

Port

JLAN1

VGA

GLAN1

GLAN2

UPER X7DB8+

S

Slot7

JPG1

Slot6

VGA

CTRL

Slot5

Slot4

Slot3

LAN

CTRL

Slot2

S I/O

Slot1

JCOM2

DIMM 4D (Bank 4)
DIMM 4C (Bank 4)
DIMM 4B (Bank 4)

DIMM 4A (Bank 4)

DIMM 3D (Bank 3)
DIMM 3C (Bank 3)
DIMM 3B (Bank 3)

DIMM 3A (Bank 3)

DIMM 2D (Bank 2)
DIMM 2C (Bank 2)
DIMM 2B (Bank 2)

DIMM 2A (Bank 2)

DIMM 1D (Bank 1)
DIMM 1C (Bank 1)
DIMM 1B (Bank 1)

DIMM 1A (Bank 1)

®

SIMLP IPMI

PCI-Exp x8

PCI-Exp x8

PCI-Exp x4

JWD

PCI-X 133 MHz

JPL1
JPL2

PCI-X 133 MHz

JWOR

PCI-X 100 MHz ZCR

SEPC

Battery

J28
J27

BIOS

North Bridge

JK1

SATA0

8-pin PWR

24-Pin

Fan7

3rd PWR

PWRSMB

JBT1

J7

USB2/3

JWOL

SATA5

SATA3

Detect

USB4

JUSB3

Introdu

CPU1

CPU2

South
Bridge

DA2

JPA1

PWR
Fault

JAR

PXH

SMB

SATA4

JL1

SATA2

SATA1

4-Pin

ATX PWR

PWR

SGPIO2

SGPIO1

JCF1

JWF1

A

JPA2

JPA3

SCSI CTRL

320 SCSI Channel B

B

Floppy

FP Ctrl

Compact Flash

Fan1

Fan2

SPK

PW LED

JP1

LE1

JOH1

Fan3

Fan8

IDE1

320 SCSI Channel A

DA1

Fan4

A. Compact Flash PWR
B. SGPIO Headers

2-23

X7DB8+/X7DBE+ User's Manual

Connector

Pins

Jumper

Cap

Setting

2-6 Jumper Settings

Explanation of
Jumpers

To modify the operation of the
motherboard, jumpers can be used
to choose between optional settings.
Jumpers create shorts between two
pins to change the function of the
connector. Pin 1 is identifi ed with a
square solder pad on the printed circuit
board. See the motherboard layout
pages for jumper locations.
Note: On two pin jumpers, "Closed"
means the jumper is on and "Open"

means the jumper is off the pins.

3 2 1

3 2 1

Pin 1-2 short

GLAN Enable/Disable

JPL1/JPL2 enable or disable the
GLAN Port1/GLAN Port2 on the moth­erboard. See the table on the right for
jumper settings. The default setting
is enabled.

Fan5

Fan6

KB/
Mouse

USB0/1

COM1

Parrallel

Port

JLAN1

VGA

GLAN1

GLAN2

®

UPER X7DB8+

S

Slot7

JPG1

Slot6

VGA
CTRL

Slot5

Slot4

Slot3

PCI-X 133 MHz

LAN

CTRL

Slot2

Slot1

PCI-X 133 MHz

PCI-X 100 MHz ZCR

S I/O

JCOM2

DIMM 4D (Bank 4)
DIMM 4C (Bank 4)
DIMM 4B (Bank 4)

DIMM 4A (Bank 4)

DIMM 3D (Bank 3)
DIMM 3C (Bank 3)
DIMM 3B (Bank 3)

DIMM 3A (Bank 3)

DIMM 2D (Bank 2)
DIMM 2C (Bank 2)
DIMM 2B (Bank 2)

DIMM 2A (Bank 2)

DIMM 1D (Bank 1)
DIMM 1C (Bank 1)
DIMM 1B (Bank 1)

DIMM 1A (Bank 1)

SIMLP IPMI

PCI-Exp x8

PCI-Exp x8

PCI-Exp x4

JWD

JPL1

JPL2

B

JWOR

North Bridge

SEPC

Battery

BIOS

A

J28
J27

SMB

JK1

SATA0

SATA1

Fan7

3rd PWR

PWR

Detect

Fault

PWRSMB

JAR

CPU1

JBT1

J7

USB4

PXH

JUSB3

JWOL

USB2/3

SATA5

SATA4

JL1

SATA3

SATA2

24-Pin

Introdu

CPU2

South
Bridge

SCSI CTRL

DA2

JPA1

320 SCSI Channel B

ATX PWR

SGPIO2

SGPIO1

JWF1

JCF1

JPA3

4-Pin
PWR

JPA2

8-pin PWR

Floppy

FP Ctrl

Compact Flash

GLAN Enable

Pin# Defi nition
1-2 Enabled (*default)
2-3 Disabled

Fan1

Fan2

SPK

PW LED

JP1

LE1

JOH1

Fan3

Fan8

IDE1

320 SCSI Channel A

DA1

Fan4

A. GLAN Port1 Enable
B. GLAN Port2 Enable

2-24

Chapter 2: Installation

CMOS Clear

JBT1 is used to clear CMOS. Instead of pins, this "jumper" consists of contact pads
to prevent the accidental clearing of CMOS. To clear CMOS, use a metal object such
as a small screwdriver to touch both pads at the same time to short the connection.
Always remove the AC power cord from the system before clearing CMOS. Note:
For an ATX power supply, you must completely shut down the system, remove the
AC power cord and then short JBT1 to clear CMOS.

Watch Dog Enable/Disable

Watch Dog is a sy stem moni tor that c an reb oot
the system w hen a sof tware a pplicat ion hang s.
Close Pins 1-2 to reset the system if an ap­plication hangs. Close Pins 2-3 to generate a
non-maskable interrupt signal for the application
that hangs. See the table on the right for jumper
settings. Watch Dog must also be enabled in the
BIOS.

4-Pin

ATX PWR

PWR

SGPIO2

SGPIO1

JCF1

JWF1

JPA2

JPA3

SCSI CTRL

320 SCSI Channel B

Floppy

Fan5

Fan6

KB/
Mouse

USB0/1

COM1

Parrallel

Port

JLAN1

VGA

GLAN1

GLAN2

UPER X7DB8+

S

Slot7

JPG1

Slot6

VGA

CTRL

Slot5

Slot4

Slot3

LAN

CTRL

Slot2

S I/O

Slot1

JCOM2

DIMM 4D (Bank 4)
DIMM 4C (Bank 4)
DIMM 4B (Bank 4)

DIMM 4A (Bank 4)

DIMM 3D (Bank 3)
DIMM 3C (Bank 3)
DIMM 3B (Bank 3)

DIMM 3A (Bank 3)

DIMM 2D (Bank 2)
DIMM 2C (Bank 2)
DIMM 2B (Bank 2)

DIMM 2A (Bank 2)

DIMM 1D (Bank 1)
DIMM 1C (Bank 1)
DIMM 1B (Bank 1)

DIMM 1A (Bank 1)

®

SIMLP IPMI

PCI-Exp x8

PCI-Exp x8

PCI-Exp x4

B

JWD

PCI-X 133 MHz

JPL1
JPL2

PCI-X 133 MHz

JWOR

PCI-X 100 MHz ZCR

SEPC

Battery

J28
J27

BIOS

North Bridge

JK1

SATA0

24-Pin

Fan7

3rd PWR

PWRSMB

JBT1

J7

USB2/3

Detect

A

USB4

JWOL

SATA5

SATA3

JUSB3

Introdu

CPU1

CPU2

South
Bridge

DA2

JPA1

PWR
Fault

JAR

PXH

SMB

SATA4

JL1

SATA2

SATA1

8-pin PWR

FP Ctrl

LE1

Compact Flash

Fan1

Fan2

SPK

PW LED

JP1

JOH1

Fan3

Fan8

IDE1

320 SCSI Channel A

DA1

Fan4

Watch Dog

Jumper Settings (JWD)

Jumper Setting Defi nition
Pins 1-2 Reset

(*default)
Pins 2-3 NMI
Open Disabled

A. Clear CMOS
B. Watch Dog Enable

2-25

X7DB8+/X7DBE+ User's Manual

SCSI Controller Enable/
Disable

Jumper JPA1 is used to enable or dis­able the LSI SCSI controller. The de­fault setting is on pins 1-2 to enable
SCSI. See the table on the right for
jumper settings.

SCSI Termination Enable/
Disable

Jumpers JPA2/JPA3 are used to en­able or disable termination for SCSI
Channel A (JPA2) and Channel B
(JPA3) connector s. The default setting
is open to enable termination. See the
table on the right for jumper settings.

*Note: In order for the SCSI drives to
function properly, please do not change
the default setting (open: enable d) set

SCSI Enable/Disable

Jumper Settings (JPA1)

Both Jumpers Defi nition
Pins 1-2 Enabled
Pins 2-3 Disabled

SCSI Term. Enable/Disable

Jumper Settings

Jumper Setting Defi nition
Open Enabled
Closed Disabled

by the manufacturer.

DIMM 4D (Bank 4)

®

SIMLP IPMI

JPG1

Slot6

PCI-Exp x8

Slot5

PCI-Exp x8

Slot4

PCI-Exp x4

JWD

PCI-X 133 MHz

JPL1

JPL2

PCI-X 133 MHz

JWOR

PCI-X 100 MHz ZCR

DIMM 4C (Bank 4)
DIMM 4B (Bank 4)

DIMM 4A (Bank 4)

DIMM 3D (Bank 3)
DIMM 3C (Bank 3)
DIMM 3B (Bank 3)

DIMM 3A (Bank 3)

DIMM 2D (Bank 2)
DIMM 2C (Bank 2)
DIMM 2B (Bank 2)

DIMM 2A (Bank 2)

DIMM 1D (Bank 1)
DIMM 1C (Bank 1)
DIMM 1B (Bank 1)

DIMM 1A (Bank 1)

SEPC

Battery

J28
J27

Fan5

Fan6

KB/
Mouse

USB0/1

COM1

Parrallel

Port

JLAN1

VGA

GLAN1

GLAN2

UPER X7DB8+

S

Slot7

VGA
CTRL

Slot3

LAN

CTRL

Slot2

S I/O

Slot1

JCOM2

BIOS

North Bridge

JK1

SATA0

8-pin PWR

24-Pin

Fan7

3rd PWR

PWRSMB

JBT1

J7

USB2/3

Detect

USB4

JUSB3

JWOL

SATA5

SATA3

Introdu

CPU1

CPU2

South
Bridge

DA2

A

JPA1

PWR
Fault

JAR

PXH

SMB

SATA4

JL1

SATA2

SATA1

4-Pin

ATX PWR

PWR

SGPIO2

SGPIO1

JCF1

C

B

JWF1

JPA2

JPA3

SCSI CTRL

320 SCSI Channel B

Floppy

FP Ctrl

Compact Flash

Fan1

Fan2

SPK

PW LED

JP1

LE1

JOH1

Fan3

Fan8

IDE1

320 SCSI Channel A

DA1

Fan4

A. SCSI Enable
B. SCSI Channel A Termi­nation Enable
C. SCSI Channel B Termi­nation Enable

2-26

Chapter 2: Installation

3rd PWR Supply PWR Fault
Detect (J3P)

The system can notify you in the event of
a power supply failure. This feature avail­able when three power supply units are
installed in the chassis with one acting
as a backup. If you only have one or two
power supply units installed, you should
disable this (the default setting) with J3P
to prevent false alarms.

VGA Enable/Disable

JPG1 allows you to enable or disable the
VGA port. The default position is on pins
1 and 2 to enable VGA. See the table on
the right for jumper settings.

3rd PWR Supply PWR Fault

Jumper Settings

Jumper Setting Defi nition
Closed Enabled
Open Disabled (*Default)

VGA Enable/Disable

Jumper Settings (JPG1)

Jumper Setting Defi nition
Pins 1-2 Enabled
Pins 2-3 Disabled

Fan5

Fan6

KB/
Mouse

USB0/1

COM1

Parrallel

Port

JLAN1

VGA

GLAN1

GLAN2

UPER X7DB8+

S

Slot7

JPG1

Slot6

VGA

CTRL

Slot5

Slot4

Slot3

LAN

CTRL

Slot2

S I/O

Slot1

JCOM2

DIMM 4D (Bank 4)
DIMM 4C (Bank 4)
DIMM 4B (Bank 4)

DIMM 4A (Bank 4)

DIMM 3D (Bank 3)
DIMM 3C (Bank 3)
DIMM 3B (Bank 3)

DIMM 3A (Bank 3)

DIMM 2D (Bank 2)
DIMM 2C (Bank 2)
DIMM 2B (Bank 2)

DIMM 2A (Bank 2)

DIMM 1D (Bank 1)
DIMM 1C (Bank 1)
DIMM 1B (Bank 1)

DIMM 1A (Bank 1)

®

SIMLP IPMI

B

PCI-Exp x8

PCI-Exp x8

PCI-Exp x4

JWD

PCI-X 133 MHz

JPL1
JPL2

PCI-X 133 MHz

JWOR

PCI-X 100 MHz ZCR

SEPC

Battery

J28
J27

BIOS

North Bridge

JK1

SATA0

8-pin PWR

24-Pin

Fan7

3rd PWR

PWRSMB

JBT1

J7

USB2/3

Detect

USB4

JWOL

SATA5

SATA3

JUSB3

Introdu

A

CPU1

CPU2

South
Bridge

DA2

JPA1

PWR
Fault

JAR

PXH

SMB

SATA4

JL1

SATA2

SATA1

4-Pin

ATX PWR

PWR

SGPIO2

SGPIO1

JCF1

JWF1

JPA3

JPA2

SCSI CTRL

320 SCSI Channel B

Floppy

FP Ctrl

Compact Flash

Fan1

Fan2

SPK

PW LED

JP1

LE1

JOH1

Fan3

Fan8

IDE1

320 SCSI Channel A

DA1

Fan4

A. 3rd PWR Fail
B. VGA Enabled

2-27

X7DB8+/X7DBE+ User's Manual

Compact Flash Master/Slave
Select

A Compact Flash Master (Primary)/Slave
(Secondary) Select Jumper is located
at JCF1. Close this jumper to enable
Compact Flash Card. For the Compact
Flash Card or the Compact Flash Jumper
(JCF1) to work properly , you will need to
connect the Compact Flash Card power
cable to JWF1 fi rst. Refer to the board
layout below for the location.

I2C Bus to PCI-X/PCI-Exp.
Slots

Jumpers J27, J28 allow you to connect
the System Management Bus (I
PCI-X/PCI-E slots. The default setting
is "Open" to disable the connection.
See the table on the right for jumper
settings.

2

C) to

Compact Flash Card Master/

Slave Select

Jumper Defi nition
Open Slave (Secondary)
Closed Master (Primary)

I2C to PCI-S/PCI/Exp

Jumper Settings

Jumper Setting Defi nition
Closed Enabled
Open Disabled (*Default)

Fan5

Fan6

KB/
Mouse

USB0/1

COM1

Parrallel

Port

JLAN1

VGA

GLAN1

GLAN2

UPER X7DB8+

S

Slot7

JPG1

Slot6

VGA
CTRL

Slot5

Slot4

Slot3

PCI-X 133 MHz

LAN

CTRL

Slot2

Slot1

PCI-X 133 MHz

PCI-X 100 MHz ZCR

S I/O

JCOM2

DIMM 4D (Bank 4)
DIMM 4C (Bank 4)
DIMM 4B (Bank 4)

DIMM 4A (Bank 4)

DIMM 3D (Bank 3)
DIMM 3C (Bank 3)
DIMM 3B (Bank 3)

DIMM 3A (Bank 3)

DIMM 2D (Bank 2)
DIMM 2C (Bank 2)
DIMM 2B (Bank 2)

DIMM 2A (Bank 2)

DIMM 1D (Bank 1)
DIMM 1C (Bank 1)
DIMM 1B (Bank 1)

DIMM 1A (Bank 1)

®

SIMLP IPMI

PCI-Exp x8

PCI-Exp x8

PCI-Exp x4

JWD

JPL1
JPL2

JWOR

8-pin PWR

24-Pin

Fan7

3rd PWR

PWRSMB

JBT1

J7

USB2/3

USB4

JWOL

SATA5

SATA3

Detect

JUSB3

Introdu

CPU1

CPU2

South
Bridge

DA2

JPA1

PWR
Fault

JAR

North Bridge

SEPC

Battery

BIOS

C

J28
J27

B

JK1

SATA0

SMB

SATA1

PXH

SATA4

JL1

SATA2

4-Pin

ATX PWR

PWR

SGPIO2

SGPIO1

JCF1

JWF1

JPA2

JPA3

SCSI CTRL

320 SCSI Channel B

A

Floppy

FP Ctrl

Fan1

Fan2

SPK

PW LED

JP1

LE1

JOH1

Fan3

Fan8

IDE1

Compact Flash

320 SCSI Channel A

DA1

Fan4

A. Compact Flash Master/
Slave Select
B. J27
C. J28

2-28

2-7 Onboard Indicators

GLAN LEDs

There are two GLAN ports on the moth­erboard. Each Gigabit Ethernet LAN port
has two LEDs. The yellow LED indicates
activity , while the Link LED may be green,
amber or off to indicate the speed of the
connection. See the tables at right for
more information.

Chapter 2: Installation

Rear View

Link
LED

(When viewing from the rear side
of your system)

GLAN Activity Indicator

Color Status Defi nition
Yellow solid LAN Connected
Y ellow Flashing LAN Active

GLAN Link Indicator

LED Color Defi nition
Off No Connection or 10 Mbps
Green 100 Mbps
Amber 1 Gbps

Activity
LED

Fan5

Fan6

KB/
Mouse

USB0/1

COM1

Parrallel

Port

JLAN1

VGA

GLAN1

A

GLAN2

B

UPER X7DB8+

S

Slot7

JPG1

Slot6

VGA

CTRL

Slot5

Slot4

Slot3

LAN

CTRL

Slot2

S I/O

Slot1

JCOM2

DIMM 4D (Bank 4)
DIMM 4C (Bank 4)
DIMM 4B (Bank 4)

DIMM 4A (Bank 4)

DIMM 3D (Bank 3)
DIMM 3C (Bank 3)
DIMM 3B (Bank 3)

DIMM 3A (Bank 3)

DIMM 2D (Bank 2)
DIMM 2C (Bank 2)
DIMM 2B (Bank 2)

DIMM 2A (Bank 2)

DIMM 1D (Bank 1)
DIMM 1C (Bank 1)
DIMM 1B (Bank 1)

DIMM 1A (Bank 1)

®

SIMLP IPMI

PCI-Exp x8

PCI-Exp x8

PCI-Exp x4

JWD

PCI-X 133 MHz

JPL1
JPL2

PCI-X 133 MHz

JWOR

PCI-X 100 MHz ZCR

SEPC

Battery

J28
J27

BIOS

North Bridge

JK1

SATA0

8-pin PWR

24-Pin

Fan7

3rd PWR

PWRSMB

JBT1

J7

USB2/3

Detect

USB4

JWOL

SATA5

SATA3

JUSB3

Introdu

CPU1

CPU2

South
Bridge

DA2

JPA1

PWR
Fault

JAR

PXH

SMB

SATA4

JL1

SATA2

SATA1

4-Pin

ATX PWR

PWR

SGPIO2

SGPIO1

JCF1

JWF1

JPA2

JPA3

SCSI CTRL

320 SCSI Channel B

Floppy

FP Ctrl

Compact Flash

Fan1

Fan2

SPK

PW LED

JP1

LE1

JOH1

Fan3

Fan8

IDE1

320 SCSI Channel A

DA1

Fan4

A. GLAN Port1 LEDs
B. GLAN Port2 LEDs

2-29

X7DB8+/X7DBE+ User's Manual

Onboard SCSI Activity LED
Indicators (*X7DB8+ only)

There are two Onboard SCSI Activity LED
indicators on the X7DB8+. DA1 indicates
the activity status of SCSI Channel A, and
DA2 indicates the activity status of SCSI
Channel B.

Onboard Power LED

There is an Onboard Power LED located
on the motherboard. When this LED is lit,
the system is on. Be sure to turn off the
system and unplug the power cord before
removing or installing components. See
the layout below for the LED location.

Fan5

Fan6

KB/
Mouse

USB0/1

COM1

Parrallel

Port

JLAN1

VGA

GLAN1

GLAN2

®

UPER X7DB8+

S

Slot7

JPG1

Slot6

VGA
CTRL

Slot5

Slot4

Slot3

PCI-X 133 MHz

LAN

CTRL

Slot2

Slot1

PCI-X 133 MHz

PCI-X 100 MHz ZCR

S I/O

JCOM2

DIMM 4D (Bank 4)
DIMM 4C (Bank 4)
DIMM 4B (Bank 4)

DIMM 4A (Bank 4)

DIMM 3D (Bank 3)
DIMM 3C (Bank 3)
DIMM 3B (Bank 3)

DIMM 3A (Bank 3)

DIMM 2D (Bank 2)
DIMM 2C (Bank 2)
DIMM 2B (Bank 2)

DIMM 2A (Bank 2)

DIMM 1D (Bank 1)
DIMM 1C (Bank 1)
DIMM 1B (Bank 1)

DIMM 1A (Bank 1)

SIMLP IPMI

PCI-Exp x8

PCI-Exp x8

PCI-Exp x4

JWD

JPL1

JPL2

JWOR

J28
J27

SEPC

Battery

BIOS

North Bridge

JK1

SATA0

8-pin PWR

ATX PWR

4-Pin
PWR

FP Ctrl

Fan1

24-Pin

Fan7

3rd PWR

PWRSMB

Detect

Introdu

PWR
Fault

JAR

A. SCSI Channel A Activ­ity LED
B. SCSI Channel B Activ­ity LED

CPU1

CPU2

SGPIO2

SGPIO1

SCSI CTRL

B

JPA1

320 SCSI Channel B

JCF1

JWF1

JBT1

South
Bridge

J7

USB4

PXH

JUSB3

JWOL

DA2

USB2/3

SMB

SATA1

SATA5

SATA4

JL1

SATA3

SATA2

JPA3

JPA2

Floppy

Compact Flash

Fan2

SPK

PW LED

JP1

LE1

C

JOH1

Fan3

Fan8

IDE1

320 SCSI Channel A

DA1

A

Fan4

C. Onboard PWR LED

2-30

Chapter 2: Installation

2-8 Parallel Port, Floppy Drive, Hard Disk Drive, SIMLP
IPMI and SCSI Connections

Note the following when connecting the fl oppy and hard disk drive cables:

• The fl oppy disk drive cable has seven twisted wires.

• A red mark on a wire typically designates the location of pin 1.

• A single fl oppy disk drive ribbon cable has 34 wires and two connectors to provide
for two fl oppy disk drives. The connector with twisted wires always connects to
drive A, and the connector that does not have twisted wires always connects to
drive B.

Parallel (Printer) Port Connector

Parallel (Printer) Port
Connector

The parallel (printer) port is located
on the IO panel. See the table on the
right for pin defi nitions.

Pin# Defi nition Pin # Defi nition
1 Strobe- 2 Auto Feed­3 Data Bit 0 4 Error­5 Data Bit 1 6 Init­7 Data Bit 2 8 SLCT IN­9 Data Bit 3 10 GND
11 Data Bit 4 12 GND
13 Data Bit 5 14 GND
15 Data Bit 6 16 GND
17 Data Bit 7 18 GND
19 ACK 20 GND
21 BUSY 22 Write Data
23 PE 24 Write Gate
25 SLCT 26 NC

Pin Defi nitions

Fan5

Fan6

KB/
Mouse

USB0/1

COM1

A

Parrallel

Port

JLAN1

VGA

GLAN1

GLAN2

UPER X7DB8+

S

Slot7

JPG1

Slot6

VGA

CTRL

Slot5

Slot4

Slot3

LAN

CTRL

Slot2

S I/O

Slot1

JCOM2

DIMM 4D (Bank 4)
DIMM 4C (Bank 4)
DIMM 4B (Bank 4)

DIMM 4A (Bank 4)

DIMM 3D (Bank 3)
DIMM 3C (Bank 3)
DIMM 3B (Bank 3)

DIMM 3A (Bank 3)

DIMM 2D (Bank 2)
DIMM 2C (Bank 2)
DIMM 2B (Bank 2)

DIMM 2A (Bank 2)

DIMM 1D (Bank 1)
DIMM 1C (Bank 1)
DIMM 1B (Bank 1)

DIMM 1A (Bank 1)

®

SIMLP IPMI

PCI-Exp x8

PCI-Exp x8

PCI-Exp x4

JWD

PCI-X 133 MHz

JPL1
JPL2

PCI-X 133 MHz

JWOR

PCI-X 100 MHz ZCR

SEPC

Battery

J28
J27

BIOS

North Bridge

JK1

SATA0

8-pin PWR

24-Pin

Fan7

3rd PWR

PWRSMB

JBT1

J7

USB2/3

Detect

USB4

JWOL

SATA5

SATA3

JUSB3

Introdu

CPU1

CPU2

South
Bridge

DA2

JPA1

PWR
Fault

JAR

PXH

SMB

SATA4

JL1

SATA2

SATA1

4-Pin

ATX PWR

PWR

SGPIO2

SGPIO1

JCF1

JWF1

JPA2

JPA3

SCSI CTRL

320 SCSI Channel B

Floppy

FP Ctrl

Compact Flash

Fan1

Fan2

SPK

PW LED

JP1

LE1

JOH1

Fan3

Fan8

IDE1

320 SCSI Channel A

DA1

Fan4

A. Parallel Port

2-31

X7DB8+/X7DBE+ User's Manual

Floppy Connector

The fl oppy connector is located next
to the compact fl ash card slot. See
the table below for pin defi nitions.

Floppy Drive Connector
Pin Defi nitions (Floppy)

Pin# Defi nition Pin # Defi nition
1 Ground 2 FDHDIN
3 Ground 4 Reserved
5 Key 6 FDEDIN
7 Ground 8 Index
9 Ground 10 Motor Enable
11 Ground 12 Drive Select B
13 Ground 14 Drive Select B
15 Ground 16 Motor Enable
17 Ground 18 DIR
19 Ground 20 STEP
21 Ground 22 Write Data
23 Ground 24 Write Gate
25 Ground 26 Track 00
27 Ground 28 Write Protect
29 Ground 30 Read Data
31 Ground 32 Side 1 Select
33 Ground 34 Diskette

SIMLP IPMI 2.0 Slot

There is a SIM Low Profi le IPMI 2.0
Slot on the motherboard. Refer to
the layout below for the IPMI Slot
location.

Fan5

Fan6

KB/
Mouse

USB0/1

COM1

Parrallel

Port

JLAN1

VGA

GLAN1

GLAN2

®

UPER X7DB8+

S

Slot7

JPG1

Slot6

VGA
CTRL

Slot5

Slot4

Slot3

PCI-X 133 MHz

LAN

CTRL

Slot2

Slot1

PCI-X 133 MHz

PCI-X 100 MHz ZCR

S I/O

JCOM2

DIMM 4D (Bank 4)
DIMM 4C (Bank 4)
DIMM 4B (Bank 4)

DIMM 4A (Bank 4)

DIMM 3D (Bank 3)
DIMM 3C (Bank 3)
DIMM 3B (Bank 3)

DIMM 3A (Bank 3)

DIMM 2D (Bank 2)
DIMM 2C (Bank 2)
DIMM 2B (Bank 2)

DIMM 2A (Bank 2)

DIMM 1D (Bank 1)
DIMM 1C (Bank 1)
DIMM 1B (Bank 1)

DIMM 1A (Bank 1)

SIMLP IPMI

PCI-Exp x8

PCI-Exp x8

PCI-Exp x4

JWD

JPL1

JPL2

JWOR

J28
J27

SEPC

Battery

North Bridge

B

BIOS

SMB

JK1

SATA0

SATA1

Fan7

3rd PWR

PWR

Detect

Fault

PWRSMB

JAR

JBT1

J7

USB4

PXH

JUSB3

JWOL

USB2/3

SATA5

SATA4

JL1

SATA3

SATA2

24-Pin

Introdu

CPU1

CPU2

South
Bridge

SCSI CTRL

DA2

JPA1

320 SCSI Channel B

ATX PWR

SGPIO2

SGPIO1

JWF1

JCF1

JPA3

4-Pin
PWR

JPA2

A

8-pin PWR

Floppy

FP Ctrl

Compact Flash

Fan1

Fan2

SPK

PW LED

JP1

LE1

JOH1

Fan3

Fan8

IDE1

320 SCSI Channel A

DA1

Fan4

A. Floppy
B. SIMLP IPMI 2.0

2-32

Chapter 2: Installation

IDE Connectors

There are two IDE Connectors
(JIDE1: Blue, JIDE2: White) on the
motherboard. The blue IDE con­nector (JIDE1) is designated as the
Primary IDE Drive. The white IDE
connector (JIDE2) is designated as
the Secondary IDE Drive, reserved
for Compact Flash Card use only.
(See the note below.) See the table
on the right for pin defi nitions.

*Note: JIDE2 (the white slot) is
reserved for Compact Flash Card
only. Do not use it for other devices.
If JIDE2 is populated with a Compact
Flash Card, JIDE1 (the blue slot)
will be available for one device only.
For the Compact Flash Card to work
properly, you will need to connect a
power cable to JWF1 fi rst.

IDE Drive Connectors

Pin Defi nitions

Pin# Defi nition Pin # Defi nition
1 Reset IDE 2 Ground
3 Host Data 7 4 Host Data 8
5 Host Data 6 6 Host Data 9
7 Host Data 5 8 Host Data 10
9 Host Data 4 10 Host Data 11
11 Host Data 3 12 Host Data 12
13 Host Data 2 14 Host Data 13
15 Host Data 1 16 Host Data 14
17 Host Data 0 18 Host Data 15
19 Ground 20 Key
21 DRQ3 22 Ground
23 I/O Write 24 Ground
25 I/O Read 26 Ground
27 IOCHRDY 28 BALE
29 DACK3 30 Ground
31 IRQ14 32 IOCS16
33 Addr1 34 Ground
35 Addr0 36 Addr2
37 Chip Select 0 38 Chip Select 1
39 Activity 40 Ground

Fan5

Fan6

KB/
Mouse

USB0/1

COM1

Parrallel

Port

JLAN1

VGA

GLAN1

GLAN2

UPER X7DB8+

S

Slot7

JPG1

Slot6

VGA

CTRL

Slot5

Slot4

Slot3

PCI-X 133 MHz

LAN

CTRL

Slot2

S I/O

JCOM2

PCI-X 133 MHz

Slot1

PCI-X 100 MHz ZCR

®

SIMLP IPMI

PCI-Exp x8

PCI-Exp x8

PCI-Exp x4

JWD

JPL1
JPL2

JWOR

DIMM 4D (Bank 4)
DIMM 4C (Bank 4)
DIMM 4B (Bank 4)

DIMM 4A (Bank 4)

DIMM 3D (Bank 3)
DIMM 3C (Bank 3)
DIMM 3B (Bank 3)

DIMM 3A (Bank 3)

DIMM 2D (Bank 2)
DIMM 2C (Bank 2)
DIMM 2B (Bank 2)

DIMM 2A (Bank 2)

DIMM 1D (Bank 1)
DIMM 1C (Bank 1)
DIMM 1B (Bank 1)

DIMM 1A (Bank 1)

SEPC

Battery

BIOS

J28
J27

North Bridge

JK1

SATA0

8-pin PWR

24-Pin

Fan7

3rd PWR

PWRSMB

JBT1

J7

USB2/3

JWOL

SATA5

SATA3

Detect

USB4

JUSB3

Introdu

CPU1

CPU2

South
Bridge

DA2

JPA1

PWR
Fault

JAR

PXH

C

SMB

SATA4

JL1

SATA2

SATA1

4-Pin

ATX PWR

PWR

SGPIO2

SGPIO1

JCF1

JWF1

JPA2

JPA3

SCSI CTRL

320 SCSI Channel B

B

Floppy

FP Ctrl

Compact Flash

Fan1

Fan2

SPK

PW LED

JP1

LE1

JOH1

Fan3

Fan8

A

IDE1

320 SCSI Channel A

DA1

Fan4

A. IDE#1
B. IDE#2 (Compact Flash)

2-33

X7DB8+/X7DBE+ User's Manual

u

Ultra 320 SCSI
Connectors
(*X7DB8+ only)

There are two SCSI connectors
on the motherboard. SCSI
Channel A is located at JA1,
and SCSI Channel B is located
at JA2. Refer to the table below
for the pin defi nitions of the
Ultra 320 SCSI connectors
located at JA1 and JA2.

A. SCSI Channel A
B. SCSI Channel B

Introd

JLAN1

Ultra320 SCSI Drive Connector

Pin Defi nitions

Pin# Defi nition Pin # Defi nition
1 +DB (12) 35 -DB (12)
2 +DB (13) 36 -DB (13)
3 +DB (14) 37 -DB (14)
4 +DB (15) 38 -DB (15)
5 +DB (P1) 39 -DB (P1)
6 +DB (0) 40 -DB (0)
7 +DB (1) 41 -DB (1)
8 +DB (2) 42 -DB (2)
9 +DB (3) 43 -DB (3)
10 +DB (4) 44 -DB (4)
11 +DB (5) 45 -DB (5)
12 +DB (6) 46 -DB (6)
13 +DB (7) 47 -DB (7)
14 +DB (P) 48 -DB (P)

15 Ground 49 Ground
16 DIFFSENS 50 Ground
17 TERMPWR 51 TERMPWR
18 TERMPWR 52 TERMPWR
19 Reserved 53 Reserved
20 Ground 54 Ground
21 +ATN 55 -ATN
22 Ground 56 Ground
23 +BSY 57 -BSY
24 +ACK 58 -ACK
25 +RST 59 -RST
26 +MSG 60 -MSG
27 +SEL 61 -SEL
28 +C/D 62 -C/D
29 +REQ 63 -REQ
30 +I/O 64 -I/O
31 +DB (8) 65 -DB (8)
32 +DB (9) 66 -DB (9)
33 +DB (10) 67 -DB (10)
34 +DB (11) 68 -DB (11)

®

UPER X7DB8+

S

A

B

2-34

Chapter 3: Troubleshooting

Chapter 3

Troubleshooting

3-1 Troubleshooting Procedures

Use the following procedures to troubleshoot your system. If you have followed all
of the procedures below and still need assistance, refer to the ‘Technical Support
Procedures’ and/or ‘Returning Merchandise for Service’ section(s) in this chapter.

Note: Always disconnect the power cord before adding, changing or installing

any hardware components.

Before Power On

1. Make sure that there are no short circuits between the motherboard and chas-

sis.

2. Disconnect all ribbon/wire cables from the motherboard, including those for the

keyboard and mouse.

3. Remove all add-on cards.

4. Install one CPU (making sure it is fully seated) and connect the chassis speaker

and the power LED to the motherboard. (Check all jumper settings as well.)

5. Use only the correct type of CMOS onboard battery as recommended by the

Manufacturer. Do not install the onboard battery upside down to avoid pos­sible explosion.

No Power

1. Make sure that there are no short circuits between the motherboard and the

chassis.

2. Verify that all jumpers are set to their default positions.

3. Check that the 115V/230V switch on the power supply is properly set.

4. Turn the power switch on and off to test the system.

5. The battery on your motherboard may be old. Check to verify that it still supplies

~3VDC. If it does not, replace it with a new one.

No Video

1. If the power is on but you have no video, remove all the add-on cards and

cables.

2. Use the speaker to determine if any beep codes exist. Refer to the Appendix

for details on beep codes.

Losing the System’s Setup Confi guration

1. Ensure that you are using a high quality power supply. A poor quality power

supply may cause the system to lose the CMOS setup information. Refer to

3-1

X7DB8+/X7DBE+ User's Manual

Section 1-6 for details on recommended power supplies.

2. The battery on your motherboard may be old. Check to verify that it still supplies
~3VDC. If it does not, replace it with a new one.

3. If the above steps do not fi x the Setup Confi guration problem, contact your
vendor for repairs.

NOTE

If you are a system integrator, VAR or OEM, a POST diagnostics

card is recommended. For I/O port 80h codes, refer to App. B.

Memory Errors

1. Make sure the DIMM modules are properly and fully installed.

2. Determine if different speeds of DIMMs have been installed and verify that the
BIOS setup is confi gured for the fastest speed of RAM used. It is recom-
mended to use the same RAM speed for all DIMMs in the system.

3. Make sure you are using the correct type of DDR2 FBD (Fully Buffered) ECC
533/667 SDRAM (*recommended by the manufacturer.)

4. Check for bad DIMM modules or slots by swapping a single module between
four slots and noting the results.

5. Make sure all memory modules are fully seated in their slots. As an interleaved
memory scheme is used, you must install four modules at a time, beginning
with Branch 1, then Branch 2, and so on (see Page 2-6).

6. Check the position of the 115V/230V switch on the power supply.

3-2 Technical Support Procedures

Before contacting Technical Support, please take the following steps. Also, note
that as a motherboard manufacturer, Super Micro does not sell directly to end-us­ers, so it is best to fi rst check with your distributor or reseller for troubleshooting
services. They should know of any possible problem(s) with the specifi c system
confi guration that was sold to you.

1. Please go through the ‘Troubleshooting Procedures’ and 'Frequently Asked Ques­tion' (FAQ) sections in this chapter or see the FAQs on our web site (

www.supermicro.com/support/faqs/

) before contacting Technical Support.

http://

2. BIOS upgrades can be downloaded from our web site at

(http://www.supermicro.com/support/bios/).

Note: Not all BIOS can be fl ashed; it depends on the modifi cations to the
boot block code.

3-2

Chapter 3: Troubleshooting

3. If you still cannot resolve the problem, include the following information when
contacting Super Micro for technical support:

• Motherboard model and PCB revision number

• BIOS release date/version (this can be seen on the initial display when your
system fi rst boots up)

•System confi guration

An example of a Technical Support form is on our web site at

(http://www.supermicro.com/support/contact.cfm).

4. Distributors: For immediate assistance, please have your account number ready
when placing a call to our technical support department. We can be reached
by e-mail at [e-mail] or by fax at: [phone], option

2.

3-3 Frequently Asked Questions

Question: What are the various types of memory that my motherboard can

support?

Answer: The X7DB8+/X7DBE+ has sixteen 240-pin DIMM slots that support DDR2

FBD ECC 533/667 SDRAM modules. It is strongly recommended that you do not
mix memory modules of different speeds and sizes.

Question: How do I update my BIOS?

It is recommended that you do not upgrade your BIOS if you are not experiencing
any problems with your system. Updated BIOS fi les are located on our web site at
http://www.supermicro.com/support/bios/. Please check our BIOS warning message
and the information on how to update your BIOS on our web site. Select your moth­erboard model and download the BIOS fi le to your computer. Also, check the current
BIOS revision and make sure that it is newer than your BIOS before downloading.
You can choose from the zip fi le and the .exe fi le. If you choose the zip BIOS fi le,
please unzip the BIOS fi le onto a bootable device or a USB pen. Run the batch fi le
using the format fl ash.bat fi lename.rom from your bootable device or USB pen to

fl ash the BIOS. Then, your system will automatically reboot. If you choose the .exe
fi le, please run the .exe fi le under Windows to create the BIOS fl ash fl oppy disk.

Insert the fl oppy disk into the system you wish to fl ash the BIOS. Then, bootup the
system to the fl oppy disk. The BIOS utility will automatically fl ash the BIOS without
any prompts. Please note that this process may take a few minutes to complete.
Do not be concerned if the screen is paused for a few minutes.

(
to prevent possible system boot failure!)

*Warning: Do not shut down or reset the system while updating BIOS

3-3

X7DB8+/X7DBE+ User's Manual

Question: What's on the CD that came with my motherboard?
Answer: The supplied compact disc has quite a few drivers and programs that will

greatly enhance your system. We recommend that you review the CD and install
the applications you need. Applications on the CD include chipset drivers, and
security and audio drivers.

3-4 Returning Merchandise for Service

A receipt or copy of your invoice marked with the date of purchase is required be­fore any warranty service will be rendered. You can obtain service by calling your
vendor for a Returned Merchandise Authorization (RMA) number. When returning
to the manufacturer, the RMA number should be prominently displayed on the
outside of the shipping carton, and mailed prepaid or hand-carried. Shipping and
handling charges will be applied for all orders that must be mailed when service
is complete.

This warranty only covers normal consumer use and does not cover damages in­curred in shipping or from failure due to the alternation, misuse, abuse or improper
maintenance of products.

During the warranty period, contact your distributor fi rst for any product problems.

3-4

Chapter 4: BIOS

Chapter 4
BIOS

4-1 Introduction

This chapter describes the Phoenix BIOS™ Setup utility for the X7DB8+/X7DBE+.
The Phoenix ROM BIOS is stored in a fl ash chip and can be easily upgraded using
a fl oppy disk-based program.

Note: Due to periodic changes to the BIOS, some settings may have been added or
deleted and might not yet be recorded in this manual. Please refer to the Manual
Download area of the Super Micro web site <http://www.supermicro.com> for any
changes to the BIOS that may not be refl ected in this manual.

System BIOS

The BIOS is the Basic Input Output System used in all IBM® PC, XT™, AT®, and

®

PS/2

compatible computers. The Phoenix BIOS stores the system parameters,
types of disk drives, video displays, etc. in the CMOS. The CMOS memory requires
very little electrical power. When the computer is turned off, a backup battery pro­vides power to the CMOS Logic, enabling it to retain system parameters. When the
computer is powered on, the computer is confi gured with the values stored in the
CMOS Logic by the system BIOS, which gains control at boot up.

How To Change the Confi guration Data

The CMOS information that determines the system parameters may be changed by
entering the BIOS Setup utility. This Setup utility can be accessed by pressing the
<Delete> key at the appropriate time during system boot. (See below.)

Starting the Setup Utility

Normally , the only visible POST (Power On Self Test) routine is the memory test. As
the memory is being tested, press the <Delete> key to enter the main menu of the
BIOS Setup utility. From the main menu, you can access the other setup screens,
such as the Security and Power menus. Beginning with Section 4-3, detailed de­scriptions are given for each parameter setting in the Setup utility.

Warning: Do not shut down or reset the system while updating BIOS

to prevent possible boot failure.

4-1

X7DB8+/X7DBE+ User's Manual

4-2 Running Setup

*Default settings are in bold text unless otherwise noted.

The BIOS setup options described in this section are selected by choosing the ap­propriate text from the main BIOS Setup screen. All displayed text is described in
this section, although the screen display is often all you need to understand how
to set the options (see the following page).

When you fi rst power on the computer, the Phoenix BIOS™ is immediately acti-
vated.

While the BIOS is in control, the Setup program can be activated in one of two
ways:

1. By pressing <Delete> immediately after turning the system on, or

2. When the message shown below appears briefl y at the bottom of the screen
during the POST (Power On Self-Test), press the <Delete> key to activate the main
Setup menu:

Press the <Delete> key to enter Setup

4-3 Main BIOS Setup

All main Setup options are described in this section. The main BIOS Setup screen
is displayed below.

Use the Up/Down arrow keys to move among the different settings in each menu.
Use the Left/Right arrow keys to change the options for each setting.

4-2

Main BIOS Setup Menu

Main Setup Features

Chapter 4: BIOS

System Time

To set the system date and time, key in the correct information in the appropriate
fi elds. Then press the <Enter> key to save the data.

System Date

Using the arrow keys, highlight the month, day and year fi elds, and enter the correct
data. Press the <Enter> key to save the data.

BIOS Date

This fi eld displays the date when this version of BIOS was built.

Legacy Diskette A

This setting allows the user to set the type of fl oppy disk drive installed as diskette A.
The options are Disabled, 360Kb 5.25 in, 1.2MB 5.25 in, 720Kb 3.5 in, 1.44/1.25MB,

3.5 in and 2.88MB 3.5 in.

4-3

X7DB8+/X7DBE+ User's Manual

XIDE Channel 0 Master/Slave, IDE Channel 1 Master/Slave, SATA
Port2 and SATA Port3

These settings allow the user to set the parameters of IDE Channel 0 Master/Slave,
IDE Channel 1 Master/Slave, IDE Channel 2 Master, IDE Channel 3 Master slots.
Hit <Enter> to activate the following sub-menu screen for detailed options of these
items. Set the correct confi gurations accordingly .

Type

This option allows the user to selects the type of IDE hard drive. The option
Auto will allow the BIOS to automatically confi gure the parameters of the
HDD installed at the connection. Enter a number between 1 to 39 to select a
predetermined HDD type. Select User to allow the user to enter the parameters
of the HDD installed. Select CDROM if a CDROM drive is installed. Select ATAPI
if a removable disk drive is installed.

Multi-Sector Transfers

This item allows the user to specify the number of sectors per block to be
used in multi-sector transfer. The options are Disabled, 4 Sectors, 8 Sectors,
and 16 Sectors.

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Chapter 4: BIOS

LBA Mode Control

This item determines whether the Phoenix BIOS will access the IDE Channel 0
Master Device via the LBA mode. The options are Enabled and Disabled.

32 Bit I/O

This option allows the user to enable or disable the function of 32-bit data transfer.
The options are Enabled and Disabled.

Transfer Mode

This option allows the user to set the transfer mode. The options are Standard,
Fast PIO1, Fast PIO2, Fast PIO3, Fast PIO4, FPIO3/DMA1 and FPIO4/DMA2.

Ultra DMA Mode

This option allows the user to select Ultra DMA Mode. The options are Disabled,
Mode 0, Mode 1, Mode 2, Mode 3, Mode 4, and Mode 5.

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X7DB8+/X7DBE+ User's Manual

Parallel ATA

This setting allows the user to enable or disable the function of the Parallel ATA.
The options are Disabled, Channel 0, Channel 1, and Both.

Serial ATA

This setting allows the user to enable or disable the function of the Serial ATA. The
options are Disabled and Enabled.

Native Mode Operation

Select the native mode for ATA. The options are: Parallel ATA, Serial ATA,
Both, and Auto.

SATA Controller Mode

Select Compatible to allow the SATA and PATA drives to be automatically-detected
and be placed in the Legacy Mode by the BIOS. Select Enhanced to allow the
SATA and PATA drives to be to be automatically-detected and be placed in the
Native IDE Mode. (*Note: The Enhanced mode is supported by the Windows

2000 OS or a later version.)

When the SATA Controller Mode is set to "Enhanced", the following items will
display:

Serial ATA (SATA) RAID Enable

Select Enable to enable Serial ATA RAID Functions. (*For the Windows OS
environment, use the RAID driver if this feature is set to Enabled. When this item
is set to Enabled, the item: "ICH RAID Code Base" will be available for you to
select either Intel or Adaptec Host RAID fi rmware to be activated. If this item is
set to Disabled, the item-SATA AHCI Enable will be available.) The options are
Enabled and Disabled.

ICH RAID Code Base

Select Intel to enable Intel's SATA RAID fi rmware. Select Adaptec to use Adaptec's
HostRAID fi rmware. The options are Intel and Adaptec.

SATA AHCI

Select Enable to enable the function of the Serial ATA Advanced Host Interface.
(*Take caution when using this function. This feature is for advanced programmers
only. The options are Enabled and Disabled.)

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Chapter 4: BIOS

System Memory

This display informs you how much system memory is recognized as being present
in the system.

Extended Memory

This display informs you how much extended memory is recognized as being
present in the system.

4-4 Advanced Setup

Choose Advanced from the Phoenix BIOS Setup Utility main menu with the arrow keys.
Y ou should see the following display. The items with a triangle beside them have sub
menus that can be accessed by highlighting the item and pressing <Enter>.

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X7DB8+/X7DBE+ User's Manual

XBoot Features

Access the submenu to make changes to the following settings.

Quick Boot Mode

If enabled, this feature will speed up the POST (Power On Self Test) routine by
skipping certain tests after the computer is turned on. The settings are Enabled
and Disabled. If Disabled, the POST routine will run at normal speed.

Quiet Boot

This setting allows you to Enable or Disable the graphic logo screen during
boot-up.

ACPI Mode

Use the setting to determine if you want to employ ACPI (Advanced Confi guration
and Power Interface) power management on your system. The options are

Yes and No.

Power Button Behavior

If set to Instant-Off, the system will power off immediately as soon as the user
hits the power button. If set to 4-sec., the system will power off when the user
presses the power button for 4 seconds or longer. The options are instant-off
and 4-sec override.

Resume On Modem Ring

Select On to “wake your system up” when an incoming call is received by
your modem. The options are On and Off.

Power Loss Control

This setting allows you to choose how the system will react when power returns
after an unexpected loss of power. The options are Stay Off, Power On, and

Last State.

Watch Dog

If enabled, this option will automatically reset the system if the system is not
active for more than 5 minutes. The options are Enabled and Disabled.

Summary Screen

This setting allows you to Enable or Disable the summary screen which displays
the system confi guration during bootup.

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Chapter 4: BIOS

XMemory Cache

Cache System BIOS Area

This setting allows you to designate a reserve area in the system memory to be
used as a System BIOS buffer to allow the BIOS to write (cache) data into this
reserved memory area. Select Write Protect to enable the function and reserve
this area for the Video BIOS ROM access only. Select Uncached to disable this
function and make this area available for other devices.

Cache Video BIOS Area

This setting allows you to designate a reserve area in the system memory to be used
as a Video BIOS buffer to allow the BIOS to write (cache) data into this reserved
memory area. Select Write Protect to enable the function and reserve this area
for the Video BIOS ROM access only. Select Uncached to disable this function and
make this area available for other devices.

Cache Base 0-512K

If enabled, this feature will allow the data stored in the base memory area: block
0-512K to be cached (written) into a buffer, a storage area in the Static DROM
(SDROM) or to be written into L1, L2 cache inside the CPU to speed up CPU
operations. Select Uncached to disable this function. Select Write Through to allow
data to be cached into the buffer and written into the system memory at the
same time. Select Write Protect to prevent data from being written into the base
memory area of Block 0-512K. Select Write Back to allow the CPU to write data
back directly from the buffer without writing data to the System Memory for fast
CPU data processing and operation. The options are Uncached, Write Through,
Write Protect, and Write Back.

Cache Base 512K-640K

If enabled, this feature will allow the data stored in the memory area: 512K-640K
to be cached (written) into a buffer, a storage area in the Static DROM (SDROM)
or written into L1, L2 or L3 cache inside the CPU to speed up CPU operations.
Select Uncached to disable this function. Select Write Through to allow data to be
cached into the buffer and written into the system memory at the same time. Select
Write Protect to prevent data from being written into the base memory area of Block
512-640K. Select Write Back to allow the CPU to write data back directly from the
buffer without writing data to the system memory to speed up CPU's operation. The
options are Uncached, Write Through, Write Protect, and Write Back.

Cache Extended Memory

If enabled, this feature will allow the data stored in the extended memory area to
be cached (written) into a buffer, a storage area in the Static DROM (SDROM) or
written into L1, L2, L3 cache inside the CPU to speed up CPU operations. Select

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X7DB8+/X7DBE+ User's Manual

Uncached to disable this function. Select Write Through to allow data to be cached
into the buffer and written into the system memory at the same time. Select Write
Protect to prevent data from being written into the extended memory area above
1 MB. Select Write Back to allow the CPU to write data back directly from the
buffer without writing data to the System Memory for fast CPU data processing
and operation. The options are Uncached, Write Through, Write Protect, and

Write Back.

Discrete MTRR Allocation

If enabled, MTRRs (-Memory Type Range Registers) are confi gured as distinct,
separate units and cannot be overlapped. If enabled, the user can achieve better
graphic effects when using a Linux graphic driver that requires the write-combining
confi guration with 4GB or more memory. The options are Enabled and Disabled.

XPCI Confi guration

Access the submenu to make changes to the following settings for PCI devices.

Onboard GLAN1/Onboard GLAN2 (Gigabit- LAN) OPROM Confi gure

Enabling this option provides the capability to boot from GLAN. The options are

Disabled and Enabled.

Onboard SCSI OPROM Confi gure

Enabling this option provides the capitally to boot from SCSI HDD. The options
are Disabled and Enabled.

PCI Parity Error Forwarding

The feature allows SERR and PERR errors detected in PCI slots to be sent
(forwarded) to the BIOS DMI Event Log for the user to review. The options are
Enabled and Disabled.

Reset Confi guration Data

If set to Yes, this setting clears the Extended System Confi guration Data- (ESCD)
area. The options are Yes and No.

Frequency for PCI-X#1, PCI-X#2, PCI-X#3

This option allows the user to change the bus frequency for the devices installed
in the slot indicated. The options are Auto, PCI 33 MHz, PCI 66 MHz, PCI-X 66
MHz, PCI-X 100 MHz, and PCI-X 133 MHz.

Frequency for PCI-X#1 On Riser, Frequency for PCI-X#2-#3 On Riser

(*Available when an Active Riser Card is present.)

This option allows the user to change the bus frequency of the devices installed
in the slot indicated. The options are Auto, PCI 33 MHz, PCI 66 MHz, PCI-X 66
MHz, PCI-X 100 MHz, and PCI-X 133 MHz.

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Chapter 4: BIOS

XSlot1 PCI-X 100 MHz ZCR, Slot2 PCI-X 133MHz, Slot3 PCI-X
133MHz, Slot4 PCI-Exp x4, Slot5 PCI-Exp x8, and Slot6 PCI-Exp x8

Access the submenu for each of the settings above to make changes to the
following:

Option ROM Scan

When enabled, this setting will initialize the device expansion ROM. The options
are Enabled and Disabled.

Enable Master

This setting allows you to enable the selected device as the PCI bus master.
The options are Enabled and Disabled.

Latency Timer

This setting allows you to set the clock rate for Bus Master. A high-priority, high­throughout device may benefi t from a greater clock rate. The options are Default,

0020h, 0040h, 0060h, 0080h, 00A0h, 00C0h, and 00E0h. For Unix, Novell and
other Operating Systems, please select the option: other. If a drive fails after
the installation of a new software, you might want to change this setting and
try again. A different OS requires a different Bus Master clock rate.

Large Disk Access Mode

This setting determines how large hard drives are to be accessed. The options are
DOS or Other (for Unix, Novelle NetWare and other operating systems).

XAdvanced Chipset Control

Access the submenu to make changes to the following settings.

*Warning: Take Caution when changing the Advanced settings. An incorrect

system setup, a very high DRAM frequency or an incorrect DRAM timing may
cause the system to become unstable. When this occurs, reset the setting to
the default setting.

SERR Signal Condition

This setting specifi es the ECC Error conditions that an SERR# is to be asserted.
The options are None, Single Bit, Multiple Bit, and Both.

4GB PCI Hole Granularity

This feature allows you to select the granularity of PCI hole for PCI slots. If MTRRs
are not enough, this option may be used to reduce MTRR occupation. The options
are: 256 MB, 512 MB, 1GB and 2GB.

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X7DB8+/X7DBE+ User's Manual

Memory Branch Mode

This option determines how the two memory branches operate. System address
space can either be interleaved between the two branches or Sequential from one
branch to another. Mirror mode allows data correction by maintaining two copies
of data in two branches. Single Channel 0 allows a single DIMM population during
system manufacturing. The options are Interleave, Sequential, Mirroring, and
Single Channel 0.

Branch 0 Rank Sparing

Select enable to enable the sparing feature for Branch 0 Rank. The options are
Enabled and Disabled.

Branch 1 Rank Sparing

Select enable to enable the sparing feature for Branch 0 Rank. The options are
Enabled and Disabled.

Enhanced x8 Detection

Select Enabled to enable Enhanced x8 DRAM UC Error Detection. The options
are Disabled and Enabled.

Crystal Beach Features

This feature cooperates with Intel I/O AT (Acceleration Technology) to accelerate
the performance of TOE devices. (*Note: A TOE device is a specialized,
dedicated processor that is installed on an add-on card or a network card to
handle some or all packet processing of this add-on card. For the X7DB8/E,
the TOE device is built inside the ESB 2 South Bridge chip.) The options are

Enabled and Disabled.

Route Port 80h Cycles to

This feature allows the user to decide which bus to send debug information to. The
options are Disabled, PCI and LPC.

Clock Spectrum Feature

If Enabled, the BIOS will monitor the level of Electromagnetic Interference caused
by the components and will attempt to decrease the interference whenever needed.
The options are Enabled and Disabled.

Enabling Multi-Media Timer

Select Yes to activate a set of timers that are alternative to the traditional 8254
timers for the OS use. The options are Yes and No.

USB Function

Select Enabled to enable the function of USB devices specifi ed. The settings are

Enabled and Disabled.

Legacy USB Support

This setting allows you to enable support for Legacy USB devices. The settings
are Enabled and Disabled.

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Chapter 4: BIOS

XAdvanced Processor Options

Access the submenu to make changes to the following settings.

CPU Speed

This is a display that indicates the speed of the installed processor.

Frequency Ratio (*Available when supported by the CPU.)

The feature allows the user to set the internal frequency multiplier for the CPU.
The options are: Default, x12, x13, x14, x15, x16, x17 and x18.

Hyper-threading (*Available when supported by the CPU.)

Set to Enabled to use the Hyper-Threading T echnology , which will result in increased
CPU performance. The options are Disabled and Enabled.

Core-Multi-Processing (*Available when supported by the CPU.)

Set to Enabled to use a processor's Second Core and beyond. (Please refer to
Intel's web site for more information.) The options are Disabled and Enabled.

Machine Checking (*Available when supported by the CPU.)

Set to Enabled to activate the function of Machine Checking and allow the CPU to
detect and report hardware (machine) errors via a set of model-specifi c registers

(MSRs). The options are Disabled and Enabled.

Thermal Management 2 (*Available when supported by the CPU.)

Set to Enabled to use Thermal Management 2 (TM2) which will lower CPU voltage
and frequency when the CPU temperature reaches a predefi ned overheat threshold.
Set to Disabled to use Thermal Manager 1 (TM1), allowing CPU clocking to be
regulated via CPU Internal Clock modulation when the CPU temperature reaches

the overheat threshold.

C1 Enhanced Mode (*Available when supported by the CPU.)

Set to Enabled to enable Enhanced Halt State to lower CPU voltage/frequency to
prevent overheat. The options are Enabled and Disabled. (*Note: please refer
to Intel’s web site for detailed information.)

No Execute Mode Memory Protection (*Available when supported by the

CPU and the OS.)

Set to Enabled to enable Execute Disable Bit and allow the processor to classify
areas in memory where an application code can execute and where it cannot, and
thus preventing a worm or a virus from inserting and creating a fl ood of codes to
overwhelm the processor or damage the system during an attack.

(*Note: this feature is available when your OS and your CPU support the function
of Execute Disable Bit.) The options are Disabled and Enabled. (Note: For more
information regarding hardware/software support for this function, please refer to
Intel's and Microsoft's web sites.)

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X7DB8+/X7DBE+ User's Manual

Adjacent Cache Line Prefetch (*Available when supported by the CPU.)

The CPU fetches the cache line for 64 bytes if this option is set to Disabled. The
CPU fetches both cache lines for 128 bytes as comprised if Enabled. The options
are Disabled and Enabled.

Hardware Prefetch (*Available when supported by the CPU.)

Set to this option to enabled to enable the hardware components that are used in
conjunction with software programs to prefetch data in order to shorten execution
cycles and maximize data processing effi ciency. The options are Disabled and

Enabled.

PECI Absent Alarm (*Available when supported by the CPU.)

If set to Enabled, the PECI Absent Alarm will be activated if the function of PECI
(Platform Environment Control Interface) is not available for the onboard process(es)

or for the motherboard. The options are Disabled and Enabled.

Intel <R> Virtualization Technology (*Available when supported by
the CPU.)

Select Enabled to use the feature of Virtualization Technology to allow one platform
to run multiple operating systems and applications in independent partitions, creating
multiple "virtual" systems in one physical computer. The options are Enabled and
Disabled. (*Note: If there is any change to this setting, you will need to power off
and restart the system for the change to take effect.) Please refer to Intel’s web
site for detailed information.

Intel EIST Support (*Available when supported by the CPU.)

Select Enabled to use the Enhanced Intel SpeedStep Technology and allows the
system to automatically adjust processor voltage and core frequency in an effort
to reduce power consumption and heat dissipation. The options are Enabled and

Disabled. Please refer to Intel’s web site for detailed information.

XI/O Device Confi guration

Access the submenu to make changes to the following settings.

KBC Clock Input

This setting allows you to select clock frequency for KBC. The options are 6MHz,
8MHz, 12MHz, and 16MHz.

Serial Port A

This setting allows you to assign control of serial port A. The options are Enabled
(user defi ned), Disabled, and Auto (BIOS- or OS- controlled).

Base I/O Address

This setting allows you to select the base I/O address for serial port A. The options
are 3F8, 2F8, 3E8, and 2E8.

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Chapter 4: BIOS

Interrupt

This setting allows you to select the IRQ (interrupt request) for serial port A. The
options are IRQ3 and IRQ4.

Serial Port B

This setting allows you to assign control of serial port B. The options are Enabled
(user defi ned), Disabled, Auto (BIOS controlled) and OS Controlled.

Mode

This setting allows you to set the type of device that will be connected to serial
port B. The options are Normal and IR (for an infrared device).

Base I/O Address

This setting allows you to select the base I/O address for serial port B. The
options are 3F8, 2F8, 3E8 and 2E8.

Interrupt

This setting allows you to select the IRQ (interrupt request) for serial port B. The
options are IRQ3 and IRQ4.

Parallel Port

This setting allows you to assign control of the parallel port. The options are

Enabled (user defi ned), Disabled and Auto (BIOS-or OS- controlled).

Base I/O Address

Select the base I/O address for the parallel port. The options are 378, 278 and
3BC.

Interrupt

This setting allows you to select the IRQ (interrupt request) for the parallel port.
The options are IRQ5 and IRQ7.

Mode

This feature allows you to specify the parallel port mode. The options are Output
only, Bi-Directional, EPP and ECP.

DMA Channel

This item allows you to specify the DMA channel for the parallel port. The options
are DMA1 and DMA3.

Floppy Disk Controller

This setting allows you to assign control of the fl oppy disk controller. The options
are Enabled (user defi ned), Disabled, and Auto (BIOS and OS controlled).

Base I/O Address

This setting allows you to select the base I/O address for the Floppy port. The
options are Primary and Secondary.

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X7DB8+/X7DBE+ User's Manual

XDMI Event Logging

Access the submenu to make changes to the following settings.

Event Log Validity

This is a display to inform you of the event log validity. It is not a setting.

Event Log Capacity

This is a display to inform you of the event log capacity. It is not a setting.

View DMI Event Log

Highlight this item and press <Enter> to view the contents of the event log.

Event Logging

This setting allows you to Enable or Disable event logging.

ECC Event Logging

This setting allows you to Enable or Disable ECC event logging.

Mark DMI Events as Read

Highlight this item and press <Enter> to mark the DMI events as read.

Clear All DMI Event Logs

Select Yes and press <Enter> to clear all DMI event logs. The options are Yes
and No.

4-16

Chapter 4: BIOS

XConsole Redirection

Access the submenu to make changes to the following settings.

COM Port Address

This item allows you to specify which COM port to direct the remote console to:
Onboard COM A or Onboard COM B. This setting can also be Disabled.

BAUD Rate

This item allows you to set the BAUD rate for console redirection. The options
are 300, 1200, 2400, 9600, 19.2K, 38.4K, 57.6K, and 115.2K.

Console Type

This item allows you to set console redirection type. The options are VT100,
VT100,8bit, PC-ANSI, 7bit, PC ANSI, VT100+, VT-UTF8 and ASCII.

Flow Control

This item allows you to select the fl ow control option for console redirection. The
options are: None, XON/XOFF, and CTS/RTS.

Console Connection

This item allows you to decide how console redirection is to be connected: either

Direct or Via Modem.

Continue CR after POST

Choose whether to continue with console redirection after the POST routine.
The options are On and Off.

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X7DB8+/X7DBE+ User's Manual

XHardware Monitor Logic

*Note: The Phoenix BIOS will automatically detect the type of CPU(s)
and hardware monitoring chip used on the motherboard and will display
the Hardware Monitoring Screen accordingly. Your Hardware Monitoring
Screen may look like the one shown on this page, on P. 4-19, or on P. 4-20,
depending on the type of CPU(s) and HW Monitoring chip you are using.

CPU Temperature Threshold

This option allows the user to set a CPU temperature threshold that will activate
the alarm system when the CPU temperature reaches this pre-set temperature

threshold. The options are 70
Highlight this and hit <Enter> to see the following items:

CPU1 Temperature/CPU1 Second Core

CPU2 Temperature/CPU2 Second Core

System Temperature

Fan1-Fan8 Speeds: If the feature of Auto Fan Control is enabled, the BIOS will

automatically display the status of the fans indicated in this item.

o

C, 75oC, 80oC and 85oC. (See the note below.)

Fan Speed Control Modes

This feature allows the user to decide how the system controls the speeds of the
onboard fans. The CPU temperature and the fan speed are correlative. When the
CPU on-die temperature increases, the fan speed will also increase, and vice versa.
Select Workstation if your system is used as a Workstation. Select Server if your
system is used as a Server. Select 3-pin if your chassis uses 3-pin fans. Select
4-pin if your chassis uses 4-pin fans. Select “Disable” to disable the fan speed
control function and allow the onboard fans to constantly run at the full speed (12V).
The Options are: 1. Disable, 2. Optimized Server w/3-pin, 3. Optimized Workstation
w/3-pin, 4. Optimized Server w/4-pin, and 5. Optimized Workstation w/4-pin.

Voltage Monitoring

The following items will be monitored and displayed:
P12V_VR0/P12V_VR1

FSB VTT
PXH Vcore
ES2B Vcore
CPU1Vcore/CPU2Vcore
P3V3

*Note: In the Windows OS environment, the Supero Doctor III settings take pre­cedence over the BIOS settings. When fi rst installed, Supero Doctor III adopts the
temperature threshold settings previously set in the BIOS. Any subsequent changes
to these thresholds must be made within Supero Doctor, since the SD III settings
override the BIOS settings. For the Windows OS to adopt the BIOS temperature
threshold settings, please change the SDIII settings to be the same as those set
in the BIOS.

4-18

Chapter 4: BIOS

XHardware Monitor Logic

CPU Temperature Threshold (*See the Note on Page 4-18.)

This option allows the user to set a CPU temperature threshold that will activate
the alarm system when the CPU temperature reaches this pre-set temperature

threshold. The options are 70
Highlight this and hit <Enter> to see the following items:

CPU1 Temperature/CPU1 Second Core

CPU2 Temperature/CPU2 Second Core

System Temperature

Fan1-Fan8 Speeds: If the feature of Auto Fan Control is enabled, the BIOS will

automatically display the status of the fans indicated in this item.

Fan Speed Control Modes

This feature allows the user to decide how the system controls the speeds of the
onboard fans. The CPU temperature and the fan speed are correlative. When the
CPU on-die temperature increases, the fan speed will also increase, and vice versa.
Select Workstation if your system is used as a Workstation. Select Server if your
system is used as a Server. Select 3-pin if your chassis uses 3-pin fans. Select
4-pin if your chassis uses 4-pin fans. Select “Disable” to disable the fan speed
control function and allow the onboard fans to constantly run at the full speed (12V).
The Options are: 1. Disable, 2. Optimized Server w/3-pin, 3. Optimized Workstation
w/3-pin, 4. Optimized Server w/4-pin, and 5. Optimized Workstation w/4-pin.

o

C, 75oC, 80oC and 85oC. (See the note below.)

Voltage Monitoring

The following items will be monitored and displayed:
Vcore A/Vcore B

-12V/+12V
P1V5
+3.3V
+12V
5Vsb/5VDD
P_VTT
Vbat

*Note: In the Windows OS environment, the Supero Doctor III settings take pre­cedence over the BIOS settings. When fi rst installed, Supero Doctor III adopts the
temperature threshold settings previously set in the BIOS. Any subsequent changes
to these thresholds must be made within Supero Doctor, since the SD III settings
override the BIOS settings. For the Windows OS to adopt the BIOS temperature
threshold settings, please change the SDIII settings to be the same as those set
in the BIOS.

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X7DB8+/X7DBE+ User's Manual

XHardware Monitor Logic (*See the Note on Page 4-18.)

CPU Temperature Threshold

This option allows the user to set a CPU temperature threshold that will activate
the alarm system when the CPU temperature reaches this pre-set temperature

threshold. The hardcode default setting is 80

o

C. (See the note below.)

Temperature Monitoring

Highlight this and hit <Enter> to see the following items:

PECI Agent 1 Temperature/PECI Agent 2 Temperature/PECI Agent 3

Temperature/PECI Agent 4 Temperature

System Temperature

Fan1-Fan8 Speeds: If the feature of Auto Fan Control is enabled, the BIOS will

automatically display the status of the fans indicated in this item.

Fan Speed Control Modes

This feature allows the user to decide how the system controls the speeds of the
onboard fans. The CPU temperature and the fan speed are correlative. When the
CPU on-die temperature increases, the fan speed will also increase, and vice versa.
Select Workstation if your system is used as a Workstation. Select Server if your
system is used as a Server. Select 3-pin if your chassis uses 3-pin fans. Select
4-pin if your chassis uses 4-pin fans. Select “Disable” to disable the fan speed
control function and allow the onboard fans to constantly run at the full speed (12V).
The Options are: 1. Disable, 2. Optimized Server w/3-pin, 3. Optimized Workstation
w/3-pin, 4. Optimized Server w/4-pin, and 5. Optimized Workstation w/4-pin.

Voltage Monitoring

The following items will be monitored and displayed:
Vcore A:/Vcore B:

-12V/+12V
P1V2_NIC_SEN
+3.3V
5Vsb/5VDD
P_VTT
Vbat

*Note: In the Windows OS environment, the Supero Doctor III settings take pre­cedence over the BIOS settings. When fi rst installed, Supero Doctor III adopts the
temperature threshold settings previously set in the BIOS. Any subsequent changes
to these thresholds must be made within Supero Doctor, since the SD III settings
override the BIOS settings. For the Windows OS to adopt the BIOS temperature
threshold settings, please change the SDIII settings to be the same as those set
in the BIOS.

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Chapter 4: BIOS

XIPMI (The option is available only when an IPMI card is installed

in the system.)

IPMI Specifi cation Version:

This item displays the current IPMI Version.

Firmware Version: This item displays the current Firmware Version.

System Event Logging

Select Enabled to enable IPMI Event Logging. When this function is set to Disabled,
the system will continue to log events received via system interface. The options
are Enabled and Disabled.

Clear System Event Logging

Enabling this function to force the BIOS to clear the system event logs during the
next cold boot. The options are Enabled and Disabled.

Existing Event Log Number

This item displays the number of the existing event log.

Event Log Control

System Firmware Progress

Enabling this function to log POST progress. The options are Enabled and

Disabled.

BIOS POST Errors

Enabling this function to log POST errors. The options are Enabled and

Disabled.

BIOS POST Watch Dog

Set to Enabled to enable POST Watch Dog. The options are Enabled and
Disabled.

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X7DB8+/X7DBE+ User's Manual

OS Boot Watch Dog

Set to Enabled to enable OS Boot Watch Dog. The options are Enabled and

Disabled.

Timer for Loading OS (Minutes)

This feature allows the user to set the time value (in minutes) for the previous
item: OS Boot Watch Dog by keying-in a desired number in the blank. The
default setting is 10 (minutes.) (Please ignore this option when OS Boot Watch
Dog is set to "Disabled".)

Time Out Option

This feature allows the user to determine what action to take in an event of a
system boot failure. The options are No Action, Reset, Power Off and Power
Cycles.

XSystem Event Log/System Event Log (List Mode)

These options display the System Event (SEL) Log and System Event (SEL) Log
in List Mode. Items include: SEL (System Event Log) Entry Number, SEL Record
ID, SEL Record Type, Time Stamp, Generator ID, SEL Message Revision, Sensor
Type, Sensor Number, SEL Event Type, Event Description, and SEL Event Data.

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Chapter 4: BIOS

XRealtime Sensor Data

This feature display information from motherboard sensors, such as
temperatures, fan speeds and voltages of various components.

XIPMI LAN Confi guration

The following features allow the user to confi gure and monitor IPMI LAN
settings.

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X7DB8+/X7DBE+ User's Manual

VLAN Tagging

Select Enabled to enable Virtual LAN(s) for IPMI connections and allow the user
to confi gure VLAN settings. The options are Enabled and Disabled.

VLAN ID

If VLAN Tagging above is set to Enabled, this item allows the user to change the
VLAN ID. If VLAN Tagging is disabled, this item will be ignored by the fi rmware.

IP Address

This item displays the IP address for the IPMI connection detected.

IP Subnet Mask

This item displays the IP Subnet Mask for the IPMI connection detected.

Default Gateway

This item displays the Default Gateway for the IPMI connection detected.

MAC Address

This item displays the MAC Address for the IPMI connection detected.

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Chapter 4: BIOS

4-5 Security

Choose Security from the Phoenix BIOS Setup Utility main menu with the arrow
keys. You should see the following display. Security setting options are displayed
by highlighting the setting using the arrow keys and pressing <Enter>. All Security
BIOS settings are described in this section.

Supervisor Password Is:

This feature indicates if a supervisor password has been entered to the system.
Clear means such a password has not been used, and Set means a supervisor
password has been entered.

User Password Is:

This feature indicates if a user password has been entered to the system. Clear
means such a password has not been used, and Set means a user password has
been entered.

Set Supervisor Password

When the item Set "Supervisor Password" is highlighted, hit the <Enter> key . When
prompted, type the Supervisor's password in the dialogue box to set or to change
supervisor's password, which allows access to the BIOS.

Set User Password

When the item "Set User Password" is highlighted, hit the <Enter> key. When
prompted, type the user's password in the dialogue box to set or to change the
user's password, which allows access to the system at boot-up.

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X7DB8+/X7DBE+ User's Manual

Password on Boot

This setting allows you to determine if a password is required for a user to enter
the system at system boot. The options are Enabled (password required) and
Disabled (password not required)

4-6 Boot

Choose Boot from the Phoenix BIOS Setup Utility main menu with the arrow keys.
You should see the following display. See details on how to change the order and
specs of boot devices in the Item Specifi c Help window. All Boot BIOS settings are
described in this section.

Boot List

Candidate
List

Boot Priority Order/Excluded from Boot Orders

The devices included in the boot list section (above) are bootable devices listed in
the sequence of boot order as specifi ed. The boot functions for the devices included
in the candidate list (above) are currently disabled. Use a <+> key or a <-> key to
move the device up or down. Use the <f> key or the <r> key to specify the type of
an USB device, either fi xed or removable. You can select one item from the boot
list and hit the <x> key to remove it from the list of bootable devices (to make its
resource available for other bootable devices). Subsequently, you can select an
item from the candidate list and hit the <x> key to remove it from the candidate
list and put it in the boot list. This item will then become a bootable device. See
details on how to change the priority of boot order of devices in the "Item Specifi c
Help" window.

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Chapter 4: BIOS

4-7 Exit

Choose Exit from the Phoenix BIOS Setup Utility main menu with the arrow keys.
You should see the following display. All Exit BIOS settings are described in this
section.

Exit Saving Changes

Highlight this item and hit <Enter> to save any changes you made and to exit the
BIOS Setup utility.

Exit Discarding Changes

Highlight this item and hit <Enter> to exit the BIOS Setup utility without saving any
changes you may have made.

Load Setup Defaults

Highlight this item and hit <Enter> to load the default settings for all items in the
BIOS Setup. These are the safest settings to use.

Discard Changes

Highlight this item and hit <Enter> to discard (cancel) any changes you made.
You will remain in the Setup utility.

Save Changes

Highlight this item and hit <Enter> to save any changes you made. You will remain
in the Setup utility.

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X7DB8+/X7DBE+ User's Manual

Notes

4-28

Appendix A: BIOS POST Messages

Appendix A

BIOS POST Messages

During the Power-On Self-Test (POST), the BIOS will check for problems. If a prob­lem is found, the BIOS will activate an alarm or display a message. The following is
a list of such BIOS messages.

Failure Fixed Disk

Fixed disk is not working or not confi gured properly. Check to see if fi xed disk is at-
tached properly. Run Setup. Find out if the fi xed-disk type is correctly identifi ed.

Stuck key

Stuck key on keyboard.

Keyboard error

Keyboard not working.

Keyboard Controller Failed

Keyboard controller failed test. May require replacing keyboard controller.

Keyboard locked - Unlock key switch

Unlock the system to proceed.

Monitor type does not match CMOS - Run SETUP

Monitor type not correctly identifi ed in Setup

Shadow Ram Failed at offset: nnnn

Shadow RAM failed at offset nnnn of the 64k block at which the error was de­tected.

System RAM Failed at offset: nnnn

System RAM failed at offset nnnn of in the 64k block at which the error was de­tected.

Extended RAM Failed at offset: nnnn Extended memory not
working or not confi gured properly at offset nnnn.

System battery is dead - Replace and run SETUP

The CMOS clock battery indicator shows the battery is dead. Replace the battery and
run Setup to reconfi gure the system.

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X7DB8+/X7DBE+ User's Manual

System CMOS checksum bad - Default confi guration used

System CMOS has been corrupted or modifi ed incorrectly, perhaps by an application
program that changes data stored in CMOS. The BIOS installed Default Setup V alues.
If you do not want these values, enter Setup and enter your own values. If the error
persists, check the system battery or contact your dealer.

System timer error

The timer test failed. Requires repair of system board.

Real time clock error
Real-Time Clock fails BIOS hardware test. May require board repair.

Check date and time settings

BIOS found date or time out of range and reset the Real-Time Clock. May require
setting legal date (1991-2099).

Previous boot incomplete - Default confi guration used

Previous POST did not complete successfully. POST loads default values and offers
to run Setup. If the failure was caused by incorrect values and they are not corrected,
the next boot will likely fail. On systems with control of wait states, improper Setup
settings can also terminate POST and cause this error on the next boot. Run Setup
and verify that the waitstate confi guration is correct. This error is cleared the next
time the system is booted.

Memory Size found by POST differed from CMOS

Memory size found by POST differed from CMOS.

Diskette drive A error

Diskette drive B error

Drive A: or B: is present but fails the BIOS POST diskette tests. Check to see that
the drive is defi ned with the proper diskette type in Setup and that the diskette drive
is attached correctly.

Incorrect Drive A type - run SETUP

Type of fl oppy drive A: not correctly identifi ed in Setup.

Incorrect Drive B type - run SETUP

Type of fl oppy drive B: not correctly identifi ed in Setup.

A-2

Appendix A: BIOS POST Messages

System cache error - Cache disabled

RAM cache failed and BIOS disabled the cache. On older boards, check the cache
jumpers. Y ou may have to replace the cache. See your dealer . A disabled cache slows
system performance considerably.

CPU ID:

CPU socket number for Multi-Processor error.

EISA CMOS not writeable

ServerBIOS2 test error: Cannot write to EISA CMOS.

DMA Test Failed

ServerBIOS2 test error: Cannot write to extended DMA (Direct Memory Access)
registers.

Software NMI Failed

ServerBIOS2 test error: Cannot generate software NMI (Non-Maskable Interrupt).

Fail-Safe Timer NMI Failed

ServerBIOS2 test error: Fail-Safe Timer takes too long.

device Address Confl ict

Address confl ict for specifi ed device.

Allocation Error for: device

Run ISA or EISA Confi guration Utility to resolve resource confl ict for the specifi ed

device.

CD ROM Drive

CD ROM Drive identifi ed.

Entering SETUP ...

Starting Setup program

Failing Bits: nnnn

The hex number nnnn is a map of the bits at the RAM address which failed the memory
test. Each 1 (one) in the map indicates a failed bit. See errors 230, 231, or 232 above
for offset address of the failure in System, Extended, or Shadow memory.

Fixed Disk n

Fixed disk n (0-3) identifi ed.

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X7DB8+/X7DBE+ User's Manual

Invalid System Confi guration Data

Problem with NVRAM (CMOS) data.

I/O device IRQ confl ict

I/O device IRQ confl ict error.

PS/2 Mouse Boot Summary Screen:

PS/2 Mouse installed.

nnnn kB Extended RAM Passed

Where nnnn is the amount of RAM in kilobytes successfully tested.

nnnn Cache SRAM Passed

Where nnnn is the amount of system cache in kilobytes successfully tested.

nnnn kB Shadow RAM Passed

Where nnnn is the amount of shadow RAM in kilobytes successfully tested.

nnnn kB System RAM Passed

Where nnnn is the amount of system RAM in kilobytes successfully tested.

One or more I2O Block Storage Devices were excluded from the Setup Boot

Menu

There was not enough room in the IPL table to display all installed I2O block-storage
devices.

Operating system not found

Operating system cannot be located on either drive A: or drive C:. Enter Setup and
see if fi xed disk and drive A: are properly identifi ed.

Parity Check 1 nnnn

Parity error found in the system bus. BIOS attempts to locate the address and display
it on the screen. If it cannot locate the address, it displays ????. Parity is a method
for checking errors in binary data. A parity error indicates that some data has been
corrupted.

Parity Check 2 nnnn

Parity error found in the I/O bus. BIOS attempts to locate the address and display it
on the screen. If it cannot locate the address, it displays ????.

A-4

Appendix A: BIOS POST Messages

Press <F1> to resume, <F2> to Setup, <F3> for previous

Displayed after any recoverable error message. Press <F1> to start the boot process
or <F2> to enter Setup and change the settings. Press <F3> to display the previous
screen (usually an initialization error of an Option ROM, i.e., an add-on card). Write
down and follow the information shown on the screen.

Press <F2> to enter Setup

Optional message displayed during POST. Can be turned off in Setup.

PS/2 Mouse:

PS/2 mouse identifi ed.

Run the I2O Confi guration Utility

One or more unclaimed block storage devices have the Confi guration Request bit set
in the LCT. Run an I2O Confi guration Utility (e.g. the SAC utility).

System BIOS shadowed

System BIOS copied to shadow RAM.

UMB upper limit segment address: nnnn

Displays the address nnnn of the upper limit of Upper Memory Blocks, indicating
released segments of the BIOS which can be reclaimed by a virtual memory man­ager.

Video BIOS shadowed

Video BIOS successfully copied to shadow RAM.

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X7DB8+/X7DBE+ User's Manual

Notes

A-6

Appendix B: BIOS POST Codes

Appendix B

BIOS POST Codes

This section lists the POST (Power On Self Test) codes for the Phoenix BIOS. POST
codes are divided into two categories: recoverable and terminal.

Recoverable POST Errors

When a recoverable type of error occurs during POST, the BIOS will display an
POST code that describes the problem. BIOS may also issue one of the follow­ing beep codes:

1 long and two short beeps - video confi guration error
1 repetitive long beep - no memory detected
1 continuous beep with Front Panel Overheat LED on - system overheat

Terminal POST Errors

If a terminal type of error occurs, BIOS will shut down the system. Before doing
so, BIOS will write the error to port 80h, attempt to initialize video and write the
error in the top left corner of the screen. The following is a list of codes that may
be written to port 80h.

POST Code Description

01h IPMI Initialization
02h Verify Real Mode
03h Disable Non-Maskable Interrupt (NMI)
04h Get CPU type
06h Initialize system hardware
07h Disable shadow and execute code from the ROM.
08h Initialize chipset with initial POST values
09h Set IN POST fl ag
0Ah Initialize CPU registers
0Bh Enable CPU cache
0Ch Initialize caches to initial POST values
0Eh Initialize I/O component
0Fh Initialize the local bus IDE
10h Initialize Power Management
11h Load alternate registers with initial POST values
12h Restore CPU control word during warm boot
13h Reset PCI Bus Mastering devices
14h Initialize keyboard controller
16h 1-2-2-3 BIOS ROM checksum
17h Initialize cache before memory Auto size

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X7DB8+/X7DBE+ User's Manual

POST Code Description

18h 8254 timer initialization
1Ah 8237 DMA controller initialization
1Ch Reset Programmable Interrupt Controller
20h 1-3-1-1 Test DRAM refresh
22h 1-3-1-3 Test 8742 Keyboard Controller
24h Set ES segment register to 4 GB
28h Auto size DRAM
29h Initialize POST Memory Manager
2Ah Clear 512 kB base RAM
2Ch 1-3-4-1 RAM failure on address line xxxx*
2Eh 1-3-4-3 RAM failure on data bits xxxx* of low byte of
memory bus
2Fh Enable cache before system BIOS shadow
32h Test CPU bus-clock frequency
33h Initialize Phoenix Dispatch Manager
36h Warm start shut down
38h Shadow system BIOS ROM
3Ah Auto size cache
3Ch Advanced confi guration of chipset registers
3Dh Load alternate registers with CMOS values
41h Initialize extended memory for RomPilot (optional)
42h Initialize interrupt vectors
45h POST device initialization
46h 2-1-2-3 Check ROM copyright notice
48h Check video confi guration against CMOS
49h Initialize PCI bus and devices
4Ah Initialize all video adapters in system
4Bh QuietBoot start (optional)
4Ch Shadow video BIOS ROM
4Eh Display BIOS copyright notice
4Fh Initialize MultiBoot
50h Display CPU type and speed
51h Initialize EISA board (optional)
52h Test keyboard
54h Set key click if enabled
55h Enable USB devices
58h 2-2-3-1 Test for unexpected interrupts
59h Initialize POST display service
5Ah Display prompt “Press <ESC> to enter SETUP”
5Bh Disable CPU cache

B-2

Appendix B: BIOS POST Codes

POST Code Description

5Ch Test RAM between 512 and 640 kB
60h Test extended memory
62h Test extended memory address lines
64h Jump to UserPatch1
66h Confi gure advanced cache registers
67h Initialize Multi Processor APIC
68h Enable external and CPU caches
69h Setup System Management Mode (SMM) area
6Ah Display external L2 cache size
6Bh Load custom defaults (optional)
6Ch Display shadow-area message
70h Display error messages
72h Check for confi guration errors
76h Check for keyboard errors
7Ch Set up hardware interrupt vectors
7Dh Initialize Intelligent System Monitoring (optional)
7Eh Initialize coprocessor if present
80h Disable onboard Super I/O ports and IRQs (optional)
81h Late POST device initialization
82h Detect and install external RS232 ports
83h Confi gure non-MCD IDE controllers
84h Detect and install external parallel ports
85h Initialize PC-compatible PnP ISA devices
86h Re-initialize onboard I/O ports.
87h Confi gure Motherboard Confi gurable Devices
(optional)
88h Initialize BIOS Data Area
89h Enable Non-Maskable Interrupts (NMIs)
8Ah Initialize Extended BIOS Data Area
8Bh Test and initialize PS/2 mouse
8Ch Initialize fl oppy controller
8Fh Determine number of ATA drives (optional)
90h Initialize hard-disk controllers
91h Initialize local-bus hard-disk controllers
92h Jump to UserPatch2
93h Build MPTABLE for multi-processor boards
95h Install CD ROM for boot
96h Clear huge ES segment register
97h Fix up Multi Processor table
98h 1-2 Search for option ROMs and shadow if successful. One
long, two short beeps on checksum failure

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X7DB8+/X7DBE+ User's Manual

POST Code Description

99h Check for SMART Drive (optional)
9Ch Set up Power Management
9Dh Initialize security engine (optional)
9Eh Enable hardware interrupts
9Fh Determine number of ATA and SCSI drives
A0h Set time of day
A2h Check key lock
A4h Initialize typematic rate
A8h Erase <ESC> prompt
AAh Scan for <ESC> key stroke
ACh Enter SETUP
AEh Clear Boot fl ag
B0h Check for errors
B1h Inform RomPilot about the end of POST (optional)
B2h POST done - prepare to boot operating system
B4h 1 One short beep before boot
B5h Terminate QuietBoot (optional)
B6h Check password (optional)
B7h Initialize ACPI BIOS and PPM Structures
B9h Prepare Boot
BAh Initialize SMBIOS
BCh Clear parity checkers
BDh Display MultiBoot menu
BEh Clear screen (optional)
BFh Check virus and backup reminders
C0h Try to boot with INT 19
C1h Initialize POST Error Manager (PEM)
C2h Initialize error logging
C3h Initialize error display function
C4h Initialize system error fl ags
C6h Console redirection init.
C7h Unhook INT 10h if console redirection enabled
C8h Force check (optional)
C9h Extended ROM checksum (optional)
CDh Reclaim console redirection vector

B-4

Appendix B: BIOS POST Codes

POST Code Description

D2h Unknown interrupt
D4h Check Intel Branding string
D8h Alert Standard Format initialization
D9h Late init for IPMI
DEh Log error if micro-code not updated properly

The following are for boot block in Flash ROM

POST Code Description

E0h Initialize the chipset
E1h Initialize the bridge
E2h Initialize the CPU
E3h Initialize system timer
E4h Initialize system I/O
E5h Check force recovery boot
E6h Checksum BIOS ROM
E7h Go to BIOS
E8h Set Huge Segment
E9h Initialize Multi Processor
EAh Initialize OEM special code
EBh Initialize PIC and DMA
ECh Initialize Memory type
EDh Initialize Memory size
EEh Shadow Boot Block
EFh System memory test
F0h Initialize interrupt vectors
F1h Initialize Run Time Clock
F2h Initialize video
F3h Initialize System Management Manager
F4h Output one beep
F5h Clear Huge Segment
F6h Boot to Mini DOS
F7h Boot to Full DOS

* If the BIOS detects errors on 2C, 2E, or 30 (base 512K RAM error), it displays an
additional word-bitmap (xxxx) indicating the address line or bits that have failed. For
example, “2C 0002” means address line 1 (bit one set) has failed. “2E 1020" means
data bits 12 and 5 (bits 12 and 5 set) have failed in the lower 16 bits. The BIOS also
sends the bitmap to the port-80 LED display. It fi rst displays the checkpoint code,
followed by a delay , the high-order byte, another delay, and then the loworder byte of
the error. It repeats this sequence continuously.

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X7DB8+/X7DBE+ User's Manual

Notes

B-6

Appendix C: Intel HostRAID Setup Guidelines

Appendix C

Intel HostRAID Setup Guidelines

After all the hardware has been installed, you must fi rst confi gure Intel's ESB2
SATA RAID* before you install the Windows Operating System and other software
drivers.

Important Notes to the User:

*Note 1: If you do not wish to confi gure onboard SATA RAID functions, please go

directly to Section C-2, Appendix D and Appendix E for Operating System & Other
Software Installation.

*Note 2: This chapter describes RAID Confi guration Instructions for the Intel ESB2
RAID Controller designed for the Windows OS.

C-1 Introduction to Serial ATA and Parallel ATA

To confi gure the SATA RAID functions, you must fi rst use the Intel ESB2 SATA
RAID Utility program to confi gure the RAID Level that you desire before installing
the Windows XP/2000/2003 operating system and other software drivers. (The
necessary drivers are all included on the Super Micro CD that came packaged with
your motherboard.) Note that the current version of the ESB2 SATA RAID Utility
can only support Windows XP/2000/2003 Operating Systems.

Serial ATA (SATA)

Serial ATA (SATA) is a physical storage interface that uses a single cable with a
minimum of four wires to create a point-to-point connection between devices. It is a
serial link, which supports transfer rates up to 3.0 Gbps. Because the serial cables
used in SATA are thinner than the traditional cables used in Parallel ATA (PATA),
SATA systems have better airfl ow and can be installed in smaller chassis than
Parallel ATA. In addition, the cables used in PATA are limited to a length of 40cm,
while Serial ATA cables can be up to one meter in length. Overall, SATA provides
better functionality than PATA.

Introduction to the Intel ESB2 Serial RAID

Located in the South Bridge of the 5000P chipset, the I/O Controller Hub (ESB2)
provides the I/O subsystem with access to the rest of the system. It supports an
1-channel UltraA TA/100 Bus Master IDE controller (PA TA) and six Serial ATA (SATA)
ports. The ESB2 supports the following PATA and SATA device confi gurations:
Legacy mode and Native mode.

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X7DB8+/X7DBE+ User's Manual

The Intel HostRAID Confi gurations

The following types of Intel's HostRAID confi gurations are supported:
RAID 0 (Data Striping): this writes data in parallel, interleaved ("striped") sections

of two hard drives. Data transfer rate is doubled over using a single disk.
RAID1 (Data Mirroring): an identical data image from one drive is copied to another

drive. The second drive must be the same size or larger than the fi rst drive.
RAID 10 (Striping & Mirroring): RAID 0 and 1 schemes are combined (without parity

information) to get the benefi ts of both.
RAID 5: both data and parity information are striped and mirrored across three or

more hard drives.

The Intel Matrix Storage

The Intel Matrix Storage, supported by the ESB2, allows the user to create RAID
0, RAID 1, RAID 10 and RAID 5 sets by using only six identical hard disk drives.
The Intel Matrix Storage Technology creates two partitions on each hard disk drive
and generate a virtual RAID 0, RAID 1, RAID 10 and RAID 5 sets. It also allows
you the change the HDD partition size without any data.

Confi guring BIOS settings for SATA RAID Functions (Native Mode)

1. Press the <Del> key during system bootup to enter the BIOS Setup Utility.
Note: If it is the fi rst time powering on the system, we recommend you load the

Optimized Default Settings. If you have already done so, please skip to Step 3.

2. Use the arrow keys to select the "Exit" Settings. Once in the "Exit" settings,
Scroll down to select "Load Optimized Default Settings" and press the <Enter>
key. Select "OK" to confi rm the selection. Press the <Enter> key to load the default
settings for the BIOS.

3. Use the arrow keys to select the "Main" section in BIOS.

4. Scroll down to "SATA Controller Mode" and press the <Enter> key to select
"Enhanced"

5. Scroll down to "SATA RAID Enabled" and press <Enter>. Then, select "En­abled."

6. Go to "Exit". Select "Exit Saving Changes" from the "Exit" menu. Press the
<Enter> key to save the changes and exit the BIOS.

7. Once you've exited the BIOS Utility, the system will re-boot.

8. During the system boot-up, press the <Ctrl> and <I> keys simultaneously to run
the Intel RAID Confi guration Utility when prompted by the following message: Press
<Ctrl> <I> for the Intel RAID Confi guration Utility.

(*Note: The Intel RAID Confi guration Utility is only available for systems with two

or more drives installed. The Intel RAID Utility screen will not display in systems
with one drive installed.)

C-2