Page 1
®
SUPER
X6DH8-XB
X6DHE-XB
USER’S MANUAL
Revision 1.1b
Page 2
The information in this User’s Manual has been carefully reviewed and is believed to be accurate.
The vendor assumes no responsibility for any inaccuracies that may be contained in this document,
makes no commitment to update or to keep current the information in this manual, or to notify any
person or organization of the updates. Please Note: For the most up-to-date version of this
manual, please see our web site at www.supermicro.com.
SUPER MICRO COMPUTER reserves the right to make changes to the product described in this
manual at any time and without notice. This product, including software, if any, and documentation may not, in whole or in part, be copied, photocopied, reproduced, translated or reduced to any
medium or machine without prior written consent.
IN NO EVENT WILL SUPER MICRO COMPUTER BE LIABLE FOR DIRECT, INDIRECT, SPECIAL,
INCIDENTAL, SPECULATIVE OR CONSEQUENTIAL DAMAGES ARISING FROM THE USE
OR INABILITY TO USE THIS PRODUCT OR DOCUMENTATION, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGES. IN PARTICULAR, SUPER MICRO COMPUTER SHALL NOT
HAVE LIABILITY FOR ANY HARDWARE, SOFTWARE, OR DATA STORED OR USED WITH THE
PRODUCT, INCLUDING THE COSTS OF REPAIRING, REPLACING, INTEGRATING, INSTALLING
OR RECOVERING SUCH HARDWARE, SOFTWARE, OR DATA.
Any disputes arising between manufacturer and customer shall be governed by the laws of Santa
Clara County in the State of California, USA. The State of California, County of Santa Clara shall
be the exclusive venue for the resolution of any such disputes. Super Micro's total liability for
all claims will not exceed the price paid for the hardware product.
FCC Statement: This equipment has been tested and found to comply with the limits for a Class
A digital device pursuant to Part 15 of the FCC Rules. These limits are designed to provide
reasonable protection against harmful interference when the equipment is operated in a commercial
environment. This equipment generates, uses, and can radiate radio frequency energy and, if not
installed and used in accordance with the manufacturer’s instruction manual, may cause harmful
interference with radio communications. Operation of this equipment in a residential area is likely
to cause harmful interference, in which case you will be required to correct the interference at your
own expense.
California Best Management Practices Regulations for Perchlorate Materials: This Perchlorate
warning applies only to products containing CR (Manganese Dioxide) Lithium coin cells. “Perchlorate
Material-special handling may apply. See www.dtsc.ca.gov/hazardouswaste/perchlorate”
WARNING: Handling of lead solder materials used in this
product may expose you to lead, a chemical known to
the State of California to cause birth defects and other
reproductive harm.
Manual Revision 1.1b
Release Date: June 5, 2007
Unless you request and receive written permission from SUPER MICRO COMPUTER, you may not
copy any part of this document.
Information in this document is subject to change without notice. Other products and companies
referred to herein are trademarks or registered trademarks of their respective companies or mark
holders.
Copyright © 2007 by SUPER MICRO COMPUTER INC.
All rights reserved.
Printed in the United States of America
Page 3
Preface
About This Manual
This manual is written for system integrators, PC technicians and
knowledgeable PC users. It provides information for the installation and use of the
X6DH8-XB/X6DHE-XB motherboard. The X6DH8-XB/X6DHE-XB supports single or
®
dual Intel
Based upon the Intel NetBurst microarchitecture with EM64T support, the Nocona
processor supports features found in the Xeon
Technology, which includes a multi-stage pipeline, allowing the processor to operate
at much higher core frequencies. Packaged in a 604-pin Flip Chip Micro Pin Grid
Array(FC-mPGA4) platform in a Zero Insertion Force (ZIF) socket (mPGA 604), the
EM64T Nocona Processor (800 MHz) supports Hyper-Threading Technology and is
ideal for high performance workstation and server environments with up to two pro-
cessors on one system bus. Please refer to the motherboard specifi cations pages
on our web site (http://www.supermicro.com/Product/)
processors. This product is intended to be professionally installed.
EM64T (NoconaTM) processors at a front side bus speed of 800 MHz.
TM
processor such as Hyper Pipelined
for updates on supported
Preface
Manual Organization
Chapter 1 begins with a checklist of what should be included in your mainboard
box, describes the features, specifi cations and performance of the motherboard and
provides detailed information about the chipset.
Chapter 2 begins with instructions on handling static-sensitive devices. Read this
chapter when you want to install the processor and DIMM memory modules and
when mounting the mainboard in the chassis. Also refer to this chapter to connect
the fl oppy and hard disk drives, SCSI drives, the IDE interfaces, the parallel and
serial ports, the keyboard and mouse, the power supply and various control panel
buttons and indicators.
If you encounter any problems, see Chapter 3, which describes troubleshooting pro-
cedures for the video, the memory and the setup confi guration stored in CMOS. For
quick reference, a general FAQ [Frequently Asked Questions] section is provided.
Chapter 4 includes an introduction to BIOS and provides detailed information on
running the CMOS Setup utility.
Appendix A provides BIOS POST codes.
Appendix B provides software and the OS installation instructions.
iii
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X6DH8-XB/X6DHE-XB User's Manual
Table of Contents
Preface
About This Manual ...................................................................................................... iii
Manual Organization ................................................................................................... iii
Chapter 1: Introduction
1-1 Overview ......................................................................................................... 1-1
Checklist ................................................................................................... 1-1
Contacting Supermicro ............................................................................. 1-2
X6DH8-XB/X6DHE-XB Image ..................................................... 1-3
X6DH8-XB/X6DHE-XB Layout .................................................... 1-4
X6DH8-XB/X6DHE-XB Quick Reference .................................... 1-5
Motherboard Features ................................................................................ 1-6
Intel E7520 (Lindenhurst) Chipset: System Block Diagram .................... 1-8
1-2 Chipset Overview ........................................................................................... 1-9
1-3 Special Features ........................................................................................... 1-10
1-4 PC Health Monitoring ...........................................................................................
1-10
1-5 ACPI Features .............................................................................................. 1-12
1-6 Power Supply ............................................................................................... 1-13
1-7 Super I/O ........................................................................................................ 1-14
Chapter 2: Installation
2-1 Static-Sensitive Devices ................................................................................. 2-1
Precautions ................................................................................................ 2-1
Unpacking ................................................................................................ 2-1
2-2 Xeon EM64T Processor and Heatsink Installation ......................................... 2-2
2-3 Installing DIMMs ............................................................................................. 2-6
2-4 I/O Ports/Control Panel Connectors ............................................................... 2-7
2-5 Connecting Cables ........................................................................................... 2-9
ATX Power Connector ............................................................................ 2-9
Processor Power Connector ................................................................... 2-9
NMI Button ............................................................................................. 2-10
Power LED ............................................................................................. 2-10
HDD LED .............................................................................................. 2-11
NIC1/NIC2 LED ..................................................................................... 2-11
Overheat/Fan Fail LED ......................................................................... 2-12
Power Fail LED ........................................................................................ 2-12
Reset Button ......................................................................................... 2-13
iv
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Table of Contents
Power Button .......................................................................................... 2-13
Chassis Intrusion .................................................................................... 2-14
Serial Ports ............................................................................................. 2-14
Universal Serial Bus (USB0/1) ................................................................ 2-15
Extra Universal Serial Bus Headers (FPUSB2/3) ................................... 2-15
GLAN (Ethernet Ports) ............................................................................. 2-16
ATX PS/2 Keyboard and Mouse Ports ..................................................... 2-16
Fan Headers .......................................................................................... 2-17
Power LED/Speaker Header ................................................................... 2-17
Wake-On-Ring .......................................................................................... 2-18
Wake-On-LAN .......................................................................................... 2-18
SMB .......................................................................................................... 2-19
SMB Power .............................................................................................. 2-19
Overheat LED ........................................................................................... 2-20
Power Fault .............................................................................................. 2-20
2-6 Jumper Settings ............................................................................................ 2-21
Explanation of Jumpers ......................................................................... 2-21
GLAN Enable/Disable ............................................................................ 2-21
CMOS Clear ........................................................................................... 2-22
Watch Dog Enable/Disable ...................................................................... 2-22
VGA Enable/Disable ................................................................................. 2-23
Alarm Reset .............................................................................................. 2-23
Force Power On ....................................................................................... 2-24
3rd Power Supply Alarm Enable .............................................................. 2-24
SCSI Enable/Disable ................................................................................ 2-25
SCSI Termination Enable ......................................................................... 2-25
PLLSEL .................................................................................................... 2-26
Reboot Option .......................................................................................... 2-26
2-7 Onboard Indicators ....................................................................................... 2-27
GLAN LEDs .............................................................................................. 2-27
2-8 Floppy/Hard Disk Drive and SCSI Connections ........................................... 2-28
Floppy Connector .................................................................................... 2-28
IDE Connectors ....................................................................................... 2-29
SCSI Connectors ..................................................................................... 2-30
Chapter 3: Troubleshooting
3-1 Troubleshooting Procedures ........................................................................... 3-1
Before Power On ....................................................................................... 3-1
No Power ................................................................................................... 3-1
v
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X6DH8-XB/X6DHE-XB User's Manual
No Video .................................................................................................. 3-1
Memory Errors ........................................................................................... 3-2
Losing the System’s Setup Confi guration ................................................ 3-2
3-2 Technical Support Procedures ....................................................................... 3-2
3-3 Frequently Asked Questions .......................................................................... 3-3
3-4 Returning Merchandise for Service ................................................................. 3-4
Chapter 4: BIOS
4-1 Introduction ....................................................................................................... 4-1
4-2 Running Setup ................................................................................................. 4-2
4-3 Main BIOS Setup ............................................................................................. 4-2
4-4 Advanced Setup ............................................................................................... 4-7
4-5 Security Setup ............................................................................................... 4-17
4-6 Boot Setup ...................................................................................................... 4-19
4-7 Exit .................................................................................................................. 4-20
Appendices:
Appendix A: BIOS POST Messages ..........................................................................A-1
Appendix B: BIOS POST Codes ................................................................................B-1
Appendix C: Installing Software Drivers and the Operating System .........................C-1
vi
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Chapter 1: Introduction
Chapter 1
Introduction
1-1 Overview
Checklist
Congratulations on purchasing your computer motherboard from an acknowledged
leader in the industry. Supermicro boards are designed with the utmost attention
to detail to provide you with the highest standards in quality and performance.
Check that the following items have all been included with your motherboard. If
anything listed here is damaged or missing, contact your retailer. All are included
in the Retail Box.
One (1) Supermicro Mainboard
One (1) ribbon cable for IDE devices
One (1) fl oppy ribbon cable
One (1) COM port cable
One (1) 2-port USB cable
One (1) Ultra 320 SCSI cable (*X6DH8-XB only)
One (1) SATA cable
One (1) I/O backpanel shield
One (1) Supermicro CD containing drivers and utilities
One (1) User's/BIOS Manual
One (1) Ultra 320 SCSI User's Manual (*X6DH8-XB only)
1-1
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X6DH8-XB/X6DHE-XB User's Manual
Contacting Supermicro
Headquarters
Address: SuperMicro Computer, Inc.
980 Rock Ave.
San Jose, CA 95131 U.S.A.
Tel: +1 (408) 503-8000
Fax: +1 (408) 503-8008
Email: marketing@supermicro.com (General Information)
support@supermicro.com (Technical Support)
Web Site: www.supermicro.com
Europe
Address: SuperMicro Computer B.V.
Het Sterrenbeeld 28, 5215 ML
's-Hertogenbosch, The Netherlands
Tel: +31 (0) 73-6400390
Fax: +31 (0) 73-6416525
Email: sales@supermicro.nl (General Information)
support@supermicro.nl (Technical Support)
rma@supermicro.nl (Customer Support)
Asia-Pacifi c
Address: SuperMicro, Taiwan
4F, No. 232-1 Liancheng Road
Chung-Ho 235, Taipei Hsien, Taiwan, R.O.C.
Tel: +886-(2) 8226-3990
Fax: +886-(2) 8226-3991
Web Site: www.supermicro.com.tw
Technical Support:
Email: support@supermicro.com.tw
Tel: 886-2-8228-1366, ext.132 or 139
1-2
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Chapter 1: Introduction
Figure 1-1. X6DH8-XB/X6DHE-XB Image
*Note: The drawings and pictures shown in this manual were based on the latest
PCB Revision available at the time of publishing of the manual. The motherboard
you’ve received may or may not look exactly the same as the graphics shown in the
manual.
1-3
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X6DH8-XB/X6DHE-XB User's Manual
Figure 1-2. X6DH8-XB/X6DHE-XB Motherboard Layout
(not drawn to scale)
KB/
Mouse
US
0/1
COM1
VGA
GLAN1
GLAN2
JPG1
RAGEXL
VGA Ctrl
JPL1
GLAN
CTLR
GLAN
CTLR
JPL2
JCOM2
CPU 1
CPU 2
ICH5R
South
Bri
JPA1
7902
SCSI
CTRL
J
JPA3
SATA1
Fan7
JK1
IPMI
dge
A2
P
Ultra 320
PW
SMB
J25
Fan8
JBT1
S
CSI CH B
PWR2
24-Pin
(Bank 1)
®
AT X PWR
E7520
Lindenhurst
th
Nor
Bridge
USB4
SP
SI/O
SMB
USB2/3
KR
JM1
P
PXH
JM2
JWD1
XH
SATA0
PLLSEL
4-Pin
PWR
PWR1
JWOL1
Fan5
Fan6
B
Slot7
Slot6
Slot5
Slot4
Slot3
Slot2
lot1
S
JWOR1
DIMM 1A
DIMM 1B (Bank 1)
DIMM 2A (Bank 2)
DIMM 2B (Bank 2)
DIMM 3A (Bank 3)
DIMM 3B (Bank 3)
DIMM 4A (Bank 4)
DIMM 4B (Bank 4)
UPER X6DH8-XB
S
PCI-E x4
PCI-X 133 MHz
PCI-X 100 MHz
PCI-X 100 MHz ZCR
PCI-X133 MHz
PCI-X100 MHz
PCI-X100 MHz
J24
Battery
J27
BIOS
8-pin
JP12
PWR
PW3
JP15
Fan3
Floppy
LE1
JL1
Fan1
JF1
JD1
Fan2
JPF1
JP13
IDE2
IDE1
SCSI CH A
Ultra 320
Fan4
JOH1
JAR1
Notes
1. Jumpers not indicated are for testing only.
2. See Chapter 2 for detailed information on jumpers, I/O ports and JF1
front panel connections.
3. " " indicates the location of Pin 1.
4. SCSI is for the X6DH8-XB only
1-4
Page 11
Chapter 1: Introduction
Quick Reference (X6DH8-XB/X6DHE-XB)
(*Please refer to Chapter 2 for pin defi nitions and detailed
information.)
Jumper Description Default Setting
JP13 3rd PW Supply Detect Off (Disabled)
JP15 Reboot Option Off (Disabled)
*JPA1 SCSI Controller Enable (*x6DH8) Pins 1-2 (Enabled)
*JPA2/JPA3 SCSI Ch A/B Term. Ena. (*x6DH8) Open (Enabled)
JAR1 Alarm Reset Enable Open (Enabled)
JBT1 CMOS Clear See Chapter 2
JPF1 Force Power On Off (Normal)
JPG1 VGA Enable Pins 1-2 (Enabled)
JPL1/JPL2 GLAN1/GLAN2 Enable Pins 1-2 (Enabled)
JWD1 Watch Dog Enable Pins 1-2 (Reset)
JM1/JM2 PLLSEL (Memory Speed Select) Closed/Closed(DDR333)
Connector Description ATX
PWR (PWR1) Primary 24-Pin ATX PWR Connector
CPU PWR (PWR2) 12V 8-Pin CPU PWR Connector (*Required)
Aux. PWR (PWR3) +12V 4-pin System PWR Connector (*Required)
COM1/COM2 COM1/COM2 Serial Port Connectors
DIMM#1A-DIMM#4B DDR DIMM Memory (RAM) Slots
FAN 1-8 CPU/Chassis Fan Headers (Fan7/8: CPU Fan1/2)
Floppy Floppy Disk Drive Connector
GLAN 1/2 G-bit Ethernet Ports
IDE1/IDE2 IDE#1/IDE#2 Hard Disk Drive Connectors
IPMI IPMI 2.0 Socket
J27 BIOS Debug
JD1 PWR LED(pins1-3)/SpeakerHeader(pins 4-7)
JF1 Front Control Panel Connector
JK1 Keyboard Lock
JL1 Chassis Intrusion Header
JOH1 Overheat LED
JP12 Power Fault
JWOL1 Wake-on-LAN Header
JWOR1 Wake-on-Ring Header
KB/MS PS2 Keyboard/Mouse Connector
LE1 Power LED Indicator
SATA 0/1 Serial ATA1/2 Ports
SMB (J22) System Management Bus Connector
SMB PWR (J24) Power System Management Bus Connector
USB 0/1 Back Panel USB0/USB1 Headers
USB 2/3/4 Front Panel Universal Serial Bus USB2/3/4 Ports VGA
Video Connector
1-5
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X6DH8-XB/X6DHE-XB User's Manual
Motherboard Features
CPU
®
• Single or dual Intel
side (system) bus speed.
Memory
• Eight 184-pin DIMM sockets supporting up to 16/32 GB Registered ECC DDR
333/266 (PC2700/PC2100) SDRAM
Chipset
• Intel 7520 Lindenhurst chipset
Expansion Slots
• X6DH8-XB/X6DHE-XB
One PCI-E x8 slot (Physical x4)
Six 64-bit PCI-X slots (*Two PCI-X-133 MHz slots: Slots 3 & 6, Three PCI-X-
100 MHz slots: Slots 1, 2 & 5, One PCI-X 100 ZCR: Slot4)
604-pin EM64T (NoconaTM) processors at 800 MHz front
BIOS
• 8 Mb Phoenix
®
Flash ROM
• APM 1.2, DMI 2.1, PCI 2.2, ACPI 1.0, Plug and Play (PnP), SMBIOS 2.3
PC Health Monitoring
• Onboard voltage monitors for CPU cores, chipset voltage, memory voltage,
3.3V, +5V, +12V, −12V and +3.3V standby
• Fan status monitor
• CPU/chassis temperature monitors
• Environmental temperature monitor
• CPU fan auto-off in sleep mode
• CPU slow-down on temperature overheat
• CPU thermal trip support for processor protection, +5V standby alert LED
• Power-up mode control for recovery from AC power loss
• Auto-switching voltage regulator for CPU core
• System overheat LED and control
• Chassis intrusion detection
• System resource alert via Supero Doctor III
ACPI Features
• Slow blinking LED for suspend state indicator
1-6
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Chapter 1: Introduction
• Main switch override mechanism
Onboard I/O
• Dual Channel Adaptec 7902 Ultra 320 SCSI (*X6DH8-XB only)
• One IPMI 2.0 socket
• Two Broadcom 5721 PCI-E Gigabit Ethernet controllers
• Dual EIDE channels support up to 4 UDMA/IDE
• 1 fl oppy port interface
• PS/2 mouse and PS/2 keyboard ports
• Up to 5 USB 2.0 (Universal Serial Bus) (2 ports, 2 Headers supporting 3
ports)
• Super I/O
• 2 SATA ports support 2 drives (RAID 0, 1, JBOD)
• ATI 8 MB Rage XL Graphic Card
• 2 COM ports(1 header, 1 port)
Other
• Internal/external modem ring-on (WOR)
• Wake-on-LAN (WOL)
• Console redirection
• SMBus for SMC Power Supply
• Fan Speed Control by Thermal Management (via BIOS)
CD/Diskette Utilities
• BIOS fl ash upgrade utility and device drivers
Dimensions
• ATX Ext. 12" x 13.05" (304.8 x 331.5 mm)
1-7
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X6DH8-XB/X6DHE-XB User's Manual
Xeon EM64T PROCESSOR#1
CPU1
ADD
CTRL
R
DAT
A
1 PCI-X
SLOT
PCI6
IDSEL:PXH2_ PBAD17
1 PCI-X
SLOT
PCI5
IDSEL:PXH1_ PAAD19
1 PCI-X
SLOT
ZCR
PCI4
IDSEL:PXH1_ PAAD17
1 PCI-X
SLOT
PCI3
IDSEL:PXH2_ PBAD17
1 PCI-X
SLOT
PCI2
IDSEL:PXH2_ PAAD18
1 PCI-X
SLOT
PCI1
IDSEL:PXH2_ PAAD17
Gbit LAN
PCI-EXPx1
BCM5721
IDSEL: ?
Gbit LAN
PCI-EXPx1
BCM5721
IDSEL:?
PCI-X BUS(133
PCI-X BUS(100 MHZ)
SCSI
AIC7902W
UA24
*IDSEL:PXH1_ PAAD18
PCI-X BUS(133
PCI-X BUS(100 MHZ)
PCI-EXPx1 Pair0
PCI-EXPx1 Pair4
MHZ)
MHZ)
Xeon EM64T PROCESSOR#2VRM
PCI-EXP
PCIE1
B
PXH
#1
A
U24 U4E1
B
PXH
#2
A
U62
X4
PCI EXP. C [
PCI EXP. C [ 4..7]
IDE
PRI/SEC
SATA
PCI EXP.
UDMA/100
SATA
0..3]
X8PCI EXP. B
AX
X4
8
X4
0, 1
USB PORT
3,4,5
0,1,2,
USB
CPU2
CTRL
CTRL
DAT
A
DATA
DDR-333
ADDR
ADDR
MCH
DDR-333
HUB
ICH5R
U6
U16 X3P1
PCI BUS(32-BIT)
LPC BU
BMC CON. FWHLPC I/O
CLOCK
4 DDR - 333
DIMMs
4 DDR - 333
DIMMs
VGA
U10
S
Keyboard
Mouse
Floppy
COM2
H/WCOM1
MONITOR
Figure 1-9. Block Diagram of the E7520 (Lindenhurst) Chipset
Note: This is a general block diagram. Please see the previous Motherboard Features
pages for details on the features of each motherboard.
1-8
Page 15
Chapter 1: Introduction
1-2 Chipset Overview
Built upon the functionality and the capability of the 7520 Lindenhurst chipset,
the X6DH8-XB/X6DHE-XB motherboard provides the performance and feature set
required for dual processor-based servers, with confi guration options optimized
for communications, presentation, storage, computation or database applications.
The Intel E7520 (Lindenhurst) chipset consists of the following components: the
Lindenhurst Memory Controller Hub (MCH), the ICH5R I/O Controller Hub, and the
Intel PCI-X Hub (PXH).
The E7520 MCH supports single or dual Nocona processors with Front Side Bus
speeds of 800 MHz. Its memory controller provides direct connection to two chan-
nels of registered DDR266, DDR333 with a marched system bus address and data
bandwidths of up to 6.4GB/s. The E7520 also supports the new PCI high speed
serial I/O interface for superior I/O bandwidth. The MCH interfaces with the ICH5R
I/O Controller Hub (ICH5R) via a dedicated Hub Interface. The PXH provides con-
nection between a PCI interface and two independent PCI bus interfaces that can
be confi gured for standard PCI -X 1.0 protocol.
ICH5R System Features
In addition to providing the I/O subsystem with access to the rest of the system,
the ICH5R I/O Controller Hub integrates many I/O functions.
The ICH5R I/O Controller Hub integrates: 2-channel Ultra ATA/100 Bus Master
IDE Controller, two Serial ATA (SATA) Host w/RAID0, RAID1 support, SMBus 2.0
Controller, LPC/Flash BIOS Interface, PCI 2.2 Interface and System Management
Controller.
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X6DH8-XB/X6DHE-XB User's Manual
1-3 Special Features
Recovery from AC Power Loss
BIOS provides a setting for you to determine how the system will respond when AC
power is lost and then restored to the system. You can choose for the system to
remain powered off (in which case you must hit the power switch to turn it back on)
or for it to automatically return to a power- on state. See the Power Lost Control
setting in the Advanced BIOS Setup section to change this setting. The default
setting is Last State.
1-4 PC Health Monitoring
This section describes the PC health monitoring features of the SUPER X6DH8-
XB/X6DHE-XB. All have an onboard System Hardware Monitor chip that supports
PC health monitoring.
Onboard Voltage Monitors for the CPU Cores, Chipset Voltage,
Memory Voltage, +3.3V, +5V, +12V, -12V and +3.3V Standby
An onboard voltage monitor will scan these voltages continuously. Once a voltage
becomes unstable, a warning is given or an error message is sent to the screen.
Users can adjust the voltage thresholds to defi ne the sensitivity of the voltage
monitor.
Environmental Temperature Control
The thermal control sensor monitors the CPU temperature in real time and will turn
on the thermal control fan whenever the CPU temperature exceeds a user-defi ned
threshold. The overheat circuitry runs independently from the CPU. It can continue
to monitor for overheat conditions even when the CPU is in sleep mode. Once it
detects that the CPU temperature is too high, it will automatically turn on the ther-
mal control fan to prevent any overheat damage to the CPU. The onboard chassis
thermal circuitry can monitor the overall system temperature and alert users when
the chassis temperature is too high.
CPU Fan Auto-Off in Sleep Mode
The CPU fan activates when the power is turned on. It continues to operate when
the system enters Standby mode. When in sleep mode, the CPU will not run at
full power, thereby generating less heat.
CPU Overheat and Control
This feature is available when the user enables the CPU overheat warning function
in the BIOS. This allows the user to defi ne an overheat temperature. When this
temperature is exceeded, then, the Overheat warning LED is triggered.
1-10
Page 17
Chapter 1: Introduction
System Resource Alert
This feature is available when used with Supero Doctor III in the Windows OS en-
vironment. SDIII is used to notify the user of certain system events. For example,
if the system is running low on virtual memory and there is insuffi cient hard drive
space for saving the data, you can be alerted of the potential problem.
Auto-Switching Voltage Regulator for the CPU Core
The auto-switching voltage regulator for the CPU core can support up to 20A cur-
rent and auto-sense voltage IDs ranging from 0.83V to 1.63V. This will allow the
regulator to run cooler and thus make the system more stable.
Thermal Management 2 (TM2)
When TM2 is enabled in the BIOS and the CPU temperature reaches a pre-defi ned
threshold, a thermal monitoring mechanism will reduce the process speed by lower-
ing the bus-to-core ratio of the processor core clock and will decrease the voltage
input by changing the CPU VID. This combination of reduced CPU bus frequency
and CPU VID effectively decreases CPU power consumption to prevent processor
overheat and greatly increases system stability. (*This function is available for the
CPUs that support TM2.)
1-5 ACPI Features
ACPI stands for Advanced Confi guration and Power Interface. The ACPI specifi -
cation defi nes a fl exible and abstract hardware interface that provides a standard
way to integrate power management features throughout a PC system, including its
hardware, operating system and application software. This enables the system to
automatically turn on and off peripherals such as CD-ROMs, network cards, hard
disk drives and printers. This also includes consumer devices connected to the PC
such as VCRs, TVs, telephones and stereos.
In addition to enabling operating system-directed power management, ACPI
provides a generic system event mechanism for Plug and Play and an operating
system-independent interface for confi guration control. ACPI leverages the Plug
and Play BIOS data structures while providing a processor architecture-indepen-
dent implementation that is compatible with the Windows 2000, Windows 2003 and
Windows XP Operating Systems.
Slow Blinking LED for Suspend-State Indicator
When the CPU goes into a suspend state, the chassis power LED will start blinking
to indicate that the CPU is in suspend mode. When the user presses any key, the
CPU will wake-up and the LED will automatically stop blinking and remain on.
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Page 18
X6DH8-XB/X6DHE-XB User's Manual
Main Switch Override Mechanism
When an ATX power supply is used, the power button can function as a system
suspend button to make the system enter a SoftOff state. The monitor will be
suspended and the hard drive will spin down. Pressing the power button again
will cause the whole system to wake-up. During the SoftOff state, the ATX power
supply provides power to keep the required circuitry in the system alive. In case
the system malfunctions and you want to turn off the power, just press and hold
the power button for 4 seconds. This option can be set in the Power section of
the BIOS Setup routine.
External Modem Ring-On
Wake-up events can be triggered by a device such as the external modem ringing
when the system is in the SoftOff state. Note that external modem ring-on can only
be used with an ATX 2.01 (or above) compliant power supply.
Wake-On-LAN (WOL)
Wake-On-LAN is defi ned as the ability of a management application to remotely
power up a computer that is powered off. Remote PC setup, up-dates and asset
tracking can occur after hours and on weekends so that daily LAN traffi c is kept to
a minimum and users are not interrupted. The motherboard has a 3-pin header
(WOL) to connect to the 3-pin header on a Network Interface Card (NIC) that has
WOL capability. Wake-On-LAN must be enabled in BIOS. Note that Wake-On-LAN
can only be used with an ATX 2.01 (or above) compliant power supply.
1-6 Power Supply
As with all computer products, a stable power source is necessary for proper and
reliable operation. It is even more important for processors that have high CPU
clock rates.
The X6DH8-XB/X6DHE-XB accommodates ATX 24-pin power supplies. Although
most power supplies generally meet the specifi cations required by the CPU, some
are inadequate. You should use one that will supply at least 400W of power. Your
power supply must supply 1.5A for the Ethernet ports. The +12V, 4-pin power
connector (PW2) is required to ensure adequate power supply to the system. Ad-
ditionally, you should also use the onboard 12V 8-pin power connector (PW3) to
support Intel Xeon CPUs. Failure to provide this extra power will result in instability
of the CPU after only a few minutes of operation. See Section 2-5 for details on
connecting the power supply.
It is strongly recommended that you use a high quality power supply that meets ATX
power supply Specifi cation 2.02 or above. It must also be SSI compliant (info at
http://www.ssiforum.org/). Additionally, in areas where noisy power transmission is
1-12
Page 19
Chapter 1: Introduction
present, you may choose to install a line fi lter to shield the computer from noise. It
is recommended that you also install a power surge protector to help avoid problems
caused by power surges.
1-7 Super I/O
The disk drive adapter functions of the Super I/O chip include a fl oppy disk drive
controller that is compatible with industry standard 82077/765, a data separator,
write pre-compensation circuitry, decode logic, data rate selection, a clock genera-
tor, drive interface control logic and interrupt and DMA logic. The wide range of
functions integrated onto the Super I/O greatly reduces the number of components
required for interfacing with fl oppy disk drives. The Super I/O supports 360 K, 720
K, 1.2 M, 1.44 M or 2.88 M disk drives and data transfer rates of 250 Kb/s, 500 Kb/s
or 1 Mb/s.It also provides two high-speed, 16550 compatible serial communication
ports (UARTs). Each UART includes a 16-byte send/receive FIFO, a programmable
baud rate generator, complete modem control capability and a processor interrupt
system. Both UARTs provide legacy speed with baud rate of up to 115.2 Kbps
as well as an advanced speed with baud rates of 250 K, 500 K, or 1 Mb/s, which
support higher speed modems.
The Super I/O provides functions that comply with ACPI (Advanced Confi guration
and Power Interface), which includes support of legacy and ACPI power manage-
ment through an SMI or SCI function pin. It also features auto power management
to reduce power consumption.
1-13
Page 20
X6DH8-XB/X6DHE-XB User's Manual
Notes
1-14
Page 21
Chapter 2: Installation
Chapter 2
Installation
2-1 Static-Sensitive Devices
Electric-Static-Discharge (ESD) can damage electronic com ponents. To prevent
damage to your system board, it is important to handle it very carefully. The following
measures are generally suffi cient to protect your equipment from ESD.
Precautions
• Use a grounded wrist strap designed to prevent static discharge.
• Touch a grounded metal object before removing the board from the antistatic
bag.
• Handle the board by its edges only; do not touch its components, peripheral
chips, memory modules or gold contacts.
• When handling chips or modules, avoid touching their pins.
• Put the motherboard and peripherals back into their antistatic bags when not in
use.
• For grounding purposes, make sure your computer chassis provides excellent
conductivity between the power supply, the case, the mounting fasteners and
the motherboard.
• Use only the correct type of onboard CMOS battery. Do not install the onboard
upside down battery to avoid possible explosion.
Unpacking
The motherboard is shipped in antistatic packaging to avoid static damage. When
unpacking the board, make sure the person handling it is static protected.
2-1
Page 22
X6DH8-XB/X6DHE-XB User's Manual
2-2 Xeon EM64T (Nocona) Processor and Heatsink
Installation
When handling the processor package, avoid placing direct pressure
on the label area of the fan. Also, do not place the motherboard on a
!
IMPORTANT: Always connect the power cord last and always remove it before add-
ing, removing or changing any hardware components. Make sure that you install
the processor into the CPU socket before you install the CPU heatsink.
IMPORTANT: Due to the weight of the CEK Passive Heatsink (which weights about
1KG), you need to have Heatsink Mounting plate installed on the chassis to prevent
damage to the CPU and the motherboard)
conductive surface, which can damage the BIOS battery and prevent the
system from booting up.
Installing CPU Mounting Plate and Retention Bracket
* Note: CPU Retention Brackets are pre-
installed by the manufacturer.
CPU Installation
1. Lift the lever on the CPU socket: lift
the lever completely as shown on the
picture on the right; otherwise, you will
damage the CPU socket when power is
applied. (Install CPU1 fi rst.)
2. Insert the CPU in the socket, making
sure that pin 1 of the CPU aligns with
pin 1 of the socket (both corners are
marked with a triangle). When using
only one CPU, install it into CPU socket
#1 (socket #2 is automatically disabled
if only one CPU is used).
Socket lever
Pin 1
3. Press the lever down until you hear
the *click*, so you can be sure that the
CPU is securely installed in the CPU
socket.
Socket lever
in the locking
Position
2-2
Page 23
CEK Heatsink Installation
1. Do not apply any thermal grease to
the heatsink or the CPU die-the required
amount has already been applied.
2. Place the heatsink on top of the CPU so
that the four mounting holes are aligned with
those on the retention mechanism.
3. Screw in two diagonal screws (ie the #1
and the #2 screws) until just snug (-do not
fully tighten the screws to avoid possible
damage to the CPU.)
Chapter 2: Installation
CEK Passive Heatsink
Screw#1
Screw#1
Screw#2
4. Finish the installation by fully tightening
all four screws.
Screw#2
2-3
Page 24
X6DH8-XB/X6DHE-XB User's Manual
To Un-install the Heatsink
(Caution! We do not recommend that the CPU
or the heatsink be removed. However, if you do
need to un-install the heatsink, please follow
the instructions below to uninstall the heatsink
to prevent damage done to the CPU or the
CPU socket. )
1. Unscrew and remove the heatsink screws
from the motherboard in the sequence as show
in the picture on the right.
2. Hold the heatsink as show in the picture
on the right and gently wriggle the heatsink to
loosen it from the CPU. (Do not use excessive
force when wriggling the heatsink!!)
3. Once the CPU is loosened, remove the
heatsink from the CPU socket.
4. Clean the surface of the CPU and the
heatsink to get rid of the old thermal grease.
Reapply the proper amount of thermal grease
on the surface before you re-install the CPU
and the heatsink.
2-4
Page 25
Figure 2-1. Xeon EM64T Socket: Empty and w/Processor Installed
Empty socket
!
Warning! Make
sure you lift the lever
completely when
installing the CPU.
If the lever is only
partly raised, damage
to the socket or CPU
may result.
Lever
Triangle
Processor
(installed)
Chapter 2: Installation
Mounting the Motherboard in the Chassis
All motherboards have standard mounting holes to fi t different types of chassis.
Make sure that the locations of all the mounting holes for both the motherboard
and the chassis match. Although a chassis may have both plastic and metal
mounting fasteners, metal ones are highly recommended because they ground
the motherboard to the chassis. Make sure that the metal standoffs click in or are
screwed in tightly. Then use a screwdriver to secure the motherboard onto the
motherboard tray.
Triangle
2-5
Page 26
X6DH8-XB/X6DHE-XB User's Manual
2-3 Installing DIMMs
*Note: Check the Supermicro web site for recommended memory modules.
CAUTION
Exercise extreme care when installing or removing DIMM
modules to prevent any possible damage. Also note that the
memory is interleaved to improve performance (see step 1).
DIMM Installation (See Figure 2-2)
1. Insert the desired number of DIMMs into the memory slots, starting with Bank
1. The memory scheme is interleaved, so you must install two modules at a
time, beginning with Bank 1, then Bank 2, and so on.
2. Insert each DIMM module vertically into its slot. Pay attention to the notch along
the bottom of the module to prevent inserting the DIMM module incorrectly.
3. Gently press down on the DIMM module until it snaps into place in the slot.
Repeat for all modules (see step 1 above).
Memory Support
The X6DH8-XB/X6DHE-XB supports up to 16/32 GB Registered ECC DDR 333/266
(PC2700/PC2100) memory. All motherboards were designed to support 2GB
(DDR333)/4GB (DDR 266) modules in each slot, but has only been verifi ed for up
to 1 GB modules.
*Note 1: A maximum of four dual rank DDR 333 memory modules are supported.
*Note 2: Due to memory allocation to system devices, memory remaining avail-
able for operational use will be reduced when 4 GB of RAM is used. The reduction
in memory availability is disproportional. (Refer to the Memory Availability Table
for details.)
System Device Size Physical Memory
Firmware Hub fl ash memory (System
BIOS)
Local APIC 4 KB 3.99
Area Reserved for the chipset 2 MB 3.99
I/O APIC (4 Kbytes) 4 KB 3.99
PCI Enumeration Area 1 256 MB 3.76
PCI Express (256 MB) 256 MB 3.51
PCI Enumeration Area 2 (if needed)
-Aligned on 256-MB boundary-
VGA Memory 16 MB 2.85
TSEG 1 MB 2.84
Memory available to OS and other applications
Possible System Memory Allocation & Availability
Remaining (-Available)
(4 GB Total System Memory)
1 MB 3.99
512 MB 3.01
2.84
2-6
Page 27
To Install:
Insert module
vertically and
press down
until it snaps
into place.
Pay attention
to the alignment notch at
the bottom.
Chapter 2: Installation
Figure 2-2. Installing and Removing DIMMs
To Remove:
Use your thumbs to gently push near the edge of both ends of the
module. This should release it from the slot.
2-4 I/OPorts/Control Panel Connectors
The I/O ports are color coded in conformance with the PC 99 specifi cation. See
Figure 2-3 below for the colors and locations of the various I/O ports.
Figure 2-3. I/O Port Locations and Defi nitions
Video
2-7
Page 28
X6DH8-XB/X6DHE-XB User's Manual
Front Control Panel
JF1 contains header pins for various buttons and indicators that are normally located
on a control panel at the front of the chassis. These connectors are designed specifi -
cally for use with Supermicro server chassis. See Figure 2-4 for the descriptions of
the various control panel buttons and LED indicators. Refer to the following section
for descriptions and pin defi nitions.
Figure 2-4. JF1 Header Pins
Ground
X
Power LED
HDD LED
NIC1 LED
NIC2 LED
Overheat/Fan Fail LED
Power Fail LED
Ground
Ground
1920
NMI
X
Vcc
Vcc
Vcc
Vcc
Vcc
Vcc
Reset
Pwr
1
2
Reset Button
Power Button
2-8
Page 29
Chapter 2: Installation
2-5 Connecting Cables
ATX Power Connector
The main power supply connector
(JPW1) on the X6DH8-XB/X6DHE-
XB meets the SSI (Superset ATX)
specification. You can only use a
24-pin power supply cable on the
motherboard. Make sure that the
orientation of the connector is correct.
You must also use the 4-pin (JPW2)
power connector for adequate power
supply to the system. See the table
on the right for pin defi nitions.
ATX Power Supply 24-pin Connector
Pin Definition
Pin Number Definition
13 +3.3V
14 -12V
15 COM
16 PS_ON#
17 COM
18 COM
19 COM
20 Res(NC)
21 +5V
22 +5V
23 +5V
24 COM
Pin Number Definition
1 +3.3V
2 +3.3V
3 COM
4 +5V
5 COM
6 +5V
7 COM
8 PWR_OK
9 5VSB
10 +12V
11 +12V
12 +3.3V
+12V 4-pin
Connector
Pins #
Definition
1 & 2
3 & 4
Ground
+12 V
Processor Power Connector
In addition to the Primary ATX power
connector (above), the 12v 8-pin Pro-
cessor connector at JPW3 must also
be connected to your power supply
for CPU power consumption to avoid
causing instability to the system.
24-Pin ATX PWR
PWR2
KB/
Mouse
USB
0/1
COM1
VGA
JCOM2
GLAN1
GLAN2
J
R
XL
VGA
JPL1
GLAN
CTLR
GLAN
CTLR
J
24-Pin
Fan5
6
Fan
G1
P
E-
AG
Ctrl
PL2
P
lot7
S
lot6
S
P
lot5
S
lot4
S
P
lot3
S
P
P
Slot2
lot1
S
P
JWOR1
PWR1
Pin
4PWR
DIMM 1A (Bank 1)
(Bank
1B
DIMM
(Bank 2)
DIMM 2A
(Bank
2B
DIMM
DIMM
3A
(Bank
3B (Bank 3)
DIMM
4A (Bank
DIMM
DIMM 4B (Bank 4)
UPER X6DH8-XB
S
CI-E x4
133 MHz
CI-X
P
100 MHz
CI-X
CI-X 100 MHz ZCR
Hz
M
133
CI-X
Hz
M
100
CI-X
MHz
100
CI-X
JWOL1
R
PW
ATX
1)
2)
3)
4)
®
E7520
Lindenhurst
North
Bridge
US
B4
SPKR
JM2
PLLSEL
JM1
SI/O
JWD1
PXH
PXH
MB
S
US
B2/3
SATA0
JPA1
SATA1
Fan7
CPU 1
CPU 2
JK1
I
ICH5R
South
Bridge
7902
SCSI
CTR
JPA2
JPA3
P
Ultra
8-Pin +12v Power Supply
Connector
Pins
Definition
1 thru 4
5 thru 8
Ground
+12v
8-Pin 12V PWR4-Pin12V CPU PWR
8-pin
J24
PW
JP12
PWR
Fan1
PW3
SMB
J25
Fan8
MI
JBT1
L
320
SC
S
J27
BIOS
Battery
I
JF1
JP15
JD1
E1
L
Fan2
JOH1
JPF1
JAR1
JP13
JL1
Fan3
E2
Floppy
ID
IDE1
A
CH
SI
C
S
ltra 320
U
Fan4
CH
B
2-9
Page 30
X6DH8-XB/X6DHE-XB User's Manual
NMI Button
The non-maskable interrupt button
header is located on pins 19 and 20
of JF1. Refer to the table on the right
for pin defi nitions.
Power LED
The Power LED connection is located
on pins 15 and 16 of JF1. Refer to the
table on the right for pin defi nitions.
NMI Button Pin
Definitions (JF1)
Pin
Number
19
20
Definition
Control
Ground
PWR_LED Pin Definitions
(JF1)
Pin
Number
15
16
Definition
Vcc
Control
PWR2
24-Pin
P
ATX
KB/
Mouse
USB
0/1
COM1
VGA
JCOM2
GLAN1
GLAN2
J
R
XL
VGA
JPL1
GLAN
CTLR
J
P
AG
GLAN
CTLR
PL2
Fan5
6
Fan
G1
E-
Ctrl
P
lot7
S
P
lot6
S
P
lot5
S
lot4
S
P
lot3
S
P
P
Slot2
lot1
S
P
JWOR1
PWR1
Pin
4PWR
DIMM 1A (Bank 1)
DIMM
DIMM 2A
DIMM
DIMM
DIMM 3B
DIMM
DIMM 4B (Bank 4)
UPER X6DH8-XB
S
CI-E x4
133
CI-X
100
CI-X
CI-X 100
CI-X133
CI-X100
CI-X100
4A (Bank
MHz
MHz
MHz
MHz
Hz
M
MHz
1B
2B
3A
JWOL1
(Bank
(Bank 2)
(Bank
(Bank 3)
(Bank 3)
®
ZCR
4)
1)
2)
E7520
Lindenhurst
North
Bridge
US
B4
Ground
Power LED
HDD LED
NIC1 LED
NIC2 LED
NMI
PWR LED
X
Ground
Ground
2
1920
NMI
X
Vcc
Vcc
Vcc
Vcc
Vcc
Vcc
Reset
Reset Button
Power Button
Pwr
1
JWD1
SATA0
PLLSEL
JPA1
SATA1
CPU 1
CPU 2
JK1
ICH5R
South
Bridge
7902
SCSI
CTR
JPA2
JPA3
Fan7
P
I
R
W
JM2
JM1
SI/O
PXH
PXH
MB
S
US
B2/3
SPKR
PW
SMB
J25
Fan8
MI
JBT1
L
Ultra 320
SC
8-pin
J24
JP12
PWR
Fan1
PW3
JF1
JP15
JD1
E1
L
Fan2
JOH1
JPF1
JAR1
JP13
JL1
Fan3
J27
Overheat/Fan Fail LED
Floppy
IDE2
Battery
S
I
BIOS
IDE1
A
CH
SI
C
S
320
Ultra
Fan4
CH
B
Power Fail LED
2-10
Page 31
Chapter 2: Installation
HDD LED
The HDD LED connection is located
on pins 13 and 14 of JF1. Attach the
hard drive LED cable here to display
disk activity (for any hard drives on
the system, including SCSI, Serial ATA
and IDE). See the table on the right for
pin defi nitions.
NIC1/NIC2 LED Indicators
The NIC (Network Interface Control-
ler) LED connections for the GLAN
port1 is located on pins 11 and 12
of JF1, and for the GLAN port2 is
located on pins 9 and 10 of JF1. At-
tach the NIC LED cables to display
network activity. Refer to the tables
on the right for pin defi nitions.
NIC1 LED Pin
Definitions
(JF1)
Pin
Number
11
12
HDD LED Pin
Pin
Number
13
14
Definition
Vcc
GND
Definitions
(JF1)
Definition
Vcc
HD Active
NIC2 LED Pin
Definitions
(JF1)
Pin
Number
9
10
Definition
Vcc
GND
PWR2
24-Pin
ATX P
PWR1
Fan5
in
P
4PWR
DIMM 1A (Bank
(Bank
1B
DIMM
(Bank
DIMM 2A
DIMM 2B (Bank 2)
DIMM
3A
(Bank
(Bank
DIMM 3B
M 4A (Bank
DIM
(Bank
DIMM 4B
®
UPER X6DH8-XB
S
x4
E
PCI-
MHz
133
PCI-X
MHz
100
PCI-X
ZCR
MHz
100
PCI-X
MHz
PCI-X133
MHz
PCI-X100
MHz
100
PCI-X
1
OL
JW
1)
1)
2)
3)
3)
4)
4)
E
Lind
Nor
Bridge
USB4
COM1
VGA
JCOM2
KB/
Fan6
se
Mou
B
US
0/1
GLAN1
GLAN2
G1
JP
Slot7
E-
RAG
XL
lot6
S
Ctrl
VGA
Slot5
JPL1
GLAN
Slot4
R
CTL
Slot3
GLAN
Slot2
R
CTL
Slot1
J
L2
P
JWOR1
HDD LED
7
Fan
8-pin
WR
7520
urst
enh
th
L
JM2
LLSE
P
JM1
I/O
S
JWD1
PXH
XH
P
SMB
US
B2/3
SP
K
R
ATA
S
J24
PW
JP12
PWR
PW3
SMB
J25
CPU 1
CPU 2
JK1
IP
ICH5
South
Bridge
A1
P
J
7902
SCSI
CT
A2
P
J
A3
P
J
1
ATA
S
0
MI
R
L
R
Ultra 320
JP15
LE1
JPF1
JP13
JL1
Fan3
J27
Fan8
Floppy
JBT
1
BIOS
Battery
SCS
I
CH
B
NIC1 LED
Fan1
NIC2 LED
JF1
JD1
Fan2
JOH1
JAR1
IDE2
IDE1
Overheat/Fan Fail LED
A
CH
I
S
C
S
320
ltra
U
Fan4
Ground
Power LED
HDD LED
NIC1 LED
NIC2 LED
Power Fail LED
Ground
Ground
1920
NMI
X
2
X
Vcc
Vcc
Vcc
Vcc
Vcc
Vcc
Reset
Reset Button
Power Button
Pwr
1
2-11
Page 32
X6DH8-XB/X6DHE-XB User's Manual
Overheat(OH)/Fan Fail LED
Connect an LED to the OH connection
on pins 7 and 8 of JF1 to provide ad-
vanced warnings of chassis overheat-
ing. Refer to the tables on the right for
pin defi nitions and error messages.
Power Fail LED
The Power Fail LED connection is
located on pins 5 and 6 of JF1. Re-
fer to the table on the right for pin
defi nitions.
OH/Fan Fail LED
Pin Definitions
(JF1)
Pin
7
8
Definition
Vcc
GND
Number
OH/Fan Fail LED
(JF1)
State
Solid Red
Blinking
Message
Overheat
Fan Fail
Power Fail LED Pin
Definitions
(JF1)
Pin
5
6
Definition
Vcc
GND
Number
PWR2
24-Pin
W
ATX P
PWR1
Fan5
in
P
4PWR
DIMM 1A
(Bank 1)
(Bank
1B
DIMM
(Bank
DIMM 2A
DIMM 2B (Bank
DIMM
3A
(Bank
(Bank
DIMM 3B
(Bank
M 4A
DIM
(Bank
DIMM 4B
®
UPER X6DH8-XB
S
x4
E
PCI-
MHz
133
PCI-X
MHz
100
PCI-X
ZCR
MHz
100
PCI-X
MHz
PCI-X133
MHz
PCI-X100
MHz
100
PCI-X
1
OL
JW
1)
2)
2)
3)
3)
4)
4)
7520
E
urst
enh
Lind
th
Nor
Bridge
USB4
COM1
VGA
JCOM2
KB/
Fan6
se
Mou
B
US
0/1
GLAN1
GLAN2
G1
JP
Slot7
E-
RAG
XL
Slot6
Ctrl
VGA
Slot5
JPL1
GLAN
Slot4
R
CTL
Slot3
GLAN
Slot2
R
CTL
Slot1
J
L2
P
JWOR1
Fan7
8-pin
R
L
JM2
LLSE
P
JM1
I/O
S
JWD1
PXH
XH
P
SMB
US
B2/3
SP
K
R
ATA0
S
J24
PW
JP12
PWR
SMB
J25
CPU 1
CPU 2
J27
JK1
Fan8
MI
IP
ICH5R
South
JBT
1
Bridge
BIOS
A1
P
J
7902
SCSI
Battery
RL
CT
A2
P
J
A3
P
J
Ultra 320
SCSI CH
B
1
ATA
S
Fan1
PW3
PWR Fail LED
JF1
JP15
JD1
LE1
Fan2
JOH1
JPF1
JAR1
JP13
JL1
Fan3
1
Floppy
IDE2
IDE
Overheat/Fan Fail LED
A
CH
I
S
C
S
320
ltra
U
Fan4
OH/Fan Fail LED
Ground
X
Power LED
HDD LED
NIC1 LED
NIC2 LED
Power Fail LED
Ground
Ground
1920
NMI
X
Vcc
Vcc
Vcc
Vcc
Vcc
Vcc
Reset
Reset Button
Power Button
Pwr
1
2
2-12
Page 33
Chapter 2: Installation
Reset Button
The Reset Button connection is lo-
cated on pins 3 and 4 of JF1. Attach
it to the hardware reset switch on the
computer case. Refer to the table on
the right for pin defi nitions.
Power Button
The Power Button connection is
located on pins 1 and 2 of JF1. Mo-
mentarily contacting both pins will
power on/off the system. This button
can also be confi gured to function
as a suspend button (with a setting
in BIOS - see Chapter 4). To turn
off the power when set to suspend
mode, press the button for at least 4
seconds. Refer to the table on the
right for pin defi nitions.
Reset Pin
Definitions
(JF1)
Pin
Number
Definition
3
4
Power Button
Connector
Pin Definitions
(JF1)
Pin
Number
1
2
Reset
Ground
Definition
PW_ON
Ground
Pin
PWR2
24-
ATX P
KB/
Mou
US
0/1
COM1
VGA
JCOM2
VGA
B
GLAN1
GLAN2
JP
RAG
XL
JPL1
GLAN
CTL
GLAN
CTL
J
Fan6
se
G1
Slot7
E-
Slot6
Ctrl
Slot5
Slot4
R
Slot3
Slot2
R
Slot1
L2
P
JWOR1
PWR1
Fan5
in
P
4PWR
DIMM 1A (Bank 1)
(Bank
1B
DIMM
(Bank
DIMM 2A
DIMM 2B (Bank
DIMM
3A
(Bank
(Bank
DIMM 3B
M 4A (Bank
DIM
(Bank
DIMM 4B
®
UPER X6DH8-XB
S
x4
E
PCI-
MHz
133
PCI-X
MHz
100
PCI-X
PCI-X
PCI-X133
PCI-X100
P
CI-X100
ZCR
MHz
100
MHz
MHz
MHz
1
OL
JW
1)
2)
2)
3)
3)
4)
4)
7520
E
enh
Lind
th
Nor
Bridge
USB4
Fan7
8-pin
CPU
CPU 2
J24
PW
JP12
PWR
Fan1
PW3
SMB
J25
1
JP15
JF1
JD1
LE1
Fan2
JOH1
JPF1
JAR1
JP13
Ground
X
Power LED
R
W
HDD LED
JM2
urst
PLLSEL
JM1
I/O
S
SM
US
SP
K
R
JK1
IPMI
JWD1
ICH5
PXH
outh
S
Bridge
A1
P
J
7902
XH
P
SCSI
RL
CT
B
A2
P
J
A3
P
J
B2/3
Ultra 320
1
ATA
S
ATA0
S
R
SCSI CH
JL1
Fan3
J27
Fan
8
Floppy
IDE2
IDE1
JBT
1
BIOS
Battery
B
Overheat/Fan Fail LED
A
CH
SCSI
320
ltra
U
Fan4
NIC1 LED
NIC2 LED
Power Fail LED
Ground
Ground
2
Reset Button
PWR Button
1920
NMI
X
Vcc
Vcc
Vcc
Vcc
Vcc
Vcc
Reset
Pwr
1
Reset Button
Power Button
2-13
Page 34
X6DH8-XB/X6DHE-XB User's Manual
Chassis Intrusion
A Chassis Intrusion header is located
at JL1. Attach the appropriate cable
to inform you of a chassis intrusion.
Serial Ports
The COM1 serial port is located under
the parallel port and COM2 is located
below the PCI Slot1 (see the Mother-
board layout on Page 1-4). See the
table on the right for pin defi nitions.
Chassis Intrusion
Pin Definitions (JL1)
Pin
Number
Serial Port Pin Definitions
(COM1/COM2)
Pin Number Definition
1 CD
2 RD
3 TD
4 DTR
5 Ground
(*Pin 10: NC=NC (No Connection)
Definition
Intrusion Input
1
2
Ground
Pin Number Definition
6 DSR
7 RTS
8 CTS
9 RI
COM1
PWR2
24-Pin
PW
ATX
KB/
Mouse
USB
0/1
COM1
VGA
JCOM2
GLAN1
GLAN2
J
RAGEXL
VGA
JPL1
GLAN
CTLR
GLAN
CTLR
J
Fan5
Fan6
G1
P
Ctrl
PL2
P
lot7
S
P
lot6
S
P
lot5
S
lot4
S
P
lot3
S
P
P
Slot2
lot1
S
P
JWOR1
PWR1
Pin
4PWR
DIMM 1A (Bank 1)
DIMM
DIMM 2A
DIMM
DIMM
DIMM
DIMM
DIMM 4B (Bank 4)
UPER X6DH8-XB
S
x4
E
CI-
133 MHz
CI-X
100
CI-X
CI-X 100
CI-X133
CI-X100
CI-X100
1B
2B
3A
3B (Bank 3)
4A (Bank
MHz
MHz
MHz
Hz
M
MHz
JWOL1
(Bank
(Bank 2)
(Bank
(Bank
®
ZCR
4)
1)
2)
3)
E7520
Lindenhurst
North
Bridge
US
B4
COM2
R
SPKR
Fan7
CPU 1
CPU 2
JM2
PLLSEL
JM1
SI/O
PXH
PXH
MB
S
US
B2/3
JWD1
SATA0
JPA1
SATA1
JK1
ICH5R
South
Bridge
7902
SCSI
CTR
JPA2
JPA3
P
I
Ultra
8-pin
J24
PW
JP12
PWR
Fan1
PW3
SMB
J25
Fan8
MI
JBT1
L
320
SC
S
J27
BIOS
Battery
I
JF1
JP15
JD1
1
LE
Fan2
JPF1
JP13
JL1
Chassis Intrusion
Fan3
E2
Floppy
ID
IDE1
A
CH
SCSI
ltra 320
U
Fan4
CH
B
JOH1
JAR1
2-14
Page 35
Chapter 2: Installation
Universal Serial Bus
(USB0/1)
Two USB 2.0 ports are located be-
side the PS/2 keyboard/mouse ports.
USB0 is the bottom connector and
USB1 is the top connector. See the
table on the right for pin defi nitions.
Front Panel Universal Serial
Bus Headers
Extra USB headers (FPUSB2/FPUSB3,
FPUSB4) can be used for front side
USB access. You will need a USB
cable to use either connection. Re-
fer to the tables on the right for pin
defi nitions.
Universal Serial Bus Pin Definitions
USB0
Pin
Number Definition
1+5V
2P0 3P0+
4 Ground
USB1
Pin
Number Definition
1+5V
2P0 3P0+
4 Ground
Universal Serial Bus Pin Definitions
FP USB2
Pin
Number Definition
1+5V
3P0 5P0+
7 Ground
FP USB3
Pin
Number Definition
2+5V
4P0 6P0+
8 Ground
10 OC#
Front Panel Universal
Serial Bus Pin Definitions
FP USB4
Pin
Number Definition
1+5V
2P0 3P0+
4 Ground
5 N/A
USB 0/1
PWR2
24-Pin
KB/
Mouse
USB
0/1
COM1
VGA
JCOM2
GLAN1
GLAN2
J
R
XL
VGA
JPL1
J
P
AG
GLAN
CTLR
GLAN
CTLR
PL2
Fan5
6
Fan
G1
lot7
S
E-
lot6
S
Ctrl
lot5
S
lot4
S
lot3
S
Slot2
lot1
S
JWOR1
PWR1
Pin
4PWR
DIMM 1A (Bank 1)
(Bank
1B
DIMM
(Bank 2)
DIMM 2A
(Bank
2B
DIMM
DIMM
3A
(Bank 3)
3B (Bank 3)
DIMM
4A (Bank
DIMM
DIMM 4B (Bank 4)
®
UPER X6DH8-XB
S
CI-E x4
P
133 MHz
PCI-X
100 MHz
CI-X
P
CI-X 100 MHz ZCR
P
MHz
CI-X133
P
Hz
M
CI-X100
P
MHz
CI-X100
P
JWOL1
FP USB 4
1)
2)
4)
ATX
E7520
Lindenhurst
North
Bridge
US
B4
R
PW
SPKR
JM2
PLLSEL
JM1
SI/O
JWD1
PXH
JPA1
PXH
MB
S
US
B2/3
SATA1
SATA0
FP USB 2/3
Fan7
CPU 1
CPU 2
JK1
I
ICH5R
South
Bridge
7902
SCSI
CTR
JPA2
JPA3
PW
SMB
J25
Fan8
MI
P
JBT1
L
Ultra 320
SC
2-15
J24
Battery
S
I
J27
BIOS
8-pin
JP12
PWR
Fan1
PW3
JF1
JP15
JD1
E1
L
Fan2
JOH1
JPF1
JAR1
JP13
JL1
Fan3
E2
Floppy
ID
IDE1
A
CH
SI
C
S
320
Ultra
Fan4
CH
B
Page 36
X6DH8-XB/X6DHE-XB User's Manual
GLAN (Giga-bit Ethernet
Ports)
A G-bit Ethernet port (designated
JLAN1/JLAN2) is located beside the
COM2 port on the IO backplane. This
port accepts RJ45 type cables.
ATX PS/2 Keyboard and
PS/2 Mouse Ports
The ATX PS/2 keyboard and PS/2
mouse are located on . See the table
at right for pin defi nitions. (See Figure
2-3 for the locations of each.)
KB/Mouse
GLAN1
GLAN2
KB/
Mouse
USB
0/1
COM1
VGA
GLAN1
GLAN2
G1
P
J
E-
AG
R
XL
Ctrl
VGA
JPL1
GLAN
CTLR
GLAN
CTLR
J
PL2
JCOM2
Fan
lot7
S
lot6
S
lot5
S
lot4
S
lot3
S
Slot2
lot1
S
JWOR1
PWR2
Fan5
6
Pin
4PWR
DIMM 1A (Bank 1)
DIMM
DIMM 2A
DIMM
DIMM
DIMM
4A (Bank
DIMM
DIMM 4B (Bank 4)
UPER X6DH8-XB
S
CI-E x4
P
MHz
133
CI-X
P
MHz
100
CI-X
P
CI-X 100 MHz ZCR
P
MHz
133
CI-X
P
MHz
100
CI-X
P
MHz
100
CI-X
P
24-Pin
PWR1
(Bank
1B
(Bank 2)
(Bank
2B
3A
(Bank 3)
3B (Bank 3)
®
JWOL1
1)
2)
4)
ATX
E7520
Lindenhurst
North
Bridge
US
B4
R
PW
JM2
PLLSEL
JM1
SI/O
JWD1
PXH
PXH
MB
S
US
B2/3
SPKR
SATA0
JPA1
SATA1
CPU 1
CPU 2
JK1
ICH5R
South
Bridge
7902
SCSI
CTR
JPA2
JPA3
Fan7
I
PS/2 Keyboard
and Mouse Port
Pin Definitions
(J9)
Pin
1
2
3
4
5
6
Definition
Data
NC
Ground
VCC
Clock
NC
Number
8-pin
J24
PW
JP12
PWR
Fan1
PW3
SMB
J25
Fan8
MI
P
JBT1
Battery
L
320
Ultra
SC
S
I
J27
BIOS
JF1
JP15
JD1
1
LE
Fan2
JOH1
JPF1
JAR1
JP13
JL1
Fan3
E2
Floppy
ID
IDE1
A
CH
SI
C
S
320
Ultra
Fan4
CH
B
2-16
Page 37
Fan Headers
The X6DH8-XB/X6DHE-XB has eight fan
headers (Fan1 to Fan8). (*Note: These
are 4-pin fans. However, Pins 1-3 of the fan
headers are backward compatible with the
traditional 3-pin fans.) See the table on the
right for pin defi nitions. (*The onboard fan
speed is controlled by Thermal Management
via BIOS--Hardware Monitor in the Advanced
Setting. Note: Default: Disabled, When using
Thermal Management setting, please use all
3-pin fans or all 4-pin fans on the motherboard.
Please do not use 3-pin fans and 4-pin fans on
the same board.)
Chapter 2: Installation
4-pin Fan Header Pin Definitions
Pin#
1
2
3
4
Caution: These fan headers use DC power.
Definition
Ground (black)
+12V (red)
Tachometer
PWM_Control
Power LED/Speaker Header
On the JDI header, pins 1-3 are for a power
LED and pins 4-7 are for the speaker. See the
table on the right for speaker pin defi nitions.
Note: The speaker connector pins are for use
with an external speaker. If you wish to use
the onboard speaker, you should close pins
6-7 with a jumper.
Fan 7
Fan7
J24
PW
SMB
J25
CPU 1
CPU 2
JM2
LLSEL
P
JM1
JWD1
PXH
JPA1
PXH
MB
B2/3
SATA1
SATA0
JK1
ICH5R
South
Bridge
7902
SCSI
CTR
JPA2
JPA3
I
P
MI
Ultra
J27
Fan8
JBT1
BIOS
Battery
L
320
SC
S
I
CH
KB/
Mouse
USB
0/1
COM1
VGA
JCOM2
GLAN1
GLAN2
J
R
XL
VGA
JPL1
GLAN
CTLR
GLAN
CTLR
J
Fan 5Fan 6
PWR2
24-Pin
Fan5
6
Fan
G1
P
E-
AG
Ctrl
PL2
P
lot7
S
P
lot6
S
P
lot5
S
lot4
S
P
lot3
S
P
P
Slot2
lot1
S
P
JWOR1
PWR1
Pin
4PWR
DIMM 1A (Bank 1)
(Bank
1B
DIMM
(Bank 2)
DIMM 2A
(Bank
2B
DIMM
DIMM
3A
(Bank 3)
3B (Bank 3)
DIMM
4A (Bank
DIMM
DIMM 4B (Bank 4)
UPER X6DH8-XB
S
CI-E x4
MHz
133
CI-X
MHz
100
CI-X
ZCR
MHz
CI-X 100
MHz
CI-X133
Hz
M
CI-X100
MHz
CI-X100
JWOL1
R
PW
ATX
1)
2)
4)
®
E7520
Lindenhurst
North
Bridge
SI/O
S
US
US
B4
SPKR
Fan 1
8-pin
JP12
PWR
Fan1
PW3
JF1
JP15
PWR LED/SPKR
JD1
1
LE
Fan 2
Fan2
JOH1
JPF1
JAR1
JP13
Fan 3
JL1
Fan3
Fan 8
1
E
Floppy
IDE2
ID
CH A
SCSI
Ultra 320
Fan4
B
Fan4
Pin
Number
4
5
6
7
Speaker Connector Pin
Definitions (JD1)
Function
+
Key
Definition
Red wire, Speaker data
No connection
Key
Speaker data
2-17
Page 38
X6DH8-XB/X6DHE-XB User's Manual
Wake-On-Ring
The Wake-On-Ring header is designated
JWOR1. This function allows your computer
to receive and "be awakened" by an incom-
ing call to the modem when in suspend state.
See the table on the right for pin defi nitions.
You must have a Wake-On-Ring card and
cable to use this feature.
Wake-on-Ring
Pin Definitions
(JWOR1)
Pin
1
2
Definition
Ground
Wake-up
Number
Wake-On-LAN
The Wake-On-LAN header is designated
JWOL1. See the table on the right for pin
defi nitions. You must enable the LAN Wake-
Up setting in the BIOS to use this feature. You
must also have a LAN card with a Wake-on-
LAN connector and cable.
KB/
Mouse
USB
0/1
COM1
VGA
JCOM2
GLAN1
GLAN2
J
RAGE-
XL
VGA
JPL1
GLAN
CTLR
J
GLAN
CTLR
G1
P
Ctrl
PL2
WOR
lot6
S
lot5
S
lot4
S
lot3
S
Slot2
lot1
S
JWOR1
Fan6
S
lot7
Fan5
S
CI-
P
CI-X
P
PCI-X
CI-X 100 MHz ZCR
P
CI-X133
P
CI-X100
P
CI-X100
P
PWR2
24-Pin
ATX
PWR1
Pin
4PWR
DIMM 1A (Bank 1)
DIMM
DIMM 2A
DIMM
DIMM
DIMM
DIMM
DIMM 4B (Bank 4)
UPER X6DH8-XB
x4
E
133 MHz
100 MHz
1B
2B
3A (Bank
3B (Bank 3)
4A (Bank
MHz
Hz
M
MHz
JW
(Bank
(Bank 2)
(Bank
®
1
OL
1)
2)
3)
4)
E7520
Lindenhurst
North
Bridge
US
B4
WOL
JWD1
SATA0
PLLSEL
JPA1
SATA1
CPU 1
CPU 2
JK1
ICH5R
South
Bridge
7902
SCSI
CTR
JPA2
JPA3
Fan7
I
R
PW
JM2
JM1
SI/O
PXH
PXH
MB
S
US
B2/3
SPKR
PMI
Ultra
8-pin
J24
PW
JP12
PWR
SMB
J25
J27
Fan8
JBT1
BIOS
Battery
L
320
SC
S
I
CH
B
Fan3
Floppy
PW3
JP15
JL1
LE
JPF1
JP13
E2
ID
A
CH
SI
C
S
Fan4
Fan1
JF1
JD1
1
Fan2
IDE1
ltra 320
U
JOH1
JAR1
Wake-On-LAN Pin
Definitions (JWOL1)
Pin
Number
1
2
3
Definition
+5V Standby
Ground
Wake-up
2-18
Page 39
Chapter 2: Installation
SMB
A System Management Bus header is
located at J22. Connect the appropri-
ate cable here to utilize SMB on your
system.
SMB Power (I2 C) Connector
I2 C Connector, located at J24, moni-
tors the status of PWR Supply, Fan
and system temperature.
SMB Header
Pin Definitions (J22)
Pin
Number
1
2
3
4
No Connection
SMB PWR
Pin Definitions (J24)
Pin #
1
2
3
4
5
Definition
Data
Ground
Clock
Definition
Clock
Data
PWR Fail
N/A
N/A
PWR2
24-Pin
KB/
Mouse
USB
0/1
COM1
VGA
JCOM2
GLAN1
GLAN2
J
R
XL
VGA
JPL1
J
P
AG
GLAN
CTLR
GLAN
CTLR
PL2
Fan5
6
Fan
G1
lot7
S
E-
Slot6
Ctrl
lot5
S
lot4
S
lot3
S
Slot2
lot1
S
JWOR1
PWR1
Pin
4PWR
DIMM 1A (Bank 1)
(Bank
1B
DIMM
(Bank 2)
DIMM 2A
(Bank
2B
DIMM
DIMM
3A
(Bank 3)
(Bank 3)
DIMM 3B
4A (Bank
DIMM
DIMM 4B (Bank 4)
®
UPER X6DH8-XB
S
CI-E x4
P
MHz
133
CI-X
P
MHz
100
CI-X
P
ZCR
MHz
CI-X 100
P
MHz
CI-X133
P
MHz
CI-X100
P
MHz
CI-X100
P
JWOL1
1)
2)
4)
ATX
E7520
Lindenhurst
North
Bridge
US
B4
SMB PWR
JWD1
SATA0
PLLSEL
JPA1
SATA1
Fan7
CPU 1
CPU 2
JK1
I
ICH5R
South
Bridge
7902
SCSI
CTR
JPA2
JPA3
R
W
P
JM2
JM1
SI/O
PXH
PXH
MB
S
US
B2/3
SPKR
PW
SMB
J25
Fan8
MI
P
JBT1
L
Ultra 320
SC
J24
Battery
S
I
J27
BIOS
8-pin
JP12
PWR
Fan1
PW3
JF1
JP15
JD1
E1
L
Fan2
JOH1
JPF1
JAR1
JP13
JL1
Fan3
E2
Floppy
ID
IDE1
A
CH
SI
C
S
320
Ultra
Fan4
CH
B
SMB
2-19
Page 40
X6DH8-XB/X6DHE-XB User's Manual
Overheat LED (JOH1)
Connect an LED to the JOH1 header to
provide warnings of chassis overheating.
See the table on the right for pin defi ni-
tions.
Power Fault
Connect a cable from your power sup-
ply to the Power Fail header (JP12) to
provide warnings of power supply failure.
This warning signal is passed through the
PWR_LED pin to indicate of a power failure
on the chassis. See the table on the right
for pin defi nitions.
Overheat LED
Pin Definitions (JOH1)
Pin
Number
1
2
Definition
+5V
OH Active
Power Fault
Pin Definitions
Pin
Number
1
2
3
4
Definition
P/S 1 Fail Signal
P/S 2 Fail Signal
P/S 3 Fail Signal
Reset (from MB)
Note: This feature is only available when using
redundant Supermicro power supplies.
PWR2
24-Pin
KB/
Mouse
USB
0/1
COM
VGA
JCOM2
1
GLAN1
GLAN2
JPG1
RAG
XL
VGA Ctrl
JPL1
GLAN
CTLR
GLAN
CTL
J
PL2
E
R
Slot6
Slot5
Slot4
lot3
S
Slot2
Slot1
JWOR1
Fan6
Slot7
Fan5
S
CI-E x4
P
PCI-X
PCI-X 100
PCI-X
CI-X133 MHz
P
PCI-X100
CI-X100
P
PWR1
in
4-P
R
PW
DIMM
1A
(Bank
DIMM 1B (Bank
DIMM 2A (Bank 2)
(Bank 2)
DIMM 2B
DIMM
3A
(Bank
DIMM 3B (Bank
4A (Bank
DIMM
DIMM 4B (Bank 4)
UPER X6DH8-XB
133 MHz
MHz
ZCR
100 MHz
MHz
MHz
JWOL
®
1
ATX PW R
1)
1)
3)
3)
4)
E7520
Lindenhurst
North
Bridge
US
Power Fault
Fan7
CPU
CPU
JM2
PLLSEL
JM1
I/O
S
JWD1
XH
P
XH
P
SMB
B4
USB2/3
SPKR
SATA0
A1
P
J
SATA1
JK1
ICH5R
South
Bridge
7902
SCSI
CT
A2
P
J
A3
P
J
MI
P
I
RL
U
PW
SMB
J25
1
2
Fan8
JBT1
ltra 320
S
C
J24
J27
BIOS
Battery
S
I
8-pin
JP12
PWR
Fan1
PW3
JF1
JP15
JD1
LE1
Fan2
Overheat
JOH1
JPF1
JAR1
JP13
3
JL1
Fan
ppy
Flo
IDE2
IDE1
SCSI CH A
ltra 320
U
Fan4
CH
B
2-20
Page 41
2-6 Jumper Settings
Explanation of
Jumpers
To modify the operation of the
motherboard, jumpers can be used
to choose between optional settings.
Jumpers create shorts between two
pins to change the function of the
connector. Pin 1 is identifi ed with
a square solder pad on the printed
circuit board. See the motherboard
layout pages for jumper locations.
*Note: On two pin jumpers, "Closed"
means the jumper is on and "Open"
means the jumper is off the pins.
Connector
Pins
Jumper
Cap
Setting
Chapter 2: Installation
3 2 1
3 2 1
Pin 1-2 short
GLAN Enable/Disable
Jumpers JPL1 and JPL2 enable or
disable the GLAN ports 1 and 2 on
the motherboard. See the table on the
right for jumper settings. The default
setting is enabled.
GLAN 1 Enable
GLAN 2 Enable
KB/
Mouse
USB
0/1
COM1
VGA
JCOM2
GLAN1
GLAN2
J
R
XL
VGA
JPL1
GLAN
CTLR
GLAN
CTLR
J
Fan
G1
P
lot7
S
E-
AG
lot6
S
Ctrl
lot5
S
lot4
S
lot3
S
Slot2
lot1
S
PL2
JWOR1
Fan5
6
DIMM 3B
DIMM
DIMM 4B (Bank 4)
UPER
S
CI-E x4
P
CI-X
P
CI-X
P
CI-X 100 MHz ZCR
P
CI-X
P
100
CI-X
P
CI-X
P
PWR2
24-Pin
PWR1
Pin
4PWR
DIMM 1A (Bank 1)
(Bank
1B
DIMM
(Bank 2)
DIMM 2A
(Bank
2B
DIMM
DIMM
3A (Bank
(Bank 3)
4A (Bank
133 MHz
MHz
100
Hz
M
133
MHz
MHz
100
JWOL1
P
ATX
1)
2)
3)
4)
®
X6DH8-XB
E7520
Lindenhurst
North
Bridge
US
B4
R
W
JM2
PLLSEL
JM1
SI/O
JWD1
PXH
PXH
MB
S
USB2/3
SPKR
SATA0
JPA1
SATA1
CPU 1
CPU 2
JK1
ICH5
South
Bridge
7902
SCSI
CTR
JPA2
JPA3
Fan7
I
P
Ultra
GLAN
Enable/Disable
Jumper Settings
(JPL1/JPL2)
Jumper
Position
Pins 1-2
Pins 2-3
8-pin
J24
PW
JP12
PWR
Fan1
PW3
SMB
J25
Fan8
MI
R
JBT1
L
320
SC
S
Bat
BIOS
I
JF1
JP15
JD1
E1
L
Fan2
JOH1
JPF1
JAR1
JP13
JL1
Fan3
J27
E2
Floppy
ID
IDE1
A
CH
SI
C
S
tery
ltra 320
U
Fan4
CH
B
Definition
Enabled
Disabled
2-21
Page 42
X6DH8-XB/X6DHE-XB User's Manual
CMOS Clear
JBT1 is used to clear CMOS. Instead of pins, this
"jumper" consists of contact pads to prevent the
accidental clearing of CMOS. To clear CMOS, use
a metal object such as a small screwdriver to touch
both pads at the same time to short the connection.
Always remove the AC power cord from the system
before clearing CMOS.
*Note: For an ATX power supply, you must com-
pletely shut down the system, remove the AC
power cord and then short JBT1 to clear CMOS.
Do not use the PW_ON connector to clear
CMOS.
Watch Dog Enable/Disable
JWD1 controls Watch Dog, a system monitor that
takes actions when a software application hangs.
Close Pins 1-2 to reset the system if a program
hangs. Close Pins 2-3 to generate a non-mask-
able interrupt for the program that hangs. Watch
Dog must also be enabled in the BIOS to use this
function.
KB/
Mouse
USB
0/1
COM1
VGA
JCOM2
GLAN1
GLAN2
J
R
XL
VGA
JPL1
GLAN
CTLR
J
P
AG
GLAN
CTLR
PL2
JWD1
SATA0
PLLSEL
JPA1
SATA1
CPU 1
CPU 2
JK1
ICH5R
South
Bridge
7902
SCSI
CTR
JPA2
JPA3
Fan7
I
PWR2
24-Pin
Pin
4PWR
DIMM 1A (Bank 1)
1B
DIMM
DIMM 2A
2B
DIMM
DIMM
3A
DIMM 3B
4A (Bank
DIMM
DIMM 4B (Bank 4)
UPER
S
CI-E x4
MHz
133
CI-X
P
MHz
100
CI-X
P
CI-X 100 MHz ZCR
P
MHz
133
CI-X
P
MHz
100
CI-X
MHz
100
CI-X
PWR1
(Bank
(Bank 2)
(Bank
(Bank
(Bank 3)
JWOL1
Fan5
6
Fan
G1
E-
Ctrl
lot6
S
lot5
S
lot4
S
lot3
S
Slot2
lot1
S
JWOR1
P
lot7
S
P
P
P
ATX
1)
2)
3)
4)
®
X6DH8-XB
E7520
Lindenhurst
North
Bridge
US
B4
R
W
JM2
JM1
SI/O
PXH
PXH
MB
S
US
B2/3
SPKR
P
Ultra
8-pin
J24
PW
JP12
PWR
Fan1
PW3
SMB
J25
Fan8
MI
JBT1
L
320
SC
S
J27
BIOS
Battery
I
JF1
JP15
JD1
E1
L
Fan2
JPF1
JP13
JL1
Fan3
E2
Floppy
ID
IDE1
A
CH
SI
C
S
ltra 320
U
Fan4
CH
B
Watch Dog
Jumper Settings (JWD1)
Jumper
Position
Pins 1-2
Pins 2-3
Open
JOH1
JAR1
Watch Dog Enable
Clear CMOS
Definition
WD to Reset
WD to NMI
Disabled
2-22
Page 43
Chapter 2: Installation
VGA Enable/Disable
JPG1 enables or disables the VGA
Connector on the motherboard. See
the table on the right for jumper set-
tings. The default setting is enabled.
Alarm Reset
The system will notify you in the event
of a power supply failure. Use this
function for Supermicro redundant
power supply units that are installed in
the chassis. If you only have a single
power supply installed, you should
not connect anything to this jumper to
prevent false alarms. See the table on
the right for jumper settings.
VGA
Enable/Disable
Jumper Settings
(JPG1)
Jumper
Position
Pins 1-2
Pins 2-3
Definition
Enabled
Disabled
Alarm Reset Jumper
Settings (JAR1)
Jumper
Position
2
1
Definition
+5V
Ground
VGA Enable
PWR2
24-Pin
KB/
Mouse
USB
0/1
COM1
VGA
JCOM2
GLAN1
GLAN2
R
XL
VGA
JPL1
P
J
AG
GLAN
CTLR
GLAN
CTLR
J
PL2
Fan5
6
Fan
G1
E-
Ctrl
JWOR1
S
S
S
Slot2
S
P
lot7
S
lot6
P
lot5
S
lot4
lot3
P
lot1
P
Pin
4PWR
DIMM 1A (Bank 1)
1B
DIMM
DIMM 2A
2B
DIMM
DIMM
3A
DIMM 3B
4A (Bank
DIMM
DIMM 4B (Bank 4)
UPER
S
CI-E x4
133 MHz
CI-X
P
MHz
100
CI-X
CI-X 100 MHz ZCR
P
MHz
133
CI-X
P
MHz
100
CI-X
MHz
100
CI-X
PWR1
(Bank
(Bank 2)
(Bank
(Bank
(Bank 3)
JWOL1
®
W
P
ATX
1)
2)
3)
4)
X6DH8-XB
E7520
Lindenhurst
North
Bridge
US
B4
R
SPKR
SI/O
MB
S
USB2/3
JM1
PXH
PXH
JM2
JWD1
SATA0
PLLSEL
JPA1
SATA1
CPU 1
CPU 2
ICH5
South
Bridge
7902
SCSI
CTR
JPA2
JPA3
Fan7
JK1
P
I
Ultra
J24
PW
SMB
J25
Fan8
MI
R
JBT1
L
320
SC
2-23
8-pin
JP12
PWR
Fan1
PW3
JF1
JP15
JD1
E1
L
Fan2
JOH1
JPF1
Alarm Reset
JAR1
JP13
JL1
Fan3
J27
E2
Floppy
ID
IDE1
A
BIOS
CH
SI
C
S
tery
Bat
320
Ultra
Fan4
S
I
CH
B
Page 44
X6DH8-XB/X6DHE-XB User's Manual
Force-Power-On Enable/
Disable
Jumper JPF1, allows you to enable or
disable the function of Force-Power-
On. If enabled, the power will always
stay on automatically. If this function is
disabled, the user needs to press the
power button to power on the system.
3rd Power Supply Alarm
Enable/Disable
The system can notify you in the event
of the 3rd power supply failure. This
feature is available when three power
supply units are installed in the chas-
sis, with one acting as a backup. If
you only have one or two power sup-
ply units installed, you should disable
JP13 (the default setting) to prevent
false alarms. See the table on right
for pin defi nitions.
Force Power On
(JPF1)
Jumper
Position
Off
On
Definition
Normal
Force On
Power Supply
Alarm Enable/Disable
Jumper Settings (JP13)
Jumper
Position
Open
Closed
Definition
Disabled
Enabled
in
P
PWR2
24KB/
Mou
US
0/1
COM1
VGA
JCOM2
B
GLAN1
GLAN2
J
RAGE
XL
VGA
JPL1
GLAN
CTLR
GLAN
CTLR
J
PG1
PL2
Fan5
6
Fan
se
CI-E
P
Slot7
-
Ctrl
JWOR1
Slot6
Slot5
Slot4
S
Slot2
Slot1
CI-X
P
CI-X
P
CI-X 100
P
lot3
PCI-X133
PCI-X100
CI-X100
P
PWR1
in
4-P
R
W
P
DIMM 1A
(Bank
2A (Bank 2)
2B
4A
4B (Bank 4)
MHz
MHz
MHz
MHz
MHz
1)
(Bank
(Bank 4)
®
ZCR
JWOL1
DIMM 1B (Bank
DIMM
DIMM
DIMM 3A (Bank 3)
DIMM 3B (Bank 3)
DIMM
DIMM
UPER X6DH8-XB
S
x4
133 MHz
100
ATX P
1)
2)
E
Lind
North
Bridge
USB4
7520
Fan7
A1
SATA1
CPU
CPU 2
JK1
ICH5R
outh
S
Bridge
7902
SCSI
CTR
A2
P
J
A3
JP
IPMI
1
L
U
PW
SMB
ltra 320
SC
J24
J25
Fan8
JBT1
J27
BIOS
Bat
SI CH
R
W
SEL
urst
enh
JM2
LL
P
JM1
SI/O
JWD1
XH
P
JP
XH
P
SMB
USB2/3
SP
KR
SATA0
1
8-pin
JP12
PWR
Fan
PW3
JF1
JP15
JD1
E1
L
Fan2
Force PWR-On
JOH1
JPF1
3rd PWR Detect
JAR1
JP13
JL1
Fan3
2
Floppy
IDE
IDE1
SCSI CH A
tery
ltra 320
U
Fan4
B
2-24
Page 45
Chapter 2: Installation
SCSI Enable/Disable (*For
X6DH8-XB only)
Jumper JPA1 allows you to enable or
disable the SCSI Controller. The default
setting is pins 1-2 to enable all four
headers. See the table on the right for
jumper settings.
SCSI Termination Enable/
Disable (*For X6DH8-XB
only)
Jumpers JPA2 and JPA3 allow you to
enable or disable termination for the
SCSI connectors. Jumper JPA2 con-
trols SCSI channel A and JPA3 is for
SCSI channel B. The default setting is
open to enable (terminate) both SCSI
channels. (*Note: In order for the SCSI
drives to function properly, please do
not change the default setting set by
the manufacturer.) See the table on
the right for jumper settings.
SCSI Enable/Disable
Jumper Settings
(JPA1)
Jumper
Position
Pins 1-2
Pins 2-3
Definition
Enabled
Disabled
SCSI Channel Termination
Enable/Disable
Jumper Settings
(JPA2, JPA3)
Jumper
Position
Open
Closed
Definition
Enabled
Disabled
PWR2
24-Pin
KB/
Mouse
USB
0/1
COM1
VGA
JCOM2
GLAN1
GLAN2
J
R
XL
VGA
JPL1
J
P
AGE
GLAN
CTLR
GLAN
CTLR
PL2
Fan5
6
Fan
G1
lot7
S
lot6
S
Ctrl
lot5
S
lot4
S
lot3
S
Slot2
lot1
S
JWOR1
Pin
4PWR
DIMM 1A (Bank 1)
1B
DIMM
DIMM 2A
2B
DIMM
DIMM
3A (Bank
DIMM 3B
4A (Bank
DIMM
DIMM 4B (Bank 4)
UPER
S
CI-E x4
P
MHz
133
CI-X
P
100 MHz
CI-X
P
CI-X 100 MHz ZCR
P
Hz
M
CI-X133
P
Hz
M
CI-X100
P
MHz
CI-X100
P
PWR1
(Bank
(Bank 2)
(Bank
(Bank 3)
JWOL1
®
X6DH8-XB
1)
2)
3)
4)
ATX
E7520
Lindenhurst
North
Bridge
US
B4
JWD1
SATA0
PLLSEL
JPA1
SATA1
CPU 1
CPU 2
JK1
ICH5
South
Bridge
7902
SCSI
CTR
JPA2
JPA3
Fan7
I
R
W
P
JM2
JM1
SI/O
PXH
PXH
MB
S
USB2/3
SPKR
MI
P
Ultra
8-pin
J24
PW
JP12
PWR
Fan1
PW3
SMB
J25
Fan8
R
JBT1
L
320
SC
S
Bat
I CH
J27
BIOS
JF1
JP15
JD1
E1
L
Fan2
JOH1
JPF1
JAR1
JP13
JL1
Fan3
E2
Floppy
ID
IDE1
A
SCSI Enable
CH
SI
C
S
tery
320
SCSI CH A,/CH B.
Ultra
Fan4
B
Termination Enable
2-25
Page 46
X6DH8-XB/X6DHE-XB User's Manual
PLLSEL Select
Jumpers: JM1 and JM2 allow the user
to select PLLSEL (memory speed).
See the table on the right for jumper
defi nitions. (*The Default setting is:
Closed: DDR333).
Reboot Option Enable (*For
Debug only)
Enable JP15 to reboot the system
after a timeout if the system hangs
on bootup. See the table on the right
for pin defi nitions. The default setting
is enabled.
PLLSEL Select
Jumper Settings
(JM1/JM2)
DDR
333 MHz
266MHz
JM1 JM2
Closed Closed
Open Open
(*Default: DDR333)
Reboot Option Enable
Jumper Settings (JP15)
Jumper
Position
Open
Closed
Definition
Enabled
Disabled
KB/
Mou
USB
0/1
COM1
VGA
JCOM2
se
GLAN1
GLAN2
G1
P
J
AGE-
R
XL
VGA Ctrl
JPL1
GLAN
CTL
GLAN
CTLR
J
PL2
R
lot6
S
lot5
S
lot4
S
lot3
S
Slot2
lot1
S
JWOR1
Fan
S
5
Fan
6
4-Pin
P
DIMM
DIMM 1B
DIMM
DIMM
DIMM 3A
DIMM
DIMM 4A (Bank 4)
DIMM
UPER X6DH8-XB
S
x4
E
CI-
P
lot7
CI-X 133 MHz
P
PCI-X
PCI-X 100
CI-X133 MHz
P
100
CI-X
P
100
CI-X
P
PWR2
WR
100 MHz
MHz
MHz
MHz
24-Pin
PWR1
1A
(Bank
(Bank 1)
2A (Bank
2B (Bank 2)
(Bank
3B (Bank 3)
(Bank 4)
4B
ZC
JWOL1
PLLSEL (Memory
Freq. Select
7
Fan
PU 1
C
PU 2
C
JK1
ICH5R
South
Bridge
7902
SCSI
CT
A2
JP
A3
JP
J24
PW
SMB
J25
J27
Fan8
PMI
I
JBT
1
BIO
Bat
RL
320
ltra
U
S
C
S
I CH
R
W
P
ATX
1)
2)
3)
®
SI/O
SMB
USB2/3
JM1
P
PXH
JM2
JWD1
XH
L
SE
PLL
SATA0
JPA1
SATA1
7520
E
Lindenhurst
North
Bridge
R
USB4
SPKR
1
8-pin
JP12
PWR
Fan
PW3
JF1
Reboot
JP15
JD1
Option
E1
L
Fan2
JOH1
JPF1
JAR1
JP13
JL1
Fan3
2
Floppy
IDE
IDE1
S
CH A
SCSI
tery
Ultra 320
Fan4
B
2-26
Page 47
Chapter 2: Installation
2-7 Onboard Indicators
GLAN LEDs
There are two Gigabit Ethernet LAN
ports (GLAN1/GLAN2) on the moth-
erboard. Each GLAN port has two
LEDs on the connectors. The yellow
LED indicates activity while the other
LED may be green, orange or off to
indicate the speed of the connection.
See the table at right for the functions
associated with the GLAN LED.
RightLeft
Back Panel View
G-bit LAN Right LED
Indicator
LED
Color
Off
Green
Orange
1 Gb LAN Left LED
Indicator(Activ ity LED)
LED
Color
Amber
Definition
10MHz
100 MHz
1 GHz
Definition
Blinking
10/100MHz/
1GHz
GLAN 1/2
KB/
Mouse
USB
0/1
1
COM
VGA
GLAN1
GLAN2
G1
P
J
E-
AG
R
XL
Ctrl
VGA
JPL1
GLAN
R
CTL
GLAN
R
CTL
JPL2
JCOM2
Slot7
lot6
S
Slot5
lot4
S
Slot3
Slot2
lot1
S
JWOR1
Fan6
PWR2
24-Pin
Fan5
S
PCI-E x4
PCI-X 133
PCI-X 100 MHz
CI-X
P
PCI-X
PCI-X100
PCI-X100 MHz
PWR1
in
P
4PWR
DIMM
1A (Bank
DIMM 1B (Bank 1)
2A (Bank 2)
DIMM
(Bank
DIMM 2B
DIMM 3A (Bank 3)
DIMM 3B (Bank 3)
4A (Bank 4)
DIMM
DIMM 4B (Bank 4)
MHz
MHz
MHz
JWOL1
®
ZCR
UPER X6DH8-XB
100
133 MHz
ATX
1)
2)
E
Lindenhurst
North
Bridge
USB4
7520
PWR
SP
SI/O
S
USB2/3
K
R
MB
JM1
PXH
P
JM2
JWD1
XH
SATA0
PLLSEL
C
C
JPA1
JPA2
JPA3
SATA1
Fan7
PU 1
PU 2
JK1
IPMI
ICH5R
South
Bridge
7902
SCSI
CTRL
ltra 320
U
J24
PW
SMB
J25
J27
Fan8
JBT1
BIO
Battery
SCSI CH B
S
8-pin
JP12
PWR
PW3
JP15
E1
L
JPF1
JP13
JL1
Fan3
Floppy
Fan1
JF1
JD1
Fan2
IDE2
IDE1
I CH A
CS
S
Ultra 320
Fan4
JOH1
JAR1
2-27
Page 48
X6DH8-XB/X6DHE-XB User's Manual
2-8 Floppy, Hard Disk and SCSI Connections
Note the following when connecting the fl oppy and hard disk drive cables:
• The fl oppy disk drive cable has seven twisted wires.
• A red mark on a wire typically designates the location of pin 1.
• A single fl oppy disk drive ribbon cable has 34 wires and two connectors to provide
for two fl oppy disk drives. The connector with twisted wires always connects to
drive A, and the connector that does not have twisted wires always connects to
drive B.
Floppy Connector Pin Definitions
Floppy Connector
The floppy connector is located
between IPMI 2.0 Socket and IDE
#2 slot. See the table below for pin
defi nitions.
Pin Number Function
1 GND
3 GND
5 Key
7 GND
9 GND
11 GND
13 GND
15 GND
17 GND
19 GND
21 GND
23 GND
25 GND
27 GND
29 GND
31 GND
33 GND
Pin Number Function
2 FDHDIN
4 Reserved
6 FDEDIN
8 Index 10 Motor Enable
12 Drive Select B 14 Drive Select A 16 Motor Enable
18 DIR 20 STEP 22 Write Data 24 Write Gate 26 Track 00 28 W rite Protect 30 Read Data 32 Side 1 Select 34 Diskette
PWR2
24-Pin
ATX
KB/
Mouse
USB
0/1
COM1
VGA
JCOM2
GLAN1
GLAN2
J
RAGEXL
VGA
JPL1
GLAN
CTLR
GLAN
CTLR
J
Fan5
Fan6
G1
P
Ctrl
PL2
lot6
S
lot5
S
lot4
S
lot3
S
Slot2
lot1
S
JWOR1
P
lot7
S
P
P
PWR1
Pin
4PWR
DIMM 1A (Bank 1)
(Bank
1B
DIMM
(Bank 2)
DIMM 2A
(Bank
2B
DIMM
DIMM
3A
(Bank
3B (Bank 3)
DIMM
4A (Bank
DIMM
DIMM 4B (Bank 4)
®
UPER X6DH8-XB
S
CI-E x4
133 MHz
CI-X
P
MHz
100
CI-X
P
CI-X 100 MHz ZCR
P
Hz
M
CI-X133
P
Hz
M
CI-X100
MHz
CI-X100
1
OL
JW
1)
2)
3)
4)
US
Lindenhurst
North
Bridge
E7520
SATA0
PLLSEL
JPA1
SATA1
Fan7
CPU 1
CPU 2
JK1
I
ICH5R
South
Bridge
7902
SCSI
CTR
JPA2
JPA3
R
PW
JM2
JM1
SI/O
JWD1
PXH
PXH
MB
S
US
SPKR
B2/3
B4
8-pin
J24
PW
JP12
PWR
Fan1
PW3
SMB
J25
Fan8
MI
P
JBT1
L
320
Ultra
SC
S
J27
BIOS
Battery
I
CH
JF1
JP15
JD1
1
LE
Fan2
JOH1
JPF1
JAR1
JP13
JL1
Fan3
E2
Floppy
Floppy
ID
IDE1
A
CH
SI
C
S
ltra 320
U
Fan4
B
2-28
Page 49
Chapter 2: Installation
IDE Connectors
There are no jumpers to confi g-
ure the onboard IDE#1 and #2
connectors. See the table on
the right for pin defi nitions.
IDE Connector Pin Definitions
Pin Number Function
1 Reset IDE
3 Host Data 7
5 Host Data 6
7 Host Data 5
9 Host Data 4
11 Host Data 3
13 Host Data 2
15 Host Data 1
17 Host Data 0
19 GND
21 DRQ3
23 I/O Write 25 I/O Read 27 IOCHRDY
29 DACK3 31 IRQ14
33 Addr 1
35 Addr 0
37 Chip Select 0
39 Activity
Pin Number Function
2 GND
4 Host Data 8
6 Host Data 9
8 Host Data 10
10 Host Data 11
12 Host Data 12
14 Host Data 13
16 Host Data 14
18 Host Data 15
20 Key
22 GND
24 GND
26 GND
28 BALE
30 GND
32 IOCS16 34 GND
36 Addr 2
38 Chip Select 1 40 GND
PWR2
24-Pin
KB/
Mouse
USB
0/1
COM1
VGA
JCOM2
GLAN1
GLAN2
J
R
XL
VGA
JPL1
GLAN
CTLR
GLAN
CTLR
J
Fan5
6
Fan
G1
P
E-
AG
Ctrl
PL2
P
lot7
S
P
lot6
S
P
lot5
S
lot4
S
P
lot3
S
P
P
Slot2
lot1
S
P
JWOR1
PWR1
Pin
4PWR
DIMM 1A (Bank 1)
1B
DIMM
(Bank 2)
DIMM 2A
2B
DIMM
DIMM
3A
(Bank 3)
DIMM 3B
4A (Bank
DIMM
DIMM 4B (Bank 4)
UPER
S
CI-E x4
MHz
133
CI-X
100 MHz
CI-X
CI-X 100 MHz ZCR
Hz
M
CI-X133
Hz
M
CI-X100
MHz
CI-X100
JWOL1
(Bank
(Bank
(Bank
®
W
P
ATX
1)
2)
3)
4)
X6DH8-XB
E7520
Lindenhurst
North
Bridge
US
B4
R
SPKR
IDE1
P
Ultra
IDE2
8-pin
J24
PW
JP12
PWR
Fan1
PW3
SMB
J25
Fan8
MI
R
JBT1
L
320
SC
S
JF1
JP15
JD1
E1
L
Fan2
JOH1
JPF1
JAR1
JP13
JL1
Fan3
J27
E2
Floppy
ID
IDE1
A
BIOS
CH
SI
C
S
tery
Bat
ltra 320
U
Fan4
I
CH
B
Fan7
CPU 1
CPU 2
JM2
PLLSEL
JM1
SI/O
PXH
PXH
MB
S
US
B2/3
JWD1
SATA0
JPA1
SATA1
ICH5
South
Bridge
7902
SCSI
CTR
JPA2
JPA3
JK1
I
2-29
Page 50
X6DH8-XB/X6DHE-XB User's Manual
Ultra320 SCSI Connectors
(*X6DH8-XB Only)
Refer to the table below for the pin defi nitions
of the Ultra320 SCSI connectors located at
JA1 and JA2.
68-pin Ultra320 SCSI Connectors (JA1 and JA2)
Connector
Contact
Number
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
Signal Names
+DB(12)
+DB(13)
+DB(14)
+DB(15)
+DB(P1)
+DB(0)
+DB(1)
+DB(2)
+DB(3)
+DB(4)
+DB(5)
+DB(6)
+DB(7)
+DB(P)
GROUND
DIFFSENS
TERMPWR
TERMPWR
RESERVED
GROUND
+ATN
GROUND
+BSY
+ACK
+RST
+MSG
+SEL
+C/D
+REQ
+I/O
+DB(8)
+DB(9)
+DB(10)
+DB(11)
Connector
Contact
Number
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
Signal Names
-DB(12)
-DB(13)
-DB(14)
-DB(15)
-DB(P1)
-DB(0)
-DB(1)
-DB(2)
-DB(3)
-DB(4)
-DB(5)
-DB(6)
-DB(7)
-DB(P)
GROUND
GROUND
TERMPWR
TERMPWR
RESERVED
GROUND
-ATN
GROUND
-BSY
-ACK
-RST
-MSG
-SEL
-C/D
-REQ
-I/O
-DB(8)
-DB(9)
-DB(10)
-DB(11)
in
P
PWR2
24-
WR
P
ATX
PWR1
Fan5
4-Pin
PWR
DIMM
1A
DIMM 1B
2A
DIMM
2B (Bank
DIMM
DIMM
3A
3B
DIMM
DIMM 4A
4B
DIMM
UPER X6DH8-XB
S
PCI-E x4
MHz
133
PCI-X
MHz
100
CI-X
P
MHz
100
CI-X
P
PCI-X133 MHz
PCI-X100 MHz
PCI-X100 MHz
JW
(Bank
(Bank
(Bank
(Bank 3)
(Bank
(Bank
(Bank
ZC
OL
1)
1)
2)
2)
3)
4)
4)
®
E7520
Lindenhurst
North
Bridge
R
1
US
B4
SPKR
COM
JCOM2
KB/
Mou
US
0/1
VGA
se
B
1
GLAN1
GLAN2
PG1
J
AG
R
XL
VGA Ctrl
JPL1
GLAN
CTLR
GLAN
CTLR
J
L2
P
Fan6
lot7
S
-
E
lot6
S
lot5
S
lot4
S
lot3
S
Slot2
lot1
S
JWOR1
7
Fan
8-pin
J24
PW
JP12
PWR
Fan1
PW3
SMB
J25
1
PU
C
2
PU
C
JM2
PLLSEL
JM1
JK1
I/O
S
B
M
S
US
B2/3
PMI
I
JWD1
R
ICH5
PXH
outh
S
Bridge
A1
P
J
7902
PXH
SCSI
L
CTR
A2
JP
A3
JP
ltra 320
U
S
1
ATA
S
ATA0
S
JF1
JP15
JD1
1
E
L
Fan2
JOH1
JPF1
JAR1
JP13
JL1
Fan3
J27
Fan
8
2
1
ppy
Flo
IDE
IDE
JBT1
A
BIOS
CH
SCSI Channel A
SCSI
tery
Bat
ltra 320
U
SCSI Channel B
Fan4
C
S
I
CH
B
2-30
Page 51
Chapter 3: Troubleshooting
Chapter 3
Troubleshooting
3-1 Troubleshooting Procedures
Use the following procedures to troubleshoot your system. If you have followed all
of the procedures below and still need assistance, refer to the ‘Technical Support
Procedures’ and/or ‘Returning Merchandise for Service’ section(s) in this chapter.
Note: Always disconnect the power cord before adding, changing or installing
any hardware components.
Before Power On
1. Make sure that there are no short circuits between the motherboard and chas-
sis.
2. Disconnect all ribbon/wire cables from the motherboard, including those for the
keyboard and mouse.
3. Remove all add-on cards.
4. Make sure that the processors are properly installed, and the chassis speaker
and the power LED are connected to the motherboard. (Check all jumper
settings as well.)
5. Use only the correct type of CMOS onboard battery as recommended by the
Manufacturer. Do not install the onboard battery upside down to avoid pos-
sible explosion.
No Power
1. Make sure that there are no short circuits between the motherboard and the
chassis.
2. Make sure that all jumpers are set to their default positions.
3. Make sure that the 115V/230V switch on the power supply is properly set.
4. Turn the power switch on and off to test the system.
5. The battery on your motherboard may be old. Check to verify that it still supplies
~3VDC. If it does not, replace it with a new one.
No Video
1. If the power is on but you have no video, remove all the add-on cards and
cables.
2. Use the speaker to determine if any beep codes exist. Refer to the Appendix
for details on beep codes.
3-1
Page 52
X6DH8-XB/X6DHE-XB User's Manual
NOTE
If you are a system integrator, VAR or OEM, a POST diagnostics
card is recommended. For I/O port 80h codes, refer to App. B.
Memory Errors
1. Make sure the DIMM modules are properly and fully installed.
2. Determine if different speeds of DIMMs have been installed and verify that the
BIOS setup is confi gured for the fastest speed of RAM used. It is recom-
mended to use the same RAM speed for all DIMMs in the system.
3. Make sure you are using the correct type of Registered ECC DDR-333/266
(PC2700/PC2100) SDRAM (*Please refer to Page 2-5 for the instruction on
DDR 333 DIMM population and installation.)
4. Check for bad DIMM modules or slots by swapping a single module between
two slots and noting the results.
5. Make sure all memory modules are fully seated in their slots. As an interleaved
memory scheme is used, you must install two modules at a time, beginning
with Bank 1, then Bank 2, and so on (see Section 2-3).
6. Check the position of the 115V/230V switch on the power supply.
Losing the System’s Setup Confi guration
1. Ensure that you are using a high quality power supply. A poor quality power
supply may cause the system to lose the CMOS setup information. Refer to
Section 1-6 for details on recommended power supplies.
2. The battery on your motherboard may be old. Check to verify that it still supplies
~3VDC. If it does not, replace it with a new one.
3. If the above steps do not fi x the Setup Confi guration problem, contact your
vendor for repairs.
3-2 Technical Support Procedures
Before contacting Technical Support, please take the following steps. Also, note
that as a motherboard manufacturer, Super Micro does not sell directly to end-us-
ers, so it is best to fi rst check with your distributor or reseller for troubleshooting
services. They should know of any possible problem(s) with the specifi c system
confi guration that was sold to you.
1. Please go through the ‘Troubleshooting Procedures’ and 'Frequently Asked Ques-
tion' (FAQ) sections in this chapter or see the FAQs on our web site at (
www.supermicro.com/support/faqs/) before contacting Technical Support.
http://
3-2
Page 53
Chapter 3: Troubleshooting
2. BIOS upgrades can be downloaded from our web site at (http://www.supermicro.
com/support/bios/
Note: Not all BIOS can be fl ashed; it depends on the modifi cations to the boot
block code.
3. If you still cannot resolve the problem, include the following information when
contacting Super Micro for technical support:
• Motherboard model and PCB revision number
• BIOS release date/version (this can be seen on the initial display when your
system fi rst boots up)
•System confi guration
An example of a Technical Support form is on our web site at
(http://www.supermicro.com/support/contact.cfm).
4. Distributors: For immediate assistance, please have your account number ready
when placing a call to our technical support department. We can be reached
by e-mail at support@supermicro.com, by phone at: (408) 503-8000, option
2, or by fax at (408)503-8019.
).
3-3 Frequently Asked Questions
Question: What are the various types of memory that my motherboard can
support?
Answer: The X6DH8-XB/X6DHE-XB has eight 184-pin DIMM slots that support
registered ECC DDR 333/266 (PC2700/PC2100) SDRAM modules. It is strongly
recommended that you do not mix memory modules of different speeds and sizes.
(*Please refer to Page 2-6 for the instruction on DDR 333 DIMM population and
installation.)
Answer: It is recommended that you do not upgrade your BIOS if you are not
experiencing any problems with your system. Updated BIOS fi les are located on
our web site at
warning message and the information on how to update your BIOS on our web site.
Also, check the current BIOS revision and make sure it is newer than your BIOS
before downloading. Select your motherboard model and download the BIOS fi le
to your computer. Unzip the BIOS fi les onto a bootable fl oppy and reboot your
system. Follow the Readme.txt to continue fl ashing the BIOS.
(
prevent possible system boot failure!)
*Warning: Do not shut down or reset the system while updating BIOS to
(http://www.supermicro.com/support/bios/). Please check our BIOS
Question: What's on the CD that came with my motherboard?
Answer: The supplied compact disc has quite a few drivers and programs that will
greatly enhance your system. We recommend that you review the CD and install the
applications you need. Applications on the CD include chipset drivers for Windows
and security and audio drivers.
3-3
Page 54
X6DH8-XB/X6DHE-XB User's Manual
3-4 Returning Merchandise for Service
A receipt or copy of your invoice marked with the date of purchase is required be-
fore any warranty service will be rendered. You can obtain service by calling your
vendor for a Returned Merchandise Authorization (RMA) number. When returning
to the manufacturer, the RMA number should be prominently displayed on the
outside of the shipping carton, and mailed prepaid or hand-carried. Shipping and
handling charges will be applied for all orders that must be mailed when service
is complete.
This warranty only covers normal consumer use and does not cover damages in-
curred in shipping or from failure due to the alternation, misuse, abuse or improper
maintenance of products.
During the warranty period, contact your distributor fi rst for any product problems.
3-4
Page 55
Chapter 4: BIOS
Chapter 4
BIOS
4-1 Introduction
This chapter describes the Phoenix BIOS™ Setup utility for the X6DH8-XB/X6DHE-
XB. The Phoenix ROM BIOS is stored in a fl ash chip and can be easily upgraded
using a fl oppy disk-based program.
Note: Due to periodic changes to the BIOS, some settings may have been added or
deleted and might not yet be recorded in this manual. Please refer to the Manual
Download area of the Supermicro web site at <http://www.supermicro.com> for any
changes to the BIOS that may not be refl ected in this manual.
System BIOS
The BIOS is the Basic Input Output System used in all IBM® PC, XT™, AT®, and
®
PS/2
compatible computers. The Phoenix BIOS stores the system parameters,
such as types of disk drives, video displays, etc. in the CMOS. The CMOS memory
requires very little electrical power. When the computer is turned off, a backup bat-
tery provides power to the CMOS Logic, enabling it to retain system parameters.
When the computer is powered-on, the computer is confi gured with the values
stored in the CMOS Logic by the system BIOS, which gains control at boot-up.
How To Change the Confi guration Data
The CMOS information that determines the system parameters may be changed by
entering the BIOS Setup utility. This Setup utility can be accessed by pressing the
<Delete> key at the appropriate time during system boot. (See below.)
Starting the Setup Utility
Normally, the only visible POST (Power On Self Test) routine is the memory test. As
the memory is being tested, press the <Delete> key to enter the main menu of the
BIOS Setup utility. From the main menu, you can access the other setup screens,
such as the Security and Power menus. Beginning with Section 4-3, detailed de-
scriptions are given for each parameter setting in the Setup utility.
Warning: Do not shut down or reset the system while updating BIOS
to prevent possible boot failure.
4-1
Page 56
X6DH8-XB/X6DHE-XB User's Manual
4-2 Running Setup
*Default settings are in bold text unless otherwise noted.
The BIOS setup options described in this section are selected by choosing
the appropriate text from the main BIOS Setup screen. All displayed text is
described in this section, although the screen display is often all you need to
understand how to set the options (see Page 4-3).
When you fi rst power on the computer, the Phoenix BIOS™ is immediately acti-
vated.
While the BIOS is in control, the Setup program can be activated in one of two
ways:
1. By pressing <Delete> immediately after turning the system on, or
2. When the message shown below appears briefl y at the bottom of the screen dur-
ing the POST (Power On Self-Test), press the <Delete> key to activate the main
Setup menu:
Press the <Delete> key to enter Setup
(*Note: Please load "System Setup Default" when using the system the fi rst
time.)
4-3 Main BIOS Setup
ʳ
All main Setup options are described in this section. The main BIOS Setup screen
is displayed below.
Use the Up/Down arrow keys to move among the different settings in each menu.
Use the Left/Right arrow keys to change the options for each setting.
Press the <Esc> key to exit the CMOS Setup Menu. The next section describes in
detail how to navigate through the menus.
Items that use submenus are indicated with the
press the <Enter> key to access the submenu.
icon. With the item highlighted,
4-2
Page 57
Main BIOS Setup Menu
Chapter 4: BIOS
Main Setup Features
System Time
To set the system date and time, key in the correct information in the appropriate
fi elds. Then press the <Enter> key to save the data.
System Date
Using the arrow keys, highlight the month, day, and year fi elds, and enter the correct
data. Press the <Enter> key to save the data.
BIOS Date
This fi eld displays the date when this version of BIOS was built.
4-3
Page 58
X6DH8-XB/X6DHE-XB User's Manual
Legacy Diskette A
This setting allows the user to set the type of fl oppy disk drive installed as diskette A.
The options are Disabled, 360Kb 5.25 in, 1.2MB 5.25 in, 720Kb 3.5 in, 1.44/1.25MB,
3.5 in, and 2.88MB 3.5 in.
Parallel ATA
This setting allows the user to enable or disable the function of Parallel ATA. The
options are Disabled, Channel 0, Channel 1, and Both.
Serial ATA
This setting allows the user to enable or disable the function of Serial ATA. The
options are Disabled and Enabled.
Serial ATA RAID Enable
Select Enable to enable Serial ATA RAID Functions. (*For the Windows OS
environment, use the RAID driver if this feature is set to Enabled. If set to Disabled,
use the Non-RAID driver.)
Native Mode Operation
Select the native mode for ATA. The options are: Parallel ATA, Serial ATA, Both,
and Auto.
IDE Channel 0 Master/Slave, IDE Channel 1 Master/Slave, IDE
Channel 2 Master, IDE Channel 3 Master
These settings allow the user to set the parameters of IDE Channel 0 Master/
Slave, IDE Channel 1 Master/Slave, IDE Channel 2 Master, IDE Channel 3 Master
slots. Hit <Enter> to activate the following sub-menu screen for detailed options
of these items. Set the correct confi gurations accordingly. The items included in
the sub-menu are:
4-4
Page 59
Chapter 4: BIOS
Type
This option allows the user to select the type of IDE hard drive. The option Auto
will allow the BIOS to automatically confi gure the parameters of the HDD installed
at the connection. Select IDE Removable to install an IDE removable device.
Select User to allow the user to enter the parameters of the HDD installed. Select
CDROM if a CDROM drive is installed. Select Other ATAPI if other type of ATAPI
device is installed. Select None if there is no IDE device installed.
CHS Format
The following items will be displayed by the BIOS:
TYPE: This item displays the type of IDE or SATA Devices.
Cylinders: This item indicates the status of Cylinders.
Headers: This item indicates the number of headers.
Sectors: This item displays the number of sectors.
Maximum Capacity: This item displays the maximum storage capacity of the
system.
4-5
Page 60
X6DH8-XB/X6DHE-XB User's Manual
LBA Format
The following items will be displayed by the BIOS:
Total Sectors: This item displays the number of total sectors available in the
LBA Format.
Maximum Capacity: This item displays the maximum capacity in the LBA
Format.
Multi-Sector Transfer
This item allows the user to specify the number of sectors per block to be
used in multi-sector transfer. The options are Disabled, 4 Sectors, 8 Sectors
and 16 Sectors.
LBA Mode Control
This item determines whether the Phoenix BIOS will access the IDE Channel 0
Master Device via the LBA mode. The options are Enabled and Disabled.
32 Bit I/O
This option allows the user to enable or disable the function of 32-bit data transfer.
The options are Enabled and Disabled.
Transfer Mode
Selects the transfer mode. The options are Standard, Fast PIO1, Fast PIO2,
Fast PIO3, Fast PIO4, FPIO3/DMA1 and FPIO4/DMA2.
Ultra DMA Mode
Selects Ultra DMA Mode. The options are Disabled, Mode 0, Mode 1, Mode
2, Mode 3, Mode 4 and Mode 5.
System Memory
This display informs you how much system memory is recognized as being present
in the system.
Extended Memory
This display informs you how much extended memory is recognized as being
present in the system.
4-6
Page 61
Chapter 4: BIOS
4-4 Advanced Setup
Choose Advanced from the Phoenix BIOS Setup Utility main menu with the arrow
keys. You should see the following display. The items with a triangle beside them
have sub menus that can be accessed by highlighting the item and pressing <Enter>.
Options for PIR settings are displayed by highlighting the setting option using the
arrow keys and pressing <Enter>. All Advanced BIOS Setup options are described
in this section.
Boot Features
Access the submenu to make changes to the following settings.
Quick Boot Mode
If enabled, this feature will speed up the POST (Power On Self Test) routine by
skipping certain tests after the computer is turned on. The settings are Enabled
and Disabled. If Disabled, the POST routine will run at normal speed.
Quiet Boot
This setting allows you to Enable or Disable the logo graphic during boot-up.
ACPI Mode
Use the setting to determine if you want to employ ACPI (Advanced Confi guration
and Power Interface) power management on your system. The options are
Yes and No.
4-7
Page 62
X6DH8-XB/X6DHE-XB User's Manual
Power Button Behavior
If set to Instant-Off, the system will power off immediately as soon as the user
hits the power button. If set to 4-sec, the system will power off when the user
presses the power button for 4 seconds or longer. The options are instant-off
and 4-sec override.
Resume On Modem Ring
Select On to “wake your system up” when an incoming call is received by
your modem. The options are On and Off.
Power Loss Control
This setting allows you to choose how the system will react when power returns
after an unexpected loss of power. The options are Stay Off, Power On, and
Last State.
Watch Dog
If enabled, this option will automatically reset the system if the system is not
active for more than 5 minutes. The options are Enabled and Disabled.
Summary Screen
This setting allows you to Enable or Disable the summary screen which displays
the system confi guration during bootup.
Memory Cache
Cache System BIOS Area
This setting allows you to designate a reserve area in the system memory to be
used as a System BIOS buffer to allow the BIOS to write (cache) data into this
reserved memory area. Select "Write Protect" to enable this function, and this
area will be reserved for BIOS ROM access only. Select "Uncached" to disable
this function and make this area available for other devices.
Cache Video BIOS Area
This setting allows you to designate a reserve area in the system memory to be
used as a Video BIOS buffer to allow the BIOS to write (cache) data into this
reserved memory area. Select "Write Protect" to enable the function and this
area will be reserved for Video BIOS ROM access only. Select "Uncached" to
disable this function and make this area available for other device.
Cache Base 0-512K
If enabled, this feature will allow the data stored in the base memory area:
block 0-512K to be cached (written) into a buffer, a storage area in the Static
DRM (SDROM) or to be written into L1, L2 cache inside the CPU to speed
up CPU operations. Select "Uncached" to disable this function. Select "Write
Through" to allow data to be cached into the buffer and written into the system
4-8
Page 63
Chapter 4: BIOS
memory at the same time. Select "Write Protect" to prevent data from being
written into the base memory area of Block 0-512K. Select "Write Back" to allow
the CPU to write data back directly from the buffer without writing data to the
System Memory to speed up CPU data processing and operation. The options
are "Uncached", "Write Through", "Write Protect", and "Write Back".
Cache Base 512K-640K
If enabled, this feature will allow the data stored in the memory area: 512K-640K
to be cached (written) into a buffer, a storage area in the Static DRM (SDROM)
or written into L1, L2, L3 cache inside the CPU to speed up CPU operations.
Select "Uncached" to disable this function. Select "Write Through" to allow data
to be cached into the buffer and written into the system memory at the same
time. Select "Write Protect" to prevent data from being written into the base
memory area of Block 512K-640K. Select "Write Back" to allow the CPU to write
data back directly from the buffer without writing data to the System Memory for
to speed up CPU data processing and operation. The options are "Uncached",
"Write Through", "Write Protect", and "Write Back".
Cache Extended Memory Area
If enabled, this feature will allow the data stored in the extended memory area
to be cached (written) into a buffer, a storage area in the Static DRM (SDROM)
or written into L1, L2, L3 cache inside the CPU to speed up CPU operations.
Select "Uncached" to disable this function. Select "Write Through" to allow data
to be cached into the buffer and written into the system memory at the same
time. Select "Write Protect" to prevent data from being written into the extended
memory area above 1 MB. Select "Write Back" to allow the CPU to write data
back directly from the buffer without writing data to the System Memory for
fast CPU data processing and operation. The options are "Uncached", "Write
Through", "Write Protect", and "Write Back".
Discrete MTRR Allocation
If enabled, MTRRs (-Memory Type Range Registers) are confi gured as distinct,
separate units and cannot be overlapped. If enabled, the user can achieve
better graphic effects when using a Linux graphic driver that requires the write-
combining confi guration with a memory size of 4GB or more. The options are
Enabled and Disabled.
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PCI Confi guration
Access the submenu to make changes to the following settings for PCI devices.
Onboard GLAN1/GLAN2 (Gigabit- LAN) OPROM Confi gure
Enabling this option provides the capability to boot from GLAN1/GLAN2. The
options are Disabled and Enabled.
Onboard SCSI OPROM Confi gure
Enabling this option provides the capitally to boot from SCSI HDD. The options
are Disabled and Enabled.
Default Primary Video Adapter
This item allows the user to select the Primary Video Adapter between two adapters
instead of selecting among three or more adapters. The options are Other and
Onboard Video.
PCI Parity Error Forwarding
Enable this item to forward the PCI errors occurring behind P2P bridges to the
South Bridge, so NMI can be asserted. The options are Enabled and Disabled.
ROM Scan Ordering
This feature allows the user to decide which Option ROM to be activated fi rst. The
options are Onboard fi rst and Add-On fi rst.
Reset Confi guration Data
If set to Yes, this setting clears the Extended System Confi guration Data- (ESCD)
area. The options are Yes and No.
Frequency for PCI-X Slot#1-Slot#2
This option allows the user to change the bus frequency for the devices installed
in the slot indicated. The options are Auto, PCI 33 MHz, PCI 66 MHz, PCI-X 66
MHz, PCI-X 100 MHz, and PCI-X 133 MHz.
Frequency for PCI-X Slot#3, Slot#6
This option allows the user to change the bus frequency for the devices installed
in the slot indicated. The options are Auto, PCI 33 MHz, PCI 66 MHz, PCI-X 66
MHz, PCI-X 100 MHz, and PCI-X 133 MHz.
Frequency for PCI-X Slot#4-Slot#5/SCSI
This option allows the user to change the bus frequency for the devices installed
in the slot indicated. The options are Auto, PCI 33 MHz, PCI 66 MHz, PCI-X 66
MHz, PCI-X 100 MHz, and PCI-X 133 MHz.
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Chapter 4: BIOS
PCI-X 100MHz Slot#1-Slot#2, PCI-X 133MHz Slot #3, PCI-X 100MHz
ZCR Slot#4, PCI-X 100MHz Slot#5, PCI-X 100MHz Slot #6
Access the submenu for each of the settings above to make changes to the
following:
Option ROM Scan
When enabled, this setting will initialize the device expansion ROM. The options
are Enabled and Disabled.
Enable Master
This setting allows you to enable the selected device as the PCI bus master. The
options are Enabled and Disabled.
Latency Timer
This setting allows you to set the clock rate for Bus Master. A high-priority, high-
throughout device may benefi t from a greater clock rate. The options are Default,
0020h, 0040h, 0060h, 0080h, 00A0h, 00C0h, and 00E0h. For Unix, Novell and
other Operating Systems, please select the option: other. If a drive fails after the
installation of a new software , you might want to change this setting and try again.
A different OS requires a different Bus Master clock rate.
Large Disk Access Mode
This setting determines how large hard drives are to be accessed. The options are
DOS or Other (for Unix, Novelle NetWare and other operating systems).
Advanced Chipset Control
Access the submenu to make changes to the following settings.
Force Compliance Mode
This feature allows you to enable the PCI-Express Compliance Mode. The options
are: Disabled or Enabled.
Memory RAS Feature Control
Select this option in order to enable the special feature of DIMM sparing or memory
mirroring. The options are Mirroring, Sparing and Standard.
Clock Spectrum Feature
If "Enabled", the BIOS will monitor the level of Electromagnetic Interference caused
by the components and will attempt to decrease the interference whenever needed.
The options are Enabled and Disabled.
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Memory Remap Function Control
PCI memory resources will overlap with the physical memory if 4GB of memory or
above is installed on the motherboard. When this occurs, enable this function to
reallocate the overlapped physical memory to a location above 4GB to resolve the
memory overlapping situation.
DRAM Data Integrity Mode
If enabled, this feature allows the data stored in the DRMA memory to be integrated
for faster data processing. The options are 72-bit ECC, 144-bit ECC, Auto and
Disabled.
ECC Error Type
This setting lets you select which type of interrupt to be activated as a result of an
ECC error. The options are None, NMI (Non-Maskable Interrupt), SMI (System
Management Interrupt), and SCI (System Control Interrupt.)
SERR Signal Condition
This setting specifi es the ECC Error conditions that an SERR# is to be asserted.
The options are None, Single Bit, Multiple Bit, and Both.
Enabling Multi-Media Timer
Select Yes to activate a set of timers that are alternative to the traditional 8254
timers for the OS use. The options are Yes and No.
USB Function
Select Enabled to enable the function of USB devices specifi ed. The settings are
Enabled and Disabled.
Legacy USB Support
This setting allows you to enable support for Legacy USB devices. The settings
are Enabled and Disabled.
Advanced Processor Options
Access the submenu to make changes to the following settings.
CPU Speed
This is a display that indicates the speed of the installed processor.
Hyper-threading (*Available when supported by the CPU.)
Set to Enabled to use the Hyper-Threading Technology, which will result in increased
CPU performance. The options are Disabled and Enabled.
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Chapter 4: BIOS
Machine Checking (*Available when supported by the CPU.)
Set to Enabled to activate the function of Machine Checking and allow the CPU to
detect and report hardware (machine) errors via a set of model-specifi c registers
(MSRs). The options are Disabled and Enabled.
C1 Enhanced Mode (*Available when supported by the CPU.)
Set to Enabled to enable Enhanced Halt State to lower CPU voltage/frequency to
prevent overheat. The options are Enabled and Disabled. (*Note: please refer
to Intel’s web site for detailed information.)
No Execute Mode Memory Protection (*Available when supported by the
CPU and the OS.)
Set to Enabled to enable Execute Disable Bit and allow the processor to classify
areas in memory where an application code can execute and where it cannot, and
thus preventing a worm or a virus from inserting and creating a fl ood of codes to
overwhelm the processor or damage the system during an attack.
(*Note: this feature is available when your OS and your CPU support the function
of Execute Disable Bit.) The options are Disabled and Enabled. (Note: For more
information regarding hardware/software support for this function, please refer to
Intel's and Microsoft's web sites.)
Thermal Management 2 (*Available when supported by the CPU.)
Set to Enabled to use Thermal Management 2 (TM2) which will lower the CPU
voltage and frequency when the CPU temperature reaches a predefi ned overheat
threshold. Set to Disabled to use Thermal Manager 1 (TM1), allowing CPU clocking
to be regulated via the CPU Internal Clock modulation when the CPU temperature
reaches the overheat threshold.
Adjacent Cache Line Prefetch (*Available when supported by the CPU.)
The CPU fetches the cache line for 64 bytes if this option is set to Disabled. The
CPU fetches both cache lines for 128 bytes as comprised if Enabled. The options
are Disabled and Enabled.
Processor Power Management
This feature allows the user to determine the processor power management mode.
The options are Disabled and C States Only. If set to Disabled, C States and
GV1/GV3 are disabled. If set to C States only, the processor power will be controlled
through CPU power states in the APCI setting.
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I/O Device Confi guration
Access the submenu to make changes to the following settings.
KBC Clock Input
This setting allows you to select clock frequency for KBC. The options are 6MHz,
8MHz, 12MHz and 16MHz.
Onboard COM 1
This setting allows you to assign control of serial port A. The options are Enabled
(user defi ned), Disabled, and Auto (BIOS- or OS- controlled).
Base I/O Address
Select the base I/O address for serial port A. The options are 3F8, 2F8,
3E8 and 2E8.
Interrupt
Select the IRQ (interrupt request) for serial port A. The options are IRQ3
and IRQ4.
Onboard COM 2
This setting allows you to assign control of serial port B. The options are Enabled
(user defi ned), Disabled, Auto (BIOS controlled) and OS Controlled.
Mode
Specify the type of device that will be connected to serial port B. The options
are Normal, and IR (for an infrared device).
Base I/O Address
Select the base I/O address for serial port B. The options are 3F8, 2F8,
3E8 and 2E8.
Interrupt
Select the IRQ (interrupt request) for serial port B. The options are IRQ3
and IRQ4.
Floppy Disk Controller
This setting allows you to assign control of the fl oppy disk controller. The options
are Enabled (user defi ned), Disabled, and Auto (BIOS and OS controlled).
Base I/O Address
Select the base I/O address for the parallel port. The options are Primary
and Secondary.
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Chapter 4: BIOS
DMI Event Logging
Access the submenu to make changes to the following settings.
Event Log Validity
This is a display to inform you of the event log validity. It is not a setting.
Event Log Capacity
This is a display to inform you of the event log capacity. It is not a setting.
View DMI Event Log
Highlight this item and press <Enter> to view the contents of the event log.
Event Logging
This setting allows you to Enable or Disable event logging.
ECC Event Logging
This setting allows you to Enable or Disable ECC event logging.
Mark DMI Events as Read
Highlight this item and press <Enter> to mark the DMI events as read.
Clear All DMI Event Logs
Select Yes and press <Enter> to clear all DMI event logs. The options are Yes
and No.
Console Redirection
Access the submenu to make changes to the following settings.
COM Port Address
This item allows you to specify which COM port to direct the remote console to:
Onboard COM A or Onboard COM B. This setting can also be Disabled.
BAUD Rate
This item allows you to set the BAUD rate for Console Redirection. The options
are 300, 1200, 2400, 9600, 19.2K, 38.4K, 57.6K, and 115.2K.
Console Type
This item allows you to choose the console redirection type. The options are VT100,
VT100,8bit, PC-ANSI, 7bit, PC ANSI, VT100+,
Flow Control
This item allows you to set the fl ow control for the console redirection. The options
are: None, XON/XOFF, and CTS/RTS.
and VT-UTF8.
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Console Connection
This item allows you to decide how the console redirection is to be connected:
either Direct or Via Modem.
Continue CR after POST
This item allows you to decide whether you want to continue with console redirection
after POST routines. The options are On and Off.
Hardware Monitor Logic
CPU Temperature Threshold
This option allows the user to set a CPU temperature threshold that will activate the
alarm system when the CPU temperature reaches this pre-set temperature threshold.
The options are 70
Highlight this and hit <Enter> to see monitor data for the following items:
CPU1 Temperature: This item displays CPU1 Temperature.
CPU2 Temperature: This item displays CPU2 Temperature.
o
C, 75oC, 80oC and 85oC. (*See the note below.)
System Temperature: This item displays the System Temperature.
Fan Speed Control Modes
This feature allows the user to decide how the system controls the speeds of the
onboard fans. The CPU temperature and the fan speed are correlative. When the
CPU on-die temperature increases, the fan speed will also increase, and vice versa.
If the option is set to “3-pin fan”, the fan speed is controlled by the voltage. If the
option is set to “4-pin”, the fan speed will be controlled by the Pulse Width Modulation
(PWM). Select “3-pin” if your chassis came with 3-pin fan headers. Select “4-pin”
if your chassis came with 4-pin fan headers. Select “Workstation” if your system is
used as a Workstation. Select “Server” if your system is used as a Server. Select
“Disable” to disable the fan speed control function to allow the onboard fans to
constantly run at full speed (12V). The Options are: 1. Disable, 2. 3-pin (Server),
3. 3-pin (Workstation), 4. 4-pin (Server) and 5. 4-pin (Workstation).
Fan 1-FAN6/Fan7 (CPU Fan1)/Fan 8 (CPU Fan2): If the feature of Auto Fan Control
is enabled, the BIOS will automatically display the status of the fans indicated in
this item.
*Note: In the Windows OS environment, the Supero Doctor III settings take pre-
cedence over the BIOS settings. When fi rst installed, Supero Doctor III adopts the
temperature threshold settings previously set in the BIOS. Any subsequent changes
to these thresholds must be made within Supero Doctor, since the SD III settings
override the BIOS settings. For the Windows OS to adopt the BIOS temperature
threshold settings, please change the SDIII settings to be the same as those set
in the BIOS.
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Chapter 4: BIOS
Voltage Monitoring
The following items will be monitored and displayed:
Vcore A/Vcore B: These items display the Voltage status of CPU A and CPU B.
P3V3: This item displays the +3.3V voltage status.
P5V: This item displays the +5V voltage status.
N12V: This item displays the -12V voltage status.
P12V: This item displays the +12V voltage status.
VDD: This item displays the VDD status.
P5Vsb: This item displays the voltage status of +5V Standby power.
4-5 Security
Choose Security from the Phoenix BIOS Setup Utility main menu with the arrow
keys. You should see the following display. Security setting options are displayed by
highlighting the setting using the arrow keys and pressing <Enter>. All Security BIOS
settings are described in this section.
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Supervisor Password Is:
This feature indicates if a supervisor password has been entered to the system.
Clear means such a password has not been used, and Set means a supervisor
password has been entered.
User Password Is:
This feature indicates if a user password has been entered to the system. Clear
means such a password has not been used, and Set means a user password has
been entered.
Set Supervisor Password
When this item is highlighted, hit the <Enter> key. When prompted, type the
Supervisor's password in the dialogue box to set or to change supervisor's password
to allow access to the BIOS.
Set User Password
When the item is highlighted, hit the <Enter> key. When prompted, type the user's
password in the dialogue box to set or to change the user's password, which will
allow access to the system at boot-up.
Password on Boot
This setting allows you to determine if a password is required for a user to enter
the system at bootup. The options are Enabled (password required) and Disabled
(password not required).
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Chapter 4: BIOS
4-6 Boot
Choose Boot from the Phoenix BIOS Setup Utility main menu with the arrow keys.
You should see the following display. Highlighting a setting with a + or - will expand
or collapse that entry. See details on how to change the order and specs of boot
devices in the Item Specifi c Help window. All Boot BIOS settings are described in
this section.
+Removable Devices
Highlight and press <Enter> to expand the fi eld. See details on how to change the
order and specs of devices in the Item Specifi c Help window.
CDROM Drive
See details on how to change the order and specs of the CDROM drive in the Item
Specifi c Help window.
+Hard Drive
Highlight and press <Enter> to expand the fi eld. See details on how to change the
order and specs of hard drives in the Item Specifi c Help window.
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4-7 Exit
Choose Exit from the Phoenix BIOS Setup Utility main menu with the arrow keys.
You should see the following display. All Exit BIOS settings are described in this
section.
Exit Saving Changes
Highlight this item and hit <Enter> to save any changes you made and to exit the
BIOS Setup utility.
Exit Discarding Changes
Highlight this item and hit <Enter> to exit the BIOS Setup utility without saving any
changes you may have made.
Load Setup Defaults
Highlight this item and hit <Enter> to load the default settings for all items in the
BIOS Setup. These are the safest settings to use.
Discard Changes
Highlight this item and hit <Enter> to discard (cancel) any changes you made.
You will remain in the Setup utility.
Save Changes
Highlight this item and hit <Enter> to save any changes you made. You will remain
in the Setup utility.
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Appendix A: BIOS POST Messages
Appendix A
BIOS POST Messages
During the Power-On Self-Test (POST), the BIOS will check for problems. If a prob-
lem is found, the BIOS will activate an alarm or display a message. The following is
a list of such BIOS messages.
Failure Fixed Disk
Fixed disk is not working or not confi gured properly. Check to see if fi xed disk is at-
tached properly. Run Setup. Find out if the fi xed-disk type is correctly identifi ed.
Stuck key
Stuck key on keyboard.
Keyboard error
Keyboard not working.
Keyboard Controller Failed
Keyboard controller failed test. May require replacing keyboard controller.
Keyboard locked - Unlock key switch
Unlock the system to proceed.
Monitor type does not match CMOS - Run SETUP
Monitor type not correctly identifi ed in Setup
Shadow Ram Failed at offset: nnnn
Shadow RAM failed at offset nnnn of the 64k block at which the error was de-
tected.
System RAM Failed at offset: nnnn
System RAM failed at offset nnnn of in the 64k block at which the error was de-
tected.
Extended RAM Failed at offset: nnnn
Extended memory notworking or not confi gured properly at offset nnnn.
System battery is dead - Replace and run SETUP
The CMOS clock battery indicator shows the battery is dead. Replace the battery and
run Setup to reconfi gure the system.
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System CMOS checksum bad - Default confi guration used
System CMOS has been corrupted or modifi ed incorrectly, perhaps by an application
program that changes data stored in CMOS. The BIOS installed Default Setup Values.
If you do not want these values, enter Setup and enter your own values. If the error
persists, check the system battery or contact your dealer.
System timer error
The timer test failed. Requires repair of system board.
Real time clock error
Real-Time Clock fails BIOS hardware test. May require board repair.
Check date and time settings
BIOS found date or time out of range and reset the Real-Time Clock. May require
setting legal date (1991-2099).
Previous boot incomplete - Default confi guration used
Previous POST did not complete successfully. POST loads default values and offers
to run Setup. If the failure was caused by incorrect values and they are not corrected,
the next boot will likely fail. On systems with control of wait states, improper Setup
settings can also terminate POST and cause this error on the next boot. Run Setup
and verify that the waitstate confi guration is correct. This error is cleared the next
time the system is booted.
Memory Size found by POST differed from CMOS
Memory size found by POST differed from CMOS.
Diskette drive A error
Diskette drive B error
Drive A: or B: is present but fails the BIOS POST diskette tests. Check to see that
the drive is defi ned with the proper diskette type in Setup and that the diskette drive
is attached correctly.
Incorrect Drive A type - run SETUP
Type of fl oppy drive A: not correctly identifi ed in Setup.
Incorrect Drive B type - run SETUP
Type of fl oppy drive B: not correctly identifi ed in Setup.
System cache error - Cache disabled
RAM cache failed and BIOS disabled the cache. On older boards, check the cache
jumpers. You may have to replace the cache. See your dealer. A disabled cache slows
system performance considerably.
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Appendix A: BIOS POST Messages
CPU ID:
CPU socket number for Multi-Processor error.
EISA CMOS not writeable
ServerBIOS2 test error: Cannot write to EISA CMOS.
DMA Test Failed
ServerBIOS2 test error: Cannot write to extended DMA (Direct Memory Access)
registers.
Software NMI Failed
ServerBIOS2 test error: Cannot generate software NMI (Non-Maskable Interrupt).
Fail-Safe Timer NMI Failed
ServerBIOS2 test error: Fail-Safe Timer takes too long.
device Address Confl ict
Address confl ict for specifi ed device.
Allocation Error for: device
Run ISA or EISA Confi guration Utility to resolve resource confl ict for the specifi ed
device.
CD ROM Drive
CD ROM Drive identifi ed.
Entering SETUP ...
Starting Setup program
Failing Bits: nnnn
The hex number nnnn is a map of the bits at the RAM address which failed the memory
test. Each 1 (one) in the map indicates a failed bit. See errors 230, 231, or 232 above
for offset address of the failure in System, Extended, or Shadow memory.
Fixed Disk n
Fixed disk n (0-3) identifi ed.
Invalid System Confi guration Data
Problem with NVRAM (CMOS) data.
I/O device IRQ confl ict
I/O device IRQ confl ict error.
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PS/2 Mouse Boot Summary Screen:
PS/2 Mouse installed.
nnnn kB Extended RAM Passed
Where nnnn is the amount of RAM in kilobytes successfully tested.
nnnn Cache SRAM Passed
Where nnnn is the amount of system cache in kilobytes successfully tested.
nnnn kB Shadow RAM Passed
Where nnnn is the amount of shadow RAM in kilobytes successfully tested.
nnnn kB System RAM Passed
Where nnnn is the amount of system RAM in kilobytes successfully tested.
One or more I2O Block Storage Devices were excluded from the Setup Boot
Menu
There was not enough room in the IPL table to display all installed I2O block-storage
devices.
Operating system not found
Operating system cannot be located on either drive A: or drive C:. Enter Setup and
see if fi xed disk and drive A: are properly identifi ed.
Parity Check 1 nnnn
Parity error found in the system bus. BIOS attempts to locate the address and display
it on the screen. If it cannot locate the address, it displays ????. Parity is a method
for checking errors in binary data. A parity error indicates that some data has been
corrupted.
Parity Check 2 nnnn
Parity error found in the I/O bus. BIOS attempts to locate the address and display it
on the screen. If it cannot locate the address, it displays ????.
Press <F1> to resume, <F2> to Setup, <F3> for previous
Displayed after any recoverable error message. Press <F1> to start the boot process
or <F2> to enter Setup and change the settings. Press <F3> to display the previous
screen (usually an initialization error of an Option ROM, i.e., an add-on card). Write
down and follow the information shown on the screen.
Press <F2> to enter Setup
Optional message displayed during POST. Can be turned off in Setup.
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Appendix A: BIOS POST Messages
PS/2 Mouse:
PS/2 mouse identifi ed.
Run the I2O Confi guration Utility
One or more unclaimed block storage devices have the Confi guration Request bit set
in the LCT. Run an I2O Confi guration Utility (e.g. the SAC utility).
System BIOS shadowed
System BIOS copied to shadow RAM.
UMB upper limit segment address: nnnn
Displays the address nnnn of the upper limit of Upper Memory Blocks, indicating
released segments of the BIOS which can be reclaimed by a virtual memory man-
ager.
Video BIOS shadowed
Video BIOS successfully copied to shadow RAM.
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Notes
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Appendix B: BIOS POST Codes
Appendix B
BIOS POST Codes
This section lists the POST (Power On Self Test) codes for the PhoenixBIOS. POST
codes are divided into two categories: recoverable and terminal.
Recoverable POST Errors
When a recoverable type of error occurs during POST, the BIOS will display an
POST code that describes the problem. BIOS may also issue one of the follow-
ing beep codes:
1 long and two short beeps - video confi guration error
1 repetitive long beep - no memory detected
Terminal POST Errors
If a terminal type of error occurs, BIOS will shut down the system. Before doing so,
BIOS will write the error to port 80h, attempt to initialize video and write the error
in the top left corner of the screen.
The following is a list of codes that may be written to port 80h.
POST Code Description
02h Verify Real Mode
03h Disable Non-Maskable Interrupt (NMI)
04h Get CPU type
06h Initialize system hardware
07h Disable shadow and execute code from the ROM.
08h Initialize chipset with initial POST values
09h Set IN POST fl ag
0Ah Initialize CPU registers
0Bh Enable CPU cache
0Ch Initialize caches to initial POST values
0Eh Initialize I/O component
0Fh Initialize the local bus IDE
10h Initialize Power Management
11h Load alternate registers with initial POST values
12h Restore CPU control word during warm boot
13h Initialize PCI Bus Mastering devices
14h Initialize keyboard controller
16h 1-2-2-3 BIOS ROM checksum
17h Initialize cache before memory Auto size
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POST Code Description
18h 8254 timer initialization
1Ah 8237 DMA controller initialization
1Ch Reset Programmable Interrupt Controller
20h 1-3-1-1 Test DRAM refresh
22h 1-3-1-3 Test 8742 Keyboard Controller
24h Set ES segment register to 4 GB
28h Auto size DRAM
29h Initialize POST Memory Manager
2Ah Clear 512 kB base RAM
2Ch 1-3-4-1 RAM failure on address line xxxx*
2Eh 1-3-4-3 RAM failure on data bits xxxx* of low byte of
memory bus
2Fh Enable cache before system BIOS shadow
32h Test CPU bus-clock frequency
33h Initialize Phoenix Dispatch Manager
36h Warm start shut down
38h Shadow system BIOS ROM
3Ah Auto size cache
3Ch Advanced confi guration of chipset registers
3Dh Load alternate registers with CMOS values
41h Initialize extended memory for RomPilot
42h Initialize interrupt vectors
45h POST device initialization
46h 2-1-2-3 Check ROM copyright notice
47h Initialize I20 support
48h Check video confi guration against CMOS
49h Initialize PCI bus and devices
4Ah Initialize all video adapters in system
4Bh QuietBoot start (optional)
4Ch Shadow video BIOS ROM
4Eh Display BIOS copyright notice
4Fh Initialize MultiBoot
50h Display CPU type and speed
51h Initialize EISA board
52h Test keyboard
54h Set key click if enabled
55h Enable USB devices
58h 2-2-3-1 Test for unexpected interrupts
59h Initialize POST display service
5Ah Display prompt “Press F2 to enter SETUP”
5Bh Disable CPU cache
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Appendix B: BIOS POST Codes
POST Code Description
5Ch Test RAM between 512 and 640 kB
60h Test extended memory
62h Test extended memory address lines
64h Jump to UserPatch1
66h Confi gure advanced cache registers
67h Initialize Multi Processor APIC
68h Enable external and CPU caches
69h Setup System Management Mode (SMM) area
6Ah Display external L2 cache size
6Bh Load custom defaults (optional)
6Ch Display shadow-area message
6Eh Display possible high address for UMB recovery
70h Display error messages
72h Check for confi guration errors
76h Check for keyboard errors
7Ch Set up hardware interrupt vectors
7Dh Initialize Intelligent System Monitoring
7Eh Initialize coprocessor if present
80h Disable onboard Super I/O ports and IRQs
81h Late POST device initialization
82h Detect and install external RS232 ports
83h Confi gure non-MCD IDE controllers
84h Detect and install external parallel ports
85h Initialize PC-compatible PnP ISA devices
86h Re-initialize onboard I/O ports.
87h Confi gure Motherboard Confi gurable Devices
(optional)
88h Initialize BIOS Data Area
89h Enable Non-Maskable Interrupts (NMIs)
8Ah Initialize Extended BIOS Data Area
8Bh Test and initialize PS/2 mouse
8Ch Initialize fl oppy controller
8Fh Determine number of ATA drives (optional)
90h Initialize hard-disk controllers
91h Initialize local-bus hard-disk controllers
92h Jump to UserPatch2
93h Build MPTABLE for multi-processor boards
95h Install CD ROM for boot
96h Clear huge ES segment register
97h Fix up Multi Processor table
98h 1-2 Search for option ROMs. One long, two short
beeps on checksum failure
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POST Code Description
99h Check for SMART Drive (optional)
9Ah Shadow option ROMs
9Ch Set up Power Management
9Dh Initialize security engine (optional)
9Eh Enable hardware interrupts
9Fh Determine number of ATA and SCSI drives
A0h Set time of day
A2h Check key lock
A4h Initialize typematic rate
A8h Erase F2 prompt
AAh Scan for F2 key stroke
ACh Enter SETUP
AEh Clear Boot fl ag
B0h Check for errors
B1h Inform RomPilot about the end of POST.
B2h POST done - prepare to boot operating system
B4h 1 One short beep before boot
B5h Terminate QuietBoot (optional)
B6h Check password (optional)
B7h Initialize ACPI BIOS
B9h Prepare Boot
BAh Initialize SMBIOS
BBh Initialize PnP Option ROMs
BCh Clear parity checkers
BDh Display MultiBoot menu
BEh Clear screen (optional)
BFh Check virus and backup reminders
C0h Try to boot with INT 19
C1h Initialize POST Error Manager (PEM)
C2h Initialize error logging
C3h Initialize error display function
C4h Initialize system error handler
C5h PnPnd dual CMOS (optional)
C6h Initialize note dock (optional)
C7h Initialize note dock late
C8h Force check (optional)
C9h Extended checksum (optional)
CAh Redirect Int 15h to enable remote keyboard
CBh Redirect Int 13h to Memory Technologies
Devices such as ROM, RAM, PCMCIA, and
serial disk
CCh Redirect Int 10h to enable remote serial video
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Appendix B: BIOS POST Codes
POST Code Description
CDh Re-map I/O and memory for PCMCIA
CEh Initialize digitizer and display message
D2h Unknown interrupt
The following are for boot block in Flash ROM
POST Code Description
E0h Initialize the chipset
E1h Initialize the bridge
E2h Initialize the CPU
E3h Initialize system timer
E4h Initialize system I/O
E5h Check force recovery boot
E6h Checksum BIOS ROM
E7h Go to BIOS
E8h Set Huge Segment
E9h Initialize Multi Processor
EAh Initialize OEM special code
EBh Initialize PIC and DMA
ECh Initialize Memory type
EDh Initialize Memory size
EEh Shadow Boot Block
EFh System memory test
F0h Initialize interrupt vectors
F1h Initialize Run Time Clock
F2h Initialize video
F3h Initialize System Management Manager
F4h Output one beep
F5h Clear Huge Segment
F6h Boot to Mini DOS
F7h Boot to Full DOS
*If the BIOS detects errors on 2C, 2E, or 30 (base 512K RAM error), it displays an
additional word-bitmap (xxxx) indicating the address line or bits that have failed. For
example, “2C 0002” means address line 1 (bit one set) has failed. “2E 1020" means
data bits 12 and 5 (bits 12 and 5 set) have failed in the lower 16 bits. The BIOS also
sends the bitmap to the port-80 LED display. It fi rst displays the checkpoint code,
followed by a delay, the high-order byte, another delay, and then the loworder byte of
the error. It repeats this sequence continuously.
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Notes
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Appendix C: Software Installation Instructions
Appendix C
Installing Software Drivers and Windows Operating
System
After all the hardware has been installed, you must fi rst confi gure the Adaptec
Embedded Serial ATA RAID Driver before you install the Windows operating system.
The necessary drivers are all included on the Supermicro bootable CDs that came
packaged with your motherboard.
C-1 Introduction to the Adaptec Embedded Serial ATA RAID
Controller Driver
Serial ATA (SATA)
Serial ATA(SATA) is a physical storage interface. It uses a single cable with a
minimum of four wires to create a point-to-point connection between devices. It
is a serial link which supports SATA Transfer rates from 150MBps. Because the
serial cables used in SATA are thinner than the traditional cables used in Paral-
lel ATA(PATA), SATA systems have better airfl ow and can be installed in smaller
chassis than Parallel ATA. In addition, the cables used in PATA can only extend
to 40cm long, while Serial ATA cables can extend up to one meter. Overall, Serial
ATA provides better functionality than Parallel ATA.
Introduction to the Intel ICH5R I/O Controller Hub
Located in the South Bridge of the Intel E7520 (Lindenhurst) Chipset, the ICH5R
I/O Controller Hub provides the I/O subsystem with access to the rest of the sys-
tem. It supports 2-channel Ultra ATA/100 Bus Master IDE controller (PATA) and
two Serial ATA (SATA) Host Controllers, which support up to two Serial ATA ports
and up to two RAID drives.
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Confi guring BIOS settings for the SATA RAID Functions
1. Press the <Del> key during system bootup to enter the BIOS Setup Utility.
(*Note: If it is the fi rst time to power on the system, we recommend that you load the
Optimized Default Settings. If you have already done so, please skip to Step 3.
2. Use the arrow keys to select the "Exit" Menu. Once in the "Exit" Menu, scroll
down the menu to select the item- "Load Optimized Default settings" and press the
<Enter> key. Select "OK" to confi rm the selection. Press the <Enter> key to load
the default settings to the BIOS.
3. Use the arrow keys to select the "Main" Menu in the BIOS.
4. Scroll down to the next item-"SATA RAID Enable", select "Enabled" and press
<Enter>.
5. Tap the <Esc> key and scroll down to "Exit". Select "Save and Exit" from the
"Exit" menu. Press the <Enter> key to save the changes and exit the BIOS.
6. Once you've exited the BIOS Utility, the system will re-boot.
7. During the system startup, press the <Ctrl> and the <A> keys simultaneously to
run the Adaptec RAID Confi guration Utility when prompted by the following mes-
sage:
Press <Ctrl><A> for the Adaptec RAID Confi guration Utility.
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Appendix C: Software Installation Instructions
The Adaptec Embedded Serial ATA with HostRAID Controller
Driver
Adaptec's Embedded Serial ATA RAID with HostRAID controller adds RAID func-
tionality to the Serial ATA I/O controller by supporting RAID 0 (Striping) or RAID
1 (Mirroring) to enhance the industry's pioneer PCI-to-e host controller products.
RAID striping (RAID 0) can greatly improve hard disk I/O performance because of
its capability in striping data across multiple drives. RAID mirroring (RAID 1) allows
the data to be simultaneously written to two drives, so critical data is always avail-
able even if a single hard disk fails. Due to the built-in functionality, the X6DH8-
XB/X6DHE-XB is specially designed to keep pace with the increasing performance
demands of computer systems by improving disk I/O throughput and providing data
accessibility regardless of a single disk failure. By incorporating the Adaptec Embed-
ded Serial ATA into the motherboard design, Supermicro's X6DH8-XB/X6DHE-XB
offers the user with the benefi ts of SATARAID without the high costs associated
with hardware RAID applications.
(*Note: For Adaptec's RAID Driver Installation Instructions, please refer to the
Adaptec RAID Controller User's Guide: "Emb_SA_RAID_UG.pdf" in the CD that
came with this motherboard. You can also download a copy of Adaptec's User's
Guide from our web site at www.supermicro.com.)
Using the Adaptec RAID Confi guration Utility (ARC)
The Adaptec RAID Confi guration Utility is an embedded BIOS Utility, including:
*Array Confi guration Utility: Use this utility when you want to create, confi gure and
manage arrays.
* Disk Utilities: Use this option to format or verify disks.
To run the Adaptec RAID Confi guration Utility, you will need to enable the RAID
function in the system BIOS (refer to Chapter 4 for System BIOS Confi gurations),
and then, press the <Ctrl> and <A> keys simultaneously when prompted to do so
during the system startup. (Refer to the previous page for detailed instructions.)
(*Note: To select an option, use the arrow keys to highlight the item and then press
the <Enter> key to select it. To return to the previous menu, press the <ESC>
key.)
A. Using the Array Confi guration Utility (ACU)
The Array Confi guration Utility (ACU) enables you to create, manage, and delete
arrays from the controller’s BIOS, add and delete spare drives, and initialize drives.
During the system startup, press <Ctrl> and <A> key simultaneously, and the main
menu will appear.
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Managing Arrays
Select this option to view array properties, and delete arrays. The following sections
describe the operations Of "Managing Arrays".
To select this option,
Arrays" from the main menu (as shown above).
use the arrow keys and the <enter> key to select "Managing
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Appendix C: Software Installation Instructions
Viewing Array Properties
To view the properties of an existing array:
1. At the BIOS prompt, press Ctrl+A.
2. From the ARC menu, select Array Confi guration Utility (ACU).
3. From the ACU menu, select Manage Arrays (as shown on the previous
screen.)
4. From the List of Arrays dialog box, select the array you want to view and press
Enter.
The Array Properties dialog box appears, showing detailed information on the array.
The physical disks associated with the array are displayed here.
5. Press Esc to return to the previous menu.
Deleting Arrays
*Warning: Back up the data on an array before you delete it to prevent the loss of
data. Deleted arrays cannot be restored.
To delete an existing array:
1. Turn on your computer and press Ctrl+A when prompted to access the ARC
utility.
2. From the ARC main menu, select Array Confi guration Utility (ACU).
3. From the ACU menu, select Manage Arrays.
4. Select the array you wish to delete and press Delete.
5. In the Array Properties dialog box, select Delete and press Enter. The following
prompt is displayed:
*Warning!! Deleting the array will render array unusable. Do you want to
delete the array?(Yes/No):
RAID 1 only—the following prompt is also displayed:
Deleting the partition will result in data loss! Do you also want to delete the
partition? (Yes/No):
6. Press Yes to delete the array or partition or No to return to the previous menu.
7. Press Esc to return to the previous menu.
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Creating Arrays
Before creating arrays, make sure the disks for the array are connected and installed
in your system. Note that disks with no usable space, or disks that are un-initialized
are shown in gray and cannot be used. See the section:
To create an array:
1 Turn on your computer and press Ctrl+A when prompted to access the ARC
utility.
2 From the ARC menu, select Array Confi guration Utility Main Menu (ACU) (as
shown on the fi rst screen on page C-5).
3 From the ACU menu, select Create Array.
4 Select the disks for the new array and press Insert (as the screen shown be-
low).
Initializing Disk Drives.
(*Note: To deselect any disk, highlight the disk and press Delete.)
5 Press Enter when both disks for the new array are selected. The Array Properties
menu displays (as the screen shown on the next page).
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Appendix C: Software Installation Instructions
Assigning Array Properties
Once you've create a new array, you are ready to assign the properties to the
array.
*Caution: Once the array is created and its properties are assigned, you cannot
change the array properties using the ACU. You will need to use the Adaptec Stor-
age Manager - Browser Edition. (Refer to Adaptec's User's Guide in the enclosed
CD.)
To assign properties to the new array:
1. In the Array Properties menu (as shown in the following screen), select an array
type and press Enter.
Note that only the available array types: RAID 0, and RAID1, are displayed on the
screen. (*RAID 0 or RAID 1 requires two drives.)
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2. Under the item "Arrays Label", type in an label and press Enter. (*Note: The
label shall not be more than 15 characters.)
3. For RAID 0, select the desired stripe size. (*Note: Available stripe sizes are
16, 32, and 64 KB-default. It is recommended that you do not change the default
setting.)
4. The item: "Create RAID via" allows you to select between the different creating
methods for RAID 0 and RAID 1.
The following table gives examples of when each is appropriate.
Raid Level Create Via When Appropriate
RAID 0 No Init Creating a RAID 0 on new drives
RAID 0 Migrate
(*Note)
RAID 1 Build1 Any time you wish to create a RAID 1, but especially if
RAID 1 Clear Creating a RAID 1 on new drives, or when you want to
RAID 1 Quick
RAID 1 Init
Creating a RAID 0 from one new drive and
one drive with data you wish to preserve
you have data on one drive that you wish to preserve
ensure that the array contains no data after creation.
Fastest way to create a RAID 1.
Appropriate when using new drives
*Note: If you select Migrate for RAID 0, or Build for RAID 1, you will be asked to
select the source drive. The contents of the source drive will be preserved. However,
the data on the new drive will be lost.
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Appendix C: Software Installation Instructions
5. When you are fi nished, press Done (as the screen shown below).
Notes:
1. Before adding a new drive to an array, back up any data contained on the new
drive. Otherwise, all data will be lost.
2. If you stop the Build or Clear process on a RAID 1 from ACU, you can restart
it by pressing Ctrl+R.
3. A RAID 1 created using the Quick Init option may return some data mis-matches if
you later run a consistency check. This is normal and is not a cause for concern.
4. The ACU allows you to use drives of different sizes in a
RAID . However, during a build operation, only the smaller drive can be selected
as the source or fi rst drive.
5. When migrating from single volume to RAID 0, migrating from a larger drive to
a smaller drive is allowed. However, the destination drive must be at least half the
capacity of the source drive.
6. Adaptec does not recommend that you migrate or build an array on Windows
dynamic disks (volumes), as it will result in data loss.
Warning: Do not interrupt the creation of a RAID 0 using the Migrate option. If you
do, you will not be able to restart, or to recover the data that was on the source
drive.
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Adding a Bootable Array
To make an array bootable:
1. From the Main menu, select Manage Arrays.
2. From the List of Arrays, select the array you want to make bootable, and press
Ctrl+B.
3. Enter Y to create a bootable array when the following message is displayed: "This
will make all other existing bootable array non-bootable. Do you want to make this
array bootable? (Yes/No):" Then, a bootable array will be created. An asterisk will
appear next to the bootable array as shown in the picture below:
Deleting a Bootable Array
To delete a bootable array:
1. From the Main menu, select Manage Arrays.
2. From the List of Arrays, select the bootable array (*) you want to delete, and
press Ctrl+B. (* a bootable array is the array marked with an asterisk (as shown
in the picture above.)
3. Enter Y to delete a bootable array when the following message is displayed:
"The array is already marked bootable. Do you want to make this array as not
bootable? (Yes/No):" Then, the bootable array will be deleted and the asterisk
will disappear. (*Note: do not use the delete key to delete the bootable array.)
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Appendix C: Software Installation Instructions
Adding/Deleting Hotspares
(*Note: In order to rebuild a RAID (RAID 0 or RAID 1), you would need to add a
new HDD as a hotspare.)
1. Turn on your computer and press Ctrl+A as prompted to access the ARC Util-
ity.
2. From the ARC menu, select Array Confi guration Utility (ACU).
3. From the ACU menu, select Add/Delete Hotspares.
4. Use the up and down arrow keys to highlight and select the disk you want to
designate as a hotspare, and press <Insert>, and then, press <Enter>.
5. Press yes when the following prompt is displayed: "Do you want to create spare?"
(Yes/No?)
The spare you have selected will appear in the Select Drive Menu.
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Initializing Disk Drives
If an installed disk does not appear in the disk selection list for creating a new ar-
ray, or if it appears grayed out, you may have to initialize it before you can use it
as part of an array. Drives attached to the controller must be initialized before they
can be used in an array.
Caution: Initializing a disk overwrites the partition table on the disk and makes
any data on the disk inaccessible. If the drive is used in an array, you may not be
able to use the array again. Do not initialize a disk that is part of a boot array. To
determine which disks are associated with a particular array, please refer to the
section:
To initialize drives:
1. Turn on your computer and press Ctrl+A when prompted to access the ARC
utility.
2. From the ARC menu, select Array Confi guration Utility (ACU) (as shown in the
screen below).
Viewing Array Properties.
3. Select Initialize Drives (as shown in the screen below).
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Appendix C: Software Installation Instructions
4. Use the up and down arrow keys to highlight the disk you wish to initialize and
press Insert (as shown in the screen below).
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5. Repeat Step 4 so that both drives to be initialized are selected (as shown in the
screen below).
6. Press Enter.
7. Read the warning message as shown in the screen.
8. Make sure that you have selected the correct disk drives to initialize. If correct,
type Y to continue.
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