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X11DPG-OT-CPU
USER’S MANUAL
Revision 1.0
Page 2
The information in this User’s Manual has been carefully reviewed and is believed to be accurate. The vendor assumes
no responsibility for any inaccuracies that may be contained in this document, and makes no commitment to update
or to keep current the information in this manual, or to notify any person or organization of the updates. Please Note:
For the most up-to-date version of this manual, please see our website at
Super Micro Computer, Inc. ("Supermicro") reserves the right to make changes to the product described in this manual
at any time and without notice. This product, including software and documentation, is the property of Supermicro and/
or its licensors, and is supplied only under a license. Any use or reproduction of this product is not allowed, except
as expressly permitted by the terms of said license.
IN NO EVENT WILL Super Micro Computer, Inc. BE LIABLE FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL,
SPECULA TIVE OR CONSEQUENTIAL DAMAGES ARISING FROM THE USE OR INABILITY TO USE THIS PRODUCT
OR DOCUMENT ATION, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. IN PARTICULAR, SUPER
MICRO COMPUTER, INC. SHALL NOT HAVE LIABILITY FOR ANY HARDWARE, SOFTWARE, OR DATA STORED
OR USED WITH THE PRODUCT, INCLUDING THE COSTS OF REPAIRING, REPLACING, INTEGRATING,
INSTALLING OR RECOVERING SUCH HARDWARE, SOFTWARE, OR DATA.
Any disputes arising between manufacturer and customer shall be governed by the laws of Santa Clara County in the
State of California, USA. The State of California, County of Santa Clara shall be the exclusive venue for the resolution
of any such disputes. Supermicro's total liability for all claims will not exceed the price paid for the hardware product.
FCC Statement: This equipment has been tested and found to comply with the limits for a Class A digital device
pursuant to Part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful
interference when the equipment is operated in a commercial environment. This equipment generates, uses, and can
radiate radio frequency energy and, if not installed and used in accordance with the manufacturer’s instruction manual,
may cause harmful interference with radio communications. Operation of this equipment in a residential area is likely
to cause harmful interference, in which case you will be required to correct the interference at your own expense.
www.supermicro.com.
California Best Management Practices Regulations for Perchlorate Materials: This Perchlorate warning applies only
to products containing CR (Manganese Dioxide) Lithium coin cells. “Perchlorate Material-special handling may apply.
See
www.dtsc.ca.gov/hazardouswaste/perchlorate”.
WARNING: Handling of lead solder materials used in this product may expose you to lead, a
chemical known to the State of California to cause birth defects and other reproductive harm.
The products sold by Supermicro are not intended for and will not be used in life support systems, medical equipment,
nuclear facilities or systems, aircraft, aircraft devices, aircraft/emergency communication devices or other critical
systems whose failure to perform be reasonably expected to result in signifi cant injury or loss of life or catastrophic
property damage. Accordingly, Supermicro disclaims any and all liability, and should buyer use or sell such products
for use in such ultra-hazardous applications, it does so entirely at its own risk. Furthermore, buyer agrees to fully
indemnify, defend and hold Supermicro harmless for and against any and all claims, demands, actions, litigation, and
proceedings of any kind arising out of or related to such ultra-hazardous use or sale.
Manual Revision 1.0
Release Date: February 28, 2018
Unless you request and receive written permission from Super Micro Computer, Inc., you may not copy any part of this
document. Information in this document is subject to change without notice. Other products and companies referred
to herein are trademarks or registered trademarks of their respective companies or mark holders.
Copyright © 2018 by Super Micro Computer, Inc.
All rights reserved.
Printed in the United States of America
Page 3
Preface
Preface
About This Manual
This manual is written for system integrators, IT technicians and knowledgeable end users.
It provides information for the installation and use of the X11DPG-OT-CPU motherboard.
About This Motherboard
The X11DPG-OT-CPU motherboard supports dual Intel 81xx/61xx/51xx/41xx/31xx
(Socket P) processors that offer 3 Ultra Path Interconnect (UPI) support with a speed
of up to 10.4 GT/s. With the C622 PCH built-in, this motherboard supports up to 3TB of
3DS LRDIMM/LRDIMM/3DS RDIMM/RDIMM DDR4 ECC memory of up to 2666 MHz in
24 slots. The X11DPG-OT-CPU provides maximum performance, system cooling, and I/O
expendability. This motherboard is optimized for High-Performance Computing (HPC), deep
learning, or artifi cial intelligence platforms. Please note that this motherboard is intended to
be installed and serviced by professional technicians only. For processor/memory updates,
please refer to our website at http://www.supermicro.com/products/.
Manual organization
Chapter 1 describes the features, specifi cations and performance of the motherboard, and
provides detailed information on the C622 chipset.
Chapter 2 provides hardware installation instructions. Read this chapter when installing the
processor, memory modules, and other hardware components into the system.
If you encounter any problems, see Chapter 3, which describes troubleshooting procedures
for video, memory and system setup stored in the CMOS.
Chapter 4 includes an introduction to the BIOS, and provides detailed information on running
the CMOS Setup utility.
Appendix A lists software program installation instructions.
Appendix B lists standardized warning statements in various languages.
Appendix C lists UEFI BIOS Recovery instructions.
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Super X11DPG-OT-CPU User's Manual
Contacting Supermicro
Headquarters
Address: Super Micro Computer, Inc.
980 Rock Ave.
San Jose, CA 95131 U.S.A.
Tel: +1 (408) 503-8000
Fax: +1 (408) 503-8008
Email: [email protected] (General Information)
[email protected] (Technical Support)
Website:
Europe
Address: Super Micro Computer B.V.
Website:
Asia-Pacifi c
Address: Super Micro Computer, Inc.
www.supermicro.com
Het Sterrenbeeld 28, 5215 ML
's-Hertogenbosch, The Netherlands
[email protected] (Technical Support)
[email protected] (Customer Support)
www.supermicro.nl
3F, No. 150, Jian 1st Rd.
Zhonghe Dist., New Taipei City 235
www.supermicro.com.tw
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Table Of Contents
Table of Contents
Chapter 1 Introduction
1.1 Checklist ...............................................................................................................................7
1.2 Processor and Chipset Overview .......................................................................................16
1.3 Special Features ................................................................................................................17
1.4 System Health Monitoring ..................................................................................................17
1.5 ACPI Features ....................................................................................................................18
1.6 Power Supply .....................................................................................................................18
1.7 Super I/O ............................................................................................................................18
1.8 Advanced Power Management ..........................................................................................19
®
Intel
Intelligent Power Node Manager (IPNM).................................................................19
Management Engine (ME) ................................................................................................19
Chapter 2 Installation
2.1 Static-Sensitive Devices .....................................................................................................20
2.2 Motherboard Installation .....................................................................................................21
2.3 Processor and Heatsink Installation ...................................................................................23
The Intel 81xx/61xx/51xx/41xx/31xx Series Processors ...................................................23
Overview of the Processor Socket Assembly ...................................................................24
Overview of the Processor Heatsink Module (PHM) ........................................................25
Attaching the Processor to the Narrow Processor Clip to Create the Processor Package
Assembly ...........................................................................................................................26
Attaching the Processor Package Assembly to the Heatsink to Form the Processor
Heatsink Module (PHM) ....................................................................................................27
Preparing the CPU Socket for Installation ........................................................................28
Removing the Dust Cover from the CPU Socket .............................................................28
Installing the Processor Heatsink Module (PHM) ............................................................29
Removing the Processor Heatsink Module (PHM) from the Motherboard .......................30
2.4 Memory Support and Installation .......................................................................................31
Memory Support ................................................................................................................31
DIMM Population Requirements .......................................................................................32
DIMM Population Table .....................................................................................................33
DIMM Installation ..............................................................................................................34
DIMM Removal .................................................................................................................34
2.5 Rear I/O Ports ....................................................................................................................35
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Super X11DPG-OT-CPU User's Manual
2.6 Front Control Panel ............................................................................................................39
2.7 Connectors and Headers ...................................................................................................44
SMCI-Proprietary Power Connectors ................................................................................44
Headers .............................................................................................................................46
2.8 Jumper Settings .................................................................................................................53
How Jumpers Work ...........................................................................................................53
2.9 LED Indicators ....................................................................................................................58
Chapter 3 Troubleshooting
3.1 Troubleshooting Procedures ..............................................................................................61
3.2 Technical Support Procedures ...........................................................................................64
3.3 Frequently Asked Questions ..............................................................................................64
3.4 Battery Removal and Installation .......................................................................................66
3.5 Returning Merchandise for Service ....................................................................................67
Chapter 4 BIOS
4.1 Introduction .........................................................................................................................68
4.2 Main Setup .........................................................................................................................69
4.3 Advanced Setup Confi gurations .........................................................................................71
4.4 Event Logs .........................................................................................................................98
4.5 IPMI ..................................................................................................................................100
4.6 Security Settings ..............................................................................................................103
4.7 Boot Settings ....................................................................................................................106
4.8 Save & Exit .......................................................................................................................109
Appendix A Software Installation
A.1 Installing Software Programs ........................................................................................... 111
A.2 SuperDoctor
®
5 ................................................................................................................. 112
Appendix B Standardized Warning Statements
Battery Handling ..............................................................................................................113
Product Disposal ............................................................................................................. 115
Appendix C UEFI BIOS Recovery
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Chapter 1: Introduction
Chapter 1
Introduction
Congratulations on purchasing your computer motherboard from an industry leader.
Supermicro motherboards are designed to provide you with the highest standards in quality
and performance.
1.1 Checklist
This motherboard was designed to be used in an SMCI-proprietary chassis only as a part
of an integrated, complete system solution. It is not intended to be sold as an independent,
stand-alone product; therefore, no shipping package will be included in the shipment.
Important Links
For your system to work properly, please follow the links below to download all necessary
drivers/utilities and the user’s manual for your server.
• Supermicro product manuals: http://www.supermicro.com/support/manuals/
• Product drivers and utilities: ftp://ftp.supermicro.com
• Product safety info: http://www.supermicro.com/about/policies/safety_information.cfm
• If you have any questions, please contact our support team at: [email protected]
his manual may be periodically updated without notice. Please check the Supermicro website
T
for possible updates to the manual revision level.
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Super X11DPG-OT-CPU User's Manual
Figure 1-1. X11DPG-OT-CPU Motherboard Image
Note: All graphics shown in this manual were based upon the latest PCB revision
available at the time of publication of the manual. The motherboard you received may
or may not look exactly the same as the graphics shown in this manual.
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Chapter 1: Introduction
JPWR2
JPWR1
FAN9
CN11
CN10
JNVI2C2
JRK1
JWD1
JF1
LE2
JIPMB1
FAN3
FAN4
SMCI-Proprietary PCI-E x24 slot
SMCI-Proprietary PCI-E x24 slot
JPWR4
JPWR3
JPW19
JPW19 JPW20
JPWR3
JPWR2
JPWR1
FAN9
CN11
CN10
JNVI2C2
JRK1
JWD1
JF1
LE2
JIPMB1
JL1
FAN3
FAN4
Figure 1-2. X11DPG-OT-CPU Motherboard Layout
(not drawn to scale)
LAN1
LAN2
JSDCARD1
SD CARD
BMC
JBT1
PCH
JS1
JS2
SATA0-3 SATA4-7
USB1/2 (3.0)/IPMI_LAN
USB3/4
(3.0)
USB1/2 (3.0)
IPMI_LAN
USB3/4
(3.0)
JNCSI
JSDCARD1
SDCARD
JNCSI
JM2-1
JM2-1
JP2
JP2
JTPM1
BIOS
SMCI-Proprietary PCI-E x24 Slot
J32
JTPM1
LED1
LED1
SMCI-Proprietary PCI-E x24 Slot
J31J33
BIOS
SMCI-Proprietary PCI-E x24 slot
SMCI-Proprietary PCI-E x24 slot
JBT1
SATA4-7
JPWR9
USB0
JPWR9
USB0
X11DPG-OT-CPU
REV:1.00
P1-DIMMF2
P1-DIMME1
P1-DIMME2
P1-DIMMD1
JPWR5 JPWR6
JPWR7
JHFI2
JPW20
P2-DIMMF2
P2-DIMME1
P2-DIMME2
P2-DIMMD1
FAN1
JPWR6
P2-DIMMD2
JPWR4
JPWR5
FAN2
COM1
LEDM1
JPME1
JPG1
BT1 Battery
SATA0-3
S-SATA0
JPWR8
JPWR7
CPU2
P2-DIMMA2
P2-DIMMA1
JUIDB2
UID
UID
LE1
LE1
JPME1
JPG1
SMCI-Proprietary PCI-E x24 Slot
IPMI CODE
JPWR8
S-SATA0
P2-DIMMB2
P2-DIMMB1
P2-DIMMC2
P2-DIMMC1
VGA
JUIDB1
VGA
COM1
LAN
CTRL
LEDM1
J34
SMCI-Proprietary PCI-E x24 Slot
BIOS
BT1
LICENSE
BATTERY
LAN2 LAN1
JPWR10
JPW21
JPWR10
CPU1
P1-DIMMD2
JPWR11
JPW21
JPWR
11
P1-DIMMA2
P1-DIMMA1
P1-DIMMB2
P1-DIMMB1
FAN8
JPWR12
JPWR12
P1-DIMMC2
P1-DIMMC1
F
AN7
JPWR13
JPWR14
JPWR13
JPW22
JPWR14
JPW22
JPWR16
FAN10
JPW12JPW11
FAN6
JPWR15
JPWR15
JPWR16
FAN10
JPNVI2C1
JNVI2C1
P1-DIMMC1
P1-DIMMC2
P1-DIMMB1
P1-DIMMB2
P1-DIMMA1
P1-DIMMA2
JPW11
JPW12
FAN5
P2-DIMMD1
P2-DIMME2
P2-DIMME1
FAN2 FAN1
P2-DIMMD2
P2-DIMMA2
P2-DIMMA1
P2-DIMMB2
P2-DIMMB1
P2-DIMMC2
P1-DIMMF2
P1-DIMMF1P2-DIMMC1
P1-DIMMD1
P1-DIMME2
P1-DIMME1
P1-DIMMD2
JL1
P2-DIMMF2
P2-DIMMF1
Note: Components not documented are for internal testing only.
9
FAN8 FAN7
FAN6
FAN5
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Super X11DPG-OT-CPU User's Manual
Quick Reference
JPW19 JPW20
JPWR2
JPWR1
CN11
CN10
JNVI2C2
JPWR3
JPWR4
FAN9
JPWR5
JPWR6
CPU2
JPWR7
JUIDB1
UID
LE1
COM1
JPME1
JPG1
SMCI-Proprietary PCI-E x24 Slot
IPMI CODE
BIOS
JPWR8
LICENSE
S-SATA0
VGA
LAN2
LAN
CTRL
BMC
LEDM1
J34
SMCI-Proprietary PCI-E x24 Slot
PCH
BT1
BATTERY
JS1
SATA0-3 SATA4-7
LAN1
JSDCARD1
SD CARD
BIOS
JBT1
JS2
USB3/4
(3.0)
J32
X11DPG-OT-CPU
REV:1.00
USB1/2 (3.0)
IPMI_LAN
JNCSI
JM2-1
JP2
JTPM1
LED1
SMCI-Proprietary PCI-E x24 Slot
SMCI-Proprietary PCI-E x24 Slot
J31J33
JPWR9
USB0
JPW21
JPWR10
CPU1
JPWR
11
JPWR12
JPWR13
JPW22
JPWR14
JPWR15
JPWR16
FAN10
JNVI2C1
JRK1
JWD1
JF1
LE2
JIPMB1
JL1
FAN3
FAN4
P2-DIMMF2
FAN2
P2-DIMME1
P2-DIMME2
P2-DIMMD1
P2-DIMMD2
FAN1
P2-DIMMA2
P2-DIMMA1
P2-DIMMB2
P2-DIMMB1
P2-DIMMC2
P2-DIMMC1
P1-DIMMF2
P1-DIMME1
P1-DIMME2
P1-DIMMD1
P1-DIMMD2
P1-DIMMA2
P1-DIMMA1
P1-DIMMB2
P1-DIMMB1
FAN8
P1-DIMMC2
P1-DIMMC1
F
AN7
JPW12JPW11
FAN6
FAN5
Notes:
•
See Chapter 2 for detailed information on jumpers, I/O ports, and JF1 front panel connections.
• " " indicates the location of Pin 1. Jumpers/components/LED indicators not indicated are
used for internal testing only.
• Use only the correct type of onboard CMOS battery as specifi ed by the manufacturer. Do
not install the onboard battery upside down to avoid possible explosion.
• To avoid causing interference with other components, please be sure to use an add-on
card that is fully compliant with the PCI-standard on a PCI slot.
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Chapter 1: Introduction
Quick Reference Table
Jumper Description Default Setting
JBT1 CMOS Clear Open (Normal) (See Chpt. 2)
JPG1 VGA Enable Pins 1-2 (Enable)
JPME1 Manufacturing Mode Select Pins 1-2 (Normal)
JWD1 Watch Dog Timer Enable Pins 1-2 (Reset to System)
Connector Description
BT1 Onboard CMOS battery
CN10/CN11 x4 Oculink connectors connected to CPU2 for NVMe drive use
COM1 COM/serial port for front access
FAN1-10 System cooling fan headers (FAN1-FAN8 ) & active CPU heatsink fan headers (FAN9/FAN10)
IPMI_LAN Dedicated IPMI LAN port
LAN1/LAN2 10GbE LAN Ethernet ports 1/2 on the I/O back panel
JF1 Front panel control header
JIPMB1 4-pin System Management Bus (SMBus) I2C header (for an IPMI-supported card)
JL1 Chassis Intrusion header
JM2-1 PCI-E M.2 slot
JNCS1
2
JNVI
C1/ JNVI2C2
JPW19/20, JPW 21/22 SMCI-proprietary power supply units 19/20, 21/22 for system use
JPWR1-8, JPWR9-16 8-pin power supply connectors 1-8, 9-16
JRK1 Intel RAID Key header for NVMe Solid State Device (SSD) use
JSDCARD1 BMC_SD card header
JTPM1 Trusted Platform Module/Port 80 connector
JUIDB1 UID (Unit Identifi er) switch
(I-)SATA 0-3(JS1), 4-7 (JS2) SATA 3.0 headers with support of 8 SATA connections (JS1: SATA 0-3, JS2: SATA 4-7)
S-SATA0 S-SATA3.0 port with power-pin built-in w/support of SuperDOM (Device-On Module)
USB0 Type A internal USB 2.0 header (USB Port 0)
USB1/2, 3/4 Backplane Universal Serial Bus (USB) 3.0 ports 1/2, 3/4
VGA VGA Port
Add-on card header used for the add-on card that supports NCSI (Network Communication
Services Interface)
NVMe SMBus (I2C) headers used for PCI-E hot-plug SMBus clock & data connections (an
SMCI-proprietary NVMe add-on card and cable are required for each NVMe SMBus header.
This feature is available for a Supermicro complete system only.)
LED Description Status
LE1 UID (Unit Identifi er) LED Solid Blue: Unit identifi ed
LE2 Power LED On: Onboard power on
LED1 M.2 Power LED On: M.2 power on
LEDM1 BMC Heartbeat LED Blinking Green: BMC normal
Note: To avoid causing interference with other components, please be sure to use an
add-on card that is fully compliant with the PCI-standard on a PCI slot.
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Super X11DPG-OT-CPU User's Manual
Motherboard Features
Motherboard Features
CPU
• This motherboard supports dual 81xx/61xx/51xx/41xx/31xx (Socket P) processors which offer Intel® Ultra Path Interconnect
(UPI) of up to 10.4 GT/s
Note: Both CPUs need to be installed for full access to the PCI-E slots, DIMM slots, and onboard controllers. Refer
to the block diagram to determine which slots or devices may be affected.
Memory
• Integrated memory controller supports up to 3TB of 3DS Load Reduced DIMM (3DS LRDIMM)/Load Reduced DIMM
(LRDIMM)/3DS Registered DIMM (3DS RDIMM)/Registered DIMM (RDIMM) DDR4 (288-pin) ECC 2666/2400/2133 MHz
modules in 24 slots
DIMM Size
• Up to 128GB at 1.2V
Note 1: Memory speed support depends on the processors used in the system.
Note 2: For the latest CPU/memory updates, please refer to our website at http://www.supermicro.com/products/
motherboard.
Chipset
• Intel C622 PCH
Expansion Slots
• Four (4) SMCI-proprietary PCI-Express x24 slots (J31/J32, J33/J34)
BaseBoard Management Controller (BMC)
• ASpeed AST 2500 Baseboard Controller (BMC) supports IPMI 2.0
• One (1) IPMI dedicated LAN located on the rear IO backpanel
Graphics
• Graphics controller via AST 2500 BMC
I/O Devices
• Ethernet LAN Ports • Two (2) 10GbE Ethernet LAN ports 1/2 on the I/O back panel
• IPMI Dedicated LAN • One (1) 1 Gigabit IPMI LAN supported by the AST 2500 BMC the I/O back panel
• Serial (COM) Port • One (1) Fast UART 16550 port on the I/O back panel
• Eight (8) (I-)SATA 3.0 connections supported by two SATA headers (JS1: SATA
• SATA 3.0
0-3, JS2: SATA 4-7)
• One (1) S-SATA 3.0 port with power-pin built-in (S-SATA0) (Note: S-SATA0 also
supports Supermicro SuperDOM.)
• RAID (PCH) • RAID 0, 1, 5, 10
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Chapter 1: Introduction
Motherboard Features
Peripheral Devices
• Four (4) USB 3.0 ports on the rear I/O panel (USB 1/2, USB 3/4)
• One (1) Type A USB 2.0 connector (USB 0)
BIOS
• 64 MB SPI AMI BIOS
• ACPI 3.0/4.0, USB keyboard, Plug-and-Play (PnP), SPI dual/quad speed support, riser-card auto detection support, and
SMBIOS 2.7 or later
Power Management
• Main switch override mechanism
• Power-on mode for AC power recovery
• Intel® Intelligent Power Node Manager 3.0 (available when the Supermicro Power Manager [SPM] is installed and a
special power supply is used.)
• Management Engine (ME)
System Health Monitoring
• Onboard voltage monitoring for +3.3V, 3.3V standby, +5V, +5V standby, +12V, CPU core, memory, chipset, BMC, PCH,
and battery voltages
• CPU System LED and control
• CPU Thermal Trip support
• Status monitor for speed control
• Status monitor for on/off control
• CPU Thermal Design Power (TDP) support of up to 205W (See Note 1 on next page.)
®
SM Flash UEFI BIOS
Fan Control
• Fan status monitoring via IPMI connections
• Dual cooling zone
• Low-noise fan speed control
• Pulse Width Modulation (PWM) fan control
System Management
• Trusted Platform Module (TPM) support
• PECI (Platform Environment Control Interface) 2.0 support
• UID (Unit Identifi cation)/Remote UID
• System resource alert via SuperDoctor® 5
• SuperDoctor® 5, Watch Dog, NMI
• Chassis intrusion header and detection
LED Indicators
• CPU/Overheating
• Fan Failure
• M.2 Power LED
• UID (Unit Identifi cation)/Remote UID
Dimensions
• 19.50" (L) x 17.00" (W) (495.30 mm x 431.80 mm)
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Super X11DPG-OT-CPU User's Manual
Note 1: The CPU maximum thermal design power (TDP) is subject to chassis and
heatsink cooling restrictions. For proper thermal management, please check the chassis and heatsink specifi cations for proper CPU TDP sizing.
Note 2: For IPMI confi guration instructions, please refer to the Embedded IPMI Con-
fi guration User's Guide available at http://www.supermicro.com/support/manuals/.
Note 3: It is strongly recommended that you change BMC log-in information upon initial
system power-on. The manufacture default username is ADMIN and the password is
ADMIN. For proper BMC confi guration, please refer to http://www.supermicro.com/
products/info/fi les/IPMI/Best_Practices_BMC_Security.pdf
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Figure 1-3.
System Block Diagram
Chapter 1: Introduction
RJ45
DDR4
BMC Boot Flash
#A-1
RJ45
10G
LAN3
RTL8211E-
VB-CG
SPI
#B-2
#B-1
#A-2
DDR4
Up to 2666
#D-1
#C-2
#C-1
RGRMII
BMC
AST2500
#F-1
#E-2
#E-1
#D-2
PCI-E X16 G3
PCI-E X16 G3
PCI-E X8 G3
PCI-E X24
PCI-E X4 G3
LAN 10G
X557-AT2
#F-2
RMII/NCSI
PCI-E X1 G2
USB 2.0
ESPI
DDR4
#1
X11DPG-O-CPU
#3A #3C DMI3
KR
LBG-2 X8 UPLINK
P0
P1
03:ICEP
0:DI TEKCO S
PCI-E X8 G3
DMI3
PCH
UPI
10.4G
UPI
UPI
UPI
P1
P0
P2P2
#3A #2#2
#3C
PCI-E X8 G3
6.0 Gb/S
iPass4x2
USB 2.0
6.0 Gb/S
#2
#1
DDR4
13:ICEP
1:DI TEKCO S
#1
PCI-E X16 G3
PCI-E X16 G3
PCI-E X8 G3
#7
#6
#5
#4
#3
SATAUSB
USB
#G-1
OCULINK
SuperDOM
#8
Rear x4
Internal Type A
#H-1
#G-2
DDR4
Up to 2666
PCI-E X24
#J-1
#H-2
#J-2
#K-1
#L-1
#K-2
#M-2
#M-1
#L-2
M.2
PCI-EX4 G2
TPM HEADER
Debug Card
BIOS
USB 3.0
SPI
Note: This is a general block diagram and may not exactly represent the features on
your motherboard. See the previous pages for the actual specifi cations of your moth-
erboard.
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Super X11DPG-OT-CPU User's Manual
1.2 Processor and Chipset Overview
Built upon the features of the 81xx/61xx/51xx/41xx/31xx (Socket P) processors and the
C622 chipset, the X11DPG-OT-CPU provides superb system performance, effi cient power
management, and a rich feature set based on cutting edge technology to address the needs
of next-generation computer users. With support of Intel® UltraPath Interconnect (UPI) of up to
10.4 GT/s, and Intel® AVX-512 new instructions, this motherboard offers an innovative solution
with maximum system performance to meet the ongoing demands of High Performance
Computing (HPC) platforms. This motherboard is optimized for deep learning, and artifi cial
intelligence platforms.
The Intel Xeon 81xx/61xx/51xx/41xx/31xx processor and the C622 chipset support the
following features:
• Intel® AVX-512 support with memory bandwidth increase to 6 channels (x1.5 from the
previous generation)
• High availability interconnect between multiple nodes
• Rich set of available IOs, full fl exibility in usage model, and software stack
• Dedicate d subsystems for cu stomer innovation
• Increased platform securit y with Intel® Boot Guard for hardware- based boot integrity pro -
tection; prevention of buffer overfl ow class securit y threads
• Integrated solution for real-time compression, streaming write & read performance in-
creases from gen-to -gen
• Hot plug and enclosure management with Intel Volume Management Device (Intel VMD)
• Single standard server development (Accelerate NFV transition) consolidating application,
control, and data plane workloads, reducing total platform investment needs
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Chapter 1: Introduction
1.3 Special Features
This section describes the health monitoring features of the X11DPG-OT-CPU motherboard.
The motherboard has an onboard ASpeed AST2500 Baseboard Management Controller
(BMC) that supports system health monitoring.
Recovery from AC Power Loss
The Basic I/O System (BIOS) provides a setting that determines how the system will respond
when AC power is lost and then restored to the system. You can choose for the system to
remain powered off (in which case you must press the power switch to turn it back on), or
for it to automatically return to the power-on state. See the Advanced BIOS Setup section
for this setting. The default setting is Last State.
1.4 System Health Monitoring
This section describes the health monitoring features of the X11DPG-OT-CPU motherboard.
The motherboard has an onboard Baseboard Management Controller (BMC) chip that
supports system health monitoring. Once a voltage becomes unstable, a warning is given or
an error message is sent to the screen. The user can adjust the voltage thresholds to defi ne
the sensitivity of the voltage monitor.
Onboard Voltage Monitoring
The onboard voltage monitor will continuously scan crucial voltage levels. Once a voltage
becomes unstable, it will give a warning or send an error message to the screen. The user
can adjust the voltage thresholds to defi ne the sensitivity of the voltage monitor. Real time
readings of these voltage levels are all displayed in IPMI 2.0.
Fan Status Monitor with Firmware Control
The system health monitor embedded in the BMC chip can check the RPM status of the
cooling fans. The CPU and chassis fans are controlled via IPMI 2.0.
Environmental Temperature Control
System Health sensors in the BMC monitor the temperatures and voltage settings of onboard
processors and the system in real time via the IPMI interface. Whenever the temperature of
the CPU or the system exceeds a user-defi ned threshold, system/CPU cooling fans will be
turned on to prevent the CPU or the system from overheating.
Note: To avoid possible system overheating, please be sure to provide adequate airfl ow to your system.
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Super X11DPG-OT-CPU User's Manual
System Resource Alert
This feature is available when used with SuperDoctor 5®. SuperDoctor 5 is used to notify the
user of certain system events. For example, you can confi gure SuperDoctor 5 to provide you
with warnings when the system temperature, CPU temperatures, voltages and fan speeds
go beyond a predefi ned range.
1.5 ACPI Features
ACPI stands for Advanced Confi guration and Power Interface. The ACPI specifi cation defi nes
a fl exible and abstract hardware interface that provides a standard way to integrate power
management features throughout a computer system including its hardware, operating system
and application software. This enables the system to automatically turn on and off peripherals
such as network cards, hard disk drives and printers.
In addition to enabling operating system-directed power management, ACPI also provides a
generic system event mechanism for Plug and Play and an operating system-independent
interface for confi guration control. ACPI leverages the Plug and Play BIOS data structures,
while providing a processor architecture-independent implementation that is compatible with
Windows 2012/R2 and Windows 2016 operating systems.
1.6 Power Supply
As with all computer products, a stable power source is necessary for proper and reliable
operation. It is even more important for processors that have high CPU clock rates and in
areas where noisy power transmission is present.
1.7 Super I/O
The Super I/O Aspeed AST 2500 provides a high-speed, 16550 compatible serial
communication port (UART), which supports serial infrared communication. The UART
includes send/receive FIFO, a programmable baud rate generator, complete modem control
capability, and a processor interrupt system. The UART provides legacy speed with baud
rate of up to 115.2 Kbps as well as an advanced speed with baud rates of 250 K, 500 K, or
1 Mb/s, supporting higher speed modems.
The Super I/O provides functions that comply with ACPI (Advanced Confi guration and Power
Interface), which includes support of legacy and ACPI power management through a SMI
or SCI function pin. It also features auto power management to reduce power consumption.
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Chapter 1: Introduction
1.8 Advanced Power Management
The following new advanced power management features are supported by the motherboard.
Intel® Intelligent Power Node Manager (IPNM)
Intel Intelligent Power Node Manager (IPNM) provides your system with real-time thermal
control and power management for maximum energy effi ciency. Although IPNM Specifi cation
Version 2.0/3.0 is supported by the BMC (Baseboard Management Controller), your system
must also have IPNM-compatible Management Engine (ME) fi rmware installed to use this
feature.
Note: Support for IPNM 2.0/3.0 support is dependent on the power supply used in
the system.
Management Engine (ME)
The Management Engine, which is an ARC controller embedded in the IOH (I/O Hub), provides
Server Platform Services (SPS) to your system. The services provided by SPS are different
from those provided by the ME on client platforms.
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Super X11DPG-OT-CPU User's Manual
Chapter 2
Installation
2.1 Static-Sensitive Devices
Electrostatic Discharge (ESD) can damage electronic com ponents. To avoid damaging your
motherboard or onboard components, it is important to handle it very carefully. The following
measures are generally suffi cient to protect your equipment from ESD.
Precautions
• Use a grounded wrist strap designed to prevent static discharge.
• Touch a grounded metal object before removing the motherboard from the antistatic bag.
• Handle the motherboard by its edges only; do not touch its components, peripheral chips,
memory modules or gold contacts.
• When handling chips or modules, avoid touching their pins.
• Put the motherboard and peripherals back into their antistatic bags when not in use.
• For grounding purposes, make sure that your chassis provides excellent conductivity be-
tween the power supply, the case, the mounting fasteners and the motherboard.
• Use only the correct type of CMOS onboard battery as specifi ed by the manufacturer. Do
not install the CMOS battery upside down, which may result in a possible explosion.
Unpacking
The motherboard is shipped in antistatic packaging to avoid static damage. When unpacking
the motherboard, make sure that the person handling it is static protected.
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Chapter 2: Installation
2.2 Motherboard Installation
All motherboards have standard mounting holes to fi t different types of chassis. Make sure
that the locations of all the mounting holes for both the motherboard and the chassis match.
Although a chassis may have both plastic and metal mounting fasteners, metal ones are
highly recommended because they ground the motherboard to the chassis. Make sure that
the metal standoffs click in or are screwed in tightly.
Phillips
Screwdriver
(1)
Tools Needed
Phillips
Screws (14)
IPMI CODE
BIOS
LICENSE
11DPG-OT-CPU
REV:1.00
Standoffs (14)
Only if Needed
Location of Mounting Holes
Notes: 1) To avoid damaging the motherboard and its components, please do not use
a force greater than 8 lb/inch on each mounting screw during motherboard installation.
2) Some components are very close to the mounting holes. Please take precautionary
measures to avoid damaging these components when installing the motherboard to
the chassis.
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Super X11DPG-OT-CPU User's Manual
Installing the Motherboard
1. Locate the mounting holes on the motherboard. Please refer to the previous page for
locations of the mounting holes.
2. Locate the matching mounting holes on the chassis. Align the mounting holes on the
motherboard against the mounting holes on the chassis.
3. Install standoffs in the chassis as needed.
4. Install the motherboard into the chassis carefully to avoid damaging other motherboard
components.
5. Using the Phillips screwdriver, insert a Phillips head #6 screw into a mounting hole on
the motherboard and its matching mounting hole on the chassis.
6. Repeat Step 5 to insert #6 screws into all mounting holes.
7. Make sure that the motherboard is securely placed in the chassis.
Note: Images displayed are for illustration only. Your chassis or components might
look different from those shown in this manual.
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Chapter 2: Installation
2.3 Processor and Heatsink Installation
Warning: When handling the processor package, avoid placing direct pressure on the label area
of the CPU or CPU socket. Also, improper CPU installation or socket misalignment can cause
serious damage to the CPU or the motherboard which may result in RMA repairs. Please read
and follow all instructions thoroughly before installing your CPU and heatsink.
Notes:
• Always connect the power cord last, and always remove it before adding, removing, or
changing any hardware components. Please note that the processor and heatsink should
be assembled together fi rst to form the Processor Heatsink Module (PHM), and then install
the entire PHM into the CPU socket.
• When you receive a motherboard without a processor pre-installed, make sure that the
plastic CPU socket cap is in place, and that none of the socket pins are bent; otherwise,
contact your retailer immediately.
• Refer to the Supermicro website for updates on CPU support.
• Please follow the instructions given in the ESD Warning section on the fi rst page of this
chapter before handling, installing, or removing system components.
The Intel 81xx/61xx/51xx/41xx/31xx Series Processors
Note: The 81xx/61xx/51xx/41xx/31xx processors come in two models-the F model
processors and the Non-F model processors. This motherboard supports NonF model processors only.
Intel Processor (Non-F Model)
Note: All graphics, drawings, and pictures shown in this manual are for illustration only.
The components that came with your machine may or may not look exactly the same
as those shown in this manual.
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Super X11DPG-OT-CPU User's Manual
Overview of the Processor Socket Assembly
The processor socket assembly contains 1) the Intel 81xx/61xx/51xx/41xx/31xx processor,
2) the narrow processor clip, 3) the dust cover, and 4) the CPU socket.
1. The 81xx/61xx/51xx/41xx/31xx
Processor
(The 81xx/61xx/51xx/41xx/31xx Processor)
2. Narrow processor clip (the plastic processor package carrier used for the CPU)
3. Dust Cover
4. CPU Socket
Note: Be sure to cover the CPU socket with the dust cover when the CPU is not in-
stalled.
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Chapter 2: Installation
Overview of the Processor Heatsink Module (PHM)
The Processor Heatsink Module (PHM) contains 1) a heatsink, 2) a narrow processor clip,
and 3) the 81xx/61xx/51xx/41xx/31xx processor.
1. Heatsink
2. Narrow processor clip
3. Intel Processor
4. Processor Heatsink Module (PHM)
Processor Heatsink Module (PHM)
Note: If one CPU is used, be sure to install it on CPU Socket#1.
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Super X11DPG-OT-CPU User's Manual
Attaching the Processor to the Narrow Processor Clip to Create
the Processor Package Assembly
To properly install the CPU into the narrow processor clip, please follow the steps below.
1. Locate pin 1 (notch A), which is the triangle located on the top of the narrow processor
clip. Also locate notch B and notch C on the processor clip.
2. Locate pin 1 (notch A), which is the triangle on the substrate of the CPU. Also, locate
notch B and notch C on the CPU as shown below.
3. Align pin 1 (the triangle on the substrate) of the CPU with pin 1 (the triangle) of
the narrow processor clip. Once they are aligned, carefully insert the CPU into the
processor clip by sliding notch B of the CPU into notch B of the processor clip, and
sliding notch C of the CPU into notch C of the processor clip.
4. Examine all corners of the CPU to ensure that it is properly seated on the processor
clip. Once the CPU is securely attached to the processor clip, the processor package
assembly is created.
Note: Please exercise extreme caution when handling the CPU. Do not touch the
CPU LGA-lands to avoid damaging the LGA-lands or the CPU. Be sure to wear ESD
gloves when handling components.
CPU (Upside Down)
w/CPU LGA Lands up
Align Notch B of the CPU
and Notch B of the Processor Clip
Align CPU Pin 1
C
Align Notch C of the CPU
and Notch C of the Processor Clip
B
Allow Notch C to
latch on to CPU
A
Pin 1
C
C
B
CPU/Heatsink Package
(Upside Down)
A
Allow Notch B to
latch on to CPU
B
A
Processor Package Carrier (w/CPU mounted
on the Processor Clip)
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Chapter 2: Installation
Attaching the Processor Package Assembly to the Heatsink to
Form the Processor Heatsink Module (PHM)
After you have made a processor package assembly by following the instructions on the
previous page, please follow the steps below to mount the processor package assembly onto
the heatsink to create the Processor Heatsink Module (PHM).
1. Locate "1" on the heatsink label and the triangular corner next to it on the heatsink.
With your index fi nger pressing against the screw at this triangular corner, carefully hold
and turn the heatsink upside down with the thermal-grease side facing up. Remove the
protective thermal fi lm if present, and apply the proper amount of the thermal grease
as needed. (Skip this step if you have a new heatsink because the necessary thermal
grease is pre-applied in the factory.)
2. Holding the processor package assembly at the center edge, turn it upside down. With
the thermal-grease side facing up, locate the hollow triangle located at the corner of the
processor carrier assembly ("a" in the graphic). Note a larger hole and plastic mounting
clicks located next to the hollow triangle. Also locate another set of mounting clicks and
a larger hole at the diagonal corner
of the same (reverse) side of the
processor carrier assembly ("b" in
the graphic).
3. With the back of heatsink and
the reverse side of the processor
package assembly facing up, align
the triangular corner on the heatsink
("A" in the graphic) against the
mounting clips next to the hollow
triangle ("a") on the processor
package assembly.
4. Also align the triangular corner ("B")
at the diagonal side of the heatsink
with the corresponding clips on the
processor package assembly ("b").
Triangle on the CPU
Triangle on the
Processor Clip
Non-Fabric CPU and Processor Clip
(Upside Down)
b
d
B
a
D
Heatsink
(Upside Down)
A
On Locations of (C, D), the notches
snap onto the heat sink’s
B
c
C
mounting holes
5. Once the mounting clips on the
processor package assembly
are properly aligned with the
corresponding holes on the back
of heatsink, securely attach the
heatsink to the processor package
assembly by snapping the mounting
clips at the proper places on the
heatsink to create the processor
heatsink module (PHM).
27
D
A
On Locations (A, B), the notches
snap onto the heatsink’s sides
C
Make sure Mounting
Notches snap into place
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Super X11DPG-OT-CPU User's Manual
Preparing the CPU Socket for Installation
This motherboard comes with the CPU socket pre-assembled in the factory. The CPU socket
contains 1) a dust cover, 2) a socket bracket, 3) the CPU socket, and 4) a back plate. These
components are pre-installed on the motherboard before shipping.
CPU Socket w/Dust Cover On
Removing the Dust Cover from the CPU Socket
Remove the dust cover from the CPU socket, exposing the CPU socket and socket pins as
shown on the illustration below.
Note: Do not touch the socket pins to avoid damaging them, causing the CPU to
malfunction.
Dusk Cover
Remove the dust cover from
the CPU socket. Do not
touch the socket pins!
Socket Pins
CPU Socket
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Chapter 2: Installation
Installing the Processor Heatsink Module (PHM)
1. Once you have assembled the processor heatsink module (PHM) by following the
instructions, you are ready to install the processor heatsink module (PHM) into the
CPU socket on the motherboard. To install the PHM into the CPU socket, follow the
instructions below.
2. Locate the triangle (pin 1) on the CPU socket, and locate the triangle (pin 1) at the
corner of the PHM that is closest to "1." (If you have diffi culty locating pin 1 of the PHM,
turn the PHM upside down. With the LGA-lands side facing up, you will note the hollow
triangle located next to a screw at the corner. Turn the PHM right side up, and you will
see a triangle marked on the processor clip at the same corner of hollow triangle.)
3. Carefully align pin 1 (the triangle) on the the PHM against pin 1 (the triangle) on the
CPU socket.
4. Once they are properly aligned, insert the two diagonal oval holes on the heatsink into
the guiding posts.
5. Using a T30 Torx-bit screwdriver, install four screws into the mounting holes on the
socket to securely attach the PHM onto the motherboard starting with the screw marked
"1" (in the sequence of 1, 2, 3, and 4).
Note: Do not use excessive force when tightening the screws to avoid damaging the
LGA-lands and the processor.
Oval C
Use a torque
Oval D
Large Guiding Post
T30 Torx Driver
of 12 lbf
#4
#1
#2
Small Guiding Post
Printed Triangle
Mounting the Processor Heatsink Module
into the CPU socket (on the motherboard)
#3
Tighten the screws in the
sequence of 1, 2, 3, 4 (top 3 quarter view)
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Super X11DPG-OT-CPU User's Manual
Removing the Processor Heatsink Module (PHM) from the
Motherboard
Before removing the processor heatsink module (PHM), unplug power cord from the power
outlet.
1. Using a T30 Torx-bit screwdriver, turn the screws on the PHM counterclockwise to
loosen them from the socket, starting with screw marked #4 (in the sequence of 4, 3, 2,
1).
2. After all four screws are removed, wiggle the PHM gently and pull it up to remove it
from the socket.
Note: To properly remove the processor heatsink module, be sure to loosen and remove the screws on the PHM in the sequence of 4, 3, 2, 1 as shown below.
#1
Removing the screws in
the sequence of 4, 3, 2, 1
#4
#2
#3
Printed Triangle on Motherboard
CPU Socket
After removing the screws,
lift the Processor Heatsink
Module off the CPU socket.
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Chapter 2: Installation
2.4 Memory Support and Installation
Warning! Exercise extreme care when installing or removing DIMM modules to prevent any
possible damage. Check the Supermicro website for recommended memory modules.
Memory Support
The X11DPG-OT-CPU supports up to 3TB 3DS Load Reduced DIMM (3DS LRDIMM) Load
Reduced DIMM (LRDIMM), 3DS Registered DIMM (3DS RDIMM) Registered DIMM (RDIMM),
DDR4 (288-pin) ECC 2666/2400/2133 MHz memory modules in 24 slots. Populating these
DIMM modules with a pair of memory modules of the same type and size will result in
interleaved memory, which will improve memory performance.
Notes: 1. Please follow the DIMM population tables listed in this chapter to install the
DIMM modules on your motherboard. 2. Using an unbalanced memory topology by
installing two DIMMs in one channel while installing one DIMM in another channel will
result in reduced memory performance. 3. Memory speed is dependent on the type of
processors used in your system.
DDR4 Memory Support (for 2-Slot Per-Channel Confi guration)
Ranks
DIMM Capacity
Type
RDIMM SRx4 8 GB 16 GB 2666 2666
RDIMM SRx8 4 GB 8 GB 2666 2666
RDIMM DRx8 8 GB 16 GB 2666 2666
RDIMM DRx4 16 GB 32 GB 2666 2666
RDIMM 3DS QRX4 N/A 2H-64GB 2666 2666
RDIMM 3DS 8RX4 N/A 4H-128GB 2666 2666
LRDIMM QRx4 32 GB 64 GB 2666 2666
LRDIMM
3DS
Per
DIMM
and Data
Width
QRX4 N/A 2H-64GB 2666 2666
8Rx4 N/A 4H-128 GB 2666 2666
(GB)
4 Gb 8 Gb 1.2 V 1.2 V
Speed (MT/s); Voltage (V); Slots per Channel (SPC) and DIMMs per Channel (DPC)
2 Slots per Channel
1DPC (1-DIMM per Channel) 2DPC (2-DIMM per Channel)
DDR4 Memory Support (for 1-Slot Per-Channel Confi guration)
Ranks
DIMM Capacity
Type
RDIMM SRx4 8 GB 16 GB 2666
RDIMM SRx8 4 GB 8 GB 2666
RDIMM DRx8 8 GB 16 GB 2666
RDIMM DRx4 16 GB 32 GB 2666
RDIMM 3DS QRX4 N/A 2H-64GB 2666
RDIMM 3DS 8RX4 N/A 4H-128GB 2666
LRDIMM QRx4 32 GB 64 GB 2666
LRDIMM
3DS
Per
DIMM
and Data
Width
QRX4 N/A 2H-64GB 2666
8Rx4 N/A 4H-128 GB 2666
(GB)
4 Gb 8 Gb 1.2 V
Speed (MT/s); Voltage (V); Slots per Channel (SPC) and DIMMs per Channel (DPC)
1 Slot per Channel
1DPC (1-DIMM per Channel)
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Super X11DPG-OT-CPU User's Manual
DIMM Population Requirements
For optimal memory performance, follow the tables below when populating memory modules.
Key Parameters for DIMM Confi gurations
Parameters Possible Values
Number of Channels 1, 2, 3, 4, 5, or 6
Number of DIMMs per Channel 1DPC (1 DIMM Per Channel) or 2DPC (2 DIMMs Per Channel)
DIMM Type RDIMM (w/ECC), LRDIMM, 3DS-LRDIMM
DIMM Construction
• non-3DS RDIMM Raw Cards: A/B (2RX4), C (1RX4),
D (1RX8), E (2RX8)
• 3DS RDIMM Raw Cards: A/B (4RX4)
• non-3DS LRDIMM Raw Cards: D/E (4RX4)
• 3DS LRDIMM Raw Cards: A/B (8RX4)
General Population Requirements
DIMM Mixing Rules
• All DIMMs must be all DDR4 DIMMs.
• X4 and X8 DIMMs can be mixed in the same channel.
• Mixing of LRDIMMs and RDIMMs is not allowed in the same channel, across different channels, and across
different sockets.
• Mixing of non-3DS and 3DS LRDIMM is not allowed in the same channel, across different channels, and across
different sockets.
Mixing of DIMM Types within a Channel
DIMM Types RDIMM LRDIMM 3DS LRDIMM
RDIMM Allowed Not Allowed Not Allowed
LRDIMM Not Allowed Allowed Not Allowed
3DS LRDIMM Not Allowed Not Allowed Allowed
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Chapter 2: Installation
DIMM Population Table
Note: Unbalanced memory confi guration decreases memory performance and is not
recommended for Supermicro motherboards.
Memory Population Tables for X11DP Motherboards w/24 DIMM Slots
When 1 CPU is used: Memory Population Sequence
1 CPU & 1 DIMM CPU1: P1-DIMMA1
1 CPU & 2 DIMMs CPU1: P1-DIMMA1/P1-DIMMD1
1 CPU & 3 DIMMs CPU1: P1-DIMMC1/P1-DIMMB1/P1-DIMMA1
1 CPU & 4 DIMMs CPU1: P1-DIMMB1/P1-DIMMA1/P1-DIMMD1/P1-DIMME1
1 CPU & 5 DIMMs
(Unbalanced: not recommended)
1 CPU & 6 DIMM CPU1: P1-DIMMC1/P1-DIMMB1/P1-DIMMA1/P1-DIMMD1/P1-DIMME1/P1-DIMMF1
1 CPU & 7 DIMMs
(Unbalanced: not recommended)
1 CPU & 8 DIMMs CPU1: P1-DIMMC1/P1-DIMMB1/P1-DIMMA1/P1-DIMMA2/P1-DIMMD2/P1-DIMMD1/P1-DIMME1/P1-DIMMF1
1 CPU & 9 DIMMs
(Unbalanced: not recommended)
1 CPU & 10 DIMMs
(Unbalanced: not recommended)
1 CPU & 11 DIMMs
(Unbalanced: not recommended)
1 CPU & 12 DIMMs CPU1: P1-DIMMC1/P1-DIMMC2/P1-DIMMB1/P1-DIMMB2/P1-DIMMA1/P1-DIMMA2/P1-DIMMD2/P1-DIMMD1/P1-DIMME2/P1-DIMME1/P1-DIMMF2/P1-DIMMF1
When 2 CPUs are used: Memory Population Sequence
2 CPUs & 2 DIMMs
2 CPUs & 4 DIMMs
2 CPUs & 6 DIMMs
2 CPUs & 8 DIMMs
2 CPUs & 10 DIMMs
2 CPUs & 12 DIMMs
2 CPUs & 14 DIMMs
2 CPUs & 16 DIMMs
2 CPUs & 18 DIMMs
2 CPUs & 20 DIMMs
2 CPUs & 22 DIMMs
(Unbalanced: not recommended)
2 CPUs & 24 DIMMs CPU1: P1-DIMMC1/P1-DIMMC2/P1-DIMMB1/P1-DIMMB2/P1-DIMMA1/P1-DIMMA2/P1-DIMMD2/P1-DIMMD1/P1-DIMME2/P1-DIMME1/P1-DIMMF2/P1-DIMMF1
CPU1: P1-DIMMC1/P1-DIMMB1/P1-DIMMA1/P1-DIMMD1/P1-DIMME1
CPU1: P1-DIMMC1/P1-DIMMB1/P1-DIMMA1/P1-DIMMA2/P1-DIMMD1/P1-DIMME1/P1-DIMMF1
CPU1: P1-DIMMC1/P1-DIMMC2/P1-DIMMB1/P1-DIMMB2/P1-DIMMA1/P1-DIMMA2/P1-DIMMD1/P1-DIMME1/P1-DIMMF1
CPU1: P1-DIMMC1/P1-DIMMB1/P1-DIMMB2/P1-DIMMA1/P1-DIMMA2/P1-DIMMD2/P1-DIMMD1/P1-DIMME2/P1-DIMME1/P1-DIMMF1
CPU1: P1-DIMMC1/P1-DIMMC2/P1-DIMMB1/P1-DIMMB2/P1-DIMMA1/P1-DIMMA2/P1-DIMMD2/P1-DIMMD1/P1-DIMME2/P1-DIMME1/P1-DIMMF1
CPU1: P1-DIMMA1
CPU2: P2-DIMMA1
CPU1: P1-DIMMA1/P1-DIMMD1
CPU2: P2-DIMMA1/P2-DIMMD1
CPU1: P1-DIMMC1/P1-DIMMB1/P1-DIMMA1
CPU2: P2-DIMMC1/P2-DIMMB1/P2-DIMMA1
CPU1: P1-DIMMB1/P1-DIMMA1/P1-DIMMD1/P1-DIMME1
CPU2: P2-DIMMB1/P2-DIMMA1/P2-DIMMD1/P2-DIMME1
CPU1: P1-DIMMC1/P1-DIMMB1/P1-DIMMA1/P1-DIMMD1/P1-DIMME1/P1-DIMMF1
CPU2: P2-DIMMB1/P2-DIMMA1/P2-DIMMD1/P2-DIMME1
CPU1: P1-DIMMC1/P1-DIMMB1/P1-DIMMA1/P1-DIMMD1/P1-DIMME1/P1-DIMMF1
CPU2: P2-DIMMC1/P2-DIMMB1/P2-DIMMA1/P2-DIMMD1/P2-DIMME1/P2-DIMMF1
CPU1: P1-DIMMB1/P1-DIMMB2/P1-DIMMA1/P1-DIMMA2/P1-DIMMD2/P1-DIMMD1/P1-DIMME1/P1-DIMMF1
CPU2: P2-DIMMC1/P2-DIMMB1/P2-DIMMA1/P2-DIMMD1/P2-DIMME1/P2-DIMMF1
CPU1: P1-DIMMB1/P1-DIMMB2/P1-DIMMA1/P1-DIMMA2/P1-DIMMD2/P1-DIMMD1/P1-DIMME1/P1-DIMMF1
CPU2: P2-DIMMB1/P2-DIMMB2/P2-DIMMA1/P2-DIMMA2/P2-DIMMD2/P2-DIMMD1/P2-DIMME1/P2-DIMMF1
CPU1: P1-DIMMC1/P1-DIMMC2/P1-DIMMB1/P1-DIMMB2/P1-DIMMA1/P1-DIMMA2/P1-DIMMD2/P1-DIMMD1/P1-DIMME2/P1-DIMME1/P1-DIMMF2/P1-DIMMF1
CPU2: P2-DIMMC1/P2-DIMMB1/P2-DIMMA1/P2-DIMMD1/P2-DIMME1/P2-DIMMF1
CPU1: P1-DIMMC1/P1-DIMMC2/P1-DIMMB1/P1-DIMMB2/P1-DIMMA1/P1-DIMMA2/P1-DIMMD2/P1-DIMMD1/P1-DIMME2/P1-DIMME1/P1-DIMMF2/P1-DIMMF1
CPU2: P2-DIMMB1/P2-DIMMB2/P2-DIMMA1/P2-DIMMA2/P2-DIMMD2/P2-DIMMD1/P2-DIMME1/P2-DIMMF1
CPU1: P1-DIMMC1/P1-DIMMC2/P1-DIMMB1/P1-DIMMB2/P1-DIMMA1/P1-DIMMA2/P1-DIMMD2/P1-DIMMD1/P1-DIMME2/P1-DIMME1/P1-DIMMF1
CPU2: P2-DIMMC1/P2-DIMMC2/P2-DIMMB1/P2-DIMMB2/P2-DIMMA1/P2-DIMMA2/P2-DIMMD2/P2-DIMMD1/P2-DIMME2/P2-DIMME1/P2-DIMMF1
CPU2: P2-DIMMC1/P2-DIMMC2/P2-DIMMB1/P2-DIMMB2/P2-DIMMA1/P2-DIMMA2/P2-DIMMD2/P2-DIMMD1/P2-DIMME2/P2-DIMME1/P2-DIMMF2/P2-DIMMF1
33
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Super X11DPG-OT-CPU User's Manual
DIMM Installation
1. Follow the instructions given in the
memory population tables provided in the
previous section to install memory modules
on your motherboard. For the system
to work properly, please use memory
modules of the same type and speed on
the motherboard. (See the note below.)
2. Push the release tabs outwards on both
ends of the DIMM slot to unlock it.
3. Align the key of the DIMM module with the
receptive point on the memory slot.
4. Align the notches on both ends of the
module against the receptive points on the
ends of the slot.
IPMI CODE
BIOS
LICENSE
11DPG-OT-CPU
REV:1.00
5. Use two thumbs together to press the
notches on both ends of the module
straight down into the slot until the module
snaps into place.
6. Press the release tabs to the lock positions
to secure the DIMM module into the slot.
DIMM Removal
Reverse the steps above to remove the DIMM
modules from the motherboard.
Notches
Release Tabs
Press both notches
straight down into
the memory slot.
Note: All graphics including the layout drawing above are for reference only. Your sys-
tem components may look or may not look the same as graphics shown in this guide.
34
Page 35
Chapter 2: Installation
J
U
2.5 Rear I/O Ports
See the layout below for the locations and descriptions of the various I/O ports on the rear
of the motherboard.
UIDB1
ID
VGA
LE1
COM1
LAN
CTRL
JPME1
JPG1
LEDM1
SMCI-Proprietary PCI-E x24 Slot
J34
SMCI-Proprietary PCI-E x24 Slot
USB1/2 (3.0)
IPMI_LAN
LAN1
LAN2
USB3/4
(3.0)
JNCSI
JSDCARD1
JM2-1
SD CARD
BMC
PCH
BIOS
J32
JBT1
JP2
JTPM1
LED1
SMCI-Proprietary PCI-E x24 Slot
SMCI-Proprietary PCI-E x24 Slot
J31J33
JPW19 JPW20
JPWR3
JPWR2
JPWR1
FAN9
CN11
CN10
JNVI2C2
JRK1
JWD1
JF1
LE2
JIPMB1
JL1
FAN3
FAN4
IPMI CODE
BIOS
BT1
JS1
BATTERY
SATA0-3 SATA4-7
JS2
X11DPG-OT-CPU
REV:1.00
JPWR7
JPWR6
JPWR8
CPU2
P2-DIMMD1
P2-DIMMD2
P2-DIMMA2
P2-DIMMA1
P2-DIMMB2
S-SATA0
P2-DIMMB1
P2-DIMMC2
P2-DIMMC1
LICENSE
JPWR4
JPWR5
P2-DIMMF2
P2-DIMME1
P2-DIMME2
FAN2
FAN1
USB0
P1-DIMMF2
P1-DIMME1
JPWR9
P1-DIMME2
P1-DIMMD1
P1-DIMMD2
JPW21
JPWR10
CPU1
P1-DIMMA2
P1-DIMMA1
P1-DIMMB2
FAN8
JPWR
11
P1-DIMMB1
P1-DIMMC2
P1-DIMMC1
F
AN7
JPWR12
JPWR13
JPWR14
JPW22
JPWR15
JPWR16
FAN10
JNVI2C1
JPW12JPW11
FAN6
FAN5
I/O Port Locations and Defi nitions
3
5
2
1
3
5
6
4
7
8
9
2
4
6
7
8
9
1
I/O Back Panel
Port Descriptions
Pin# Defi nition Pin# Defi nition
1 USB 1 (3.0) 6 LAN Port 1
2 USB 2 (3.0) 7 LAN Port 2
3 IPMI_LAN 8 VGA
4 USB 3 (3.0) 9 UID Switch
5 USB 4 (3.0) (UID LED: on the motherboard)
35
Page 36
Super X11DPG-OT-CPU User's Manual
Universal Serial Bus (USB) Ports
Four USB 3.0 port (USB1/2, 3/4) are located on the I/O back panel. A Type A internal USB
2.0 header on the motherboard provides front access. Connect appropriate cables here to
use USB support. (USB cables are not included).
Back Panel USB (3.0)
Pin Defi nitions
Pin# Defi nitio Pin# Defi nition
A1 VBUS B1 VBUS
A2 D- B2 DA3 D+ B3 D+
A4 GND B4 GND
A5 Stda_SSRX- B5 Stda_SSRXA6 Stda_SSRX+ B6 Stda_SSRX+
A7 GND B7 GND
A8 Stda_SSTX- B8 Stda_SSTXA9 Stda_SSTX+ B9 Stda_SSTX+
USB (2.0)
Pin Defi nitions
Pin# Defi nition
1 Vcc
2 Data3 Data+
4 Ground
1. Type A USB 2.0 for front Access
IPMI CODE
BIOS
LICENSE
11DPG-OT-CPU
REV:1.00
2. Backpanel USB 1 (USB 3.0)
3. Backpanel USB 2 (USB 3.0)
4. Backpanel USB 3 (USB 3.0)
5. Backpanel USB 4 (USB 3.0)
1
5
43
2
36
Page 37
Chapter 2: Installation
Ethernet Ports
Two Ethernet ports (LAN1, LAN2) that support 10 GbE Ethernet LAN connections are located
on the I/O backplane. Additionally, an IPMI-dedicated LAN, located above USB 1/2 ports
on the I/O backplane, provides 1 GbE IPMI LAN support via the AST 2500 BMC. All these
LAN ports accept RJ45 type cables. Please refer to the LED Indicator Section for LAN LED
information.
IPMI CODE
BIOS
LICENSE
11DPG-OT-CPU
REV:1.00
1. LAN Port 1 (10GbE LAN)
2. LAN Port 2 (10GbE LAN)
3. IPMI_LAN (1 GbE LAN)
3
1
2
37
Page 38
Super X11DPG-OT-CPU User's Manual
VGA Port
The onboard VGA port is located next to LAN Port 2 on the I/O back panel. Use this connection
for VGA display.
Unit Identifi er Switch/UID LED Indicator
A Unit Identifi er (UID) switch and a rear UID LED (LE1) are located on the I/O back panel.
A front UID switch is located on pins 7 & 8 of the front panel control (JF1). When you press
the front or the rear UID switch, both front and rear UID LEDs will be turned on. Press the
UID switch again to turn off the LED indicators. The UID indicators provide easy identifi cation
of a system that may be in need of service. (Note: UID can also be triggered via IPMI on
the motherboard. For more information, please refer to the IPMI User's Guide posted on our
website at http://www.supermicro.com.)
JPW19 JPW20
JPWR3
JPWR2
JPWR1
FAN9
CN11
CN10
JNVI2C2
JRK1
JWD1
JF1
LE2
JIPMB1
JL1
FAN3
FAN4
JPWR4
JPWR5
FAN2
P2-DIMMF2
P2-DIMME1
P2-DIMME2
FAN1
JPWR6
CPU2
P2-DIMMD1
P2-DIMMD2
JPWR7
P2-DIMMA2
P2-DIMMA1
2
JUIDB1
UID
LE1
JPME1
JPG1
SMCI-Proprietary PCI-E x24 Slot
IPMI CODE
BIOS
JPWR8
LICENSE
S-SATA0
P2-DIMMB2
P2-DIMMB1
P2-DIMMC2
P2-DIMMC1
Pin# Defi nition
1 Ground
2 Ground
3 Button In
4 Button In
1
VGA
LAN2
COM1
LAN
CTRL
BMC
LEDM1
J34
SMCI-Proprietary PCI-E x24 Slot
PCH
BT1
JS1
SATA0-3 SATA4-7
BATTERY
UID Switch
Pin Defi nitions
USB1/2 (3.0)
IPMI_LAN
LAN1
USB3/4
(3.0)
JNCSI
JSDCARD1
JM2-1
SD CARD
JP2
JTPM1
BIOS
LED1
SMCI-Proprietary PCI-E x24 Slot
SMCI-Proprietary PCI-E x24 Slot
J32
J31J33
JBT1
JS2
X11DPG-OT-CPU
REV:1.00
USB0
P1-DIMMF2
P1-DIMME1
P1-DIMME2
JPWR9
P1-DIMMD1
P1-DIMMD2
CPU1
JPW21
JPWR10
P1-DIMMA2
P1-DIMMA1
P1-DIMMB2
FAN8
JPWR
11
P1-DIMMB1
P1-DIMMC2
P1-DIMMC1
F
AN7
JPWR12
JPWR13
Pin Defi nitions
Color Status
Blue: On Unit Identifi ed
JPW22
JPWR15
JPWR14
JPWR16
FAN10
JNVI2C1
JPW12JPW11
FAN6
FAN5
UID LED
1. UID Switch
2. Rear UID LED (LE1)
3. Front UID LED
3.3V
UID LED
3.3V Stby
3.3V Stby
3.3V Stby
3.3V
NMI
X
12
19
20
Ground
Ground
Power Fail LED
OH/Fan Fail LED
NIC2 Active LED
NIC1 Active LED
HDD LED
PWR LED
Ground
PWR
Reset
PowerButton
Reset Button
3
X
1
38
Page 39
Chapter 2: Installation
2.6 Front Control Panel
JF1 contains header pins for various buttons and indicators that are normally located on a
control panel at the front of the chassis. These connectors are designed specifi cally for use
with Supermicro chassis. See the fi gure below for the descriptions of the front control panel
buttons and LED indicators.
JUIDB1
UID
VGA
LE1
COM1
LAN
CTRL
JPME1
JPG1
LEDM1
SMCI-Proprietary PCI-E x24 Slot
J34
SMCI-Proprietary PCI-E x24 Slot
USB1/2 (3.0)
IPMI_LAN
LAN1
LAN2
USB3/4
(3.0)
JNCSI
JSDCARD1
JM2-1
SD CARD
BMC
PCH
JTPM1
BIOS
SMCI-Proprietary PCI-E x24 Slot
J32
JBT1
JP2
LED1
SMCI-Proprietary PCI-E x24 Slot
J31J33
JPW19 JPW20
JPWR3
JPWR2
JPWR1
FAN9
CN11
CN10
JNVI2C2
JRK1
JWD1
JF1
LE2
JIPMB1
JL1
FAN3
FAN4
JPWR4
FAN2
PWR
Reset
IPMI CODE
BIOS
BT1
JS1
SATA0-3 SATA4-7
JS2
X11DPG-OT-CPU
REV:1.00
JPWR5
P2-DIMMF2
P2-DIMME1
P2-DIMME2
P2-DIMMD1
P2-DIMMD2
FAN1
JPWR6
CPU2
JPWR7
P2-DIMMA2
P2-DIMMA1
JPWR8
S-SATA0
P2-DIMMB2
P2-DIMMB1
P2-DIMMC2
P2-DIMMC1
LICENSE
BATTERY
Figure 2-3. JF1 Header Pins
12
Power Button
Reset Button
3.3V
UID LED
JPW21
JPWR9
JPWR10
USB0
CPU1
P1-DIMMF2
P1-DIMME1
P1-DIMME2
P1-DIMMD1
P1-DIMMD2
Ground
Ground
Power Fail LED
OH/Fan Fail LED
P1-DIMMA2
P1-DIMMA1
P1-DIMMB2
P1-DIMMB1
FAN8
JPWR
11
P1-DIMMC2
P1-DIMMC1
F
AN7
JPWR12
JPWR13
JPW22
JPWR14
JPWR16
FAN6
JPWR15
FAN10
JNVI2C1
JPW12JPW11
FAN5
3.3V Stby
3.3V Stby
3.3V Stby
3.3V
NMI
NIC2 Active LED
NIC1 Active LED
HDD LED
PWR LED
X
X
Ground
19
20
39
Page 40
Super X11DPG-OT-CPU User's Manual
Power Button
The Power Button connection is located on pins 1 and 2 of JF1. Momentarily contacting both
pins will power on/off the system. This button can also be confi gured to function as a suspend
button (with a setting in the BIOS - see Chapter 4). To turn off the power when the system
is in suspend mode, press the button for 4 seconds or longer. Refer to the table below for
pin defi nitions.
Power Button
Pin Defi nitions (JF1)
Pins Defi nition
1 Signal
2 Ground
Reset Button
The Reset Button connection is located on pins 3 and 4 of JF1. Attach it to a hardware reset
switch on the computer case to reset the system. Refer to the table below for pin defi nitions.
JPW19 JPW20
JPWR2
JPWR1
FAN9
CN11
CN10
JNVI2C2
JRK1
JWD1
JF1
LE2
JIPMB1
JL1
FAN3
FAN4
Reset Button
Pin Defi nitions (JF1)
Pins Defi nition
3 Reset
4 Ground
JUIDB1
UID
VGA
LE1
COM1
LAN
CTRL
JPME1
JPG1
SMCI-Proprietary PCI-E x24 Slot
J34
SMCI-Proprietary PCI-E x24 Slot
IPMI CODE
BIOS
BT1
JPWR7
JPWR6
JPWR8
CPU2
P2-DIMMD2
P2-DIMMA2
P2-DIMMA1
P2-DIMMB2
S-SATA0
P2-DIMMB1
P2-DIMMC2
P2-DIMMC1
LICENSE
BATTERY
JPWR3
JPWR4
JPWR5
P2-DIMMF2
P2-DIMME1
P2-DIMME2
P2-DIMMD1
FAN2
FAN1
LAN2
BMC
LEDM1
PCH
JS1
SATA0-3 SATA4-7
LAN1
JSDCARD1
SD CARD
JBT1
BIOS
JS2
USB1/2 (3.0)
IPMI_LAN
USB3/4
(3.0)
JNCSI
JM2-1
JP2
JTPM1
LED1
SMCI-Proprietary PCI-E x24 Slot
J32
J31J33
X11DPG-OT-CPU
REV:1.00
SMCI-Proprietary PCI-E x24 Slot
JPW21
JPWR9
JPWR10
USB0
CPU1
P1-DIMMF2
P1-DIMME1
P1-DIMME2
P1-DIMMD1
P1-DIMMD2
P1-DIMMA2
P1-DIMMA1
P1-DIMMB2
FAN8
JPWR
11
P1-DIMMB1
P1-DIMMC2
F
AN7
JPWR12
P1-DIMMC1
JPWR13
JPWR14
1. PWR Button
2. Reset Button
12
1
PWR
Power Button
2
Reset
ResetButton
3.3V
JPW22
JPWR15
JPWR16
FAN10
JNVI2C1
UID LED
3.3V Stby
3.3V Stby
3.3V Stby
3.3V
JPW12JPW11
FAN6
FAN5
X
NMI
19
Ground
Ground
Power Fail LED
OH/Fan Fail LED
NIC2 Active LED
NIC1 Active LED
HDD LED
PWR LED
X
Ground
20
40
Page 41
Chapter 2: Installation
Power Fail LED
The Power Fail LED connection is located on pins 5 and 6 of JF1. Refer to the table below
for pin defi nitions.
Power Fail LED
Pin Defi nitions (JF1)
Pin# Defi nition
5 3.3V
6 PWR Supply Fail
Overheat/Fan Fail/UID LED
Connect an LED cable to pins 7 and 8 of the Front Control Panel to use the Overheat/Fan Fail
LED/UID LED connections. The LED on pin 8 provides warnings of overheat or fan failure.
Refer to the tables below for Overheat/Fan Fail LED and pin defi nitions.
JPW19 JPW20
JPWR3
JPWR2
JPWR1
FAN9
CN11
CN10
JNVI2C2
JRK1
JWD1
JF1
LE2
JIPMB1
JL1
FAN3
FAN4
OH/Fan Fail LED
Pin Defi nitions (JF1)
Pin# Defi nition
7 Blue LED
8 OH/Fan Fail LED
OH/Fan Fail Indicator
Status
State Defi nition
Off Normal
On Overheat
Flashing Fan Fail
JUIDB1
UID
VGA
LE1
COM1
LAN
CTRL
JPME1
JPG1
SMCI-Proprietary PCI-E x24 Slot
J34
SMCI-Proprietary PCI-E x24 Slot
IPMI CODE
BIOS
BT1
JPWR7
JPWR6
JPWR8
JPWR4
JPWR5
LICENSE
S-SATA0
BATTERY
CPU2
LAN2
BMC
LEDM1
PCH
JS1
SATA0-3 SATA4-7
LAN1
JSDCARD1
SD CARD
JBT1
BIOS
JS2
USB1/2 (3.0)
IPMI_LAN
USB3/4
(3.0)
JNCSI
JM2-1
JP2
JTPM1
LED1
SMCI-Proprietary PCI-E x24 Slot
SMCI-Proprietary PCI-E x24 Slot
J32
J31J33
X11DPG-OT-CPU
REV:1.00
PWR
Power Button
Reset
JPW21
JPWR9
JPWR10
USB0
CPU1
JPW22
JPWR13
JPWR14
JPWR16
JPWR15
FAN10
JNVI2C1
JPWR12
JPWR
11
Reset Button
UID LED
3.3V Stby
3.3V Stby
3.3V Stby
P2-DIMMF2
P2-DIMME1
P2-DIMME2
P2-DIMMD1
P2-DIMMD2
P2-DIMMA2
P2-DIMMA1
P2-DIMMB2
P2-DIMMB1
P2-DIMMC2
P2-DIMMC1
FAN2
FAN1
P1-DIMMF2
P1-DIMME1
P1-DIMME2
P1-DIMMD1
P1-DIMMD2
P1-DIMMA2
P1-DIMMA1
P1-DIMMB2
FAN8
P1-DIMMB1
P1-DIMMC2
F
AN7
P1-DIMMC1
JPW12JPW11
FAN6
FAN5
1. Power Fail LED
2. UID/OH/Fan Fail LED
12
Ground
Ground
3.3V
3.3V
NMI
X
19
20
Power Fail LED
OH/Fan Fail LED
NIC2 Active LED
NIC1 Active LED
HDD LED
PWR LED
X
Ground
1
2
41
Page 42
Super X11DPG-OT-CPU User's Manual
NIC1/NIC2 (LAN1/LAN2)
The NIC (Network Interface Controller) LED connection for LAN port 1 is located on pins
11 and 12 of JF1, and LAN port 2 is on pins 9 and 10. Attach the NIC LED cables here to
display network activity. Refer to the table below for pin defi nitions.
LAN1/LAN2 LED
Pin Defi nitions (JF1)
Pin# Defi nition
9 NIC 2 Activity LED
11 NIC 1 Activity LED
HDD LED
The HDD LED connection is located on pins 13 and 14 of JF1. Attach a cable to pin 14 to
show hard drive activity status. Refer to the table below for pin defi nitions.
JPW19 JPW20
JPWR3
JPWR2
JPWR1
FAN9
CN11
CN10
JNVI2C2
JRK1
JWD1
JF1
LE2
JIPMB1
JL1
FAN3
FAN4
HDD LED
Pin Defi nitions (JF1)
Pins Defi nition
13 3.3V Stdby
14 HDD Active
JUIDB1
UID
VGA
LE1
COM1
LAN
CTRL
JPME1
JPG1
SMCI-Proprietary PCI-E x24 Slot
J34
SMCI-Proprietary PCI-E x24 Slot
IPMI CODE
BIOS
BT1
JPWR7
JPWR6
JPWR8
JPWR4
JPWR5
LICENSE
S-SATA0
BATTERY
CPU2
LAN2
BMC
LEDM1
PCH
JS1
SATA0-3 SATA4-7
LAN1
JSDCARD1
SD CARD
JBT1
BIOS
JS2
USB1/2 (3.0)
IPMI_LAN
USB3/4
(3.0)
JNCSI
JM2-1
JP2
JTPM1
LED1
SMCI-Proprietary PCI-E x24 Slot
SMCI-Proprietary PCI-E x24 Slot
J32
J31J33
X11DPG-OT-CPU
REV:1.00
PWR
Power Button
Reset
JPW21
JPWR9
JPWR10
USB0
CPU1
JPW22
JPWR13
JPWR14
JPWR16
JPWR15
FAN10
JNVI2C1
JPWR12
JPWR
11
Reset Button
UID LED
3.3V Stby
3.3V Stby
3.3V Stby
P2-DIMMF2
P2-DIMME1
P2-DIMME2
P2-DIMMD1
P2-DIMMD2
P2-DIMMA2
P2-DIMMA1
P2-DIMMB2
P2-DIMMB1
P2-DIMMC2
P2-DIMMC1
FAN2
FAN1
P1-DIMMF2
P1-DIMME1
P1-DIMME2
P1-DIMMD1
P1-DIMMD2
P1-DIMMA2
P1-DIMMA1
P1-DIMMB2
FAN8
P1-DIMMB1
P1-DIMMC2
P1-DIMMC1
F
AN7
JPW12JPW11
FAN6
FAN5
1. NIC2 LED
2. NIC1 LED
3. HDD LED
12
3.3V
3.3V
X
NMI
19
20
Ground
Ground
Power Fail LED
OH/Fan Fail LED
NIC2 Active LED
NIC1 Active LED
HDD LED
PWR LED
X
Ground
1
2
3
42
Page 43
Chapter 2: Installation
Power LED
The Power LED connection is located on pins 15 and 16 of JF1. Refer to the table below
for pin defi nitions.
Power LED
Pin Defi nitions (JF1)
Pins Defi nition
15 3.3V
16 PWR LED
NMI Button
The non-maskable interrupt (NMI) button header is located on pins 19 and 20 of JF1. Refer
to the table below for pin defi nitions.
NMI Button
Pin Defi nitions (JF1)
Pins Defi nition
19 Control
20 Ground
JPW19 JPW20
JPWR3
JPWR2
JPWR1
FAN9
CN11
CN10
JNVI2C2
JRK1
JWD1
JF1
LE2
JIPMB1
JL1
FAN3
FAN4
JUIDB1
UID
VGA
LE1
COM1
LAN
CTRL
JPME1
JPG1
SMCI-Proprietary PCI-E x24 Slot
J34
SMCI-Proprietary PCI-E x24 Slot
IPMI CODE
BIOS
BT1
JPWR7
JPWR6
JPWR8
CPU2
P2-DIMMD2
P2-DIMMA2
P2-DIMMA1
P2-DIMMB2
S-SATA0
P2-DIMMB1
P2-DIMMC2
LICENSE
BATTERY
P2-DIMMC1
JPWR4
JPWR5
P2-DIMMF2
P2-DIMME1
P2-DIMME2
P2-DIMMD1
FAN2
FAN1
LAN2
BMC
LEDM1
PCH
JS1
SATA0-3 SATA4-7
LAN1
JSDCARD1
SD CARD
JBT1
BIOS
JS2
USB1/2 (3.0)
IPMI_LAN
USB3/4
(3.0)
JNCSI
JM2-1
JP2
JTPM1
LED1
SMCI-Proprietary PCI-E x24 Slot
J32
J31J33
X11DPG-OT-CPU
REV:1.00
SMCI-Proprietary PCI-E x24 Slot
JPW21
JPWR9
JPWR10
USB0
CPU1
P1-DIMMF2
P1-DIMME1
P1-DIMME2
P1-DIMMD1
P1-DIMMD2
P1-DIMMA2
P1-DIMMA1
P1-DIMMB2
FAN8
JPWR
11
P1-DIMMB1
P1-DIMMC2
P1-DIMMC1
F
AN7
JPWR12
JPWR13
JPWR14
1. PWR LED
2. NMI
12
PWR
Power Button
Reset
Reset Button
3.3V
JPW22
JPWR15
JPWR16
FAN10
JNVI2C1
UID LED
3.3V Stby
3.3V Stby
3.3V Stby
3.3V
JPW12JPW11
FAN6
FAN5
X
NMI
2
19
20
Ground
Ground
Power Fail LED
OH/Fan Fail LED
NIC2 Active LED
NIC1 Active LED
HDD LED
PWR LED
X
Ground
1
43
Page 44
Super X11DPG-OT-CPU User's Manual
2.7 Connectors and Headers
SMCI-Proprietary Power Connectors
SMCI-Propietary Power Connectors
Four SMCI proprietary power supplies are located at JPW19/JPW20 and JPW21/JPW22
on the motherboard. This connectors are reserved for an SMCI proprietary server use only.
1
JPW19 JPW20
JPWR3
JPWR2
JPWR1
FAN9
CN11
CN10
JNVI2C2
JRK1
JWD1
JF1
LE2
JIPMB1
JL1
FAN3
FAN4
JPWR4
JPWR5
P2-DIMMF2
FAN2
JPWR6
P2-DIMME1
P2-DIMME2
P2-DIMMD1
P2-DIMMD2
FAN1
2
CPU2
JPWR7
P2-DIMMA2
P2-DIMMA1
JPWR8
P2-DIMMB2
JUIDB1
UID
VGA
LE1
COM1
JPME1
JPG1
SMCI-Proprietary PCI-E x24 Slot
IPMI CODE
BIOS
BT1
LICENSE
S-SATA0
BATTERY
P2-DIMMB1
P2-DIMMC2
P2-DIMMC1
LAN1
LAN2
LAN
CTRL
JSDCARD1
SD CARD
BMC
LEDM1
J34
SMCI-Proprietary PCI-E x24 Slot
JBT1
PCH
JS1
SATA0-3 SATA4-7
USB1/2 (3.0)
IPMI_LAN
USB3/4
(3.0)
JNCSI
JM2-1
JTPM1
BIOS
SMCI-Proprietary PCI-E x24 Slot
J32
JS2
X11DPG-OT-CPU
REV:1.00
JP2
LED1
SMCI-Proprietary PCI-E x24 Slot
J31J33
JPWR9
USB0
P1-DIMMF2
P1-DIMME1
P1-DIMME2
P1-DIMMD1
P1-DIMMD2
JPW21
JPWR10
CPU1
P1-DIMMA2
P1-DIMMA1
P1-DIMMB2
FAN8
JPWR
11
P1-DIMMB1
P1-DIMMC2
P1-DIMMC1
F
AN7
JPWR12
1. JWP19 (SMCI PWRConnecor 19)
2. JWP20 (SMCI PWRConnecor 20)
3. JWP21 (SMCI PWRConnecor 21)
4. JWP22 (SMCI PWRConnecor 22)
43
JPW22
JPWR13
JPWR14
JPWR16
JPW12JPW11
FAN6
JPWR15
FAN10
JNVI2C1
FAN5
44
Page 45
Chapter 2: Installation
12V 8-pin System Power Connectors
Sixteen 8-pin 12V power connectors are located at (JPWR1-JPWR8, JPWR9-JPWR16) on
the motherboard to provide power to system components. Refer to the table below for pin
defi nitions.
12V 8-pin Power
Pin Defi nitions
Pin# Defi nition
1 - 4 Ground
5 - 8 +12V
12V 8-pin CPU Power Connectors
Two 8-pin 12V power connectors (JPW11/JPW12) are located on the motherboard to provide
power to the processors. Refer to the table below for pin defi nitions.
Pin# Defi nition
1 - 4 Ground
5 - 8 +12V
JUIDB1
UID
VGA
LE1
COM1
LAN
CTRL
JPME1
JPG1
LEDM1
SMCI-Proprietary PCI-E x24 Slot
J34
SMCI-Proprietary PCI-E x24 Slot
LAN2
BMC
PCH
LAN1
JSDCARD1
SD CARD
JBT1
BIOS
USB3/4
(3.0)
USB1/2 (3.0)
IPMI_LAN
JNCSI
JM2-1
JP2
JTPM1
LED1
SMCI-Proprietary PCI-E x24 Slot
SMCI-Proprietary PCI-E x24 Slot
J32
J31J33
1. JPWR1
2. JPWR2
3. JPWR3
4. JPWR4
5. JPWR5
6. JPWR6
7. JPWR7
8. JPWR8
9. JPWR9
JPW19 JPW20
IPMI CODE
BIOS
BT1
JS1
JPWR7
JPWR6
JPWR8
P2-DIMMA2
P2-DIMMA1
P2-DIMMB2
P2-DIMMB1
LICENSE
S-SATA0
P2-DIMMC2
P2-DIMMC1
BATTERY
JPWR3
JPWR4
JPWR2
2
JPWR1
3
1
FAN9
CN11
CN10
JNVI2C2
JRK1
JWD1
JF1
LE2
JIPMB1
JL1
FAN3
FAN4
JPWR5
FAN2
P2-DIMMF2
P2-DIMME1
P2-DIMME2
P2-DIMMD1
FAN1
CPU2
P2-DIMMD2
JS2
SATA0-3 SATA4-7
X11DPG-OT-CPU
REV:1.00
JPWR9
USB0
P1-DIMMF2
P1-DIMME1
P1-DIMME2
P1-DIMMD1
JPW21
JPWR10
987654
CPU1
P1-DIMMD2
10
P1-DIMMA2
P1-DIMMA1
P1-DIMMB2
P1-DIMMB1
FAN8
JPWR
11
11
P1-DIMMC2
P1-DIMMC1
F
AN7
JPWR12
12
JPWR13
13
JPW22
JPWR14
14
JPWR16
JPW12JPW11
FAN6
10. JPWR10
JPWR15
11. JPWR11
15
16
FAN10
JNVI2C1
12. JPWR12
13. JPWR13
14. JPWR14
15. JPWR15
16. JPWR16
17
17. JPW11 (CPU PWR)
18
18. JPW12 (CPU PWR)
FAN5
45
Page 46
Super X11DPG-OT-CPU User's Manual
Headers
Onboard Fan Headers
There are ten onboard fan headers (FAN1-FAN10) is located on the motherboard. FAN1FAN8 are used for system cooling, and FAN9/FAN10 are used as Active CPU heatsink fans.
All onboard fans are 4-pin fan headers, whic h are back ward compatible with traditional 3-pin
fans. However, only 4-pin fans can support fan speed control (via Hardware Monitoring in the
BMC). Please use all 3-pin fans or all 4-pin fans on the same mother board.
Fan Header
Pin Defi nitions
Pin# Defi nition
1 Ground (Black)
2 +12V (Red)
3 Tachometer
4 PWM Control
JPW19 JPW20
JPWR2
JPWR1
FAN9
CN11
CN10
JNVI2C2
JRK1
JWD1
JF1
LE2
JIPMB1
JL1
FAN3
3
FAN4
4
JUIDB1
UID
VGA
LE1
COM1
LAN
CTRL
JPME1
JPG1
LEDM1
SMCI-Proprietary PCI-E x24 Slot
J34
SMCI-Proprietary PCI-E x24 Slot
LAN2
BMC
LAN1
JSDCARD1
SD CARD
BIOS
USB3/4
(3.0)
USB1/2 (3.0)
IPMI_LAN
JNCSI
JM2-1
JP2
JTPM1
LED1
SMCI-Proprietary PCI-E x24 Slot
SMCI-Proprietary PCI-E x24 Slot
J32
J31J33
1. FAN1
2. FAN2
3. FAN3
4. FAN4
5. FAN5
6. FAN6
JBT1
PCH
7. FAN7
8. FAN8
9. FAN9
IPMI CODE
BIOS
BT1
JS1
JPWR7
JPWR6
JPWR8
JPWR3
JPWR4
JPWR5
LICENSE
S-SATA0
BATTERY
9
CPU2
P2-DIMMF2
P2-DIMME1
P2-DIMME2
P2-DIMMD1
P2-DIMMD2
P2-DIMMA2
P2-DIMMA1
P2-DIMMB2
P2-DIMMB1
P2-DIMMC2
P2-DIMMC1
FAN2
FAN1
JS2
SATA0-3 SATA4-7
X11DPG-OT-CPU
REV:1.00
JPWR9
USB0
P1-DIMMF2
P1-DIMME1
P1-DIMME2
P1-DIMMD1
JPW21
JPWR10
CPU1
P1-DIMMD2
P1-DIMMA2
P1-DIMMA1
P1-DIMMB2
FAN8
JPWR
11
P1-DIMMB1
P1-DIMMC2
F
AN7
JPWR12
P1-DIMMC1
JPWR13
JPW22
JPWR14
FAN6
JPWR15
10. FAN10
JPWR16
FAN10
10
JNVI2C1
JPW12JPW11
FAN5
1
2
8 7 6 5
46
Page 47
Chapter 2: Installation
TPM Header
The JTPM1 header is used to connect Trusted Platform Module (TPM)/Port 80, which is
available from Supermicro (optional). The TPM/Port 80 connector is a security device that
supports encryption and authentication in hard drives. It allows the motherboard to deny
access if the TPM associated with the hard drive is not installed in the system. See the table
below for pin defi nitions.
Trusted Platform Module/Port 80 Header
Pin Defi nitions
Pin# Defi nition Pin# Defi nition
1 P3V3 2 SPI_TPM_CS_N
3 PCI_RESET_N 4 SPI_PCH_MISO
5 SPI_PCH_CLK 6 Ground
7 SPI_PCH_MOSI 8 x
9 P3V3_STBY 10 IRQ_TPM_SPI_N
JUIDB1
UID
VGA
LE1
COM1
LAN
CTRL
JPME1
JPG1
LEDM1
SMCI-Proprietary PCI-E x24 Slot
J34
SMCI-Proprietary PCI-E x24 Slot
LAN2
BMC
LAN1
JSDCARD1
SD CARD
BIOS
USB3/4
(3.0)
USB1/2 (3.0)
IPMI_LAN
JNCSI
JM2-1
JP2
JTPM1
LED1
SMCI-Proprietary PCI-E x24 Slot
SMCI-Proprietary PCI-E x24 Slot
J32
J31J33
1. TPM/Port 80 Header
JBT1
PCH
JPW19 JPW20
IPMI CODE
BIOS
BT1
JS1
JPWR7
JPWR6
JPWR8
P2-DIMMA2
P2-DIMMA1
P2-DIMMB2
P2-DIMMB1
LICENSE
S-SATA0
P2-DIMMC2
P2-DIMMC1
BATTERY
JPWR3
JPWR4
JPWR2
JPWR1
FAN9
CN11
CN10
JNVI2C2
JRK1
JWD1
JF1
LE2
JIPMB1
JL1
FAN3
3
FAN4
4
JPWR5
9
CPU2
P2-DIMMF2
P2-DIMME1
P2-DIMME2
P2-DIMMD1
P2-DIMMD2
FAN2
FAN1
1
2
JS2
SATA0-3 SATA4-7
X11DPG-OT-CPU
REV:1.00
JPWR9
USB0
P1-DIMMF2
P1-DIMME1
P1-DIMME2
P1-DIMMD1
JPW21
JPWR12
JPWR
JPWR10
11
CPU1
P1-DIMMD2
P1-DIMMA2
P1-DIMMA1
P1-DIMMB2
P1-DIMMB1
P1-DIMMC2
P1-DIMMC1
FAN8
F
AN7
8 7 6 5
JPWR13
JPW22
JPWR14
JPWR16
JPW12JPW11
FAN6
JPWR15
FAN10
10
JNVI2C1
FAN5
47
Page 48
Super X11DPG-OT-CPU User's Manual
RAID Key Header
A RAID Key header is located at JRK1 on the motherboard. RAID key is used to support
NVMe solid state devices (SSD). Please refer to the layout below for JRK1 location.
RAID Key Header
Pin Defi nitions
Pin# Defi nition
1 Ground
2 P3V3_STBY
3 Ground
4 RAID_KEY
Chassis Intrusion
A Chassis Intrusion header is located at JL1 on the motherboard. Attach the appropriate cable
from the chassis to inform you of a chassis intrusion when the chassis is opened. Refer to
the table below for pin defi nitions.
Chassis Intrusion
Pin Defi nitions
Pin# Defi nition
1 Intrusion Input
2 Ground
JUIDB1
UID
VGA
COM1
LAN
CTRL
LEDM1
J34
SMCI-Proprietary PCI-E x24 Slot
BT1
BATTERY
LAN2
BMC
PCH
JS1
SATA0-3 SATA4-7
LE1
JPME1
JPG1
SMCI-Proprietary PCI-E x24 Slot
JPW19 JPW20
IPMI CODE
BIOS
JPWR7
JPWR6
JPWR8
P2-DIMMA2
P2-DIMMA1
P2-DIMMB2
P2-DIMMB1
LICENSE
S-SATA0
P2-DIMMC2
P2-DIMMC1
JPWR3
JPWR4
JPWR2
JPWR1
FAN9
CN11
CN10
JNVI2C2
JRK1
1
JWD1
JF1
LE2
JIPMB1
JL1
2
FAN3
FAN4
JPWR5
FAN2
P2-DIMMF2
P2-DIMME1
P2-DIMME2
FAN1
CPU2
P2-DIMMD1
P2-DIMMD2
LAN1
JSDCARD1
SD CARD
JBT1
JS2
USB3/4
(3.0)
BIOS
J32
X11DPG-OT-CPU
REV:1.00
USB1/2 (3.0)
IPMI_LAN
JNCSI
JM2-1
JP2
JTPM1
LED1
SMCI-Proprietary PCI-E x24 Slot
SMCI-Proprietary PCI-E x24 Slot
J31J33
JPWR9
USB0
P1-DIMMF2
P1-DIMME1
P1-DIMME2
P1-DIMMD1
P1-DIMMD2
JPW21
JPWR10
CPU1
P1-DIMMA2
P1-DIMMA1
P1-DIMMB2
FAN8
JPWR
11
P1-DIMMB1
P1-DIMMC2
P1-DIMMC1
F
AN7
JPWR12
JPWR13
JPW22
JPWR14
JPWR16
JPW12JPW11
FAN6
1. RAID Key
2. Chassis Intrusion
JPWR15
FAN10
JNVI2C1
FAN5
48
Page 49
Chapter 2: Installation
Serial Port
A serial port header is located at COM1 on the motherboard. This header provides serial
communication support for your system. See the table below for pin defi nitions.
Serial Port
Pin Defi nitions
Pin# Defi nition Pin# Defi nition
1 DCD 6 DSR
2 RXD 7 RTS
3 TXD 8 CTS
4 DTR 9 RI
5 Ground 10 N/A
JPW19 JPW20
JPWR3
JPWR2
JPWR1
FAN9
CN11
CN10
JNVI2C2
JRK1
JWD1
JF1
LE2
JIPMB1
JL1
FAN3
FAN4
JPWR4
JPWR5
FAN2
P2-DIMMF2
P2-DIMME1
P2-DIMME2
P2-DIMMD1
FAN1
JPWR6
CPU2
P2-DIMMD2
JPWR7
P2-DIMMA2
P2-DIMMA1
JPWR8
P2-DIMMB2
JUIDB1
UID
VGA
LE1
COM1
1
JPME1
JPG1
SMCI-Proprietary PCI-E x24 Slot
IPMI CODE
BIOS
BT1
LICENSE
S-SATA0
BATTERY
P2-DIMMB1
P2-DIMMC2
P2-DIMMC1
LAN1
LAN2
LAN
CTRL
JSDCARD1
SD CARD
BMC
LEDM1
J34
SMCI-Proprietary PCI-E x24 Slot
JBT1
PCH
JS1
SATA0-3 SATA4-7
USB1/2 (3.0)
IPMI_LAN
USB3/4
(3.0)
JNCSI
JM2-1
JTPM1
BIOS
LED1
SMCI-Proprietary PCI-E x24 Slot
J32
JS2
X11DPG-OT-CPU
REV:1.00
JP2
SMCI-Proprietary PCI-E x24 Slot
J31J33
JPW21
JPWR9
JPWR10
USB0
CPU1
P1-DIMMF2
P1-DIMME1
P1-DIMME2
P1-DIMMD1
P1-DIMMD2
P1-DIMMA2
P1-DIMMA1
P1-DIMMB2
P1-DIMMB1
FAN8
JPWR
11
P1-DIMMC2
P1-DIMMC1
F
AN7
JPWR12
JPWR13
JPW22
JPWR14
JPWR16
FAN6
1. Serial Port
JPWR15
FAN10
JNVI2C1
JPW12JPW11
FAN5
49
Page 50
Super X11DPG-OT-CPU User's Manual
System Management Bus (SMBus) Header
2
A SMBus (I
to use the IPMB I
C) header for IPMI 2.0 is located at JIPMB1. Connect the appropriate cable here
2
C connection on your system. Refer to the table below for pin defi nitions.
External I2C Header
Pin# Defi nition
1 Data
2 Ground
3 Clock
4 No Connection
Pin Defi nitions
JUIDB1
UID
VGA
LE1
JPME1
JPG1
SMCI-Proprietary PCI-E x24 Slot
JPW19 JPW20
IPMI CODE
BIOS
JPWR7
JPWR6
JPWR8
P2-DIMMA2
P2-DIMMA1
P2-DIMMB2
P2-DIMMB1
LICENSE
S-SATA0
P2-DIMMC2
P2-DIMMC1
JPWR3
JPWR4
JPWR2
JPWR1
FAN9
CN11
CN10
JNVI2C2
JRK1
JWD1
JF1
LE2
JIPMB1
JL1
1
FAN3
FAN4
JPWR5
FAN2
P2-DIMMF2
P2-DIMME1
P2-DIMME2
FAN1
CPU2
P2-DIMMD1
P2-DIMMD2
LAN2
COM1
LAN
CTRL
LEDM1
J34
SMCI-Proprietary PCI-E x24 Slot
BT1
SATA0-3 SATA4-7
BATTERY
BMC
PCH
JS1
LAN1
JSDCARD1
SD CARD
JBT1
JS2
BIOS
USB3/4
(3.0)
J32
X11DPG-OT-CPU
REV:1.00
USB1/2 (3.0)
IPMI_LAN
JNCSI
JM2-1
JP2
JTPM1
LED1
SMCI-Proprietary PCI-E x24 Slot
SMCI-Proprietary PCI-E x24 Slot
J31J33
JPWR9
USB0
P1-DIMMF2
P1-DIMME1
P1-DIMME2
P1-DIMMD1
P1-DIMMD2
JPW21
JPWR10
CPU1
P1-DIMMA2
P1-DIMMA1
P1-DIMMB2
P1-DIMMB1
FAN8
JPWR
11
P1-DIMMC2
P1-DIMMC1
F
AN7
JPWR12
JPWR13
JPW22
JPWR14
JPWR16
FAN6
1. SMBus (JIPMB1)
JPWR15
FAN10
JNVI2C1
JPW12JPW11
FAN5
50
Page 51
Chapter 2: Installation
NVMe SMBus Headers
2
NVMe SMBus (I
C) headers (JNVI2C1/JNVI2C2), used for PCI-E SMBus clock and data
connections, provide hot-plug support via dedicated SMBus interface. This feature is only
available for a Supermicro complete system with an SMCI-proprietary NVMe add-on card
and cable installed for each NVMe SMBus header supported. See the table below for pin
defi nitions.
NVMe SMBus Header
Pin Defi nitions
Pin# Defi nition
1 Data
2 Ground
3 Clock
4 VCCIO
PCI-E M.2 Slot
This motherboard has one PCI-E M.2 slot. M.2 was formerly Next Generation Form Factor
(NGFF) and serves to replace mini PCI-E. M.2 allows for a variety of card sizes, increased
functionality, and spatial effi ciency. The M.2 socket on the motherboard supports PCI-E 3.0
X4 (32 Gb/s) SSD cards in the 2260, 2280 and 22110 form factors.
JUIDB1
UID
VGA
COM1
CTRL
LAN2
LAN
LE1
LAN1
JSDCARD1
SD CARD
USB3/4
(3.0)
USB1/2 (3.0)
IPMI_LAN
JNCSI
JM2-1
1. JNVI2C1
2. JNVI
2
C2
3. PCI-E M.2 Slot
3
JPME1
JPG1
SMCI-Proprietary PCI-E x24 Slot
JPW19 JPW20
IPMI CODE
BIOS
JPWR7
JPWR6
JPWR8
P2-DIMMA2
P2-DIMMA1
P2-DIMMB2
P2-DIMMB1
LICENSE
S-SATA0
P2-DIMMC2
P2-DIMMC1
JPWR3
JPWR4
JPWR2
JPWR1
FAN9
CN11
CN10
JNVI2C2
JRK1
JWD1
JF1
LE2
JIPMB1
JL1
2
FAN3
FAN4
JPWR5
FAN2
P2-DIMMF2
P2-DIMME1
P2-DIMME2
P2-DIMMD1
FAN1
CPU2
P2-DIMMD2
BMC
LEDM1
J34
SMCI-Proprietary PCI-E x24 Slot
PCH
BT1
JS1
SATA0-3 SATA4-7
BATTERY
BIOS
JBT1
JS2
X11DPG-OT-CPU
REV:1.00
JTPM1
J32
JP2
LED1
SMCI-Proprietary PCI-E x24 Slot
SMCI-Proprietary PCI-E x24 Slot
J31J33
JPWR9
USB0
CPU1
P1-DIMMF2
P1-DIMME1
P1-DIMME2
P1-DIMMD1
P1-DIMMD2
JPW21
JPWR10
P1-DIMMA2
P1-DIMMA1
P1-DIMMB2
P1-DIMMB1
FAN8
JPWR
11
P1-DIMMC2
P1-DIMMC1
F
AN7
JPWR12
JPWR13
JPW22
JPWR14
JPWR16
JPW12JPW11
FAN6
JPWR15
FAN10
1
JNVI2C1
FAN5
51
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Super X11DPG-OT-CPU User's Manual
S-SATA 3.0 and (I-)SATA 3.0 Connections
This motherboard has one S-SATA 3.0 port (S-SATA0) and two (I-)SATA 3.0 headers (JS1/
JS2) onboard. The two SATA 3.0 headers provide eight SATA connections (SATA 0-3, 4-7). In
addition to SATA 3.0 support, S-SATA0 can also be used with Supermicro SuperDOM, which
is a yellow SATA DOM connector with a power pin built in. SuperDOM does not require a
power cable and is backward-compatible with regular a standard SATA HDD or a third-party
SA TA DOM that requires external power cables for power supply. All these SATA ports provide
serial-link signal connections, which are faster than the connections of Parallel ATA.
JPW19 JPW20
JPWR3
JPWR2
JPWR1
FAN9
CN11
CN10
JNVI2C2
JRK1
JWD1
JF1
LE2
JIPMB1
JL1
FAN3
FAN4
JPWR4
JPWR5
P2-DIMMF2
FAN2
P2-DIMME1
P2-DIMME2
P2-DIMMD1
P2-DIMMD2
FAN1
JPWR6
CPU2
JPWR7
P2-DIMMA2
P2-DIMMA1
JUIDB1
UID
LE1
JPME1
JPG1
SMCI-Proprietary PCI-E x24 Slot
IPMI CODE
BIOS
JPWR8
LICENSE
1
S-SATA0
P2-DIMMB2
P2-DIMMB1
P2-DIMMC2
P2-DIMMC1
VGA
COM1
LAN
CTRL
LEDM1
J34
SMCI-Proprietary PCI-E x24 Slot
BT1
BATTERY
LAN1
LAN2
JSDCARD1
SD CARD
BMC
JBT1
PCH
JS1
JS2
SATA0-3 SATA4-7
USB1/2 (3.0)
IPMI_LAN
USB3/4
(3.0)
JNCSI
JM2-1
JTPM1
BIOS
LED1
SMCI-Proprietary PCI-E x24 Slot
J32
J31J33
32
X11DPG-OT-CPU
REV:1.00
JP2
SMCI-Proprietary PCI-E x24 Slot
JPW21
JPWR9
JPWR10
USB0
CPU1
P1-DIMMF2
P1-DIMME1
P1-DIMME2
P1-DIMMD1
P1-DIMMD2
P1-DIMMA2
P1-DIMMA1
P1-DIMMB2
P1-DIMMB1
FAN8
JPWR
11
P1-DIMMC2
P1-DIMMC1
F
AN7
JPWR12
JPWR13
JPW22
JPWR14
1. S-SATA0 (SuperDOM)
2. (I-)SATA0-3 (JS1)
3. (I-)SATA4-7 (JS2)
JPWR15
JPWR16
FAN10
JNVI2C1
JPW12JPW11
FAN6
FAN5
52
Page 53
Chapter 2: Installation
2.8 Jumper Settings
How Jumpers Work
To modify the operation of the motherboard, jumpers can be used to choose between optional
settings. Jumpers create shorts between two pins to change the function of the connector.
Pin 1 is identifi ed with a square solder pad on the printed circuit board. See the diagram
at right for an example of jumping pins 1 and 2. Refer to the motherboard layout page for
jumper locations.
Note: On two-pin jumpers, "Closed" means the jumper is on and "Open" means the
jumper is off the pins.
Connector
Pins
Jumper
Setting
3 2 1
3 2 1
53
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Super X11DPG-OT-CPU User's Manual
VGA Port Enable/Disable
Jumper JPG1 is used to enable or disable the VGA port on the I/O back panel. Close pin 1
and pin 2 for VGA support. The default setting is Enabled.
VGA Port Enable/Disable
Jumper Settings
Jumper Setting Defi nition
Pins 1-2 Enabled
Pins 2-3 Disabled
JPW19 JPW20
JPWR3
JPWR2
JPWR1
FAN9
CN11
CN10
JNVI2C2
JRK1
JWD1
JF1
LE2
JIPMB1
JL1
FAN3
FAN4
JPWR4
JPWR5
P2-DIMMF2
FAN2
P2-DIMME1
P2-DIMME2
P2-DIMMD1
P2-DIMMD2
FAN1
JPWR6
CPU2
JPWR7
P2-DIMMA2
P2-DIMMA1
P2-DIMMB2
JPWR8
JUIDB1
UID
LE1
COM1
JPME1
JPG1
1
SMCI-Proprietary PCI-E x24 Slot
IPMI CODE
BIOS
LICENSE
S-SATA0
BATTERY
P2-DIMMB1
P2-DIMMC2
P2-DIMMC1
VGA
SMCI-Proprietary PCI-E x24 Slot
BT1
CTRL
J34
LAN
LEDM1
LAN1
LAN2
JSDCARD1
SD CARD
BMC
JBT1
PCH
JS1
SATA0-3 SATA4-7
USB1/2 (3.0)
IPMI_LAN
USB3/4
(3.0)
JNCSI
JM2-1
JTPM1
BIOS
SMCI-Proprietary PCI-E x24 Slot
J32
JS2
X11DPG-OT-CPU
REV:1.00
JP2
LED1
SMCI-Proprietary PCI-E x24 Slot
J31J33
JPWR9
USB0
P1-DIMMF2
P1-DIMME1
P1-DIMME2
P1-DIMMD1
P1-DIMMD2
JPW21
JPWR10
CPU1
P1-DIMMA2
P1-DIMMA1
P1-DIMMB2
FAN8
JPWR
11
P1-DIMMB1
P1-DIMMC2
P1-DIMMC1
F
AN7
JPWR12
JPWR13
JPW22
JPWR14
FAN6
1. VGA Enable/Disable
JPWR15
JPWR16
FAN10
JNVI2C1
JPW12JPW11
FAN5
54
Page 55
Chapter 2: Installation
CMOS Clear
JBT1 is used to clear CMOS, which will also clear any passwords. Instead of pins, this jumper
consists of contact pads to prevent accidentally clearing the contents of CMOS.
To Clear CMOS
1. First power down the system and unplug the power cord(s).
2. Remove the cover of the chassis to access the motherboard.
3. Remove the onboard battery from the motherboard.
4. Short the CMOS pads with a metal object such as a small screwdriver for at least four
seconds.
5. Remove the screwdriver (or shorting device).
6. Replace the cover, reconnect the power cord(s), and power on the system.
Note: Clearing CMOS will also clear all passwords.
Do not use the PW_ON connector to clear CMOS.
JUIDB1
JPW19 JPW20
JPWR3
JPWR2
JPWR1
FAN9
CN11
CN10
JNVI2C2
JRK1
JWD1
JF1
LE2
JIPMB1
JL1
FAN3
FAN4
JPWR4
JPWR5
P2-DIMMF2
FAN2
P2-DIMME1
P2-DIMME2
P2-DIMMD1
FAN1
JPWR7
JPWR6
CPU2
P2-DIMMD2
JPWR8
P2-DIMMA2
P2-DIMMA1
P2-DIMMB2
P2-DIMMB1
UID
VGA
LE1
COM1
JPME1
JPG1
SMCI-Proprietary PCI-E x24 Slot
J34
SMCI-Proprietary PCI-E x24 Slot
IPMI CODE
BIOS
BT1
LICENSE
S-SATA0
BATTERY
P2-DIMMC2
P2-DIMMC1
CTRL
LAN
LEDM1
LAN2
BMC
PCH
JS1
SATA0-3 SATA4-7
LAN1
JSDCARD1
SD CARD
1
JBT1
JS2
BIOS
USB3/4
(3.0)
J32
X11DPG-OT-CPU
REV:1.00
USB1/2 (3.0)
IPMI_LAN
JNCSI
JM2-1
JP2
JTPM1
LED1
SMCI-Proprietary PCI-E x24 Slot
SMCI-Proprietary PCI-E x24 Slot
J31J33
JPWR9
USB0
P1-DIMMF2
P1-DIMME1
P1-DIMME2
P1-DIMMD1
P1-DIMMD2
JPW21
JPWR10
CPU1
P1-DIMMA2
JPWR
11
P1-DIMMA1
P1-DIMMB2
P1-DIMMB1
P1-DIMMC2
FAN8
JPWR12
P1-DIMMC1
F
AN7
JPWR13
JPW22
JPWR14
JPWR16
JPW12JPW11
FAN6
JBT1 contact pads
1. Clear CMOS
JPWR15
FAN10
JNVI2C1
FAN5
55
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Super X11DPG-OT-CPU User's Manual
Manufacturing Mode Select
Close pins 1-2 of JPME1 to bypass SPI fl ash security and force the system to use the
Manufacturing Mode, which will allow you to fl ash the system fi rmware from a host server to
modify system settings. See the table below for jumper settings.
Manufacturing Mode Select
Jumper Settings
Jumper Setting Defi nition
Pins 1-2 Normal (Default)
Pins 2-3 Manufacturing Mode
JPW19 JPW20
JPWR3
JPWR2
JPWR1
FAN9
CN11
CN10
JNVI2C2
JRK1
JWD1
JF1
LE2
JIPMB1
JL1
FAN3
FAN4
JPWR4
JPWR5
P2-DIMMF2
FAN2
P2-DIMME1
P2-DIMME2
P2-DIMMD1
P2-DIMMD2
FAN1
JPWR6
CPU2
JPWR7
P2-DIMMA2
P2-DIMMA1
P2-DIMMB2
JPWR8
JUIDB1
UID
LE1
COM1
JPME1
1
JPG1
SMCI-Proprietary PCI-E x24 Slot
IPMI CODE
BIOS
LICENSE
S-SATA0
BATTERY
P2-DIMMB1
P2-DIMMC2
P2-DIMMC1
VGA
SMCI-Proprietary PCI-E x24 Slot
BT1
CTRL
J34
LAN
LEDM1
LAN1
LAN2
JSDCARD1
SD CARD
BMC
JBT1
PCH
JS1
SATA0-3 SATA4-7
USB1/2 (3.0)
IPMI_LAN
USB3/4
(3.0)
JNCSI
JTPM1
BIOS
SMCI-Proprietary PCI-E x24 Slot
J32
JS2
X11DPG-OT-CPU
REV:1.00
JM2-1
JP2
LED1
SMCI-Proprietary PCI-E x24 Slot
J31J33
JPWR9
USB0
P1-DIMMF2
P1-DIMME1
P1-DIMME2
P1-DIMMD1
P1-DIMMD2
JPW21
JPWR10
CPU1
P1-DIMMA2
P1-DIMMA1
P1-DIMMB2
FAN8
JPWR
11
P1-DIMMB1
P1-DIMMC2
P1-DIMMC1
F
AN7
JPWR12
JPWR13
JPW22
JPWR14
FAN6
1. ME Select
JPWR15
JPWR16
FAN10
JNVI2C1
JPW12JPW11
FAN5
56
Page 57
Chapter 2: Installation
Watch Dog
JWD1 controls the Watch Dog function. Watch Dog is a monitor that can reboot the system
when a software application hangs. Jumping pins 1-2 will cause Watch Dog to reset the
system if an application hangs. Jumping pins 2-3 will generate a non-maskable interrupt
signal for the application that hangs. Watch Dog must also be enabled in BIOS. The default
setting is Reset.
Note: When Watch Dog is enabled, the user needs to write their own application
software to disable it.
Jumper Setting Defi nition
Pins 1-2 Reset
Pins 2-3 NMI
Open Disabled
JUIDB1
UID
VGA
LE1
JPME1
JPG1
SMCI-Proprietary PCI-E x24 Slot
JPW19 JPW20
IPMI CODE
BIOS
JPWR7
JPWR6
JPWR8
P2-DIMMA2
P2-DIMMA1
P2-DIMMB2
P2-DIMMB1
LICENSE
S-SATA0
P2-DIMMC2
P2-DIMMC1
JPWR3
JPWR4
JPWR2
JPWR1
FAN9
CN11
CN10
JNVI2C2
JRK1
JWD1
1
JF1
LE2
JIPMB1
JL1
FAN3
FAN4
JPWR5
FAN2
P2-DIMMF2
P2-DIMME1
P2-DIMME2
P2-DIMMD1
FAN1
CPU2
P2-DIMMD2
LAN2
COM1
LAN
CTRL
LEDM1
J34
SMCI-Proprietary PCI-E x24 Slot
BT1
SATA0-3 SATA4-7
BATTERY
BMC
PCH
JS1
LAN1
JSDCARD1
SD CARD
JBT1
JS2
USB3/4
(3.0)
BIOS
X11DPG-OT-CPU
REV:1.00
USB1/2 (3.0)
IPMI_LAN
JNCSI
JM2-1
JP2
JTPM1
LED1
SMCI-Proprietary PCI-E x24 Slot
SMCI-Proprietary PCI-E x24 Slot
J32
J31J33
USB0
P1-DIMMF2
P1-DIMME1
P1-DIMME2
JPW21
JPWR9
JPWR10
CPU1
P1-DIMMD1
P1-DIMMD2
P1-DIMMA2
P1-DIMMA1
P1-DIMMB2
FAN8
JPWR
11
P1-DIMMB1
P1-DIMMC2
P1-DIMMC1
F
AN7
JPWR12
JPWR13
JPW22
JPWR14
1. Watch Dog Enable
JPWR15
JPWR16
FAN10
JNVI2C1
JPW12JPW11
FAN6
FAN5
57
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Super X11DPG-OT-CPU User's Manual
2.9 LED Indicators
LAN LEDs
The LAN ports are located on the IO backplane on the motherboard. Each Ethernet LAN
port has two LEDs. The green LED indicates activity. Link LED, located on the left side of
the LAN port, may be green, amber or off indicating the speed of the connection. See the
tables at right for more information.
LAN 1/2
Link LED
GLAN Activity Indicator (Right)
LED Settings
Color State Defi nition
Green Flashing Active
IPMI-Dedicated LAN LEDs
Activity LED
LAN Link Indicator (Left)
LED Settings
LED Color Defi nition
Off No Connection, 10 or 100 Mbps
Green 10 Gbps
Amber 1 Gbps
In addition to LAN 1/LAN 2, an IPMI LAN is located on the I/O backplane of the motherboard.
The yellow LED indicates activity. Link LED, located on the left side of the LAN port indicates
the speed of the connection. See the table below for more information.
IPMI LAN
Link LED
IPMI LAN Link LED (Left) &
Activity LED (Right)
Color State Defi nition
Link (Left) Green: Solid 100 Mbps
Amber: Solid 1 Gbps
Activity (Right) Yellow:
Blinking
Activity LED
Active
1. LAN LEDs
2. IPMI LAN LEDs
IPMI CODE
BIOS
LICENSE
11DPG -OT-CPU
REV:1.00
2
1
58
Page 59
Chapter 2: Installation
BMC Heartbeat LED
The BMC heartbeat LED is located at LED1. When this LED is blinking green, BMC functions
normally. See the table below for the LED status.
BMC Heartbeat LED Indicator
LED Color Defi nition
Green:
Blinking
BMC Normal
Onboard Power LED
The Onboard Power LED is located at LE2 on the motherboard. When this LED is on, the
system is on. Be sure to turn off the system and unplug the power cord before removing or
installing components. Refer to the table below for more information.
Onboard Power LED Indicator
LED Color Defi nition
System Off
Off
Green System On
(power cable not
connected)
JPW19 JPW20
JPWR3
JPWR2
JPWR1
FAN9
CN11
CN10
JNVI2C2
JRK1
JWD1
JF1
LE2
2
JIPMB1
JL1
FAN3
FAN4
JPWR4
JPWR5
FAN2
P2-DIMMF2
P2-DIMME1
P2-DIMME2
FAN1
JPWR6
CPU2
P2-DIMMD1
P2-DIMMD2
JPWR7
P2-DIMMA2
P2-DIMMA1
JUIDB1
UID
LE1
JPME1
JPG1
SMCI-Proprietary PCI-E x24 Slot
IPMI CODE
BIOS
JPWR8
LICENSE
S-SATA0
P2-DIMMB2
P2-DIMMB1
P2-DIMMC2
P2-DIMMC1
VGA
LAN2
COM1
LAN
CTRL
LEDM1
1
J34
SMCI-Proprietary PCI-E x24 Slot
BT1
SATA0-3 SATA4-7
BATTERY
USB1/2 (3.0)
IPMI_LAN
LAN1
USB3/4
(3.0)
JNCSI
JSDCARD1
JM2-1
SD CARD
BMC
JBT1
PCH
JS1
JTPM1
BIOS
SMCI-Proprietary PCI-E x24 Slot
J32
JS2
X11DPG-OT-CPU
REV:1.00
JP2
LED1
SMCI-Proprietary PCI-E x24 Slot
J31J33
JPWR9
USB0
P1-DIMMF2
P1-DIMME1
P1-DIMME2
P1-DIMMD1
P1-DIMMD2
JPW21
JPWR10
CPU1
P1-DIMMA2
P1-DIMMA1
P1-DIMMB2
P1-DIMMB1
FAN8
JPWR12
JPWR
11
P1-DIMMC2
P1-DIMMC1
F
AN7
JPWR13
JPW22
JPWR14
JPWR16
FAN10
JPW12JPW11
FAN6
1. BMC Heartbeat LED
2. Onboard Power LED
JPWR15
JNVI2C1
FAN5
59
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Super X11DPG-OT-CPU User's Manual
M.2 Power LED
The Power LED indicator for the PCI-E M.2 slot is located at LED1 on the motherboard. When
this LED is on, the M.2 power is on. Refer to the table below for more information.
M.2 Power LED Indicator
(LED1)
LED Color Defi nition
Off M.2 Power Off
On M.2 Power On
JUIDB1
UID
VGA
COM1
CTRL
LAN2
LAN
LE1
LAN1
JSDCARD1
SD CARD
USB3/4
(3.0)
USB1/2 (3.0)
IPMI_LAN
JNCSI
JM2-1
1. M.2 Power LED
JPW19 JPW20
JPWR3
JPWR2
JPWR1
FAN9
CN11
CN10
JNVI2C2
JRK1
JWD1
JF1
LE2
2
JIPMB1
JL1
FAN3
FAN4
JPWR4
JPWR5
P2-DIMMF2
FAN2
JPWR6
P2-DIMME1
P2-DIMME2
P2-DIMMD1
P2-DIMMD2
FAN1
CPU2
JPWR7
P2-DIMMA2
P2-DIMMA1
JPWR8
P2-DIMMB2
JPME1
JPG1
SMCI-Proprietary PCI-E x24 Slot
IPMI CODE
BIOS
BT1
LICENSE
S-SATA0
BATTERY
P2-DIMMB1
P2-DIMMC2
P2-DIMMC1
BMC
LEDM1
J34
SMCI-Proprietary PCI-E x24 Slot
JBT1
PCH
JS1
SATA0-3 SATA4-7
JTPM1
BIOS
SMCI-Proprietary PCI-E x24 Slot
J32
JS2
X11DPG-OT-CPU
REV:1.00
JP2
LED1
1
SMCI-Proprietary PCI-E x24 Slot
J31J33
JPWR9
USB0
P1-DIMMF2
P1-DIMME1
P1-DIMME2
P1-DIMMD1
P1-DIMMD2
JPW21
JPWR10
CPU1
P1-DIMMA2
P1-DIMMA1
P1-DIMMB2
FAN8
JPWR
11
P1-DIMMB1
P1-DIMMC2
P1-DIMMC1
F
AN7
JPWR12
JPWR13
JPW22
JPWR14
JPWR16
JPW12JPW11
FAN6
JPWR15
FAN10
JNVI2C1
FAN5
60
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Chapter 3: Troubleshooting
Chapter 3
Troubleshooting
3.1 Troubleshooting Procedures
Use the following procedures to troubleshoot your system. If you have followed all of the
procedures below and still need assistance, refer to the ‘Technical Support Procedures’ and/
or ‘Returning Merchandise for Service’ section(s) in this chapter. Always disconnect the AC
power cord before adding, changing or installing any non hot-swap hardware components.
Before Power On
1. Check that the power LED on the motherboard is on.
2. Make sure that the power connector is connected to your power supply.
3. Make sure that no short circuits exist between the motherboard and chassis.
4. Disconnect all cables from the motherboard, including those for the keyboard and
mouse.
5. Remove all add-on cards.
6. Install a CPU, a heatsink*, and connect the internal speaker (if available) and the
power LED to the motherboard. Check all jumper settings as well. (*Make sure that the
heatsink is fully seated.)
7. Use the correct type of onboard CMOS battery as recommended by the manufacturer.
To avoid possible explosion, do not install the CMOS battery upside down.
No Power
1. Make sure that no short circuits exist between the motherboard and the chassis.
2. Verify that all jumpers are set to their default positions.
3. Check that the 115V/230V switch on the power supply is properly set.
4. Turn the power switch on and off to test the system.
5. The battery on your motherboard may be old. Check to verify that it still supplies
~3VDC. If it does not, replace it with a new one.
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Super X11DPG-OT-CPU User's Manual
System Boot Failure (Available when an Internal Speaker is
Installed)
If the system does not display POST (Power-On-Self-Test) or does not respond after the
power is turned on, check the following:
1. Check for any error beep from the motherboard speaker.
• If there is no error beep, try to turn on the system without DIMM modules installed. If there
is still no error beep, replace the motherboard.
• If there are error beeps, clear the CMOS settings by unplugging the power cord and
contacting both pads on the CMOS Clear Jumper (JBT1). Refer to chapter 2.
2. Remove all components from the motherboard, especially the DIMM modules. Make
sure that system power is on and that memory error beeps are activated.
3. Turn on the system with only one DIMM module installed. If the system boots, check for
bad DIMM modules or slots by following the Memory Errors Troubleshooting procedure
in this Chapter.
Memory Errors
1. Make sure that the DIMM modules are properly and fully installed.
2. Confi rm that you are using the correct memory. Also, it is recommended that you use
the same memory type and speed for all DIMMs in the system. See Section 2.4 for
memory details.
3. Check for bad DIMM modules or slots by swapping modules between slots and noting
the results.
4. Check the power supply voltage 115V/230V switch.
Losing the System's Setup Confi guration
1. Make sure that you are using a high quality power supply. A poor quality power supply
may cause the system to lose the CMOS setup information. Refer to Section 1.6 for
more information on power supply.
2. The battery on your motherboard may be old. Check to verify that it still supplies
~3VDC. If it does not, replace it with a new one.
3. If the above steps do not fi x the setup confi guration problem, contact your vendor for
repairs.
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When the System Becomes Unstable
A. If the system becomes unstable during or after OS installation, check the following:
1. CPU/BIOS support: Make sure that your CPU is supported and that you have the latest
BIOS installed in your system.
2. Memory support: Make sure that the memory modules are supported by testing the
modules using memtest86 or a similar utility.
Note: Refer to the product page on our website at http:\\www.supermicro.com for
memory and CPU support and updates.
3. HDD support: Make sure that all hard disk drives (HDDs) work properly. Replace the
bad HDDs with good ones.
4. System cooling: Check the system cooling to make sure that all heatsink fans and CPU/
system fans, etc., work properly. Check the hardware monitoring settings in the IPMI
to make sure that the CPU and system temperatures are within the normal range. Also
check the front panel Overheat LED and make sure that it is not on.
5. Adequate power supply: Make sure that the power supply provides adequate power to
the system. Make sure that all power connectors are connected. Please refer to our
website for more information on the minimum power requirements.
6. Proper software support: Make sure that the correct drivers are used.
B. If the system becomes unstable before or during OS installation, check the following:
1. Source of installation: Make sure that the devices used for installation are working
properly, including boot devices such as CD.
2. Cable connection: Check to make sure that all cables are connected and working
properly.
3. Using the minimum confi guration for troubleshooting: Remove all unnecessary
components (starting with add-on cards fi rst), and use the minimum confi guration (but
with a CPU and a memory module installed) to identify the trouble areas. Refer to the
steps listed in Section A above for proper troubleshooting procedures.
4. Identifying bad components by isolating them: If necessary, remove a component in
question from the chassis, and test it in isolation to make sure that it works properly.
Replace a bad component with a good one.
5. Check and change one component at a time instead of changing several items at the
same time. This will help isolate and identify the problem.
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6. To fi nd out if a component is good, swap this component with a new one to see if the
system will work properly. If so, then the old component is bad. You can also install the
component in question in another system. If the new system works, the component is
good and the old system has problems.
3.2 Technical Support Procedures
Before contacting Technical Support, please take the following steps. Also, note that as a
motherboard manufacturer, we do not sell directly to end users, so it is best to fi rst check with
your distributor or reseller for troubleshooting services. They should know of any possible
problem(s) with the specifi c system confi guration that was sold to you.
1. Please review the ‘Troubleshooting Procedures’ and 'Frequently Asked Questions'
(FAQs) sections in this chapter or see the FAQs on our website before contacting
Technical Support.
2. BIOS upgrades can be downloaded from our website. Note: Not all BIOS can be
fl ashed. Availability of BIOS upgrading is dependent on the boot block modifi cation
codes.
3. If you still cannot resolve the problem, include the following information when contacting
us for technical support:
• Motherboard model and PCB revision number
• BIOS release date/version (this can be seen on the initial display when your system fi rst
boots up)
• System confi guration
An example of a Technical Support form is posted on our website.
Distributors: For immediate assistance, please have your account number ready when
contacting our technical support department by e-mail.
3.3 Frequently Asked Questions
Question: What type of memory does my motherboard support?
Answer: The X11DPG-OT-CPU motherboard supports up to 3TB of 3DS LRDIMM/
LRDIMM/3DS RDIMM/RDIMM DDR4 ECC 2666/2400/2133 MHz memory modules in 24
slots. See Section 2.4 for details on installing memory.
Question: How do I update my BIOS?
Answer: It is recommended that you do not upgrade your BIOS if you are not experiencing
any problems with your system. Updated BIOS fi les are located on our website at
supermicro.com
. Please check our BIOS warning message and the information on how to
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Chapter 3: Troubleshooting
update your BIOS on our website. Select your motherboard model and download the BIOS
fi le to your computer. Also, check the current BIOS revision to make sure that it is newer
than your BIOS before downloading. You can choose from the zip fi le and the .exe fi le. If
you choose the zip BIOS fi le, please unzip the BIOS fi le onto a bootable USB device. Run
the batch fi le using the format FLASH.BAT fi lename.rom from your bootable USB device to
fl ash the BIOS. Then, your system will automatically reboot.
Question: Why can't I turn off the power using the momentary power on/off switch?
Answer: The instant power off function is controlled in BIOS by the Power Button Mode
setting. When the On/Off feature is enabled, the motherboard will have instant off capability
as long as the BIOS has control of the system. When the Standby or Suspend feature is
enabled or when the BIOS is not in control such as during memory count (the fi rst screen
that appears when the system is turned on), the momentary on/off switch must be held for
more than four seconds to shut down the system. This feature is required to implement the
ACPI features on the motherboard.
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3.4 Battery Removal and Installation
Battery Removal
To remove the onboard battery, follow the steps below:
1. Power off your system and unplug your power cable.
2. Locate the onboard battery as shown below.
3. Using a tool such as a pen or a small screwdriver, push the battery lock outwards to
unlock it. Once unlocked, the battery will pop out from the holder.
4. Remove the battery.
Proper Battery Disposal
Please handle used batteries carefully. Do not damage the battery in any way; a damaged
battery may release hazardous materials into the environment. Do not discard a used battery
in the garbage or a public landfi ll. Please comply with the regulations set up by your local
hazardous waste management agency to dispose of your used battery properly.
Battery Installation
1. To install an onboard battery, follow the steps 1 & 2 above and continue below:
2. Identify the battery's polarity. The positive (+) side should be facing up.
3. Insert the battery into the battery holder and push it down until you hear a click to
ensure that the battery is securely locked.
Note: When replacing a battery, be sure to only replace it with the same type.
OR
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3.5 Returning Merchandise for Service
A receipt or copy of your invoice marked with the date of purchase is required before any
warranty service will be rendered. Y ou can obtain service by calling your vendor for a Returned
Merchandise Authorization (RMA) number. When returning to the manufacturer, the RMA
number should be prominently displayed on the outside of the shipping carton and mailed
prepaid or hand-carried. Shipping and handling charges will be applied for all orders that
must be mailed when service is complete.
For faster service, RMA authorizations may be requested online (
support/rma/
This warranty only covers normal consumer use and does not cover damages incurred in
shipping or from failure due to the alteration, misuse, abuse or improper maintenance of
products.
During the warranty period, contact your distributor fi rst for any product problems.
).
http://www.supermicro.com/
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Chapter 4
BIOS
4.1 Introduction
This chapter describes the AMIBIOS™ setup utility for the X11DPG-OT-CPU motherboard.
The BIOS is stored on a chip and can be easily upgraded using a fl ash program.
Note: Due to periodic changes to the BIOS, some settings may have been added
or deleted and might not yet be recorded in this manual. Please refer to the Manual
Download area of our website for any changes to BIOS that may not be refl ected in
this manual.
Starting the Setup Utility
To enter the BIOS setup utility, press the <Delete> key while the system is booting up. (In
most cases, the <Delete> key is used to invoke the BIOS setup screen. There are a few
cases when other keys are used, such as <F1>, <F2>, etc.) Each main BIOS menu option
is described in this manual.
The Main BIOS screen has two main frames. The left frame displays all the options that can
be confi gured. “Grayed-out” options cannot be confi gured. The right frame displays the key
legend. Above the key legend is an area reserved for a text message. When an option is
selected in the left frame, it is highlighted in white. Often a text message will accompany it.
(Note that BIOS has default text messages built in. We retain the option to include, omit, or
change any of these text messages.) Settings printed in Bold are the default values.
A "
" indicates a submenu. Highlighting such an item and pressing the <Enter> key will
open the list of settings within that submenu.
The BIOS setup utility uses a key-based navigation system called hot keys. Most of these
hot keys (<F1>, <F10>, <Enter>, <ESC>, <Arrow> keys, etc.) can be used at any time during
the setup navigation process.
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4.2 Main Setup
When you fi rst enter the AMI BIOS setup utility, you will enter the Main setup screen. You can
always return to the Main setup screen by selecting the Main tab on the top of the screen.
The Main BIOS setup screen is shown below.
System Date/System Time
Use this feature to change the system date and time. Highlight System Date or System
Time using the arrow keys on the keyboard. Press the <Tab> key or the arrow keys to move
between fi elds. The date must be entered in Day MM/DD/YYYY format. The time is entered
in HH:MM:SS format.
Note: The time is in the 24-hour format. For example, 5:30 P.M. appears as 17:30:00.
The date's default value is 01/01/2014 after RTC reset.
Supermicro X11DPG-OT
BIOS Version
This item displays the version of the BIOS ROM used in the system.
Build Date
This item displays the date when the version of the BIOS ROM used in the system was built.
CPLD Version
This item displays the version of the CPLD (Complex-Programmable Logical Device) used
in the system.
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Memory Information
Total Memory
This item displays the total size of memory available in the system.
Memory Speed
This item displays the default speed of the memory modules installed in the system.
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4.3 Advanced Setup Confi gurations
Use the arrow keys to select the Advanced submenu and press <Enter> to access the
submenu items.
Warning: Take Caution when changing the Advanced settings. An incorrect value, an incorrect
DRAM frequency, or an incorrect BIOS timing setting may cause the system to malfunction.
When this occurs, restore the setting to the manufacture default setting.
Boot Confi guration
Quiet Boot
Use this feature to select the screen between displaying POST messages or the OEM logo
at bootup. Select Disabled to display the POST messages. Select Enabled to display the
OEM logo instead of the normal POST messages. The options are Enabled and Disabled.
Note: POST message is always displayed regardless of the item setting.
Option ROM Messages
Use this feature to set the display mode for the Option ROM. Select Keep Current to use
the current AddOn ROM display setting. Select Force BIOS to use the Option ROM display
mode set by the system BIOS. The options are Force BIOS and Keep Current.
Bootup NumLock State
Use this feature to set the Power-on state for the Numlock key. The options are Off and On.
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Wait For 'F1' If Error
Select Enabled to force the system to wait until the 'F1' key is pressed if an error occurs. The
options are Disabled and Enabled.
INT19 Trap Response
Interrupt 19 is the software interrupt that handles the boot disk function. When this item is
set to Immediate, the ROM BIOS of the host adaptors will "capture" Interrupt 19 at bootup
immediately and allow the drives that are attached to these host adaptors to function as
bootable disks. If this item is set to Postponed, the ROM BIOS of the host adaptors will not
capture Interrupt 19 immediately and allow the drives attached to these adaptors to function
as bootable devices at bootup. The options are Immediate and Postponed.
Re-try Boot
When EFI (Expansible Firmware Interface) Boot is selected, the system BIOS will automatically
reboot the system from an EFI boot device after an initial boot failure. Select Legacy Boot to
allow the BIOS to automatically reboot the system from a Legacy boot device after an initial
boot failure. The options are Disabled, Legacy Boot, and EFI Boot.
Power Confi guration
Watch Dog Function
Select Enabled to allow the Wat ch Dog timer to reboot the system when it is inactive for more
than 5 minutes. The options are Enabled and Disabled.
Power Button Function
This feature controls how the system shuts down when the power button is pressed. Select 4
Seconds Override for the user to power off the system after pressing and holding the power
button for 4 seconds or longer. Select Instant Off to instantly power off the system as soon
as the user presses the power button. The options are 4 Seconds Override and Instant Off.
Restore on AC Power Loss
Use this feature to set the power state after a power outage. Select Power-Off
for the system power to remain off after a power loss. Select Power-On for the
system power to be turned on after a power loss. Select Last State to allow
the system to resume its last power state before a power loss. The options are
Stay-Off, Power-On, and Last State.
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CPU Confi guration
Warning: Setting the wrong values in the following sections may cause the system to malfunc-
tion.
Processor Confi guration
The following CPU information will be displayed:
• Processor BSP Revision
• Processor Socket
• Processor ID
• Processor Frequency
• Processor Max Ratio
• Processor Min Ratio
• Microcode Revision
• L1 Cache RAM
• L2 Cache RAM
• L3 Cache RAM
• Processor 0 Version/Processor 1 Version
Hyper-Threading (ALL)
Select Enable to use Intel Hyper-Threading Technology to enhance CPU performance. The
options are Enable and Disable.
Core Disable Bitmap (Hex)
Use this feature to enable or disable CPU cores in the processor specifi ed by the user. Enter
0 to enable all cores available in the processor. Enter bit0 to disable CPU Core 0. Enter bit1 to
disable CPU Core 1. Please note that the maximum of 24 CPU cores are currently available
in each CPU package. The default setting is 0.
Execute Disable Bit (Available if supported by the OS & the CPU)
Select Enable to keep mixed power-on frequency of each CPU socket. The options are
Enable and Disable.
Intel Virtualization Technology
Select Enable to use Intel Virtualization Technology which will allow the I/O device assignments
to be directly reported to the VMM (Virtual Memory Management) through the DMAR ACPI
tables. This feature offers fully-protected I/O resource-sharing across the Intel platforms,
providing the user with greater reliability, security and availability in networking and datasharing. The settings are Enable and Disable.
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PPIN Control
Select Unlock/Enable to use the Protected-Processor Inventory Number (PPIN) in the system.
The options are Unlock/Enable and Unlock/Disable.
Hardware Prefetcher (Available when supported by the CPU)
If this feature is set to Enable, the hardware prefetcher will prefetch streams of data and
instructions from the main memory to the Level 2 (L2) cache to improve CPU performance.
The options are Disable and Enable.
Adjacent Cache Prefetch (Available when supported by the CPU)
Select Enable for the CPU to prefetch both cache lines for 128 bytes as comprised. Select
Disable for the CPU to prefetch both cache lines for 64 bytes. The options are Disable and
Enable.
Note: Please power off and reboot the system for the changes you've made to take
effect. Please refer to Intel’s website for detailed information.
DCU (Data Cache Unit) Streamer Prefetcher (Available when supported by the CPU)
If this feature is set to Enable, the DCU (Data Cache Unit) streamer prefetcher will prefetch
data streams from the cache memory to the DCU (Data Cache Unit) to speed up data
accessing and processing for CPU performance enhancement. The options are Disable and
Enable.
DCU (Data Cache Unit) IP Prefetcher
If this feature is set to Enable, the IP prefetcher in the DCU (Data Cache Unit) will prefetch
IP addresses to improve network connectivity and system performance. The options are
Enable and Disable.
LLC Prefetch
If this feature is set to Enable, LLC (hardware cache) prefetching on all threads will be
supported. The options are Disable and Enable.
Extended APIC (Extended Advanced Programmable Interrupt Controller)
Based on the Intel Hyper-Threading technology, each logical processor (thread) is assigned
256 APIC IDs (APIDs) in 8-bit bandwidth. When this feature is set to Enable, the APIC ID
will be expanded from 8 bits to 16 bits to provide 512 APIDs to each thread to enhance CPU
performance. The options are Disable and Enable.
AES-NI
Select Enable to use the Intel Advanced Encryption Standard (AES) New Instructions (NI) to
ensure data security. The options are Enable and Disable.
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Chapter 4: BIOS
Advanced Power Management Confi guration
Power Technology
Select Energy Effi cient to support power-saving mode. Select Custom to customize system
power settings. Select Disabled to disable power-saving settings. The options are Disable,
Energy Effi cient, and Custom.
Power Performance Tuning (Available when "Power Technology" is set to Custom)
Select BIOS to allow the system BIOS to confi gure the Power-Performance Tuning Bias
setting below. The options are BIOS Controls EPB and OS Controls EPB.
Energy Performance BIAS Setting (Available when "Power Performance Tuning" is
set to BIOS Controls EPB)
Use this feature to set the processor power use policy to achieve the desired operation
settings for your machine by prioritizing system performance or energy savings. Select
Maximum Performance to maximize system performance (to its highest potential); however,
this may result in maximum power consumption as energy is needed to fuel the processor
frequency. The higher the performance is, the higher the power consumption will be.
Select Max Power Effi cient to maximize power saving; however, system performance may
be substantially impacted because limited power use decreases the processor frequency.
The options are Maximum Performance, Performance, Balanced Performance, Balanced
Power, Power, and Max Power Effi cient. This feature is internally used by the processor to
control power settings vs performance features including Energy Effi cient P-State/Demotion/
Undemotion etc. The options are Maximum Performance, Performance, Balanced
Performance, Balanced Power, Power, and Max Power Effi cient.
CPU P State Control
SpeedStep (PStates)
EIST (Enhanced Intel SpeedStep Technology) allows the system to automatically adjust
processor voltage and core frequency in an effort to reduce power consumption and heat
dissipation. Please refer to Intel’s website for detailed information. The options are Disable
and Enable.
EIST PSD Function (Available when SpeedStep is set to Enable)
Use this item to confi gure the processor's P-State coordination settings. During a P-State,
the voltage and frequency of the processor will be reduced when it is in operation. This
makes the processor more energy effi cient, resulting in further energy gains. The options
are HW_ALL, SW_ALL and SW-ANY.
Turbo Mode (Available when SpeedStep is set to Enable)
Select Enable for processor cores to run faster than the frequency specifi ed by the
manufacturer. The options are Disable and Enable.
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Hardware PM (Power Management) State Control
Hardware P-States
If this feature is set to Disable, hardware will choose a P-state setting for the system based
on an OS request. If this feature is set to Native Mode, hardware will choose a P-state
setting based on OS guidance. If this feature is set to Native Mode with No Legacy Support,
hardware will choose a P-state setting independently without OS guidance. The options
are Disable, Native Mode, Out of Band Mode, and Native Mode with No Legacy Support.
CPU C State Control
Autonomous Core C-State
Select Enable to support Autonomous Core C-State control which will allow the processor
core to control its C-State setting automatically and independently. The options are Enable
and Disable.
CPU C6 Report
Select Enable to allow the BIOS to report the CPU C6 state (ACPI C3) to the operating
system. During the CPU C6 state, power to all caches is turned off. The options are Auto,
Enable, and Disable.
Enhanced Halt State (C1E)
Select Enable to enable "Enhanced Halt State" support, which will signifi cantly reduce the
CPU's power consumption by minimizing CPU's clock cycles and reduce voltage during a
"Halt State." The options are Disable and Enable.
Package C State Control
Package C State
Use this feature to set the limit on the C-State package register. The options are C0/1 state,
C2 state, C6 (non-Retention) state, C6 (Retention) state, No Limit, and Auto.
Chipset Confi guration
North Bridge
This feature allows the user to confi gure the settings for the Intel North Bridge.
UPI (Ultra Path Interconnect) General Confi guration
This section displays the following UPI General Confi guration information:
• Number of CPU
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Chapter 4: BIOS
• Number of IIO
• Current UPI Link Speed
• Current UPI Link Frequency
• UPI Global MMIO Low Base/Limit
• UPI Global MMIO High Base/Limit
• UPI PCI-E Confi guration Base/Size
Degrade Precedence
Use this feature to select the degrading precedence option for Ultra Path Interconnect
connections. Select Topology Precedent to degrade UPI features if system options are in
confl ict. Select Feature Precedent to degrade UPI topology if system options are in confl ict.
The options are Topology Precedence and Feature Precedence.
Link L0p Enable
Select Enable to enable Link L0p. The options are Disable, Enable, and Auto.
Link L1 Enable
Select Enable to enable Link L1 (Level 1 link). The options are Disable, Enable, and Auto.
IO Directory Cache (IODC)
Select Enable for the IODC (I/O Directory Cache) to generate snoops instead of generating
memory lockups for remote IIO (InvIT oM) and/or WCiLF (Cores). Select Auto for the IODC to
generate snoops (instead of memory lockups) for WCiLF (Cores). The options are Disable,
Auto, Enable for Remote InvItoM Hybrid Push, InvItoM AllocFlow, Enable for Remote
InvItoM Hybrid AllocNonAlloc, and Enable for Remote InvItoM and Remote WViLF.
Isoc Mode
Select Enable to enable Isochronous support to meet QoS (Quality of Service) requirements.
This feature is especially important for Virtualization Technology. The options are Disable,
Enable, and Auto.
SNC (Sub NUMA Cluster)
Select Enable for Sub-NUMA (Non-uniform memory access) Cluster support. Select Auto for
1-cluster or 2-cluster support depending on the satuts of IMC (Integrated Memory Controller)
Interleaving. The options are Disable, Enable, and Auto.
Stale AtoS (A to S)
Select Enable to remove the contents and the structures of the fi les that are no longer
needed in the remote host server but are still in use by the local client machine from
Directory A to Directory S in the NFS (Network File System) to optimize system performance.
The options are Disable, Enable, and Auto.
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LLC Dead Line Alloc
Select Enable to opportunistically fi ll the deadlines in LLC. The options are Enable, Disable,
and Auto.
Memory Confi guration
Enforce POR
Select POR to enforce POR restrictions for DDR4 memory frequency and voltage
programming. The options are POR and Disable.
PPR Type
This feature allows the user to select the Post Package Repair type. The options are
Enable, and Disable.
Memory Frequency
Use this feature to set the maximum memory frequency for onboard memory modules. The
options are Auto, 1866, 2000, 2133, 2200, 2400, 2600, and 2666.
IMC Interleaving
Use this feature to confi gure interleaving settings for the IMC (Integrated Memory
Controller), which will improve memory performance. The options are 1-way Interleaving,
2-way Interleaving, and Auto.
Data Scrambling for NVDIMM
Select Enable to enable data scrambling for onboard NVDIMM memory to enhance system
performance and security. The options are Auto, Disable, and Enable.
Data Scrambling for DDR4
Select Enable to enable data scrambling for DDR4 memory to enhance system performance
and security. The options are Auto, Disable, and Enable.
tCCD_L Relaxation
If this feature is enabled, SPD (Serial Presence Detect) will override tCCD_L ("Column to
Column Delay-Long", or “Command to Command Delay-Long” on the column side.) If this
feature is set to Disable, tCCD_L will be enforced based on the memory frequency. The
options are Disable, Enable, and Auto.
RD2WR Timing Override
If this feature is set to Enable, the RD2WR timing will be overridden by the optimized value.
If this feature is set to Auto, overriding will only be applied to Samsung's DIMM modules.
The options are Auto, Enable, and Disable.
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Chapter 4: BIOS
Enable ADR
Select Enable for ADR (Automatic Diagnostic Repository) support to enhance memory
performance. The options are Enable and Disable.
Memory Topology
This item displays the information of onboard memory modules as detected by the
BIOS.
• P1DIMMA1/P1DIMMA2; P1DIMMB1/P1DIMMB2; P1DIMMC1/ P1 DIMMC2, P1DIMMD1/
P1DIMMD2; P1DIMME1/P1DIMME2; P1DIMMF1/P1DIMMF2
• P2DIMMA1/P2DIMMA2; P2DIMMB1/P2DIMMB2; P1DIMMC1/ P2DIMMC2, P2DIMMD1/
P1DIMMD2; P2DIMME1/P2DIMME2; P2DIMMF1/P2DIMMF2
Memory RAS (Reliability_Availability_Serviceability) Confi guration
Use this submenu to confi gure the following Memory RAS settings.
Mirror Mode
Use this feature to confi gure the mirror mode settings for all 1LM/2LM memory modules
installed in the system which will create a duplicate copy of data stored in the memory to
increase memory security, but it will reduce the memory capacity into half. The options are
Disable, Mirror Mode 1LM, and Mirror Mode 2LM.
Memory Rank Sparing
Select Enable to support memory-rank sparing to optimize memory performance. The
options are Enable and Disable.
Note: This item will not be available when memory mirror mode is enabled.
Correctable Error Threshold
Use this item to enter the threshold value for correctable memory errors. The default setting
is 10.
SDDC Plus One
Select Enable for SDDC (Single Device Data Correction) Plus One support, which will
activate memory ECC mode for memory error checking and correction. It will also protect
against memory failures caused by 'single-bit' errors in the same memory rank. The options
are Enable and Disable.
ADDDC (Adaptive Double Device Data Correction) Sparing
Select Enable for Adaptive Double Device Data Correction (ADDDC) support, which will
not only provide memory error checking and correction but will also prevent the system
from issuing a performance penalty before a device fails. Please note that virtual lockstep
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Super X11DPG-OT-CPU User's Manual
mode will only start to work for ADDDC after a faulty DRAM module is spared. The options
are Enable and Disable.
Patrol Scrub
Patrol Scrubbing is a process that allows the CPU to correct correctable memory errors
detected in a memory module and send the corrections to the requestor (the original
source). When this item is set to Enable, the IO hub will read and write back one cache line
every 16K cycles if there is no delay caused by internal processing. By using this method,
roughly 64 GB of memory behind the IO hub will be scrubbed every day. The options are
Enable and Disable.
Patrol Scrub Interval
Use this item to specify the number of hours (between 0 to 24) required for the system to
complete a full patrol scrubbing. Enter 0 for patrol scrubbing to be performed automatically.
The default setting is 24.
Note: This item is hidden when Patrol Scrub item is set to Disable.
IIO Confi guration
EV DFX (Device Function On-Hide) Features
When this feature is set to Enable, the EV_DFX Lock Bits that are located in a processor
will always remain clear during electric tuning. The options are Disable and Enable.
CPU1 Confi guration/CPU2 Confi guration
IOU0 (IIO PCIe Br1)
This feature confi gures the PCI-E Bifuraction setting for a PCI-E port specifi ed by the user.
The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16, and Auto.
IOU1 (IIO PCIe Br2)
This feature confi gures the PCI-E Bifuraction setting for a PCI-E port specifi ed by the user.
The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16, and Auto.
IOU2 (IIO PCIe Br3)
This feature confi gures the PCI-E Bifuraction setting for a PCI-E port specifi ed by the user.
The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16, and Auto.
MCP0 (IIO PCIe Br4)
This feature confi gures the PCI-E Bifuraction setting for a PCI-E port specifi ed by the user.
The options are x16 and Auto.
MCP1 (IIO PCIe Br5)
This feature confi gures the PCI-E Bifuraction setting for a PCI-E port specifi ed by the user.
The options are x16 and Auto.
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Socket 0 PCI-E Br0D00F0 - Port 0/DMI (Available for CPU 1 Confi guration
only)
Link Speed
This feature confi gures the link speed of a PCI-E port specifi ed by the user. The options
are Auto, Gen 1 (Generation 1) (2.5 GT/s), Gen 2 (Generation 2) (5 GT/s), and Gen 3
(Generation 3) (8 GT/s)
The following information will be displayed as well:
• PCI-E Port Link Status
• PCI-E Port Link Max
• PCI-E Port Link Speed
PCI-E Port Max (Maximum) Payload Size (Available for CPU 1 Confi guration only)
Select Auto for the BIOS to automatically set the maximum payload value for a PCI-E
device specifi ed by to user to enhance system performance. The options are Auto, 128B,
and 256B.
ECRC (Error Capabilities and Control Register)
Select Enable for ECRC support to enhance system performance. The options are Auto,
128B, and 256B.
IOAT Confi guration
Disable TPH (TLP Processing Hint)
TPH is used for data-tagging with a destination ID and a few important attributes. It can
send critical data to a particular cache without writing through to memory. Select No in this
item for TLP Processing Hint support, which will allow a "TPL request" to provide "hints"
to help optimize the processing of each transaction occurred in the target memory space.
The options are Yes and No.
Prioritize TPH (TLP Processing Hint)
Select Yes to prioritize the TPL requests that will allow the "hints" to be sent to help facilitate
and optimize the processing of certain transactions in the system memory. The options are
Enable and Disable.
Relaxed Ordering
Select Enable to allow certain transactions to be processed and completed before other
transactions that have already been enqueued. The options are Disable and Enable.
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Intel® VT for Directed I/O (VT-d)
Intel® VT for Directed I/O (VT-d)
Select Enable to use Intel Virtualization Technology support for Direct I/O VT-d by reporting
the I/O device assignments to the VMM (Virtual Machine Monitor) through the DMAR
ACPI tables. This feature offers fully-protected I/O resource sharing across Intel platforms,
providing greater reliability, security and availability in networking and data-sharing. The
options are Enable and Disable.
Interrupt Remapping
Select Enable for Interrupt Remapping support to enhance system performance. The
options are Enable and Disable.
PassThrough DMA
Select Enable for the Non-Iscoh VT-d engine to pass through DMA (Direct Memory Access)
to enhance system performance. The options are Enable and Disable.
ATS
Select Enable to enable ATS (Address T ranslation Services) support for the Non-Iscoh VT-d
engine to enhance system performance. The options are Enable and Disable.
Posted Interrupt
Select Enable to support VT_D Posted Interrupt which will allow external interrupts to be
sent directly from a direct-assigned device to a client machine in non-root mode to improve
virtualization effi ciency by simplifying interrupt migration and lessening the need of physical
interrupts. The options are Enable and Disable.
Coherency Support (Non-Isoch)
Select Enable for the Non-Iscoh VT-d engine to pass through DMA (Direct Memory Access)
to enhance system performance. The options are Enable and Disable.
Intel® VMD Technology
Intel® VMD for Onboard NVMe
Onbard NVMe Mode
Select Legacy Mode to confi gure onboard NVMe connections for legacy device support.
The options are Legacy Mode and VMD Mode.
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IIO-PCIE Express Global Options
PCI-E Hot Plug
Select Enable for hot-plug support for all PCI-E devices to allow the user to change an
onboard device without turning off the system power. The options are Disable, Enable,
Auto, and Manual.
PCI-E Completion Timeout (Global)
Use this feature to confi gure the PCI-E Completion Time-out settings. The options are Yes,
No, and Per-Port.
South Bridge
The following South Bridge information will display:
• USB Module Version
• USB Devices
Legacy USB Support
Select Enabled to support onboard legacy USB devices. Select Auto to disable legacy support
if there are no legacy USB devices present. Select Disable to have all USB devices available
for EFI applications only. The options are Enabled, Disabled and Auto.
XHCI Hand-Off
This is a work-around solution for operating systems that do not support XHCI (Extensible
Host Controller Interface) hand-off. The XHCI ownership change should be claimed by the
XHCI driver. The options are Enabled and Disabled.
Port 60/64 Emulation
Select Enabled for I/O port 60h/64h emulation support, which in turn, will provide complete
legacy USB keyboard support for the operating systems that do not support legacy USB
devices. The options are Enabled and Disabled.
Port 61h Bit-4 Emulation
Select Enabled for I/O Port 61h-Bit 4 emulation support to enhance system performance. The
options are Enabled and Disabled.
Install Windows 7 USB Support
Select Enabled to install the Windows 7 USB utility to support legacy USB devices for Windows
7 systems. The options are Enabled and Disabled.
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Server ME (Management Engine) Confi guration
This feature displays the following system ME confi guration settings.
• Operational Firmware Version
• Backup Firmware Version
• Recovery Firmware Version
• ME Firmware Status #1/ME Firmware Status #2
• Current State
• Error Code
SATA Confi guration
When this submenu is selected, the AMI BIOS automatically detects the presence of the SATA
devices that are supported by the Intel PCH chip and displays the following items:
SATA Controller
This item enables or disables the onboard SATA controller supported by the Intel PCH chip.
The options are Enable and Disable.
Confi gure SATA as (Available when the item above: SATA Controller is set to
enabled)
Select AHCI to confi gure a SATA drive specifi ed by the user as an AHCI drive. Select RAID
to confi gure a SATA drive specifi ed by the user as a RAID drive. The options are AHCI and
RAID. (Note: This item is hidden when the SATA Controller item is set to Disabled.)
SATA HDD Unlock
Select Enable to unlock SA TA HDD password in the OS. The options are Enable and Disable.
Aggressive Link Power Management
When this item is set to Enabled, the SATA AHCI controller manages the power use of the
SATA link. The controller will put the link in a low power mode during an extended period of
I/O inactivity, and will return the link to an active state when I/O activity resumes. The options
are Enable and Disable.
SATA RAID Option ROM/UEFI Driver (Available when the item "Confi gure SATA as"
is set to "RAID")
Select EFI to load the EFI driver for system boot. Select Legacy to load a legacy driver for
system boot. The options are Disable, EFI, and Legacy.
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(I-)SATA Port 0 - SATA Port 7
Hot Plug
Select Enable to support Hot-plugging for the device installed on a selected SATA port
which will allow the user to replace the device installed in the slot without shutting down
the system. The options are Enable and Disable.
Spin Up Device
On an edge detect from 0 to 1, set this item to allow the SATA device installed on the SATA
port specifi ed by the user to start a COMRESET initialization. The options are Enable and
Disable.
SATA Device Type
Use this item to specify if the device installed on the SATA port selected by the user should
be connected to a Solid State drive or a Hard Disk Drive. The options are Hard Disk Drive
and Solid State Drive.
sSATA Confi guration
When this submenu is selected, AMI BIOS automatically detects the presence of the sSATA
devices that are supported by the PCH sSATA controller and displays the following items:
sSATA Controller
This item enables or disables the onboard sSATA controller supported by the Intel PCH The
options are Enable and Disable.
Confi gure sSATA as
Select AHCI to confi gure an sSATA drive specifi ed by the user as an AHCI drive. Select RAID
to confi gure an sSATA drive specifi ed by the user as a RAID drive. The options are AHCI
and RAID. (Note: This item is hidden when the sSATA Controller item is set to Disabled.)
SATA HDD Unlock
Select Enable to unlock sSA T A HDD password in the OS. The options are Enable and Disable.
Aggressive Link Power Management
When this item is set to Enable, the sSATA AHCI controller manages the power use of the
SATA link. The controller will put the link in a low power mode during an extended period of
I/O inactivity, and will return the link to an active state when I/O activity resumes. The options
are Disable and Enable.
sSATA RAID Option ROM/UEFI Driver (Available when the item "Confi gure SATA as"
is set to "RAID")
Select EFI to load the EFI driver for system boot. Select Legacy to load a legacy driver for
system boot. The options are Disable, EFI, and Legacy.
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sSATA Port 0
Hot Plug
Select Enable to support Hot-plugging for the device installed on an sSA TA port selected by
the user which will allow the user to replace the device installed in the slot without shutting
down the system. The options are Disable and Enabled.
Spin Up Device
On an edge detect from 0 to 1, set this item to allow the sSATA device installed on the
sSATA port specifi ed by the user to start a COMRESET initialization. The options are
Enable and Disable.
sSATA Device Type
Use this item to specify if the device installed on the sSATA port specifi ed by the user
should be connected to a Solid State drive or a Hard Disk Drive. The options are Hard
Disk Drive and Solid State Drive.
PCIe/PCI/PnP Confi guration
The following PCI information will be displayed:
• PCI Bus Driver Version
• PCI Devices Common Settings
Above 4G Decoding (Available if the system supports 64-bit PCI decoding)
Select Enabled to decode a PCI device that supports 64-bit in the space above 4G Address.
The options are Enabled and Disabled.
SR-IOV Support (Available if the system supports Single-Root Virtualization)
Select Enabled for Single-Root IO Virtualization support. The options are Enabled and
Disabled.
MMIO High Base
Use this feature to select the base memory size according to memory-address mapping for
the IO hub. The base memory size must be between 4032G to 4078G. The options are 56T,
40T, 24T, 16T, 4T, and 1T.
MMIO High Granularity Size
Use this feature to select the high memory size according to memory-address mapping for
the IO hub. The options are 1G, 4G, 16G, 64G, 256G, and 1024G.
PCI PERR/SERR Support
Use this feature to enable or disable the runtime event for SERR (System Error)/ PERR (PCI/
PCI-E Parity Error). The options are Enabled and Disabled.
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Maximum Read Request
Select Auto for the system BIOS to automatically set the maximum size for a read request
for a PCI-E device to enhance system performance. The options are Auto, 128 Bytes, 256
Bytes, 512 Bytes, 1024 Bytes, 2048 Bytes, and 4096 Bytes.
MMCFG Base
This feature determines the lowest MMCFG (Memory-Mapped Confi guration) base assigned
to PCI devices. The options are 1G, 1.5G, 1.75G. 2G, 2.25G, and 3G.
VGA Priority
This feature selects the graphics device to be used as the primary video display for system
boot. The options are Auto, Onboard and Offboard.
Disable Unused PLX
Select Enable to turn off PCI-E support when there are no downstream PCI-E devices attached
to this device. The options are Enabled and Disabled.
PLX Workaround for NVIDIA GPU
Select Enable to shut down PLX BAR0 and BAR1 support when a NVIDIA GPU is populated
in the slots. The options are Enabled and Disabled.
Onboard NVME1 OPROM/Onboard NVME2 OPROM
Select EFI to allow the user to boot the computer using an EFI (Expansible Firmware In terface)
device installed on the NVMe slot specifi ed by the user. Select Legacy to allow the user to
boot the computer using a legacy device installed on the NVMe slot specifi ed by the user. The
options are Disabled, Legacy and EFI. (Note: Riser card names may differ in each system.)
Onboard Video OPROM
Select EFI to allow the user to boot the computer using an EFI (Expansible Firmware In terface)
device installed on the video slot specifi ed by the user. Select Legacy to allow the user to
boot the computer using a legacy device installed on the video slot specifi ed by the user. The
options are Disabled, Legacy and EFI. (Note: Riser card names may differ in each system.)
Onboard LAN1 Option ROM
Use this feature to select the type of device to be installed in LAN Por t1 used for system
boot. The options are Legacy, EFI, and Disabled.
Onboard LAN2 Option ROM
Use this feature to select the type of device to be installed in LAN Por t2 used for system
boot. The options are Legacy, EFI, and Disabled.
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Network Stack Confi guration
Network Stack
Select Enabled to enable PXE (Preboot Execution Environment) or UEFI (Unifi ed Extensible
Firmware Interface) for network stack support. The options are Enabled and Disabled.
*If "Network Stack" is set to Enabled, the following items will display:
Ipv4 PXE Support
Select Enabled to enable Ipv4 PXE boot support. If this feature is disabled, it will not create
the Ipv4 PXE boot option. The options are Disabled and Enabled.
Ipv4 HTTP Support
Select Enabled to enable Ipv4 HTTP boot support. If this feature is disabled, it will not create
the Ipv4 HTTP boot option. The options are Enabled and Disabled.
Ipv6 PXE Support
Select Enabled to enable Ipv6 PXE boot support. If this feature is disabled, it will not create
the Ipv6 PXE boot option. The options are Disabled and Enabled.
Ipv6 HTTP Support
Select Enabled to enable Ipv6 HTTP boot support. If this feature is disabled, it will not create
the Ipv6 HTTP boot option. The options are Enabled and Disabled.
PXE Boot Wait Time
Use this feature to select the wait time to press the <ESC> key to abort the PXE boot. The
default is 0.
Media Detect Time
Use this feature to select the wait time in seconds for the BIOS ROM to detect the LAN media
(Internet connection or LAN port). The default is 1.
Super IO Confi guration
Super IO Chip AST2500
Serial Port 1 Confi guration
Serial Port 1
Select Enabled to enable the onboard serial port specifi ed by the user. The options are
Enabled and Disabled.
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Device Settings
This feature displays the base I/O port address and the Interrupt Request address of a
serial port specifi ed by the user.
Note: This item is hidden when Serial Port 1 is set to Disabled.
Change Settings
This feature specifi es the base I/O port address and the Interrupt Request address of Serial
Port 1. Select Auto for the BIOS to automatically assign the base I/O and IRQ address to a
serial port specifi ed.
The options for Serial Port 1 are Auto, (IO=3F8h; IRQ=4), (IO=3F8h; IRQ=3, 4, 5, 6, 7, 9,
10, 11, 12), (IO=2F8h; IRQ=3, 4, 5, 6, 7, 9, 10, 11, 12); (IO=3E8h; IRQ=3, 4, 5, 6, 7, 9, 10,
11, 12), and (IO=2E8h; IRQ=3, 4, 5, 6, 7, 9, 10, 11, 12).
Serial Port 2 Confi guration
Serial Port 2
Select Enabled to enable the onboard serial port specifi ed by the user. The options are
Enabled and Disabled.
Device Settings
This feature displays the base I/O port address and the Interrupt Request address of a serial
port specifi ed by the user.
Note: This item is hidden when Serial Port 1 is set to Disabled.
Change Settings
This feature specifi es the base I/O port address and the Interrupt Request address of Serial
Port 2. Select Auto for the BIOS to automatically assign the base I/O and IRQ address to a
serial port specifi ed. The options for Serial Port 2 are Auto, (IO=2F8h; IRQ=3), (IO=3F8h;
IRQ=3, 4, 5, 6, 7, 9, 10, 1 1, 12), (IO=2F8h; IRQ=3, 4, 5, 6, 7, 9, 10, 11, 12); (IO=3E8h; IRQ=3,
4, 5, 6, 7, 9, 10, 11, 12), and (IO=2E8h; IRQ=3, 4, 5, 6, 7, 9, 10, 11, 12).
Serial Port 2 Attribute
Select SOL to use COM Port 2 as a Serial_Over_LAN (SOL) port for console redirection.
The options are COM and SOL.
Serial Port Console Redirection
COM 1 Console Redirection
Select Enabled to enable COM Port 1 for Console Redirection, which will allow a client
machine to be connected to a host machine at a remote site for networking. The options are
Enabled and Disabled.
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*If the item above set to Enabled, the following items will become available for confi guration:
Console Redirection Settings (when COM1 Console Redirection is
Enabled)
Terminal Type
Use this feature to select the target terminal emulation type for Console Redirection.
Select VT100 to use the ASCII Character set. Select VT100+ to add color and function key
support. Select ANSI to use the Extended ASCII Character Set. Select VT-UTF8 to use
UTF8 encoding to map Unicode characters into one or more bytes. The options are ANSI,
VT100, VT100+, and VT-UTF8.
Bits Per second
Use this feature to set the transmission speed for a serial port used in Console Redirection.
Make sure that the same speed is used in the host computer and the client computer. A
lower transmission speed may be required for long and busy lines. The options are 9600,
19200, 38400, 57600 and 115200 (bits per second).
Data Bits
Use this feature to set the data transmission size for Console Redirection. The options are
7 (Bits) and 8 (Bits).
Parity
A parity bit can be sent along with regular data bits to detect data transmission errors.
Select Even if the parity bit is set to 0, and the number of 1's in data bits is even. Select
Odd if the parity bit is set to 0, and the number of 1's in data bits is odd. Select None if you
do not want to send a parity bit with your data bits in transmission. Select Mark to add a
mark as a parity bit to be sent along with the data bits. Select Space to add a Space as a
parity bit to be sent with your data bits. The options are None, Even, Odd, Mark and Space.
Stop Bits
A stop bit indicates the end of a serial data packet. Select 1 Stop Bit for standard serial
data communication. Select 2 Stop Bits if slower devices are used. The options are 1 and 2.
Flow Control
Use this feature to set the fl ow control for Console Redirection to prevent data loss caused
by buffer overfl ow. Send a "Stop" signal to stop sending data when the receiving buffer
is full. Send a "Start" signal to start sending data when the receiving buffer is empty. The
options are None and Hardware RTS/CTS.
VT-UTF8 Combo Key Support
Select Enabled to enable VT-UTF8 Combination Key support for ANSI/VT100 terminals.
The options are Enabled and Disabled.
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Recorder Mode
Select Enabled to capture the data displayed on a terminal and send it as text messages
to a remote server. The options are Disabled and Enabled.
Resolution 100x31
Select Enabled for extended-terminal resolution support. The options are Disabled and
Enabled.
Legacy OS Redirection Resolution
Use this feature to select the number of rows and columns used in Console Redirection
for legacy OS support. The options are 80x24 and 80x25.
Putty KeyPad
This feature selects Function Keys and KeyPad settings for Putty, which is a terminal
emulator designed for the Windows OS. The options are VT100, LINUX, XTERMR6, SCO,
ESCN, and VT400.
Redirection After BIOS Post
Use this feature to enable or disable legacy Console Redirection after BIOS POST. When
the option-Bootloader is selected, legacy Console Redirection is disabled before booting
the OS. When the option-Always Enable is selected, legacy Console Redirection remains
enabled upon OS bootup. The options are Always Enable and Bootloader.
SOL (Serial-Over-LAN)/COM2
Console Redirection (for SOL/COM2)
Select Enabled to use the SOL port for Console Redirection. The options are Enabled and
Disabled.
*If the item above set to Enabled, the following items will become available for user's
confi guration:
Console Redirection Settings (for SOL/COM2)
Use this feature to specify how the host computer will exchange data with the client
computer, which is the remote computer used by the user.
Terminal Type
Use this feature to select the target terminal emulation type for Console Redirection.
Select VT100 to use the ASCII Character set. Select VT100+ to add color and function key
support. Select ANSI to use the Extended ASCII Character Set. Select VT-UTF8 to use
UTF8 encoding to map Unicode characters into one or more bytes. The options are ANSI,
VT100, VT100+, and VT-UTF8.
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Bits Per second
Use this feature to set the transmission speed for a serial port used in Console Redirection.
Make sure that the same speed is used in the host computer and the client computer. A
lower transmission speed may be required for long and busy lines. The options are 9600,
19200, 38400, 57600 and 115200 (bits per second).
Data Bits
Use this feature to set the data transmission size for Console Redirection. The options are
7 (Bits) and 8 (Bits).
Parity
A parity bit can be sent along with regular data bits to detect data transmission errors.
Select Even if the parity bit is set to 0, and the number of 1's in data bits is even. Select
Odd if the parity bit is set to 0, and the number of 1's in data bits is odd. Select None if you
do not want to send a parity bit with your data bits in transmission. Select Mark to add a
mark as a parity bit to be sent along with the data bits. Select Space to add a Space as a
parity bit to be sent with your data bits. The options are None, Even, Odd, Mark and Space.
Stop Bits
A stop bit indicates the end of a serial data packet. Select 1 Stop Bit for standard serial
data communication. Select 2 Stop Bits if slower devices are used. The options are 1 and 2.
Flow Control
Use this feature to set the fl ow control for Console Redirection to prevent data loss caused
by buffer overfl ow. Send a "Stop" signal to stop sending data when the receiving buffer
is full. Send a "Start" signal to start data-sending when the receiving buffer is empty. The
options are None and Hardware RTS/CTS.
VT-UTF8 Combo Key Support
Select Enabled to enable VT-UTF8 Combination Key support for ANSI/VT100 terminals.
The options are Enabled and Disabled.
Recorder Mode
Select Enabled to capture the data displayed on a terminal and send it as text messages
to a remote server. The options are Disabled and Enabled.
Resolution 100x31
Select Enabled for extended-terminal resolution support. The options are Disabled and
Enabled.
Legacy OS Redirection Resolution
Use this feature to select the number of rows and columns used in Console Redirection
for legacy OS support. The options are 80x24 and 80x25.
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Putty KeyPad
This feature selects Function Keys and KeyPad settings for Putty, which is a terminal
emulator designed for the Windows OS. The options are VT100, LINUX, XTERMR6, SCO,
ESCN, and VT400.
Redirection After BIOS Post
Use this feature to enable or disable legacy Console Redirection after BIOS POST
(Power-On Self-Test). When this feature is set to Bootloader, legacy Console Redirection
is disabled before booting the OS. When this feature is set to Always Enable, legacy
Console Redirection remains enabled upon OS boot. The options are Always Enable and
Bootloader.
Legacy Console Redirection Settings
Legacy Console Redirection Settings
Use the feature to select the COM port to display redirection of Legacy OS and Legacy
OPROM messages. The options are COM1 and COM2/SOL.
Serial Port for Out-of-Band Management/Windows Emergency Management
Services (EMS)
The submenu allows the user to confi gure Console Redirection settings to support Out-of-
Band Serial Port management.
Console Redirection (for EMS)
Select Enabled to use a COM port selected by the user for EMS Console Redirection. The
options are Disabled and Enabled.
*If the item above set to Enabled, the following items will become available for user's
confi guration:
EMS Console Redirection Settings
Out-of-Band Management Port
The feature selects a serial port in a client server to be used by the Windows Emergency
Management Services (EMS) to communicate with a remote host server. The options are
COM1 (Console Redirection) and COM2/SOL (Console Redirection).
Terminal Type
Use this feature to select the target terminal emulation type for Console Redirection.
Select VT100 to use the ASCII character set. Select VT100+ to add color and function
key support. Select ANSI to use the extended ASCII character set. Select VT-UTF8 to use
UTF8 encoding to map Unicode characters into one or more bytes. The options are ANSI,
VT100, VT100+, and VT-UTF8.
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Bits Per Second
This feature sets the transmission speed for a serial port used in Console Redirection.
Make sure that the same speed is used in both host computer and the client computer. A
lower transmission speed may be required for long and busy lines. The options are 9600,
19200, 57600, and 115200 (bits per second).
Flow Control
Use this feature to set the fl ow control for Console Redirection to prevent data loss caused
by buffer overfl ow. Send a "Stop" signal to stop data-sending when the receiving buffer
is full. Send a "Start" signal to start data-sending when the receiving buffer is empty. The
options are None, Hardware RTS/CTS, and Software Xon/Xoff.
The setting for each these features is displayed:
Data Bits, Parity, Stop Bits
ACPI Settings
Use this feature to confi gure Advanced Confi guration and Power Interface (ACPI) power
management settings for your system.
NUMA Support (Available when the OS supports this feature)
Select Enabled to enable Non-Uniform Memory Access support to enhance system performance. The options are Enabled and Disabled.
WHEA Support
Select Enabled to support the Windows Hardware Error Architecture (WHE A) platform and
provide a common infrastructure for the system to handle hardware errors within the Windows
OS environment to reduce system crashes and to enhance system recovery and health
monitoring. The options are Enabled and Disabled.
High Precision Timer
Select Enabled to activate the High Precision Event Timer (HPET) that produces periodic
interrupts at a much higher frequency than a Real-time Clock (RTC) does in synchronizing
multimedia streams, providing smooth playback and reducing the dependency on other
timestamp calculation devices, such as an x86 RDTSC Instruction embedded in the CPU.
The High Performance Event Timer is used to replace the 8254 Programmable Interval Timer.
The options are Enabled and Disabled.
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Trusted Computing (Available when a TPM device is detected
and PTT Support under "Server ME Confi g" is not Enabled)
When a TPM (Trusted-Platform Module) device is detected in your machine, the following
information will display.
• TPM2.0 Device Found
• Vendor
• Firmware Version
Security Device Support
If this feature and the TPM jumper (JPT1), if available, are both enabled, the onboard security
(TPM) device will be enabled in the BIOS to enhance data integrity and system security.
Please note that the OS will not show the security device. Neither TCG EFI protocol nor
INT1A interaction will be available for use. If you have made changes on the setting on this
item, be sure to reboot the system for the change to take effect. The options are Disable and
Enable. If this option is set to Enable, the following screen and items will display:
• Active PCR Banks
• Available PCR Banks
Pending Operation
Use this feature to schedule a TPM-related operation to be performed by a security (TPM)
device at the next system boot to enhance system data integrity. Your system will reboot to
carry out a pending TPM operation. The options are None and TPM Clear.
Note: Your system will reboot to carry out a pending TPM operation.
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Platform Hierarchy (for TPM Version 2.0 and above)
Select Enabled for TPM Platform Hierarchy support which will allow the manufacturer to utilize
the cryptographic algorithm to defi ne a constant key or a fi xed set of keys to be used for
initial system boot. This early boot code is shipped with the platform and is included in the
list of "public keys". During system boot, the platform fi rmware uses this trusted public key
to verify a digital signature in an attempt to manage and control the security of the platform
fi rmware used in a host system via a TPM device. The options are Enabled and Disabled.
Storage Hierarchy
Select Enabled for TPM Storage Hierarchy support that is intended to be used for non-privacysensitive operations by the platform owner such as an IT professional or the end user . Storage
Hierarchy has an owner policy and an authorization value, both of which can be set and are
held constant (-rarely changed) through reboots. This hierarchy can be cleared or changed
independently of the other hierarchies. The options are Enabled and Disabled.
Endorsement Hierarchy
Select Enabled for Endorsement Hierarchy support, which contains separate controls to
address the user's privacy concerns because the primary keys in this hierarchy are certifi ed
by the TPM or a manufacturer to be constrained to an authentic TPM device that is attached
to an authentic platform. A primary key can be an encrypted, and a certifi cate can be created
using TPM2_ ActivateCredential. It allows the user to independently enable "fl ag, policy, and
authorization value" without involving other hierarchies. A user with privacy concerns can
disable the endorsement hierarchy while still using the storage hierarchy for TPM applications
and permitting the platform software to use the TPM. The options are Enabled and Disabled.
PH (Platform Hierarchy) Randomization (for TPM Version 2.0 and above)
Select Enabled for Platform Hierarchy Randomization support, which is used only during the
platform developmental stage. This feature cannot be enabled in the production platforms.
The options are Disabled and Enabled.
TXT Support
Select Enabled to enable Intel Trusted Execution Technology (TXT) support to enhance
system security and data integrity. The options are Disabled and Enabled.
Note 1: If the option for this item (TXT Support) is set to Enabled, be sure to disable
EV DFX (Device Function On-Hide) support for the system to work properly. (EV DFX
is under "IIO Confi guration" in the "Chipset/North Bridge" submenu).
Note 2: For more information on TPM, please refer to the TPM manual at http://www.
supermicro.com/manuals/other.
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Intel® Virtual RAID on CPU
When this submenu is selected and the RAID devices are detected, the BIOS screen displays
the following items:
Intel® VROC with VMD Technology 5.2.0.1023
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4.4 Event Logs
Use this feature to confi gure Event Log settings.
Change SMBIOS Event Log Settings
Enabling/Disabling Options
SMBIOS Event Log
Select Enabled to enable SMBIOS (System Management BIOS) Event Logging during system
boot. The options are Enabled and Disabled.
Erasing Settings
Erase Event Log
Select Enabled to erase all error events in the SMBIOS (System Management BIOS) log
before an event logging is initialized at bootup. The options are No, Yes, Next Reset, and
Yes, Next Reset.
When Log is Full
Select Erase Immediately to immediately erase all errors in the SMBIOS event log when the
event log is full. Select Do Nothing for the system to do nothing when the SMBIOS event log
is full. The options are Do Nothing and Erase Immediately.
SMBIOS Event Log Standard Settings
Log System Boot Event
Select Enabled to log system boot events. The options are Enabled and Disabled.
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MECI (Multiple Event Count Increment)
Enter the increment value for the multiple event counter. Enter a number between 1 to 255.
The default setting is 1.
METW (Multiple Event Count Time Window)
Use this feature to specify how long (in minutes) the multiple event counter should wait before
generating a new event log. Enter a number between 0 to 99. The default setting is 60.
Note: Please reboot the system for the changes to take effect.
Custom Options
Log OEM Codes
Select Enabled to log EFI Status Codes as OEM Codes. The options are Enabled and
Disabled.
Convert OEM Codes
Select Enabled to convert EFI Status Codes to that of standard SMBIOS Type. The options
are Disabled and Enabled.
View SMBIOS Event Log
This item allows the user to view the event in the system event log. Select this feature and
press <Enter> to view the status of an event in the log. The following categories are displayed:
Date/Time/Error Code/Severity
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4.5 IPMI
Use this feature to confi gure Intelligent Platform Management Interface (IPMI) settings.
When you select this submenu and press the <Enter> key, the following information will
display:
• IPMI Firmware Revision: This feature indicates the IPMI fi rmware revision used in your
system.
• Status of BMC: This feature indicates IPMI status of your system.
System Event Log
Enabling/Disabling Options
SEL Components
Select Enabled for all system event logging at bootup. The options are Enabled and Disabled.
Erasing Settings
Erase SEL
Select Yes, On next reset to erase all system event logs upon next system reboot. Select
Yes, On every reset to erase all system event logs upon each system reboot. Select No to
keep all system event logs after each system reboot. The options are No, Yes, On next reset,
and Yes, On every reset.
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