Supermicro P3DR3 Manual

SUPER

SUPER PIIIDR3

SUPER PIIIDRE

®

USER’S MANUAL

Revision 2.0

The information in this User’s Manual has been carefully reviewed and is believed to be
accurate. The vendor assumes no responsibility for any inaccuracies that may be contained
in this document, makes no commitment to update or to keep current the information in this
manual, or to notify any person or organization of the updates.

Please Note: For the
most up-to-date version of this manual, please see our web site at
www.supermicro.com.

SUPERMICRO COMPUTER reserves the right to make changes to the product described in
this manual at any time and without notice. This product, including software, if any, and
documentation may not, in whole or in part, be copied, photocopied, reproduced, translated or
reduced to any medium or machine without prior written consent.

IN NO EVENT WILL SUPERMICRO COMPUTER BE LIABLE FOR DIRECT, INDIRECT,
SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING FROM THE USE OR
INABILITY TO USE THIS PRODUCT OR DOCUMENTATION, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGES. IN PARTICULAR, THE VENDOR SHALL NOT HAVE
LIABILITY FOR ANY HARDWARE, SOFTWARE, OR DATA STORED OR USED WITH THE
PRODUCT, INCLUDING THE COSTS OF REPAIRING, REPLACING, INTEGRATING,
INSTALLING OR RECOVERING SUCH HARDWARE, SOFTWARE, OR DATA.

Any disputes arising between manufacturer and customer shall be governed by the laws of
Santa Clara County in the State of California, USA. The State of California, County of Santa
Clara shall be the exclusive venue for the resolution of any such disputes. Supermicro's total
liability for all claims will not exceed the price paid for the hardware product.

Unless you request and receive written permission from SUPER MICRO COMPUTER, you
may not copy any part of this document.

Information in this document is subject to change without notice. Other products and
companies referred to herein are trademarks or registered trademarks of their respective
companies or mark holders.

Copyright © 2000 by SUPER MICRO COMPUTER INC.
All rights reserved.

Printed in the United States of America.

Preface

About This Manual

This manual is written for system integrators, PC technicians and
knowledgeable PC users. It provides information for the installation and use
of the SUPER PIIIDR3/PIIIDRE motherboard. The SUPER PIIIDR3/PIIIDRE
supports single or dual Pentium® II 350-450 MHz and Pentium III 450-933
MHz processors. Please refer to the support section of our web site (http://
www.supermicro.com/TechSupport.htm) for a complete listing of supported
processors.

Pentium II processors with the Dual Independent Bus (DIB) architecture are
housed in a package called a Single Edge Contact Cartridge (SECC).
Pentium III processors are packaged in SECC2 type cartridges.

Manual Organization

Chapter 1 includes a checklist of what should be included in your mainboard

box, describes the layout, specifications and features of the SUPER PIIIDR3/
PIIIDRE mainboard and provides detailed information about the chipset.

Preface

Chapter 2 begins with instructions on handling static-sensitive devices. Read
this chapter when you want to install the processor and RIMM memory mod­ules and when mounting the mainboard in the chassis. Also refer to this
chapter to connect the floppy and hard disk drives, SCSI drives, the IDE
interfaces, the parallel and serial ports and the twisted wires for the power
supply, the reset button, the keylock/power LED, the speaker and the key­board.

If you encounter any problems, see Chapter 3, which describes troubleshoot-
ing procedures for the video, the memory and the setup configuration stored
in CMOS. For quick reference, a general FAQ [Frequently Asked Questions]
section is provided. Instructions are also included for contacting technical
support. In addition, you can visit our web site at www.supermicro.com/
techsupport.htm for more detailed information.

Chapter 4 includes an introduction to the BIOS used in the PIIIDR3/PIIIDRE
and provides detailed information on the CMOS Setup utility.

iii

SUPER PIIIDR3/PIIIDRE User’s Manual

Appendix A offers information on BIOS error beep codes and messages.

Appendix B provides post diagnostic error messages.

iv

Table of Contents

Table of Contents

Preface

About This Manual ...................................................................................................... i ii

Manual Organization ................................................................................................... i ii

Chapter 1: Introduction

1-1 Overview .......................................................................................................... 1- 1

Checklist .................................................................................................... 1 -1

Contacting Supermicro ............................................................................. 1- 2

SUPER PIIIDR3 Image ........................................................................... 1- 4

SUPER PIIIDRE Image ........................................................................... 1-5

SUPER PIIIDR3 Layout .......................................................................... 1- 6

SUPER PIIIDRE Layout .......................................................................... 1- 8

840 Chipset: System Block Diagram ................................................... 1-10

Motherboard Features ........................................................................... 1-11

1-2 Chipset Overview .......................................................................................... 1-13

1-3 PC Health Monitoring ................................................................................... 1-14

1-4 ACPI/PC 98 Features .................................................................................. 1-16

1-5 Power Supply ................................................................................................ 1-18

1-6 Super I/O ........................................................................................................ 1-18

Chapter 2: Installation

2-1 Static-Sensitive Devices ................................................................................ 2-1

2-2 Processor Installation .................................................................................... 2-2

2-3 Mounting the Motherboard in the Chassis .................................................. 2 -3

2-4 Installing RIMMs ............................................................................................. 2- 4

2-5 Port/Control Panel Connector Locations .................................................. 2- 6,7

2-6 Connecting Cables ......................................................................................... 2 -8

Power Supply Connector ........................................................................ 2-8

Secondary Power Connector ................................................................... 2 -8

Power LED ................................................................................................. 2- 8

Hard Drive LED ........................................................................................ 2- 8

PWR_ON ................................................................................................... 2- 9

NIC_LED .................................................................................................... 2- 9

Reset .......................................................................................................... 2- 9

I2C ............................................................................................................... 2- 9

Chassis Intrusion ................................................................................... 2-10

Keyboard Lock ........................................................................................ 2-10

v

SUPER PIIIDR3/PIIIDRE User’s Manual

Overheat LED ......................................................................................... 2-10

Extra Universal Serial Bus Connection .............................................. 2-10

Speaker ................................................................................................... 2-11

Infrared Header ...................................................................................... 2-11

Fan Headers ........................................................................................... 2-11

Ser ial P ort s ............................................................................................. 2-11

ATX PS/2 Keyboard and Mouse Ports ................................................ 2-12

Universal Serial Bus Connector ........................................................... 2-12

CD Headers ............................................................................................ 2-12

Wake-On-LAN .......................................................................................... 2-12

Wake-On-Ring ........................................................................................ 2-13

Extra Chassis Intrusion Header ........................................................... 2-13

Power Supply Fail Header .................................................................... 2-13

SLED1 (SCSI LED) Indicator ............................................................... 2-14

2-7 Jumper Settings ............................................................................................ 2-14

CMOS Clear ............................................................................................ 2-14

Front Side Bus Speed ........................................................................... 2-15

Host Bus ECC ......................................................................................... 2-15

AC'97 Enable/Disable ............................................................................. 2-15

SCSI Termination Enable/Disable ........................................................ 2-16

Overheat Alarm Enable/Disable ............................................................ 2-16

Onboard LAN/NIC Enable/Disable ........................................................ 2-16

Power Supply Failure Alarm Enable/Disable ...................................... 2-17

2-8 Parallel Port/Floppy/Hard Disk Drive/AGP Port/SCSI Connections ...... 2-17

Parallel Port Connector ......................................................................... 2-18

Floppy Connector ................................................................................... 2-18

IDE Connectors ...................................................................................... 2-18

AGP Pro Slot ........................................................................................... 2-19

50-pin Legacy SCSI Connector ............................................................ 2-19

Ultra Wide SCSI Connector ................................................................... 2-20

Ultra160 SCSI Connectors .................................................................... 2-21

2-9 Ins tall ing S oftwa re Dr iver s .......................................................................... 2-22

Chapter 3: Troubleshooting

3-1 Troubleshooting Procedures ......................................................................... 3- 1

Before Power On ...................................................................................... 3- 1

No Power ................................................................................................... 3-1

No Video .................................................................................................... 3 -1

Memory Errors .......................................................................................... 3-2

vi

Table of Contents

Losing the System’s Setup Configuration ............................................ 3-2

3-2 Technical Support Procedures ..................................................................... 3-2

3-3 Frequently Asked Questions ......................................................................... 3 -3

3-4 Returning Merchandise for Service ............................................................. 3- 6

Chapter 4: BIOS

4-1 Introduction....................................................................................................... 4 - 1

4-2 BIOS Features ................................................................................................. 4-2

4-3 Running Setup ................................................................................................. 4- 2

Standard CMOS Setup ............................................................................. 4 -4

Advanced CMOS Setup ........................................................................... 4 -5

Advanced Chipset Setup ......................................................................... 4- 9

Power Management ................................................................................ 4-11

PCI/Plug and Play Setup ....................................................................... 4-14

Peripheral Setup ..................................................................................... 4-17

Auto-Detect Hard Disks ......................................................................... 4-19

Change User/Supervisor Password ...................................................... 4-19

Change Language Setting ..................................................................... 4-20

Auto Configuration with Optimal Settings ........................................... 4-20

Auto Configuration with Fail Safe Settings ......................................... 4-20

Save Settings and Exit ........................................................................... 4-20

Exit Without Saving ................................................................................ 4-21

Appendices:

Appendix A: BIOS Error Beep Codes and Messages .........................................A-1

Appendix B: AMIBIOS Post Diagnostic Error Messages .................................... B -1

vii

SUPER PIIIDR3/PIIIDM3/PIIIDME User’s Manual

Notes

viii

1-1 Overview

Chapter 1: Introduction

Chapter 1

Introduction

Checklist

Congratulations on purchasing your computer motherboard from an ac­knowledged leader in the industry. Supermicro boards are designed with
the utmost attention to detail to provide you with the highest standards in
quality and performance.

Please check that the following items have all been included with your
motherboard. If anything listed here is damaged or missing, contact your
retailer.

One (1) Supermicro Mainboard

One (1) ATA66 ribbon cable for IDE devices

One (1) floppy ribbon cable for (1) 5.25-inch and (2) 3.5-inch floppy drives

One (1) serial COM 2 cable

One (1) I/O backpanel shield

SCSI accessories (for PIIIDR3 only)

One (1) 50-pin Ultra SCSI cable

One (1) 68-pin Ultra Wide SCSI cable

Introduction

One (1) 68-pin LVD SCSI cable

One (1) set of SCSI driver diskettes

One (1) SCSI manual

One (1) Supermicro CD containing drivers and utilities

One (1) URM (Univeral Retention Mechanism for the CPU - preinstalled)

One (1) User's/BIOS Manual

1-1

SUPER PIIIDR3/PIIIDRE User's Manual

CONTACTING SUPERMICRO

Introduction

Headquarters

Address: Super Micro Computer, Inc.

2051 Junction Avenue

San Jose, CA 95131 U.S.A.
Tel: [phone]
Fax: [phone]
E-mail: [e-mail] (General Information)

[e-mail] (Technical Support)
Web site: www.supermicro.com

European Office

Address: Super Micro Computer B.V.

Het Sterrenbeeld 28, 5215 ML,

's-Hertogenbosch, The Netherlands
Tel: [phone]
Fax: [phone]
E-mail: [e-mail] (General Information)

[e-mail] (Technical Support)

[e-mail] (Customer Support)

1-2

Notes

Chapter 1: Introduction

Introduction

1-3

SUPER PIIIDR3/PIIIDRE User's Manual

SUPER PIIIDR3

Figure 1-1. SUPER PIIIDR3 Image

Introduction

1-4

SUPER PIIIDRE

Chapter 1: Introduction

Figure 1-2. SUPER PIIIDRE Image

Introduction

1-5

SUPER PIIIDR3/PIIIDRE User's Manual

Introduction

Parallel

COM1

Ethernet Port

12"

LINE IN

LINE OUT

MIC

®

J13

PS/2 KB

PS/2 MOUSE

J22
Port

GAME

JP11

J34

J12
USB

PORT

J44

ATX POWER

J27

J38

COM2

SUPER PIIIDR3

Figure 1-3. SUPER PIIIDR3 Layout

(not drawn to scale)

11.95"

PCI 1

PCI 2

PCI 3

PCI 4

CPU 1

1

JP3

AGP PRO

PCI64 #1

PCI64 #2

CPU 1

FAN

J8

J9

J10

J11

CPU 2

CPU 2

FAN

J14

J13

THRM

FAN

FWH
(BIOS)

WOL

JP4A

JP4 JP5

JP12

ank0
B

1

JP7

ank1
B

JA5

ULTRA WIDE SCSI

JA6

E

T

T

A

B

1

WOR JBT1

JP13

ank2
B

J48 J46 J15 J47 J14 J49

ULTRA SCSI

Y

R

JA2

JA1 JL1

CH FAN

1

PWR_SEC

J28

ank3
B

E #2
ID

BT1

ULTRA160 SCSI

SLED1

CH FAN

#1
E

ID

1

IR Header

BZ1

JP10

Channel

2

PPY
FLO

J16

JF1

CHFAN 3

CHFAN 4

Also see the figure on page 2-6 for the locations of the I/O ports and
2-7 for the Front Control Panel (JF1) connectors.

1-6

Chapter 1: Introduction

Jumpers Description Default Setting
JA1 SCSI Termination (p. 2-16) Open (Enabled)
JBT1 CMOS Clear (p. 2-14) Pin 1-2 (Normal)
JP3 Front Side Bus Speed (p. 2-15) Pin 1-2 (CPU Select)
JP4/4A Manufacturer's Setting Pin 1-2
JP5 Host Bus ECC (p. 2-15) Closed (Enabled)
JP7 AC97 Audio (p. 2-15) Pin 1-2 (Enabled)
JP10 Overheat Alarm (p. 2-16) Closed (Enabled)
JP11 Onboard LAN/NIC (p. 2-16) Closed (Enabled)
JP13 P/S Failure Alarm (p. 2-17) Open (Disabled)

Connectors Description

CHASSIS FAN1 Primary Chassis Fan Header (p. 2-11)
CHASSIS FAN2 Secondary Chassis Fan Header (p. 2-11)
COM1/COM2 COM1/COM2 Serial Port Conn/Hdr (p. 2-11)
CPU1/CPU2 FAN CPU1/CPU2 Fan Header (p. 2-11)
GAME Game Port
IR Header Infrared Device Header (p. 2-11)
J46, J47, J48, J49 Memory (RAM) Slots (p. 2-4)
J12 Universal Serial Bus Ports (p. 2-12)
J13 PS/2 Keyboard/Mouse (p. 2-12)
J14, J15 IDE Hard Disk Drive Connectors (p. 2-18)
J16 Floppy Disk Drive Connector (p. 2-18)
J22 Parallel Printer Port (p. 2-18)
J27 ATX Power Connector (p. 2-8)
J34 Audio CD Input (small connector) (p. 2-12)
J38 Ethernet Port
JA2 Ultra160 SCSI Connector (p. 2-21)
JA5 Ultra Wide SCSI Connector (p. 2-20)
JA6 Ultra (Legacy) SCSI Connector (p. 2-19)
J44 Audio CD Input (large connector) (p. 2-12)
JF1 Front Control Panel (p. 2-7)
JL1 Chassis Intrusion Header (p. 2-13)
JP12 Power Supply Fail Header (p. 2-13)
LINE IN Audio In Connector
LINE OUT Audio Out (Speaker) Connector
MIC Microphone Input
PWR_SEC Secondary ATX Power Connector (p. 2-8)
SLED1 SCSI LED Indicator (p. 2-14)
THRM FAN Thermal Control Fan Header (p. 2-11)
WOL Wake-on-LAN Header (p. 2-12)
WOR Wake-on-Ring Header (p. 2-13)

Introduction

1-7

SUPER PIIIDR3/PIIIDRE User's Manual

Introduction

J22

Parallel

Port

COM1

Ethernet Port

12"

LINE IN

LINE OUT

MIC

®

J13

PS/2 KB

PS/2 MOUSE

ATX POWER

J27

J12
USB

J38

COM2

GAME

PORT

JP11

J44

J34

SUPER PIIIDRE

Figure 1-4. SUPER PIIIDRE Layout

(not drawn to scale)

PCI 1

PCI 2

PCI 3

PCI 4

CPU 1

1

JP3

AGP PRO

PCI64 #1

PCI64 #2

CPU 1

FAN

11.95"

CPU 2

J8

J9

J10

J11

CPU 2

FAN

J14

J13

THRM

FAN

JL1

FWH
(BIOS)

WOL

JP4A

JP4 JP5

JP12

ank0
B

1

JP7

ank1
B

JP13

J48 J46 J15 J47 J14 J49

Y

R

E

T

T

A

B

1

WOR JBT1

ank2
B

BT1

CH FAN

ank3
B

1

PWR_SEC

J28

#2
E

ID

1

IR Header

JP10

CH FAN

E #1
ID

BZ1

2

PPY
FLO

J16

JF1

CHFAN 3

CHFAN 4

Also see the figure on page 2-6 for the locations of the I/O ports and
2-7 for the Front Control Panel (JF1) connectors.

1-8

Chapter 1: Introduction

Jumpers Description Default Setting
JBT1 CMOS Clear (p. 2-14) Pin 1-2 (Normal)
JP3 Front Side Bus Speed (p. 2-15) Pin 1-2 (CPU Select)
JP4/4A Manufacturer's Setting Pin 1-2
JP5 Host Bus ECC (p. 2-15) Closed (Enabled)
JP7 AC97 Audio (p. 2-15) Pin 1-2 (Enabled)
JP10 Overheat Alarm (p. 2-16) Closed (Enabled)
JP11 Onboard LAN/NIC (p. 2-16) Closed (Enabled)
JP13 P/S Failure Alarm (p. 2-17) Open (Disabled)

Connectors Description

CHASSIS FAN1 Primary Chassis Fan Header (p. 2-11)
CHASSIS FAN2 Secondary Chassis Fan Header (p. 2-11)
COM1/COM2 COM1/COM2 Serial Port Conn/Hdr (p. 2-11)
CPU1/CPU2 FAN CPU1/CPU2 Fan Header (p. 2-11)
GAME Game Port
IR Header Infrared Device Header (p. 2-11)
J46, J47, J48, J49 Memory (RAM) Slots (p. 2-4)
J12 Universal Serial Bus Ports (p. 2-12)
J13 PS/2 Keyboard/Mouse (p. 2-12)
J14, J15 IDE Hard Disk Drive Connectors (p. 2-18)
J16 Floppy Disk Drive Connector (p. 2-18)
J22 Parallel Printer Port (p. 2-18)
J27 ATX Power Connector (p. 2-8)
J34 Audio CD Input (small connector) (p. 2-12)
J38 Ethernet Port
J44 Audio CD Input (large connector) (p. 2-12)
JF1 Front Control Panel (p. 2-7)
JL1 Chassis Intrusion Header (p. 2-13)
JP12 Power Supply Fail Header (p. 2-13)
LINE IN Audio In Connector
LINE OUT Audio Out (Speaker) Connector
MIC Microphone Input
PWR_SEC Secondary ATX Power Connector (p. 2-8)
THRM FAN Thermal Control Fan Header (p. 2-11)
WOL Wake-on-LAN Header (p. 2-12)
WOR Wake-on-Ring Header (p. 2-13)

Introduction

1-9

SUPER PIIIDR3/PIIIDRE User's Manual

Introduction

AGP Pro/4x

AC'97

USB

SuperI/O

LPC

Pentium III/II

CPU

133/100 MHz Host Bus

MCH

1.5 Mb/sec

ICH

241 BGA

BIOS 4Mb

FWH

Pentium III/II

CPU

P64H

ATA66 IDE

Ports

RIMM Slots

33 MHz

PCI Slots

66 MHz

PCI Slots

Figure 1-5. 840 Chipset:

System Block Diagram

NOTE: See the following page for the actual specifica-

tions of each motherboard.

1-10

Chapter 1: Introduction

Features of the PIIIDR3/PIIIDRE

CPU

• Single or dual Pentium II 350-450 MHz processors at 100 MHz bus
speed or single or dual Pentium III 450-933 MHz processors at 133/100

MHz bus speed Note: Please refer to the support section of our web site for a complete

listing of supported processors. (http://www.supermicro.com/TechSupport.htm)

Memory

• Four 184-pin RIMM sockets supporting up to 2 GB RAMBUS

Note: Please see page 3-3 for details on supported memory.

Chipset

• Intel 840-ICH (see page 1-13 for details)

Expansion Slots

• Two 64-bit, 66 MHz PCI slots

• Four 32-bit, 33 MHz PCI slots

• 1 AGP Pro/4xAGP slot

Introduction

BIOS

• 4 Mb Firmware Hub AMI® Flash BIOS

• APM 1.2, DMI 2.1, PCI 2.2, ACPI 1.0, Plug and Play (PnP)

PC Health Monitoring

• Seven onboard voltage monitors for CPU core, chipset voltage, +3.3V,
±5V and ±12V

• Four-fan status monitor with firmware/software on/off control

• Environmental temperature monitor and control

• CPU fan auto-off in sleep mode

• Power-up mode control for recovery from AC power loss

• System overheat LED and control

• System resource alert

• Hardware BIOS virus protection

• Auto-switching voltage regulator for the CPU core

ACPI/PC 98 Features

• Microsoft OnNow

• Slow blinking LED for suspend state indicator

1-11

SUPER PIIIDR3/PIIIDRE User's Manual

• BIOS support for USB keyboard

• Real-time clock wake-up alarm

• Main switch override mechanism

Introduction

• External modem ring-on

• STR (Suspend to RAM)

Onboard I/O

• AIC-7892 for single channel Ultra160 SCSI (PIIIDR3 only)

• 2 EIDE bus master interfaces support Ultra DMA/66

• 1 floppy port interface (up to 2.88 MB)

• 2 Fast UART 16550A compatible serial ports

• 1 EPP (Enhanced Parallel Port) and ECP (Extended Capabilities Port)
supported parallel port

• PS/2 mouse and PS/2 keyboard ports

• 1 infrared port

• 2 USB (Universal Serial Bus) ports

Other

• AOL2 (see page 1-14)

• Selectable CPU and chassis fan speed control (set in BIOS)

• Internal/external modem ring-on

• Recovery from AC power loss control

• Wake-on-LAN (WOL)

• Multiple FSB clock frequency selections (set in BIOS)

CD Utilities

• BIOS flash upgrade utility

• Drivers for 840 chipset utilities

Dimensions

• SUPER PIIIDR3 - Extended ATX: 12" x 11.95" (305 x 304 mm)

• SUPER PIIIDRE - Extended ATX: 12" x 11.95" (305 x 304 mm)

1-12

Chapter 1: Introduction

1-2 Chipset Overview

Intel’s 840 chipset is based on the new modular design introduced by the
800 series chipsets and consisting of three main components. The 82840
Memory Controller Hub (MCH) provides support for 4x/2xAGP and AGP Pro.
(AGP Pro is a superset of 4xAGP.) An 82801 I/O Controller Hub (ICH)
connects the PCI slots, IDE controllers and USB ports to the MCH via an
accelerated hub architecture. The third main component is the 82802 Firm­ware Hub (FWH), which stores both system and video BIOS and includes a
Random Number Generator (RNG).

Memory Controller Hub (MCH)

The MCH includes the host (CPU) interface, DRAM interface, ICH interface,
4xAGP interface and P64 interface for the 840 chipset. It contains ad­vanced power management logic and supports dual channels for DRAM.
The AGP 2.0 interface supports 4x data transfer and 2x/4x fast write capa­bility and operates at a peak bandwidth of 266 MB/sec. The MCH host
interface bus (or front side bus) runs at 133/100 MHz.

I/O Controller Hub (ICH)

Introduction

The ICH is the Controller Hub for the I/O subsystem and integrates many of
the Input/Output functions of the 840 chipset, including a two-channel
UDMA/66 Bus Master IDE controller. It also provides the interface to the PCI
bus and communicates with the MCH over a dedicated hub interface.

Firmware Hub (FWH)

The FWH is a component that brings added security and manageability to
the PC platform infrastructure. This device includes an integrated Random
Number Generator (RNG) for stronger encryption, digital signing and secu­rity protocols. The FWH stores the system BIOS and video BIOS to eliminate
a redundant nonvolatile memory component.

PCI 64-bit Hub (P64H)

The P64H chip provides a bridge between the MCH and the PCI bus. It has
a 16-bit primary hub interface to the MCH and a secondary 64-bit PCI Bus
interface, which supports both 64-bit and 32-bit PCI devices. The P64H is
PCI 2.2 compliant.

1-13

SUPER PIIIDR3/PIIIDRE User's Manual

Suspend to RAM (STR)

When the system goes into a sleep state, power is removed from most of

Introduction

the system components but can remain supplied to RAM to quickly restore
the system to its previous state of operation. Because system restoral
happens in only ~5 seconds, applications that were open before the sleep
state can reopen for immediate access. In STR, all data in system memory
is stored in RAM when the system is suspended and system power is
turned off (the power supply fan also shuts off). You must be running
ACPI for this feature to take effect (see Section 1-4 for details on initiating
ACPI). All drivers and add-on cards must be ACPI supported for STR to
function. Note: STR only works with a single processor installed.

Alert on LAN 2 (AOL2)

AOL2 ASIC brings an advanced level of management interface between a
remote management console/server and the client system. It provides inter­faces to the 82559 Ethernet controller chip and to system monitoring de­vices. AOL2 can send "Alert" messages to the mangagement console to
notify administrators of important events or problems such as high tempera­tures, chassis intrusion and voltages exceeding safe margins.

Recovery from AC Power Loss

BIOS provides a setting for you to determine how the system will respond
when AC power is lost and then restored to the system. You can choose
for the system to remain powered off (in which case you must hit the
power switch to turn it back on) or for it to automatically return to a power
on state. See the Power Lost Control setting in the BIOS chapter of this
manual to change this setting. The default setting is Always OFF.

1-3 PC Health Monitoring

This section describes the PC health monitoring features of the SUPER
PIIIDR3/PIIIDRE. Both have an onboard System Hardware Monitor chip that
supports PC health monitoring.

Seven Onboard Voltage Monitors for the CPU Core, Chipset
Voltage, +3.3V,

The onboard voltage monitor will scan these seven voltages continuously.
Once a voltage becomes unstable, it will give a warning or send an error

±±

±5V and

±±

±±

±12V

±±

1-14

Chapter 1: Introduction

message to the screen. Users can adjust the voltage thresholds to define
the sensitivity of the voltage monitor.

Four-Fan Status Monitor with Firmware/Software On/Off
Control

The PC health monitor can check the RPM status of the cooling fans. The
onboard 3-pin CPU and chassis fans are controlled by the power manage­ment functions. The thermal fan is controlled by the overheat detection
logic.

Environmental Temperature Control

The thermal control sensor monitors the CPU temperature in real time and
will turn on the thermal control fan whenever the CPU temperature exceeds
a user-defined threshold. The overheat circuitry runs independently from
the CPU. It can continue to monitor for overheat conditions even when the
CPU is in sleep mode. Once it detects that the CPU temperature is too high,
it will automatically turn on the thermal control fan to prevent any overheat
damage to the CPU. The onboard chassis thermal circuitry can monitor the
overall system temperature and alert users when the chassis temperature
is too high.

Introduction

CPU Fan Auto-Off in Sleep Mode

The CPU fan activates when the power is turned on. It can be turned off
when the CPU is in sleep mode. When in sleep mode, the CPU will not run
at full power, thereby generating less heat.

CPU Overheat LED and Control

This feature is available when the user enables the CPU overheat warning
function in the BIOS. This allows the user to define an overheat tempera­ture. When this temperature is exceeded, both the overheat fan and the
warning LED are triggered.

System Resource Alert

This feature is available when used with Intel's LANDesk Client Manager
(optional) to notify the user of certain system events. For example, if the
system is running low on virtual memory and there is insufficient hard drive
space for saving the data, you can be alerted of the potential problem.

1-15

SUPER PIIIDR3/PIIIDRE User's Manual

Hardware BIOS Virus Protection

The system BIOS is protected by hardware so that no virus can infect the

Introduction

BIOS area. The user can only change the BIOS content through the flash
utility provided by SUPERMICRO. This feature can prevent viruses from
infecting the BIOS area and destroying valuable data.

Auto-Switching Voltage Regulator for the CPU Core

The auto-switching voltage regulator for the CPU core can support up to
20A current and auto-sense voltage IDs ranging from 1.3V to 3.5V. This
will allow the regulator to run cooler and thus make the system more stable.

1-4 ACPI/PC 98 Features

ACPI stands for Advanced Configuration and Power Interface. The ACPI
specification defines a flexible and abstract hardware interface that pro­vides a standard way to integrate power management features throughout
a PC system, including its hardware, operating system and application soft­ware. This enables the system to automatically turn on and off peripherals
such as CD-ROMs, network cards, hard disk drives and printers. This also
includes consumer devices connected to the PC such as VCRs, TVs, tele­phones and stereos.

In addition to enabling operating system-directed power management, ACPI
provides a generic system event mechanism for Plug and Play and an oper­ating system-independent interface for configuration control. ACPI lever­ages the Plug and Play BIOS data structures while providing a processor
architecture-independent implementation that is compatible with both Win­dows 98 and Windows NT 5.0. Note: To utilize ACPI, you must reinstall
Windows 98. To reinstall Windows 98 with ACPI, enter DOS and type
"setup /p J" at the CDROM prompt (usually D:\) with the Windows 98 CD
loaded. (Make sure you include the spaces after "setup" and "p".) Then hit
<Enter>. You can check to see if ACPI has been properly installed by
looking for it in the Device Manager, which is located in the Control Panel in
Windows.

Microsoft OnNow

The OnNow design initiative is a comprehensive, system-wide approach to
system and device power control. OnNow is a term for a PC that is always
on but appears to be off and responds immediately to user or other re-

1-16

Chapter 1: Introduction

quests.

Slow Blinking LED for Suspend-State Indicator

When the CPU goes into a suspend state, the chassis power LED will start
blinking to indicate that the CPU is in suspend mode. When the user presses
any key, the CPU will wake-up and the LED will automatically stop blinking
and remain on.

BIOS Support for USB Keyboard

If a USB keyboard is the only keyboard in the system, it will work like a
normal keyboard during system boot-up.

Real Time Clock Wake-Up Alarm

Although the PC may appear to be off when not in use, it is still capable of
responding to preset wake-up events. In the BIOS, the user can set a timer
to wake-up the system at a predetermined time.

Main Switch Override Mechanism

Introduction

When an ATX power supply is used, the power button can function as a
system suspend button. When the user depresses the power button, the
system will enter a SoftOff state. The monitor will be suspended and the
hard drive will spin down. Depressing the power button again will cause
the whole system to wake-up. During the SoftOff state, the ATX power
supply provides power to keep the required circuitry in the system alive. In
case the system malfunctions and you want to turn off the power, just
depress and hold the power button for 4 seconds. The power will turn off
and no power will be provided to the motherboard.

External Modem Ring-On

Wake-up events can be triggered by a device such as the external modem
ringing when the system is in the SoftOff state. Note that external modem
ring-on can only be used with an ATX 2.01 (or above) compliant power
supply.

1-17

SUPER PIIIDR3/PIIIDRE User's Manual

Wake-On-LAN (WOL)

Wake-On-LAN is defined as the ability of a management application to re-

Introduction

motely power up a computer that is powered off. Remote PC setup, up­dates and asset tracking can occur after hours and on weekends so that
daily LAN traffic is kept to a minimum and users are not interrupted. The
motherboards have a 3-pin header (WOL) to connect to the 3-pin header on
a Network Interface Card (NIC) that has WOL capability. Wake-On-LAN
must be enabled in BIOS. Note that Wake-On-Lan can only be used with an
ATX 2.01 (or above) compliant power supply.

1-5 Power Supply

As with all computer products, a stable power source is necessary for
proper and reliable operation. It is even more important for processors that
have high CPU clock rates of 300 MHz and above.

The SUPER PIIIDR3/PIIIDRE accommodates ATX power supplies. Although
most power supplies generally meet the specifications required by the CPU,
some are inadequate.

It is strongly recommended that you use a high quality power supply that
meets ATX power supply Specification 2.02 or above. Additionally, in ar­eas where noisy power transmission is present, you may choose to install
a line filter to shield the computer from noise. It is recommended that you
also install a power surge protector to help avoid problems caused by
power surges.

1-6 Super I/O

The disk drive adapter functions of the Super I/O chip include a floppy disk
drive controller that is compatible with industry standard 82077/765, a data
separator, write pre-compensation circuitry, decode logic, data rate selec­tion, a clock generator, drive interface control logic and interrupt and DMA
logic. The wide range of functions integrated onto the Super I/O greatly
reduces the number of components required for interfacing with floppy disk
drives. The Super I/O supports one 360 K, 720 K, 1.2 M, 1.44 M or 2.88 M
disk drive and data transfer rates of 250 Kb/s, 500 Kb/s or 1 Mb/s.

1-18

Chapter 1: Introduction

It also provides two high-speed, 16550 compatible serial communication
ports (UARTs), one of which supports serial infrared communication. Each
UART includes a 16-byte send/receive FIFO, a programmable baud rate
generator, complete modem control capability and a processor interrupt sys­tem. Both UARTs provide legacy speed with baud rate of up to 115.2 Kbps
as well as an advanced speed with baud rates of 250 K, 500 K, or 1 Mb/s,
which support higher speed modems.

The Super I/O supports one PC-compatible printer port (SPP), Bi-directional
Printer Port (BPP) , Enhanced Parallel Port (EPP) or Extended Capabilities Port
(ECP).

The Super I/O provides functions that comply with ACPI (Advanced Configuration
and Power Interface), which includes support of legacy and ACPI power manage­ment through an SMI or SCI function pin. It also features auto power manage­ment to reduce power consumption.

The IRQs, DMAs and I/O space resources of the Super I/O can flexibly adjust to
meet ISA PnP requirements, which suppport ACPI and APM (Advanced Power
Management).

Introduction

1-19

SUPER PIIIDR3/PIIIDRE User's Manual

Notes

Introduction

1-20

Chapter 2: Installation

Chapter 2

Installation

2-1 Static-Sensitive Devices

Static-sensitive electrical discharge can damage electronic components. To
prevent damage to your system board, it is important to handle it very carefully.
The following measures are generally sufficient to protect your equipment from
static discharge.

Precautions

• Use a grounded wrist strap designed to prevent static discharge.

• Touch a grounded metal object before removing the board from the antistatic
bag.

• Handle the board by its edges only; do not touch its components, peripheral
chips, memory modules or gold contacts.

• When handling chips or modules, avoid touching their pins.

• Put the motherboard and peripherals back into their antistatic bags when not
in use.

• For grounding purposes, make sure your computer chassis provides excellent
conductivity between the power supply, the case, the mounting fasteners and
the motherboard.

Unpacking

The motherboard is shipped in antistatic packaging to avoid static damage.
When unpacking the board, make sure the person handling it is static protected.

Installation

2-1

SUPER PIIIDR3/PIIIDRE User's Manual

2-2 Processor Installation

The following pages cover the installation procedure. You should install the
processor to the motherboard first, then install the motherboard in the chas­sis, then the memory and add-on cards, and finally the cables and drivers.
Following the installation procedures in the order they appear in this chap-

Installation

ter should eliminate the most common problems you may encounter. IM­PORTANT: Always connect the power cord last and always remove
it before adding, removing or changing any hardware components.

Follow the instructions that came with your processor or heat sink to
attach a heat sink to the processor. Your heat sink should have a 3-pin
fan, which connects to the CPU 1/2 header. Make sure that good contact
is made between the CPU cartridge and the heat sink, particularly with
SECC2 Pentium III OEM packages. Insufficient contact will cause the
processor to overheat, which may crash the system. Also, due to the
high power consumption of the 840's MCH and MRH-S chips, the heat
sinks on these chips must be provided with adequate airflow.

Your motherboard has a preinstalled URM (Universal Retention Mecha­nism). A picture of a URM is shown in Figure 2-1. (This is one of
several types - all of which can support SEPP, SECC and SECC2 pack­ages.) Before installing your processor, you must flip the arms of the
URM to their upright positions. Some URMs may have extra caps to be
used for Pentium III processors (AMP URMs do not use these). After the
processor is installed in the motherboard, place one of these caps (if
included) on each end of the URM and push down until they snap into
place. These caps are not left/right specific.

!

Heat Sink

URM

When handling the processor package, avoid placing
direct pressure on the label area of the fan.

Processor

You are now ready to install the processor. Your motherboard has a Slot
1 type connector, which supports Celeron, Pentium II* and Pentium III pro­cessors housed in SEPP, SECC* and SECC2 packages, respectively. Please
see the note on the following page when installing a Pentium II processor
with the SECC package.

2-2

Chapter 2: Installation

*Note: The Pentium II processor comes in the SECC package, which has
locking tabs on the top corners. Before installing the Pentium II package into
the URM, push these two locks inward until you hear a click. (After you
have fully seated the processor into the Slot 1 connector as instructed
below, these locks should return to their outer positions.)

Arm (in upright
position)

Installation

Figure 2-1. Universal Retention Mechanism (URM)

With the heat sink facing toward the memory slots, slide the SEPP/SECC/
SECC2 processor package into the URM and continue pushing it down until
fully seated in the Slot 1 connector. Some URMs have extra caps to be
used for SECC2 processors (AMP URMs do not have these). If so, after the
processor is installed in the motherboard, place a cap on each end of the
URM and push down until they snap into place. These caps are not left/
right specific.

2-3 Mounting the Motherboard in the Chassis

All motherboards have standard mounting holes to fit different types of
chassis. Use the mounting holes to orient the motherboard to the mother­board tray in the chassis. Chassis may include a variety of mounting fas­teners made of metal, plastic or both. Metal fasteners are the most highly
recommended because they ground the motherboard to the chassis. For
this reason, it is best to use as many metal fasteners as possible. You
should also use a wrist strap when installing the motherboard.

2-3

SUPER PIIIDR3/PIIIDRE User's Manual

2-4 Installing RIMMs

CAUTION

Exercise extreme care when installing or removing RIMM

modules to prevent any possible damage.

continuity modules must be installed into any empty

RIMM slots.

Also note that

Installation

1. Insert RIMMs as required for desired system memory. Note that the

2. Insert each RIMM module vertically into its slot. Pay attention to the

3. Gently press down on the RIMM module until it snaps into place in the

RAMBUS Support (Important!)

The Memory Controller Hub (MCH) enables the use of RAMBUS in the
RIMM slots on the PIIIDR3/PIIIDRE. This hub supports both ECC and non­ECC type memory. Check the Memory ECC Mode BIOS setting to
enable the use of ECC. (See Section 1-2 for more on the MCH.)
Also, be aware that PC800 RAMBUS can only be used when running at a
133 MHz FSB speed. PC700 can only be used when running with a 100
MHz FSB speed.

RIMM Installation (See Figure 2-2)

PIIIDR3/PIIIDRE uses an interleaved memory scheme for increased
performance. This requires you to install at least two mod-

ules at a time and in pairs (not one or three modules). If
installing only two modules, they must be installed into
either Banks 0 and 2 or Banks 1 and 3. See "RAMBUS Support"

below for details on supported memory.

two notches along the bottom of the module to prevent inserting the
module incorrectly.

slot. As stated in 1 above, you must populate either two or four
banks of memory.
Note: Continuity modules

must

be installed in empty RIMM slots.

Note: Dual memory module installation (required minimum)

If installing only two RIMM modules, install them in the two RIMM slots
nearest to the CPU slot and insert continuity modules in the RIMM slots
that remain empty.

2-4

Chapter 2: Installation

Figure 2-2. RIMM Installation

Side View of RIMM Installation into Slot

Tab

Notch

Tab Tab

Note: Notches

should align

with their

receptive points

on the slot.

RIMM

RIMM Slot

To Install:

With the tabs pulled outward, insert the RIMM module
vertically and press down straight down until it snaps into
place. Pay attention to the alignment of the two notches.

Top View of RIMM Slot

Tab Tab

To Remove:

Use your thumbs to gently push out the tabs at both ends of
the module. This should release it from the slot.

Tab

Notch

Installation

2-5

SUPER PIIIDR3/PIIIDRE User's Manual

2-5 Port/Control Panel Connector Locations

The I/O ports are color coded in conformance with the PC 99 specification.
See Figure 2-3 below for the colors and locations of the various I/O ports.

Figure 2-3. I/O Port Locations and Definitions

Installation

Mouse
(Green)

Parallel Port
(Burgundy)

USB

Ports

(Black)

Ethernet
Port
(Black)

Game Port
(Gold)

Keyboard
(Purple)

COM1 Port
(Turquoise)

Line Out Line In Mic

(Lime) (Light blue) (Pink)

2-6

Chapter 2: Installation

Front Control Panel

JF1 contains header pins for various front control panel connectors.
See Figure 2-4 for the pin definitions of the speaker, overheat LED,
keyboard lock, chassis intrusion, I2C, USB0, reset, power on, hard
drive LED and power LED headers, which are all located on JF1.
Please note that even and odd numbered pins are on opposite sides.
Refer to pages 2-8 to 2-11 for details.

34

33

Speaker

Overheat

LED

Keyboard

Lock

Chassis

Intrusion

I2C

NIC

Unused

2

JF1

1

USB0

Unused

Reset

PWR_ON

IDE LED

PWR_LED

Installation

Figure 2-4. Front Control Panel Connectors

2-7

SUPER PIIIDR3/PIIIDRE User's Manual

2-6 Connecting Cables

(see previous page for JF1 connection locations)

Power Supply Connector

After you have securely installed
the motherboard, memory and
add-on cards, you are ready to
connect the cables. Attach an

Installation

ATX power supply cable to J27
making sure the tabs on both con­nectors are aligned. See Table 2­1 for the pin definitions of an ATX
power supply.

Secondary Power Connector

Use of the Secondary Power con­nector (PWR_SEC) is recom­mended when a heavy load of pe­ripherals has been added to the
motherboard. See Table 2-2 for
pin definitions.

nector and be sure to check the power supply
layout before attaching it.

Note: Use a 6-pin con-

Table 2-1

ATX Power Supply Connector

Pin Definitions (J27)

Pin Number Definition
1 3.3V
2 3.3V3
3 Ground
4 5V
5 Ground
6 5V
7 Ground
8 PW-OK
9 5VSB
10 1 2V

Table 2-2

Secondary Power Connector

(PWR_SEC)

Pin
Number Definition
1 Ground
2 Ground
3 Ground
4 +3.3V
5 +3.3V
6 +5V (keyed)

Pin Number Definition
11 3.3V
12 -12V
13 Ground
14 PS -O N
15 Ground
16 Ground
17 Ground
18 -5V
19 5 V
20 5 V

Power LED

The Power LED connection is lo­cated on pins 1, 3 and 5 of JF1.
See Table 2-3 for pin definitions.

Hard Drive LED

The Hard Drive LED connection is
located on pins 7 and 9 of JF1.
Attach the hard drive LED cable to
these pins to display disk activity.
See Table 2-4 for pin definitions.

2-8

Table 2-3

PWR_LED Pin

Definitions (JF1)

Pin

Number

1
3
5

Table 2-4

IDE_LED Pin

Definitions

(JF1)

Pin

Number

7
9

HD Active

Definition

Definition

+5V
Key

GND

+5V

Chapter 2: Installation

PWR_ON

The PWR_ON connection is lo­cated on pins 11 and 13 of JF1.
Momentarily contacting both pins
will power on/off the system. The
user can also configure this but­ton to function as a suspend but­ton. (See the Power Button Mode
setting in BIOS.) To turn off the
power when set to suspend mode,
hold down the power button for at
least 4 seconds. See Table 2-5
for pin definitions.

NIC_LED

The Network Interface Controller
LED connection is located on pins
12 and 14 of JF1. Attach the NIC
LED cable to these pins to display
network activity. See Table 2-6
for pin definitions.

Table 2-5

PWR_ON Connector

Pin Definitions

(JF1)

Pin

Number

Definition

11

PW_ON

13

Ground

Table 2-6

NIC_LED Pin

Definitions

(JF1)

Pin

Number

Definition

12

+5V

14

GND

Installation

Reset

The Reset connection is located
on pins 15 and 17 of JF1. This
connector attaches to the hard­ware reset switch on the com­puter case. See Table 2-7 for pin
definitions.

I2C

The I2C connection is located on
pins 16 and 18 of JF1. See Table
2-8 for pin definitions.

2-9

Table 2-7
Reset Pin

Definitions

(JF1)

Pin

Number

Definition

15

Reset

17

Ground

Table 2-8

I2C Pin Definitions

(JF1)

Pin

Number

Definition

16

SDA

18

SCL

SUPER PIIIDR3/PIIIDRE User's Manual

The Chassis Intrusion connection
is located on pin 20 of JF1. See
Table 2-9 for pin definitions.

Installation

The Keyboard Lock connection is
located on pins 22 and 24 of JF1.
See Table 2-10 for pin definitions.
Pins 5 through 7 are for the power
LED. Pins 8 and 9 are for the
keylock.

Connect an LED to the OH connec­tion on pin 26 of JF1 to provide
advanced warning of chassis
overheating. Refer to Table 2-11
for pin definitions.

Chassis Intrusion

Keyboard Lock

Overheat LED (OH)

Table 2-9

Chassis Intrusion (IT)

Pin Definitions (JF1)

Pin

Number20Definition

Intrusion Input

Table 2-10

Keyboard Lock

(KL) Pin Definitions

(JF1)

Pin

Number

Definition

22

+5V

24

GND

Table 2-11

Overheat LED (OH)

Pin Definitions (JF1)

Pin

Number10Definition

OH Active

NOTE: Because the OH and USB0 connectors both share pin 25, you cannot
have both connnected at the same time.

Extra Universal Serial Bus
Connection (USB0)

Table 2-12

An additional connection for USB0

USB0 Pin

Definitions

is included on pins 25, 27, 29 and
31 of JF1 for front side USB ac­cess. You cannot have devices
connected to both this and the
back side connector at J12. See

Pin

Number

1
2
3
4

Definition

+5V

Key

IRRX

Ground

Table 2-12 for pin definitions. You
will need a USB cable (not in­cluded) to use this connection.

2-10

Chapter 2: Installation

Speaker

The speaker connection is located
on pins 28, 30, 32 and 34 of JF1.
See Table 2-13 for pin definitions.

Infrared Header

A 6-pin header for infrared de­vices is located just below JF1 on
the motherboard. See Table 2-14
for pin definitions. Also, see the
Technical Support section of our
web page for information on infra­red devices you can connect to
the motherboard.

Fan Headers*

The thermal control fan header is
designated THRM FAN on your
board. The CPU and chassis fan
headers are designated CPU1,
CPU2, CHASSIS FAN1 and CHAS­SIS FAN2, respectively. Refer to
Table 2-15 for pin definitions.

Table 2-13

Speaker Connector Pin

Definitions (JF1)

Pin

Number

Function

28

+

30

Key
32
34

Infrared (IR) Pin

Pin

Number

Fan Header Pin Definitions

(THRM FAN, CPU1/2, CHASSIS

Pin

Number

1
2
3

* Caution: These fan headers
are DC power.

Definition

Red wire, Speaker data

No connection

Speaker data

Table 2-14

Definitions

Definition

1

+5V

2

Key

3

IRRX

4

Ground

5

IRTX

Table 2-15

FAN1/2)

Definition

Ground (black)

+12V (red)

Tachometer

Key

Installation

Serial Ports

Two connectors, for the COM1
and COM2 serial ports, are
provided on your board. COM1 is
located below the parallel port
(see Figure 2-3) and COM2 is
located just behind the Game
Port. See Table 2-16 for pin
definitions.

Serial Port Pin Definitions

Pin Number Definition
1 DC D
2 DS R
3 Serial In
4 R T S
5 Serial Out

2-11

Table 2-16

(COM1, COM2)

Pin Number Definition
6 CTS
7 DTR
8 RI
9 Ground
10 NC

SUPER PIIIDR3/PIIIDRE User's Manual

The ATX PS/2 keyboard and the
PS/2 mouse are located on J13.
See Table 2-17 for pin definitions.
(The mouse port is above the key­board port. See Figure 2-3.)

Installation

Two Universal Serial Bus connec­tors are located on J12. USB0 is
the bottom connector and USB1 is
the top connector. See Table 2-18
for pin definitions.

There are two CD headers of dif­ferent sizes on the motherboard to
enable audio CD playback. Con­nect an audio cable from your CD
player to whichever header fits
your cable's connector. Refer to
Table 2-19 for pin definitions.

ATX PS/2 Keyboard and
PS/2 Mouse Ports

Universal Serial Bus (USB)

CD Headers

Table 2-17

PS/2 Keyboard

and Mouse Port

Pin Definitions

(J13)

Pin

Number

Definition

1

Data

2

NC

3

Ground

4

VCC

5

Clock

6

NC

J12

Pin

Number

1
2
3
4

Table 2-18

J12

Pin
Number Definition
1 +5V
2 P0­ 3 P0+
4 Ground
5 Key

Table 2-19

(J34, J44)

Definition

Right Stereo Signal

Ground
Ground

Left Stereo Signal

Universal Serial Bus Pin Definitions

Pin
Number Definition
1 +5V
2 P0­ 3 P0+
4 Ground
5 N/A

Audio CD Header Pin Definitions

Wake-On-LAN

The Wake-On-LAN header is des­ignated as WOL. Refer to Table 2­20 for pin definitions. You must
enable the LAN Wake-Up setting in
BIOS to use this feature. You
must also have a LAN card with a
Wake-on-LAN connector and
cable.

2-12

Table 2-20
Wake-On-LAN Pin
Definitions (WOL)

Pin

Number

1
2
3

Definition

+5V Standby

Ground

Wake-up

Chapter 2: Installation

Wake-On-Ring

The Wake-On-Ring header is des­ignated as WOR. This function al­lows your computer to receive
and be "woken up" by an incoming
call when in the suspend state.
Refer to Table 2-21 for pin defini­tions. You must also have a WOR
card and cable to use WOR.

Extra Chassis Intrusion
Header

An additional chassis intrusion
header (the other is located on
JF1) is included on your mother­board at JL1. If a chassis intru­sion condition has been detected,
the mouse and keyboard will be
disabled (but no audible alarm will
be activated). All system opera­tions will halt until the intrusion
microswitch is set back to normal.
See Table 2-22 for pin definitions.

Table 2-21
Wake-On-Ring Pin
Definitions (WOR)

Pin

Number

Definition

1

+5V Standby

2

Ground

3

Wake-up

Table 2-22

Chassis Intrusion

Header Pin Definitions

(JL1)

Pin

Number

1

Intrusion Input

26

Definition

Ground

Installation

Power Supply Fail Header

Connect a cable from your power
supply to the header at JP12 to
provide warning of power supply
failure. This warning signal is
passed through the PWR_LED pin
on JL1 to provide indication of a
power failure on the chassis.
This feature is only available when
using Supermicro power supplies.
See Table 2-23 for pin definitions.

2-13

Pin

Number

1
2
3
4

Table 2-23

(JP12)

Definition
P/S 1 Fail Signal
P/S 2 Fail Signal
P/S 3 Fail Signal
Reset (from MB)

Power Supply Fail Header Pin Definitions

SUPER PIIIDR3/PIIIDRE User's Manual

SLED1 (SCSI LED) Indicator
(not on PIIIDRE)

The SLED connector is used to pro­vide an LED indication of SCSI ac­tivity. Refer to Table 2-24 for con­necting the SCSI LED.

2-7 Jumper Settings

Installation

Explanation of
Jumpers

To modify the operation of the moth­erboard, jumpers can be used to
choose between optional settings.
Jumpers create shorts between two
pins to change the function of the
connector. Pin 1 is identified with a
square solder pad on the printed cir­cuit board. See the motherboard
layout pages for jumper locations.

Table 2-24

SLED1 Pin Definitions

Pin

Number

1
2
3
4

Definition

Connector

Pins

Jumper

Cap

Setting

Positive
Negative
Negative

Positive

3 2 1

3 2 1

Pin 1-2 short

CMOS Clear

Refer to Table 2-25 for the jumper
settings to clear CMOS. Always
remove the AC power cord from
the system before clearing CMOS.

NOTE: For an ATX power supply, you must
completely shut down the system, remove the
AC power cord and
CMOS. Replace JBT1 back to the pin 1-2 posi­tion before powering up the system again. Do
not use the PW_ON connector to clear CMOS.

then

use JBT1 to clear

2-14

Table 2-25

CMOS Clear Jumper Settings

Jumper

Position

1-2
2-3

Position

1-2

Normal

(JBT1)

Definition

Normal

CMOS Clear

Position

2-3

CMOS Clear

Chapter 2: Installation

Front Side Bus Speed

Use JP3 to change the FSB speed.
You can also change the CPU
speed with the "CPU Speed at
FSB" setting in BIOS. This setting
will show you the actual CPU
speed for each FSB speed option
selected. See Table 2-26 for
jumper settings. Note: If the sys­tem does not reboot after chang­ing the CPU speed, clear CMOS,
reboot and then set the correct
CPU speed in BIOS.

Host Bus ECC

Jumper JP5 is used to enable or
disable ECC (Error Correction and
Control) on the host (front side)
bus. See Table 2-27 for jumper
settings.

Table 2-26
Front Side Bus Speed
Jumper Settings (JP3)

Jumper

Position

1-2
2-3

OFF

* Note: The Auto setting allows
the CPU to set the speed.

Host Bus ECC Enable/

Jumper Settings (JP5)

Jumper

Position

Table 2-27

1-2
2-3

Definition

Auto
133 MHz
100 MHz

Disable

Definition

Enabled

Disabled

Installation

AC'97 Enable/Disable

AC'97 brings high quality audio to
PCs. When enabled with JP7, au­dio is processed onboard. The
disabled setting should be se­lected when you wish to use an
add-on card for audio. See Table
2-28 for jumper settings.

2-15

Table 2-28
AC'97 Enable/Disable
Jumper Settings (JP7)

Jumper
Position

1-2
2-3

Definition

Enabled

Disabled

SUPER PIIIDR3/PIIIDRE User's Manual

Jumper JA1 allows you to enable
or disable termination for the SCSI
connectors. The normal (default)
position is open to enable SCSI
termination. See Table 2-29 for
jumper settings.

Installation

You may want to disable the audio
alarm signal that notifies you of
over temperature condtions.
Jumper JP10 gives you this option.
If disabled, you will still be notified
of such conditions by the Over­heat LED. See Table 2-30 for
jumper settings.

SCSI Termination Enable/
Disable (not on PIIIDRE)

Overheat Alarm Enable/
Disable

Table 2-29

SCSI Termination

Enable/Disable

Jumper Settings (JA1)

Jumper

Position

Open

Closed

Jumper Settings (JP10)

Jumper
Position

Open

Closed

Definition

Enabled

Disabled

Table 2-30

Overheat Alarm

Enable/Disable

Definition

Disabled
Enabled

Onboard LAN/NIC
Enable/Disable

Jumper JP11 enables or disables
the onboard LAN or NIC (Network
Interface Card) on your mother­board. See Table 2-31 for jumper
settings.

2-16

Table 2-31

Onboard LAN/NIC

Enable/Disable

Jumper Settings (JP11)

Jumper
Position

Open

Closed

Definition

Disabled
Enabled

Chapter 2: Installation

Power Supply Failure
Alarm Enable/Disable

The system will notify you in the
event of a power supply failure.
This alarm assumes that your
chassis has three power supply
units, with one acting as a backup.
If you only have one or two power
supply units installed, you should
disable this with JP13 to prevent
false alarms. See Table 2-32 for
jumper settings.

Table 2-32

Power Supply Failure

Alarm Enable/Disable

Jumper Settings (JP13)

Jumper

Position

Open

Closed

Definition
Disabled

Enabled

2-8 Parallel Port, Floppy/Hard Disk Drive, AGP

Port and SCSI Connections

Note the following when connecting the floppy and hard disk drive cables:

• The floppy disk drive cable has seven twisted wires.

Installation

• A red mark on a wire typically designates the location of pin 1.

• A single floppy disk drive ribbon cable has 34 wires and two connectors
to support two floppy disk drives. The connector with twisted wires
always connects to drive A, and the connector without twisted wires
always connects to drive B.

• The 80-wire ATA66 IDE hard disk drive cable that came with your system has
two connectors to support two drives. This special cable should be used to
take advantage of the speed this new technology offers. The blue connector
connects to the onboard IDE header and the other connector(s) to your hard
drive(s). Consult the documentation that came with your disk drive for details
on hard drive jumper locations and settings.

2-17

SUPER PIIIDR3/PIIIDRE User's Manual

Installation

The floppy connector is located
on J16. See Table 2-34 for pin
definitions.

Parallel (Printer) Port Pin Definitions

Pin Number Function
1 Strobe­ 3 Data Bit 0
5 Data Bit 1
7 Data Bit 2
9 Data Bit 3
11 Data Bit 4
13 Data Bit 5
15 Data Bit 6
17 Data Bit 7
19 A C K
21 BUSY
23 PE
25 SLCT

Table 2-33

(J22)

Pin Number Function
2 Auto Feed­ 4 Error­ 6 Init­ 8 SLCT IN­ 10 GN D
12 GN D
14 GN D
16 GN D
18 GN D
20 GN D
22 GN D
24 GN D
26 NC

Floppy Connector

Parallel Port Connector

The parallel port is located on J22.
See Table 2-33 for pin definitions.

Floppy Connector Pin Definitions (JP16)

Pin Number Function
1 GN D
3 GN D
5 Key
7 GN D
9 GN D
11 G N D
13 G N D
15 G N D
17 G N D
19 G N D
21 G N D
23 G N D
25 G N D
27 G N D
29 G N D
31 G N D
33 G N D

Table 2-34

Pin Number Function
2 FDHDIN
4 Reserved
6 FDEDIN
8 Index­ 10 Motor Enable
12 Drive Select B­ 14 Drive Select A­ 16 Motor Enable
18 DIR­ 20 STEP­ 22 Write Data­ 24 Write Gate­ 26 Track 00­ 28 Write Protect­ 30 Read Data­ 32 Side 1 Select­ 34 Diskette

Table 2-35

IDE Connector Pin Definitions

Pin Number Function
1 Reset IDE
3 Host Data 7
5 Host Data 6
7 Host Data 5
9 Host Data 4
11 Host Data 3
13 Host Data 2
15 Host Data 1
17 Host Data 0
19 GND
21 DRQ3
23 I/O Write­ 25 I/O Read­ 27 IOCHRDY
29 DACK3­ 31 IRQ14
33 Addr 1
35 Addr 0
37 Chip Select 0
39 Activity

(J14, J15)

Pin Number Function
2 G N D
4 Host Data 8
6 Host Data 9
8 Host Data 10
10 Host Data 11
12 Host Data 12
14 Host Data 13
16 Host Data 14
18 Host Data 15
20 Key
22 G N D
24 G N D
26 G N D
28 BALE
30 G N D
32 IOCS16­ 34 G N D
36 Addr 2
38 Chip Select 1­ 40 G N D

2-18

IDE Connectors

There are no jumpers to config­ure the onboard IDE connectors
J14 and J15. Refer to Table 2­35 for pin definitions. You
must use the ATA66 cable in­cluded with your system to
benefit from the ATA66 tech­nology.

Chapter 2: Installation

AGP Pro Slot

The AGP Pro slot is backward compatible with AGP and 4xAGP graphics
cards, which have fewer pins than AGP Pro cards. Because of this,
care must be taken when installing a graphics card into this slot, as doing
so incorrectly can damage your motherboard. For AGP Pro cards, you
should remove the orange sticker covering one end of the slot. For other
cards, leave this sticker in place and make sure your card does not plug
into the section it covers. A general rule of thumb is to make sure your
card fills the center section of pins first, then the end toward the edge of
the motherboard if there are more. If the I/O shield of your card is flush
with the edge of the motherboard, the card should be inserted correctly.

Edge of motherboard

AGP Pro Slot

50-pin Legacy SCSI
Connector

Refer to Table 2-36 for pin defini­tions for the 50-pin Legacy SCSI
connector located at JA6.

50-pin Legacy SCSI Connector Pin Definitions

Pin Number Function
1 GN D
2 GN D
3 GN D
4 GN D
5 GN D
6 GN D
7 GN D
8 GN D
9 GN D
10 G N D
11 G N D
12 Reserved
13 Open
14 Reserved
15 G N D
16 G N D
17 G N D
18 G N D
19 G N D
20 G N D
21 G N D
22 G N D
23 G N D
24 G N D
25 G N D

Table 2-36

(JA6)

Pin Number Function
26 -DB (0)
27 -DB (1)
28 -DB (2)
29 -DB (3)
30 -DB (4)
31 -DB (5)
32 -DB (6)
33 -DB (7)
34 -DB (P)
35 G N D
36 G N D
37 Reserved
38 Termpwr
39 Reserved
40 G N D
41 -ATN
42 G N D
43 -BSY
44 -ACK
45 -RST
46 -MSG
47 -SEL
48 -C/D
49 -REQ
50 -I/O

Installation

2-19

SUPER PIIIDR3/PIIIDRE User's Manual

Ultra Wide SCSI Connector

Refer to Table 2-37 for the Ultra
Wide SCSI pin definitions. The
connector is located at JA5.

Installation

Ultra Wide SCSI Connector (JA5)

Pin Number Function
1 GN D
2 GN D
3 GN D
4 GN D
5 GN D
6 GN D
7 GN D
8 GN D
9 GN D
10 G N D
11 G N D
12 G N D
13 G N D
14 G N D
15 G N D
16 G N D
17 Termpwrd
18 Termpwrd
19 G N D
20 G N D
21 G N D
22 G N D
23 G N D
24 G N D
25 G N D
26 G N D
27 G N D
28 G N D
29 G N D
30 G N D
31 G N D
32 G N D
33 G N D
34 G N D

Table 2-37

Pin Number Function
35 -DB (12)
36 -DB (13)
37 -DB (14)
38 -DB (15)
39 Parity H
40 -DB (0)
41 -DB (1)
42 -DB (2)
43 -DB (3)
44 -DB (4)
45 -DB (5)
46 -DB (6)
47 -DB (7)
48 Parity L
49 G N D
50 Termpwrd
51 Termpwrd
52 Termpwrd
53 NC
54 G N D
55 -ATTN
56 G N D
57 -BSY
58 -ACK
59 -RST
60 -MSG
61 -SEL
62 -C D
63 -REQ
64 -IO
65 -DB (8)
66 -DB (9)
67 -DB (10)
68 -DB (11)

2-20

Ultra160 SCSI
Connector

Refer to Table 2-38 for pin
definitions for the Ultra160
SCSI connector located at
JA2.

Chapter 2: Installation

Connector

Contact
Number

1
2
3
4
5
6
7
8

9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34

+DB(12)
+DB(13)
+DB(14)
+DB(15)

+DB(0)
+DB(1)
+DB(2)
+DB(3)
+DB(4)
+DB(5)
+DB(6)
+DB(7)
+DB(P)

+ATN
+BSY

+ACK
+RST

+MSG

+SEL

+C/D

+REQ

+I/O
+DB(8)
+DB(9)

+DB(10)
+DB(11)

Table 2-38

Connector

Contact
Number

35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68

Signal Names

-DB(12)

-DB(13)

-DB(14)

-DB(15)

-DB(P1)

-DB(0)

-DB(1)

-DB(2)

-DB(3)

-DB(4)

-DB(5)

-DB(6)

-DB(7)

-DB(P)
GROUND
GROUND

TERMPWR
TERMPWR

RESERVED

GROUND

-ATN

GROUND

-BSY

-ACK

-RST

-MSG

-SEL

-C/D

-REQ

-I/O

-DB(8)

-DB(9)

-DB(10)

-DB(11)

68-pin Ultra160 SCSI Connector (JA2)

Signal Names

+DB(P1)

GROUND

DIFFSENS
TERMPWR
TERMPWR

RESERVED

GROUND
GROUND

Installation

2-21

SUPER PIIIDR3/PIIIDRE User's Manual

2-9 Installing Software Drivers

After all the hardware has been installed you must install the software
drivers. The necessary drivers are all included on the Supermicro CD that
came packaged with your motherboard. After inserting this CD into your
CDROM drive, the display shown in Figure 2-5 should appear. (If this dis­play does not appear, click on the My Computer icon and then on the icon
representing your CDROM drive. Finally, double click on the S "Setup" icon.)

Installation

Figure 2-5. Driver/Tool Installation Display Screen

Click the icons showing a hand writing on paper to view the readme files
for each item. Click the tabs to the right of these

bottom

to install each item one at a time. After installing each item

marked "Reboot System", you must reboot the system before
moving on to the next item on the list. You should install everything

here except for the Security Drivers and the Super Doctor utility, which are
optional. The Security Drivers support multiple languages. Click the arrow
to pull down a menu of choices. The bottom icon with a CD on it allows you
to view the entire contents of the CD.

in order from top to

2-22

Chapter 3: Troubleshooting

Chapter 3

Troubleshooting

3-1 Troubleshooting Procedures

Use the following procedures to troubleshoot your system. If you have
followed all of the procedures below and still need assistance, refer to the
‘Technical Support Procedures’ and/or ‘Returning Merchandise for Service’
section(s) in this chapter. Note: Always disconnect the power cord

before adding, changing or installing any hardware components.

Before Power On

1. Make sure no short circuits exist between the motherboard and
chassis.

2. Disconnect all ribbon/wire cables from the motherboard, including those
for the keyboard and mouse.

3. Remove all add-on cards.

4. Install a CPU (making sure it is fully seated) and connect the chassis
speaker and the power LED to the motherboard. (Check all jumper
settings as well.)

Troubleshooting

No Power

1. Make sure no short circuits exist between the motherboard and the
chassis.

2. Verify that all jumpers are set to their default positions.

3. Check that the 115V/230V switch on the power supply is properly set.

4. Turn the power switch on and off to test the system.

5. The battery on your motherboard may be old. Check to verify that it
still supplies ~3VDC. If it does not, replace it with a new one.

No Video

1. If the power is on but you have no video, remove all the add-on cards
and cables.

2. Use the speaker to determine if any beep codes exist. Refer to
Appendix A for details on beep codes.

3-1

SUPER PIIIDR3/PIIIDRE User's Manual

If you are a system integrator, VAR or OEM, a POST diagnos-

tics card is recommended. For I/O port 80h codes, refer to

Memory Errors

1. Make sure the RIMM modules are properly and fully installed. Inter­leaved memory requires that modules must be installed in pairs (two
slots at a time).

2. Determine if different speeds of RIMMs have been installed and verify
that the BIOS setup is configured for the fastest speed of memory

Troubleshooting

used. It is recommended to use the same memory speed for all
RIMMs in the system.

3. For DIMMs, make sure you are using PC133 or PC100 compliant,
unbuffered SDRAM. EDO SDRAM is not supported.

4. Check for bad RIMM modules or slots by swapping modules between
slots and noting the results.

5. Make sure all memory modules are fully seated in their slots.

6. Check the power supply voltage 115V/230V switch.

NOTE

App. B.

Losing the System’s Setup Configuration

1. Check the setting of jumper JBT1. Ensure that you are using a high
quality power supply. A poor quality power supply may cause the
system to lose the CMOS setup information. Refer to Section 1-5 for
details on recommended power supplies.

2. The battery on your motherboard may be old. Check to verify that it
still supplies ~3VDC. If it does not, replace it with a new one.

3. If the above steps do not fix the Setup Configuration problem, contact
your vendor for repairs.

3-2 Technical Support Procedures

Before contacting Technical Support, please take the following steps. Also,
note that as a motherboard manufacturer, Supermicro does not sell directly
to end-users, so it is best to first check with your distributor or reseller for
troubleshooting services. They should know of any possible problem(s)
with the specific system configuration that was sold to you.

3-2

Chapter 3: Troubleshooting

1. Please go through the ‘Troubleshooting Procedures’ and 'Frequently
Asked Question' (FAQ) sections in this chapter or see the FAQs on our

web site (http://www.supermicro.com/techsupport.htm) before con­tacting Technical Support.

2. BIOS upgrades can be downloaded from our web site at
http://www.supermicro.com/techsupport/download.htm.

Note: Not all BIOS can be flashed depending on the modifica­tions to the boot block code.

3. If you still cannot resolve the problem, include the following information
when contacting Supermicro for technical support:

•Motherboard model and PCB revision number

•BIOS release date/version
(this can be seen on the initial display when your system first boots
up)

•System configuration
An example of a Technical Support form is on our web site at
http://www.supermicro.com/techsupport/contact_support.htm.

4. Distributors: For immediate assistance, please have your account number
ready when placing a call to our technical support department. We can
be reached by e-mail at [e-mail] or by fax at (408)
895-2012.

Troubleshooting

3-3 Frequently Asked Questions

Question: What are the various types of memory that the PIIIDR3/
PIIIDRE motherboard can support?

Answer: The PIIIDR3/PIIIDRE has 4 RIMM sockets, which support up to 2 GB

RDRAM. Use 300/400 MHz (600/800 MB/sec) RIMM modules for RAMBUS.
Both ECC and non-ECC RDRAM are supported. Check the Memory ECC
Mode setting in BIOS to enable the use of ECC.
Note:

Continuity modules must be installed into empty RIMM slots. In
addition, memory modules must be installed in pairs (two slots at a time)
because interleaved memory technology is used. If installing only two
modules, they must be installed into either Banks 0 and 2 or Banks 1 and

3.Also, be aware that PC800 RAMBUS can only be used when running at a
133 MHz FSB speed. PC700 can only be used when running with a 100
MHz FSB speed.

3-3

SUPER PIIIDR3/PIIIDRE User's Manual

Question: How do I update my BIOS?

Answer: It is recommended that you do not upgrade your BIOS if you are

experiencing no problems with your system. Updated BIOS files are located

on our web site at http://www.supermicro.com. Please check our BIOS
warning message and the info on how to update your BIOS on our web
site. Also, check the current BIOS revision and make sure it is newer than
your BIOS before downloading. Select your motherboard model and down­load the BIOS file to your computer. Unzip the BIOS update file and you will
find the readme.txt (flash instructions), the fwhflash.com (BIOS flash utility)
and the BIOS image (xxxxxx.rom) files. Copy these files onto a bootable
floppy and reboot your system. It is not necessary to set BIOS boot block
protection jumpers on the motherboard. At the DOS prompt, enter the com-

Troubleshooting

mand "fwhflash." This will start the flash utility and give you an opportunity
to save your current BIOS image. Flash the boot block and enter the name
of the update BIOS image file.

Note: It is important to save your current BIOS and rename it
"super.rom" in case you need to recover from a failed BIOS update.

Select flash boot block, then enter the update BIOS image. Select "Y" to
start the BIOS flash procedure and do not disturb your system until the
flash utility displays that the procedure is complete. After updating your
BIOS, please clear the CMOS then load Optimal Values in the BIOS.

Question: After flashing the BIOS my system does not have video.
How can I correct this?

Answer: If the system does not have video after flashing your new BIOS,

it indicates that the flashing procedure failed. To remedy this, first clear
CMOS per the instructions in this manual and retry the BIOS flashing proce­dure. If you still do not have video, please use the following BIOS Recov-
ery Procedure. First, make sure the keyboard wakeup jumper is disabled.
Then, turn your system off and place the floppy disk with the saved BIOS
image file (see above FAQ) in drive A. Press and hold <CTRL> and <Home>
at the same time, then turn on the power with these keys pressed until your
floppy drive starts reading. Your screen will remain blank until the BIOS
program is done. If the system reboots correctly, then the recovery was
successful. The BIOS Recovery Procedure will not update the boot block
in your BIOS.

3-4

Chapter 3: Troubleshooting

Question: Do I need the CD that came with your motherboard?

Answer: The supplied compact disc has quite a few drivers and programs

that will greatly enhance your system. We recommend that you review the
CD and install the applications you need. Applications on the CD include
840 chipset drivers for Windows and security and audio drivers.

Question: Why can't I turn off the power using the momentary
power on/off switch?

Answer: The instant power off function is controlled in BIOS by the Power

Button Mode setting. When the On/Off feature is enabled, the motherboard
will have instant off capabilities as long as the BIOS has control of the
system. When the Standby or Suspend feature is enabled or when the
BIOS is not in control such as during memory count (the first screen that
appears when the system is turned on), the momentary on/off switch must
be held for more than four seconds to shut down the system. This feature
is required to implement the ACPI features on the motherboard.

Question: I see some of my PCI devices sharing IRQs, but the sys­tem seems to be fine. Is this correct or not?

Answer: Some PCI Bus Mastering devices can share IRQs without perfor-

mance penalties. These devices are designed to work correctly while shar­ing IRQs. See Table 3-1 below for details on shared IRQs.

Troubleshooting

Table 3-1. Shared IRQs

PIIIDR3/PIIIDRE

PCI 1 shares an IRQ with the NIC and the AGP Pro slot
PCI 2 shares an IRQ with the onboard audio and the SM bus*
PCI 3 shares an IRQ with 64-bit PCI slots 1 and 2
PCI 4 shares an IRQ with the USB
*System Management bus

3-5

SUPER PIIIDR3/PIIIDRE User's Manual

Question: I installed my microphone correctly but I can't record any
sound. What should I do?

Answer: Go to <Start>, <Programs>, <Accessories>, <Entertainment> and

then <Volume Control>. Under the Properties tab, scroll down the list of
devices in the menu and check the box beside "Microphone".

Question: How do I connect the ATA66 cable to my IDE device(s)?

Answer: The 80-wire/40-pin ATA66 IDE cable that came with your system

has two connectors to support two drives. This special cable must be
used to take advantage of the speed the ATA66 technology offers. Con­nect the blue connector to the onboard IDE header and the other
connector(s) to your hard drive(s). Consult the documentation that came

Troubleshooting

with your disk drive for details on actual jumper locations and settings.

3-4 Returning Merchandise for Service

A receipt or copy of your invoice marked with the date of purchase is
required before any warranty service will be rendered. You can obtain
service by calling your vendor for a Returned Merchandise Authorization
(RMA) number. When returning to the manufacturer, the RMA number
should be prominently displayed on the outside of the shipping carton, and
mailed prepaid or hand-carried. Shipping and handling charges will be ap­plied for all orders that must be mailed when service is complete.

This warranty only covers normal consumer use and does not cover dam­ages incurred in shipping or from failure due to the alternation, misuse,
abuse or improper maintenance of products.

During the warranty period, contact your distributor first for any product
problems.

3-6

Chapter 4: BIOS

Chapter 4

BIOS

4-1 Introduction

This chapter describes the AMIBIOS for the PIIIDR3/PIIIDRE. The AMI ROM
BIOS is stored in a Flash EEPROM and can be easily upgraded using a
floppy disk-based program.

Note: Due to periodic changes to BIOS, some settings may have been
added or deleted and might not yet be recorded in this manual. Refer to the
Manual Download area of our web site for any changes to BIOS that are
not reflected in this manual.

System BIOS

The BIOS is the Basic Input Output System used in all IBM® PC, XT™, AT®,
and PS/2® compatible computers.

Configuration Data

AT-compatible systems, also called ISA (Industry Standard Architecture)
must have a place to store system information when the computer is turned
off. The original IBM AT had 64 kbytes of non-volatile memory storage in
CMOS RAM. All AT-compatible systems have at least 64 kbytes of CMOS
RAM, which is usually part of the Real Time Clock.

How Data Is Configured

AMIBIOS provides a Setup utility in ROM that is accessed by pressing <Del>
at the appropriate time during system boot. Setup configures data in CMOS
RAM.

POST Memory Test

Normally, the only visible POST routine is the memory test. The screen that
appears when the system is powered on is shown on the next page.

An AMIBIOS identification string is displayed at the left bottom corner of the
screen, below the copyright message.

4-1

BIOS

SUPER PIIIDR3/PIIIDRE User's Manual

4-2 BIOS Features

• Supports Plug and Play V1.0A and DMI 2.1

• Supports Intel PCI 2.2 (Peripheral Component Interconnect) local bus
specification

• Supports Advanced Power Management (APM) specification v 1.1

• Supports ACPI

• Supports Flash ROM

AMIBIOS supports the LS120 drive made by Matsushita-Kotobuki Electronics
Industries Ltd. The LS120:

• Can be used as a boot device

• Is accessible as the next available floppy drive

AMIBIOS supports PC Health Monitoring chips. When a failure occurs in a
monitored activity, AMIBIOS can sound an alarm and display a message. The
PC Health Monitoring chips monitor:

BIOS

• CPU temperature

• Additional temperature sensors

• Chassis intrusion

• Five positive voltage inputs

• Two negative voltage inputs

• Four fan-speed monitor inputs

4-3 Running Setup

*Optimal default settings are in bold text unless otherwise noted.

The BIOS setup options described in this section are selected by choos­ing the appropriate text from the Standard Setup screen. All displayed
text is described in this section, although the screen display is often all
you need to understand how to set the options (see on next page).

4-2

Chapter 4: BIOS

AMIBIOS HIFLEX SETUP UTILITY VERSION 1.18

© 1998 American Megatrends, Inc. All Rights Reserved.

STANDARD CMOS SETUP

ADVANCED CMOS SETUP
ADVANCED CHIPSET SETUP
POWER MANAGEMENT SETUP

PCI / PLUG AND PLAY SETUP

PERIPHERAL SETUP

AUTO-DETECT HARD DISK

CHANGE USER PASSWORD

CHANGE SUPERVISOR PASSWORD

AUTO CONFIGURATION WITH OPTIMAL SETTINGS

AUTO CONFIGURATION WITH FAIL-SAFE SETTINGS

Standard CMOS setup for changing time, date, hard disk type,
etc.

Esc:Exit ↑↑↓↓:Sel F2/F3:Color F10:Save & Exit

CHANGE LANGUAGE SETTING

SAVE SETTINGS AND EXIT

EXIT WITHOUT SAVING

AMIBIOS SETUP-STANDARD CMOS SETUP
(C)1998 American Megatrends, Inc. All Rights Reserved

Date (mm/dd/yyyy): Tue Sep 1,1998 Base Memory: 640
KB Time (hh/mm/ss) : 16:05:13 Extd Memory: 255
KB

Floppy Drive A: 1.44MB 3½
Floppy Drive B: Not Installed

LBA Blk PIO 32Bit
Type Size Cyln Head Wpcom Sec Mode Mode Mode Mode
Pri Master: Auto 42 40 981 5 981 17 Off Off Auto
On
Pri Slave: Not Installed
Sec Master: Not Installed
Sec Slave: Not Installed

Boot Sector Virus Protection Disabled

Month: Jan – Dec ESC:Exit ↑↓:Sel

Day: 01 – 31 PgUp/PgDn:Modify
Year: 1901 – 2099 F2/F3:Color

4-3

BIOS

SUPER PIIIDR3/PIIIDRE User's Manual

Standard CMOS Setup

Date and Time Configuration

Select the Standard option. Select the
for each category are displayed. Enter new values through the keyboard.

Floppy A
Floppy B

Choose the Floppy Drive A or B icon to specify the floppy drive type. The
settings are

inch, 1.44 MB 3½ inch

Not Installed, 360 KB 5¼ inch, 1.2 MB 5¼ inch, 720 KB 3½

or

2.88 MB 3½ inch

Safe settings for Floppy Drive A are 1.44 MB 3 1/2 inch and for Floppy
Drive B are Not Installed

Pri Master
Pri Slave
Sec Master
Sec Slave

Select these options to configure the drive named in the option. Select

Detect IDE

list of drive parameters appears. Click on OK to configure the drive.

to let AMIBIOS automatically configure the drive. A screen with a

.

Date/Time

icon. The current values

.

Note: The Optimal and Fail-

Auto

BIOS

Type How to Configure

SCSI Select

IDE Select

Type

. Select
parameter screen. The SCSI drivers provided by
the SCSI manufacturer should allow you to configure
the SCSI drive.

Type

. Select
the parameters. Click on OK when AMIBIOS
displays the drive parameters. Select
Select On if the drive has a capacity greater than
540 MB. Select the
allow block mode data transfers. Select the

mode

. Select
Select
determine the PIO Mode. It is best to select
allow AMIBIOS to determinethe PIO mode. If you
select a PIO mode that is not supported by the IDE
drive, the drive will not work properly. If you are
absolutely certain that you know the drive's PIO
mode, select PIO mode 0-4, as appropriate

On

PIO mode

. Select On to allow AMIBIOS to

4-4

Not Installed

Auto

to let AMIBIOS determine

on the drive

LBA Mode

Block Mode

. Select On to

32-bit

to allow 32-bit data transfers.

Auto

.

to

Chapter 4: BIOS

Entering Drive Parameters

You can also enter the hard disk drive parameters. The drive parameters are:

Parameter Description

Type The number for a drive with certain identification parameters.

Cylinders The number of cylinders in the disk drive.

Heads The number of heads.

Write The size of a sector gets progressively smaller as the track

Precompensation diameter diminishes. Yet each sector must still hold 512 bytes.

Write precompensation circuitry on the hard disk compensates
for the physical difference in sector size by boosting the write
current for sectors on inner tracks. This parameter is the track
number where write precompensation begins.

Sectors The number of sectors per track. MFM drives have 17 sectors

Capacity The formatted capacity of the drive is (Number of heads) x

per track. RLL drives have 26 sectors per track. ESDI drives
have 34 sectors per track. SCSI and IDE drive may have even
more sectors per track.

(Number of cylinders) x (Number of sectors per track) x (512
bytes per sector)

Boot Sector Virus Protection

This setting allows you to prevent any data from being written the boot sector of
the hard drive. While this may prevent viruses from infecting your system, you
may need to change information here when installing new programs. The options
for this setting are

Enabled

or

Disabled

.

Advanced CMOS Setup

Quick Boot

The Settings are
boot quickly when the computer is powered on. This option replaces the old
Above 1 MB Memory Test Advanced Setup option. The settings are:

Setting Description

Disabled

Disabled

or

Enabled

. Set to

Enabled

to permit AMIBIOS to

AMIBIOS tests all system memory. AMIBIOS waits up to 40
seconds for a READY signal from the IDE hard disk drive.
AMIBIOS waits for .5 seconds after sending a RESET signal
to the IDE drive to allow the IDE drive time to get ready again.

BIOS

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SUPER PIIIDR3/PIIIDRE User's Manual

AMIBIOS checks for a <Del> key press and runs AMIBIOS
Setup if the key has been pressed.

Enabled

Note: You cannot run AMIBIOS Setup at system boot, because
there is no delay for the "Hit <Del> to run Setup" message

Pri Master ARMD Emulated as
Pri Slave ARMD Emulated as
Sec Master ARMD Emulated as
Sec Slave ARMD Emulated as

The settings for these options are
Auto, the default emulation type depends on the ARMD drive: floppy for
LS120, Hard Disk for MO and Hard Disk for Iomega Zip.

AMIBIOS does not test system memory above 1 MB.
AMIBIOS does not wait up to 40 seconds for a READY signal
from the IDE hard disk drive. If a READY signal is not
received immediately from the IDE drive, AMIBIOS does not
configure that drive. AMIBIOS does not wait for .5 seconds
after sending a RESET signal to the IDE drive to allow the IDE
drive time to get ready again. In
bypassed.

Auto, Floppy or Hard disk

Enabled,

keyboard will be

. If set to

.

BIOS

1st Boot Device
2nd Boot Device
3rd Boot Device

The options for the 1st Boot Device are

Disabled, 1st IDE-HDD, 2nd IDE­HDD, 3rd IDE-HDD, 4th IDE-HDD, Floppy, ARMD-FDD, ARMD-HDD,
ATAPI CDROM, SCSI, Network

Device are

Disabled, 1st IDE-HDD, 2nd IDE-HDD, 3rd IDE-HDD, 4th

IDE-HDD, Floppy, ARMD-FDD, ARMD-HDD, ATAPI CDROM or SCSI

The options for the 3rd Boot Device are

or

I20

. The options for the 2nd Boot

Disabled, 1st IDE-HDD, 2nd

.

IDE-HDD, 3rd IDE-HDD, 4th IDE-HDD, Floppy, ARMD-FDD, ARMD-HDD
or ATAPI CDROM

1st IDE-HDD, 2nd IDE-HDD, 3rd IDE-HDD and 4th IDE-HDD are the four hard
disks that can be installed by the BIOS. 1st IDE-HDD is the first hard disk
installed by the BIOS, 2nd IDE-HDD is the second hard disk, and so on. For
example, if the system has a hard disk connected to Primary Slave and
another hard disk to Secondary Master, then 1st IDE-HDD will be referred to
as the hard disk connected to Primary Slave and 2nd IDE-HDD will be
referred to as the hard disk connected to the Secondary Master. 3rd IDE­HDD and 4th IDE-HDD are not present. Note that the order of the initializa­tion of the devices connected to the primary and secondary channels are
Primary Master first, Primary Slave second, Secondary Master third, and

.

4-6

Chapter 4: BIOS

Secondary Slave fourth.

The BIOS will attempt to read the boot record from 1st, 2nd, 3rd and 4th boot
device in the selected order until it is successful in reading the booting
record. The BIOS will not attempt to boot from any device which is not
selected as the boot device.

Try Other Boot Devices

This option controls the action of the BIOS if all the selected boot devices
failed to boot. The settings for this option are
and all the selected boot devices failed to boot, the BIOS will try to boot from
the other boot devices (in a predefined sequence) which are present but not
selected as boot devices in the setup (and hence have not yet been tried
for booting). If selected as No and all selected boot devices failed to
boot, the BIOS will not try to boot from the other boot devices which may
be present but not selected as boot devices in setup.

Initialize I2O Devices

The settings for this option are
processor(s) and I2O storage devices.

Initial Display Mode

This option determines the display screen with which the POST is going to
start the display. The settings for this option are
selected as
screen. If
screen.

BIOS,

the POST will start with the normal sign-on message

Silent

is selected, the POST will start with the Supermicro

Yes

or No. This initializes I2O

Yes

or No. If

BIOS

or

Yes

Silent

is selected

. If

BIOS

Display Mode at Add-On ROM Init

The settings for this option are

Floppy Access Control

The settings for this option are
will be effective only if the device is accessed through BIOS.

Hard Disk Access Control

The settings for this option are
will be effective only if the device is accessed through BIOS.

S.M.A.R.T. for Hard Disks

S.M.A.R.T. (Self-Monitoring, Analysis and Reporting Technology) is a
technology developed to manage the reliability of the hard disk by predicting
future device failures. The hard disk needs to be S.M.A.R.T. capable.

Force BIOS

Read-Write

Read-Write

or

Keep Current

or

Read-Only

or

Read-Only

.

. This option

. This option

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SUPER PIIIDR3/PIIIDRE User's Manual

BIOS

The settings for this option are

Disabled

or

Enabled

. *

Note: S.M.A.R.T.
cannot predict all future device failures. S.M.A.R.T. should be
used as a warning tool, not as a tool to predict the device reli­ability

.

Boot Up Num-Lock

Settings for this option are
BIOS turns off the Num Lock key when the system is powered on. This will
enable the end user to use the arrow keys on both the numeric keypad and
the keyboard.

PS/2 Mouse Support

Settings for this option are
to

Enabled

Primary Display

The settings for this option are

80x25 or Mono

Password Check

This option enables the password check option every time the system boots
or the end user runs WinBIOS Setup. If
prompt appears every time the computer is turned on. If
the password prompt appears if WinBIOS Setup is executed.

, AMIBIOS supports a PS/2-type mouse.

.

On

or

Off

. When this option is set to On, the

Enabled

or

Disabled

. When this option is set

Absent, VGA/EGA, CGA 40x25, CGA

Always

is chosen, a user password

Setup

is chosen,

Boot to OS/2

If DRAM size is over 64 MB, set this option to
with IBM OS/2. The settings are No or

Internal Cache

This option is for enabling or disabling the internal cache memory. The
settings for this option are

External Cache

This option is for enabling or disabling the external cache memory. The
settings for this option are

System BIOS Cacheable

When set to
segment can be read from or written to cache memory. The contents of
this memory segment are always copied from the BIOS ROM to system
RAM for faster execution. The settings are

Enabled

Disabled, WriteThru

Disabled, WriteThru

, the contents of the F0000h system memory

Yes

Yes

to permit AMIBIOS to run

.

or

WriteBack

or

WriteBack

Enabled

or

Disabled

.

.

.

Note:

The Optimal default setting is Enabled and the Fail-Safe default

4-8

Chapter 4: BIOS

setting is Disabled. Set this option to Enabled to permit the
contents of F0000h RAM memory segment to be written to and
read from cache memory.

Processor Serial Number

Intel included a serial number in their Pentium III processors as a unique system
identifier. For privacy reasons, you can disable this setting to prevent the release
of this identifier. The settings for this option are

C000 Shadow (16K)
C400 Shadow (16K)
C800 Shadow (16K)
CC00 Shadow (16K)
D000 Shadow (16K)
D400 Shadow (16K)
D800 Shadow (16K)
DC00 Shadow (16K)

These options specify how the 32 KB of video ROM at C0000h (or
D0000h) is treated. The settings are:
default is

Cached

ROM are not copied to RAM. When set to
video ROM area from C0000h-x7FFFh (or D0000h-D7FFFh) are copied
(shadowed) from ROM to RAM for faster execution. When set to

Cached

D0000h-D7FFFh) are copied from ROM to RAM, and can be written to or
read from cache memory.

Disabled

for default. When set to

, the contents of the video ROM area from C0000h-C7FFFh (or

for all settings except C000 and C400, which are

Disabled, Enabled or Cached

Disabled,

Enabled

the contents of the video

Enabled,

or

Disabled

the contents of the

.

. The

BIOS

Advanced Chipset Setup

USB Function

The settings for this option are

Enabled

USB KB/Mouse Legacy Support

The settings for this option are

abled

Graphics Aperture Size

The option specifies the amount of system memory that can be used by
the Accelerated Graphics Port (AGP). The settings are

to enable the USB (Universal Serial Bus) functions.

.

Enabled

or

Disabled

. Set this option to

Keyboard, Auto, Keyboard+Mouse

4 MB, 8 MB, 16

or

Dis-

MB, 32 MB, 64 MB, 128 MB or 256 MB.

4-9

SUPER PIIIDR3/PIIIDRE User's Manual

PC/PCIB Select Enable

The settings for this option are

Search for MDA Resources

The settings for this option are

AC97 Audio Controller

This setting is used to switch the onboard audio on and off. The settings
for this option are

Memory Hole

Some ISA cards may require specific areas of memory in order to function. This
can be done by choosing the

BIOS

use. The

DMA-0 Type
DMA-1 Type
DMA-2 Type
DMA-3 Type
DMA-5 Type
DMA-6 Type
DMA-7 Type

These options determine the bus that the specified DMA channel can be
used on. The settings are

Disabled

Enabled

or

Disabled

.

Yes or No.

Enabled

option will not reserve a portion of memory for ISA cards.

or

Disabled

15MB -16MB

.

option as an area reserved for ISA

LPC DMA or PC/PCI

.

CPU Speed at FSB 133/100

This option allows you to increase the FSB speed over the normal 100
and 133 MHz settings controlled by JP3. The settings for this option are

2x266/200, 4x533/400, 3x400/300, 5x666/500, 2.5x333/250, 4.5x600/450,

3.5x466/350, 5.5x733/550, 6x800/600, 8x1K/800, 7x933/700, 6.5x866/650,

1.5x200/150

system to determine which front side bus speed will be used.)

MRHS Memory Buffer Strength

This settings for this option are

and

7.5x999/750

(MHz). (The Auto setting on JP3 allows the

Auto

and

Strong

.

4-10

Chapter 4: BIOS

Power Management

NOTE: APM is automatically installed. If using ACPI, changes to the

following settings up to and including LAN Wake-Up will have no affect.
If you prefer to use ACPI, refer to the instructions on initializing ACPI on
page 1-22.

Suspend to RAM Support

This allows you to Enable or Disable the Suspend to RAM feature. The
settings for this option are
only.

Repost Video on S3 Resume

This determines whether or not to invoke the VGA BIOS post when
resuming from STR/S3. The settings for this option are

Disabled

Suspend Power Saving Type

The settings for this option are S1 and
state, in which no system (CPU or chipset) context is lost. C2 is a low
power state. In this state, the system cache is maintained.

Standby Time Out

This option specifies the length of a period of system inactivity while in
the standby state. When this length of time expires, the computer enters
a suspend power state. The settings are

10Min

. Available with ACPI only.

.

Enabled

or

Disabled

C2

. Available with ACPI

. S1 is a normal suspend

Disabled, 1Min, 5Min

Enabled

and

and

BIOS

Power Button Mode

This option specifies how the power button mounted externally on the
computer chassis is used. The settings are:
set to

On/Off

, pushing the power button turns the computer on or off.

The

Standby

power mode.

Power Lost Control

This option determines when Power Lost Control will be effective. The
settings are

setting places the computer in Standby mode or Full On

Always Off

and

Always On

.

Standby

and

On/Off

. When

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SUPER PIIIDR3/PIIIDRE User's Manual

Green PC Monitor Power State

This option specifies the power state that the green PC-compliant video
monitor enters when AMIBIOS places it in a power savings state after the
specified period of display inactivity has expired. The settings are

BIOS

Standby

Video Power Down Mode

This option specifies the power conserving state that the VGA video
subsystem enters after the specified period of display inactivity has
expired. The settings are

default setting for this option is Standby and the Fail-Safe default
setting is Disabled

Hard Disk Power Down Mode

This option specifies the power conserving state that the hard disk drive
enters after the specified period of hard drive inactivity has expired. The
settings are

setting for this option is Standby and the Fail-Safe default setting
is Disabled

Hard Disk Time Out (Minutes)

This option specifies the length of a period of hard disk drive inactivity.
When this length of time expires, the computer enters the power­conserving state specified in the Hard Disk Power Down Mode option.
The settings are
ments.

and

.

Off

Disabled

.

.

and

Disabled

Disabled

Standby

and

1 Min

and

Standby

.

Note: The Optimal default

through

.

14 Min

Note: The Optimal

in 1 minute incre-

Display Activity

This option specifies if AMIBIOS is to monitor display activity for power
conservation purposes. When this option is set to
display activity for the length of time specified in the Standby Timeout
(Minutes) option, the computer enters a power savings state. The settings
are

Monitor

or

Ignore

.

Manual Throttle Ratio

Throttling is used to lower power consumption and reduce heat. This
option allows the CPU to operate at a reduced average power at a
sacrifice in performance. The settings for this option are

62.5%, 50%, 37.5%, 25%

Intruder Sel

The settings for this option are

or

12.5%.

SCI

and

SMI.

Monitor

and there is no

87.5%, 75.0%,

4-12

Chapter 4: BIOS

Advanced SMI Enable Controls

Timer Overflow Enable

This allows the system to generate a System Management Interrupt after
a specific amount of time has passed. The settings are

Disabled

Thermal SMI Enable

This allows the system to generate a System Management Interrupt after
a specific temperature has been exeeded. The settings are

Disabled

PME SMI Enable

This allows the system to generate a System Management Interrupt after
a Power Management Event has occurred. The settings are

Disabled

SW SMI Timer Enable

The settings for this option are

TCO Logic SMI Enable

This allows the TCO logic to generate a System Management Interrupt
when a century rollover occurs. The settings are

abled

SLP SMI Enable

The settings for this option are

.

.

.

Enabled

.

Disabled

and

Disabled

and

Enabled.

Enabled

.

Enabled

and

Enabled

Enabled

and

Dis-

and

and

BIOS

Advanced Resume Event Controls

RTC Resume

You can have the system resume operation at a predetermined time by
use of the real-time clock. Enabling this setting allows you to determine
the following four settings. The settings are

RTC Alarm Date

This allows you to set a time at which the system will wake-up. The setting
is a number representing the alarm date.

RTC Alarm Hour

This allows you to set a time at which the system will wake-up. The
setting is a number representing the alarm hour.

Enabled

and

Disabled

.

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SUPER PIIIDR3/PIIIDRE User's Manual

RTC Alarm Minute

This allows you to set a time at which the system will wake-up. The
setting is a number representing the alarm minute.

RTC Alarm Second

This allows you to set a time at which the system will wake-up. The
setting is a number representing the alarm second.

USB Controller Resume

This allows you to wake up the system from a USB device. The settings
for this option are

PME Resume

This allows you to wake up the system from a PME device. The settings for

BIOS

this option are

Remote Ring On

This allows you to wake up the system from a serial port modem. The
settings for this option are

SMBUS Resume

This allows you to wake up the system from a system management bus
device. The settings for this option are

LAN Wake-Up

This allows you to make use of the Wake-on-LAN feature. The settings
for this option are

Enabled

Enabled

and

Disabled

Enabled

and

Disabled

Enabled

and

Disabled

.

and

Enabled

.

Disabled

and

.

.

Disabled

.

Keyboard Wake-Up Function

This allows you to wake-up the system by depressing any key on the
keyboard. The settings for this option are

Mouse Wake-Up Function

This allows you to wake-up the system by moving or clicking a button on
the mouse. The settings for this option are

Enabled

Enabled

and

Disabled

and

Disabled

.

.

PCI/Plug and Play Setup

Plug and Play-Aware OS

The settings for this option are No or
operating system in the computer is aware of and follows the Plug and Play
specification. AMIBIOS only detects and enables PnP ISA adapter cards
that are required for system boot. Currently, only Windows 95 is PnP-

Yes

. Set this option to

Yes

if the

4-14

Chapter 4: BIOS

Aware. Set this option to
2, Windows 3.x) does not use PnP. You must set this option correctly.
Otherwise, PnP-aware adapter cards installed in the computer will not be
configured properly.

PCI Latency Timer (PCI Clocks)

This option specifies the latency timings in PCI clocks for all PCI devices.
The settings are 32, 64, 96,

PCI VGA Palette Snoop

The settings for this option are

Enabled,

data from the CPU on each set of palette registers on every video device.
Bit 5 of the command register in the PCI device configuration space is the
VGA Palette Snoop bit (0 is disabled). For example: if there are two
VGA devices in the computer (one PCI and one ISA) and this option is
disabled, data read and written by the CPU is only directed to the PCI
VGA device's palette registers. If enabled, data read and written by the
CPU is directed to both the PCI VGA device's palette registers and the
ISA VGA palette registers. This will permit the palette registers of both
devices to be identical. This option must be set to
adapter card installed in the system requires VGA palette snooping.

PCI IDE Busmaster

The settings for this option are
specify the IDE Controller on the PCI bus has bus mastering capabilities.
Under Windows 95, you should set this option to
Bus Mastering driver.

multiple VGA devices operating on different buses can handle

No

if the operating system (such as DOS, OS/

128, 160, 192, 224

Disabled or Enabled.

Disabled

or

, or

248

Enabled

Disabled

.

When set to

Enabled

if any ISA

. Set to

and install the

Enabled

to

BIOS

Offboard PCI IDE Card

This option specifies if an offboard PCI IDE controller adapter card is
installed in the computer. The PCI expansion slot on the motherboard
where the offboard PCI IDE controller is installed must be specified. If an
offboard PCI IDE controller is used, the onboard IDE controller is automati­cally disabled. The settings are
where the offboard PCI IDE controller adapter card is installed),

Slot 2, Slot 3, Slot 4, Slot 5

This option forces IRQ14 and IRQ15 to a PCI slot on the PCI local bus.
This is necessary to support non-compliant ISA IDE controller adapter
cards. If an offboard PCI IDE controller adapter card is installed in the
computer, you must also set the Offboard PCI IDE Primary IRQ and
Offboard PCI IDE Secondary IRQ options.

and

Auto

(AMIBIOS automatically determines

Slot 6

.

Slot 1

,

4-15

SUPER PIIIDR3/PIIIDRE User's Manual

Offboard PCI IDE Primary IRQ
Offboard PCI IDE Secondary IRQ

These options specify the PCI interrupt used by the primary (or secondary)
IDE channel on the offboard PCI IDE controller. The settings are

Hardwired, INTA, INTB, INTC

PCI Slot1 & AGP Slot IRQ
PCI Slot2 IRQ
PCI Slot3 & PCI Slot 1, 2 IRQ
PCI Slot4 IRQ

Use these options to specify the IRQ priority for PCI devices installed in
the PCI expansion slots. The settings are

11

and

14,

in priority order.

DMA Channel 0
DMA Channel 1
DMA Channel 3
DMA Channel 5
DMA Channel 6
DMA Channel 7

These DMA channels control the data transfers between the I/O devices
and the system memory. The chipset allows the BIOS to choose which

BIOS

channels to do the job. The settings are

, and

INTD

.

Auto, (IRQ) 3, 4, 5, 7, 9, 10,

PnP or ISA/EISA.

Disabled

,

IRQ3
IRQ4
IRQ5
IRQ7
IRQ9
IRQ10
IRQ11
IRQ14
IRQ15

These options specify which bus the specified IRQ line is used on and
allow you to reserve IRQs for legacy ISA adapter cards. If more IRQs
must be removed from the pool, the end user can use these options to
reserve the IRQ by assigning an
configured by AMIBIOS. All IRQs used by onboard I/O are configured as
PCI/PnP.

IRQ14 and 15 will not be available if the onboard PCI IDE is enabled. If all
IRQs are set to
IDE, IRQ 9 will still be available for PCI and PnP devices. This is because at

ISA/EISA

and IRQ14 and 15 are allocated to the onboard PCI

ISA/EISA

setting to it. Onboard I/O is

4-16

Chapter 4: BIOS

least one IRQ must be available for PCI and PnP devices. The settings
are

PCI/PnP or ISA/EISA.

IRQs.)

Reserved Memory Size

This option specifies the size of the memory area reserved for legacy ISA
adapter cards. The settings are

Reserved Memory Address

This option specifies the beginning address (in hex) of the reserved
memory area. The specified ROM memory area is reserved for use by
legacy ISA adapter cards. The settings are

CC000, D0000, D4000, D8000

(See page 3-5 for information on shared

Disabled, 16K, 32K

or

64K

.

C0000, C4000, C8000

or

DC000

.

,

Peripheral Setup

Onboard SCSI

This setting enables or disables the onboard SCSI (non-applicable to the
PIIIDME). The settings are

CPU1 Current Temperature

The current temperature of CPU1 is displayed here.

Enabled

and

Disabled.

CPU2 Current Temperature

The current temperature of CPU2 is displayed here.

CPU Overheat Warning

The settings for this option are

Enabled

ture.

CPU Overheat Warning Temperature

Use this option to set the CPU overheat warning temperature. The
settings are

this option allows the user to set an overheat warning tempera-

25 °C

through

and Fail-Safe default settings are 55 °C

H/W Monitor IN0 (CPU1)
H/W Monitor IN1 (CPU2)
H/W Monitor IN2 (+3.3V)
H/W Monitor IN3 (+5V)
H/W Monitor IN4 (+12V)
CPU1 Fan
CPU2 Fan

Enabled

75 °C

or

Disabled.

in 1 °C intervals.

.

When set to

Note: The Optimal

4-17

BIOS

SUPER PIIIDR3/PIIIDRE User's Manual

Chassis Fan1
Chassis Fan2

The above features are for PC Health Monitoring. The motherboards with
W83781D have seven onboard voltage monitors for the CPU core, CPU I/
O, +3.3V, +5V, -5V, +12V, and -12V, and for the four-fan status monitor.

OnBoard IDE

This option enables the IDE (Hard Disk Drive Controller) drives(s) on the
motherboard. The settings are

OnBoard FDC

This option enables the FDC (Floppy Drive Controller) on the motherboard.
The settings are

OnBoard Serial Port1

This option specifies the base I/O port address of serial port 1. The
settings are

OnBoard Serial Port2

This option specifies the base I/O port address of serial port 2. The
settings are

Disabled

Disabled, 3F8h, 2F8h, 3E8h

Disabled, 3F8h, 2F8h, 3E8h

Disabled, Primary, Secondary

and

Enabled

.

and

and

2E8h

2E8h

and

.

.

Both

.

BIOS

Serial Port2 Mode

The settings for this option are

ASKIR, Consumer
Normal,

either

Onboard Parallel Port

This option specifies the base I/O port address of the parallel port on the
motherboard. The settings are
correct base I/O port address),

Parallel Port Mode

This option specifies the parallel port mode. The settings are

the IR Duplex Mode becomes available and can be set to

Half

or

Serial Port2 Duplex Mode

This option is enabled by the selection made in the previ­ous Serial Port 2 Mode option. This makes the IR Duplex
Mode available, which can be set to either

Normal, EPP

port mode is used. Use
Use

EPP

(Enhanced Parallel Port) to provide asymmetric bidirectional

Full

and

and

Raw IR

.

Auto

ECP

. When set to

Normal, IrDA SIR-A,. IrDA SIR-B,

. When set to anything but

Half

or

(AMIBIOS automatically determines the

Disabled, 378h, 278h

Normal,

Bi-Dir

to support bidirectional transfers.

and

38Ch

.

the normal parallel

Full

.

4-18

Chapter 4: BIOS

data transfer driven by the host device. Use
Capabilities Port) to achieve data transfer rates of up to 2.5 Mbps.
ECP uses the DMA protocol and provides symmetric bidirectional
communication.

Note: The Optimal default setting for this

option is ECP and the Fail-Safe setting is Normal

EPP Version

The settings are

Enabled

and

Disabled. Note: The Optimal and

ECP

(Extended

.

Fail-Safe default settings are N/A.

Parallel Port IRQ

This option specifies the IRQ to be used by the parallel port. The
settings are 5 and 7.

Parallel Port ECP DMA Channel

This option is only available if the setting of the parallel port mode
option is

Onboard MIDI Port
This option specifies the base address to be used for the MIDI port. The
settings are

MIDI IRQ

This option specifies the IRQ to be used for the parallel port. The
settings are

ECP

. The settings are 0, 1, 2, 3, 5, 6 and 7.

Disabled, 300h

5, 7, 9

and

and 10.

330h

.

BIOS

Onboard Game Port

This option is used to either

Enable

or

Disable

the Game Port.

Auto-Detect Hard Disks

This section allows BIOS to look for and configure any hard disk drives on
your system. After highlighting this option, hit <Enter> and wait momentarily
while BIOS performs the auto-detect. You will soon see the disk drives
appear properly configured.

Change User Password

Change Supervisor Password

4-19

SUPER PIIIDR3/PIIIDRE User's Manual

The system can be configured so that all users must enter a password
every time the system boots or when the AMIBIOS setup is executed.
You can set either a Supervisor password or a User password. If you
do not want to use a password, just press <Enter> when the password
prompt appears.

The password check option is enabled in the Advanced Setup by
choosing either
You can enter a password by typing it out on the keyboard or by
selecting each letter via the mouse or a pen stylus. Pen access must be
customized for each specific hardware platform.

When you select to change the Supervisor or User password, AMIBIOS
prompts you for the new password. You must set the Supervisor
password before you can set the User password. Enter a 1-6 character
password. (It will not appear on the screen when typed.) Retype the
new password as prompted and press <Enter>. Make sure you write it
down. If you forget it, you must clear CMOS RAM and reset the pass­word.

Always

or

Setup

. The password is stored in CMOS RAM.

Change Language Setting

BIOS

Because this version of BIOS only supports English at this time, this setting
cannot be chosen. Future releases may support other languages.

Auto Configuration with Optimal Settings

The Optimal default settings provide optimum performance settings for all
devices and system features.

Auto Configuration with Fail Safe Settings

The Fail-Safe default settings consist of the safest set of parameters.
Use them if the system is behaving erratically. They should always work
but do not provide optimal system performance characteristics.

Save Settings and Exit

Highlight this and hit <Enter> when you wish to save any changes made to
settings in BIOS and exit back to the system boot-up procedure.

4-20

Chapter 4: BIOS

Exit Without Saving

Highlight this and hit <Enter> when you wish to exit back to the system
boot-up procedure without saving any changes.

4-21

BIOS

SUPER PIIIDR3/PIIIDRE User's Manual

Notes

BIOS

4-22

Appendix A: BIOS Error Beep Codes

Appendix A

BIOS Error Beep Codes & Messages

During the POST (Power-On Self-Test) routines, which are performed
each time the system is powered on, errors may occur.

Non-fatal errors are those which, in most cases, allow the system to
continue the boot-up process. The error messages normally appear on
the screen.

Fatal errors are those which will not allow the system to continue the
boot-up procedure. If a fatal error occurs, you should consult with your
system manufacturer for possible repairs.

These fatal errors are usually communicated through a series of audible
beeps. The numbers on the fatal error list, on the following page,
correspond to the number of beeps for the corresponding error. All
errors listed, with the exception of #8, are fatal errors.

APPENDIX A

SUPER PIIIDR3/PIIIDRE User's Manual

Beeps Error message Description

1 Refresh Failure The memory refresh circuitry on the

2 Parity Error A parity error was detected in the base

3 Base 64 KB Memory Failure A memory failure occurred within the

4 Timer Not Operational A memory failure was detected in the

5 Processor Error The CPU on the system board

6 8042 - Gate A20 Failure The keyboard controller (8042) contains

7 Processor Exception The CPU on the motherboard generated

Interrupt Error an exception interrupt.

8 Display Memory Read/Write The system video adapter is either

Error missing or its memory is faulty.

9 ROM Checksum Error The ROM checksum value does not

APPENDIX A

10 CMOS Shutdown Register The shutdown register for CMOS

Read/Write Error memory has failed.

motherboard is faulty.

memory (the first 64 KB block) of the
system.

first 64 KB of memory.

first 64 KB of memory, or Timer 1 is
not functioning.

generated an error.

the Gate A20 switch which allows the
CPU to operate in virtual mode. This
error means that the BIOS cannot
switch the CPU into protected mode.

Please Note:

match the value encoded in the BIOS.

This is not a fatal error.

Refer to the table on page A-3 for solutions to the error beep codes.

A-2

Appendix A: BIOS Error Beep Codes

If it beeps... then ...

1, 2, 3 times reseat the DIMM memory. If the

system still beeps, replace the memory.

6 times reseat the keyboard controller chip. If it

still beeps, replace the keyboard
controller. If it still beeps, try a
different keyboard, or replace
the keyboard fuse, if the keyboard has one.

8 times there is a memory error on the

video adapter. Replace the video
adapter, or the RAM on the video
adapter.

9 times the BIOS ROM chip is bad.

The system probably needs a
new BIOS ROM chip.

4, 5, 7, the motherboard must be replaced.
or 10 times

If you hear... it's because...

5 short and 1 long beeps no memory is installed

8 short and 1 long beeps EDO memory is installed

6 short and 1 long beeps registered or buffered memory is installed

A-3

APPENDIX A

SUPER PIIIDR3/PIIIDRE User's Manual

Error Message Information

8042 Gate -- A20 Gate A20 on the keyboard controller (8042)
Error is not working. Replace the 8042.

Address Line Short! Error in the address decoding circuitry on

the motherboard.

C: Drive Error Hard disk drive C: does not respond. Run

the Hard Disk Utility to correct this problem.
Also, check the C: hard disk type in Standard
Setup to make sure that the hard disk type is
correct.

C: Drive Failure Hard disk drive C: does not respond.

Replace the hard disk drive.

Cache Memory Bad Cache memory is defective. Replace it. Do

Not Enable Cache!

CH-2 Timer Error Most ISA computers include two times.

There is an error in time 2.

CMOS Battery State Low CMOS RAM is powered by a battery. The

battery power is low. Replace the battery.

CMOS Checksum Failure After CMOS RAM values are saved, a

APPENDIX A

CMOS System Option The values stored in CMOS RAM are either
Not Set corrupt or nonexistent. Run WINBIOS

CMOS Display Type The video type in CMOS RAM does not
Mismatch match the type detected by the BIOS. Run

CMOS Memory Size The amount of memory on the motherboard is
Mismatch different than the amount in CMOS RAM.

checksum value is generated for error
checking. The previous value is different from
the current value. Run WINBIOS Setup or
AMIBIOS Setup.

Setup or AMIBIOS Setup.

WINBIOS Setup or AMIBIOS Setup.

Run WINBIOS Setup or AMIBIOS
Setup.

A-4

Appendix A: BIOS Error Beep Codes

Error Message Information

CMOS Time and Run Standard Setup to set the date and time
Date Not Set in CMOS RAM.

D: Drive Error Hard disk drive D: does not respond. Run

the Hard Disk Utility. Also check the D: hard
disk type in Standard Setup to make sure that
the hard disk drive type is correct.

D: Drive Failure Hard disk drive D: does not respond.

Replace the hard disk.

Diskette Boot Failure The boot disk in floppy drive A: is corrupt. It

cannot be used to boot the computer. Use
another boot disk and follow the screen
instructions.

Display Switch Some compters require a video switch on the
Not Proper motherboard be set to either color or

monochrome. Turn the computer off, set the
switch, then power on.

DMA Error Error in the DMA controller.

DMA #1 Error Error in the first DMA channel.

DMA #2 Error Error in the second DMA channel.

FDD Controller Failure The BIOS cannot communicate with the

floppy disk drive controller. Check all
appropriate connections after the computer is
powered down.

HDD Controller Failure The BIOS cannot communicate with the hard

disk drive controller. Check all appropriate
connections after the computer is powered
down.

INTR #1 Error Interrupt channel 1 failed POST.

INTR #2 Error Interrupt channel 2 failed POST.

A-5

APPENDIX A

SUPER PIIIDR3/PIIIDRE User's Manual

Error Message Information

Invalid Boot Diskette The BIOS can read the disk in floppy drive

Keyboard Is Locked... The keyboard lock on the computer is
Unlock It engaged. The computer must be unlocked to

Keyboard Error There is a timing problem with the keyboard.

KB/Interface Error There is an error in the keyboard connector.

No ROM BASIC Cannot find a bootable sector on either disk

Off Board Parity error in memory installed in an
Parity Error expansion slot. The format is:

APPENDIX A

A:, but cannot boot the computer. Use
another boot disk.

continue.

Set the

Keyboard

Not Installed

to
routines.

drive A: or hard disk drive C:. The BIOS
calls INT 18h which generates this message.
Use a bootable disk.

OFF BOARD PARITY ERROR ADDR
(HEX) = (XXXX) XXXX is the hex
address where the error occurred. Run
AMIDiag to find and correct memory
problems.

options in Standard Setup

to skip the keyboard post

On Board Parity error in motherboard memory. The
Parity Error format is:

ON BOARD PARITY ERROR ADDR
(HEX) = (XXXX) XXXX is the hex
address where the error occurred. Run
AMIDiag to find and correct memory
problems.

Parity Error???? Parity error in system memory at an unknown

address. Run AMIDiag to find and correct
memory problems.

A-6

Appendix B: AMIBIOS POST Diagnostic Error Messages

Appendix B

AMIBIOS POST Diagnostic Error Messages

This section describes the power-on self-tests (POST) port 80 codes for
the AMIBIOS.

Check
Point Description

00 Code copying to specific areas is done. Passing control

to INT 19h boot loader next.

03 NMI is Disabled. Next, checking for a soft reset or a

power-on condition.

05 The BIOS stack has been built. Next, disabling cache

memory.

06 Uncompressing the post code unit next.

07 Next, initializing the CPU init and the CPU data area.

08 The CMOS checksum calculation is done next.

0B Next, performing any required initialization before

keyboard BAT command is issued.

0C The keyboard controller I/B is free. Next, issuing the

BAT command to the keyboard controller.

0E The keyboard controller BAT command result has been

verified. Next, performing any necessary initialization
after the keyboard controller BAT command test.

0F The initialization after the keyboard controller BAT

command test is done. The keyboard command byte is
written next.

B-1

APPENDIX B

SUPER PIIIDR3/PIIIDRE User's Manual

Check
Point Description

10 The keyboard controller command byte is written.

Next, issuing the pin 23 and 24 blocking and unblocking
commands.

11 Next, checking if the <End or <Ins> keys were pressed

during power on. Initializing CMOS RAM if the
Initialize CMOS RAM in every boot AMIBIOS POST
option was set in AMIBCP or the <End> key was
pressed.

12 Next, disabling DMA controllers 1 and 2 and interrupt

controllers 1 and 2.

13 The video display has been disabled. Port B has been

initialized. Next, initializing the chipset.

14 The 8254 timer test will begin next.

19 The 8254 timer test is over. Starting the memory refresh

test next.

1A The memory refresh test line is toggling. Checking the

23 Reading the 8042 input port and disabling the

APPENDIX B

24 The configuration required before interrupt vector

25 Interrupt vector initialization is done. Clearing the

27 Any initialization before setting video mode will be

15 second on/off time next.

MEGAKEY Green PC feature next. Making the
BIOS code segment writable and performing any
necessary configuration before initializing the interrupt
vectors.

initialization has completed. Interrupt vector initialization
is done. Clearing the password if the POST DIAG
switch is on.

password if the POST DIAG Switch is on.

done next.

B-2

Appendix B: AMIBIOS POST Diagnostic Error Messages

Check
Point Description

28 Initialization before setting the video mode is complete.

Configuring the monochrome mode and color mode
settings next.

2A Bus initialization system, static, output devices will be

done next, if present.

2B Passing control to the video ROM to perform any

required configuration before the video ROM test.

2C All necessary processing before passing control to the

video ROM is done. Looking for the video ROM next
and passing control to it.

2D The video ROM has returned control to BIOS POST.

Performing any required processing after the video
ROM had control.

2E Completed post-video ROM test processing. If the

EGA/VGA controller is not found, performing the
display memory read/write test next.

2F The EGA/VGA controller was not found. The display

memory read/write test is about to begin.

30 The display memory read/write test passed. Look for

retrace checking next.

31 The display memory read/write test or retrace checking

failed. Performing the alternate display memory
read/write test next.

32 The alternate display memory read/write test passed.

Looking for alternate display retrace checking next.

34 Video display checking is over. Setting the display

mode next.

37 The display mode is set. Displaying the power on

message next.

B-3

APPENDIX B

SUPER PIIIDR3/PIIIDRE User's Manual

Check
Point Description

38 Initializing the bus input, IPL, and general devices next, if

present.

39 Displaying bus initialization error messages.

3A The new cursor position has been read and saved.

Displaying the Hit <DEL> message next.

40 Preparing the descriptor tables next.

42 The descriptor tables are prepared. Entering protected

mode for the memory test next.

43 Entered protected mode. Enabling interrupts for

diagnostics mode next.

44 Interrupts enabled if the diagnostics switch is on.

Initializing data to check memory wraparound at 0:0 next.

45 Data initialized. Checking for memory wraparound at

0:0 and finding the total system memory size next.

46 The memory wraparound test has completed. The

47 The memory pattern has been written to extended

48 Patterns written in base memory. Determining the

APPENDIX B

49 The amount of memory below 1 MB has been found

4B The amount of memory above 1 MB has been found

memory size calculation has been completed. Writing
patterns to test memory next.

memory. Writing patterns to the base 640 KB memory
next.

amount of memory below 1 MB next.

and verified. Determining the amount of memory above
1 MB memory next.

and verified. Checking for a soft reset and clearing the
memory below 1 MB for the soft reset next. If this is a
power on situation, going to checkpoint 4Eh next.

B-4

Appendix B: AMIBIOS POST Diagnostic Error Messages

Check
Point Description

4C The memory below 1 MB has been cleared via a soft

reset. Clearing the memory above 1 MB next.

4D The memory above 1 MB has been cleared via a soft

reset. Saving the memory size next. Going to checkpoint
52h next.

4E The memory test started, but not as the result of a soft

reset. Displaying the first 64 KB memory size next.

4F The memory size display has started. The display is

updated during the memory test. Performing the
sequential and random memory test next.

50 The memory below 1 MB has been tested and

initialized. Adjusting the displayed memory size for
relocation and shadowing next.

51 The memory size display was adjusted for relocation

and shadowing. Testing the memory above 1 MB next.

52 The memory above 1 MB has been tested and

initialized. Saving the memory size information next.

53 The memory size information and the CPU registers are

saved. Entering real mode next.

54 Shutdown was successful. The CPU is in real mode.

Disabling the Gate A20 line, parity, and the NMI next.

57 The A20 address line, parity, and the NMI are

disabled. Adjusting the memory size depending on
relocation and shadowing next.

58 The memory size was adjusted for relocation and

shadowing. Clearing the Hit <DEL> message next.

59 The Hit <DEL> message is cleared. The <WAIT>

message is displayed. Starting the DMA and interrupt
controller test next.

B-5

APPENDIX B

SUPER PIIIDR3/PIIIDRE User's Manual

Check
Point Description

60 The DMA page register test passed. Performing the

DMA Controller 1 base register test next.

62 The DMA controller 1 base register test passed.

Performing the DMA controller 2 base register test next.

65 The DMA controller 2 base register test passed.

Programming DMA controllers 1 and 2 next.

66 Completed programming DMA controllers 1 and 2.

Initializing the 8259 interrupt controller next.

7F Extended NMI source enabling is in progress.

80 The keyboard test has started. Clearing the output

buffer and checking for stuck keys. Issuing the
keyboard reset command next.

81 A keyboard reset error or stuck key was found. Issuing

the keyboard controller interface test command next.

82 The keyboard controller interface test completed.

83 The command byte was written and global data

84 Locked key checking is over. Checking for a memory

APPENDIX B

85 The memory size check is done. Displaying a soft error

86 The password was checked. Performing any required

Writing the command byte and initializing the circular
buffer next.

initialization has been completed. Checking for a
locked key next.

size mismatch with CMOS RAM data next.

and checking for a password or bypassing WINBIOS
Setup next.

programming before WINBIOS Setup next.

B-6

Appendix B: AMIBIOS POST Diagnostic Error Messages

Check
Point Description

87 The programming before WINBIOS Setup has

been completed. Uncompressing the WINBIOS Setup
code and executing the AMIBIOS Setup or WINBIOS
Setup utility next.

88 Returned from WINBIOS Setup and cleared the screen.

Performing any necessary programming after WINBIOS
Setup next.

89 The programming after WINBIOS Setup has been

completed. Displaying the power-on screen message
next.

8B The first screen message has been displayed. The

<WAIT...> message is displayed. Performing the PS/2
mouse check and extended BIOS data area allocation
check next.

8C Programming the WINBIOS Setup options next.

8D The WINBIOS Setup options are programmed.

Resetting the hard disk controller next.

8F The hard disk controller has been reset. Configuring the

floppy drive controller next.

91 The floppy drive controller has been configured.

Configuring the hard disk drive controller next.

95 Initializing the bus option ROMs from C800 next.

96 Initializing before passing control to the adaptor ROM at

C800.

97 Initialization before the C800 adaptor ROM gains

control has been completed. The adaptor ROM check
is next.

98 The adaptor ROM had control and has now returned

control to BIOS POST. Performing any required
processing after the option ROM returned control.

B-7

APPENDIX B

SUPER PIIIDR3/PIIIDRE User's Manual

Check
Point Description

99 Any initialization required after the option ROM test has

been completed. Configuring the timer data area and
printer base address next.

9A Set the timer and printer base addresses. Setting the

RS-232 base address next.

9B Returned after setting the RS-232 base address.

Performing any required initialization before the
Coprocessor test next.

9C Required initialization before the Coprocessor test is

over. Initializing the Coprocessor next.

9D Coprocessor initialized. Performing any required

initialization after the Coprocessor test next.

9E Initialization after the Coprocessor test is complete.

Checking the extended keyboard, keyboard ID, and
Num Lock key next. Issuing the keyboard ID command
next.

A2 Displaying any soft errors next.

A3 The soft error display has completed. Setting the

A4 The keyboard typematic rate is set. Programming the

A5 Memory wait state programming is over. Clearing the

APPENDIX B

A7 NMI and parity enabled. Performing any initialization

A8 Initialization before passing control to the adaptor ROM

keyboard typematic rate next.

memory wait states next.

screen and enabling parity and the NMI next.

required before passing control to the adaptor ROM at
E000 next.

at E000h completed. Passing control to the adaptor
ROM at E000h next.

B-8

Appendix B: AMIBIOS POST Diagnostic Error Messages

Check
Point Description

A9 Returned from adaptor ROM at E000h control.

Next, performing any initialization required after
the E000 option ROM had control.

AA Initialization after E000 option ROM control has

completed. Displaying the system configuration next.

AB Building the multiprocessor table, if necessary. POST

next.

B0 The system configuration is displayed.

AC Uncompressing the DMI data and initializing DMI.

B1 Copying any code to specific areas.

D0h The NMI is disabled. Power on delay is starting.

Next, the initialization cade checksum will be verified.

D1h Initializing the DMA controller. Performing the keyboard

controller BAT test. Starting memory refresh, and
entering 4 GB flat mode next.

D3h Starting memory sizing next.

D4h Returning to real mode. Executing any OEM patches

and setting the stack next.

D5h Passing control to the uncompressed code in shadow

RAM at E000:0000h. The initialization code is copied
to segment 0 and control will be transferred to segment

0.

D6h Control is in segment 0. Next, checking if

<Ctrl><Home>was pressed and verifying the system
BIOS checksum.

If either <Ctrl><Home> was pressed or the system BIOS
checksum is bad, next the system will go to checkpoint code
E0h. Otherwise, going to checkpoint code D7h.

B-9

APPENDIX B

SUPER PIIIDR3/PIIIDRE User's Manual

Notes

APPENDIX B

B-10