Sun Microsystems Netra t 1120, Netra t 1125 Service Manual

Netra t 1120/1125
Service Manual

Sun Microsystems, Inc.

901 San Antonio Road
Palo Alto, CA 94303-4900 USA
650 960-1300 Fax [phone]

Part No.: 805-6804-10
Revision A, August 1998

Copyright 1998 Sun MicrosystemsComputerCompany•901SanAntonioRoad•PaloAlto•California94303•U.S.A.415-960-1300 •
Fax [phone]. All rights reserved.

This productordocumentisprotectedbycopyrightanddistributedunderlicensesrestrictingitsuse,copying,distribution,anddecompilation.
No part of this productordocumentmaybereproducedinanyformbyanymeanswithoutpriorwrittenauthorizationofSunanditslicensors,
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®

Portions of this productmaybederivedfromtheUNIX

system, licensed fromNovell,Inc.,andfromtheBerkeley4.3BSDsystem,licensed
fromtheUniversityofCalifornia.UNIXisaregisteredtrademarkintheUnitedStatesandinothercountriesandisexclusivelylicensedbyX/
Open Company Ltd. Third-partysoftware,includingfonttechnologyinthisproduct,isprotectedbycopyrightandlicensedfromSun’s
suppliers. RESTRICTED RIGHTS: Use, duplication, or disclosurebytheU.S. Government is subject to restrictionsofFAR 52.227-14(g)(2)(6/87)
and FAR52.227-19(6/87),orDFAR 252.227-7015(b)(6/95) and DFAR227.7202-3(a).

Sun, Sun Microsystems,theSunlogo,Solaris,NetraandtheNetralogo

aretrademarksorregisteredtrademarksofSunMicrosystems,Inc.in
the United States and in other countries. All SPARCtrademarksare used under license and are trademarks or registered trademarks of SPARC
International,Inc.intheUnitedStatesandinothercountries.Products bearing SPARCtrademarksarebaseduponanarchitecture developed by
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The OPEN LOOK

and Sun™ Graphical User Interfaces weredevelopedbySunMicrosystems,Inc.foritsusersandlicensees.Sun
acknowledges the pioneering effortsofXeroxCorporationinresearchinganddevelopingtheconceptofvisualorgraphicaluserinterfacesfor
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Copyright 1998 Sun MicrosystemsComputerCompany•901SanAntonioRoad•PaloAlto•California94303U.S.A.•415-960-1300•
Fax [phone]. Tous droits réservés.

Ce produitoudocumentestprotégéparun copyrightetdistribuéavecdeslicencesquienrestreignentl’utilisation,lacopieetladécompilation.
Aucune partie de ce produitoudesadocumentationassociéenepeutêtrereproduitesousaucuneforme,parquelquemoyenquecesoit,sans
l’autorisation préalable et écrite de Sun et de ses bailleurs de licence, s’il y en a.

®

Des parties de ce produitpourrontêtrederivéesdusystèmeUNIX

licencié par Novell, Inc. etdusystèmeBerkeley4.3BSDlicenciépar
l’Université de Californie. UNIX est une marqueenregistréeauxEtats-Unisetdansd’autrespays,etlicenciéeexclusivementparX/Open
Company Ltd. Le logiciel détenu par des tiers, et qui comprendlatechnologierelativeauxpolicesdecaractères,estprotégéparuncopyrightet
licencié par des fournisseurs de Sun.

Sun, Sun Microsystems,lelogoSun,Solaris,NetraetlelogoNetra sont des marquesdéposéesouenregistréesdeSunMicrosystems,Inc.aux
Etats-Unis et dans d’autrespays.Toutes les marques SPARC,utiliséessouslicence,sontdesmarquesdéposéesouenregistréesdeSPARC
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®

Les utilisateurs d’interfaces graphiques OPEN LOOK

et Sun™ ont été développés de Sun Microsystems,Inc. pour ses utilisateurs et licenciés.
Sun reconnaîtles efforts de pionniers de Xerox Corporation pour la recherche et le développement du concept des interfaces d’utilisation
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CETTE PUBLICATION EST FOURNIE "EN L’ETAT" SANSGARANTIE D’AUCUNE SORTE, NI EXPRESSE NI IMPLICITE, Y COMPRIS, ET
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PRODUITS A REPONDRE A UNE UTILISATIONPARTICULIERE OU LE FAITQU’ILS NE SOIENT PASCONTREFAISANTS DE PRODUITS
DE TIERS.

Please
Recycle

Contents

Figures vii

Tables ix

Code Examples xi

Preface xiii

1. Description 1-1

1.1 System Features 1-1

1.2 System LEDs 1-4

1.2.1 Netra t 1120 1-4

1.2.2 Netra t 1125 1-5

1.3 System Unit Components 1-5

2. SunVTS Overview 2-1

2.1 SunVTS Description 2-1

2.2 SunVTS Operation 2-1

3. Power-On Self-Test 3-1

3.1 POST Overview 3-1

3.2 Pre-POST Preparation 3-2

3.2.1 To Set Up a tip Connection 3-2

Contents iii

3.2.2 To Verify the Baud Rate 3-3

3.3 To Initialize POST 3-3

3.4 Maximum and Minimum Levels of POST 3-4

3.4.1 diag-level Variable Set to max 3-4

3.4.2 diag-level Variable Set to min 3-14

3.5 POST Progress and Error Reporting 3-21

3.6 Motherboard Test 3-22

4. Troubleshooting Procedures 4-1

4.1 Power-On Failure 4-2

4.2 Disk Drive or Removable Media Drive Failure 4-3

4.3 Power Supply Test 4-5

4.4 SIMM Failure 4-8

5. Tool Requirements 5-1

6. Power On and Off 6-1

6.1 To Power On the System 6-2

6.2 To Power Off the System 6-3

7. Internal Access 7-1

7.1 To Attach the Wrist Strap 7-1

7.2 To Remove the Top Access Cover 7-4

7.3 To Replace the Top Access Cover 7-6

8. Power Subassemblies 8-1

8.1 Power Supply 8-1

8.1.1 To Remove the Power Supply 8-1

8.1.2 To Replace the Power Supply 8-5

8.2 ON/STBY Switch Assembly 8-6

8.2.1 To Remove the ON/STBY Switch Assembly 8-6

8.2.2 To Replace the ON/STBY Switch Assembly 8-8

iv Netra t 1120/1125 Service Manual • August 1998

8.3 LED Card 8-9

8.3.1 To Remove the LED Card 8-9

8.3.2 To Replace the LED Card 8-11

9. Storage Devices 9-1

9.1 Hard Disk Drive 9-2

9.1.1 To Remove a Hard Disk Drive 9-2

9.1.2 To Install a Hard Disk Drive 9-4

9.2 Removable Media Drive 9-5

9.2.1 To Remove a Removable Media Drive 9-5

9.2.2 To Install a Removable Media Drive 9-6

9.3 SCSI Backplane 9-8

9.3.1 To Remove the SCSI Backplane 9-8

9.3.2 To Replace the SCSI Backplane 9-9

10. Motherboard and Component Replacement 10-1

10.1 CPU Modules 10-2

10.1.1 To Remove a CPU Module 10-2

10.1.2 To Replace a CPU Module 10-4

10.1.3 To Remove the Dual Processor Bracket 10-4

10.1.4 To Replace the Dual Processor Bracket 10-6

10.2 System Fan Assembly 10-7

10.2.1 To Remove the System Fan Assembly 10-7

10.2.2 To Replace the System Fan Assembly 10-9

10.3 NVRAM/TOD 10-10

10.3.1 To Remove the NVRAM/TOD 10-10

10.3.2 To Replace a NVRAM/TOD 10-11

10.4 PCI Card 10-13

10.4.1 To Remove a PCI Card 10-13

10.4.2 To Replace a PCI Card 10-15

10.5 SIMMs 10-16

Contents v

10.5.1 To Remove a SIMM 10-17

10.5.2 To Replace a SIMM 10-19

10.6 Alarms Card 10-21

10.6.1 To Remove the Alarms Card 10-21

10.6.2 To Replace the Alarms Card 10-23

10.7 Motherboard 10-24

10.7.1 To Remove the Motherboard 10-24

10.7.2 To Replace the Motherboard 10-27

A. Illustrated Parts List A-1

B. Product Specifications B-1

B.1 Physical Specifications B-1
B.2 Electrical Specifications B-2

B.2.1 XL B-2
B.2.2 an XL B-2

B.3 Environmental Requirements B-3

C. Signal Descriptions C-1

C.1 Connector Layout C-1
C.2 Serial Ports A and B C-2
C.3 Twisted-Pair Ethernet Connector C-5
C.4 Wide SCSI Connector C-6
C.5 Alarm Connector C-10
C.6 Media-Independent Interface Connector C-11
C.7 Parallel Interface C-14

Index Index-1

vi Netra t 1120/1125 Service Manual • August 1998

Figures

FIGURE 1-1 Netra t 1120 System Unit Front View 1-2
FIGURE 1-2 Netra t 1125 System Unit Front View 1-2
FIGURE 1-3 Netra t 1120 System Unit Rear View 1-3
FIGURE 1-4 Netra t 1125 System Unit Rear View 1-3
FIGURE 1-5 Netra t 1120 System LEDs 1-4
FIGURE 1-6 Netra t 1125 System LEDs 1-5
FIGURE 4-1 Power Supply Connector J2901 4-6
FIGURE 4-2 Power Supply Connector J2902 4-6
FIGURE 4-3 Power Supply Connector J2903 4-7
FIGURE 6-1 System Power-On (Front Panel) 6-2
FIGURE 6-2 System Power-Off (Front Panel) 6-4
FIGURE 7-1 Attaching the Wrist Strap to the Front of the Chassis 7-2
FIGURE 7-2 Attaching the Wrist Strap to the Rear of the Chassis 7-3
FIGURE 7-3 Removing the Top Access Cover 7-5
FIGURE 7-4 Replacing the Top Access Cover 7-7
FIGURE 8-1 Netra t 1120 DC Power Connectors and Earth Points 8-2
FIGURE 8-2 Netra t 1125 AC Power Inlet and Earth Points 8-2
FIGURE 8-3 Removing the Power Supply (#1) 8-3
FIGURE 8-4 Removing the Power Supply (#2) 8-4

Figures vii

FIGURE 8-5 Removing and Replacing the ON/STBY Switch Assembly 8-7
FIGURE 8-6 Removing and Replacing the LED Card 8-10
FIGURE 9-1 Removing and Replacing a Hard Disk Drive 9-3
FIGURE 9-2 Removing and Replacing the CD-ROM or Tape Drive 9-6
FIGURE 10-1 CPU Module Levers 10-2
FIGURE 10-2 Removing and Replacing CPU Modules 10-3
FIGURE 10-3 Removing the Dual Processor Bracket 10-5
FIGURE 10-4 Removing and Replacing the System Fan Assembly 10-8
FIGURE 10-5 Removing and Replacing the NVRAM/TOD 10-11
FIGURE 10-6 Removing and Replacing a PCI Card 10-14
FIGURE 10-7 SIMM Ejection Lever 10-18
FIGURE 10-8 Removing and Replacing a SIMM 10-19
FIGURE 10-9 Removing and Replacing the Alarms Card 10-22
FIGURE 10-10 Removing and Replacing the Motherboard (#1) 10-25
FIGURE 10-11 Removing and Replacing the Motherboard (#2) 10-26
FIGURE 10-12 Location of the Motherboard Serial Port Jumpers 10-29
FIGURE 10-13 Identifying Jumper Pins 10-29
FIGURE A-1 System Exploded View A-2
FIGURE C-1 System Unit Rear View C-1
FIGURE C-2 Serial Ports A and B Connector Pin Configuration C-2
FIGURE C-3 TPE Socket C-5
FIGURE C-4 Wide SCSI Connector Pin Configuration C-6
FIGURE C-5 Alarms Connector Configuration C-10
FIGURE C-6 MII Connector Pin Configuration C-11
FIGURE C-7 DB-25 Parallel Connector C-14

viii Netra t 1120/1125 Service Manual • August 1998

Tables

TABLE 2-1 SunVTS Documentation 2-1
TABLE 3-1 diag-Level Switch Settings 3-1
TABLE 4-1 Internal Drive Identification 4-3
TABLE 4-2 Power Supply Connector J2901 Pin Description 4-6
TABLE 4-3 Power Supply Connector J2902 Pin Description 4-6
TABLE 4-4 Power Supply Connector J2903 Pin Description 4-7
TABLE 4-5 SIMM Physical Memory Address 4-8
TABLE 10-1 SIMM Bank and Bank Quads 10-16
TABLE 10-2 Serial Port Jumper Settings 10-27
TABLE A-1 Replaceable Components A-3

TABLE B-1 Physical Specifications B-1
TABLE B-2 Netra t 1120 Electrical Specifications B-2
TABLE B-3 Netra t 1125 Electrical Specifications B-2
TABLE B-4 Environmental Requirements B-3
TABLE C-1 Serial Port Pinouts C-2
TABLE C-2 TPE Connector Pin Assignments C-5
TABLE C-3 Wide SCSI Connector Pin Assignments C-6
TABLE C-4 Alarm Connector Pin Assignments C-10
TABLE C-5 MII Connector Pin Assignments C-11
TABLE C-6 Parallel Connector Pinouts C-14

Tables ix

x Netra t 1120/1125 Service Manual • August 1998

Code Examples

CODE EXAMPLE 3-1 diag-level Variable Set to max 3-5
CODE EXAMPLE 3-2 diag-level Variable Set to min 3-14
CODE EXAMPLE 3-3 Typical Error Code Failure Message 3-21

Code Examples xi

xii Netra t 1120/1125 Service Manual • August 1998

Preface

The Netra t 1120/1125 Service Manual provides detailed procedures for the removal
and replacement of field-replaceable parts in the XL (order code N04) and an XL
(order code N03).

Note – This Guide does not apply to the version of XL supplied as order code N02.

Note – All illustrations in this manual are of the Netra t 1125, except where the two

types of system differ, in which case examples of both are shown.

Who Should Use This Guide

This book is written for technicians, advanced computer system end-users with
experience in replacing hardware and troubleshooting, system administrators and
authorized service providers (ASPs). Only suitably-qualified service personnel may
carry out the tasks described in this manual where they involve removal of access
panels or the top cover.

How This Guide Is Organized

The guide is arranged as follows:
Chapter 1, “Description”, provides information on system features and components.

Preface xiii

Chapter 2, “SunVTS Overview”, contains an overview of the Netra t 1120/1125
SunVTS diagnostic tool.

Chapter 3, “Power-On Self-Test”, contains procedures to initiate power-on self-test
diagnostics.

Chapter 4, “Troubleshooting Procedures”, describes how to troubleshoot possible
problems and includes suggested corrective actions.

Chapter 5, “Tool Requirements”, provides a description of the tools required.
Chapter 6, “Power On and Off”, contains procedures to power on and power off the

Netra t 1120/1125.
Chapter 7, “Internal Access”, contains procedures to remove the Netra t 1120/1125’s

top access cover, attach the wrist strap, and replace the top access cover.
Chapter 8, “Power Subassemblies”, contains procedures to remove and replace the

power-related subassemblies of the Netra t 1120/1125.
Chapter 9, “Storage Devices”, contains procedures to remove and replace the storage

devices.
Chapter 10, “Motherboard and Component Replacement”, contains removal and

replacement procedures for the motherboard and components of the motherboard.
Appendix A, “Illustrated Parts List”, lists the authorized replaceable parts for the

Netra t 1120/1125. A brief description of each listed component is also provided.
Appendix B, “Product Specifications”, provides physical, electrical and

environmental specifications for the Netra t 1120/1125.
Appendix C, “Signal Descriptions”, gives signal descriptions for the motherboard

connectors.

Related Documentation

■ Netra t 1120/1125 Compliance and Safety Manual (805-6806-10)

Note – It is important that you read the Netra t 1120/1125 Compliance and Safety
Manual before doing anything else.

■ Netra t 1120/1125 Installation and Basic Maintenance Guide (805-6803-10)

■ Netra t 1120/1125 System Reference Guide (805-6805-10)

■ Netra t 1120/1125 User’s Guide (805-6802-10)

xiv Netra t 1120/1125 Service Manual • August 1998

Conventions used in this Guide

The following table shows the type changes and symbols used in this guide.

TABLEP-1 Typographic Conventions

Typeface or
Symbol Meaning Example

AaBbCc123 The names of commands, files, and

directories; on-screen computer
output

AaBbCc123

AaBbCc123 Command-line placeholder:

AaBbCc123 Book titles, new words or terms, or

% UNIX C shell prompt system%
$ UNIX Bourne and Korn shell

# super-user prompt, all shells system#

What you type, as opposed to on­screen computer output

replace with a real name or value

words to be emphasized

prompt

Edit your .login file.
Use ls -a to list all files.

system% You have mail.

system% su
Password:

To delete a file, type rm filename.

Read Chapter 6 in User’s Guide.
These are called class options.
You must be root to do this.

system$

xv

Symbols

The following symbols mean:

Note – A note provides information which should be considered by the reader.

Caution – Cautions accompanied by this Attention icon carry information about

!

procedures or events which if not considered may cause damage to the data or
hardware of your system.

Caution – Cautions accompanied by this Hazard icon carry information about
procedures which must be followed to reduce the risk of electric shock and danger
to personal health. Follow all instructions carefully.

1125
1120

!

Paragraphs accompanied by this 1125 icon apply only to Netra t 1125 systems.

Paragraphs accompanied by this 1120 icon apply only to Netra t 1120 systems.

Do Not Substitute Parts or Modify Equipment

Because of the danger of introducing additional hazards and/or the possibility of
compromising emissions compliance, do not install substitute parts or perform any
unauthorized modification of the equipment. Contact your local support
organization for service and repair to ensure that safety features are maintained.

Placement of a Sun Product

Caution – To ensure reliable operation of the Sun product and to protect it from
overheating, openings in the equipment must not be blocked or covered.

xvi Netra t 1120/1125 Service Manual • August 1998

Power Connection

Caution – The system ON/STBY switch of this product functions as a standby type
device only. The AC power connector or the external AC circuit breaker, if fitted,
serves as the primary disconnect device for the system. It must be ensured that these
remain accessible after installation or servicing.

Electrostatic Discharge

Caution – The boards and hard disk drives contain electronic components that are
extremely sensitive to static electricity. Ordinary amounts of static electricity from
clothes or work environment can destroy components.
Do not touch the components themselves or any metal parts. Wear a wrist strap
when handling the drive assemblies, boards or cards.

Lithium Battery

Caution – On Sun system boards, a lithium battery is molded into the real-time

!

clock, SDS No. M48T59Y, MK48TXXB-XX, M48T18-XXXPCZ or
M48T59W-XXXPCZ.

Caution – Danger of explosion if battery is incorrectly replaced. Replace only with
the same or equivalent type recommended by the manufacturer. Dispose of used
batteries according to the manufacturer’s instructions.

xvii

xviii Netra t 1120/1125 Service Manual • August 1998

CHAPTER

1

Description

The Netra t 1120/1125 system uses the family of UltraSPARC™ II processors.
Housed within a rack-mounting enclosure, the Netra t 1120/1125 provides the
following:

■ One or two UltraSPARC II processors

■ Power and cooling for high performance processors

■ Extensive I/O expansion and a wide range of options

■ Modular internal design

■ High performance disk, system, memory and I/O subsystem

■ High-performance peripheral component interconnect (PCI) I/O expansion with

comparable options to existing SBus options.

The Netra t 1120 is a –48V/–60Vdc-powered system. The Netra t 1125 is an AC­powered system. This is the only difference between the two systems.

FIGURE 1-2 and FIGURE 1-4 show front and rear views of the Netra t 1120/1125

system.

1.1 System Features

System components are housed in a rack-mounting enclosure. Overall enclosure
dimensions (width x depth x height) are 431.8mm x 496.1mm x 177mm (17in x

19.53in x 7in (4U)). System electronics are contained on a single printed circuit board
(motherboard). The motherboard contains the CPU module(s), memory, system
control application-specific integrated circuits (ASICs) and I/O ASICs.

The system has the following features:

■ Rack-mounting enclosure with power supply.

■ Support for modular UltraSPARC II processor(s) with 1, 2 or 4 Mbyte Ecache, and

system operating frequencies from 300MHz to 400MHz.

■ UPA coherent memory interconnect.

1-1

■ Use of SIMMs, with an interleaved memory system. Each pair of SIMM slots (four

rows of two pairs each) accepts 32, 64 or 128Mbyte SIMM modules. Populating
with two pairs of identical capacity SIMMs enables the memory controller to
interleave and overlap, providing optimal system performance. There are a total
of 16 SIMM slots.

■ Four PCI slots:

■ Three 33MHz, 64- or 32-bit, 5Vdc slots

■ One 66MHz or 33MHz, 64- or 32-bit, 3.3Vdc slot.

Universal PCI cards can be used in any of the four PCI slots.

■ 10/100megabit per second (Mbps) Ethernet.

■ Dual channel 40Mbps UltraSCSI (Fast-20).

■ Two DB-25 serial ports (synchronous and asynchronous protocols).

■ One parallel port.

FIGURE 1-1 Netra t 1120 System Unit Front View

FIGURE 1-2 Netra t 1125 System Unit Front View

1-2 Netra t 1120/1125 Service Manual • August 1998

1125

DC inputs A and B

B
A

Parallel

Serial A

TPE MII

SCSI

and B

FIGURE 1-3 Netra t 1120 System Unit Rear View

AC power inlet

B
A

Parallel

Serial A

TPE MII

SCSI

and B

Alarms

Alarms

FIGURE 1-4 Netra t 1125 System Unit Rear View

Chapter 1 Description 1-3

1.2 System LEDs

1.2.1 Netra t 1120

The front panel has seven LEDs:

POWER–Green
This indicator is illuminated at all times when the system is On.

SUPPLY A–Green
Illuminated whenever DC input A is present and the system is
powered on.

ALARM 1

ALARM 2

SUPPLY A SUPPLY B

POWER SYSTEM

Power
switch

ON

STBY

FIGURE 1-5 Netra t 1120 System LEDs

SUPPLY B–Green
Illuminated whenever DC input B is present and the system is
powered on.

SYSTEM–Green
This indicator is off (or reset) during power up procedures and is
illuminated whenever UNIX is running and the alarms driver is
installed. It is reset by a hardware Watchdog timeout or,
alternatively, whenever the user-defined Alarm 3 is asserted.

ALARM 1–Amber
Illuminated whenever the user-defined Alarm 1 is asserted.

ALARM 2–Amber
Illuminated whenever the user-defined Alarm 2 is asserted.

SPARE–Amber
For future enhancement.

1-4 Netra t 1120/1125 Service Manual • August 1998

1.2.2 Netra t 1125

The front panel has five LEDs:

POWER–Green
This indicator is illuminated at all times when the system is On.

SYSTEM–Green

ALARM 1

ALARM 2

This indicator is off (or reset) during power up procedures and is
illuminated whenever UNIX is running and the alarms driver is
installed. It is reset by a hardware Watchdog timeout or, alternatively,
whenever the user-defined Alarm 3 is asserted.

ALARM 1–Amber
Illuminated whenever the user-defined Alarm 1 is asserted.

POWER SYSTEM

ALARM 2–Amber
Illuminated whenever the user-defined Alarm 2 is asserted.

ON

Power
switch

STBY

FIGURE 1-6 Netra t 1125 System LEDs

SPARE–Amber
For future enhancement.

1.3 System Unit Components

TABLE A-1 on page A-3 lists the system unit components by part number. A brief

description of each listed component is also provided.

Note – Part numbers listed in TABLE A-1 on page A-3 are correct as of the Service

Manual publication date but are subject to change without notice. Consult your

authorized Sun sales representative or service provider to confirm a part number
prior to ordering a replacement part.

Chapter 1 Description 1-5

1-6 Netra t 1120/1125 Service Manual • August 1998

CHAPTER

2

SunVTS Overview

This chapter contains an overview of the Netra t 1120/1125 SunVTS™diagnostic
tool.

2.1 SunVTS Description

The SunVTS software executes multiple diagnostic hardware tests from a single user
interface. SunVTS verifies the configuration, functionality and reliability of most
hardware controllers and devices.

2.2 SunVTS Operation

TABLE 2-1 lists the documentation for the SunVTS software. These documents are

available on the Solaris on Sun Hardware AnswerBook, which is on the SMCC Updates
CD-ROM for the Solaris release.

TABLE2-1 SunVTS Documentation

Title Description

SunVTS User’s Guide Describes the SunVTS environment; starting and

controlling various user interfaces; feature descriptions

SunVTS Test Reference Manual Describes each SunVTS test; provides various test options

and command line arguments

SunVTS Quick Reference Card Provides overview of vtsui interface features

2-1

2-2 Netra t 1120/1125 Service Manual • August 1998

CHAPTER

3

Power-On Self-Test

This chapter contains procedures to initiate the Netra t 1120/1125 system unit
power-on self-test (POST) diagnostics. Procedures are also included to support pre­POST preparation, POST data interpretation and the bypassing of POST diagnostics.

3.1 POST Overview

POST can be used to determine if part of the system unit has failed and should be
replaced. POST detects approximately 95 percent of system unit faults, and is located
in the system board OpenBoot
the diag-switch? and diag-level flags, determines if POST is executed.

TABLE 3-1 lists the diag-switch? and diag-level flag settings for disabling POST

(off), enabling POST maximum (max), or enabling POST minimum ( min).

™

PROM (OBP). The setting of two NVRAM variables,

TABLE3-1 diag-Level Switch Settings

Diag-Level Setting POST Initialization Serial Port A IO

Off No N/A N/A N/A

Max Yes (power-on) Enabled Enabled True

Min Yes (power-on) Disabled Enabled True

Serial Port A
Error Output

diag-Switch?

Setting

3-1

3.2 Pre-POST Preparation

Pre-POST preparation includes:

■ Setting up a tip connection to another workstation or terminal to view POST

progress and error messages. See Section 3.2.1 “To Set Up a tip Connection
below.

■ Verifying baud rates between a Netra t 1120/1125 and a terminal. See Section 3.2.2

“To Verify the Baud Rate” on page 3-3.

3.2.1 To Set Up a tip Connection

A tip connection enables a remote shell window to be used as a terminal to display
test data from a system being tested. Serial ports A or B are used to establish the tip
connection between the system unit being tested and another Sun workstation
monitor or TTY-type terminal. The tip connection is used in a SunOS window and
provides features to help with the OBP.

1. Connect serial port A of the system being tested to another Sun workstation serial
port B using a serial null modem cable (connect cable pins 2-3, 3-2, 7-20, and 20-7).

2. At the other Sun workstation, check the /etc/remote file:

hardwire:\

:dv=/dev/term/b:br#9600:el=^C^S^Q^U^D:ie=%$:oe=^D:

Note – The example shows connection to serial port B, ttyb.

3. To use serial port A:
a. Copy and paste the following:

hardwire:\

:dv=/dev/term/b:br#9600:el=^C^S^Q^U^D:ie=%$:oe=^D:

3-2 Netra t 1120/1125 Service Manual • August 1998

b. Then modify as follows:

hardwire:\

:dv=/dev/term/a:br#9600:el=^C^S^Q^U^D:ie=%$:oe=^D:

4. In a Shell Tool window on the Sun workstation, type tip hardwire.
Verify the response:

hostname% tip hardwire
connected

Note – The shell window is now a tip window directed to the serial port of the

system unit being tested. When power is applied to the system unit being tested,
POST messages will be displayed in this window.

5. When POST is completed, disconnect the tip window by typing ~.
(tilde+period).

3.2.2 To Verify the Baud Rate

To verify the baud rate between the system unit being tested and a terminal or
another Sun workstation monitor:

1. Open a Shell Tool.

2. Type eeprom.

3. Verify the following serial port default settings as follows:

ttyb-mode = 9600,8,n,1
ttya-mode = 9600,8,n,1

Note – Ensure that the settings are consistent with TTY-type terminal or

workstation monitor settings.

Chapter 3 Power-On Self-Test 3-3

3.3 To Initialize POST

POST is initialized by setting diag-switch? to true and diag-level to max or
min, followed by power cycling the system unit.

1. At the system prompt, type:

setenv diag-switch? true

2. When the POST is complete, set diag-switch? to false (default setting).

3.4 Maximum and Minimum Levels of
POST

Two levels of POST are available: maximum (max) level and minimum (min) level.
The system initiates the selected level of POST based on the setting of
diag-level, an NVRAM variable.

The default setting for diag-level is max. An example of a max level POST output
on serial port A is provided in Section 3.4.1 “diag-level Variable Set to max”on
page 3-5. An example of a min level POST output on serial port A is provided in
Section 3.4.2 “diag-level Variable Set to min” on page 3-14.

To set diag-level to min, type:

ok setenv diag-level min

To return to the default setting

ok setenv diag-level max

3-4 Netra t 1120/1125 Service Manual • August 1998

:

3.4.1 diag-level Variable Set to max

When the diag-level variable is set to max, POST enables an extended set of
diagnostic-level tests. This mode requires approximately four and a half minutes to
complete.
diag-level set to max.

Note – xxxx placeholders used in table entries represent numeric values which can

change without notice.

CODE EXAMPLE 3-1 diag-level Variable Set to max

Hardware Power ON

Master CPU online
Master Version: 0000.0000.1700.1120
Slave Version: 0000.0000.1700.1120
CPU E$ (M) 0000.0000.0020.0000 (S) 0000.0000.0020.0000Button Power
ON

Master CPU online
Master Version: 0000.0000.1700.1120
Slave Version: 0000.0000.1700.1120
CPU E$ (M) 0000.0000.0020.0000 (S) 0000.0000.0020.0000

CODE EXAMPLE 3-1 identifies a typical serial port A POST output with

Probing keyboard Done
%o0 = 0000.0000.0000.4001

Executing Power On SelfTest

0>
0>@(#) Sun Ultra 60(UltraSPARC-II 2-way) UPA/PCI POST 1.0.8 01/21/
1998 02:36 PM
0>INFO: Processor 0 is master.
0>
0> <00> Init System BSS
0> <00> NVRAM Battery Detect Test
0> <00> NVRAM Scratch Addr Test
0> <00> DMMU TLB Tag Access Test
0> <00> DMMU TLB RAM Access Test
0> <00> IMMU TLB Tag Access Test
0> <00> IMMU TLB RAM Access Test
0> <00> Probe Ecache
0>INFO: CPU 296 MHz: 2048KB Ecache
0> <00> Ecache RAM Addr Test
0> <00> Ecache Tag Addr Test

Chapter 3 Power-On Self-Test 3-5

CODE EXAMPLE 3-1 diag-level Variable Set to max

0> <00> Ecache Tag Test
0> <00> Invalidate Ecache Tags
0>INFO: Processor 2 - UltraSPARC-II.
0> <00> Init SC Regs
0> <00> SC Address Reg Test
0> <00> SC Reg Index Test
0> <00> SC Regs Test
0> <00> SC Dtag RAM Addr Test
0> <00> SC Cache Size Init
0> <00> SC Dtag RAM Data Test
0> <00> SC Dtag Init
0> <00> Probe Memory
0>INFO: 0MB Bank 0
0>INFO: 0MB Bank 1
0>INFO: 0MB Bank 2
0>INFO: 128MB Bank 3
0> <00> Malloc Post Memory
0> <00> Init Post Memory
0> <00> Post Memory Addr Test
0> <00> Map PROM/STACK/NVRAM in DMMU
0> <00> Memory Stack Test
2> <00> DMMU TLB Tag Access Test
2> <00> DMMU TLB RAM Access Test
2> <00> IMMU TLB Tag Access Test
2> <00> IMMU TLB RAM Access Test
2> <00> Probe Ecache
2>INFO: CPU 296 MHz: 2048KB Ecache
2> <00> Ecache RAM Addr Test
2> <00> Ecache Tag Addr Test
2> <00> Ecache Tag Test
2> <00> Invalidate Ecache Tags
2> <00> Map PROM/STACK/NVRAM in DMMU
2> <00> Update Slave Stack/Frame Ptrs
0> <00> DMMU Hit/Miss Test
0> <00> IMMU Hit/Miss Test
0> <00> DMMU Little Endian Test
0> <00> IU ASI Access Test
0> <00> FPU ASI Access Test
2> <00> DMMU Hit/Miss Test
2> <00> IMMU Hit/Miss Test
2> <00> DMMU Little Endian Test
2> <00> IU ASI Access Test
2> <00> FPU ASI Access Test
2> <00> Dcache RAM Test
2> <00> Dcache Tag Test
2> <00> Icache RAM Test
2> <00> Icache Tag Test

(Continued)

3-6 Netra t 1120/1125 Service Manual • August 1998

CODE EXAMPLE 3-1 diag-level Variable Set to max

(Continued)

2> <00> Icache Next Test
2> <00> Icache Predecode Test
0> <1f> Init Psycho
0> <1f> PIO Read Error, Master Abort Test
0> <1f> PIO Read Error, Target Abort Test
0> <1f> PIO Write Error, Master Abort Test
0> <1f> PIO Write Error, Target Abort Test
0> <1f> Timer Increment Test
0> <1f> Consistent DMA UE ECC Rd Err Lpbk Test
0> <1f> Pass-Thru DMA UE ECC Rd Err Lpbk Test
0> <00> Copy Post to Memory
0> <00> Ecache Thrash Test
0> <00> Init Memory
0> <00> Memory Addr w/ Ecache Test
0>INFO: 0MB Bank 0
0>INFO: 0MB Bank 1
0>INFO: 0MB Bank 2
0>INFO: 128MB Bank 3
0> <00> Block Memory Addr Test
0>INFO: 0MB Bank 0
0>INFO: 0MB Bank 1
0>INFO: 0MB Bank 2
0>INFO: 128MB Bank 3
0> <00> ECC Memory Addr Test
0>INFO: 0MB Bank 0
0>INFO: 0MB Bank 1
0>INFO: 0MB Bank 2
0>INFO: 128MB Bank 3
0> <00> Memory Status Test
0>INFO: 0MB Bank 0
0>INFO: 0MB Bank 1
0>INFO: 0MB Bank 2
0>INFO: 128MB Bank 3
0> <00> V9 Instruction Test
0> <00> CPU Tick and Tick Compare Reg Test
0> <00> CPU Soft Trap Test
0> <00> CPU Softint Reg and Int Test
2> <00> V9 Instruction Test
2> <00> CPU Tick and Tick Compare Reg Test
0> <1f> Init Psycho
0> <1f> Psycho Cntl and UPA Reg Test
0> <1f> Psycho DMA Scoreboard Reg Test
0> <1f> Psycho Perf Cntl Reg Test
0> <1f> PIO Decoder and BCT Test
0> <1f> PCI Byte Enable Test
0> <1f> Counter/Timer Limit Regs Test
0> <1f> Timer Reload Test

Chapter 3 Power-On Self-Test 3-7

CODE EXAMPLE 3-1 diag-level Variable Set to max

(Continued)

0> <1f> Timer Periodic Test
0> <1f> Mondo Int Map (short) Reg Test
0> <1f> Mondo Int Set/Clr Reg Test
0> <1f> Psycho IOMMU Regs Test
0> <1f> Psycho IOMMU RAM Address Test
0> <1f> Psycho IOMMU CAM Address Test
0> <1f> IOMMU TLB Compare Test
0> <1f> IOMMU TLB Flush Test
0> <1f> Stream Buff A Control Reg Test
0> <1f> Psycho ScacheA Page Tag Addr Test
0> <1f> Psycho ScacheA Line Tag Addr Test
0> <1f> Psycho ScacheA RAM Addr Test
0> <1f> Psycho ScacheA Error Status NTA Test
0> <1f> Psycho ScacheB Page Tag Addr Test
0> <1f> Psycho ScacheB Line Tag Addr Test
0> <1f> Psycho ScacheB RAM Addr Test
0> <1f> Psycho ScacheB Error Status NTA Test
0> <1f> PBMA PCI Config Space Regs Test
0> <1f> PBMA Control/Status Reg Test
0> <1f> PBMA Diag Reg Test
0> <1f> PBMB PCI Config Space Regs Test
0> <1f> PBMB Control/Status Reg Test
0> <1f> PBMB Diag Reg Test
0> <00> FPU Regs Test
0> <00> FPU Move Regs Test
0> <00> FPU State Reg Test
0> <00> FPU Functional Test
0> <00> FPU Trap Test
0> <00> DMMU Primary Context Reg Test
0> <00> DMMU Secondary Context Reg Test
0> <00> DMMU TSB Reg Test
0> <00> DMMU Tag Access Reg Test
0> <00> DMMU VA Watchpoint Reg Test
0> <00> DMMU PA Watchpoint Reg Test
0> <00> IMMU TSB Reg Test
0> <00> IMMU Tag Access Reg Test
0> <00> DMMU TLB Tag Access Test
0> <00> DMMU TLB RAM Access Test
0> <00> Dcache RAM Test
0> <00> Dcache Tag Test
0> <00> Icache RAM Test
0> <00> Icache Tag Test
0> <00> Icache Next Test
0> <00> Icache Predecode Test
2> <00> FPU Regs Test
2> <00> FPU Move Regs Test
2> <00> FPU State Reg Test

3-8 Netra t 1120/1125 Service Manual • August 1998

CODE EXAMPLE 3-1 diag-level Variable Set to max

(Continued)

2> <00> FPU Functional Test
2> <00> FPU Trap Test
2> <00> DMMU Primary Context Reg Test
2> <00> DMMU Secondary Context Reg Test
2> <00> DMMU TSB Reg Test
2> <00> DMMU Tag Access Reg Test
2> <00> DMMU VA Watchpoint Reg Test
2> <00> DMMU PA Watchpoint Reg Test
2> <00> IMMU TSB Reg Test
2> <00> IMMU Tag Access Reg Test
2> <00> DMMU TLB Tag Access Test
2> <00> DMMU TLB RAM Access Test
0> <00> CPU Addr Align Trap Test
0> <00> DMMU Access Priv Page Test
0> <00> DMMU Write Protected Page Test
0> <1f> Init Psycho
0> <1f> Pri CE ECC Error Test
0> <1f> Pri UE ECC Error Test
0> <1f> Pri 2 bit w/ bit hole UE ECC Err Test
0> <1f> Pri 3 bit UE ECC Err Test
0> <1f> Streaming DMA UE ECC Rd Err Ebus Test
0> <1f> Streaming DMA CE ECC Rd Err Ebus Test
0> <1f> Streaming DMA CE ECC Rd Err Lpbk Test
0> <1f> Consistent DMA UE ECC Rd Error Ebus Test
0> <1f> Consistent DMA UE ECC R/M/W Err Ebus Test
0> <1f> Consistent DMA UE ECC R/M/W Err Lpbk Test
0> <1f> Consistent DMA CE ECC Rd Err Ebus Test
0> <1f> Consistent DMA CE ECC Rd Err Lpbk Test
0> <1f> Consistent DMA CE ECC R/M/W Err Ebus Test
0> <1f> Consistent DMA CE ECC R/M/W Err Lpbk Test
0> <1f> Consistent DMA Wr Data Parity Err Lpbk Test
0> <1f> Pass-Thru DMA UE ECC Rd Err Ebus Test
0> <1f> Pass-Thru DMA UE ECC R/M/W Err Ebus Test
0> <1f> Pass-Thru DMA UE ECC R/M/W Err Lpbk Test
0> <1f> Pass-Thru DMA CE ECC Rd Err Ebus Test
0> <1f> Pass-Thru DMA CE ECC Rd Err Lpbk Test
0> <1f> Pass-Thru DMA CE ECC R/M/W Err Ebus Test
0> <1f> Pass-Thru DMA CE ECC R/M/W Err Lpbk Test
0> <1f> Pass-Thru DMA Write Data Parity Err, Lpbk Test
0> <1f> Init Psycho
0> <1f> Mondo Generate Interrupt Test
0> <1f> Timer Interrupt Test
0> <1f> Timer Interrupt w/ periodic Test
0> <1f> Psycho Stream Buff A Flush Sync Test
0> <1f> Psycho Stream Buff B Flush Sync Test
0> <1f> Psycho Stream Buff A Flush Invalidate Test
0> <1f> Psycho Stream Buff B Flush Invalidate Test

Chapter 3 Power-On Self-Test 3-9

CODE EXAMPLE 3-1 diag-level Variable Set to max

(Continued)

0> <1f> Psycho Merge Buffer w/ Scache A Test
0> <1f> Psycho Merge Buffer w/ Scache B Test
0> <1f> Consist DMA Rd, IOMMU miss Ebus Test
0> <1f> Consist DMA Rd, IOMMU miss Lpbk Test
0> <1f> Consist DMA Rd, IOMMU hit Ebus Test
0> <1f> Consist DMA Rd, IOMMU hit Lpbk Test
0> <1f> Consist DMA Wr, IOMMU miss Ebus Test
0> <1f> Consist DMA Wr, IOMMU miss Lpbk Test
0> <1f> Consist DMA Wr, IOMMU hit Ebus Test
0> <1f> Consist DMA Wr, IOMMU hit Lpbk Test
0> <1f> Stream DMA Rd, IOMMU miss, Scache Miss Ebus Test
0> <1f> Stream DMA Rd, IOMMU miss, Scache Miss Lpbk Test
0> <1f> Stream DMA Rd, IOMMU hit, Scache Miss Ebus Test
0> <1f> Stream DMA Rd, IOMMU hit, Scache Miss Lpbk Test
0> <1f> Stream DMA Rd, IOMMU Miss, Scache(prev rd) Hit Ebus Test
0> <1f> Stream DMA Rd, IOMMU Miss, Scache Hit (prev rd) Lpbk Test
0> <1f> Stream DMA Rd, IOMMU Hit, Scache Hit Ebus Test
0> <1f> Stream DMA Rd, IOMMU Hit, Scache Hit (prev rd) Lpbk Test
0> <1f> Stream DMA Rd, IOMMU Miss, Scache Hit(prev wr) Ebus Test
0> <1f> Stream DMA Rd, IOMMU Miss, Scache Hit (prev wr) Lpbk Test
0> <1f> Stream DMA Rd, IOMMU Hit, Scache Hit(prev wr) Ebus Test
0> <1f> Stream DMA Rd, IOMMU Hit, Scache Hit (prev wr) Lpbk Test
0> <1f> Stream DMA Wr, IOMMU miss, Scache Miss Ebus Test
0> <1f> Stream DMA Wr, IOMMU miss, Scache Miss Lpbk Test
0> <1f> Stream DMA Wr, IOMMU hit, Scache Miss Ebus Test
0> <1f> Stream DMA Wr, IOMMU hit, Scache Miss Lpbk Test
0> <1f> Stream DMA Wr, IOMMU Miss, Scache(prev rd) Hit Ebus Test
0> <1f> Stream DMA Wr, IOMMU Miss, Scache(prev rd) Hit Lpbk Test
0> <1f> Stream DMA Wr, IOMMU Hit, Scache(prev rd) Hit Ebus Test
0> <1f> Stream DMA Wr, IOMMU Hit, Scache(prev rd) Hit Lpbk Test
0> <1f> Stream DMA Wr, IOMMU Miss, Scache(prev wr) Hit Ebus Test
0> <1f> Stream DMA Wr, IOMMU Miss, Scache(prev wr) Hit Lpbk Test
0> <1f> Stream DMA Wr, IOMMU Hit, Scache(prev wr) Hit Ebus Test
0> <1f> Stream DMA Wr, IOMMU Hit, Scache(prev wr) Hit Lpbk Test
0> <1f> Pass-Thru DMA Rd, Ebus device Test
0> <1f> Pass-Thru DMA Rd, Loopback Mode Test
0> <1f> Pass-Thru DMA Wr, Ebus device Test
0> <1f> Pass-Thru DMA Wr, Loopback Mode Test
0> <1f> Consist DMA Rd, IOMMU LRU Lock Ebus Test
0> <1f> Consist DMA Rd, IOMMU LRU Lock Lpbk Test
0> <1f> Stream DMA Rd, IOMMU LRU Lock, Scache LRU Lock Ebus Test
0> <1f> Stream DMA Rd, IOMMU LRU Lock, Scache LRU Lock Lpbk Test
0> <1f> Stream DMA Rd, IOMMU miss, Scache LRU Lock Ebus Test
0> <1f> Stream DMA Rd, IOMMU Miss, Scache LRU Lock Lpbk Test
0> <1f> Stream DMA Rd, IOMMU Hit, Scache LRU Lock Ebus Test
0> <1f> Stream DMA Rd, IOMMU Hit, Scache LRU Lock Lpbk Test
0> <1f> Stream DMA Rd, IOMMU LRU Lock, Scache Miss Ebus Test

3-10 Netra t 1120/1125 Service Manual • August 1998

CODE EXAMPLE 3-1 diag-level Variable Set to max

(Continued)

0> <1f> Stream DMA Rd, IOMMU LRU Lock, Scache Miss Lpbk Test
0> <1f> Consist DMA Wr, IOMMU LRU Locked Ebus Test
0> <1f> Consist DMA Wr, IOMMU LRU Lock Lpbk Test
0> <1f> Stream DMA Wr, IOMMU LRU Lock, Scache LRU Lock Ebus Test
0> <1f> Stream DMA Wr, IOMMU LRU Lock, Scache LRU Lock Lpbk Test
0> <1f> Stream DMA Wr, IOMMU Miss, Scache LRU Lock Ebus Test
0> <1f> Stream DMA Wr, IOMMU Miss, Scache LRU Lock Lpbk Test
0> <1f> Stream DMA Wr, IOMMU Hit, Scache LRU Lock Ebus Test
0> <1f> Stream DMA Wr, IOMMU Hit, Scache LRU Lock Lpbk Test
0> <1f> Stream DMA Wr, IOMMU LRU Lock, Scache Miss Ebus Test
0> <1f> Stream DMA Wr, IOMMU LRU Lock, Scache Miss Lpbk Test
0> <1f> Stream DMA Wr, IOMMU LRU Lock, Scache(prev rd) Hit Ebus
Test
0> <1f> Stream DMA Wr, IOMMU LRU Lock, Scache(prev rd) Hit Lpbk
Test
0> <00> Init Memory
0>INFO: 0MB Bank 0
0>INFO: 0MB Bank 1
0>INFO: 0MB Bank 2
0>INFO: 128MB Bank 3
0> <00> Memory w/ Ecache Test
0>INFO: 0MB Bank 0
0>INFO: 0MB Bank 1
0>INFO: 0MB Bank 2
0>INFO: 128MB Bank 3
0> <00> Block Memory Test
0>INFO: 0MB Bank 0
0>INFO: 0MB Bank 1
0>INFO: 0MB Bank 2
0>INFO: 128MB Bank 3
0> <00> ECC Blk Memory Test
0>INFO: 0MB Bank 0
0>INFO: 0MB Bank 1
0>INFO: 0MB Bank 2
0>INFO: 128MB Bank 3
0> <00> UltraSPARC-2 Prefetch Instructions Test
0> <00> Test 0: prefetch_mr
0> <00> Test 1: prefetch to non-cacheable page
0> <00> Test 2: prefetch to page with dmmu misss
0> <00> Test 3: prefetch miss does not check alignment
0> <00> Test 4: prefetcha with asi 0x4c is noped
0> <00> Test 5: prefetcha with asi 0x54 is noped
0> <00> Test 6: prefetcha with asi 0x6e is noped
0> <00> Test 7: prefetcha with asi 0x76 is noped
0> <00> Test 8: prefetch with fcn 5
0> <00> Test 9: prefetch with fcn 2
0> <00> Test 10: prefetch with fcn 12

Chapter 3 Power-On Self-Test 3-11

CODE EXAMPLE 3-1 diag-level Variable Set to max

(Continued)

0> <00> Test 11: prefetch with fcn 16 is noped
0> <00> Test 12: prefetch with fcn 29 is noped
0> <00> Test 13: prefetcha with asi 0x15 is noped
0> <00> Test 14: prefetch with fcn 3
0> <00> Test 15: prefetcha14 with fcn 2
0> <00> Test 16: prefetcha80_mr
0> <00> Test 17: prefetcha81_1r
0> <00> Test 18: prefetcha10_mw
0> <00> Test 19: prefetcha80_17 is noped
0> <00> Test 20: prefetcha10_6: illegal instruction trap
0> <00> Test 21: prefetcha11_1w
0> <00> Test 22: prefetcha81_31
0> <00> Test 23: prefetcha11_15: illegal instruction trap
2> <00> UltraSPARC-2 Prefetch Instructions Test
2> <00> Test 0: prefetch_mr
2> <00> Test 1: prefetch to non-cacheable page
2> <00> Test 2: prefetch to page with dmmu misss
2> <00> Test 3: prefetch miss does not check alignment
2> <00> Test 4: prefetcha with asi 0x4c is noped
2> <00> Test 5: prefetcha with asi 0x54 is noped
2> <00> Test 6: prefetcha with asi 0x6e is noped
2> <00> Test 7: prefetcha with asi 0x76 is noped
2> <00> Test 8: prefetch with fcn 5
2> <00> Test 9: prefetch with fcn 2
2> <00> Test 10: prefetch with fcn 12
2> <00> Test 11: prefetch with fcn 16 is noped
2> <00> Test 12: prefetch with fcn 29 is noped
2> <00> Test 13: prefetcha with asi 0x15 is noped
2> <00> Test 14: prefetch with fcn 3
2> <00> Test 15: prefetcha14 with fcn 2
2> <00> Test 16: prefetcha80_mr
2> <00> Test 17: prefetcha81_1r
2> <00> Test 18: prefetcha10_mw
2> <00> Test 19: prefetcha80_17 is noped
2> <00> Test 20: prefetcha10_6: illegal instruction trap
2> <00> Test 21: prefetcha11_1w
2> <00> Test 22: prefetcha81_31
2> <00> Test 23: prefetcha11_15: illegal instruction trap
0>STATUS =PASSED

Power On Selftest Completed
~Software Power ON.0000.0000.0000 ffff.ffff.f00b.3110
ff9f.ffff.0bd1.1111

Master CPU online
Master Version: 0000.0000.1700.1120

3-12 Netra t 1120/1125 Service Manual • August 1998

CODE EXAMPLE 3-1 diag-level Variable Set to max

(Continued)

Slave Version: 0000.0000.1700.1120
CPU E$ (M) 0000.0000.0020.0000 (S) 0000.0000.0020.0000

@(#) Sun Ultra 60 UPA/PCI 3.11 Version 25 created 1998/01/16 12:22
Clearing DTAGS Done
Probing Memory Done
MEM BASE = 0000.0000.a000.0000
MEM SIZE = 0000.0000.0800.0000
MMUs ON
Copy Done
PC = 0000.01ff.f000.27e0
PC = 0000.0000.0000.2824
Decompressing into Memory Done
Size = 0000.0000.0006.e820
ttya initialized
SC Control: EWP:0 IAP:0 FATAL:0 WAKEUP:0 BXIR:0 BPOR:0 SXIR:0
SPOR:1 POR:0
Probing Memory Bank #0 0 0 0 0 : 0 Megabytes
Probing Memory Bank #1 0 0 0 0 : 0 Megabytes
Probing Memory Bank #2 0 0 0 0 : 0 Megabytes
Probing Memory Bank #3 32 32 32 32 : 128 Megabytes
Probing Floppy: No drives detected
Probing EBUS SUNW,tsalarm
Probing UPA Slot at 1e,0 Nothing there
Probing UPA Slot at 1d,0 Nothing there
Probing /pci@1f,4000 at Device 1 pci108e,1000 network
Probing /pci@1f,4000 at Device 3 scsi disk tape scsi disk tape
Probing /pci@1f,4000 at Device 2 Nothing there
Probing /pci@1f,4000 at Device 4 Nothing there
Probing /pci@1f,4000 at Device 5 Nothing there
Probing /pci@1f,2000 at Device 1 Nothing there
Probing /pci@1f,2000 at Device 2 Nothing there
screen not found.
Can’t open input device.
Keyboard not present. Using ttya for input and output.
SC Control: EWP:0 IAP:0 FATAL:0 WAKEUP:0 BXIR:0 BPOR:0 SXIR:0
SPOR:1 POR:0
Probing Memory Bank #0 0 0 0 0 : 0 Megabytes
Probing Memory Bank #1 0 0 0 0 : 0 Megabytes
Probing Memory Bank #2 0 0 0 0 : 0 Megabytes
Probing Memory Bank #3 32 32 32 32 : 128 Megabytes
Probing Floppy: No drives detected
Probing EBUS SUNW,tsalarm
Probing UPA Slot at 1e,0 Nothing there
Probing UPA Slot at 1d,0 Nothing there
Probing /pci@1f,4000 at Device 1 pci108e,1000 network
Probing /pci@1f,4000 at Device 3 scsi disk tape scsi disk tape

Chapter 3 Power-On Self-Test 3-13

CODE EXAMPLE 3-1 diag-level Variable Set to max

Probing /pci@1f,4000 at Device 2 Nothing there
Probing /pci@1f,4000 at Device 4 Nothing there
Probing /pci@1f,4000 at Device 5 Nothing there
Probing /pci@1f,2000 at Device 1 Nothing there
Probing /pci@1f,2000 at Device 2 Nothing there

Sun Ultra 60 UPA/PCI (2 X UltraSPARC-II 296MHz), No Keyboard
OpenBoot 3.11, 128 MB memory installed, Serial #9637699.
Ethernet address 8:0:20:93:f:43, Host ID: 80930f43.

(Continued)

3.4.2 diag-level Variable Set to min

When diag-level is set to min, POST enables an abbreviated set of diagnostic­level tests. This mode requires approximately three minutes to complete.

CODE EXAMPLE 3-2 identifies a serial port A POST output with diag-level set to

min.

CODE EXAMPLE 3-2 diag-level Variable Set to min

Hardware Power ON

Master CPU online
Master Version: 0000.0000.1700.1120
Slave Version: 0000.0000.1700.1120
CPU E$ (M) 0000.0000.0020.0000 (S) 0000.0000.0020.0000Button Power
ON

Master CPU online
Master Version: 0000.0000.1700.1120
Slave Version: 0000.0000.1700.1120
CPU E$ (M) 0000.0000.0020.0000 (S) 0000.0000.0020.0000

Probing keyboard Done
%o0 = 0000.0000.0000.2001

Executing Power On SelfTest

0>
0>@(#) Sun Ultra 60(UltraSPARC-II 2-way) UPA/PCI POST 1.0.8 01/21/
1998 02:36 PM
0>INFO: Processor 0 is master.
0>
0> <00> Init System BSS
0> <00> NVRAM Battery Detect Test
0> <00> NVRAM Scratch Addr Test

3-14 Netra t 1120/1125 Service Manual • August 1998

CODE EXAMPLE 3-2 diag-level Variable Set to min

0> <00> DMMU TLB Tag Access Test
0> <00> DMMU TLB RAM Access Test
0> <00> IMMU TLB Tag Access Test
0> <00> IMMU TLB RAM Access Test
0> <00> Probe Ecache
0>INFO: CPU 296 MHz: 2048KB Ecache
0> <00> Ecache RAM Addr Test
0> <00> Ecache Tag Addr Test
0> <00> Ecache Tag Test
0> <00> Invalidate Ecache Tags
0>INFO: Processor 2 - UltraSPARC-II.
0> <00> Init SC Regs
0> <00> SC Address Reg Test
0> <00> SC Reg Index Test
0> <00> SC Regs Test
0> <00> SC Dtag RAM Addr Test
0> <00> SC Cache Size Init
0> <00> SC Dtag RAM Data Test
0> <00> SC Dtag Init
0> <00> Probe Memory
0>INFO: 0MB Bank 0
0>INFO: 0MB Bank 1
0>INFO: 0MB Bank 2
0>INFO: 128MB Bank 3
0> <00> Malloc Post Memory
0> <00> Init Post Memory
0> <00> Post Memory Addr Test
0> <00> Map PROM/STACK/NVRAM in DMMU
0> <00> Memory Stack Test
2> <00> DMMU TLB Tag Access Test
2> <00> DMMU TLB RAM Access Test
2> <00> IMMU TLB Tag Access Test
2> <00> IMMU TLB RAM Access Test
2> <00> Probe Ecache
2>INFO: CPU 296 MHz: 2048KB Ecache
2> <00> Ecache RAM Addr Test
2> <00> Ecache Tag Addr Test
2> <00> Ecache Tag Test
2> <00> Invalidate Ecache Tags
2> <00> Map PROM/STACK/NVRAM in DMMU
2> <00> Update Slave Stack/Frame Ptrs
0> <00> DMMU Hit/Miss Test
0> <00> IMMU Hit/Miss Test
0> <00> DMMU Little Endian Test
0> <00> IU ASI Access Test
0> <00> FPU ASI Access Test
2> <00> DMMU Hit/Miss Test

(Continued)

Chapter 3 Power-On Self-Test 3-15

CODE EXAMPLE 3-2 diag-level Variable Set to min

(Continued)

2> <00> IMMU Hit/Miss Test
2> <00> DMMU Little Endian Test
2> <00> IU ASI Access Test
2> <00> FPU ASI Access Test
2> <00> Dcache RAM Test
2> <00> Dcache Tag Test
2> <00> Icache RAM Test
2> <00> Icache Tag Test
2> <00> Icache Next Test
2> <00> Icache Predecode Test
0> <1f> Init Psycho
0> <1f> PIO Read Error, Master Abort Test
0> <1f> PIO Read Error, Target Abort Test
0> <1f> PIO Write Error, Master Abort Test
0> <1f> PIO Write Error, Target Abort Test
0> <1f> Timer Increment Test
0> <1f> Consistent DMA UE ECC Rd Err Lpbk Test
0> <1f> Pass-Thru DMA UE ECC Rd Err Lpbk Test
0> <00> Copy Post to Memory
0> <00> Ecache Thrash Test
0> <00> Init Memory
0> <00> Memory Addr w/ Ecache Test
0>INFO: 0MB Bank 0
0>INFO: 0MB Bank 1
0>INFO: 0MB Bank 2
0>INFO: 128MB Bank 3
0> <00> Block Memory Addr Test
0>INFO: 0MB Bank 0
0>INFO: 0MB Bank 1
0>INFO: 0MB Bank 2
0>INFO: 128MB Bank 3
0> <00> ECC Memory Addr Test
0>INFO: 0MB Bank 0
0>INFO: 0MB Bank 1
0>INFO: 0MB Bank 2
0>INFO: 128MB Bank 3
0> <00> Memory Status Test
0>INFO: 0MB Bank 0
0>INFO: 0MB Bank 1
0>INFO: 0MB Bank 2
0>INFO: 128MB Bank 3
0> <00> V9 Instruction Test
0> <00> CPU Tick and Tick Compare Reg Test
0> <00> CPU Soft Trap Test
0> <00> CPU Softint Reg and Int Test
2> <00> V9 Instruction Test
2> <00> CPU Tick and Tick Compare Reg Test

3-16 Netra t 1120/1125 Service Manual • August 1998

CODE EXAMPLE 3-2 diag-level Variable Set to min

(Continued)

0> <1f> Init Psycho
0> <1f> Psycho Cntl and UPA Reg Test
0> <1f> Psycho DMA Scoreboard Reg Test
0> <1f> Psycho Perf Cntl Reg Test
0> <1f> PIO Decoder and BCT Test
0> <1f> PCI Byte Enable Test
0> <1f> Counter/Timer Limit Regs Test
0> <1f> Timer Reload Test
0> <1f> Timer Periodic Test
0> <1f> Mondo Int Map (short) Reg Test
0> <1f> Mondo Int Set/Clr Reg Test
0> <1f> Psycho IOMMU Regs Test
0> <1f> Psycho IOMMU RAM Address Test
0> <1f> Psycho IOMMU CAM Address Test
0> <1f> IOMMU TLB Compare Test
0> <1f> IOMMU TLB Flush Test
0> <1f> Stream Buff A Control Reg Test
0> <1f> Psycho ScacheA Page Tag Addr Test
0> <1f> Psycho ScacheA Line Tag Addr Test
0> <1f> Psycho ScacheA RAM Addr Test
0> <1f> Psycho ScacheA Error Status NTA Test
0> <1f> Psycho ScacheB Page Tag Addr Test
0> <1f> Psycho ScacheB Line Tag Addr Test
0> <1f> Psycho ScacheB RAM Addr Test
0> <1f> Psycho ScacheB Error Status NTA Test
0> <1f> PBMA PCI Config Space Regs Test
0> <1f> PBMA Control/Status Reg Test
0> <1f> PBMA Diag Reg Test
0> <1f> PBMB PCI Config Space Regs Test
0> <1f> PBMB Control/Status Reg Test
0> <1f> PBMB Diag Reg Test
0> <00> UltraSPARC-2 Prefetch Instructions Test
0> <00> Test 0: prefetch_mr
0> <00> Test 1: prefetch to non-cacheable page
0> <00> Test 2: prefetch to page with dmmu misss
0> <00> Test 3: prefetch miss does not check alignment
0> <00> Test 4: prefetcha with asi 0x4c is noped
0> <00> Test 5: prefetcha with asi 0x54 is noped
0> <00> Test 6: prefetcha with asi 0x6e is noped
0> <00> Test 7: prefetcha with asi 0x76 is noped
0> <00> Test 8: prefetch with fcn 5
0> <00> Test 9: prefetch with fcn 2
0> <00> Test 10: prefetch with fcn 12
0> <00> Test 11: prefetch with fcn 16 is noped
0> <00> Test 12: prefetch with fcn 29 is noped
0> <00> Test 13: prefetcha with asi 0x15 is noped
0> <00> Test 14: prefetch with fcn 3

Chapter 3 Power-On Self-Test 3-17

CODE EXAMPLE 3-2 diag-level Variable Set to min

(Continued)

0> <00> Test 15: prefetcha14 with fcn 2
0> <00> Test 16: prefetcha80_mr
0> <00> Test 17: prefetcha81_1r
0> <00> Test 18: prefetcha10_mw
0> <00> Test 19: prefetcha80_17 is noped
0> <00> Test 20: prefetcha10_6: illegal instruction trap
0> <00> Test 21: prefetcha11_1w
0> <00> Test 22: prefetcha81_31
0> <00> Test 23: prefetcha11_15: illegal instruction trap
2> <00> UltraSPARC-2 Prefetch Instructions Test
2> <00> Test 0: prefetch_mr
2> <00> Test 1: prefetch to non-cacheable page
2> <00> Test 2: prefetch to page with dmmu misss
2> <00> Test 3: prefetch miss does not check alignment
2> <00> Test 4: prefetcha with asi 0x4c is noped
2> <00> Test 5: prefetcha with asi 0x54 is noped
2> <00> Test 6: prefetcha with asi 0x6e is noped
2> <00> Test 7: prefetcha with asi 0x76 is noped
2> <00> Test 8: prefetch with fcn 5
2> <00> Test 9: prefetch with fcn 2
2> <00> Test 10: prefetch with fcn 12
2> <00> Test 11: prefetch with fcn 16 is noped
2> <00> Test 12: prefetch with fcn 29 is noped
2> <00> Test 13: prefetcha with asi 0x15 is noped
2> <00> Test 14: prefetch with fcn 3
2> <00> Test 15: prefetcha14 with fcn 2
2> <00> Test 16: prefetcha80_mr
2> <00> Test 17: prefetcha81_1r
2> <00> Test 18: prefetcha10_mw
2> <00> Test 19: prefetcha80_17 is noped
2> <00> Test 20: prefetcha10_6: illegal instruction trap
2> <00> Test 21: prefetcha11_1w
2> <00> Test 22: prefetcha81_31
2> <00> Test 23: prefetcha11_15: illegal instruction trap
0>STATUS =PASSED

Power On Selftest Completed
~Software Power ON.0000.0000.0000 ffff.ffff.f00b.3110
ff9f.ffff.0bd1.1111

Master CPU online
Master Version: 0000.0000.1700.1120
Slave Version: 0000.0000.1700.1120
CPU E$ (M) 0000.0000.0020.0000 (S) 0000.0000.0020.0000

@(#) Sun Ultra 60 UPA/PCI 3.11 Version 25 created 1998/01/16 12:22

3-18 Netra t 1120/1125 Service Manual • August 1998

CODE EXAMPLE 3-2 diag-level Variable Set to min

(Continued)

Clearing DTAGS Done
Probing Memory Done
MEM BASE = 0000.0000.a000.0000
MEM SIZE = 0000.0000.0800.0000
MMUs ON
Copy Done
PC = 0000.01ff.f000.27e0
PC = 0000.0000.0000.2824
Decompressing into Memory Done
Size = 0000.0000.0006.e820
ttya initialized
SC Control: EWP:0 IAP:0 FATAL:0 WAKEUP:0 BXIR:0 BPOR:0 SXIR:0
SPOR:1 POR:0
Probing Memory Bank #0 0 0 0 0 : 0 Megabytes
Probing Memory Bank #1 0 0 0 0 : 0 Megabytes
Probing Memory Bank #2 0 0 0 0 : 0 Megabytes
Probing Memory Bank #3 32 32 32 32 : 128 Megabytes
Probing Floppy: No drives detected
Probing EBUS SUNW,tsalarm
Probing UPA Slot at 1e,0 Nothing there
Probing UPA Slot at 1d,0 Nothing there
Probing /pci@1f,4000 at Device 1 pci108e,1000 network
Probing /pci@1f,4000 at Device 3 scsi disk tape scsi disk tape
Probing /pci@1f,4000 at Device 2 Nothing there
Probing /pci@1f,4000 at Device 4 Nothing there
Probing /pci@1f,4000 at Device 5 Nothing there
Probing /pci@1f,2000 at Device 1 Nothing there
Probing /pci@1f,2000 at Device 2 Nothing there
screen not found.
Can’t open input device.
Keyboard not present. Using ttya for input and output.
SC Control: EWP:0 IAP:0 FATAL:0 WAKEUP:0 BXIR:0 BPOR:0 SXIR:0
SPOR:1 POR:0
Probing Memory Bank #0 0 0 0 0 : 0 Megabytes
Probing Memory Bank #1 0 0 0 0 : 0 Megabytes
Probing Memory Bank #2 0 0 0 0 : 0 Megabytes
Probing Memory Bank #3 32 32 32 32 : 128 Megabytes
Probing Floppy: No drives detected
Probing EBUS SUNW,tsalarm
Probing UPA Slot at 1e,0 Nothing there
Probing UPA Slot at 1d,0 Nothing there
Probing /pci@1f,4000 at Device 1 pci108e,1000 network
Probing /pci@1f,4000 at Device 3 scsi disk tape scsi disk tape
Probing /pci@1f,4000 at Device 2 Nothing there
Probing /pci@1f,4000 at Device 4 Nothing there
Probing /pci@1f,4000 at Device 5 Nothing there
Probing /pci@1f,2000 at Device 1 Nothing there

Chapter 3 Power-On Self-Test 3-19

CODE EXAMPLE 3-2 diag-level Variable Set to min

(Continued)

Probing /pci@1f,2000 at Device 2 Nothing there

Sun Ultra 60 UPA/PCI (2 X UltraSPARC-II 296MHz), No Keyboard
OpenBoot 3.11, 128 MB memory installed, Serial #9637699.
Ethernet address 8:0:20:93:f:43, Host ID: 80930f43.

3-20 Netra t 1120/1125 Service Manual • August 1998

3.5 POST Progress and Error Reporting

While POST is initialized, POST progress indications are visible when a TTY-type
terminal or a tip line is connected between serial port A (default port) of the system
being tested and a POST monitoring system.

If an error occurs during execution, POST attempts to send a failure message to the
POST monitoring system.
failure message.

Note – The system does not automatically boot if a POST error occurs; it halts at the

ok prompt to alert the user of a failure.

CODE EXAMPLE 3-3 Typical Error Code Failure Message

UltraSPARC-2 Prefetch Instructions Test
CPU UPA Config: 000006b8.3cc0803b
SRAM Mode: 22 Clock Mode: 3:1 ELIM: 4 PCON: 0f3 MCAP: 13
Ecache Size Limited: 2048KB
Test 0: prefetch_mr
STATUS =FAILED
TEST =UltraSPARC-2 Prefetch Instructions
TTF =0
PASSES =1
ERRORS =1
SUSPECT=CPU (Basic) U0101
MESSAGE=
Edata Mismatch(T0) Data compare error.
addr 00000000.40802000
expected 00000000
observed 22222222
xor 22222222

CODE EXAMPLE 3-3 identifies the typical appearance of a

Chapter 3 Power-On Self-Test 3-21

3.6 Motherboard Test

To initialize the motherboard POST:

1. Either:
a. From a terminal connected to ttyA, issue a break command to enter OBP, or
b. From a tip hardwire connection, send a break command.

2. At the OK prompt, type:

setenv diag-level max
setenv diag-switch? true
reset-all

The system will now reset and commence POST.

Note – Non-optional components, such as four SIMMs in slots U0701, U0801, U0901

and U1001, the motherboard, the power supply and the keyboard must be installed
for POST to execute properly. Removing the optional system components and
retesting the system isolates the possibility that those components are the cause of
the failure.

3-22 Netra t 1120/1125 Service Manual • August 1998

CHAPTER

4

Troubleshooting Procedures

This chapter describes how to troubleshoot possible problems with the
Netra t 1120/1125 system unit and includes suggested corrective actions. To follow
these troubleshooting procedures, a terminal should be connected to the
Netra t 1120/1125 system serial port A.

4-1

4.1 Power-On Failure

This section provides examples of power-on failure symptoms and suggested
actions.

Symptom

The system does not power up when the power switch is pressed.

Action

Check that the input power connector(s) is/are correctly fitted. Check that the
external circuit breaker(s), if fitted, is/are correctly set.

Press the power switch at the front of the system unit. If the system powers on, no
further action is required. If the system does not power on, one of the CPU modules
may not be properly seated. Remove the top cover and inspect each CPU module for
proper seating. If the system powers on, no further action is required.

If the input power has been verified, each CPU module is properly seated, and the
power-on key has been pressed but the system does not power up, the system power
supply may be defective. See Section 4.3 “Power Supply Test” on page 4-5.

Symptom

The system attempts to power up but does not boot.

Action

Press the power-on button. If the system unit still fails to boot, refer to Section 3.6
“Motherboard Test” on page 3-22.

4-2 Netra t 1120/1125 Service Manual • August 1998

4.2 Disk Drive or Removable Media Drive
Failure

This section provides disk drive and removable media drive failure symptoms and
suggested actions.

Symptom

■ A disk drive read, write or parity error is reported by the operating system or

customer application.

■ A removable media drive read error or parity error is reported by the operating

system or customer application.

Action

■ Replace the drive indicated by the failure message as described in Section 9.1

“Hard Disk Drive” on page 9-2. The operating system identifies the internal
drives as identified in

TABLE4-1 Internal Drive Identification

Operating System Address Drive Physical Location and Target

c0t0d0s# Lower SCSI Disk, target 0
c0t1d0s# Upper SCSI Disk, target 1 (optional)
c0t6d0s# CD-ROM drive, target 6 (optional)
c0t5d0s# Tape drive, target 5 (optional)

TABLE 4-1.

Note – The # symbol in the operating system address examples will be a numeral

between 0 and 7 that describes the slice or partition on the drive.

Symptom

Disk drive or removable media drive fails to respond to commands.

Chapter 4 Troubleshooting Procedures 4-3

Note – If POST is to be bypassed, type setenv diag-switch? false at the ok

prompt.

Action

Test the drive response to the probe-scsi command as follows:

● At the system ok prompt:

a. Type reset-all.
b. Type probe-scsi.

If the drives respond and a message is displayed, the system SCSI controller has
successfully probed the devices. This indicates that the system board is operating
correctly.

If one drive does not respond to the SCSI controller probe but the others do, replace
the unresponsive drive as described in Section 9.1 “Hard Disk Drive” on page 9-2 or
Section 9.2 “Removable Media Drive” on page 9-5.

If one internal disk drive is configured with the system and the probe-scsi test
fails to show the device in the message, replace the drive as described in Section 9.1
“Hard Disk Drive” on page 9-2 or Section 9.2 “Removable Media Drive” on page 9-5.

If the problem is still evident after replacing the drive, replace the SCSI backplane
assembly as described in Section 9.3 “SCSI Backplane” on page 9-8.

If replacing both the disk drive and the SCSI backplane assembly does not correct
the problem, replace the motherboard as described in Section 10.7 “Motherboard” on
page 10-24.

4-4 Netra t 1120/1125 Service Manual • August 1998

4.3 Power Supply Test

This section describes how to test the power supply. FIGURE 4-1 and TABLE 4-2
identify power supply connector J2901. FIGURE 4-2 and TABLE 4-3 identify power
supply connector J2902.
J2903.

1. Attach a wrist strap.

See Section 7.1 “To Attach the Wrist Strap” on page 7-1.

2. Power off the system and remove the power cord(s).

See Section 6.2 “To Power Off the System” on page 6-3.

3. Remove the top access cover.

See Section 7.2 “To Remove the Top Access Cover” on page 7-4.

4. Follow Step 4 to Step 9 in Section 8.1.1 “To Remove the Power Supply” on
page 8-1.

5. Lift the power supply from the chassis until it is restrained by the power supply
cables. Rest the power supply on the front crossmember of the enclosure to
expose connectors J2901 through J2903.

6. Reconnect the input power connector(s) and power on the system.

See Section 6.1 “To Power On the System” on page 6-2.

FIGURE 4-3 and TABLE 4-4 identify power supply connector

7. Using a digital voltage meter (DVM), check the power supply output voltages as
follows:

Note – Power supply connectors J2901 through J2903 must remain connected to the

motherboard.

a. With the negative probe of the DVM placed on a connector ground (Gnd) pin,

position the positive probe on each power pin.

b. Verify voltage and signal availability as listed in the tables below.

Chapter 4 Troubleshooting Procedures 4-5

8. If any power pin signal is not present with the power supply active and properly
connected to the motherboard, replace the power supply.

1 234 56 78 910111213141516

FIGURE 4-1 Power Supply Connector J2901

TABLE4-2 Power Supply Connector J2901 Pin Description

Pin Description Pin Description

1 Rtn 9 SUPPLY TRIP L
2 +3.3Vdc SENSE 10 POWERON L
3 Rtn 11 –12Vdc
4 +5.0Vdc SENSE 12 POWER OK
5 POWER SET0 NEG 13 Rtn
6 +3.0Vdc SENSE 14 +12Vdc
7 POWER 0V 15 Rtn
8 POWER SET0 POS 16 +12Vdc

1234

12 34 56 78

FIGURE 4-2 Power Supply Connector J2902

TABLE4-3 Power Supply Connector J2902 Pin Description

Pin Description Pin Description

1 +5.0Vdc Rtn 3 +3.0Vdc Rtn
2 +5.0Vdc 4 +3.0Vdc

4-6 Netra t 1120/1125 Service Manual • August 1998

123456

12 34 56 789101112

FIGURE 4-3 Power Supply Connector J2903

TABLE4-4 Power Supply Connector J2903 Pin Description

Pin Function Pin Function

1 +3.3Vdc Rtn 4 +3.3Vdc
2 +3.3Vdc Rtn 5 +3.3Vdc
3 +3.3Vdc Rtn 6 +3.3Vdc

Chapter 4 Troubleshooting Procedures 4-7

4.4 SIMM Failure

At times, the operating system, diagnostic program or POST may not display a
SIMM location (U number) as part of a memory error message. In this situation, the
only available information is a physical memory address and failing byte (or bit).

TABLE 4-5 lists physical memory addresses to locate a defective SIMM.

TABLE4-5 SIMM Physical Memory Address

SIMM Slot SIMM Pair (non-interleave) SIMM Quad (interleave)

U701
U801

U901
U1001

U702
U802

U902
U1002

U703
U803

U903
U1003

U704
U804

U904
U1004

00000000 - 0fffffff

00000000 - 1fffffff

10000000 - 1fffffff

20000000 - 2fffffff

20000000 - 3fffffff

30000000 - 3fffffff

40000000 - 4fffffff

40000000 - 5fffffff

50000000 - 5fffffff

60000000 - 6fffffff

60000000 - 7fffffff

70000000 - 7fffffff

4-8 Netra t 1120/1125 Service Manual • August 1998

CHAPTER

5

Tool Requirements

This chapter lists the tools required to service the Netra t 1120/1125 system:

■ No.1 and No.2 Phillips-head screwdriver

■ Needle-nose pliers

■ Antistatic wrist strap

■ Digital voltage meter (DVM)

■ Antistatic mat.

Place ESD-sensitive components such as system board, circuit cards, disk drives and
NVRAM/TOD on an antistatic mat. The following items can be used as an antistatic
mat:

■ Bag used to wrap a Sun replacement part

■ Shipping container used to package a Sun replacement part

■ Inner side (metal part) of the system unit cover

■ Sun ESD mat, part number 250-1088 (which can be purchased through your Sun

sales representative)

■ Disposable ESD mat; shipped with replacement parts or optional system features.

5-1

5-2 Netra t 1120/1125 Service Manual • August 1998

CHAPTER

6

Power On and Off

This chapter describes how to power on and power off the Netra t 1120/1125 system.

6-1

6.1 To Power On the System

1. Turn on power to all connected peripherals.

Note – Peripheral power is activated prior to system power so the system can

recognize the peripherals when it is activated.

2. Momentarily set the front panel ON/STBY system switch to the ON position

FIGURE 6-1).

(

1125

FIGURE 6-1 System Power-On (Front Panel)

6-2 Netra t 1120/1125 Service Manual • August 1998

6.2 To Power Off the System

Caution – Prior to turning off system power, exit from the operating system. Failure

!

to do so may result in data loss.

1. Where necessary, notify users that the system is going down.

2. Back up system files and data.

3. Halt the operating system.

4. Momentarily set the front panel ON/STBY system switch to the STBY position
(

FIGURE 6-2) until the system powers down.

5. Verify that the Power LED is off.

6. Disconnect the input power connector(s) on the rear of the unit, or open all circuit
breakers associated with the unit.

Caution –

1120
1125

Regardless of the position of the ON/STBY switch, where a DC power cord remains
connected to the system, DC voltage is always present within the power supply.

Regardless of the position of the ON/STBY switch, where an AC power cord
remains connected to the system, hazardous voltages are always present within the
power supply.

Chapter 6 Power On and Off 6-3

FIGURE 6-2 System Power-Off (Front Panel)

1125

6-4 Netra t 1120/1125 Service Manual • August 1998

CHAPTER

7

Internal Access

This chapter contains procedures to attach the wrist strap and to remove and replace
the system top access cover

7.1 To Attach the Wrist Strap

Caution – Wear an antistatic wrist strap and use an ESD-protected mat when

!

handling components. When servicing or removing system unit components, use a
wrist strap with a 10mm press stud connection and attach the wrist strap to the
press stud at the front or rear of the chassis. This should be performed before the top
cover is removed.

7-1

FIGURE 7-1 Attaching the Wrist Strap to the Front of the Chassis

7-2 Netra t 1120/1125 Service Manual • August 1998

FIGURE 7-2 Attaching the Wrist Strap to the Rear of the Chassis

Chapter 7 Internal Access 7-3

7.2 To Remove the Top Access Cover

Caution – Wear an antistatic wrist strap and use an ESD-protected mat when

!

handling components. When servicing or removing system unit components, an ESD
Strap should be attached to the wrist, then to one of the connection points provided
on the system, and then the power connectors should be removed from the system
unit. Following this caution equalizes all electrical potentials with the system unit.

1. Attach the wrist strap.

See Section 7.1 “To Attach the Wrist Strap” on page 7-1.

2. Power off the system.

See Section 6.2 “To Power Off the System” on page 6-3.

3. Disconnect the input power connector(s).

4. Remove the rack fixing screws and withdraw the unit on its slides (if fitted).

To remove the top access cover, the unit may need to be completely removed from
the rack. If slides are fitted, disconnect the cables and release the slides. Place the
system on an approved work station/position.

5. Remove the two screws from the front of the top access cover and carefully store
them away from the system unit.

6. Refer to
cover is facing you. To release the top cover, pull the tab towards you and lift the
cover off.

7-4 Netra t 1120/1125 Service Manual • August 1998

FIGURE 7-3. Place the system so that the extended tab of the top access

Screws

Tab

1125

FIGURE 7-3 Removing the Top Access Cover

Chapter 7 Internal Access 7-5

7.3 To Replace the Top Access Cover

Caution – Wear an antistatic wrist strap and use an ESD-protected mat when

!

handling components. When servicing or removing system unit components, an ESD
Strap should be attached to the wrist, then to one of the connection points provided
on the system, and then the power connectors should be removed from the system
unit.Following this caution equalizes all electrical potentials with the system unit.

1. Attach the wrist strap.

See Section 7.1 “To Attach the Wrist Strap” on page 7-1.

2. Position the top access cover.

FIGURE 7-4.

See

3. Push the cover forwards until the lugs on the sides have fully engaged in the
slots.

7-6 Netra t 1120/1125 Service Manual • August 1998

4. Replace the two fixing screws.

1125

FIGURE 7-4 Replacing the Top Access Cover

Chapter 7 Internal Access 7-7

7-8 Netra t 1120/1125 Service Manual • August 1998

CHAPTER

8

Power Subassemblies

This chapter contains procedures to remove and replace the power subassemblies of
the Netra t 1120/1125 system unit enclosure.

8.1 Power Supply

8.1.1 To Remove the Power Supply

Caution – Use proper ESD grounding techniques when handling components. Wear

!

!

an antistatic wrist strap and use an ESD-protected mat. Store ESD-sensitive
components in antistatic bags before placing them on any surface.

1. Attach the wrist strap.

See Section 7.1 “To Attach the Wrist Strap” on page 7-1.

2. Power off the system and remove the input power connector(s).

See Section 6.2 “To Power Off the System” on page 6-3.

Caution – When removing the power supply, attach the copper end of the wrist

strap to the system unit chassis, not to the power supply.

8-1

Logic ground

Primary earth

3. Remove the top access cover.

See Section 7.2 “To Remove the Top Access Cover” on page 7-4.

DC power connectors

FIGURE 8-1 Netra t 1120 DC Power Connectors and Earth Points

AC power inlet

Logic ground

Primary earth

FIGURE 8-2 Netra t 1125 AC Power Inlet and Earth Points

4. Using an 8mm wrench, remove the primary earth connection by removing the M5
nut and captive washer.

5. Using an 8mm wrench, remove the logic ground connection by removing the two
M5 nuts and captive washers.

8-2 Netra t 1120/1125 Service Manual • August 1998

6. Using a No.2 Phillips-head screwdriver, loosen the eight external (see FIGURE 8-3)
and two internal (see

FIGURE 8-4) captive screws securing the power supply to the

chassis.

FIGURE 8-3 Removing the Power Supply (#1)

7. Using a Phillips No. 2 screwdriver, remove the two captive screws securing the
power supply bracket to the chassis front crossmember (see

FIGURE 8-4 on

page 8-4).

8. Push the power supply forwards slightly to clear the earth grounding stud.

9. Lift the power supply from the chassis until it is restrained by the power supply
cables. Rest the power supply on the front crossmember of the enclosure.

10. Remove the cables from the clip retaining them to the processor mounting plate.

11. Disconnect the two cables from the alarms card. (To perform this it may be
necessary to remove a PCI card from the chassis.)

12. Disconnect the power supply cables from the motherboard.

13. Disconnect the power supply cable from the removable drive assembly.

14. Disconnect the power supply cable from the hard disk drive assembly or
assemblies.

Chapter 8 Power Subassemblies 8-3

15. Disconnect the power supply cable from the main fan unit.

16. Remove the power supply from the chassis.

Power supply

1125

FIGURE 8-4 Removing the Power Supply (#2)

8-4 Netra t 1120/1125 Service Manual • August 1998

8.1.2 To Replace the Power Supply

Caution – Use proper ESD grounding techniques when handling components. Wear

!

an antistatic wrist strap and use an ESD-protected mat. Store ESD-sensitive
components in antistatic bags before placing them on any surface.

1. Attach the wrist strap.

See Section 7.1 “To Attach the Wrist Strap” on page 7-1.

2. Position the power supply above the chassis. Rest it, upside-down (unlabeled side
up), on the front crossmember of the enclosure.

3. Connect the power cable to the removeable media drive assembly (if fitted).

4. Connect the three main power supply cables to the motherboard.

5. Connect the power cable to the SCSI backplane assembly.

6. Connect the power cable to the main fan assembly.

7. Connect the cable connector to the alarms card.

8. Position the power supply toward the rear of the chassis until the power supply
rear panel is flush with the chassis.

9. Using a No.2 Phillips-head screwdriver, tighten the eight captive screws securing
the power supply to the rear of the chassis.

10. Using a No.2 Phillips-head screwdriver, tighten the two captive screws securing
the power supply bracket to the chassis front crossmember.

11. Using a No.2 Phillips-head screwdriver, tighten the captive screw within the PSU
to the chassis L-bracket.

12. Using an 8mm wrench, secure the primary earth connection by tightening the M5
nut and captive washer.

13. Using an 8mm wrench, secure the logic ground connection by tightening the two
M5 nuts and captive washers.

14. Replace the top access cover.

See Section 7.3 “To Replace the Top Access Cover” on page 7-6.

15. Reconnect the input power connector(s) and power on the system.

See Section 6.1 “To Power On the System” on page 6-2.

16. Detach the wrist strap.

Chapter 8 Power Subassemblies 8-5

8.2 ON/STBY Switch Assembly

8.2.1 To Remove the ON/STBY Switch Assembly

Caution – Use proper ESD grounding techniques when handling components. Wear

an antistatic wrist strap and use an ESD-protected mat. Store ESD-sensitive

!

components in antistatic bags before placing them on any surface.

1. Attach the wrist strap.

See Section 7.1 “To Attach the Wrist Strap” on page 7-1.

2. Power off the system.

See Section 6.2 “To Power Off the System” on page 6-3.

3. Remove the top access cover.

See Section 7.2 “To Remove the Top Access Cover” on page 7-4.

4. Disconnect the ON/STBY switch connector from the back of the LED board.

5. Grasp both sides of the switch with the special tool supplied with the new switch,
while pushing the switch towards the front of the system. Once free, the switch
can be removed completely.

6. Remove the switch assembly from the chassis front. See

8-6 Netra t 1120/1125 Service Manual • August 1998

FIGURE 8-5 on page 8-7.

ON/STBY

switch assembly

1125

FIGURE 8-5 Removing and Replacing the ON/STBY Switch Assembly

Chapter 8 Power Subassemblies 8-7

8.2.2 To Replace the ON/STBY Switch Assembly

Caution – Use proper ESD grounding techniques when handling components. Wear

an antistatic wrist strap and use an ESD-protected mat. Store ESD-sensitive

!

components in antistatic bags before placing them on any surface.

1. Attach the wrist strap.

See Section 7.1 “To Attach the Wrist Strap” on page 7-1.

2. Feed the switch assembly power connector through the chassis front.

3. Position the switch assembly into the chassis housing and snap it into place.

4. Connect the switch connector to the LED card.

5. Replace the top access cover.

See Section 7.3 “To Replace the Top Access Cover” on page 7-6.

6. Detach the wrist strap.

8-8 Netra t 1120/1125 Service Manual • August 1998

8.3 LED Card

8.3.1 To Remove the LED Card

Caution – Use proper ESD grounding techniques when handling components. Wear

an antistatic wrist strap and use an ESD-protected mat. Store ESD-sensitive

!

components in antistatic bags before placing them on any surface.

1. Attach the wrist strap.

SeeSection 7.1 “To Attach the Wrist Strap” on page 7-1.

2. Power off the system.

See Section 6.2 “To Power Off the System” on page 6-3.

3. Remove the top access cover.

See Section 7.2 “To Remove the Top Access Cover” on page 7-4.

4. Remove the 10-way IDC cable from the alarms card.

5. Remove the 4-way molex connector from the rear of the LED card.

6. Use tool Part No. 250-1357-01 (provided with the replacement LED card) to
manœuvre the LED card from the standoffs. See

FIGURE 8-6 on page 8-10.

7. Place the LED card on an ESD mat.

Chapter 8 Power Subassemblies 8-9

LED card

1125

FIGURE 8-6 Removing and Replacing the LED Card

8-10 Netra t 1120/1125 Service Manual • August 1998

8.3.2 To Replace the LED Card

Caution – Use proper ESD grounding techniques when handling components. Wear

an antistatic wrist strap and use an ESD-protected mat. Store ESD-sensitive
components in antistatic bags before placing them on any surface.

1. Attach the wrist strap.

See Section 7.1 “To Attach the Wrist Strap” on page 7-1.

2. Position the LED card in the chassis.

3. Carefully ensure all light pipes are aligned with the corresponding holes in the
front panel.

4. Carefully push home the LED card until all the standoffs are fully engaged.

5. Reconnect the 10-way IDC cable to the alarms card.

6. Reconnect the 4-way power switch connector to the LED card.

7. Replace the top access cover.

See Section 7.3 “To Replace the Top Access Cover” on page 7-6.

8. Detach the wrist strap.

Chapter 8 Power Subassemblies 8-11

8-12 Netra t 1120/1125 Service Manual • August 1998

CHAPTER

9

Storage Devices

This chapter contains procedures to remove and replace the Netra t 1120/1125
system unit storage devices.

9-1

9.1 Hard Disk Drive

9.1.1 To Remove a Hard Disk Drive

See FIGURE 9-1 on page 9-3.

Caution – Use proper ESD grounding techniques when handling components. Wear

!

an antistatic wrist strap and use an ESD-protected mat. Store ESD-sensitive
components in antistatic bags before placing them on any surface.

1. Attach the wrist strap.

See Section 7.1 “To Attach the Wrist Strap” on page 7-1.

2. Power off the system and remove the input power connector(s).

See Section 6.2 “To Power Off the System” on page 6-3.

3. Open the front access cover.

4. Remove the front ESD screen, using a No.1 Phillips-head screwdriver to undo the
two captive screws.

5. Push the handle latch to the right to open the drive handle.

6. Extend the drive handle to disconnect the drive from the system.

7. Holding the drive handle, remove the drive from the drive bay.

8. The hard disk drive rear connector is disconnected when the drive is ejected.

9. Place the drive on an ESD mat.

9-2 Netra t 1120/1125 Service Manual • August 1998

FIGURE 9-1 Removing and Replacing a Hard Disk Drive

Chapter 9 Storage Devices 9-3

9.1.2 To Install a Hard Disk Drive

Caution – Use proper ESD grounding techniques when handling components. Wear

!

an antistatic wrist strap and use an ESD-protected mat. Store ESD-sensitive
components in antistatic bags before placing them on any surface.

1. Attach the wrist strap.

See Section 7.1 “To Attach the Wrist Strap” on page 7-1.

2. Power off the system and remove the input power connector(s).

See Section 6.2 “To Power Off the System” on page 6-3.

3. Holding the drive handle, insert the drive into the drive bay.

4. Push the front of the drive to connect it to the SCSI bus.

5. Close the drive handle to lock the drive into the system.

6. Replace the front ESD screen using a No.1 Phillips-head screwdriver.

7. Replace the front access cover.

8. Detach the wrist strap.

9-4 Netra t 1120/1125 Service Manual • August 1998

9.2 Removable Media Drive

9.2.1 To Remove a Removable Media Drive

Caution – Use proper ESD grounding techniques when handling components. Wear

!

an antistatic wrist strap and use an ESD-protected mat. Store ESD-sensitive
components in antistatic bags before placing them on any surface.

1. Attach the wrist strap.

See Section 7.1 “To Attach the Wrist Strap” on page 7-1.

2. Power off the system and remove the input power connector(s).

See Section 6.2 “To Power Off the System” on page 6-3.

3. Remove the top cover.

See Section 7.2 “To Remove the Top Access Cover” on page 7-4.

4. Remove the ESD plate.

See Section 9.1.1 “To Remove a Hard Disk Drive” on page 9-2.

5. Undo the four captive screws on top of the removable media drive assembly using
a No.1 Phillips-head screwdriver.

6. Partially remove the CD-ROM/tape drive from the assembly.

7. Disconnect the SCSI and power connectors from the rear of the drive.

8. Remove the drive from the chassis and place it on an ESD mat.

Chapter 9 Storage Devices 9-5

FIGURE 9-2 Removing and Replacing the CD-ROM or Tape Drive

9.2.2 To Install a Removable Media Drive

Caution – Use proper ESD grounding techniques when handling components. Wear

!

an antistatic wrist strap and use an ESD-protected mat. Store ESD-sensitive
components in antistatic bags before placing them on any surface.

1. Attach the wrist strap.

See Section 7.1 “To Attach the Wrist Strap” on page 7-1

2. Power off the system and remove the input power connector(s).

See Section 6.2 “To Power Off the System” on page 6-3.

3. Remove the top cover.

See Section 7.2 “To Remove the Top Access Cover” on page 7-4.

Captive screws

9-6 Netra t 1120/1125 Service Manual • August 1998

4. Lower the front cover.

5. Remove the ESD plate.

See Section 9.1.1 “To Remove a Hard Disk Drive” on page 9-2.

6. If necessary, remove the blanking plate.

7. Partially insert the drive with the release button at the top right hand side.

8. Connect the SCSI and power cables to the rear of the drive.

9. Push the drive fully into the drive assembly (

FIGURE 9-2 on page 9-6).

10. Using a No.1 Phillips-head screwdriver, replace the four captive screws securing
the drive to the drive assembly.

11. Replace the ESD plate.

12. Replace the top cover.

See Section 7.3 “To Replace the Top Access Cover” on page 7-6.

13. Remove the wrist strap.

14. Replace the front cover.

Chapter 9 Storage Devices 9-7

9.3 SCSI Backplane

9.3.1 To Remove the SCSI Backplane

Caution – Use proper ESD grounding techniques when handling components. Wear

!

an antistatic wrist strap and use an ESD-protected mat. Store ESD-sensitive
components in antistatic bags before placing them on any surface.

1. Attach the wrist strap.

See Section 7.1 “To Attach the Wrist Strap” on page 7-1.

2. Power off the system and remove the input power connector(s).

See Section 6.2 “To Power Off the System” on page 6-3.

3. Remove the top cover.

See Section 7.2 “To Remove the Top Access Cover” on page 7-4.

4. Remove the power supply.

See Section 8.1.1 “To Remove the Power Supply” on page 8-1.

5. Remove the hard disk drive(s).

See Section 9.1.1 “To Remove a Hard Disk Drive” on page 9-2.

6. Remove the CPU module(s).

See Section 10.1.1 “To Remove a CPU Module” on page 10-2.

7. Remove the dual processor bracket.

See Section 10.1.3 “To Remove the Dual Processor Bracket” on page 10-4.

8. Remove the SCSI connector from the removable media drive.

9. Using a No. 1 Phillips-head screwdriver, remove the four screws securing the
SCSI backplane.

In order to perform this it may be necessary to remove some SIMMS; for information
refer to Section 10.5.1 “To Remove a SIMM” on page 10-17.

10. Disconnect the cable from the motherboard and feed the connector under the
drive bay. Remove the SCSI backplane board from the chassis and place it on an
ESD mat.

9-8 Netra t 1120/1125 Service Manual • August 1998

9.3.2 To Replace the SCSI Backplane

Caution – Use proper ESD grounding techniques when handling components. Wear

!

an antistatic wrist strap and use an ESD-protected mat. Store ESD-sensitive
components in antistatic bags before placing them on any surface.

1. Attach the wrist strap.

See Section 7.1 “To Attach the Wrist Strap” on page 7-1.

2. Power off the system and remove the input power connector(s).

See Section 6.2 “To Power Off the System” on page 6-3.

3. Remove the top cover.

See Section 7.2 “To Remove the Top Access Cover” on page 7-4.

4. Remove the power supply.

See Section 8.1.1 “To Remove the Power Supply” on page 8-1.

5. Feed the connector cable to the motherboard under the drive bay.

6. Using a No. 1 Phillips-head screwdriver, replace the four screws securing the SCSI
backplane.

7. Replace the dual processor bracket.

See Section 10.1.4 “To Replace the Dual Processor Bracket” on page 10-6.

8. Replace the CPU module(s).

See Section 10.1.2 “To Replace a CPU Module” on page 10-4.

9. Replace any SIMMS which may have been removed.

10. Replace the power supply.

See Section 8.1.2 “To Replace the Power Supply” on page 8-5.

11. Replace the top cover.

See Section 7.3 “To Replace the Top Access Cover” on page 7-6.

12. Remove the wrist strap.

13. Replace the front cover.

Chapter 9 Storage Devices 9-9

9-10 Netra t 1120/1125 Service Manual • August 1998

CHAPTER

10

Motherboard and Component
Replacement

This chapter contains removal and replacement procedures for the Netra t 1120/1125
motherboard and components of the motherboard.

10-1

10.1 CPU Modules

10.1.1 To Remove a CPU Module

Caution – Use proper ESD grounding techniques when handling components. Wear

an antistatic wrist strap and use an ESD-protected mat. Store ESD-sensitive

!

components in antistatic bags before placing them on any surface.

1. Attach the wrist strap.

See Section 7.1 “To Attach the Wrist Strap” on page 7-1.

2. Power off the system and remove the input power connector(s).

See Section 6.2 “To Power Off the System” on page 6-3.

3. Remove the top access cover.

See Section 7.2 “To Remove the Top Access Cover” on page 7-4.

4. Using both thumbs, simultaneously lift the two levers on the CPU module
upward and to the side.

See FIGURE 10-1 below.

Levers

CPU module

FIGURE 10-1 CPU Module Levers

10-2 Netra t 1120/1125 Service Manual • August 1998

5. Using the two levers, lift the CPU module upwards until it clears the system
chassis.

CPU modules

1125

FIGURE 10-2 Removing and Replacing CPU Modules

6. Place the CPU module on an ESD mat.

Chapter 10 Motherboard and Component Replacement 10-3

10.1.2 To Replace a CPU Module

Caution – Use proper ESD grounding techniques when handling components. Wear

an antistatic wrist strap and use an ESD-protected mat. Store ESD-sensitive

!

components in antistatic bags before placing them on any surface.

1. Attach the wrist strap.

See Section 7.1 “To Attach the Wrist Strap” on page 7-1.

2. Power off the system and remove the power cord.

See Section 6.2 “To Power Off the System” on page 6-3.

3. On the antistatic mat, hold the CPU module in an upright position with the plastic
surface facing you.

4. Move the levers on the CPU module to point straight upwards.

5. Lower the CPU module along the vertical plastic guides until the module touches
the motherboard slot socket. Ensure connectors are aligned.

See (

FIGURE 10-2 on page 10-3). With both hands, simultaneously turn and press the

levers downward to the fully horizontal position.

6. Firmly press the module downward into the socket until it is fully seated and the
levers are fully locked.

7. Replace the top access cover.

See Section 7.3 “To Replace the Top Access Cover” on page 7-6.

8. Detach the wrist strap.

10.1.3 To Remove the Dual Processor Bracket

Caution – Use proper ESD grounding techniques when handling components. Wear

an antistatic wrist strap and use an ESD-protected mat. Store ESD-sensitive

!

10-4 Netra t 1120/1125 Service Manual • August 1998

components in antistatic bags before placing them on any surface.

1. Attach the wrist strap.

See Section 7.1 “To Attach the Wrist Strap” on page 7-1.

2. Power off the system and remove the inputpower connector(s).

See Section 6.2 “To Power Off the System” on page 6-3.

3. Remove the top access cover.

See Section 7.2 “To Remove the Top Access Cover” on page 7-4.

4. Remove the CPU module(s).

See Section 10.1.1 “To Remove a CPU Module” on page 10-2.

5. Unplug the fan connectors from the motherboard and the power supply.

6. Using a No. 1 Phillips screwdriver, loosen the two captive screws securing the
bracket to the motherboard (see

Tilt the bracket slightly to disengage the locating lugs from the keyholes in the
motherboard and lift it off.

Screwdriver insertion points

FIGURE 10-3).

Rear locating lug

Front locating lug
(behind fan)

FIGURE 10-3 Removing the Dual Processor Bracket

Chapter 10 Motherboard and Component Replacement 10-5

10.1.4 To Replace the Dual Processor Bracket

Caution – Use proper ESD grounding techniques when handling components. Wear

an antistatic wrist strap and use an ESD-protected mat. Store ESD-sensitive

!

components in antistatic bags before placing them on any surface.

1. Attach the wrist strap.

See Section 7.1 “To Attach the Wrist Strap” on page 7-1.

2. Carefully place the bracket on the motherboard so that the locating lugs engage in
the keyholes and the captive screws align with the appropriate holes, then tighten
the screws securely.

3. Plug in the connectors from the fan to the motherboard and the power supply.

4. Replace the CPU module(s).

See Section 10.1.2 “To Replace a CPU Module” on page 10-4.

5. Replace the top access cover.

See Section 7.3 “To Replace the Top Access Cover” on page 7-6.

6. Remove the wrist strap.

10-6 Netra t 1120/1125 Service Manual • August 1998

10.2 System Fan Assembly

10.2.1 To Remove the System Fan Assembly

Caution – Use proper ESD grounding techniques when handling components. Wear

!

an antistatic wrist strap and use an ESD-protected mat. Store ESD-sensitive
components in antistatic bags before placing them on any surface.

1. Attach the wrist strap.

See Section 7.1 “To Attach the Wrist Strap” on page 7-1.

2. Power off the system and remove the input power connector(s).

See Section 6.2 “To Power Off the System” on page 6-3.

3. Remove the top access cover.

See Section 7.2 “To Remove the Top Access Cover” on page 7-4.

4. Disconnect the fan assembly power cable from the power supply.

5. Using a No.2 Phillips-head screwdriver, undo the four screws and carefully
remove the fan assembly from the chassis.

Note that the bottom right-hand screw secures the earth strap connection to the front
cover.

Chapter 10 Motherboard and Component Replacement 10-7

System fan

FIGURE 10-4 Removing and Replacing the System Fan Assembly

10-8 Netra t 1120/1125 Service Manual • August 1998