Sundance SMT391 User Manual

SMT391

User Manual

Version 1.5 Page 2 of 18 SMT391 User Manual

Revision History

Date Comments Engineer Version

25/04/05 First release JPA 1.0 15/07/05 Added information about on-board clocks. JPA 1.1 31/08/05 Updated performances. JPA 1.2 14/06/06 Errata: external trigger maximum frequency. JPA 1.3 21/09/06 Added: weight characteristic SM 1.4 28/09/06 Removed: DC-coupled version not supported SM 1.5

Version 1.5 Page 3 of 18 SMT391 User Manual

Revision History.......................................................................................................... 2

Table of Contents....................................................................................................... 3

Introduction................................................................................................................. 4

Overview................................................................................................................. 4

Module Features..................................................................................................... 4

Possible Applications.............................................................................................. 4

Related Documents ................................................................................................ 5

Hardware overview..................................................................................................... 6

Block diagram......................................................................................................... 6

ADC AT84AD001B ................................................................................................. 6

Main analogue features........................................................................................... 6

Inputs / outputs ....................................................................................................... 7

Clock structure........................................................................................................ 8

Description of the Clock Tree.............................................................................. 9

SLB......................................................................................................................... 9

Performances........................................................................................................... 10

Introduction........................................................................................................... 10

VCO Clock............................................................................................................ 10

Components location................................................................................................ 12

Physical Properties................................................................................................... 14

Power Supply........................................................................................................ 14

Module Dimensions .............................................................................................. 15

Appendixes............................................................................................................... 16

SMT391 PCB View ............................................................................................... 16

SMT391 Assembly Drawings................................................................................ 17

Test points location............................................................................................... 18

Version 1.5 Page 4 of 18 SMT391 User Manual

Introduction

Overview

The SMT391 is a single width TIM module. It is capable of sampling two analogue inputs at 1 GSPS with a resolution of 8 bits. An Atmel dual channel ADC

(AT84AD001) performs the analogue to digital conversion.

The SMT391 is a “Daughter-Module” that combines with a “base module” such as the

SMT338-VP.

Thanks to this configuration, all the analogue circuits are on the SMT391 (on the top) and the digital circuits are on the base module (on the bottom). This allows reducing the cross-talk, provide better separation and heat-dissipation.

The interface between the base module and the SMT391 is digital. It is implemented using the Sundance LVDS Bus (SLB).

Module Features

The main features of the SMT391 are listed underneath:

• Dual channel ADC (Ideal for I & Q channel applications)

• 1GHz sampling frequency

• 8 Bit data resolution

• Custom Clock and Trigger inputs via external connectors

• SLB connector to interface to the wide range of Sundance base modules

Possible Applications

The SMT391 can be used for the following applications (this non-exhaustive list should be taken as an example):

• Broadband cable modem head-end systems

• 3G Radio transceivers

• High-data-rate point-to-point radios

• Medical imaging systems

• Spectrum analyzers

Version 1.5 Page 5 of 18 SMT391 User Manual

Hardware overview

Block diagram

The following diagram represents the architecture of the SMT391 daughter module.

Base module

SLB connector

Low jitter

local

oscillator

Control

Clock

generation

and

distribution

External clock

AT84AD0001B

Dual 8-bits

Signal

conditionning

Channel I

1 Gsps

ADC

Signal

conditionning

Channel Q

ADC AT84AD001B

Main analogue features

The main analogue characteristics of the SMT391 are listed in the following table:

Analogue inputs

Input voltage range 0.5Vp-p Impedance Analogue Bandwidth ADC Bandwidth: 1500MHz

External sampling clock inputs

Signal format LVPECL Frequency range Up to 1000 MHz

50Ω - terminated to ground

RF Transformer: 500kHz to 1.5GHz (AC Coupled)

+ 12 hidden pages