Sundance SMT338-VP User Manual
SMT338-VP
User Manual
Version 1.3 Page 2 of 22 SMT338-VP User Manual
Revision History
Date Comments Engineer Version
16/08/04 First revision JPA 1.0
17/05/05 Corrected: purpose of Led 5 and Led 6 SM 1.1
07/06/05 Added: power consumption
SM 1.2
Added: SDRAM 63.75MB capacity
1707/06 Updated DDR SDRAM description JPA 1.3
Version 1.3 Page 3 of 22 SMT338-VP User Manual
Table of Contents
Revision History............................................................................................................ 2
Table of Contents ......................................................................................................... 3
Table of Figures............................................................................................................ 4
Precautions (Please Read this!) ................................................................................... 4
Introduction ................................................................................................................... 5
Overview ................................................................................................................... 5
Features .................................................................................................................... 5
Power consumption .................................................................................................. 5
Related documents ................................................................................................... 5
Architecture description ................................................................................................ 6
Bloc diagram ............................................................................................................. 6
FPGA ........................................................................................................................ 6
Memory ..................................................................................................................... 6
Micro-controller ......................................................................................................... 7
Sundance High Speed Bus....................................................................................... 7
Comport .................................................................................................................... 7
SLB............................................................................................................................ 7
LED ........................................................................................................................... 7
JTAG ......................................................................................................................... 7
Booting SMT338-VP..................................................................................................... 9
Getting started with SMT338-VP................................................................................ 11
Functional description................................................................................................. 14
Memory banks......................................................................................................... 14
Oscillator ................................................................................................................. 15
Connectors location .................................................................................................... 15
FPGA pinout ............................................................................................................... 16
SHB Pinout (LVTTL only)........................................................................................ 16
SLB pinout............................................................................................................... 19
JTAG connector ...................................................................................................... 20
RSL ......................................................................................................................... 21
Version 1.3 Page 4 of 22 SMT338-VP User Manual
Table of Figures
Figure 1 - Micro controller State Machine. ................................................................... 9
Figure 2 - SMT338-VP to SMT390 Interconnections. ................................................ 11
Figure 3 – Fixings ....................................................................................................... 12
Figure 4: DDR SDRAM components bank organization ............................................ 14
Figure 5: view of the top of SMT338-VP .................................................................... 15
Figure 6: Top view QSH 30 ........................................................................................ 16
Figure 7: J13 footprint................................................................................................. 20
Figure 8: JTAG connector J13 pinout......................................................................... 20
Precautions (Please Read this!)
SHB and RSL connectors are similar but their use is really different. Do NOT connect
an SHB and an RSL connectors together with and SHB cable! This would cause
irreversible damages to the modules.
In the event of a conflict between the text of this document and the user guide for
SMT390-VP, SMT391-VP or SMT381-VP or any other DAQ daughter module, the
text of this document DOESN’T take precedence.
Version 1.3 Page 5 of 22 SMT338-VP User Manual
Introduction
Overview
The SMT338-VP is a single width TIM base module that provides a communication
platform between a Virtex-II Pro VP30 FPGA and the on-board 128MB Double Data
Rate SDRAM memory, Rocket IOs
connections for high speed parallel connections and LVTTL connections and
connectors.
for high speed serial connections, LVDS
The SMT338-VP can be coupled with analogue daughter boards such as SMT390
SMT391
or SMT381 for high performance DAQ applications.
,
The FPGA is configured at power-up via comport. The configuration process is
controlled by a microprocessor MSP430.
Features
● 128MBytes of DDR SDRAM 133 MHz for sample storage.
● Two Standard Sundance comports,
● Two SHB interfaces for easy interconnection to Sundance products,
● RSL (RocketIO Serial Link) interfaces for fast transfers,
● On-board MSP430 microprocessor.
Power consumption
The SMT338-VP consumes about 2.12 Watts in idle state (FPGA not configured),
and about 5.67 Watts once the FPGA is configured (bitstream for the SMT391-VP).
Related documents
SHB technical specification
Sundance help file
Sundance LVDS Bus (SLB) - Technical Specification
RSL Technical Specification
Architecture description
Bloc diagram
This section describes the major blocks of the SMT338-VP board.
SLB
512MBit for
Channel A
256MBit
DDR SDRAM
XC2VP20-6 or 30-6
Data, Clock and
Control (93)
Virtex-II Pro
FF896 Package
508 / 556 IOs
256MBit
DDR SDRAM
ChA Data, Clock
and Control (60)
DataTx (4d)
DataRx (4d)
ComPorts and
Control (59)
SHB A
4 RocketIO
Links for Channel A
(1GByte/s effective
Data throughput)
Top and Bottom TIM
Connectors
4 RocketIO
Links for Channel A
(1GByte/s effective
Data throughput)
SHB B
Debug IOs
and LEDs
Notes:
Data (21)
512MBit for
Channel B
The numbers in brackets denote
the amount of FPGA IO pins
Data, Clock and
Control (93)
256MBit
DDR SDRAM
256MBit
DDR SDRAM
DataTx (4d)
DataRx (4d)
ChB Data, Clock
and Control (60)
requires. 'd' is used for differential
pairs. 1d Will thus requre 2 IOs
FPGA
The SMT338-VP board uses a Xilinx Virtex II Pro (XC2VP20 or XC2VP30) to control
the data flow between the SMT338-VP board and external devices. The FPGA is
also used to implement the SHB, SLB, comport and DDR SDRAM interfaces.
The FPGA is configured via comport 3.
Memory
The SMT338-VP board contains four 166 MHz DDR SDRAM components (from
Micron: MT46V16M16FN) that provide each 32 MB of storage capacity.
The DDR SDRAM is a high-speed CMOS, dynamic random-access memory.
Examples of DDR SDRAM controller are provided by Xilinx.
Version 1.3 Page 7 of 22 SMT338-VP User Manual
Micro-controller
The SMT338VP board is equipped with a micro-controller MSP430
The MSP430 implements board maintenance functions:
• Controls the power start-up sequence
• Controls the reset structure on the module
• Configures the FPGA
Sundance High Speed Bus
SMT338-VP provides two SHB connectors.
Interfaces connected to SHB connector depends on the daughter connected to SLB
bus.
Please refer to the SUNDANCE SHB specification
for more details.
Comport
The SMT338-VP provides 2 comports: 0 and 3.
ComPort 3 is used to configure and send control words to the FPGA. Comport 0 is
left unused by the default firmware and is available for custom applications.
The TI comport specification
provides more information about comports.
SLB
The SMT338-VP provides a SLB connector.
Interface to SLB is specific to daughter board.
Please refer to SLB
specification for more details.
LED
Six LEDs are available on the board.
LED 1 is on when 5 volts is available on board.
LED 2 is on when 3.3 volts is available on board.
LED 3 and 4 are controlled by FPGA.
LED 5 is connected to MSP430. This led switches on when FPGA is configured.
LED 6 is mapped to the FPGA (pin AG6). It can be used as GPIO.
JTAG
The SMT338-VP includes JTAG connectors to access FPGA and MSP430. Both
devices are in the same JTAG chain.
Connector J13 is a dedicated JTAG connector. See J13
pinout for more details.
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