Sundance SMT335 User Manual

SMT335
SMT375

User Manual

User Manual (QCF42); Version 3.0, 5/2/01; © Sundance Multiprocessor Technology Ltd. 2001

Version 3.0 Page 2 of 34 SMT335 User Manual

Revision History

Date Comments Engineer Version

08/05/00 Comm port J.V. 0.1
12/06/00 SDB J.V. 0.2
10/07/00 Pre-release version J.V. 0.9
26/07/00 First version J.V. 1.0
27/07/00 Typing error corrected. (Comm Port status) J.V. 1.1

08/08/00 New Burst mode selection from CP status

J.V. 1.2

Global register display the interrupt status

09/08/00 Output FIFO status displays how many words

J.V. 1.3

can be sent

14/08/00 Global register and Interrupt control register

J.V. 1.4

reordered. (Need Bootv1.2)

03/09/00 SDB naming corrected to A and B.

J.V. 1.5
Global Bus modification for DMA use.
Comm port drawing modified
Boot code Version 1.4
FPGA Firmware Version 2.0
(top335V2_0_6.dat)

14/09/00 NMI routing selection added. J.V. 1.6
18/09/00 Global Bus transfer example corrected J.V. 1.7
10/10/00 Global Bus wait state and bus sharing feature

J.V. 1.8
added.

Comm-port status register: OCPRDY and
ICPRDY moved to allow FIFO depth
expansion.

Firmware version 2.5.6

27/10/00 Global Bus wait state increased to 15. Cf.

Control register.
Comm-port status register: Full reset bit added

for crash recovery.
Firmware version 2.7.6

J.V. 1.9

Version 3.0 Page 3 of 34 SMT335 User Manual

09/11/00 Documentation added for DMA transfers

FPGA I/O Slew rate changed to S_12.
Firmware version 2.8.6

07/12/00 SDB interrupt flags modified.

Global bus tri-state signal not latched.
Global bus flag cleared when transfer direction

is changed.
Comm-port reply disabled during token

exchange.
Firmware version 2.9.6

11/12/00 SDB Memory mapping updated.

Firmware version 3.0.6

24/01/01 Manual updated with quality template.

Timer routing detailed.

J.V. 2.0

J.V. 2.1

J.V. 2.2

J.V. 2.3

Comm-port drawing corrected.
Reprogramming and version control described.
SDB Interrupt Bug fixed. SDB handling

detailed.
Comm-port bug reported.
Firmware version 3.3.6

13/4/01 General overhaul and clarificati o n PSR 3.0

30/8/01 Power consumption and reset timing added.

J.V. 3.1
Value of Bit 12-13 of the global control register

explained.

11/04/02 Global bus additional feature. Synchronisation

J.V. 3.2
with carrier board on SMT328 and SMT310.

External trigger for ADC acquisition for
SMT118.

Fix for Comm-port Burst mode selection
between threads in bi-directional transfer.

Firmware version 3 .11.6

Version 3.0 Page 4 of 34 SMT335 User Manual

15/05/02 IIOF Interrupt description.

J.V. 3.3
Global bus BUSY bit description
Interrupt control register 6 address corrected.
Global bus transfers description for SMT310

family.
Firmware version 3 .11.6

30/01/03 Restructure of the document.

J.V. 3.4
Double buffered global bus. Will require code

change if transfer via dma were used.
SDB dma synchronisation changed no

software change required.
Firmware version 3 .13.6

It is important that you use the correct version of the firmware; you should use
firmware version 3.13.6 or later.

Check your firmware revision number with the program read_version_335.out and
ask for a more recent version if necessary.

E-mail: [e-mail]

Version 3.0 Page 5 of 34 SMT335 User Manual

Table of Contents

Revision History............................................................ Error! Bookmark not define d.

Contacting Sundance................................................... Error! Bookmark not defined.

Notational Conventions................................................ Error! Bookmark not defined.

SMT335....................................................................Error! Bookmark not defined.

Register Descriptions...............................................Error! Bookmark not defined.

Outline Description....................................................... Error! Bookmark not define d.

Block Diagram............................................................... Error! Bookmark not defined.

Architecture Description.............................................. Error! Bookmark not de fine d.

TMS320C6201/6701....................................................... Error! Bookmark not defined.

Boot Mode................................................................Error! Bookmark not defined.

EMIF Control Registers................................................ Error! Bookmark not define d.

SBSRAM..................................................................Error! Bookmark not defined.

SDRAM....................................................................Error! Bookmark not defined.

FLASH......................................................................Error! Bookmark not defined.

Version control ............................................................. Error! Bookmark not defined.

Reprogramming the firmware and boot code ............ Error! Bookmark not defined.

Interrupts....................................................................... Error! Bookmark not defined.

Communication ports................................................... Error! Bookmark not defined.

Data rates ...................................................................... Error! Bookmark not defined.

SDB................................................................................ Error! Bookmark not define d.

SDB................................................................................ Error! Bookmark not define d.

SDB update..............................................................Error! Bookmark not defined.

SDB Clock selection.................................................Error! Bookmark not defined.

Global bus..................................................................... Error! Bookmark not d e fine d.

Note for SMT310, SMT310Q, SMT300, SMT300Q..Error! Bookmark not defined.

Clock Speed.................................................................. Error! Bookmar k not d efined.

LED Setting ................................................................... Error! Bookmark not defined.

LED Register............................................................Error! Bookmark not defined.

CONFIG & NMI............................................................... Error! Bookmark not defined.

Timer.............................................................................. Error! Bookmark not defined.

IIOF interrupt................................................................. Error! Bookmark not defined.

Version 3.0 Page 6 of 34 SMT335 User Manual

Code Composer............................................................ Error! Bookmark not de fine d.

Application Development............................................. Error! Bookmark not defined.

Operating Conditions................................................... Error! Bookmar k not d e fine d.

Safety.......................................................................Error! Bookmark not defined.

EMC.........................................................................Error! Bookmark not defined.

General Requirements.............................................Error! Bookmark not defined.

Power Consumption.................................................Error! Bookmark not defined.

Serial Ports.................................................................... Error! Bookmark not defined.

C6201 Memory Map...................................................... Error! Bookmark not defined.

Flash Access ................................................................. Error! Bookmark not define d.

Virtex Memory Map....................................................... Error! Bookmark not defined.

Jumpers......................................................................... Error! Bookmark not defined.

JP1: Clock speed select...........................................Error! Bookmark not defined.

JP2: Serial port header.............................................Error! Bookmark not defined.

SDB Pin-Out .................................................................. Error! Bookmark not defined.

Virtex layout.................................................................. Error! Bookmark not defined.

Virtex Pin-Out................................................................ Error! Bookmark not defined.

Bibliography.................................................................. Error! Bookmark not defined.

Index .............................................................................. Error! Bookmark not defined.

Contacting Sundance

You can contact Sundance for additional information by sending email to

[e-mail]

Version 3.0 Page 7 of 34 SMT335 User Manual

Notational Conventions

SMT335

Throughout this document the term SMT335 will usually be used to refer to both the
SMT335 and the SMT375. It should be clear from the context when a distinction is
being drawn between the two types of module.

Register Descriptions

The format of registers is described using diagrams of the following form:

31–24 23–16 15–8 7–0

OFLAGLEVEL

R,00000000 RW,10000000 R,00000000 R,10000000

The digits at the top of the diagram indicate bit positions within the register and the
central section names bits or bit fields. The bottom row describes what may be done
to the field and its value after reset. Shaded fields are reserved and should only ever
be written with zeroes.

R Readable by the CPU
W Writeable by the CPU
RW Readable and writeable by the CPU
Binary digits indicate the value of the field after reset.

Version 3.0 Page 8 of 34 SMT335 User Manual

Outline Description

The SMT335 is a C6000-based size 1 TIM offering the following features:

 SMT335: TMS320C6201 processor running at 200MHz
 SMT375: TMS320C6701 processor running at 166MHz
 Six 20MB/s communication ports (comm.-ports)
 512KB of fast SBSRAM, 16MB of SDRAM
 512KB Flash ROM for boot code and FPGA programming
 Global expansion connector
 High bandwidth data I/O via 2 Sundance Digital Buses (SDB).

Version 3.0 Page 9 of 34 SMT335 User Manual

Block Diagram

SDRAM

4M x 32

C6201

1600MIPS

23pins 23pins

SDB

SBSRAM

Address(16),Data(32),Control=12

Virtex

GLOBAL BUS

COMM PORTS

SDB

User applications

128K x 32

FLASH

512K x 8

SDB

Address,Data,Control=75pins

4xComms=48pins

2xComms,Tclk,Clocks,Ints=33pins

GLOBAL
SECONDARY
PRIMARY

Version 3.0 Page 10 of 34 SMT335 User Manual

Architecture Description

The SMT335 TIM consists of a Texas Instruments TMS320C6201 running at
200MHz while the SMT375 has a TMS320C6701 running at 166MHz. Modules are
populated with 512KB of synchronous burst SRAM (SBSRAM) and 16MB of
synchronous DRAM (SDRAM), giving a total memory capacity of 16.5MB.

A Field Programmable Gate Array (FPGA) is used to manage global bus accesses
and implement six communication ports and two Sundance Digital Buses.

Version 3.0 Page 11 of 34 SMT335 User Manual

TMS320C6201/6701

Bother processors will run with zero wait states from internal SRAM, the
TMS320C6201 at 200MHz and the TMS320C6701 at 166MHz.

An on-board synthesiser from MicroClock provides the clock used for the C6000;
jumpers on the TIM allow you to select clock speeds from 118MHz to 200MHz.
Unlike similar TIMs based on the TMS320C4x, there is no option to provide an
external clock source.

The TIM configuration feature is fully implemented. This provides a single open­collector line that can be held low until software configuration has been completed.

Boot Mode

The SMT335 is configured to use the following boot sequence each time it is taken
out of reset:

1. The processor copies a bootstrap program from the first 32KB of the flash
memory into internal program RAM starting at address 0.

2. Execution starts at address 0.

The standard bootstrap supplied with the SMT335 then performs the following
operations:

1. All relevant C6000 internal registers are set to default values;

2. The FPGA is configured from data held in flash memory and sets up the
communication ports, the global bus and the Sundance Digital Buses. This
step must have been completed before data can be sent to the comm-ports
from external sources such as the host or other TIMs;

3. A C4x-style boot loader is executed. This will continually examine the six
communication ports until data appears on one of them. The bootstrap will
then load a program in boot format from that port; the loader will not read data
arriving on other ports. See “Application Development” on page Error!
Bookmark not defined. for details of the boot loader format;

4. Finally, control is passed to the loaded program.

The delay between the release of the board reset and the FPGA configuration is
around 280ms for a SMT335 (200MHz clock) and 330ms for a SMT375 (166MHz).
The worse case is with a board clocked at 118MHz (no jumper fitted) in which case
the FPGA will be configured 480ms after the rese t is released.

A typical time to wait after releasing the board reset is 500ms.