SMT145
User Manual
User Manual (QCF42); Version 3.0, 5/2/01; © Sundance Multiprocessor Technology Ltd. 2001
Version 1.1 Page 2 of 18 SMT145 User Manual
Revision History
Date Comments Engineer Version
06/03/06 First revision JPA 1.0
29/09/06 Corrected JP6 pinout JPA 1.1
Version 1.1 Page 3 of 18 SMT145 User Manual
Table of Contents
Revision History....................................................................................................... 2
Table of Contents ..................................................................................................... 3
Table of figures......................................................................................................... 5
Contacting Sundance............................................................................................... 6
Notational Conventions ........................................................................................... 7
C60 ......................................................................................................................... 7
Register Descriptions.............................................................................................. 7
Outline Description .................................................................................................. 8
Features..................................................................................................................... 8
Block Diagram .......................................................................................................... 9
Block Diagram .......................................................................................................... 9
FPGA.................................................................................................................... 10
PCI........................................................................................................................ 10
RSL....................................................................................................................... 10
Comport................................................................................................................ 10
JTAG........................................................................................................................ 10
JTAG for the TIM .................................................................................................. 10
JTAG for the SMT145........................................................................................... 11
Configuration of the FPGA .................................................................................... 11
Software .................................................................................................................. 11
Driver .................................................................................................................... 12
Registers............................................................................................................... 12
Reset register (BAR1 – 0x00000000)................................................................ 12
X-Link table of content (BAR1 – 0x00000400) .................................................. 12
Firmware.................................................................................................................. 13
Operating Conditions............................................................................................. 14
Safety.................................................................................................................... 14
EMC...................................................................................................................... 14
General Requirements.......................................................................................... 14
Power Consumption.............................................................................................. 14
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PCB description...................................................................................................... 15
Connectors pinout.................................................................................................. 16
JP6........................................................................................................................ 16
JTAG1 ................................................................................................................... 16
JTAG2 ................................................................................................................... 16
Bibliography............................................................................................................ 17
Index........................................................................................................................ 18
Version 1.1 Page 5 of 18 SMT145 User Manual
Table of figures
Figure 1: SMT145 block diagram................................................................................ 9
Figure 2: software design ......................................................................................... 12
Figure 3: FPGA design............................................................................................. 13
Version 1.1 Page 6 of 18 SMT145 User Manual
Contacting Sundance
You can contact Sundance for additional information by login onto the support
system support.sundance.com