Sundance FC203B User Manual

FC203B - Power Spectrum

Interleaver

FPGA Module

User’s Guide

Copyright © Sundance Digital Signal Pro cessing Inc.

All rights reserved. No part of this document may be reproduced, translated,

stored in a retrieval system, or transmitted, in any form or by any means,

electronic, mechanical, photocopying, recording or otherwise, without prior

written permission of the owner.

If this copy is no longer in use, return to sender.

Note:

Page 2 of 2

Revision 0.5

AUTHORS

Name Signature Date

F. Huettig 6-Apr-07

DOCUMENT HISTORY

Date Initials Revision Description of Change

19-Feb-07 FH 0.0 Initial Release for Internal Review

2-Apr-07 FH 0.1 Changed definition of SPAN, removed FDMA_IN

port and need for FC203C.
5-Apr-07 FH 0.2 Fixed table 3, added C>1 requirement
6-Apr-07 FH 0.3 Added “Known Issues”
8-Apr-07 FH 0.5 Added resource utilization

Sundance Digital Signal Processing Inc.

4790 Caughlin Parkway 233, Reno, NV 89519-0907, U.S.A.

Tel: [phone], Fax: [phone], email: [e-mail]

www.sundancedsp.com

Page 3 of 3

Revision 0.5

Table of Contents

1. GENERAL DESCRIPTION...................................................................................................4

2. I/O DESCRIPTION.................................................................................................................5

3. KNOWN ISSUES...................................................................................................................8

4. PRESENTATION...................................................................................................................8

5. USAGE....................................................................................................................................9

6. VERIFICATION...................................................................................................................11

7. DELIVERABLES.................................................................................................................12

8. LICENSING AND PROPERTY RIGHTS...........................................................................12

9. ORDERING INFORMATION.............................................................................................12

Table of Figures

Figure 1 – FC203B Component Diagram.......................................................................................4

Sundance Digital Signal Processing Inc.

4790 Caughlin Parkway 233, Reno, NV 89519-0907, U.S.A.

Tel: [phone], Fax: [phone], email: [e-mail]

www.sundancedsp.com

Page 4 of 4

Revision 0.5

1. GENERAL DESCRIPTION

This sub-component implements the time slot assembly of the FC203 component group. The
FC203A provides raw spectral information from groups of channels; the FC203B component
exists to merge the data from multiple channels into one time-multiplexed spectral information
stream.

In order for it to be used within a Diamond/FPGA system, the I/O interfaces are ‘standardized’ to
the model described by Diamond1.

FC203B

FDMA_OUT

32

FDMA_CM_IN

F0_IN

64

F1_IN

64

F2_IN

64

F3_IN

64

FDMA_CM_OUT

CTRL_IN

Figure 1 – FC203B Component Diagram

1

See: http://www.3l.com/Diamond/Documentation/Diamond.pdf (Chapter 28, “FPGA Tasks”)

STATUS_OUT

Sundance Digital Signal Processing Inc.

4790 Caughlin Parkway 233, Reno, NV 89519-0907, U.S.A.

Tel: [phone], Fax: [phone], email: [e-mail]

www.sundancedsp.com