Page 1
UM2750
User manual
SPI display expansion boards for STM32 Nucleo-64
Introduction
The X-NUCLEO-GFX01M1 and X-NUCLEO-GFX01M2 expansion boards (X-NUCLEO-GFX01Mx) add graphical user interface
(GUI) capability to STM32 Nucleo-64 boards.
They feature a 2.2" SPI QVGA TFT display as well as a 64-Mbit SPI NOR flash memory for storing graphic images, texts, and
texture. The expansion boards also offer a joystick for GUI navigation.
X-NUCLEO-GFX01M1 uses the ST morpho connector and supports only one SPI. It is compatible with the following
Nucleo-64 boards: NUCLEO-F030R8, NUCLEO-F070RB, NUCLEO-F072RB, NUCLEO-F091RC, NUCLEO-F401RE, NUCLEO-
F410RB, NUCLEO-F411RE, NUCLEO-F446RE, NUCLEO-G071RB, NUCLEO-L053R8, NUCLEO-L073RZ, NUCLEO-L412RBP, NUCLEO-L433RC-P, NUCLEO-L452RE, NUCLEO-L452RE-P, and NUCLEO-L476RG.
X-NUCLEO-GFX01M2 uses the ST morpho connector and supports up to two SPIs. It is compatible with the following
Nucleo-64 boards, which include the X-NUCLEO-GFX01M1-compatible boards: NUCLEO-F030R8, NUCLEO-F070RB,
NUCLEO-F072RB, NUCLEO-F091RC, NUCLEO-F103RB, NUCLEO-F302R8, NUCLEO-F303RE, NUCLEO-F334R8, NUCLEOF401RE, NUCLEO-F410RB, NUCLEO-F411RE, NUCLEO-F446RE, NUCLEO-G070RB, NUCLEO-G071RB, NUCLEOG0B1RE, NUCLEO-G431RB, NUCLEO-G474RE, NUCLEO-G491RE, NUCLEO-L010RB, NUCLEO-L053R8, NUCLEOL073RZ, NUCLEO-L152RE, NUCLEO-L412RB-P, NUCLEO-L433RC-P, NUCLEO-L452RE, NUCLEO-L452RE-P, NUCLEOL476RG, NUCLEO-WB15CC, NUCLEO-WB55RG, and NUCLEO-WL55JC.
Figure 1. X-NUCLEO-GFX01Mx top view
Pictures are not contractual.
Figure 2. X-NUCLEO-GFX01Mx bottom view
UM2750 - Rev 3 - March 2022
For further information contact your local STMicroelectronics sales office.
www.st.com
Page 2
1 Features
• 2.2" SPI QVGA TFT LCD
• 64-Mbit SPI NOR flash memory
• Joystick for easy menu navigation
• Compatible with selected STM32 Nucleo-64 boards using the ST morpho interface
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Features
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Page 3
2 Ordering information
To order the X-NUCLEO-GFX01Mx SPI display expansion boards for STM32 Nucleo-64, refer to Table 1.
Table 1. Ordering information
Order code Board reference Differentiating features
X-NUCLEO-GFX01M1
X-NUCLEO-GFX01M2
1. MB1642B for X-NUCLEO-GFX01M1, MB1642D for X-NUCLEO-GFX01M2.
MB1642
The STM32 Nucleo-64 boards feature STM32 32-bit microcontrollers based on the Arm® Cortex®‑M processor.
Note: Arm is a registered trademark of Arm Limited (or its subsidiaries) in the US and/or elsewhere.
First-generation product compatible with a limited set of STM32 Nucleo-64 boards.
(1)
Second-generation product compatible with a broader set of STM32 Nucleo-64
boards.
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Ordering information
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3 Development environment
3.1 Demonstration software
The demonstration software supporting the X-NUCLEO-GFX01M1 and X-NUCLEO-GFX01M2 expansion boards
is available from the X-CUBE-DISPLAY STM32Cube Expansion Package and must be programmed into
the corresponding Nucleo board. The latest versions of the demonstration source code and associated
documentation can be downloaded from www.st.com.
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Development environment
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4 Quick start
Before the first use, make sure that no damage occurred to the board during shipment:
• All socketed components must be firmly secured in their sockets
• Nothing must be loose in the board plastic bag or in the box
To start using the X-NUCLEO-GFX01M1 or X-NUCLEO-GFX01M2 expansion board, follow the steps below:
1. Plug the board on a compatible STM32 Nucleo development board
2. Download the evaluation firmware and full set of documentation from www.st.com/en/product/x-cube-display
and program the target device
3. Evaluate the graphic possibilities of STM32 devices combined with the TouchGFX Engine graphic library in
X-CUBE-TOUCHGFX or develop your own application
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Quick start
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5 Hardware layout and configuration
Figure 3 and Figure 4 help users to locate the different features on the X-NUCLEO-GFX01M1 and X-NUCLEOGFX01M2 expansion boards (X-NUCLEO-GFX01Mx). The mechanical dimensions of the X-NUCLEO-GFX01Mx
products are shown in Figure 5.
Figure 3. X-NUCLEO-GFX01Mx PCB layout: top side
UM2750
Hardware layout and configuration
2.2" SPI QVGA
TFT LCD
(LCD1)
UP
Menu navigation
joystick (B1)
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Page 7
Hardware layout and configuration
Figure 4. X-NUCLEO-GFX01Mx PCB layout: bottom side
ST morpho connectors
(CN2 and CN3)
UM2750
64-Mbit SPI NOR
flash memory
(U1)
LCD ZIF
connector
(CN1)
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Page 8
Hardware layout and configuration
Figure 5. X-NUCLEO-GFX01Mx mechanical drawing
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5.1 Power supply
The X-NUCLEO-GFX01Mx is directly powered by a 3.3 V power supply provided by the Nucleo-64 development
board through the pin 16 of the CN2 connector.
5.2 SPI QVGA TFT LCD (LCD1)
5.2.1 Description
The SPI QVGA TFT LCD is connected to a first SPI interface (SPIA) of the STM32 device.
X-NUCLEO-GFX01M1 and X-NUCLEO-GFX01M2 feature each a different LCD with a different controller IC.
Refer to the product history for details.
5.2.2 Operating voltage
The LCD is designed to operate only with a 3.3 V compatible SPI and GPIO interface.
5.2.3 I/O interface
Table 2. X-NUCLEO-GFX01M1 I/O configuration of the LCD
Pin number Pin name Signal name STM32 GPIO Function
1 LED_K4 - - Display backlight LED4 cathode
2 IM0 GND -
3 IM1 3V3 -
4 IM2 3V3 -
5 IM3 3V3 -
6 RESET DISP_NRESET_PA1
7 - 28 - - - Not connected
29 SDO SPIA_MISO_PA6_PB14
30 SDI SPIA_MOSI_PA7_PB15
31 RD - - Not connected
32 RS/SCL SPIA_SCK_PA5_PB13
33 WR SPIA_DCX_PB3_PB3
34 CS SPIA_NCS_PB5_PB5
35 FMARK DISP_TE_PA0
36 VCC 3V3 - 3.3 V power supply
37 GND GND - Ground
38 LED_A 3V3 - Display backlight LED common anode
39 LED_K1 - - Display backlight LED1 cathode
40 LED_K2 - - Display backlight LED2 cathode
41 LED_K3 - - Display backlight LED3 cathode
42 - 45 - - - Not connected
1. STM32 GPIO for NUCLEO-F030R8, NUCLEO-F070RB, NUCLEO-F072RB, NUCLEO-F091RC, NUCLEO-F401RE,
NUCLEO-F410RB, NUCLEO-F411RE, NUCLEO-F446RE, NUCLEO-G071RB, NUCLEO-L053R8, NUCLEO-L073RZ,
NUCLEO-L452RE, and NUCLEO-L476RG.
2. STM32 GPIO for NUCLEO-L412RB-P, NUCLEO-L433RC-P, and NUCLEO-L452RE-P.
PA1
PA6
PB14
PA7
PB15
PA5
PB13
PB3
PB5
PA0
(1) (2)
(1)
(2)
(1)
(2)
(1)
(2)
(1) (2)
(1) (2)
(1) (2)
UM2750
Power supply
System interface selection: 4-line 8-bit data SPI mode
Reset active low
SPI master in/slave out
SPI master out/slave in
SPI serial clock
SPI write enable
SPI chip select active high
Tearing effect output pin to synchronize MCU on frame
writing
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Page 10
UM2750
SPI QVGA TFT LCD (LCD1)
Table 3. X-NUCLEO-GFX01M2 I/O configuration of the LCD
Pin number Pin name Signal name STM32 GPIO Function
1 LED_K4 - - Display backlight LED4 cathode
2 IM0 GND -
3 IM1 3V3 -
4 IM2 3V3 -
5 IM3 3V3 -
(1) (2) (3) (4) (5)
PA1
(6)
6 RESET DISP_NRESET
PB2
PC1
PA6
(7)
(8)
7 - 28 - - - Not connected
(1) (3) (5) (6) (7)
PA6
29 SDO SPIA_MISO
30 SDI SPIA_MOSI
(2) (4)
PB14
(8)
PB4
(1) (3) (5) (6) (7) (8)
PA7
(2) (4)
PB15
31 RD - - Not connected
(1) (3) (5) (6) (7) (8)
32 RS/SCL SPIA_SCK
33 WR SPIA_DCX
34 CS SPIA_NCS
35 FMARK DISP_TE
PA5
(2) (4)
PB13
(1) (2) (4) (5) (6)
PB10
(3)
PB14
(7) (8)
PA8
(1) (2) (3) (5)
PA9
(4)
PB6
(6)
PC2
(7)
PC12
(8)
PB5
(1) (2) (3) (4) (5)
PA0
(6)
PB1
(7)
PC0
(8)
PA4
36 VCC 3V3 - 3.3 V power supply
37 GND GND - Ground
38 LED_A 3V3 - Display backlight LED common anode
39 LED_K1 - - Display backlight LED1 cathode
40 LED_K2 - - Display backlight LED2 cathode
41 LED_K3 - - Display backlight LED3 cathode
42 - 45 - - - Not connected
1. STM32 GPIO for NUCLEO-F030R8, NUCLEO-F070RB, NUCLEO-F072RB, NUCLEO-F091RC, NUCLEO-F103RB,
NUCLEO-F303RE, NUCLEO-F334R8, NUCLEO-F401RE, NUCLEO-F410RB, NUCLEO-F411RE, NUCLEO-F446RE,
NUCLEO-L053R8, NUCLEO-L010RB, NUCLEO-L152RE, NUCLEO-L073RZ, NUCLEO-L452RE, and NUCLEO-L476RG.
2. STM32 GPIO for NUCLEO-F302R8.
3. STM32 GPIO for NUCLEO-G070RB, NUCLEO-G071RB, and NUCLEO-G0B1RE.
4. STM32 GPIO for NUCLEO-L412RB-P, NUCLEO-L433RC-P, and NUCLEO-L452RE-P.
5. STM32 for NUCLEO-G431RB, NUCLEO-G474RE, and NUCLEO-G491RE.
6. GPIO for NUCLEO-WL55JC.
7. GPIO for NUCLEO-WB55RG.
8. GPIO for NUCLEO-WB15CC.
System interface selection: 4-line 8-bit data SPI mode
Reset active low
SPI master in/slave out
SPI master out/slave in
SPI serial clock
SPI write enable
SPI chip select active high
Tearing effect output pin to synchronize MCU on frame writing
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5.3 SPI NOR flash memory (U1)
5.3.1 Description
The 64-Mbit SPI NOR flash memory is connected to a second SPI interface (SPIB) of the STM32 device and
can be used to store graphic objects. The use of a second SPI ensures optimum data transfer between the flash
memory and the LCD display.
In the case of the X-NUCLEO-GFX01M2 expansion board, for the Nucleo-64 boards that only support one single
SPI, the flash memory shares the same SPI as the LCD. Solder bridges are used to implement these two
configurations as shown in Table 4.
Table 4. X-NUCLEO-GFX01M2 SPI configuration
Interface SPI Solder bridge ON Solder bridge OFF
Flash memory SPI
1. The default dual-SPI configuration is shown in bold.
5.3.2 Operating voltage
The NOR flash memory is designed to operate only with a 3.3 V SPI interface.
SPIA (shared with the LCD) SB1, SB2, SB3 SB4, SB5, SB6
SPIB
UM2750
SPI NOR flash memory (U1)
(1)
SB4, SB5, SB6
(1)
SB1, SB2, SB3
(1)
5.3.3 I/O interface
Pin number Pin name Signal name STM32 GPIO Function
1 CS# SPIB_NCS_PB9_PB7
2 SO SPIB_MISO_PC2_PA6
3 WP# - - Write protection feature disabled
4 GND GND - Ground
5 SI SPIB_MOSI_PC3_PA12
6 SCLK SPIB_SCK_PB13_PA5
7 HOLD# - - Pause feature disabled
8 VCC 3V3 - 3.3 V power supply
1. STM32 GPIO for NUCLEO-F030R8, NUCLEO-F070RB, NUCLEO-F072RB, NUCLEO-F091RC, NUCLEO-F401RE,
NUCLEO-F410RB, NUCLEO-F411RE, NUCLEO-F446RE, NUCLEO-G071RB, NUCLEO-L053R8, NUCLEO-L073RZ,
NUCLEO-L452RE, and NUCLEO-L476RG.
2. STM32 GPIO for NUCLEO-L412RB-P, NUCLEO-L433RC-P, and NUCLEO-L452RE-P.
Table 5. X-NUCLEO-GFX01M1 I/O configuration of the NOR flash memory
(1)
PB9
PB7
PC2
PA6
PC3
PA12
PB13
PA5
(2)
(1)
(2)
(1)
(2)
(1)
(2)
SPI chip select active high
SPI master in/slave out
SPI master out/slave in
SPI serial clock
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UM2750
SPI NOR flash memory (U1)
Table 6. X-NUCLEO-GFX01M2 default I/O configuration of the NOR flash memory
Pin number Pin name Signal name STM32 GPIO Function
(1) (2) (3)
PA8
(4)
1 CS# SPIB_NCS
2 SO SPIB_MISO
3 WP# - - Write protection feature disabled
4 GND GND - Ground
5 SI SPIB_MOSI
6 SCLK SPIB_SCK
7 HOLD# - - Pause feature disabled
8 VCC 3V3 - 3.3 V power supply
1. STM32 GPIO for NUCLEO-F030R8, NUCLEO-F103RB, NUCLEO-F303RE, NUCLEO-G431RB, NUCLEO-G474RE,
NUCLEO-G491RE, and NUCLEO-L152RE.
2. STM32 GPIO for NUCLEO-F070RB, NUCLEO-F072RB, NUCLEO-F091RC, NUCLEO-F401RE, NUCLEO-F410RB,
NUCLEO-F411RE, NUCLEO-F446RE, NUCLEO-G070RB, NUCLEO-G071RB, NUCLEO-G0B1RE, NUCLEO-L053R8,
NUCLEO-L073RZ, NUCLEO-L452RE, and NUCLEO-L476RG.
3. STM32 GPIO for NUCLEO-F302R8.
4. STM32 GPIO for NUCLEO-L412RB-P, NUCLEO-L433RC-P, and NUCLEO-L452RE-P.
5. STM32 GPIO for NUCLEO-WL55JC.
6. STM32 GPIO for NUCLEO-WB55RG.
PC7
PC1
PC13
PB14
PC2
PC11
PB4
PB15
PC3
PB5
PA10
PB13
PB3
PA8
(5)
(6)
(1) (5) (6)
(2)
(3)
(4)
(1) (6)
(2)
(3) (4)
(5)
(1) (2) (6)
(3) (4)
(5)
SPI chip select active high
SPI master in/slave out
SPI master out/slave in
SPI serial clock
Table 7. X-NUCLEO-GFX01M2 single-SPI I/O configuration of the NOR flash memory
Pin number
1 CS# SPIB_NCS
2 SO SPIB_MISO
3 WP# - - Write protection feature disabled
4 GND GND - Ground
5 SI SPIB_MOSI
6 SCLK SPIB_SCK
7 HOLD# - - Pause feature disabled
8 VCC 3V3 - 3.3 V power supply
1. STM32 GPIO for NUCLEO-F334R8, and NUCLEO-L010RB.
2. STM32 GPIO for NUCLEO-WB15CC.
Pin name Signal name STM32 GPIO Function
PA8
PE4
PA6
PB4
PA7
PA5
(1)
(2)
(1)
(2)
(1) (2)
(1) (2)
SPI chip select active high
SPI master in/slave out
SPI master out/slave in
SPI serial clock
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5.4 Joystick (B1)
5.4.1 Description
The joystick (B1) allows the navigation within the menu displayed on the LCD.
5.4.2 I/O interface
Pin number Pin name Signal name STM32 GPIO Function
1 LEFT KEY_LEFT_PC9 PC9 Joystick left direction (active low)
2 CENTER KEY_CENTER_PC8 PC8 Joystick center (active low)
3 DOWN KEY_DOWN_PC10 PC10 Joystick down direction (active low)
4 UP KEY_UP_PC12 PC12 Joystick up direction (active low)
5 COMMON GND - Common connected to ground
6 RIGHT KEY_RIGHT_PC11 PC11 Joystick right direction (active low)
UM2750
Joystick (B1)
Table 8. X-NUCLEO-GFX01M1 I/O configuration of the joystick
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Page 14
UM2750
Joystick (B1)
Table 9. X-NUCLEO-GFX01M2 I/O configuration of the joystick
Pin number Pin name Signal name STM32 GPIO Function
(1) (2) (3)
PB6
(4)
PB0
1 LEFT KEY_LEFT
2 CENTER KEY_CENTER
3 DOWN KEY_DOWN
4 UP KEY_UP
5 COMMON GND - Common connected to ground
6 RIGHT KEY_RIGHT
1. STM32 GPIO for NUCLEO-F030R8, NUCLEO-F070RB, NUCLEO-F072RB, NUCLEO-F091RC, NUCLEO-F103RB,
NUCLEO-F303RE, NUCLEO-F334R8, NUCLEO-F401RE, NUCLEO-F410RB, NUCLEO-F411RE, NUCLEO-F446RE,
NUCLEO-L053R8, NUCLEO-L010RB, NUCLEO-L152RE, NUCLEO-L073RZ, NUCLEO-L452RE, and NUCLEO-L476RG.
2. STM32 GPIO for NUCLEO-F302R8.
3. STM32 for NUCLEO-G431RB, NUCLEO-G474RE, and NUCLEO-G491RE.
4. STM32 GPIO for NUCLEO-G070RB, NUCLEO-G071RB, and NUCLEO-G0B1RE.
5. STM32 GPIO for NUCLEO-L412RB-P, NUCLEO-L433RC-P, and NUCLEO-L452RE-P.
6. GPIO for NUCLEO-WL55JC.
7. GPIO for NUCLEO-WB55RG.
8. GPIO for NUCLEO-WB15CC.
PA11
PA4
PB2
PC7
PA8
PA9
PA15
PB4
PA15
PB8
PA11
PC0
PB12
PB13
PC2
PA3
PB0
PB1
PC2
PB4
PA0
(5)
(6) (7)
(8)
(1) (2) (4) (3)
(5)
(6) (7)
(8)
(1) (2) (4) (3)
(5) (7)
(6)
(8)
(1) (2) (5) (3)
(4)
(6)
(7)
(8)
(1) (2) (3)
(4)
(5)
(6)
(7) (8)
Joystick left direction (active low)
Joystick center (active low)
Joystick down direction (active low)
Joystick up direction (active low)
Joystick right direction (active low)
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Page 15
5.5 ST morpho connectors (CN2 and CN3)
5.5.1 Description
The ST morpho connectors allow the X-NUCLEO-GFX01Mx connection to a standard Nucleo-64 development
board.
5.5.2 I/O interface
Figure 6. Pinout of the X-NUCLEO-GFX01Mx ST morpho connectors
UM2750
ST morpho connectors (CN2 and CN3)
CN2
1 21
2
3837 3837
CN3
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UM2750
ST morpho connectors (CN2 and CN3)
Table 10. X-NUCLEO-GFX01M1 I/O configuration of ST morpho connector CN2
Pin number Pin name Signal name STM32 GPIO Function
1 DOWN KEY_DOWN_PC10
2 RIGHT KEY_RIGHT_PC11
3 UP KEY_UP_PC12
4 - 7 - - - Not connected
8 - - - Ground
9 - 15 - - - Not connected
16 - 3V3 - 3.3 V power supply
17 – 18 - - - Not connected
19 GND - - Ground
20 GND - - Ground
21 - - - Not connected
22 GND - - Ground
23 – 27 - - - Not connected
28 FMARK DISP_TE_PA0
29 - - - Not connected
30 RESET DISP_NRESET_PA1
31 – 34 - - - Not connected
35 SO SPIB_MISO_PC2_PA6
36 - - - Not connected
37 SI SPIB_MOSI_PC3_PA12
38 - - - Not connected
1. STM32 GPIO for NUCLEO-F030R8, NUCLEO-F070RB, NUCLEO-F072RB, NUCLEO-F091RC, NUCLEO-F401RE,
NUCLEO-F410RB, NUCLEO-F411RE, NUCLEO-F446RE, NUCLEO-G071RB, NUCLEO-L053R8, NUCLEO-L073RZ,
NUCLEO-L452RE, and NUCLEO-L476RG.
2. STM32 GPIO for NUCLEO-L412RB-P, NUCLEO-L433RC-P, and NUCLEO-L452RE-P.
PC10
PC11
PC12
PA0
PA1
PC2
PC3
(1) (2)
(1) (2)
(1) (2)
(1) (2)
(1) (2)
(1)
(1)
Joystick down direction (active low)
Joystick right direction (active low)
Joystick up direction (active low)
Display tearing effect output pin to synchronize MCU on
frame writing
Reset active low
Flash memory SPI master in/slave out
Flash memory SPI master out/slave in
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Page 17
UM2750
ST morpho connectors (CN2 and CN3)
Table 11. X-NUCLEO-GFX01M1 I/O configuration of ST morpho connector CN3
Pin number Pin name Signal name STM32 GPIO Function
1 LEFT KEY_LEFT_PC9
2 CENTER KEY_CENTER_PC8
3 – 4 - - - Not connected
5 CS# SPIB_NCS_PB9_PB7
6 - 8 - - - Not connected
9 GND - - Ground
10 - - - Not connected
11 RS/SCL SPIA_SCK_PA5_PB13
12 - - - Not connected
13 SDO SPIA_MISO_PA6_PB14
14 - - - Not connected
15 SDI SPIA_MOSI_PA7_PB15
16 - 19 - - - Not connected
20 GND - - Ground
21 – 25 - - - Not connected
26 SO SPIB_MISO_PC2_PA6
27 - - - Not connected
28 SCLK SPIB_SCK_PB13_PA5
29 CS SPIA_NCS_PB5_PB5
30 SCLK SPIB_SCK_PB13_PA5
31 WR SPIA_DCX_PB3_PB3
32 - - - Not connected
33 SI SPIB_MOSI_PC3_PA12
34 - 38 - - - Not connected
1. STM32 GPIO for NUCLEO-F030R8, NUCLEO-F070RB, NUCLEO-F072RB, NUCLEO-F091RC, NUCLEO-F401RE,
NUCLEO-F410RB, NUCLEO-F411RE, NUCLEO-F446RE, NUCLEO-G071RB, NUCLEO-L053R8, NUCLEO-L073RZ,
NUCLEO-L452RE, and NUCLEO-L476RG.
2. STM32 GPIO for NUCLEO-L412RB-P, NUCLEO-L433RC-P, and NUCLEO-L452RE-P.
PC9
PC8
PB9
PB7
PA5
PB13
PA6
PB14
PA7
PB15
PA6
PA5
PB5
PB13
PB3
PA12
(1) (2)
(1) (2)
(1)
(2)
(1)
(2)
(1)
(2)
(1)
(2)
(2)
(2)
(1) (2)
(1)
(1) (2)
(2)
Joystick left direction (active low)
Joystick center (active low)
Flash memory SPI chip select active high
Display SPI serial clock
Display SPI master in/slave out
Display SPI master out/slave in
Flash memory SPI master in/slave out
Flash memory SPI serial clock
Display SPI chip select active high
Flash memory SPI serial clock
Display SPI write enable
Flash memory SPI master out/slave in
UM2750 - Rev 3
Table 12. X-NUCLEO-GFX01M2 I/O configuration of ST morpho connector CN2
Pin number
1 - - - Not connected
2 SO SPIB_MISO
3 - 7 - - - Not connected
8 GND - - Ground
9 - 15 - - - Not connected
16 3V3 3V3 - 3.3 V power supply
Pin name Signal name STM32 GPIO Function
PC11
(3)
SPI master in/slave out
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UM2750
ST morpho connectors (CN2 and CN3)
Pin number Pin name Signal name STM32 GPIO Function
17 – 18 - - - Not connected
19 GND - - Ground
20 GND - - Ground
21 - - - Not connected
22 GND - - Ground
23 – 27 - - - Not connected
(1) (2) (3) (4) (5) (6) (7)
PA0
(8)
28 FMARK DISP_TE
PB1
PC0
PA4
(9)
(10)
29 - - - Not connected
(1) (2) (3) (4) (5) (6) (7)
PA1
(8)
30 RESET DISP_NRESET
PB2
PC1
PA6
(9)
(10)
31 - - - Not connected
32 SI SPIB_MOSI
PA10
(8)
33 - - - Not connected
(1) (2) (3) (4) (7)
PB0
(5)
PB1
34 RIGHT KEY_RIGHT
35 SO SPIB_MISO
36 SO SPIB_MISO
37 SI SPIB_MOSI
38 UP KEY_UP
(6)
PC2
(8)
PB4
(9) (10)
PA0
(2) (5)
PC2
(6)
PB4
(8)
PB14
(2) (5)
PC3
(1) (2) (3) (4) (7)
PC0
(5)
PB12
(6)
PC0
(8)
PB13
(9)
PC2
(10)
PA3
1. STM32 GPIO for NUCLEO-F030R8, NUCLEO-F103RB, NUCLEO-F303RE, and NUCLEO-L152RE.
2. STM32 GPIO for NUCLEO-F070RB, NUCLEO-F072RB, NUCLEO-F091RC, NUCLEO-F401RE, NUCLEO-F410RB,
NUCLEO-F411RE, NUCLEO-F446RE, NUCLEO-L053R8, NUCLEO-L073RZ, NUCLEO-L452RE, and NUCLEO-L476RG.
3. STM32 GPIO for NUCLEO-F302R8.
4. STM32 GPIO for NUCLEO-F334R8, and NUCLEO-L010RB.
5. STM32 GPIO for NUCLEO-G070RB, NUCLEO-G071RB, and NUCLEO-G0B1RE.
6. STM32 GPIO for NUCLEO-L412RB-P, NUCLEO-L433RC-P, and NUCLEO-L452RE-P.
7. STM32 GPIO for NUCLEO-G431RB, NUCLEO-G474RE, and NUCLEO-G491RE.
8. STM32 GPIO for NUCLEO-WL55JC.
9. STM32 GPIO for NUCLEO-WB55RG.
10. STM32 GPIO for NUCLEO-WB15CC.
Display tearing effect output pin to synchronize MCU on
frame writing
Reset active low
Flash memory SPI master out/slave in
Joystick right (active low)
SPI master in/slave out
SPI master in/slave out
Flash memory SPI master out/slave in
Joystick up (active low)
UM2750 - Rev 3
page 18/32
Page 19
ST morpho connectors (CN2 and CN3)
Table 13. X-NUCLEO-GFX01M2 I/O configuration of ST morpho connector CN3
Pin number Pin name Signal name STM32 GPIO Function
1 - 2 - - - Not connected
(1) (2) (3) (4) (5) (6) (7) (8) (9)
3 I2C_SCL I2C_SCL
4 - - - Not connected
5 I2C_SDA I2C_SDA
6 - 8 - - - Not connected
9 GND - - Ground
10 - - - Not connected
11 RS/SCL SPIA_SCK
12 - - - Not connected
13 SDO SPIA_MISO
14 - - - Not connected
15 SDI SPIA_MOSI
16 SCLK SPIB_SCK
17 LEFT KEY_LEFT
18 - - - Not connected
19 CENTER KEY_CENTER
20 GND - - Ground
21 CS SPIA_NCS
22 - - - Not connected
23 CS# SPIB_NCS
24 - - - Not connected
25 WR SPIA_DCX
26 SI SPIB_MOSI
PB8
(10)
PA12
(1) (2) (3) (4) (5) (7) (8) (9)
PB9
(6)
PB7
(10)
PA11
(1) (2) (4) (5) (7) (10) (8) (9)
PA5
(3) (6)
PB13
(1) (2) (4) (5) (7) (10) (8)
PA6
(3) (6)
PB14
(9)
PB4
(1) (2) (4) (5) (7) (10) (8) (9)
PA7
(3) (6)
PB15
(10)
PA8
(1) (2) (3) (4) (7)
PB6
(5)
PB12
(6)
PA11
(10) (8)
PA4
(9)
PB2
(1) (2) (3) (4) (5) (7)
PC7
(6)
PA8
(10) (8)
PA9
(9)
PA15
(1) (2) (3) (4) (5) (7)
PA9
(6)
PB6
(10)
PC2
(8)
PC12
(9)
PB5
(1) (2) (3) (4) (5) (7)
PA8
(6)
PC7
(10)
PC1
(8)
PC13
(9)
PE4
(1) (2) (3) (4) (6) (7) (10)
PB10
(5)
PB14
(8) (9)
PA8
(1) (7) (8)
PB15
Reserved for touch panel
Reserved for touch panel
Display SPI serial clock
Display SPI master in/slave out
Display SPI master out/slave in
Flash memory SPI serial clock
Joystick left (active low)
Joystick center (active low)
Display SPI chip select active high
Flash memory SPI chip select active high
Display SPI write enable
Flash memory SPI master out/slave in
UM2750
UM2750 - Rev 3
page 19/32
Page 20
UM2750
ST morpho connectors (CN2 and CN3)
Pin number Pin name Signal name STM32 GPIO Function
(1) (2) (3) (4) (5) (7)
PB4
(6) (8)
27 DOWN KEY_DOWN
28 SO SPIB_MISO
29 SI SPIB_MOSI
30 SCLK SPIB_SCK
31 SCLK SPIB_SCK
32 - - - Not connected
33 INT INT
34 - 38 - - - Not connected
1. STM32 GPIO for NUCLEO-F030R8, NUCLEO-F103RB, NUCLEO-F303RE, and NUCLEO-L152RE.
2. STM32 GPIO for NUCLEO-F070RB, NUCLEO-F072RB, NUCLEO-F091RC, NUCLEO-F401RE, NUCLEO-F410RB,
NUCLEO-F411RE, NUCLEO-F446RE, NUCLEO-L053R8, NUCLEO-L073RZ, NUCLEO-L452RE, and NUCLEO-L476RG.
3. STM32 GPIO for NUCLEO-F302R8.
4. STM32 GPIO for NUCLEO-F334R8, and NUCLEO-L010RB.
5. STM32 GPIO for NUCLEO-G070RB, NUCLEO-G071RB, and NUCLEO-G0B1RE.
6. STM32 GPIO for NUCLEO-L412RB-P, NUCLEO-L433RC-P, and NUCLEO-L452RE-P.
7. STM32 GPIO for NUCLEO-G431RB, NUCLEO-G474RE, and NUCLEO-G491RE.
8. STM32 GPIO for NUCLEO-WB55RG.
9. STM32 GPIO for NUCLEO-WB15CC.
10. STM32 GPIO for NUCLEO-WL55JC.
PA15
(10)
PB8
(9)
PA11
(1) (7) (8)
PB14
(3) (6)
PB5
(1) (2) (5) (7) (8)
PB13
(3) (6)
PB3
(1) (2) (3) (4) (5) (7)
PA10
(6)
PA12
(10)
PB12
(8)
PC6
(9)
PB0
Joystick down direction (active low)
SPI master in/slave out
Flash memory SPI master out/slave in
Flash memory SPI serial clock
Flash memory SPI serial clock
Reserved for touch panel
UM2750 - Rev 3
page 20/32
Page 21
6 Product information
6.1 Product marking
The stickers located on the top or bottom side of the PCB provide product information:
• Product order code and product identification for the first sticker
• Board reference with revision, and serial number for the second sticker
On the first sticker, the first line provides the product order code, and the second line the product identification.
On the second sticker, the first line has the following format: “MBxxxx-Variant-yzz”, where “MBxxxx” is the board
reference, “Variant” (optional) identifies the mounting variant when several exist, "y" is the PCB revision and "zz"
is the assembly revision, for example B01. The second line shows the board serial number used for traceability.
Evaluation tools marked as “ES” or “E” are not yet qualified and therefore not ready to be used as reference
design or in production. Any consequences deriving from such usage will not be at ST charge. In no event, ST will
be liable for any customer usage of these engineering sample tools as reference designs or in production.
“E” or “ES” marking examples of location:
• On the targeted STM32 that is soldered on the board (For an illustration of STM32 marking, refer to the
STM32 datasheet “Package information” paragraph at the www.st.com website).
• Next to the evaluation tool ordering part number that is stuck or silk-screen printed on the board.
6.2 X-NUCLEO-GFX01M1 product history
UM2750
Product information
6.2.1 Product identification XNGFX01M1$AZ1
This product identification is based on board MB1642-DT022CTFT-B01. The LCD used in this product is
DT022CTFT with driver IC ILI9341V.
Product limitations
No limitation identified for this product identification.
6.3 X-NUCLEO-GFX01M2 product history
6.3.1 Product identification XNGFX01M2$AZ1
This product identification is based on board MB1642-TCXD022IB5-D01. The LCD used in this product is
TCXD022IBLON-5 with driver IC ST7789V.
Product limitations
No limitation identified for this product identification.
6.3.2 Product identification XNGFX01M2$AZ2
This product identification is based on board MB1642-DT022CTFT-D01. The LCD used in this product is
DT022CTFT with driver IC ILI9341V.
Product limitations
No limitation identified for this product identification.
6.4 Board revision history
6.4.1 Board MB1642 revision B-01
The revision B-01 is the initial release of board MB1642 for product X-NUCLEO-GFX01M1.
Board limitations
No limitation identified for this board revision.
UM2750 - Rev 3
page 21/32
Page 22
6.4.2 Board MB1642 revision D-01
The revision D-01 is the initial release of board MB1642 for product X-NUCLEO-GFX01M2.
Board limitations
No limitation identified for this board revision.
UM2750
Board revision history
UM2750 - Rev 3
page 22/32
Page 23
Federal communications commission (FCC) and ISED Canada compliance statements for X-NUCLEO-GFX01M1
7 Federal communications commission (FCC) and ISED Canada
compliance statements for X-NUCLEO-GFX01M1
7.1 FCC Compliance Statement
Part 15.19
This device complies with Part 15 of the FCC Rules. Operation is subject to the following two conditions: (1)
this device may not cause harmful interference, and (2) this device must accept any interference received,
including interference that may cause undesired operation.
Part 15.21
Any changes or modifications to this equipment not expressly approved by STMicroelectronics may cause
harmful interference and void the user's authority to operate this equipment.
Part 15.105
This equipment has been tested and found to comply with the limits for a Class A digital device, pursuant to part
15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference
when the equipment is operated in a commercial environment. This equipment generates, uses, and can radiate
radio frequency energy and, if not installed and used in accordance with the instruction manual, may cause
harmful interference to radio communications. Operation of this equipment in a residential area is likely to cause
harmful interference in which case the user will be required to correct the interference at his own expense.
UM2750
7.2
Responsible party (in the USA)
Terry Blanchard
Americas Region Legal | Group Vice President and Regional Legal Counsel, The Americas
STMicroelectronics, Inc.
750 Canyon Drive | Suite 300 | Coppell, Texas 75019
USA
Telephone: +1 972-466-7845
ISED Compliance Statement
This device complies with FCC and ISED Canada RF radiation exposure limits set forth for general population for
mobile application (uncontrolled exposure). This device must not be collocated or operating in conjunction with
any other antenna or transmitter.
Compliance Statement
Notice: This device complies with ISED Canada licence-exempt RSS standard(s). Operation is subject to the
following two conditions: (1) this device may not cause interference, and (2) this device must accept any
interference, including interference that may cause undesired operation of the device.
ISED Canada ICES-003 Compliance Label: CAN ICES-3 (A) / NMB-3 (A).
Déclaration de conformité
Avis: Le présent appareil est conforme aux CNR d'ISDE Canada applicables aux appareils radio exempts
de licence. L'exploitation est autorisée aux deux conditions suivantes : (1) l'appareil ne doit pas produire de
brouillage, et (2) l'utilisateur de l'appareil doit accepter tout brouillage radioélectrique subi, même si le brouillage
est susceptible d'en compromettre le fonctionnement.
Étiquette de conformité à la NMB-003 d'ISDE Canada: CAN ICES-3 (A) / NMB-3 (A).
UM2750 - Rev 3
page 23/32
Page 24
8 CE conformity for X-NUCLEO-GFX01M1
8.1 Warning
EN 55032 / CISPR32 (2012) Class A product
Warning: this device is compliant with Class A of EN55032 / CISPR32. In a residential environment, this
equipment may cause radio interference.
Avertissement : cet équipement est conforme à la Classe A de la EN55032 / CISPR 32. Dans un environnement
résidentiel, cet équipement peut créer des interférences radio.
UM2750
CE conformity for X-NUCLEO-GFX01M1
UM2750 - Rev 3
page 24/32
Page 25
Federal communications commission (FCC) and ISED Canada compliance statements for X-NUCLEO-GFX01M2
9 Federal communications commission (FCC) and ISED Canada
compliance statements for X-NUCLEO-GFX01M2
9.1 FCC Compliance Statement
Part 15.19
This device complies with Part 15 of the FCC Rules. Operation is subject to the following two conditions: (1) this
device may not cause harmful interference, and (2) this device must accept any interference received, including
interference that may cause undesired operation.
Part 15.21
Any changes or modifications to this equipment not expressly approved by STMicroelectronics may cause
harmful interference and void the user's authority to operate this equipment.
Part 15.105
This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to part
15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference
in a residential installation. This equipment generates uses and can radiate radio frequency energy and, if not
installed and used in accordance with the instruction, may cause harmful interference to radio communications.
However, there is no guarantee that interference will not occur in a particular installation. If this equipment does
cause harmful interference to radio or television reception which can be determined by turning the equipment off
and on, the user is encouraged to try to correct interference by one or more of the following measures:
• Reorient or relocate the receiving antenna.
• Increase the separation between the equipment and receiver.
• Connect the equipment into an outlet on circuit different from that to which the receiver is connected.
• Consult the dealer or an experienced radio/TV technician for help.
Note: Use only shielded cables.
UM2750
9.2
Responsible party (in the USA)
Terry Blanchard
Americas Region Legal | Group Vice President and Regional Legal Counsel, The Americas
STMicroelectronics, Inc.
750 Canyon Drive | Suite 300 | Coppell, Texas 75019
USA
Telephone: +1 972-466-7845
ISED Compliance Statement
This device complies with FCC and ISED Canada RF radiation exposure limits set forth for general population for
mobile application (uncontrolled exposure). This device must not be collocated or operating in conjunction with
any other antenna or transmitter.
Compliance Statement
Notice: This device complies with ISED Canada licence-exempt RSS standard(s). Operation is subject to the
following two conditions: (1) this device may not cause interference, and (2) this device must accept any
interference, including interference that may cause undesired operation of the device.
ISED Canada ICES-003 Compliance Label: CAN ICES-3 (B) / NMB-3 (B).
Déclaration de conformité
Avis: Le présent appareil est conforme aux CNR d'ISDE Canada applicables aux appareils radio exempts
de licence. L'exploitation est autorisée aux deux conditions suivantes : (1) l'appareil ne doit pas produire de
brouillage, et (2) l'utilisateur de l'appareil doit accepter tout brouillage radioélectrique subi, même si le brouillage
est susceptible d'en compromettre le fonctionnement.
Étiquette de conformité à la NMB-003 d'ISDE Canada : CAN ICES-3 (B) / NMB-3 (B).
UM2750 - Rev 3
page 25/32
Page 26
10 CE conformity for X-NUCLEO-GFX01M2
10.1 Warning
EN 55032 / CISPR32 (2012) Class B product
Warning: this device is compliant with Class B of EN55032 / CISPR32. In a residential environment, this
equipment may cause radio interference.
Avertissement : cet équipement est conforme à la Classe B de la EN55032 / CISPR 32. Dans un environnement
résidentiel, cet équipement peut créer des interférences radio.
UM2750
CE conformity for X-NUCLEO-GFX01M2
UM2750 - Rev 3
page 26/32
Page 27
Revision history
Table 14. Document revision history
Date Revision Changes
26-Aug-2020 1 Initial release.
Extended the document scope to X-NUCLEO-GFX01M2 with more Nucleo-64
compatible boards:
• Updated title and Introduction
• Updated Features, Ordering information, and Demonstration software
• Updated SPI QVGA TFT LCD (LCD1) and added Table 3
• Updated SPI NOR flash memory (U1), and added Table 4, Table 6, and
20-Oct-2021 2
2-Mar-2022 3
Table 7
• Updated Joystick (B1) and added Table 9
• Updated ST morpho connectors (CN2 and CN3), and added Table 12
and Table 13
• Added Product information
• Added Federal Communications Commission (FCC) and ISED Canada
Compliance Statements for X-NUCLEO-GFX01M2 and CE conformity
for X-NUCLEO-GFX01M2
Added Product identification XNGFX01M2$AZ2 and updated the board
reference in Product identification XNGFX01M2$AZ1.
UM2750
UM2750 - Rev 3
page 27/32
Page 28
UM2750
Contents
Contents
1 Features...........................................................................2
2 Ordering information ..............................................................3
3 Development environment .........................................................4
3.1 Demonstration software .........................................................4
4 Quick start ........................................................................5
5 Hardware layout and configuration.................................................6
5.1 Power supply ..................................................................9
5.2 SPI QVGA TFT LCD (LCD1) .....................................................9
5.2.1 Description .............................................................9
5.2.2 Operating voltage ........................................................9
5.2.3 I/O interface ............................................................9
5.3 SPI NOR flash memory (U1) ....................................................11
5.3.1 Description ............................................................11
5.3.2 Operating voltage .......................................................11
5.3.3 I/O interface ...........................................................11
5.4 Joystick (B1) .................................................................13
5.4.1 Description ............................................................13
5.4.2 I/O interface ...........................................................13
5.5 ST morpho connectors (CN2 and CN3) ...........................................15
5.5.1 Description ............................................................15
5.5.2 I/O interface ...........................................................15
6 Product information ..............................................................21
6.1 Product marking ..............................................................21
6.2 X-NUCLEO-GFX01M1 product history............................................21
6.2.1 Product identification XNGFX01M1$AZ1 .....................................21
6.3 X-NUCLEO-GFX01M2 product history............................................21
6.3.1 Product identification XNGFX01M2$AZ1 .....................................21
6.3.2 Product identification XNGFX01M2$AZ2 .....................................21
6.4 Board revision history ..........................................................21
6.4.1 Board MB1642 revision B-01 ..............................................21
6.4.2 Board MB1642 revision D-01 ..............................................22
7 Federal communications commission (FCC) and ISED Canada compliance
statements for X-NUCLEO-GFX01M1 ..............................................23
7.1 FCC Compliance Statement ....................................................23
7.2 ISED Compliance Statement ....................................................23
UM2750 - Rev 3
page 28/32
Page 29
UM2750
Contents
8 CE conformity for X-NUCLEO-GFX01M1...........................................24
8.1 Warning .....................................................................24
9 Federal communications commission (FCC) and ISED Canada compliance
statements for X-NUCLEO-GFX01M2 ..............................................25
9.1 FCC Compliance Statement ....................................................25
9.2 ISED Compliance Statement ....................................................25
10 CE conformity for X-NUCLEO-GFX01M2...........................................26
10.1 Warning .....................................................................26
Revision history .......................................................................27
List of tables ..........................................................................30
List of figures..........................................................................31
UM2750 - Rev 3
page 29/32
Page 30
UM2750
List of tables
List of tables
Table 1. Ordering information..................................................................3
Table 2. X-NUCLEO-GFX01M1 I/O configuration of the LCD ............................................9
Table 3. X-NUCLEO-GFX01M2 I/O configuration of the LCD ...........................................10
Table 4. X-NUCLEO-GFX01M2 SPI configuration................................................... 11
Table 5. X-NUCLEO-GFX01M1 I/O configuration of the NOR flash memory................................. 11
Table 6. X-NUCLEO-GFX01M2 default I/O configuration of the NOR flash memory ...........................12
Table 7. X-NUCLEO-GFX01M2 single-SPI I/O configuration of the NOR flash memory .........................12
Table 8. X-NUCLEO-GFX01M1 I/O configuration of the joystick .........................................13
Table 9. X-NUCLEO-GFX01M2 I/O configuration of the joystick .........................................14
Table 10. X-NUCLEO-GFX01M1 I/O configuration of ST morpho connector CN2 .............................. 16
Table 11. X-NUCLEO-GFX01M1 I/O configuration of ST morpho connector CN3 .............................. 17
Table 12. X-NUCLEO-GFX01M2 I/O configuration of ST morpho connector CN2 .............................. 17
Table 13. X-NUCLEO-GFX01M2 I/O configuration of ST morpho connector CN3 .............................. 19
Table 14. Document revision history .............................................................27
UM2750 - Rev 3
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Page 31
UM2750
List of figures
List of figures
Figure 1. X-NUCLEO-GFX01Mx top view ........................................................1
Figure 2. X-NUCLEO-GFX01Mx bottom view ......................................................1
Figure 3. X-NUCLEO-GFX01Mx PCB layout: top side ................................................6
Figure 4. X-NUCLEO-GFX01Mx PCB layout: bottom side .............................................7
Figure 5. X-NUCLEO-GFX01Mx mechanical drawing ................................................8
Figure 6. Pinout of the X-NUCLEO-GFX01Mx ST morpho connectors ....................................15
UM2750 - Rev 3
page 31/32
Page 32
UM2750
IMPORTANT NOTICE – PLEASE READ CAREFULLY
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Information in this document supersedes and replaces information previously supplied in any prior versions of this document.
© 2022 STMicroelectronics – All rights reserved
UM2750 - Rev 3
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