Getting started with the X-NUCLEO-DRP1M1 USB Type-C™ Power Delivery
dual role port expansion board based on TCPP03-M20 for STM32 Nucleo
Introduction
The X-NUCLEO-DRP1M1 expansion board allows evaluating the features of TCPP03-M20 and the USB TypeC™ features and protections required for V
The expansion board can be stacked on top of any STM32 Nucleo-64 with Power Delivery (UCPD) peripheral
embedded in their microcontrollers.
The X-NUCLEO-DRP1M1 ef
ST715PU33R LDO linear regulator that supplies the connected STM32 Nucleo development board. It also
demonstrates USB Type-C™ Source operation when a compatible external Source is connected to the board.
Moreover, the expansion board allows Dual Role Data functionalities for sourcing devices.
The X-NUCLEO-DRP1M1 is compliant with the USB Type-C™ and Power Delivery specifications 3.1 standard
power range (SPR) and is USB-IF certified as a 100 W DRP solution supporting programmable power supply
(PPS).
The companion software package (X-CUBE-TCPP) contains the application examples for development boards
embedding UCPD-based microcontrollers (NUCLEO-G071RB and NUCLEO-G474RE) that can be ported to other
development boards embedding UCPD-based microcontrollers (for example, NUCLEO-G0B1RE).
fectively demonstrates the dead battery and Sink operation, thanks to the integrated
and CC lines suitable for dual role power (DRP) applications.
BUS
Figure 1. X-NUCLEO-DRP1M1 expansion board
UM2891 - Rev 4 - May 2022
For further information contact your local STMicroelectronics sales office.
www.st.com
Page 2
1Getting started
1.1Overview
The X-NUCLEO-DRP1M1 expansion board features:
Support for all USB Type-C™ Power Delivery SPR profiles up to 100 W
•
•Management of Dual Role Data/Power configuration
•USB 2.0 Dual Role Data compliant according to STM32 USB data capability
•8/20 μs surge, overvoltage, overcurrent protection and discharge for V
•Short to V
•ESD protection (IEC61000-4-2 level 4 ± 8 kV contact discharge) for CC1, CC2, D+ and D-
•Overvoltage, overcurrent protection and discharge for V
•Common mode filter on D+/D- data lines
•Three power modes to optimize current consumption
•Compliant with Programmable Power Supplies (PPS)
•Free comprehensive development firmware library
•Compliant with STM32 Nucleo-64 boards featuring an STM32 with UCPD
•USB-IF certified (test ID certification: 6408)
The X-NUCLEO-DRP1M1 interfaces three main blocks for USB Type-C™ Power Delivery dual role port (DRP):
•Type-C™ connector
•the power delivery controller embedded into the STM32 (UCPD) on the STM32 Nucleo development board
and
•the power management
It also provides USB 2.0 data line interface connection to the STM32 on the STM32 Nucleo development board.
The bill of materials has been optimized without compromising the protection:
•V
line: overvoltage, overcurrent and surge protections
BUS
•CC lines: overvoltage, overcurrent and ESD protections
•Data lines: ESD protection and EMI filtering
The embedded TCPP03-M20 features comply with the Power Delivery protocol:
•CC lines switch matrix for V
•V
•V
discharge
BUS
CONN
Fault mode report and three optimized power modes are also available.
All these features are managed through I²C communication.
V
current analog readout is also possible with STM32 ADC connected to the TCPP03-M20 differential
BUS
amplifier output.
protection for CC1 and CC2 configuration channel pins
BUS
discharge
UM2891
Getting started
BUS
CONN
CONN
UM2891 - Rev 4
page 2/26
Page 3
UCPD
STM32
Firmware
I2C
USB Type-C™
connector
V
BUS
Power bus
Provider path
CC1/CC2 lines
D+/D- lines
Configuration channels
N-MOSFET
SOURCE
N-MOSFET
SINK
Consumer path
USB 2.0
Data lines
Protections
NUCLEO board
X-NUCLEO-DRP1M1 board
ADC
TCPP03-M20
UM2891
Hardware architecture
Figure 2. X-NUCLEO-DRP1M1 board on top of STM32 Nucleo development board block diagram (full lines
4.ST715PU33R high input voltage LDO linear regulator (U2)
5.STL40DN3LLH5 dual N-channel 30 V, 0.016 Ohm, 11 A STripFET H5 Power MOSFET (Q1 and Q2)
6.Current sense shunt resistor
UM2891
Type-C™ connector
1.3Type-C™ connector
The USB Type-C™ receptacle (CN1) gathers the V
USB 2.0 data lines (DP
, DM), before dispatching data to the main functional blocks.
path and the main connections, such as CC lines and
BUS
UM2891 - Rev 4
page 5/26
Page 6
VBUS
GNDGND
GND
C1
330pF 50V
CN1
ConUSB31_632723300011_recept
CC1
A5
Dn1
A7
Dp1
A6
GND1
GND1
GND2
GND2
GND3
A1
GND5
A12
GND6
B12
SBU1
A8
SHELL1
SHELL1
SHELL2
SHELL2
SHELL3
SHELL3
SHELL4
SHELL4
SHELL5
SHELL5
SHELL6
SHELL6
SSRXn1
B10
SSRXn2
A10
SSRXp1
B11
SSRXp2
A11
SSTXn1
A3
SSTXp1
A2
VBUS1
A4
VBUS2
A9
VBUS4
B9
Dn2
B7
Dp2
B6
GND4
B1
SBU2
B8
SSTXn2
B3
SSTXp2
B2
VBUS3
B4
CC2
B5
C13
2.2uF 50V
C2
330pF 50V
TP3
TP1
TP5
TP4
TP2
D1
ESDA25P35-1U1M
CC1c
CC2c
UM2891
USB 2.0 data path and configuration settings
Figure 5. T
ype-C™ receptacle (CN1) and ESDA25P35-1U1M TVS diode (D1)
An ESDA25P35-1U1M TVS diode (D1) has been integrated to protect the V
entire system against electrical over-stress (EOS) when a Source/Sink is connected through the USB-C cable.
330 pF C1 and C2 capacitors and 2.2 µF C13 capacitor are required by the USB Power Delivery standard.
C13 capacitor also ensures a good system robustness.
1.4USB 2.0 data path and configuration settings
The X-NUCLEO-DRP1M1 expansion board allows STM32 Nucleo
peripheral to expose the D+/D- lines on the Type-C™ receptacle (CN1).
Most STM32 Nucleo-64 development boards feature this functionality on the ST morpho connector CN10-12 and
CN10-14 pins, whereas NUCLEO-L412RB-P, NUCLEO-L433RC-P, NUCLEO-L452RE-P and NUCLEO-L476RG
boards map USB2.0 data pins on CN10-33 and CN10-17 pins.
Two couples of resistances has been implemented and connected to the ECMF02-2AMX6 (U3) USB2.0 data lines
protection to extend the use of this peripheral to all STM32 Nucleo-64 development boards.
Figure 6. USB2.0 data lines protection ECMF02-2AMX6 (U3) and resistor setup
By default, the X-NUCLEO-DRP1M1 mounts R19 and R20 resistors fitted to guarantee USB2.0 compatibility to
all the main microcontroller families, but, for the L4 family (NUCLEO-L412RB-P, NUCLEO-L433RC-P, NUCLEO-
L452RE-P and NUCLEO-L476RG) only
, they must be removed and replaced by SH11 and SH13 solder bridges.
1.5ST morpho and Arduino V3 connectors
The figure below shows the X-NUCLEO-DRP1M1 expansion board ST morpho and Arduino UNO V3 connectors,
detailing the main connections, functions, and configuration settings.
Figure 7. ST morpho and Arduino V3 connectors
UM2891 - Rev 4
CC lines are connected to the UCPD connection of the ST morpho connectors (CN7, CN10). Two configurations
are possible according to the ST morpho connectors on the STM32 Nucleo development board. T
on the STM32, unused lines can be disconnected by removing R26/R25 or R24/R27.
TCPP03-M20 (U1) FLGN pin corresponds to an STM32 wake-up pin to optimize power consumption when no
Type-C™ cable is connected. TCPP03-M20 OFF/hibernate/low power modes can be used with STM32 sleeping
modes. STM32 is then woken up when a voltage is present on V
TCPP03-M20 ENABLE pin is managed by an STM32 GPIO. Consumption is almost null in hibernate mode (only
the I2C interface dynamic current consumption occurs when using the I2C bus).
o limit pin count
thanks to the FLGN pin.
BUS
page 7/26
Page 8
ADC_VBUSc
R9
40.2k
C12
NM
R8
200k
UM2891
I2C bus
1.6
I2C bus
An I2C communication is implemented between the STM32 Nucleo
TCPP03-M20 (U1) slave port through SCL and SDA pins.
TCPP03-M20 I2C default address is 0x68. It can be changed to 0x6A by closing SH16 solder bridge and
unsoldering R28; level high is then connected to TCPP03-M20 I2C_ADD pin.
I2C pull-up 1 kΩ resistors (R11 and R12) are present on the X-NUCLEO-DRP1M1.
development board master port and the
1.7Voltage/current analog sense connection to STM32 ADC
The X-NUCLEO-DRP1M1
•ADC_VBUSc: measures voltage on V
vSafe0V measurement)
•ADC_Prov: for information on the provider path voltage
•ADC_Cons: for information on the consumer path voltage
Voltage dividers (ratio 6) are compatible with 24 V DC voltages.
features three voltage senses connected to the STM32 ADC:
; it is mandatory to ensure system operation (as example, for
BUS
Figure 8. V
voltage sense for STM32 ADC
BUS
The X-NUCLEO-DRP1M1 implements the analog current sense output of TCPP03-M20 (U1, IANA pin) and
connects it to the STM32 ADC (ADC_Isense).
The TCPP03-M20 has an internal dif
mΩ). As the current measurement is bi-directional, it is functional for both Source and Sink.
Capacitor footprints (C9, C10, C11 and C12) have been added for potential filtering on analog senses.
1.8Consumer and provider path
UM2891 - Rev 4
Consumer and provider path can be connected to V
Q2) controlled by TCPP03-M20 gate drivers (U1- GDCs, GDCg, GDPs, and GDPg pins).
ferential amplifier (42 V/V) which measures the current flowing though R5 (7
thanks to two dual STL40DN3LLH5
BUS
N-MOSFETs (Q1 and
page 8/26
Page 9
Figure 9. Consumer and provider path
3.3V
GND
GND
GND
GND
GND
GND
SINK
SOURCE
ADC_Cons
ADC_Prov
FLGN
R1
200k
D9
NM
R2
40.2k
R3
200k
CN2
1725656
1
2
R4
40.2k
C9
NM
C8
NM
Q2B
STL40DN3LLH5
D
5
G
4
3
S
Q1A
STL40DN3LLH5
D
7
G
2
1
S
CN3
1725656
1
2
Q2A
STL40DN3LLH5
D
7
G
2
1
S
R10
47K
D10
NM
U1
TCPP03-M20
ENABLE
FLGn
19
SCL
18
SDA
17
I2C_ADD
CC1c
15
CBIAS
14
CC2c
13
GND
12
VSENSE
11
ISENSE
10
VBUSc
9
GDCs
8
GDCg
7
GDPs
6
GDPg
5
IANA
CC2
VCC / VCONN
2
CC1
exp pad GND
21
C7
NM
C10
NM
Q1B
STL40DN3LLH5
D
5
G
4
3
S
CC1c
CC2c
UM2891
Consumer and provider path
When TCPP03-M20 is OFF and, by default, at turn-on, the consumer path is closed in order to power the system
Note:TCPP03-M20 does not allow Q1 and Q2 closed at the same time to avoid any provider and consumer
when the battery is fully depleted.
connection.
V
oltage presence on the provider and consumer path is indicated by a LED (D7 blue on the provider path and
D6 red on the consumer path). These LEDs does not indicate the N-MOSFET state. For example, source LED
D5 can be ON indicating voltage presence on the provider path but Q2 can be OFF without connection of the
UM2891 - Rev 4
provider path on V
You can access the consumer path and provider path thanks to CN2 and CN3 screw connectors. Additional
protections (transient or free wheel diode) can be added on D9 and D10 footprints compatible with the ESDAP
series (from ESDA7P120-1U1M to ESDA25P35-1U1M).
Inrush current is managed by the TCPP03-M20 gate driver charge pump output current associated to
STL40DN3LLH5 drain to gate MOSFET capacitance (also called Miller capacitance or reverse transfer
capacitance). This association avoids any potential parasitic OCP triggering due to inrush current generated
by cSnkBulk (between 1 µF and 10 µF) as defined by the USB power delivery standard.
When another MOSFET reference is used, C7 and C8 external capacitors can be associated to other MOS
references to avoid an OCP trigger due to inrush current, if the drain-to-gate capacitance is too low. The effective
drain to gate capacitance including C7 and C8 must be higher than 20 pF.
When a higher cSnkBulk capacitance is used, Q1 or Q2 must be closed slower and the C7 or C8 capacitor must
be mounted and selected with 100 pF to every additional 10 µF on the cSnkBulk terminal.
.
BUS
page 9/26
Page 10
UM2891
VBUS and CC lines over-current protection
You can use several Q1 and Q2 MOSFET references with various tradeoffs on the key parameters: the size
for the PCB surface, R
drain-source voltage when the surge is clamped by the TVS diode (D1).
The dual Q1 MOSFET (back-to-back configuration) is required if the voltage is maintained on the consumer path
when there is no V
BUS
The dual Q2 MOSFET (back-to-back configuration) is mandatory on the provider path to avoid V
the provider path when sinking.
Order codeN-MOSFETPackage
STL6N3LLH6SinglePowerFLAT 2x2Single island32 mΩ30 V
STL11N3LLH6SinglePowerFLAT 3.3x3.3Single island8.4 mΩ30 V
STL260N4LF7SinglePowerFLAT 5x6Single island1.2 mΩ40 V
STL40DN3LLH5DualPowerFLAT 5x6Dual island20 mΩ30 V
STL105DN4LF7AGDualPowerFLAT 5x6Dual island5.3 mΩ40 V
for the static drain-source on-resistance insertion losses and VDS for the maximum
DS(on)
voltage.
BUS
Table 1. N-MOSFET performance tradeoff
R
typ.VDS max.
DS(on)
leakage on
1.9V
R5 terminal voltage (voltage between TCPP03-M20 and ISENSE) is used for TCPP03-M20 overcurrent protection
on V
opened.
TCPP03-M20 protects CC1 and CC2 lines against overcurrent (OCP on CC turn-on at 47 mA), in case of
overcurrent when V
When overcurrent fault is detected:
•FLGN falls
•Register 2 is updated
•Recovery word is mandatory to get back to operational system. Recovery words are:
The recovery word erases the error register (register 2) but does not connect consumer or the provider path to
V
and CC lines over-current protection
BUS
. When this voltage is higher than 0.042 V, OCP turns on and the consumer and provider paths are
–0x18 written on I2C register 0 to return to normal mode
–0x28 written on I2C register 0 to return to low power mode
–0x08 written on I2C register 0 to return to hibernate mode
BUS
nor V
: the corresponding bits must be written to close switch(es) on an additional step.
CONN
1.10V
TCPP03-M20 V
M20 (U1) VSENSE pin. When the voltage on VSENSE pin is above 1.16 V
and provider paths are opened and register 2 is updated.
On the X-NUCLEO-DRP1M1 expansion board, the resistor connected to V
threshold can be adjusted thanks to the resistor connected to GND. R13 to R17 resistors can be selected with R0,
SH2, SH3, SH4 and SH5.
UM2891 - Rev 4
and CC lines overvoltage protection
BUS
overvoltage protection (OVP) threshold is set by a resistive bridge connected to the TCPP03-
BUS
, V
, OVP turns on, the consumer
BUS
(R6) is set to 10 kΩ. OVP
BUS
page 10/26
Page 11
GND
Vsense
R17
2.4k
R16
1.3k
R0
0
SH2
R15 976
R14
732
SH5
R13
560
SH4
SH3
Vbus Max
22 V
17 V
13 V
10 V
6 V
P Max
100 W
45 W
36 W
27 W
15 W
UM2891
LDO
R0, selected by default, sets the OVP threshold to 22 V. To select another threshold value, R0 must be removed
and the solder bridge that corresponds to the selected voltage must be filled.
When a defective power source plugged onto the T
selected OVP threshold, the TCPP03-M20 OVP mechanism controls the external MOSFET and opens the V
line.
ype-C™ connector produces a voltage higher than the
BUS
Figure 10. V
OVP setting resistors
BUS
TCPP03-M20 protects CC1 and CC2 lines against overvoltage (OVP on CC turn-on at 5.75 V).
When a defective cable is unplugged from the T
V
short to CC lines (adjacent lines) and apply a voltage higher than the one specified by STM32 ARM on CC
BUS
ype-C™ connector with a voltage higher than 5 V can produce a
line (FT IO). The TCPP03-M20 OVP on CC lines protects the STM32 as well.
1.11LDO
ST715PU33R (U2) is a 3.3 V high input voltage LDO. It is supplied by two input voltages: provider path and
consumer path. BA
voltage.
To supply the system through LDO output, JP1 must be closed with:
•jumper between 1 – 2 to connect 3.3 V output voltage to the system 3.3 V
•jumper between 3 – 4 to force STM32 NRST pin to 3.3 V (otherwise it would be HZ with potential parasitic
D8 LED signals the 3.3 V presence on X-NUCLEO-DRP1M1.
reset)
T54KFILM diodes (D4 and D5) select the highest available voltage and block the other
UM2891 - Rev 4
page 11/26
Page 12
High input voltage
85 mA LDO linear regulator
GND
GNDGND
3.3V
GND
NRST
SOURCE
SINK
R23
1k
R22
4k
D8
LED green
U2ST715PU33R
IN
1
9
Exp Pad GND
OUT
8
NC1
2
NC2
3
GND
4
NC3
7
NC4
6
FB
5
D5
BAT54KFILM
JP1
TSW-102-07-F-D
12
34
D6
LED red
D4
BAT54KFILM
R21
4k
C5
100n 25V
1
2
C6
470n 5V
1
2
D7
LED blue
3. 3 V
Consumer
Provider
1.12TCPP03-M20
3.3V
GND
GND
3.3V3.3V
CC1
CC2
I2C1_SDA
ENABLE
I2C_ADD
Vsense
I2C1_SCL
FLGN
R29
NM
R6
10k
C3
100n 50V
R12
1K
R11
1K
R10
47K
U1
TCPP03-M20
ENABLE
20
FLGn
19
SCL
18
SDA
17
I2C_ADD
16
CC1c
15
CBIAS
14
CC2c
13
GND
12
VSENSE
11
ISENSE
10
VBUSc
9
GDCs
8
GDCg
7
GDPs
6
GDPg
5
IANA
4
CC2
3
VCC / VCONN
2
CC1
1
exp pad GND
21
CC1c
CC2c
3.3 V is connected to TCPP03-M20 VCC/V
According to the USB-PD standard, V
this voltage range.
All TCPP03-M20 I/Os connected to the STM32 are 3.3 V and 1.8 V compliant (FLGn, ENABLE, IANA, SDA,
SLC), except CC1 and CC2 I/O in which they are in accordance with USB-PD standard voltages. I2C_ADD is also
3.3 V and 1.8 V compliant.
TCPP03-M20 ENABLE pin is connected to the STM32 GPIO but it can also be connected directly to 3.3 V
through R29 resistor.
CBIAS pin (C3) is the TCPP03-M20 ESD capacitor. Its value must be 100 nF or higher and 50 V rated to limit
voltage de-rating.
Figure 11. LDO configuration
pin. It supplies the IC and provides the input voltage for V
CONN
voltage can be between 3.0 and 5.5 V
CONN
. VCC/V
is compatible with
CONN
UM2891
TCPP03-M20
.
CONN
Figure 12. TCPP03-M20
UM2891 - Rev 4
page 12/26
Page 13
2STM32 resources
STM32 resources provided to TCPP03-M20 are 1.8 V and 3.3 V compatible. This allows using 1.8 V STM32 by
a slight change on the voltage divider bridge connected to ADC (R2, R4 and R9 resistors decreased to 20 k
obtaining a divider ratio of 11).
Some resources are needed on the STM32 to start a USB Power Delivery dual role port (DRP):
•UCPD peripheral to manage USB Power Delivery protocol
•I2C bus that can be shared with other slaves
•ADC to get the V
To optimize power consumption on battery powered systems, two additional GPIO can be used:
•when attaching the cable, TCPP03-M20 needs to be switched from hibernate mode (Sink only) or low
power mode (Sink to Source toggling) to normal mode. Wake-up GPIO connected to TCPP03-M20 FLGn
pin triggers STM32 to activate useful resources, fully enabling TCPP03-M20. If not used, leave FLGn pin
unconnected
•TCPP03-M20 ENABLE pin supplies the I2C interface. It consumes current for I2C requests not addressed to
TCPP03-M20 (dynamic current consumption). In hibernate mode, this current consumption can be disabled
by setting the ENABLE pin to 0. If not used, leave the ENABLE pin connected to 3.3 V or 1.8 V.
Other resources are:
•USB 2.0 peripheral
•ADC to get consumer and provider path voltages as well as current on V
voltage image
BUS
BUS
UM2891
STM32 resources
Ω,
images
Table 3. X-NUCLEO-DRP1M1 - STM32 resources
STM32 resource
UCPD CC1XUSB-PD CC
UCPD CC2XUSB-PD CC
I2C SCLX
I2C SDAX
GPIO FlgnXSTM32 wake up GPIO
ADC VbuscX
ADC ProviderXProvider path voltage info
ADC ConsumerXConsumer path voltage info
ADC IsenseX
GPIO ENABLEX
USB D+XUSB 2.0 data line
USB D-XUSB 2.0 data line
USB-PD minimal
resources
USB-PD low
power
resources
Additional
features
X-NUCLEO-DRP1M1 associated connection
I2C bus clock
I2C bus data
V
voltage info
BUS
Current on V
VDD via GPIO for low power
BUS
for PPS
UM2891 - Rev 4
page 13/26
Page 14
3Demo application setup
The X-NUCLEO-DRP1M1 expansion board flexibility allows demonstrating the TCPP03-M20 protection features
and capabilities with a wide range of STM32 Nucleo development boards with UCPD peripheral on the STM32
MCU.
The X-CUBE-TCPP
featuring USB Type-C™ and Power Delivery management (NUCLEO-G071RB, NUCLEO-G474RE and NUCLEO-
G0B1RE).
3.1STM32G474RE application example overview
This application example shows how to start battery-powered DRP applications with TCPP03-M20 and
STM32G474RE using X-NUCLEO-DRP1M1 expansion board stacked on a NUCLEO-G474RE development
board.
There are two modes:
1.Programming mode:
–STM32G474RE is powered by ST-LINK
–STM32G474RE power supply is always present as ST-LINK power line is connected
2.System validation:
–STM32G474RE is powered by:
◦the battery (5 V voltage power supply)
◦the Type-C™ connector (USB Type-C™ wall charger)
When the battery is empty and no source is attached to the Type-C™ connector, the STM32G474RE is
not powered:
◦STM32G474RE cannot be programmed as ST-LINK does not supply the system
◦STM32CubeMonUCPD is still working when the ST-LINK is connected
These two modes cannot be merged as the STM32 NRST pin is managed by 3.3 V coming from ST-LINK. If
ST-LINK is not powered, STM32 NRST pin becomes HZ and might generate parasitic resets.
companion software package contains dedicated application examples for the STM32 Nucleo
or
UM2891
Demo application setup
Figure 13. Power path of X-NUCLE-DRP1M1 stacked on top NUCLEO-G474RE
Power path:
•Consumer (yellow dotted lines)
•Provider (green dotted lines)
•STM32G474RE powered by ST-LINK (light grey line)
•STM32G474RE powered by the system (pink line)
UM2891 - Rev 4
page 14/26
Page 15
Programming/debugging example for STM32G474RE
3.2Programming/debugging example for STM32G474RE
3.2.1Hardware configuration
Step 1.Add no jumper on the X-NUCLEO-DRP1M1
Step 2.On the NUCLEO-G474RE, add:
–5V_STLINK jumper on JP5 to select 5 V from ST-LINK USB as power source for STM32G474RE
–1-2 jumper on JP8 to select 5 V as reference voltage initiator
Step 3.Connect a USB type A to micro-USB cable to the NUCLEO-G474RE development board.
3.2.2Software programming/monitoring
Step 1.Drag and drop G4_DRP1M1_DRP
Step 2.Monitor with STM32CubeMonUCPD.
3.2.3Applicative use cases
1.Battery working (5 V source connected on the Source connector) and Sink device connected to the Type-
C™ connector:
–
Sink device can be a smartphone, USB key, hardware drive, accessory, etc.
–Sink device is being supplied and STM32CubeMonUCPD indicates 5 V and the associated current
–3.3 V LED on, Source LED on
2.Battery working (5 V source connected on the Source connector) and Source device connected to the
Type-C™ connector:
–Source device (for example, a wall adapter) presents its highest voltage available on the Source
indicated by STM32CubeMonUCPD
–3.3 V LED on, Source LED on, Sink LED on
3.Battery empty (no source connected to the Source connector) and no Source device is connected to the
Type-C™ connector:
–ST-LINK used to program STM32G474RE powers the MCU continuously
–3.3 V LED on, while it should be off
4.Battery empty (no source connected on the Source connector) and a Source device is connected to the
Type-C™ connector:
–Source device (for example, a wall adapter) presents its highest voltage available on the Source
indicated by STM32CubeMonUCPD
–3.3 V LED on, Source LED off, Sink LED on
.bin to the NUCLEO-G474RE node (or use an IDE for programming).
expansion board.
UM2891
3.3STM33G474RE system validation
3.3.1Hardware configuration
Step 1.On the X-NUCLEO-DRP1M1, add two jumpers on JP1:
LDO OUT 3.3 V and NRS 3.3 V to power STM32G474RE with 3.3 V LDO output.
Step 2.On the NUCLEO-G474RE add:
–
no jumper on JP5
–2-3 jumper to JP8 to select 3.3 V as reference voltage initiator
Step 3.Connect a USB type A to micro-USB cable to the NUCLEO-G474RE development board.
3.3.2Software configuration
Step 1.Monitor with STM32CubeMonUCPD.
UM2891 - Rev 4
page 15/26
Page 16
3.3.3Applicative use cases
1.Battery working (5 V source connected on the Source connector) and Sink device connected to the Type-
C™ connector:
–
Sink device can be a smartphone, USB key, hardware drive, accessory, etc.
–Sink device is being supplied and STM32CubeMonUCPD indicates 5 V and the associated current
–3.3 V LED on, Source LED on
2.Battery working (5 V source connected on the Source connector) and Source device connected to the
Type-C™ connector:
–Source device (for example, a wall adapter) presents its highest voltage available on the Source
indicated by STM32CubeMonUCPD
–3.3 V LED on, Source LED on, Sink LED on
3.Battery empty (no source connected to the Source connector) and no Source device is connected to the
Type-C™ connector:
–all LEDs are off
4.Battery empty (no source connected on the Source connector) and a Source device is connected to the
Type-C™ connector:
–Source device (for example, a wall adapter) presents its highest voltage available on the Source
indicated by STM32CubeMonUCPD
–3.3 V LED on, Sink LED on
UM2891
STM33G474RE system validation
UM2891 - Rev 4
page 16/26
Page 17
VBUS
3.3V
GNDGND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
3.3V3.3V
CC1
CC2
I2C1_SDA
ENABLE
I2C_ADD
DP
DP_other
DM
CC1_G4
Vsense
I2C1_SCL
SINK
SOURCE
ADC_Cons
ADC_Prov
ADC_VBUSc
ADC_Isense
FLGN
R9
40.2k
R1
200k
D9
NM
R2
40.2k
R3
200k
CN2
1725656
1
2
C1
330pF 50V
CN1
ConUSB31_632723300011_recept
CC1
A5
Dn1
A7
Dp1
A6
GND1
GND1
GND2
GND2
GND3
A1
GND5
A12
GND6
B12
SBU1
A8
SHELL1
SHELL1
SHELL2
SHELL2
SHELL3
SHELL3
SHELL4
SHELL4
SHELL5
SHELL5
SHELL6
SHELL6
SSRXn1
B10
SSRXn2
A10
SSRXp1
B11
SSRXp2
A11
SSTXn1
A3
SSTXp1
A2
VBUS1
A4
VBUS2
A9
VBUS4
B9
Dn2
B7
Dp2
B6
GND4
B1
SBU2
B8
SSTXn2
B3
SSTXp2
B2
VBUS3
B4
CC2
B5
C12
NM
R4
40.2k
C13
2.2uF 50V
C9
NM
R29
NM
C8
NM
Q2B
STL40DN3LLH5
D
5
G
4
3
S
R6
10k
C2
330pF 50V
Q1A
STL40DN3LLH5
D
7
G
2
1
S
CN3
1725656
1
2
R30
0
C3
100n 50V
R12
1K
ESD
ESDESD
ESD
U3
ECMF02-2AMX6
2
D-
3
GND
4
NC
5
D-1
6
D+1
1
D+
Q2A
STL40DN3LLH5
D
7
G
2
1
S
SH11
R8
200k
R19 0
R11
1K
R10
47K
R5
0.007
TP3
D10
NM
U1
TCPP03-M20
ENABLE
20
FLGn
19
SCL
18
SDA
17
I2C_ADD
16
CC1c
15
CBIAS
14
CC2c
13
GND
12
VSENSE
11
ISENSE
10
VBUSc
9
GDCs
8
GDCg
7
GDPs
6
GDPg
5
IANA
4
CC2
3
VCC / VCONN
2
CC1
1
exp pad GND
21
C7
NM
C10
NM
Q1B
STL40DN3LLH5
D
5
G
4
3
S
TP1
SH13
TP5
TP4
TP2
C11
NM
R20 0
D1
ESDA25P35-1U1M
CC1c
CC1c
CC2c
CC2c
D+D+ecmf
D-D-ecmf
Isense
90 ohms
ZDiff
90 ohms
ZDiff
UM2891 - Rev 4
4Schematic diagrams
Figure 14. X-NUCLEO-DRP1M1 schematic diagram (1 of 3)
Figure 13. Power path of X-NUCLE-DRP1M1 stacked on top NUCLEO-G474RE .............................14
Figure 14. X-NUCLEO-DRP1M1 schematic diagram (1 of 3) ........................................... 17
Figure 15. X-NUCLEO-DRP1M1 schematic diagram (2 of 3) ........................................... 18
Figure 16. X-NUCLEO-DRP1M1 schematic diagram (3 of 3) ........................................... 19
ype-
UM2891 - Rev 4
page 25/26
Page 26
UM2891
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