Rail-to-rail High Output Current Quad Operational Amplifier
■ Rail-to-rail input and output
■ Low noise: 9nV/√Hz
■ Low distortion
■ High output current: 80mA
(able to drive 32Ω loads)
■ High-speed: 4MHz, 1.3V/µs
■ Operating from 2.7V to 12V
■ Low input offset voltage: 900µV max (TS924A)
■ ESD Internal protection: 3kV
■ Latch-up immunity
■ Macromodel included in this specification
Description
TS924
N
DIP14
(Plastic Package)
D
SO-14
(Plastic Micropackage)
The TS924 is a rail-to-rail quad BiCMOS
operational amplifier optimized and fully specified
for 3V and 5V operation.
High output current allows low load impedances to
be driven.
The TS924 exhibits a very low noise, low
distortion, low offset and high output current
capability making this device an excellent choice
for high quality, low voltage or battery operated
audio systems.
The device is stable for capacitive loads up to
500pF.
Applications
■ Headphone amplifier
■ Piezoelectric speaker driver
■ Sound cards
■ MPEG boards, multimedia systems,...
P
TSSOP14
(Thin Shrink Small Outline Package)
Pin connection (top view)
Output 1
Inverting Input 1
Non-inverting Input 1
V
CC
Non-inverting Input 2
Inverting Input 2
Output 2
1
2
-
+
3
+
4
5
+
-
6
7
+
+
14
13
-
12
11
10
9
8
Output 4
Inverting Input 4
Non-inverting Input 4
-
V
CC
Non-inverting Input 3
Inverting Input 3
Output 3
■ Line driver, buffer
■ Cordless telephones and portable
communication equipment
■ Instrumentation with low noise as key factor
Rev 4
November 2005 1/14
www.st.com
14
Order Codes
TS924
Part Number
TS924IN
TS924AIN TS924AIN
TS924ID/IDT
TS924AID/AIDT 924AI
TS924IPT
TS924AIPT 924AI
TS924IYD/IYDT
TS924AIYD/AIYDT 924AIY
TS924IYPT
TS924IAIYPT 924AIY
Temperature
Range
-40°C, +125°C
Package Packaging Marking
DIP14 Tube
SO-14 Tube or Tape & Reel
TSSOP14
(Thin Shrink Outline Package)
SO-14 (automotive grade level) Tube or Tape & Reel
TSSOP14 (automotive grade level) Tape & Reel
Tape & Reel
TS924IN
924I
924I
924IY
924IY
2/14
TS924 Absolute Maximum Ratings
1 Absolute Maximum Ratings
Table 1. Key parameters and their absolute maximum ratings
Symbol Parameter Value Unit
(3)
(1)
(2)
14 V
±1 V
V
-0.3 to VCC+0.3
DD
103
°C/W
V
Vid
T
R
Supply voltage
CC
Differential Input Voltage
V
Input Voltage
i
Storage Temperature -65 to +150 °C
stg
T
Maximum Junction Temperature 150 °C
j
Thermal Resistance Junction to Ambient
DIP14
thja
SO14 66
TSSOP14 100
ESD
HBM: Human Body Model
MM: Machine Model
(5)
(4)
3kV
100 V
CDM: Charged Device Model 1 kV
Output Short Circuit Duration
see note
(6)
Latch-up Immunity 200 mA
Soldering Temperature (10sec), leaded version 250 °C
Soldering Temperature (10sec), unleaded version 260 °C
1. All voltages values, except differential voltage are with respect to network ground terminal.
2. Differential voltages are the non-inverting input terminal with respect to the inverting input terminal. If Vid > ±1V,
the maximum input current must not exceed ±1mA. In this case (Vid > ±1V) an input serie resistor must be
added to limit input current.
3. Do not exceed 14V.
4. Human body model, 100pF discharged through a 1.5kΩ resistor into pin of device.
5. Machine model ESD, a 200pF cap is charged to the specified voltage, then discharged directly into the IC with
no external series resistor (internal resistor < 5Ω), into pin to pin of device.
6. There is no short-circuit protection inside the device: short-circuits from the output to V
heating. The maximum output current is approximately 80mA, independent of the magnitude of Vcc.
Destructive dissipation can result from simultaneous short-circuits on all amplifiers.
can cause excessive
cc
V
Table 2. Operating conditions
Symbol Parameter Value Unit
V
V
T
Supply voltage 2.7 to 12 V
CC
V
Common Mode Input Voltage Range
icm
Operating Free Air Temperature Range -40 to +125 °C
oper
-0.2 to VCC +0.2
DD
V
3/14
Electrical Characteristics TS924
2 Electrical Characteristics
Table 3. V
= +3V, VDD = 0V, V
CC
= VCC/2, T
icm
= 25°C, RL connected to VCC/2 (unless
amb
otherwise specified)
Symbol Parameter Min. Typ. Max. Unit
Input Offset Voltage - TS924
TS924A
V
io
T
≤ T
min.
amb
≤ T
max.
- TS924
TS924A
DV
Input Offset Voltage Drift 2 µV/°C
io
Input Offset Current
I
io
Vout = Vcc/2 1 30
Input Bias Current
I
ib
Vout = Vcc/2
15 100
High Level Output Voltage
R
= 100k
V
OH
L
R
= 600Ω
L
R
= 32Ω
L
2.90
2.87
2.63
Low Level Output Voltage
R
= 10k
V
OL
A
I
cc
GBP
L
R
= 600Ω
L
R
= 32Ω
L
Large Signal Voltage Gain (V
R
= 10k
L
vd
R
= 600Ω
L
R
= 32Ω
L
Total Supply Current
no load, V
out
= V
Gain Bandwidth Product
R
= 600Ω
L
cc/2
= 2Vpk-pk)
out
180
200
35
16
4.5 7
4
CMR Common Mode Rejection Ratio 60 80 dB
3
0.9
5
1.8
50
100
mV
mV
V/mV
mA
MHz
nA
nA
V
SVR
Supply Voltage Rejection Ratio - V
I
Output Short Circuit Current 50 80 mA
o
cc
SR Slew Rate 0.7 1.3 V/µs
φm
G
m
e
n
THD
C
s
Phase Margin at Unit Gain - R
Gain Margin - RL = 600Ω, CL =100pF
Equivalent Input Noise Voltage - f = 1kHz 9
Total Harmonic Distortion
= 2Vpk-pk, F = 1kHz, Av = 1, RL =600Ω
V
out
Channel Separation 120 dB
= 600Ω, CL =100pF
L
4/14
= 2.7 to 3.3V
60 85 dB
68 Degrees
12 dB
nV
-----------Hz
0.005
%
TS924 Electrical Characteristics
Table 4. VCC = +5V, VDD = 0V, V
= VCC/2, T
icm
= 25°C, RL connected to VCC/2 (unless
amb
otherwise specified)
Symbol Parameter Min. Typ. Max. Unit
Input Offset Voltage - TS924
TS924A
V
io
T
≤ T
min.
amb
≤ T
max.
- TS924
TS924A
DV
Input Offset Voltage Drift 2 µV/°C
io
Input Offset Current
I
io
Vout = Vcc/2 1 30
Input Bias Current
I
ib
Vout = Vcc/2
15 100
High Level Output Voltage
R
= 100k
V
OH
L
R
= 600Ω
L
R
= 32Ω
L
4.90
4.85
4.4
Low Level Output Voltage
R
= 10k
V
OL
A
I
cc
GBP
L
R
= 600Ω
L
R
= 32Ω
L
Large Signal Voltage Gain (V
R
= 10k
L
vd
R
= 600Ω
L
R
= 32Ω
L
Total Supply Current
no load, V
out
= V
Gain Bandwidth Product
= 600Ω
R
L
cc/2
= 2Vpk-pk)
out
300
200
40
17
4.5 7
4
CMR Common Mode Rejection Ratio 60 80 dB
3
0.9
5
1.8
50
120
mV
nA
nA
mV
V/mV
mA
MHz
V
SVR
Supply Voltage Rejection Ratio
V
= 3V to 5V
cc
I
Output Short Circuit Current 50 80 mA
o
60 85
dB
SR Slew Rate 0.7 1.3 V/µs
Phase Margin at Unit Gain
φm
G
m
e
n
THD
C
s
R
= 600Ω, CL =100pF
L
68
Gain Margin
R
= 600Ω, CL =100pF
L
Equivalent Input Noise Voltage
f = 1kHz
12
9
Total Harmonic Distortion
V
= 2Vpk-pk, F = 1kHz, Av = 1, RL =600Ω
out
0.005
Channel Separation 120 dB
Degrees
dB
nV
------------
%
Hz
5/14
Electrical Characteristics TS924
Figure 1. Output short circuit current vs.
output voltage
100
80
60
40
20
0
-20
-40
Output Short-Circuit Current (mA)
-60
-80
-100
024681012
Sink
Vcc=0/12V
Source
Output Voltage (V)
Figure 3. Voltage gain and phase vs.
frequency
CL=500pF
=±1.5V
V
CC
Phase
Gain
Figure 2. Output short circuit current vs.
output voltage
100
80
60
40
20
0
-20
-40
Output Short -Circuit Current (mA)
-60
-80
-100
0 0,5 1 1,5 2 2,5 3
Sink
Vcc=0/3V
Source
Output Voltage (V)
Figure 4. Output short circuit current vs.
output voltage
100
80
60
40
20
0
-20
-40
Output Shor t-Circ uit Current (mA)
-60
-80
-100
012345
Sink
Vcc=0/5V
Source
Output Voltage (V)
Figure 5. Voltage gain & phase vs. frequency Figure 6. THD + noise vs. frequency
RL=10κ
=100pF
C
L
=±1.5V
V
CC
Phase
Gain
6/14
RL=2k Vo=10Vpp
=±6V Av= -1
V
CC
TS924 Electrical Characteristics
Figure 7. THD + noise vs. frequency Figure 8. THD + noise vs. frequency
RL=2k Vo=10Vpp
V
=±6V Av= 1
CC
RL=32Ω Vo=2Vpp
=±1.5V Av= 10
V
CC
Figure 9. THD + noise vs. Vout Figure 10. THD + noise vs. frequency
RL=32Ω f=1kHz
VCC=±1.5V Av= -1
RL=32Ω Vo=4Vpp
=±2.5V Av= 1
V
CC
Figure 11. THD + noise vs. Vout Figure 12. THD + noise vs. Vout
RL=2kΩ f=1kHz
=±1.5V Av= -1
V
CC
7/14
Macromodel TS924
3 Macromodel
3.1 Important note concerning this macromodel
Please consider following remarks before using this macromodel.
● All models are a trade-off between accuracy and complexity (i.e. simulation time).
● Macromodels are not a substitute to breadboarding; rather, they confirm the validity of a
design approach and help to select surrounding component values.
● A macromodel emulates the NOMINAL performance of a TYPICAL device within
SPECIFIED OPERATING CONDITIONS (i.e. temperature, supply voltage, etc.). Thus the
macromodel is often not as exhaustive as the datasheet, its goal is to illustrate the main
parameters of the product.
● Data issued from macromodels used outside of its specified conditions (Vcc, Temperature,
etc.) or even worse: outside of the device operating conditions (Vcc, Vicm, etc.) are not
reliable in any way.
Section 3.3
In
, the electrical characteristics resulting from the use of these macromodels are
presented.
3.2 Electrical characteristics from macromodelization
Table 5. Electrical characteristics resulting from macromodel simulation at VCC = 3V,
V
= 0V, RL, CL connected to V
DD
Symbol Conditions Value Unit
V
io
A
vd
I
CC
V
icm
V
OH
V
OL
I
sink
I
source
GBP
SR
φm
RL = 10kΩ
No load, per operator 1.2 mA
RL = 10kΩ
RL = 10kΩ
VO = 3V
VO = 0V
= 600kΩ
R
L
R
= 10kΩ, CL = 100pF
L
R
= 600kΩ
L
CC/2
, T
= 25°C (unless otherwise specified)
amb
200 V/mV
-0.2 to 3.2 V
2.95 V
0mV
25 mV
80 mA
80 mA
4MHz
1V/µs
68 Degrees
8/14
TS924 Macromodel
3.3 Macromodel code
** Standard Linear Ics Macromodels, 1996.
** CONNECTIONS:
* 1 INVERTING INPUT
* 2 NON-INVERTING INPUT
* 3 OUTPUT
* 4 POSITIVE POWER SUPPLY
* 5 NEGATIVE POWER SUPPLY
.SUBCKT TS92X 1 2 3 4 5
*
.MODEL MDTH D IS=1E-8 KF=2.664234E-16 CJO=10F
*
* INPUT STAGE
CIP 2 5 1.000000E-12
CIN 1 5 1.000000E-12
EIP 10 5 2 5 1
EIN 16 5 1 5 1
RIP 10 11 8.125000E+00
RIN 15 16 8.125000E+00
RIS 11 15 2.238465E+02
DIP 11 12 MDTH 400E-12
DIN 15 14 MDTH 400E-12
VOFP 12 13 DC 153.5u
VOFN 13 14 DC 0
IPOL 13 5 3.200000E-05
CPS 11 15 1e-9
DINN 17 13 MDTH 400E-12
VIN 17 5 -0.100000e+00
DINR 15 18 MDTH 400E-12
VIP 4 18 0.400000E+00
FCP 4 5 VOFP 1.865000E+02
FCN 5 4 VOFN 1.865000E+02
FIBP 2 5 VOFP 6.250000E-03
FIBN 5 1 VOFN 6.250000E-03
* GM1 STAGE ***************
FGM1P 119 5 VOFP 1.1
FGM1N 119 5 VOFN 1.1
RAP 119 4 2.6E+06
RAN 119 5 2.6E+06
* GM2 STAGE ***************
G2P 19 5 119 5 1.92E-02
G2N 19 5 119 4 1.92E-02
R2P 19 4 1E+07
R2N 19 5 1E+07
**************************
VINT1 500 0 5
GCONVP 500 501 119 4 19.38
VP 501 0 0
GCONVN 500 502 119 5 19.38
VN 502 0 0
9/14
Macromodel TS924
********* orientation isink isource *******
VINT2 503 0 5
FCOPY 503 504 VOUT 1
DCOPYP 504 505 MDTH 400E-9
VCOPYP 505 0 0
DCOPYN 506 504 MDTH 400E-9
VCOPYN 0 506 0
***************************
F2PP 19 5 poly(2) VCOPYP VP 0 0 0 0 0.5
F2PN 19 5 poly(2) VCOPYP VN 0 0 0 0 0.5
F2NP 19 5 poly(2) VCOPYN VP 0 0 0 0 1.75
F2NN 19 5 poly(2) VCOPYN VN 0 0 0 0 1.75
* COMPENSATION ************
CC 19 119 25p
* OUTPUT ***********
DOPM 19 22 MDTH 400E-12
DONM 21 19 MDTH 400E-12
HOPM 22 28 VOUT 6.250000E+02
VIPM 28 4 5.000000E+01
HONM 21 27 VOUT 6.250000E+02
VINM 5 27 5.000000E+01
VOUT 3 23 0
ROUT 23 19 6
COUT 3 5 1.300000E-10
DOP 19 25 MDTH 400E-12
VOP 4 25 1.052
DON 24 19 MDTH 400E-12
VON 24 5 1.052
.ENDS ;TS92X
10/14
TS924 Package Mechanical Data
4 Package Mechanical Data
In order to meet environmental requirements, ST offers these devices in ECOPACK® packages.
These packages have a Lead-free second level interconnect. The category of second level
interconnect is marked on the package and on the inner box label, in compliance with JEDEC
Standard JESD97. The maximum ratings related to soldering conditions are also marked on
the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at:
www.st.com
4.1 DIP14 Package
.
Plastic DIP-14 MECHANICAL DATA
DIM.
a1 0.51 0.020
B 1.39 1.65 0.055 0.065
b 0.5 0.020
b1 0.25 0.010
D 20 0.787
E 8.5 0.335
e 2.54 0.100
e3 15.24 0.600
F 7.1 0.280
I 5.1 0.201
L 3.3 0.130
Z 1.27 2.54 0.050 0.100
MIN. TYP MAX. MIN. TYP. MAX.
mm. inch
P001A
11/14
Package Mechanical Data TS924
4.2 SO-14 package
SO-14 MECHANICAL DATA
DIM.
A 1.75 0.068
a1 0.1 0.2 0.003 0.007
a2 1.65 0.064
b 0.35 0.46 0.013 0.018
b1 0.19 0.25 0.007 0.010
C 0.5 0.019
c1 45˚ (typ.)
D 8.55 8.75 0.336 0.344
E 5.8 6.2 0.228 0.244
e 1.27 0.050
e3 7.62 0.300
F 3.8 4.0 0.149 0.157
G 4.6 5.3 0.181 0.208
L 0.5 1.27 0.019 0.050
M 0.68 0.026
S˚ (max.)
MIN. TYP MAX. MIN. TYP. MAX.
mm. inch
8
12/14
PO13G
TS924 Package Mechanical Data
4.3 TSSOP14 package
TSSOP14 MECHANICAL DATA
DIM.
A 1.2 0.047
A1 0.05 0.15 0.002 0.004 0.006
A2 0.8 1 1.05 0.031 0.039 0.041
b 0.19 0.30 0.007 0.012
c 0.09 0.20 0.004 0.0089
D 4.9 5 5.1 0.193 0.197 0.201
E 6.2 6.4 6.6 0.244 0.252 0.260
E1 4.3 4.4 4.48 0.169 0.173 0.176
e 0.65 BSC 0.0256 BSC
K0˚ 8˚0˚ 8˚
L 0.45 0.60 0.75 0.018 0.024 0.030
A
MIN. TYP MAX. MIN. TYP. MAX.
A2
b
A1
mm. inch
e
c
K
L
E
PIN 1 IDENTIFICATION
D
E1
1
0080337D
13/14
Revision History TS924
5 Revision History
Date Revision Changes
May 2001 1 First Release
May 2005 2
Modifications on AMR
Table 1 on page 3
limits, ESD MM and CDM values added, Rthja added)
(explanation of Vid and Vi
July 2005 3 PPAP references inserted in the datasheet see
– Package mechanical data modified
Nov. 2005 4
– TS924IYPT/TS924AYIPT PPAP reference inserted in
page 2
.
– Macromodel modified
Table on page 2
Table on
.
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is
granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are
subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products
are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
The ST logo is a registered trademark of STMicroelectronics.
All other names are the property of their respective owners
© 2005 STMicroelectronics - All rights reserved
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14/14
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