Rail-to-rail high output current dual operational amplifier
Features
■ Rail-to-rail input and output
■ Low noise: 9nV/√Hz
■ Low distortion
■ High output current: 80mA
(able to drive 32Ω loads)
■ High-speed: 4MHz, 1V/μs
■ Operating from 2.7V to 12V
■ Low input offset voltage: 900μV max (TS922A)
■ ESD internal protection: 2kV
■ Latch-up immunity
■ Macromodel included in this specification
■ Dual version available in flip-chip package
Applications
■ Headphone amplifier
■ Sound cards, multimedia systems
■ Line driver, actuator driver
■ Servo amplifier
■ Mobile phone and portable equipment
■ Instrumentation with low noise as key factor
■ Piezoelectric speaker driver
TS922
J
(Flip-chip)
N
DIP8
(Plastic package)
D
SO-8
(Plastic micropackage)
P
TSSOP8
(Thin shrink small outline package)
Description
The TS922 is a rail-to-rail dual BiCMOS
The device is stable for capacitive loads up to
500pF.
operational amplifier optimiz ed and f u lly sp ecif ied
for 3V and 5V operation.
The device’s high output current allows low-load
impedances to be driven.
Very low noise, low distortion, low offset and a
high output current capability make this device an
excellent choice for high quality, low voltage or
battery operated audio systems.
November 2007 Rev 7 1/22
www.st.com
22
TS922 Pin diagrams
1 Pin diagrams
Figure 1. Pin connections (top view)
Output 1
Inverting Input 1
Non-inverting Input 1
V
1
2
-
+
3
45
CC
Figure 2. Pinout for flip-chip package (top view)
OUT2 -IN2 +IN2
OUT2 -IN2 +IN2
-
-
+
+
VCC+
VCC+
+
+
-
-
+
V
8
CC
Output 2
7
-
+
Inverting Input 2
6
Non-inverting Input 2
GND
GND
+IN1-IN1OUT1
+IN1-IN1OUT1
3/22
Absolute maximum ratings and operating conditions TS922
2 Absolute maximum ratings and operating conditions
Table 1. Absolute maximum ratings (AMR)
Symbol Parameter Value Unit
(3)
(1)
(6)
(2)
(5)
(7)
(4)
(4)
14 V
±1 V
VDD-0.3 to VCC+0.3 V
125
120
°C/W
85
90
40
37
°C/W
41
2000
100
1500
(8)
V
V
CC
V
id
V
in
T
stg
R
thja
R
thjc
T
ESD
Supply voltage
Differential input voltage
Input voltage
Storage temperature -65 to +150 °C
Thermal resistance junction to ambient
SO-8
TSSOP8
DIP8
Flip-chip
Thermal resistance junction to case
SO-8
TSSOP8
DIP8
Maximum junction temperature 150 °C
j
HBM: human body model
MM: machine model
CDM: charged device model
Output short circuit duration see note
Latch-up immunity 200 mA
Soldering temperature (10sec), leaded version
Soldering temperature (10sec), unleaded version
1. All voltage values, except differential voltage are with respect to network ground terminal.
2. Differential voltages are the non-inverting input terminal with respect to the inverting input terminal. If
V
> ±1V, the maximum input current must not exceed ±1mA. In this case (Vid > ±1V), an input series
id
resistor must be added to limit input current.
3. Do not exceed 14V.
4. Short-circuits can cause excessive heating. Destructive dissipation can result from simultaneous shortcircuits on all amplifiers. These values are typical.
5. Human body model: A 100pF capacitor is charged to the specified voltage, then discharged through a
1.5kΩ resistor between two pins of the device. This is done for all couples of connected pin combinations
while the other pins are floating.
6. Machine model: A 200pF capacitor is charged to the specified voltage, then discharged directly between
two pins of the device with no external series resistor (internal resistor < 5Ω). This is done for all couples of
connected pin combinations while the other pins are floating.
7. Charged device model: all pins and the package are charged together to the specified voltage and then
discharged directly to the ground through only one pin. This is done for all pins.
8. There is no short-circuit protection inside the device: short-circuits from the output to V
excessive heating. The maximum output current is approximately 80mA, independent of the magnitude of
V
. Destructive dissipation can result from simultaneous short-circuits on all amplifiers.
CC
250
260
can cause
CC
°C
4/22
TS922 Absolute maximum ratings and operating conditions
Table 2. Operating conditions
Symbol Parameter Value Unit
T
V
V
Supply voltage 2.7 to 12 V
CC
Common mode input voltage range VDD -0.2 to VCC +0.2 V
icm
Operating free air temperature range -40 to +125 °C
oper
5/22
Electrical characteristics TS922
3 Electrical characteristics
Table 3. Electrical characteristics measured at VCC = +3V, VDD = 0V, V
T
= 25°C, and RL connected to VCC/2 (unless otherwise specified)
amb
= VCC/2,
icm
Symbol Parameter Test conditions Min. Typ. Max. Unit
V
Input offset voltage
io
DV
V
V
Input offset voltage drift 2 μV/°C
io
I
Input offset current
io
Input bias current
I
ib
High level output voltage
OH
Low level output voltage
OL
A
Large signal voltage gain
vd
I
Total supply current
CC
GBP Gain bandwidth product R
CMR Common mode rejection ratio
SVR Supply voltage rejection ratio
Output short circuit current 50 80 mA
I
o
TS922
TS922A
TS922IJ (flip-chip)
T
min
≤ T
amb
≤ T
max
TS922
TS922A
TS922IJ (flip-chip)
= VCC/2
V
out
≤ T
≤ T
≤ T
≤ T
≤ T
≤ T
≤ T
≤ T
≤ T
amb
amb
amb
amb
amb
amb
amb
amb
amb
≤ T
≤ T
≤ T
≤ T
≤ T
≤ T
out
≤ T
out
≤ T
out
= VCC/2
out
≤ T
max
max
max
max
max
max
= 2V
max
= 2V
max
= 2V
max
2.90
2.90
2.87
2.87
p-p
70
p-p
15
p-p
T
min
= VCC/2
V
out
T
min
= 10kΩ
R
L
T
min
R
= 600Ω
L
T
min
= 32Ω 2.63 V
R
L
R
= 10kΩ
L
T
min
= 600Ω
R
L
T
min
= 32Ω 180 mV
R
L
= 10kΩ, V
R
L
T
min
= 600Ω, V
L
T
min
R
= 32Ω, V
L
No load, V
T
min
= 600Ω 4MHz
L
60
≤ T
T
min
V
= 2.7 to 3.3V
CC
T
≤ T
min
amb
amb
≤ T
≤ T
max
max
56
60
60
130
15 100
200
35
16
23
80
85
3
0.9
1.5
5
1.8
2.5
30
100
50
50
100
100
3.2
mV
mV
mV
V/mVR
mA
SR Slew rate 0.7 1.3 V/μs
nA
nA
V
V
dB
dB
6/22
TS922 Electrical characteristics
φm Phase margin at unit gain R
G
Gain margin RL = 600Ω, CL =100pF 12 dB
m
Equivalent input noise voltage f = 1kHz 9
e
n
= 600Ω, CL =100pF 68 Degrees
L
7/22
Electrical characteristics TS922
Table 4. Electrical characteristics measured at VCC = 5V, VDD = 0V, V
T
= 25°C, and RL connected to VCC/2 (unless otherwise specified)
amb
= VCC/2,
icm
Symbol Parameter Conditions Min. Typ. Max. Unit
V
Input offset voltage
io
DV
V
V
Input offset voltage drift 2 μV/°C
io
I
Input offset current
io
Input bias current
I
ib
High level output voltage
OH
Low level output voltage
OL
A
Large signal voltage gain
vd
I
Total supply current
cc
GBP Gain bandwidth product R
CMR
Common mode rejection
ratio T
SVR Supply voltage rejection ratio
Output short circuit current 50 80 mA
I
o
TS922
TS922A
TS922IJ (flip-chip)
T
min
≤ T
amb
≤ T
max
TS922
TS922A
TS922IJ (flip-chip)
= VCC/2
V
out
≤ T
≤ T
≤ T
≤ T
≤ T
≤ T
≤ T
≤ T
≤ T
amb
amb
amb
amb
amb
amb
amb
amb
amb
≤ T
≤ T
≤ T
≤ T
≤ T
≤ T
out
≤ T
out
≤ T
out
= VCC/2
out
≤ T
max
max
max
max
max
max
= 2V
max
= 2V
max
= 2V
max
4.9
4.9
4.85
4.85
p-p
70
p-p
20
p-p
T
min
= VCC/2
V
out
T
min
= 10kΩ
R
L
T
min
= 600Ω
L
T
min
= 32Ω 4.4
R
L
R
= 10kΩ
L
T
min
= 600Ω
L
T
min
= 32Ω 300
R
L
= 10kΩ, V
R
L
T
min
R
= 600Ω, V
L
T
min
R
= 32Ω, V
L
No load, V
T
min
= 600Ω 4MHz
L
60
≤ T
min
V
= 4.5 to 5.5V
CC
T
≤ T
min
amb
amb
≤ T
≤ T
max
max
56
60
60
130
15 100
200
35
16
23
80
85
3
0.9
1.5
5
1.8
2.5
30
100
50
50
120
120
3.2
mV
nA
nA
mVR
V/mV
mA
dB
dB
SR Slew rate 0.7 1.3 V/μs
VR
8/22
TS922 Electrical characteristics
Table 4. Electrical characteristics measured at V
φm Phase margin at unit gain R
G
Gain margin RL = 600Ω, CL =100pF 12 dB
m
Equivalent input noise
e
n
voltage
THD Total harmonic distortion V
Channel separation 120 dB
C
s
= 600Ω, CL =100pF 68 Degrees
L
f = 1kHz 9
= 2V
out
, f= 1kHz, Av= 1, RL=600Ω 0.005 %
p-p
9/22
Electrical characteristics TS922
100
O
S
C
C
(
)
Figure 3. Output short circuit current vs.
output voltage
80
60
mA
40
urrent
20
0
ircu it
-20
hort-
-40
utput
-60
-80
-100
00,511,522,53
Sink
Vcc=0/3V
Source
Output V ol t age (V)
Figure 4. Total supply current vs. supply
voltage
10/22
TS922 Electrical characteristics
)
(
)
Figure 9. THD + noise vs. frequency Figure 10. THD + noise vs. output voltage
0.7
0.6
0.5
0.4
0.3
THD+Noise (%)
0.2
0.1
0
0.01 0.1 1 10 100
RL=32Ω Vo=2Vpp
V
CC
=±1.5V Av= 10
Frequency (kHz)
10,000
1,000
%
0,100
THD+Noise
0,010
0,001
0 0,2 0,4 0,6 0,8 1 1,2
RL=600Ω f=1kHz
V
=0/3V Av= -1
CC
Vout (Vrms
Figure 11. THD + noise vs. output voltage Figure 12. THD + noise vs. output voltage
10
10
1
1
THD+Noise (%)
0.1
RL=32Ω f=1kHz
V
=±1.5V Av= -1
CC
0.1
THD+Nois e (%)
0.01
RL=2kΩ f=1kHz
V
=±1.5V Av= -1
CC
0.01
0 0.2 0.4 0.6 0.8 1
Vout (Vrms)
Figure 13. Open loop gain and phase vs.
frequency
50
40
30
Gain (dB)
20
10
0
1E+2 1E+3 1E+4 1E+5 1E+6 1E+7 1E+8
CL=500pF
Frequency (Hz)
0.001
0 0.2 0.4 0.6 0.8 1 1.2
180
120
Phase (Deg)
60
0
Vout (Vrms)
11/22
Macromodel TS922
4 Macromodel
4.1 Important note concerning this macromodel
Please consider the following remarks before using this macromodel.
● All models are a trade-off between accuracy and complexity (i.e. simulation time).
● Macromodels are not a substitute to breadboarding; rather, they confirm the valid ity of
a design approach and help to select surrounding component values.
● A macromodel emulates the nominal p erf ormance of a typical de vice within specified
operating conditions (temperature, supply voltage, for e xample). Thus the
macromodel is often not as exhaustive as the datasheet, its purpose is to illustrate the
main parameters of the product.
Data derived from macromodels used outside of the specified conditions (V
for example) or even worse, outside of the device operating conditions (V
CC
example), is not reliable in any way.
Section 4.2 provides the electrical characteristics resulting from th e u se of t his macro model.
4.2 Electrical characteristics from macromodelization
Table 5. Electrical characteristics resulting from macromodel simulation at
V
=3V, VDD = 0V, RL, CL connected to VCC/2, T
CC
otherwise specified)
Symbol Conditions Value Unit
V
io
A
vd
I
CC
V
icm
V
OH
V
OL
I
sink
I
source
GBP R
SR R
φmR
RL = 10kΩ 200 V/mV
No load, per operator 1.2 mA
RL = 10kΩ 2.95 V
RL = 10kΩ 25 mV
VO = 3V 80 mA
VO = 0V 80 mA
= 600kΩ 4MHz
L
= 10kΩ, CL = 100pF 1.3 V/μs
L
= 600kΩ 68 Degrees
L
= 25°C (unless
amb
0mV
-0.2 to 3.2 V
, temperature,
CC
, V
, for
icm
12/22
TS922 Macromodel
4.3 Macromodel code
** Standard Linear Ics Macromodels, 1996.
** CONNECTIONS:
* 1 INVERTING INPUT
* 2 NON-INVERTING INPUT
* 3 OUTPUT
* 4 POSITIVE POWER SUPPLY
* 5 NEGATIVE POWER SUPPLY
*
.SUBCKT TS92X 1 2 3 4 5
*
.MODEL MDTH D IS=1E-8 KF=2.664234E-16 CJO=10F
*
* INPUT STAGE
CIP 2 5 1.000000E-12
CIN 1 5 1.000000E-12
EIP 10 5 2 5 1
EIN 16 5 1 5 1
RIP 10 11 8.125000E+00
RIN 15 16 8.125000E+00
RIS 11 15 2.238465E+02
DIP 11 12 MDTH 400E-12
DIN 15 14 MDTH 400E-12
VOFP 12 13 DC 153.5u
VOFN 13 14 DC 0
IPOL 13 5 3.200000E-05
CPS 11 15 1e-9
DINN 17 13 MDTH 400E-12
VIN 17 5 -0.100000e+00
DINR 15 18 MDTH 400E-12
VIP 4 18 0.400000E+00
FCP 4 5 VOFP 1.865000E+02
FCN 5 4 VOFN 1.865000E+02
FIBP 2 5 VOFP 6.250000E-03
FIBN 5 1 VOFN 6.250000E-03
* GM1 STAGE ***************
FGM1P 119 5 VOFP 1.1
FGM1N 119 5 VOFN 1.1
RAP 119 4 2.6E+06
RAN 119 5 2.6E+06
* GM2 STAGE ***************
G2P 19 5 119 5 1.92E-02
G2N 19 5 119 4 1.92E-02
R2P 19 4 1E+07
R2N 19 5 1E+07
**************************
VINT1 500 0 5
GCONVP 500 501 119 4 19.38
VP 501 0 0
GCONVN 500 502 119 5 19.38
VN 502 0 0
13/22
Macromodel TS922
********* orientation isink isource *******
VINT2 503 0 5
FCOPY 503 504 VOUT 1
DCOPYP 504 505 MDTH 400E-9
VCOPYP 505 0 0
DCOPYN 506 504 MDTH 400E-9
VCOPYN 0 506 0
***************************
F2PP 19 5 poly(2) VCOPYP VP 0 0 0 0 0.5
F2PN 19 5 poly(2) VCOPYP VN 0 0 0 0 0.5
F2NP 19 5 poly(2) VCOPYN VP 0 0 0 0 1.75
F2NN 19 5 poly(2) VCOPYN VN 0 0 0 0 1.75
* COMPENSATION ************
CC 19 119 25p
* OUTPUT ***********
DOPM 19 22 MDTH 400E-12
DONM 21 19 MDTH 400E-12
HOPM 22 28 VOUT 6.250000E+02
VIPM 28 4 5.000000E+01
HONM 21 27 VOUT 6.250000E+02
VINM 5 27 5.000000E+01
VOUT 3 23 0
ROUT 23 19 6
COUT 3 5 1.300000E-10
DOP 19 25 MDTH 400E-12
VOP 4 25 1.052
DON 24 19 MDTH 400E-12
VON 24 5 1.052
.ENDS;TS92X
14/22
TS922
Package information TS922
Figure 16. Flip-chip marking (top view)
Figure 17. Tape and reel specification (top view)
Note: Device orientation: the devices are oriented in th e carrier pocket with bump number A1
16/22
TS922 Package information
5.2 DIP8 package
Figure 18. DIP8 package mechanical drawin g
Table 6. DIP8 package mechanical data
Dimensions
Ref.
Min. Typ. Max. Min. Typ. Max.
A5.330.210
A1 0.38 0.015
A2 2.92 3.30 4.95 0.115 0.130 0.195
b 0.36 0.46 0.56 0.014 0.018 0.022
b2 1.14 1.52 1.78 0.045 0.060 0.070
c 0.20 0.25 0.36 0.008 0.010 0.014
D 9.02 9.27 10.16 0.355 0.365 0.400
E 7.62 7.87 8.26 0.300 0.310 0.325
E1 6.10 6.35 7.11 0.240 0.250 0.280
e 2.54 0.100
eA 7.62 0.300
eB 10.92 0.430
L 2.92 3.30 3.81 0.115 0.130 0.150
Millimeters Inches
17/22
Package information TS922
5.3 SO-8 package
Figure 19. SO-8 package mechanical drawing
Table 7. SO-8 package mechanical data
Dimensions
Ref.
Min. Typ. Max. Min. Typ. Max.
A1.750.069
A1 0.10 0.25 0.004 0.010
A2 1.25 0.049
b 0.28 0.48 0.011 0.019
c 0.17 0.23 0.007 0.010
D 4.80 4.90 5.00 0.189 0.193 0.197
H 5.80 6.00 6.20 0.228 0.236 0.244
E1 3.80 3.90 4.00 0.150 0.154 0.157
e 1.27 0.050
h 0.25 0.50 0.010 0.020
L 0.40 1.27 0.016 0.050
k1°8°1°8°
ccc 0.10 0.004
Millimeters Inches
18/22
TS922 Package information
5.4 TSSOP8 package
Figure 20. TSSOP8 package mechanical drawing
Table 8. TSSOP8 package mechanical data
Dimensions
Ref.
Min. Typ. Max. Min. Typ. Max.
A 1.2 0.047
A1 0.05 0.15 0.002 0.006
A2 0.80 1.00 1.05 0.031 0.039 0.041
b 0.19 0.30 0.007 0.012
c 0.09 0.20 0.004 0.008
D 2.90 3.00 3.10 0.114 0.118 0.122
E 6.20 6.40 6.60 0.244 0.252 0.260
E1 4.30 4.40 4.50 0.169 0.173 0.177
e 0.65 0.0256
K0°8°0°8°
L 0.45 0.60 0.75 0.018 0.024 0.030
L1 1 0.039
Millimeters Inches
19/22
Ordering information TS922
6 Ordering information
Table 9. Order codes
Part number
TS922IN
Temperature
range
Package Packaging Marking
TS922IN
DIP8 Tube
TS922AIN TS922AIN
TS922ID
TS922IDT
TS922AID
TS922AIDT
TS922IYD
TS922IYDT
TS922AIYD
TS922AIYDT
TS922IPT
(1)
(1)
-40°C, +125°C
SO-8
SO-8
(Automotive grade)
Tube or
Tape & reel
Tube or
Tape & reel
922I
922AI
922IY
922AIY
922I
TSSOP8 Tape & reel
TS922AIPT 922AI
TS922IYPT
TS922AIYPT
(2)
(2)
TSSOP8
(Automotive grade)
Tape & reel
922IY
922AY
TS922IJT/EIJT Flip-chip Tape & reel 922
1. Qualified and characterized according to AEC Q100 and Q003 or equivalent, advanced screening
according to AEC Q001 & Q 002 or equivalent.
2. Qualification and characterization according to AEC Q100 and Q003 or equivalent, advanced screening
according to AEC Q001 & Q 002 or equivalent are on-going.
20/22
TS922 Revision history
7 Revision history
Table 10. Document revision history
Date Revision Changes
1-Feb-2001 1 First release.
1-Jul-2004 2 Flip-chip package inserted in the document.
2-May-2005 3
Modifications in AMR Table 1 on page 4 (explanation of V
limits, ESD MM and CDM values added, R
added).
thja
1-Aug-2005 4 PPAP references inserted in the datasheet, see Table 6 on page 20.
1-Mar-2006 5
TS922EIJT part number inserted in the datasheet, see
Table 6 on page 20.
and Vi
id
26-Jan-2007 6
12-Nov-2007 7
Modifications in AMR Table 1 on page 4 (R
added), parameter
thjc
limits on full temperature range added in Table 3 on page 6 and
Table 4 on page 8.
Added notes on ESD in AMR table.
Re-formatted package information.
Added notes for automotive grade in order codes table.
21/22
TS922
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