The TS4985 has been designed for top-class
stereo audio applications. Thanks to its compact
and power-dissipation efficient flip-chip package,
it suits various applications.
With a BTL configuration, this audio power
amplifier is capable of delivering 1.2W per
channel of continuous RMS output power into an
8Ω load @ 5V.
Each output channel (left and right), has an
external controlled standby mode pin (STDBYL &
STDBYR) to reduce the supply current to less
than 10nA per channel. The device also features
an internal thermal shutdown protection.
The gain of each channel can be configured by
external gain setting resistors.
Flip-chip - 15 bumps
Pin Connection (top view)
VCC2
VCC2
VCC1
VCC1
IN-L
IN-L
VO+L
VO+L
IN+L
IN+L
STDBYL
STDBYL
BYPASS
BYPASS
STDBYR
STDBYR
Applications
■ Cellular mobile phones
■ Notebook & PDA computers
■ LCD monitors & TVs
■ Portable audio devices
IN+R
IN+R
VO+R
VO+R
GND2
GND2
IN-R
IN-R
VO-RVO-L
VO-RVO-L
GND1
GND1
Order Codes
Part NumberTemperature RangePackagePackagingMarking
TS4985EIJT
TS4985EKIJT
-40, +85°C
May 20051/29
Lead free flip-chip
Lead free flip-chip +
back coating
Tape & ReelA85
Rev 2
www.st.com
29
Typical Application SchematicTS4985
1 Typical Application Schematic
Figure 1
shows a typical application schematic for the TS4985.
Figure 1.Application schematic
Cin-LInput L
100n
Cin-R
100n
Rin-L
22k
VCC
1
2
3
+
Cb
1u
Rin-R
22k
VCC
1
2
3
Input R
GND
GND
Cfeed-L
Rfeed-L
22k
A1
B2
C5
C3
D6
E5
C1
IN-L
IN+L
Standby L
Bypass
IN+R
IN-R
Standby R
VCC
+
Cs
1u
B6A5
VCC1
-
+
Bias
+
-
-
AV = -1
+
-
AV = -1
+
VO-L
VO+L
VO-R
VO+R
A3
B4
E3
D4
Neg. Output L
Pos. Output L
Neg. Output R
Pos. Output R
Cfeed-R
Rfeed-R
22k
Table 1.External component descriptions
ComponentsFunctional Description
Inverting input resistors which sets the closed loop gain in
R
IN L,R
C
IN L,R
R
FEED L,R
C
C
A
V L, R
S
B
conjunction with Rfeed. These resistors also form a high pass
filter with C
(fc = 1 / (2 x Pi x RIN x CIN))
IN
Input coupling capacitors which blocks the DC voltage at the
amplifier input terminal
Feedback resistors which sets the closed loop gain in
conjunction with R
Supply Bypass capacitor which provides power supply filtering
Bypass pin capacitor which provides half supply filtering
Closed loop gain in BTL configuration = 2 x (R
each channel
GND1
E1D2
IN
GND2VCC2
TS4985
FEED
/ RIN) on
2/29
TS4985Absolute Maximum Ratings
2 Absolute Maximum Ratings
Table 2.Key parameters and their absolute maximum ratings
SymbolParameterValueUnit
VCC
V
T
oper
T
stg
T
R
thja
(1)
(2)
i
Supply voltage
Input Voltage
Operating Free Air Temperature Range-40 to + 85°C
Storage Temperature-65 to +150°C
Maximum Junction Temperature150°C
j
Flip-chip Thermal Resistance Junction to Ambient 180°C/W
6V
GND to V
CC
PdPower DissipationInternally Limited
ESD
Human Body Model
(3)
2kV
ESDMachine Model200V
Latch-up Immunity200mA
1. All voltages values are measured with respect to the ground pin.
2. The magnitude of input signal must never exceed VCC + 0.3V / GND - 0.3V
3. All voltage values are measured from each pin with respect to supplies.
Table 3.Operating conditions
SymbolParameterValueUnit
VCCSupply Voltage2.2 to 5.5V
V
ICM
Common Mode Input Voltage Range
1.2V to V
CC
V
V
Standby Voltage Input:
VSTB
Device ON
Device OFF
1.35 ≤ V
GND ≤ V
STB
STB
≤ V
≤ 0.4
CC
RLLoad Resistor≥ 4Ω
ROUTGND
Resistor Output to GND (V
STB
= GND)
≥ 1MΩ
TSDThermal Shutdown Temperature150°C
RTHJA
1. When mounted on a 4-layer PCB.
Flip-chip Thermal Resistance Junction to Ambient
(1)
110
V
°C/W
3/29
Electrical CharacteristicsTS4985
3 Electrical Characteristics
Table 4.VCC = +5V, GND = 0V, T
= 25°C (unless otherwise specified)
amb
SymbolParameterMin.Typ.Max.Unit
I
I
STANDBY
Voo
Po
THD + N
PSRR
Crosstalk
T
T
STDB
V
STDBH
V
STDBL
Φ
GM
GBP
1. Standby mode is activated when Vstdby is tied to Gnd.
2. All PSRR data limits are guaranteed by production sapling tests.
Dynamic measurements - 20*log(rms(Vout)/rms(Vripple)). Vripple is the sinusoidal signal superimposed upon
Vcc
Supply Current
CC
No input signal, no load7.412
Standby Current
No input signal, Vstdby = GND, RL = 8Ω
(1)
101000nA
Output Offset Voltage
No input signal, RL = 8Ω110
Output Power
THD = 1% Max, F = 1kHz, RL = 8Ω
Total Harmonic Distortion + Noise
Po = 1Wrms, Av = 2, 20Hz ≤ F ≤ 20kHz, RL = 8Ω
Power Supply Rejection Ratio
(2)
0.91.2W
0.2%
RL = 8Ω, Av = 2, Vripple = 200mVpp, Input Grounded
F = 217Hz
F = 1kHz
Channel Separation, R
= 8Ω
L
55
55
F = 1kHz
F = 20Hz to 20kHz
Wake-Up Time (Cb = 1µF)90130ms
WU
62
64
-107
-82
Standby Time (Cb = 1µF)10µs
Standby Voltage Level High1.3V
Standby Voltage Level Low0.4V
Phase Margin at Unity Gain
M
R
= 8Ω, CL = 500pF
L
Gain Margin
R
= 8Ω, CL = 500pF
L
Gain Bandwidth Product
R
L
= 8Ω
65Degrees
15dB
1.5MHz
mA
mV
dB
dB
4/29
TS4985Electrical Characteristics
Table 5.VCC = +3.3V, GND = 0V, T
= 25°C (unless otherwise specified)
amb
SymbolParameterMin.Typ.Max.Unit
I
I
STANDBY
Voo
Po
THD + N
PSRR
Crosstalk
T
T
STDB
V
STDBH
V
STDBL
Φ
GM
GBP
GBP
1. Standby mode is activated when Vstdby is tied to Gnd.
2. All PSRR data limits are guaranteed by production sampling tests.
Dynamic measurements - 20*log(rms(Vout)/rms(Vripple)). Vripple is the sinusoidal signal superimposed upon
Vcc
Supply Current
CC
No input signal, no load6.612
Standby Current
No input signal, Vstdby = GND, RL = 8Ω
(1)
101000nA
Output Offset Voltage
No input signal, RL = 8Ω110
Output Power
THD = 1% Max, F = 1kHz, RL = 8Ω
Total Harmonic Distortion + Noise
Po = 400mWrms, Av = 2, 20Hz ≤ F ≤ 20kHz, RL = 8Ω
Power Supply Rejection Ratio
(2)
375500mW
0.1%
RL = 8Ω, Av = 2, Vripple = 200mVpp, Input Grounded
F = 217Hz
F = 1kHz
Channel Separation, R
= 8Ω
L
55
55
F = 1kHz
F = 20Hz to 20kHz
Wake-Up Time (Cb = 1µF)110140ms
WU
61
63
-107
-82
Standby Time (Cb = 1µF)10µs
Standby Voltage Level High1.2V
Standby Voltage Level Low0.4V
Phase Margin at Unity Gain
M
R
= 8Ω, CL = 500pF
L
Gain Margin
R
= 8Ω, CL = 500pF
L
Gain Bandwidth Product
R
L
= 8Ω
Gain Bandwidth Product
L
= 8Ω
R
65Degrees
15dB
1.5MHz
1.5MHz
mA
mV
dB
dB
5/29
Electrical CharacteristicsTS4985
Table 6.VCC = +2.6V, GND = 0V, T
= 25°C (unless otherwise specified)
amb
SymbolParameterMin.Typ.Max.Unit
I
I
STANDBY
Voo
Po
THD + N
PSRR
Crosstalk
T
T
STDB
V
STDBH
V
STDBL
Φ
GM
GBP
1. Standby mode is activated when Vstdby is tied to Gnd.
2. All PSRR data limits are guaranteed by production sampling tests.
Dynamic measurements - 20*log(rms(Vout)/rms(Vripple)). Vripple is the sinusoidal signal superimposed upon
Vcc
Supply Current
CC
No input signal, no load6.212
Standby Current
No input signal, Vstdby = GND, RL = 8Ω
(1)
101000nA
Output Offset Voltage
No input signal, RL = 8Ω110
Output Power
THD = 1% Max, F = 1kHz, RL = 8Ω
Total Harmonic Distortion + Noise
Po = 200mWrms, Av = 2, 20Hz ≤ F ≤ 20kHz, RL = 8Ω
Power Supply Rejection Ratio
(2)
220300mW
0.1%
RL = 8Ω, Av = 2, Vripple = 200mVpp, Input Grounded
F = 217Hz
F = 1kHz
Channel Separation, R
= 8Ω
L
55
55
F = 1kHz
F = 20Hz to 20kHz
Wake-Up Time (Cb = 1µF)125150ms
WU
60
62
-107
-82
Standby Time (Cb = 1µF)10µs
Standby Voltage Level High1.2V
Standby Voltage Level Low0.4V
Phase Margin at Unity Gain
M
R
= 8Ω, CL = 500pF
L
Gain Margin
R
= 8Ω, CL = 500pF
L
Gain Bandwidth Product
R
L
= 8Ω
65Degrees
15dB
1.5MHz
mA
mV
dB
dB
6/29
TS4985Electrical Characteristics
Table 7.Index of graphics
DescriptionFigurePage
Open Loop Frequency Response
Power Supply Rejection Ratio (PSRR) vs. Frequency
Power Supply Rejection Ratio (PSRR) vs. DC Output Voltage
Power Supply Rejection Ratio (PSRR) at F=217Hz vs. Bypass
Capacitor
Output Power vs. Power Supply Voltage
Output Power vs. Load Resistor
Power Dissipation vs. Output Power
Clipping Voltage vs. Power Supply Voltage and Load Resistor
Current Consumption vs. Power Supply Voltage
Current Consumption vs. Standby Voltage
Output Noise Voltage, Device ON
Output Noise Voltage, Device in Standby
THD+N vs. Output Power
Figure 2
Figure 8
Figure 14
to
7page 8
to
13page 9
to
22
page 10
page 11
Figure 23page 11
Figure 24
Figure 27
Figure 30
Figure 33
Figure 34
to
26
to
29page 12
to
32
,
page 11
page 12
page 12
page 13
page 13
Figure 35page 13
Figure 36
to
38
page 13
page 14
Figure 39page 14
Figure 40page 14
Figure 41
to
49
page 14
page 15
to
to
to
to
to
THD+N vs. Frequency
Crosstalk vs. Frequency
SIgnal to Noise Ratio vs. Power Supply with Unweighted Filter
(20Hz to 20kHz)
SIgnal to Noise Ratio vs. Power Supply with A-weighted Filter
Power Derating Curves
Figure 50
Figure 53
to
to
Figure 56
Figure 57
Figure 58
Figure 59
52page 16
55page 16
,
,
page 17
page 17
Figure 60page 17
7/29
Electrical CharacteristicsTS4985
0.1110100100010000
-60
-40
-20
0
20
40
60
-200
-160
-120
-80
-40
0
Gain
Phase
Gain (dB)
Frequency (kHz)
Vcc = 3.3V
RL = 8
Ω
Tamb = 25°C
Phase (°)
0.1110100100010000
-40
-20
0
20
40
60
80
100
-200
-160
-120
-80
-40
0
Gain
Phase
Gain (dB)
Frequency (kHz)
Vcc = 2.6V
CL = 560pF
Tamb = 25°C
Phase (°)
0.1110100100010000
-40
-20
0
20
40
60
80
100
-200
-160
-120
-80
-40
0
Gain
Phase
Gain (dB)
Frequency (kHz)
Vcc = 5V
CL = 560pF
Tamb = 25°C
Phase (°)
Figure 2.Open loop frequency responseFigure 3.Open loop frequency response
60
40
20
0
Gain (dB)
-20
-40
-60
0.1110100100010000
Vcc = 2.6V
RL = 8
Ω
Tamb = 25°C
Phase
Gain
Frequency (kHz)
0
-40
-80
-120
-160
-200
Phase (°)
Figure 4.Open loop frequency responseFigure 5.Open loop frequency response
60
40
20
0
Gain (dB)
-20
-40
-60
0.1110100100010000
Phase
Vcc = 5V
RL = 8
Ω
Tamb = 25°C
Frequency (kHz)
Gain
0
-40
-80
-120
-160
-200
Phase (°)
Figure 6.Open loop frequency responseFigure 7.Open loop frequency response